1 //==-- AArch64TargetMachine.h - Define TargetMachine for AArch64 -*- C++ -*-==//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the AArch64 specific subclass of TargetMachine.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_LIB_TARGET_AARCH64_AARCH64TARGETMACHINE_H
15 #define LLVM_LIB_TARGET_AARCH64_AARCH64TARGETMACHINE_H
17 #include "AArch64InstrInfo.h"
18 #include "AArch64Subtarget.h"
19 #include "llvm/IR/DataLayout.h"
20 #include "llvm/Target/TargetMachine.h"
24 class AArch64TargetMachine : public LLVMTargetMachine {
26 AArch64Subtarget Subtarget;
29 AArch64TargetMachine(const Target &T, StringRef TT, StringRef CPU,
30 StringRef FS, const TargetOptions &Options,
31 Reloc::Model RM, CodeModel::Model CM,
32 CodeGenOpt::Level OL, bool IsLittleEndian);
34 const AArch64Subtarget *getSubtargetImpl() const override {
38 // Pass Pipeline Configuration
39 TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
41 /// \brief Register AArch64 analysis passes with a pass manager.
42 void addAnalysisPasses(PassManagerBase &PM) override;
44 /// \brief Query if the PBQP register allocator is being used
45 bool isPBQPUsed() const { return usingPBQP; }
51 // AArch64leTargetMachine - AArch64 little endian target machine.
53 class AArch64leTargetMachine : public AArch64TargetMachine {
54 virtual void anchor();
56 AArch64leTargetMachine(const Target &T, StringRef TT, StringRef CPU,
57 StringRef FS, const TargetOptions &Options,
58 Reloc::Model RM, CodeModel::Model CM,
59 CodeGenOpt::Level OL);
62 // AArch64beTargetMachine - AArch64 big endian target machine.
64 class AArch64beTargetMachine : public AArch64TargetMachine {
65 virtual void anchor();
67 AArch64beTargetMachine(const Target &T, StringRef TT, StringRef CPU,
68 StringRef FS, const TargetOptions &Options,
69 Reloc::Model RM, CodeModel::Model CM,
70 CodeGenOpt::Level OL);
73 } // end namespace llvm