1 //===--- AArch64Subtarget.h - Define Subtarget for the AArch64 -*- C++ -*--===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the AArch64 specific subclass of TargetSubtarget.
12 //===----------------------------------------------------------------------===//
14 #ifndef AArch64SUBTARGET_H
15 #define AArch64SUBTARGET_H
17 #include "AArch64InstrInfo.h"
18 #include "AArch64FrameLowering.h"
19 #include "AArch64ISelLowering.h"
20 #include "AArch64RegisterInfo.h"
21 #include "AArch64SelectionDAGInfo.h"
22 #include "llvm/IR/DataLayout.h"
23 #include "llvm/Target/TargetSubtargetInfo.h"
26 #define GET_SUBTARGETINFO_HEADER
27 #include "AArch64GenSubtargetInfo.inc"
33 class AArch64Subtarget : public AArch64GenSubtargetInfo {
35 enum ARMProcFamilyEnum {Others, CortexA53, CortexA57, Cyclone};
37 /// ARMProcFamily - ARM processor family: Cortex-A53, Cortex-A57, and others.
38 ARMProcFamilyEnum ARMProcFamily;
45 // HasZeroCycleRegMove - Has zero-cycle register mov instructions.
46 bool HasZeroCycleRegMove;
48 // HasZeroCycleZeroing - Has zero-cycle zeroing instructions.
49 bool HasZeroCycleZeroing;
51 /// CPUString - String name of used CPU.
52 std::string CPUString;
54 /// TargetTriple - What processor and OS we're targeting.
58 AArch64FrameLowering FrameLowering;
59 AArch64InstrInfo InstrInfo;
60 AArch64SelectionDAGInfo TSInfo;
61 std::unique_ptr<AArch64TargetLowering> TLInfo;
64 /// This constructor initializes the data members to match that
65 /// of the specified triple.
66 AArch64Subtarget(const std::string &TT, const std::string &CPU,
67 const std::string &FS, TargetMachine &TM, bool LittleEndian);
69 const AArch64SelectionDAGInfo *getSelectionDAGInfo() const { return &TSInfo; }
70 const AArch64FrameLowering *getFrameLowering() const {
71 return &FrameLowering;
73 const AArch64TargetLowering *getTargetLowering() const {
76 const AArch64InstrInfo *getInstrInfo() const { return &InstrInfo; }
77 const DataLayout *getDataLayout() const { return &DL; }
78 bool enableMachineScheduler() const override { return true; }
80 bool hasZeroCycleRegMove() const { return HasZeroCycleRegMove; }
82 bool hasZeroCycleZeroing() const { return HasZeroCycleZeroing; }
84 bool hasFPARMv8() const { return HasFPARMv8; }
85 bool hasNEON() const { return HasNEON; }
86 bool hasCrypto() const { return HasCrypto; }
87 bool hasCRC() const { return HasCRC; }
89 bool isLittleEndian() const { return DL.isLittleEndian(); }
91 bool isTargetDarwin() const { return TargetTriple.isOSDarwin(); }
93 bool isTargetELF() const { return TargetTriple.isOSBinFormatELF(); }
95 bool isTargetMachO() const { return TargetTriple.isOSBinFormatMachO(); }
97 bool isCyclone() const { return CPUString == "cyclone"; }
99 /// getMaxInlineSizeThreshold - Returns the maximum memset / memcpy size
100 /// that still makes it profitable to inline the call.
101 unsigned getMaxInlineSizeThreshold() const { return 64; }
103 /// ParseSubtargetFeatures - Parses features string setting specified
104 /// subtarget options. Definition of function is auto generated by tblgen.
105 void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
107 /// ClassifyGlobalReference - Find the target operand flags that describe
108 /// how a global value should be referenced for the current subtarget.
109 unsigned char ClassifyGlobalReference(const GlobalValue *GV,
110 const TargetMachine &TM) const;
112 /// This function returns the name of a function which has an interface
113 /// like the non-standard bzero function, if such a function exists on
114 /// the current subtarget and it is considered prefereable over
115 /// memset with zero passed as the second argument. Otherwise it
117 const char *getBZeroEntry() const;
119 void overrideSchedPolicy(MachineSchedPolicy &Policy, MachineInstr *begin,
121 unsigned NumRegionInstrs) const override;
123 bool enableEarlyIfConversion() const override;
125 } // End llvm namespace
127 #endif // AArch64SUBTARGET_H