1 //===--- AArch64Subtarget.h - Define Subtarget for the AArch64 -*- C++ -*--===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the AArch64 specific subclass of TargetSubtarget.
12 //===----------------------------------------------------------------------===//
14 #ifndef AArch64SUBTARGET_H
15 #define AArch64SUBTARGET_H
17 #include "AArch64FrameLowering.h"
18 #include "AArch64RegisterInfo.h"
19 #include "llvm/IR/DataLayout.h"
20 #include "llvm/Target/TargetSubtargetInfo.h"
23 #define GET_SUBTARGETINFO_HEADER
24 #include "AArch64GenSubtargetInfo.inc"
30 class AArch64Subtarget : public AArch64GenSubtargetInfo {
32 enum ARMProcFamilyEnum {Others, CortexA53, CortexA57, Cyclone};
34 /// ARMProcFamily - ARM processor family: Cortex-A53, Cortex-A57, and others.
35 ARMProcFamilyEnum ARMProcFamily;
42 // HasZeroCycleRegMove - Has zero-cycle register mov instructions.
43 bool HasZeroCycleRegMove;
45 // HasZeroCycleZeroing - Has zero-cycle zeroing instructions.
46 bool HasZeroCycleZeroing;
48 /// CPUString - String name of used CPU.
49 std::string CPUString;
51 /// TargetTriple - What processor and OS we're targeting.
55 AArch64FrameLowering FrameLowering;
58 /// This constructor initializes the data members to match that
59 /// of the specified triple.
60 AArch64Subtarget(const std::string &TT, const std::string &CPU,
61 const std::string &FS, bool LittleEndian);
63 const AArch64FrameLowering *getFrameLowering() const {
64 return &FrameLowering;
66 const DataLayout *getDataLayout() const { return &DL; }
67 bool enableMachineScheduler() const override { return true; }
69 bool hasZeroCycleRegMove() const { return HasZeroCycleRegMove; }
71 bool hasZeroCycleZeroing() const { return HasZeroCycleZeroing; }
73 bool hasFPARMv8() const { return HasFPARMv8; }
74 bool hasNEON() const { return HasNEON; }
75 bool hasCrypto() const { return HasCrypto; }
76 bool hasCRC() const { return HasCRC; }
78 bool isLittleEndian() const { return DL.isLittleEndian(); }
80 bool isTargetDarwin() const { return TargetTriple.isOSDarwin(); }
82 bool isTargetELF() const { return TargetTriple.isOSBinFormatELF(); }
84 bool isTargetMachO() const { return TargetTriple.isOSBinFormatMachO(); }
86 bool isCyclone() const { return CPUString == "cyclone"; }
88 /// getMaxInlineSizeThreshold - Returns the maximum memset / memcpy size
89 /// that still makes it profitable to inline the call.
90 unsigned getMaxInlineSizeThreshold() const { return 64; }
92 /// ParseSubtargetFeatures - Parses features string setting specified
93 /// subtarget options. Definition of function is auto generated by tblgen.
94 void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
96 /// ClassifyGlobalReference - Find the target operand flags that describe
97 /// how a global value should be referenced for the current subtarget.
98 unsigned char ClassifyGlobalReference(const GlobalValue *GV,
99 const TargetMachine &TM) const;
101 /// This function returns the name of a function which has an interface
102 /// like the non-standard bzero function, if such a function exists on
103 /// the current subtarget and it is considered prefereable over
104 /// memset with zero passed as the second argument. Otherwise it
106 const char *getBZeroEntry() const;
108 void overrideSchedPolicy(MachineSchedPolicy &Policy, MachineInstr *begin,
110 unsigned NumRegionInstrs) const override;
112 bool enableEarlyIfConversion() const override;
114 } // End llvm namespace
116 #endif // AArch64SUBTARGET_H