1 //===--- AArch64Subtarget.h - Define Subtarget for the AArch64 -*- C++ -*--===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the AArch64 specific subclass of TargetSubtarget.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_LIB_TARGET_AARCH64_AARCH64SUBTARGET_H
15 #define LLVM_LIB_TARGET_AARCH64_AARCH64SUBTARGET_H
17 #include "AArch64FrameLowering.h"
18 #include "AArch64ISelLowering.h"
19 #include "AArch64InstrInfo.h"
20 #include "AArch64RegisterInfo.h"
21 #include "AArch64SelectionDAGInfo.h"
22 #include "llvm/IR/DataLayout.h"
23 #include "llvm/Target/TargetSubtargetInfo.h"
26 #define GET_SUBTARGETINFO_HEADER
27 #include "AArch64GenSubtargetInfo.inc"
33 class AArch64Subtarget : public AArch64GenSubtargetInfo {
35 enum ARMProcFamilyEnum {Others, CortexA53, CortexA57, Cyclone};
37 /// ARMProcFamily - ARM processor family: Cortex-A53, Cortex-A57, and others.
38 ARMProcFamilyEnum ARMProcFamily;
47 // HasZeroCycleRegMove - Has zero-cycle register mov instructions.
48 bool HasZeroCycleRegMove;
50 // HasZeroCycleZeroing - Has zero-cycle zeroing instructions.
51 bool HasZeroCycleZeroing;
55 /// CPUString - String name of used CPU.
56 std::string CPUString;
58 /// TargetTriple - What processor and OS we're targeting.
61 AArch64FrameLowering FrameLowering;
62 AArch64InstrInfo InstrInfo;
63 AArch64SelectionDAGInfo TSInfo;
64 AArch64TargetLowering TLInfo;
66 /// initializeSubtargetDependencies - Initializes using CPUString and the
67 /// passed in feature string so that we can use initializer lists for
68 /// subtarget initialization.
69 AArch64Subtarget &initializeSubtargetDependencies(StringRef FS);
72 /// This constructor initializes the data members to match that
73 /// of the specified triple.
74 AArch64Subtarget(const std::string &TT, const std::string &CPU,
75 const std::string &FS, const TargetMachine &TM,
78 const AArch64SelectionDAGInfo *getSelectionDAGInfo() const override {
81 const AArch64FrameLowering *getFrameLowering() const override {
82 return &FrameLowering;
84 const AArch64TargetLowering *getTargetLowering() const override {
87 const AArch64InstrInfo *getInstrInfo() const override { return &InstrInfo; }
88 const AArch64RegisterInfo *getRegisterInfo() const override {
89 return &getInstrInfo()->getRegisterInfo();
91 const Triple &getTargetTriple() const { return TargetTriple; }
92 bool enableMachineScheduler() const override { return true; }
93 bool enablePostMachineScheduler() const override {
94 return isCortexA53() || isCortexA57();
97 bool hasV8_1aOps() const { return HasV8_1aOps; }
99 bool hasZeroCycleRegMove() const { return HasZeroCycleRegMove; }
101 bool hasZeroCycleZeroing() const { return HasZeroCycleZeroing; }
103 bool hasFPARMv8() const { return HasFPARMv8; }
104 bool hasNEON() const { return HasNEON; }
105 bool hasCrypto() const { return HasCrypto; }
106 bool hasCRC() const { return HasCRC; }
108 bool isLittleEndian() const { return IsLittle; }
110 bool isTargetDarwin() const { return TargetTriple.isOSDarwin(); }
111 bool isTargetIOS() const { return TargetTriple.isiOS(); }
112 bool isTargetLinux() const { return TargetTriple.isOSLinux(); }
113 bool isTargetWindows() const { return TargetTriple.isOSWindows(); }
115 bool isTargetCOFF() const { return TargetTriple.isOSBinFormatCOFF(); }
116 bool isTargetELF() const { return TargetTriple.isOSBinFormatELF(); }
117 bool isTargetMachO() const { return TargetTriple.isOSBinFormatMachO(); }
119 bool isCyclone() const { return CPUString == "cyclone"; }
120 bool isCortexA57() const { return CPUString == "cortex-a57"; }
121 bool isCortexA53() const { return CPUString == "cortex-a53"; }
123 bool useAA() const override { return isCortexA53(); }
125 /// getMaxInlineSizeThreshold - Returns the maximum memset / memcpy size
126 /// that still makes it profitable to inline the call.
127 unsigned getMaxInlineSizeThreshold() const { return 64; }
129 /// ParseSubtargetFeatures - Parses features string setting specified
130 /// subtarget options. Definition of function is auto generated by tblgen.
131 void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
133 /// ClassifyGlobalReference - Find the target operand flags that describe
134 /// how a global value should be referenced for the current subtarget.
135 unsigned char ClassifyGlobalReference(const GlobalValue *GV,
136 const TargetMachine &TM) const;
138 /// This function returns the name of a function which has an interface
139 /// like the non-standard bzero function, if such a function exists on
140 /// the current subtarget and it is considered prefereable over
141 /// memset with zero passed as the second argument. Otherwise it
143 const char *getBZeroEntry() const;
145 void overrideSchedPolicy(MachineSchedPolicy &Policy, MachineInstr *begin,
147 unsigned NumRegionInstrs) const override;
149 bool enableEarlyIfConversion() const override;
151 std::unique_ptr<PBQPRAConstraint> getCustomPBQPConstraints() const override;
153 } // End llvm namespace