1 //===- AArch64Schedule.td - AArch64 Scheduling Definitions -*- tablegen -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 //===----------------------------------------------------------------------===//
11 // Generic processor itineraries for legacy compatibility.
13 def GenericItineraries : ProcessorItineraries<[], [], []>;
16 //===----------------------------------------------------------------------===//
17 // Base SchedReadWrite types
20 def WriteALU : SchedWrite; // Generic: may contain shift and/or ALU operation
21 def WriteALUs : SchedWrite; // Shift only with no ALU operation
22 def ReadALU : SchedRead; // Operand not needed for shifting
23 def ReadALUs : SchedRead; // Operand needed for shifting
25 // Multiply with optional accumulate
26 def WriteMAC : SchedWrite;
27 def ReadMAC : SchedRead;
30 def WriteCMP : SchedWrite;
31 def ReadCMP : SchedRead;
34 def WriteDiv : SchedWrite;
35 def ReadDiv : SchedRead;
38 def WriteLd : SchedWrite;
39 def WritePreLd : SchedWrite;
40 def ReadLd : SchedRead;
41 def ReadPreLd : SchedRead;
44 def WriteBr : SchedWrite;
45 def WriteBrL : SchedWrite;
46 def ReadBr : SchedRead;
49 def WriteFPALU : SchedWrite;
50 def ReadFPALU : SchedRead;
52 // Floating Point MAC, Mul, Div, Sqrt
53 // Most processors will simply send all of these down a dedicated pipe, but
54 // they're explicitly seperated here for flexibility of modeling later. May
55 // consider consolidating them into a single WriteFPXXXX type in the future.
56 def WriteFPMAC : SchedWrite;
57 def WriteFPMul : SchedWrite;
58 def WriteFPDiv : SchedWrite;
59 def WriteFPSqrt : SchedWrite;
60 def ReadFPMAC : SchedRead;
61 def ReadFPMul : SchedRead;
62 def ReadFPDiv : SchedRead;
63 def ReadFPSqrt : SchedRead;
66 def WriteNoop : SchedWrite;
69 //===----------------------------------------------------------------------===//
70 // Subtarget specific Machine Models.
72 include "AArch64ScheduleA53.td"