1 //===- AArch64.td - Describe the AArch64 Target Machine -------*- tblgen -*-==//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This is the top level entry point for the AArch64 target.
12 //===----------------------------------------------------------------------===//
14 //===----------------------------------------------------------------------===//
15 // Target-independent interfaces
16 //===----------------------------------------------------------------------===//
18 include "llvm/Target/Target.td"
20 //===----------------------------------------------------------------------===//
21 // AArch64 Subtarget features.
24 def FeatureFPARMv8 : SubtargetFeature<"fp-armv8", "HasFPARMv8", "true",
27 def FeatureNEON : SubtargetFeature<"neon", "HasNEON", "true",
28 "Enable Advanced SIMD instructions", [FeatureFPARMv8]>;
30 def FeatureCrypto : SubtargetFeature<"crypto", "HasCrypto", "true",
31 "Enable cryptographic instructions">;
33 //===----------------------------------------------------------------------===//
37 include "AArch64Schedule.td"
39 def : Processor<"generic", GenericItineraries, [FeatureFPARMv8]>;
41 //===----------------------------------------------------------------------===//
42 // Register File Description
43 //===----------------------------------------------------------------------===//
45 include "AArch64RegisterInfo.td"
47 include "AArch64CallingConv.td"
49 //===----------------------------------------------------------------------===//
50 // Instruction Descriptions
51 //===----------------------------------------------------------------------===//
53 include "AArch64InstrInfo.td"
55 def AArch64InstrInfo : InstrInfo;
57 //===----------------------------------------------------------------------===//
59 //===----------------------------------------------------------------------===//
61 def A64InstPrinter : AsmWriter {
62 string AsmWriterClassName = "InstPrinter";
63 bit isMCAsmWriter = 1;
66 //===----------------------------------------------------------------------===//
67 // Declare the target which we are implementing
68 //===----------------------------------------------------------------------===//
70 def AArch64 : Target {
71 let InstructionSet = AArch64InstrInfo;
72 let AssemblyWriters = [A64InstPrinter];