1 //===-- TargetParser - Parser for target features ---------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements a target parser to recognise hardware features such as
11 // FPU/CPU/ARCH names as well as specific support such as HDIV, etc.
13 //===----------------------------------------------------------------------===//
15 #include "llvm/Support/ARMBuildAttributes.h"
16 #include "llvm/Support/TargetParser.h"
17 #include "llvm/ADT/StringExtras.h"
18 #include "llvm/ADT/StringSwitch.h"
26 // List of canonical FPU names (use getFPUSynonym) and which architectural
27 // features they correspond to (use getFPUFeatures).
28 // FIXME: TableGen this.
29 // The entries must appear in the order listed in ARM::FPUKind for correct indexing
34 ARM::FPUVersion FPUVersion;
35 ARM::NeonSupportLevel NeonSupport;
36 ARM::FPURestriction Restriction;
38 StringRef getName() const { return StringRef(NameCStr, NameLength); }
40 #define ARM_FPU(NAME, KIND, VERSION, NEON_SUPPORT, RESTRICTION) \
41 { NAME, sizeof(NAME) - 1, KIND, VERSION, NEON_SUPPORT, RESTRICTION },
42 #include "llvm/Support/ARMTargetParser.def"
45 // List of canonical arch names (use getArchSynonym).
46 // This table also provides the build attribute fields for CPU arch
47 // and Arch ID, according to the Addenda to the ARM ABI, chapters
48 // 2.4 and 2.3.5.2 respectively.
49 // FIXME: SubArch values were simplified to fit into the expectations
50 // of the triples and are not conforming with their official names.
51 // Check to see if the expectation should be changed.
52 // FIXME: TableGen this.
57 const char *CPUAttrCStr;
59 const char *SubArchCStr;
61 ARMBuildAttrs::CPUArch ArchAttr; // Arch ID in build attributes.
62 unsigned ArchBaseExtensions;
64 StringRef getName() const { return StringRef(NameCStr, NameLength); }
66 // CPU class in build attributes.
67 StringRef getCPUAttr() const { return StringRef(CPUAttrCStr, CPUAttrLength); }
70 StringRef getSubArch() const { return StringRef(SubArchCStr, SubArchLength); }
72 #define ARM_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_BASE_EXT) \
73 {NAME, sizeof(NAME) - 1, ID, CPU_ATTR, sizeof(CPU_ATTR) - 1, SUB_ARCH, \
74 sizeof(SUB_ARCH) - 1, ARCH_ATTR, ARCH_BASE_EXT},
75 #include "llvm/Support/ARMTargetParser.def"
78 // List of Arch Extension names.
79 // FIXME: TableGen this.
85 StringRef getName() const { return StringRef(NameCStr, NameLength); }
87 #define ARM_ARCH_EXT_NAME(NAME, ID) { NAME, sizeof(NAME) - 1, ID },
88 #include "llvm/Support/ARMTargetParser.def"
91 // List of HWDiv names (use getHWDivSynonym) and which architectural
92 // features they correspond to (use getHWDivFeatures).
93 // FIXME: TableGen this.
99 StringRef getName() const { return StringRef(NameCStr, NameLength); }
101 #define ARM_HW_DIV_NAME(NAME, ID) { NAME, sizeof(NAME) - 1, ID },
102 #include "llvm/Support/ARMTargetParser.def"
105 // List of CPU names and their arches.
106 // The same CPU can have multiple arches and can be default on multiple arches.
107 // When finding the Arch for a CPU, first-found prevails. Sort them accordingly.
108 // When this becomes table-generated, we'd probably need two tables.
109 // FIXME: TableGen this.
111 const char *NameCStr;
113 ARM::ArchKind ArchID;
114 bool Default; // is $Name the default CPU for $ArchID ?
115 unsigned DefaultExtensions;
117 StringRef getName() const { return StringRef(NameCStr, NameLength); }
119 #define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \
120 { NAME, sizeof(NAME) - 1, ID, IS_DEFAULT, DEFAULT_EXT },
121 #include "llvm/Support/ARMTargetParser.def"
126 // ======================================================= //
128 // ======================================================= //
130 StringRef llvm::ARM::getFPUName(unsigned FPUKind) {
131 if (FPUKind >= ARM::FK_LAST)
133 return FPUNames[FPUKind].getName();
136 unsigned llvm::ARM::getFPUVersion(unsigned FPUKind) {
137 if (FPUKind >= ARM::FK_LAST)
139 return FPUNames[FPUKind].FPUVersion;
142 unsigned llvm::ARM::getFPUNeonSupportLevel(unsigned FPUKind) {
143 if (FPUKind >= ARM::FK_LAST)
145 return FPUNames[FPUKind].NeonSupport;
148 unsigned llvm::ARM::getFPURestriction(unsigned FPUKind) {
149 if (FPUKind >= ARM::FK_LAST)
151 return FPUNames[FPUKind].Restriction;
154 unsigned llvm::ARM::getDefaultFPU(StringRef CPU) {
155 return StringSwitch<unsigned>(CPU)
156 #define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \
157 .Case(NAME, DEFAULT_FPU)
158 #include "llvm/Support/ARMTargetParser.def"
159 .Default(ARM::FK_INVALID);
162 bool llvm::ARM::getHWDivFeatures(unsigned HWDivKind,
163 std::vector<const char *> &Features) {
165 if (HWDivKind == ARM::AEK_INVALID)
168 if (HWDivKind & ARM::AEK_HWDIVARM)
169 Features.push_back("+hwdiv-arm");
171 Features.push_back("-hwdiv-arm");
173 if (HWDivKind & ARM::AEK_HWDIV)
174 Features.push_back("+hwdiv");
176 Features.push_back("-hwdiv");
181 bool llvm::ARM::getExtensionFeatures(unsigned Extensions,
182 std::vector<const char *> &Features) {
184 if (Extensions == ARM::AEK_INVALID)
187 if (Extensions & ARM::AEK_CRC)
188 Features.push_back("+crc");
190 Features.push_back("-crc");
192 if (Extensions & ARM::AEK_T2DSP)
193 Features.push_back("+t2dsp");
195 return getHWDivFeatures(Extensions, Features);
198 bool llvm::ARM::getFPUFeatures(unsigned FPUKind,
199 std::vector<const char *> &Features) {
201 if (FPUKind >= ARM::FK_LAST || FPUKind == ARM::FK_INVALID)
204 // fp-only-sp and d16 subtarget features are independent of each other, so we
205 // must enable/disable both.
206 switch (FPUNames[FPUKind].Restriction) {
208 Features.push_back("+fp-only-sp");
209 Features.push_back("+d16");
212 Features.push_back("-fp-only-sp");
213 Features.push_back("+d16");
216 Features.push_back("-fp-only-sp");
217 Features.push_back("-d16");
221 // FPU version subtarget features are inclusive of lower-numbered ones, so
222 // enable the one corresponding to this version and disable all that are
223 // higher. We also have to make sure to disable fp16 when vfp4 is disabled,
224 // as +vfp4 implies +fp16 but -vfp4 does not imply -fp16.
225 switch (FPUNames[FPUKind].FPUVersion) {
227 Features.push_back("+fp-armv8");
230 Features.push_back("+vfp4");
231 Features.push_back("-fp-armv8");
233 case ARM::FV_VFPV3_FP16:
234 Features.push_back("+vfp3");
235 Features.push_back("+fp16");
236 Features.push_back("-vfp4");
237 Features.push_back("-fp-armv8");
240 Features.push_back("+vfp3");
241 Features.push_back("-fp16");
242 Features.push_back("-vfp4");
243 Features.push_back("-fp-armv8");
246 Features.push_back("+vfp2");
247 Features.push_back("-vfp3");
248 Features.push_back("-fp16");
249 Features.push_back("-vfp4");
250 Features.push_back("-fp-armv8");
253 Features.push_back("-vfp2");
254 Features.push_back("-vfp3");
255 Features.push_back("-fp16");
256 Features.push_back("-vfp4");
257 Features.push_back("-fp-armv8");
261 // crypto includes neon, so we handle this similarly to FPU version.
262 switch (FPUNames[FPUKind].NeonSupport) {
264 Features.push_back("+neon");
265 Features.push_back("+crypto");
268 Features.push_back("+neon");
269 Features.push_back("-crypto");
272 Features.push_back("-neon");
273 Features.push_back("-crypto");
280 StringRef llvm::ARM::getArchName(unsigned ArchKind) {
281 if (ArchKind >= ARM::AK_LAST)
283 return ARCHNames[ArchKind].getName();
286 StringRef llvm::ARM::getCPUAttr(unsigned ArchKind) {
287 if (ArchKind >= ARM::AK_LAST)
289 return ARCHNames[ArchKind].getCPUAttr();
292 StringRef llvm::ARM::getSubArch(unsigned ArchKind) {
293 if (ArchKind >= ARM::AK_LAST)
295 return ARCHNames[ArchKind].getSubArch();
298 unsigned llvm::ARM::getArchAttr(unsigned ArchKind) {
299 if (ArchKind >= ARM::AK_LAST)
300 return ARMBuildAttrs::CPUArch::Pre_v4;
301 return ARCHNames[ArchKind].ArchAttr;
304 StringRef llvm::ARM::getArchExtName(unsigned ArchExtKind) {
305 for (const auto AE : ARCHExtNames) {
306 if (ArchExtKind == AE.ID)
312 StringRef llvm::ARM::getHWDivName(unsigned HWDivKind) {
313 for (const auto D : HWDivNames) {
314 if (HWDivKind == D.ID)
320 unsigned llvm::ARM::getDefaultExtensions(StringRef CPU) {
321 for (const auto C : CPUNames) {
322 if (CPU == C.getName())
323 return (ARCHNames[C.ArchID].ArchBaseExtensions | C.DefaultExtensions);
325 return ARM::AEK_INVALID;
328 StringRef llvm::ARM::getDefaultCPU(StringRef Arch) {
329 unsigned AK = parseArch(Arch);
330 if (AK == ARM::AK_INVALID)
333 // Look for multiple AKs to find the default for pair AK+Name.
334 for (const auto CPU : CPUNames) {
335 if (CPU.ArchID == AK && CPU.Default)
336 return CPU.getName();
341 // ======================================================= //
343 // ======================================================= //
345 static StringRef getHWDivSynonym(StringRef HWDiv) {
346 return StringSwitch<StringRef>(HWDiv)
347 .Case("thumb,arm", "arm,thumb")
351 static StringRef getFPUSynonym(StringRef FPU) {
352 return StringSwitch<StringRef>(FPU)
353 .Cases("fpa", "fpe2", "fpe3", "maverick", "invalid") // Unsupported
354 .Case("vfp2", "vfpv2")
355 .Case("vfp3", "vfpv3")
356 .Case("vfp4", "vfpv4")
357 .Case("vfp3-d16", "vfpv3-d16")
358 .Case("vfp4-d16", "vfpv4-d16")
359 .Cases("fp4-sp-d16", "vfpv4-sp-d16", "fpv4-sp-d16")
360 .Cases("fp4-dp-d16", "fpv4-dp-d16", "vfpv4-d16")
361 .Case("fp5-sp-d16", "fpv5-sp-d16")
362 .Cases("fp5-dp-d16", "fpv5-dp-d16", "fpv5-d16")
363 // FIXME: Clang uses it, but it's bogus, since neon defaults to vfpv3.
364 .Case("neon-vfpv3", "neon")
368 static StringRef getArchSynonym(StringRef Arch) {
369 return StringSwitch<StringRef>(Arch)
370 .Case("v6sm", "v6s-m")
375 .Case("v7em", "v7e-m")
376 .Cases("v8", "v8a", "aarch64", "arm64", "v8-a")
377 .Case("v8.1a", "v8.1-a")
381 // MArch is expected to be of the form (arm|thumb)?(eb)?(v.+)?(eb)?, but
382 // (iwmmxt|xscale)(eb)? is also permitted. If the former, return
383 // "v.+", if the latter, return unmodified string, minus 'eb'.
384 // If invalid, return empty string.
385 StringRef llvm::ARM::getCanonicalArchName(StringRef Arch) {
386 size_t offset = StringRef::npos;
388 StringRef Error = "";
390 // Begins with "arm" / "thumb", move past it.
391 if (A.startswith("arm64"))
393 else if (A.startswith("arm"))
395 else if (A.startswith("thumb"))
397 else if (A.startswith("aarch64")) {
399 // AArch64 uses "_be", not "eb" suffix.
400 if (A.find("eb") != StringRef::npos)
402 if (A.substr(offset, 3) == "_be")
406 // Ex. "armebv7", move past the "eb".
407 if (offset != StringRef::npos && A.substr(offset, 2) == "eb")
409 // Or, if it ends with eb ("armv7eb"), chop it off.
410 else if (A.endswith("eb"))
411 A = A.substr(0, A.size() - 2);
413 if (offset != StringRef::npos)
414 A = A.substr(offset);
416 // Empty string means offset reached the end, which means it's valid.
420 // Only match non-marketing names
421 if (offset != StringRef::npos) {
422 // Must start with 'vN'.
423 if (A[0] != 'v' || !std::isdigit(A[1]))
425 // Can't have an extra 'eb'.
426 if (A.find("eb") != StringRef::npos)
430 // Arch will either be a 'v' name (v7a) or a marketing name (xscale).
434 unsigned llvm::ARM::parseHWDiv(StringRef HWDiv) {
435 StringRef Syn = getHWDivSynonym(HWDiv);
436 for (const auto D : HWDivNames) {
437 if (Syn == D.getName())
440 return ARM::AEK_INVALID;
443 unsigned llvm::ARM::parseFPU(StringRef FPU) {
444 StringRef Syn = getFPUSynonym(FPU);
445 for (const auto F : FPUNames) {
446 if (Syn == F.getName())
449 return ARM::FK_INVALID;
452 // Allows partial match, ex. "v7a" matches "armv7a".
453 unsigned llvm::ARM::parseArch(StringRef Arch) {
454 Arch = getCanonicalArchName(Arch);
455 StringRef Syn = getArchSynonym(Arch);
456 for (const auto A : ARCHNames) {
457 if (A.getName().endswith(Syn))
460 return ARM::AK_INVALID;
463 unsigned llvm::ARM::parseArchExt(StringRef ArchExt) {
464 for (const auto A : ARCHExtNames) {
465 if (ArchExt == A.getName())
468 return ARM::AEK_INVALID;
471 unsigned llvm::ARM::parseCPUArch(StringRef CPU) {
472 for (const auto C : CPUNames) {
473 if (CPU == C.getName())
476 return ARM::AK_INVALID;
479 // ARM, Thumb, AArch64
480 unsigned llvm::ARM::parseArchISA(StringRef Arch) {
481 return StringSwitch<unsigned>(Arch)
482 .StartsWith("aarch64", ARM::IK_AARCH64)
483 .StartsWith("arm64", ARM::IK_AARCH64)
484 .StartsWith("thumb", ARM::IK_THUMB)
485 .StartsWith("arm", ARM::IK_ARM)
486 .Default(ARM::EK_INVALID);
490 unsigned llvm::ARM::parseArchEndian(StringRef Arch) {
491 if (Arch.startswith("armeb") || Arch.startswith("thumbeb") ||
492 Arch.startswith("aarch64_be"))
495 if (Arch.startswith("arm") || Arch.startswith("thumb")) {
496 if (Arch.endswith("eb"))
499 return ARM::EK_LITTLE;
502 if (Arch.startswith("aarch64"))
503 return ARM::EK_LITTLE;
505 return ARM::EK_INVALID;
509 unsigned llvm::ARM::parseArchProfile(StringRef Arch) {
510 Arch = getCanonicalArchName(Arch);
511 switch (parseArch(Arch)) {
514 case ARM::AK_ARMV6SM:
515 case ARM::AK_ARMV7EM:
523 case ARM::AK_ARMV8_1A:
526 return ARM::PK_INVALID;
529 // Version number (ex. v7 = 7).
530 unsigned llvm::ARM::parseArchVersion(StringRef Arch) {
531 Arch = getCanonicalArchName(Arch);
532 switch (parseArch(Arch)) {
544 case ARM::AK_ARMV5TE:
546 case ARM::AK_IWMMXT2:
549 case ARM::AK_ARMV5TEJ:
554 case ARM::AK_ARMV6T2:
556 case ARM::AK_ARMV6ZK:
558 case ARM::AK_ARMV6SM:
559 case ARM::AK_ARMV6HL:
566 case ARM::AK_ARMV7HL:
568 case ARM::AK_ARMV7EM:
572 case ARM::AK_ARMV8_1A: