1 //===-- TargetParser - Parser for target features ---------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements a target parser to recognise hardware features such as
11 // FPU/CPU/ARCH names as well as specific support such as HDIV, etc.
13 //===----------------------------------------------------------------------===//
15 #include "llvm/Support/ARMBuildAttributes.h"
16 #include "llvm/Support/TargetParser.h"
17 #include "llvm/ADT/StringExtras.h"
18 #include "llvm/ADT/StringSwitch.h"
25 // List of canonical FPU names (use getFPUSynonym) and which architectural
26 // features they correspond to (use getFPUFeatures).
27 // FIXME: TableGen this.
28 // The entries must appear in the order listed in ARM::FPUKind for correct indexing
32 ARM::FPUVersion FPUVersion;
33 ARM::NeonSupportLevel NeonSupport;
34 ARM::FPURestriction Restriction;
36 { "invalid", ARM::FK_INVALID, ARM::FV_NONE, ARM::NS_None, ARM::FR_None},
37 { "none", ARM::FK_NONE, ARM::FV_NONE, ARM::NS_None, ARM::FR_None},
38 { "vfp", ARM::FK_VFP, ARM::FV_VFPV2, ARM::NS_None, ARM::FR_None},
39 { "vfpv2", ARM::FK_VFPV2, ARM::FV_VFPV2, ARM::NS_None, ARM::FR_None},
40 { "vfpv3", ARM::FK_VFPV3, ARM::FV_VFPV3, ARM::NS_None, ARM::FR_None},
41 { "vfpv3-fp16", ARM::FK_VFPV3_FP16, ARM::FV_VFPV3_FP16, ARM::NS_None, ARM::FR_None},
42 { "vfpv3-d16", ARM::FK_VFPV3_D16, ARM::FV_VFPV3, ARM::NS_None, ARM::FR_D16},
43 { "vfpv3-d16-fp16", ARM::FK_VFPV3_D16_FP16, ARM::FV_VFPV3_FP16, ARM::NS_None, ARM::FR_D16},
44 { "vfpv3xd", ARM::FK_VFPV3XD, ARM::FV_VFPV3, ARM::NS_None, ARM::FR_SP_D16},
45 { "vfpv3xd-fp16", ARM::FK_VFPV3XD_FP16, ARM::FV_VFPV3_FP16, ARM::NS_None, ARM::FR_SP_D16},
46 { "vfpv4", ARM::FK_VFPV4, ARM::FV_VFPV4, ARM::NS_None, ARM::FR_None},
47 { "vfpv4-d16", ARM::FK_VFPV4_D16, ARM::FV_VFPV4, ARM::NS_None, ARM::FR_D16},
48 { "fpv4-sp-d16", ARM::FK_FPV4_SP_D16, ARM::FV_VFPV4, ARM::NS_None, ARM::FR_SP_D16},
49 { "fpv5-d16", ARM::FK_FPV5_D16, ARM::FV_VFPV5, ARM::NS_None, ARM::FR_D16},
50 { "fpv5-sp-d16", ARM::FK_FPV5_SP_D16, ARM::FV_VFPV5, ARM::NS_None, ARM::FR_SP_D16},
51 { "fp-armv8", ARM::FK_FP_ARMV8, ARM::FV_VFPV5, ARM::NS_None, ARM::FR_None},
52 { "neon", ARM::FK_NEON, ARM::FV_VFPV3, ARM::NS_Neon, ARM::FR_None},
53 { "neon-fp16", ARM::FK_NEON_FP16, ARM::FV_VFPV3_FP16, ARM::NS_Neon, ARM::FR_None},
54 { "neon-vfpv4", ARM::FK_NEON_VFPV4, ARM::FV_VFPV4, ARM::NS_Neon, ARM::FR_None},
55 { "neon-fp-armv8", ARM::FK_NEON_FP_ARMV8, ARM::FV_VFPV5, ARM::NS_Neon, ARM::FR_None},
56 { "crypto-neon-fp-armv8",
57 ARM::FK_CRYPTO_NEON_FP_ARMV8, ARM::FV_VFPV5, ARM::NS_Crypto, ARM::FR_None},
58 { "softvfp", ARM::FK_SOFTVFP, ARM::FV_NONE, ARM::NS_None, ARM::FR_None},
61 // List of canonical arch names (use getArchSynonym).
62 // This table also provides the build attribute fields for CPU arch
63 // and Arch ID, according to the Addenda to the ARM ABI, chapters
64 // 2.4 and 2.3.5.2 respectively.
65 // FIXME: SubArch values were simplified to fit into the expectations
66 // of the triples and are not conforming with their official names.
67 // Check to see if the expectation should be changed.
68 // FIXME: TableGen this.
72 const char *CPUAttr; // CPU class in build attributes.
73 const char *SubArch; // Sub-Arch name.
74 ARMBuildAttrs::CPUArch ArchAttr; // Arch ID in build attributes.
76 { "invalid", ARM::AK_INVALID, nullptr, nullptr, ARMBuildAttrs::CPUArch::Pre_v4 },
77 { "armv2", ARM::AK_ARMV2, "2", "v2", ARMBuildAttrs::CPUArch::Pre_v4 },
78 { "armv2a", ARM::AK_ARMV2A, "2A", "v2a", ARMBuildAttrs::CPUArch::Pre_v4 },
79 { "armv3", ARM::AK_ARMV3, "3", "v3", ARMBuildAttrs::CPUArch::Pre_v4 },
80 { "armv3m", ARM::AK_ARMV3M, "3M", "v3m", ARMBuildAttrs::CPUArch::Pre_v4 },
81 { "armv4", ARM::AK_ARMV4, "4", "v4", ARMBuildAttrs::CPUArch::v4 },
82 { "armv4t", ARM::AK_ARMV4T, "4T", "v4t", ARMBuildAttrs::CPUArch::v4T },
83 { "armv5t", ARM::AK_ARMV5T, "5T", "v5", ARMBuildAttrs::CPUArch::v5T },
84 { "armv5te", ARM::AK_ARMV5TE, "5TE", "v5e", ARMBuildAttrs::CPUArch::v5TE },
85 { "armv5tej", ARM::AK_ARMV5TEJ, "5TEJ", "v5e", ARMBuildAttrs::CPUArch::v5TEJ },
86 { "armv6", ARM::AK_ARMV6, "6", "v6", ARMBuildAttrs::CPUArch::v6 },
87 { "armv6k", ARM::AK_ARMV6K, "6K", "v6k", ARMBuildAttrs::CPUArch::v6K },
88 { "armv6t2", ARM::AK_ARMV6T2, "6T2", "v6t2", ARMBuildAttrs::CPUArch::v6T2 },
89 { "armv6z", ARM::AK_ARMV6Z, "6Z", "v6z", ARMBuildAttrs::CPUArch::v6KZ },
90 { "armv6zk", ARM::AK_ARMV6ZK, "6ZK", "v6zk", ARMBuildAttrs::CPUArch::v6KZ },
91 { "armv6-m", ARM::AK_ARMV6M, "6-M", "v6m", ARMBuildAttrs::CPUArch::v6_M },
92 { "armv6s-m", ARM::AK_ARMV6SM, "6S-M", "v6sm", ARMBuildAttrs::CPUArch::v6S_M },
93 { "armv7-a", ARM::AK_ARMV7A, "7-A", "v7", ARMBuildAttrs::CPUArch::v7 },
94 { "armv7-r", ARM::AK_ARMV7R, "7-R", "v7r", ARMBuildAttrs::CPUArch::v7 },
95 { "armv7-m", ARM::AK_ARMV7M, "7-M", "v7m", ARMBuildAttrs::CPUArch::v7 },
96 { "armv7e-m", ARM::AK_ARMV7EM, "7E-M", "v7em", ARMBuildAttrs::CPUArch::v7E_M },
97 { "armv8-a", ARM::AK_ARMV8A, "8-A", "v8", ARMBuildAttrs::CPUArch::v8 },
98 { "armv8.1-a", ARM::AK_ARMV8_1A, "8.1-A", "v8.1a", ARMBuildAttrs::CPUArch::v8 },
99 // Non-standard Arch names.
100 { "iwmmxt", ARM::AK_IWMMXT, "iwmmxt", "", ARMBuildAttrs::CPUArch::v5TE },
101 { "iwmmxt2", ARM::AK_IWMMXT2, "iwmmxt2", "", ARMBuildAttrs::CPUArch::v5TE },
102 { "xscale", ARM::AK_XSCALE, "xscale", "", ARMBuildAttrs::CPUArch::v5TE },
103 { "armv5", ARM::AK_ARMV5, "5T", "v5", ARMBuildAttrs::CPUArch::v5T },
104 { "armv5e", ARM::AK_ARMV5E, "5TE", "v5e", ARMBuildAttrs::CPUArch::v5TE },
105 { "armv6j", ARM::AK_ARMV6J, "6J", "v6", ARMBuildAttrs::CPUArch::v6 },
106 { "armv6hl", ARM::AK_ARMV6HL, "6-M", "v6hl", ARMBuildAttrs::CPUArch::v6_M },
107 { "armv7", ARM::AK_ARMV7, "7", "v7", ARMBuildAttrs::CPUArch::v7 },
108 { "armv7l", ARM::AK_ARMV7L, "7-L", "v7l", ARMBuildAttrs::CPUArch::v7 },
109 { "armv7hl", ARM::AK_ARMV7HL, "7-L", "v7hl", ARMBuildAttrs::CPUArch::v7 },
110 { "armv7s", ARM::AK_ARMV7S, "7-S", "v7s", ARMBuildAttrs::CPUArch::v7 }
112 // List of Arch Extension names.
113 // FIXME: TableGen this.
118 { "invalid", ARM::AEK_INVALID },
119 { "crc", ARM::AEK_CRC },
120 { "crypto", ARM::AEK_CRYPTO },
121 { "fp", ARM::AEK_FP },
122 { "idiv", ARM::AEK_HWDIV },
123 { "mp", ARM::AEK_MP },
124 { "simd", ARM::AEK_SIMD },
125 { "sec", ARM::AEK_SEC },
126 { "virt", ARM::AEK_VIRT },
127 { "os", ARM::AEK_OS },
128 { "iwmmxt", ARM::AEK_IWMMXT },
129 { "iwmmxt2", ARM::AEK_IWMMXT2 },
130 { "maverick", ARM::AEK_MAVERICK },
131 { "xscale", ARM::AEK_XSCALE }
133 // List of CPU names and their arches.
134 // The same CPU can have multiple arches and can be default on multiple arches.
135 // When finding the Arch for a CPU, first-found prevails. Sort them accordingly.
136 // When this becomes table-generated, we'd probably need two tables.
137 // FIXME: TableGen this.
140 ARM::ArchKind ArchID;
143 { "arm2", ARM::AK_ARMV2, true },
144 { "arm3", ARM::AK_ARMV2A, true },
145 { "arm6", ARM::AK_ARMV3, true },
146 { "arm7m", ARM::AK_ARMV3M, true },
147 { "arm8", ARM::AK_ARMV4, false },
148 { "arm810", ARM::AK_ARMV4, false },
149 { "strongarm", ARM::AK_ARMV4, true },
150 { "strongarm110", ARM::AK_ARMV4, false },
151 { "strongarm1100", ARM::AK_ARMV4, false },
152 { "strongarm1110", ARM::AK_ARMV4, false },
153 { "arm7tdmi", ARM::AK_ARMV4T, true },
154 { "arm7tdmi-s", ARM::AK_ARMV4T, false },
155 { "arm710t", ARM::AK_ARMV4T, false },
156 { "arm720t", ARM::AK_ARMV4T, false },
157 { "arm9", ARM::AK_ARMV4T, false },
158 { "arm9tdmi", ARM::AK_ARMV4T, false },
159 { "arm920", ARM::AK_ARMV4T, false },
160 { "arm920t", ARM::AK_ARMV4T, false },
161 { "arm922t", ARM::AK_ARMV4T, false },
162 { "arm9312", ARM::AK_ARMV4T, false },
163 { "arm940t", ARM::AK_ARMV4T, false },
164 { "ep9312", ARM::AK_ARMV4T, false },
165 { "arm10tdmi", ARM::AK_ARMV5T, true },
166 { "arm1020t", ARM::AK_ARMV5T, false },
167 { "arm9e", ARM::AK_ARMV5TE, false },
168 { "arm946e-s", ARM::AK_ARMV5TE, false },
169 { "arm966e-s", ARM::AK_ARMV5TE, false },
170 { "arm968e-s", ARM::AK_ARMV5TE, false },
171 { "arm10e", ARM::AK_ARMV5TE, false },
172 { "arm1020e", ARM::AK_ARMV5TE, false },
173 { "arm1022e", ARM::AK_ARMV5TE, true },
174 { "iwmmxt", ARM::AK_ARMV5TE, false },
175 { "xscale", ARM::AK_ARMV5TE, false },
176 { "arm926ej-s", ARM::AK_ARMV5TEJ, true },
177 { "arm1136jf-s", ARM::AK_ARMV6, true },
178 { "arm1176j-s", ARM::AK_ARMV6K, false },
179 { "arm1176jz-s", ARM::AK_ARMV6K, false },
180 { "mpcore", ARM::AK_ARMV6K, false },
181 { "mpcorenovfp", ARM::AK_ARMV6K, false },
182 { "arm1176jzf-s", ARM::AK_ARMV6K, true },
183 { "arm1176jzf-s", ARM::AK_ARMV6Z, true },
184 { "arm1176jzf-s", ARM::AK_ARMV6ZK, true },
185 { "arm1156t2-s", ARM::AK_ARMV6T2, true },
186 { "arm1156t2f-s", ARM::AK_ARMV6T2, false },
187 { "cortex-m0", ARM::AK_ARMV6M, true },
188 { "cortex-m0plus", ARM::AK_ARMV6M, false },
189 { "cortex-m1", ARM::AK_ARMV6M, false },
190 { "sc000", ARM::AK_ARMV6M, false },
191 { "cortex-a5", ARM::AK_ARMV7A, false },
192 { "cortex-a7", ARM::AK_ARMV7A, false },
193 { "cortex-a8", ARM::AK_ARMV7A, true },
194 { "cortex-a9", ARM::AK_ARMV7A, false },
195 { "cortex-a12", ARM::AK_ARMV7A, false },
196 { "cortex-a15", ARM::AK_ARMV7A, false },
197 { "cortex-a17", ARM::AK_ARMV7A, false },
198 { "krait", ARM::AK_ARMV7A, false },
199 { "cortex-r4", ARM::AK_ARMV7R, true },
200 { "cortex-r4f", ARM::AK_ARMV7R, false },
201 { "cortex-r5", ARM::AK_ARMV7R, false },
202 { "cortex-r7", ARM::AK_ARMV7R, false },
203 { "sc300", ARM::AK_ARMV7M, false },
204 { "cortex-m3", ARM::AK_ARMV7M, true },
205 { "cortex-m4", ARM::AK_ARMV7EM, true },
206 { "cortex-m7", ARM::AK_ARMV7EM, false },
207 { "cortex-a53", ARM::AK_ARMV8A, true },
208 { "cortex-a57", ARM::AK_ARMV8A, false },
209 { "cortex-a72", ARM::AK_ARMV8A, false },
210 { "cyclone", ARM::AK_ARMV8A, false },
211 { "generic", ARM::AK_ARMV8_1A, true },
212 // Non-standard Arch names.
213 { "iwmmxt", ARM::AK_IWMMXT, true },
214 { "xscale", ARM::AK_XSCALE, true },
215 { "arm10tdmi", ARM::AK_ARMV5, true },
216 { "arm1022e", ARM::AK_ARMV5E, true },
217 { "arm1136j-s", ARM::AK_ARMV6J, true },
218 { "arm1136jz-s", ARM::AK_ARMV6J, false },
219 { "cortex-m0", ARM::AK_ARMV6SM, true },
220 { "arm1176jzf-s", ARM::AK_ARMV6HL, true },
221 { "cortex-a8", ARM::AK_ARMV7, true },
222 { "cortex-a8", ARM::AK_ARMV7L, true },
223 { "cortex-a8", ARM::AK_ARMV7HL, true },
224 { "cortex-m4", ARM::AK_ARMV7EM, true },
225 { "swift", ARM::AK_ARMV7S, true },
227 { "invalid", ARM::AK_INVALID, true }
232 // ======================================================= //
234 // ======================================================= //
236 const char *ARMTargetParser::getFPUName(unsigned FPUKind) {
237 if (FPUKind >= ARM::FK_LAST)
239 return FPUNames[FPUKind].Name;
242 unsigned ARMTargetParser::getFPUVersion(unsigned FPUKind) {
243 if (FPUKind >= ARM::FK_LAST)
245 return FPUNames[FPUKind].FPUVersion;
248 unsigned ARMTargetParser::getFPUNeonSupportLevel(unsigned FPUKind) {
249 if (FPUKind >= ARM::FK_LAST)
251 return FPUNames[FPUKind].NeonSupport;
254 unsigned ARMTargetParser::getFPURestriction(unsigned FPUKind) {
255 if (FPUKind >= ARM::FK_LAST)
257 return FPUNames[FPUKind].Restriction;
260 bool ARMTargetParser::getFPUFeatures(unsigned FPUKind,
261 std::vector<const char *> &Features) {
263 if (FPUKind >= ARM::FK_LAST || FPUKind == ARM::FK_INVALID)
266 // fp-only-sp and d16 subtarget features are independent of each other, so we
267 // must enable/disable both.
268 switch (FPUNames[FPUKind].Restriction) {
270 Features.push_back("+fp-only-sp");
271 Features.push_back("+d16");
274 Features.push_back("-fp-only-sp");
275 Features.push_back("+d16");
278 Features.push_back("-fp-only-sp");
279 Features.push_back("-d16");
283 // FPU version subtarget features are inclusive of lower-numbered ones, so
284 // enable the one corresponding to this version and disable all that are
285 // higher. We also have to make sure to disable fp16 when vfp4 is disabled,
286 // as +vfp4 implies +fp16 but -vfp4 does not imply -fp16.
287 switch (FPUNames[FPUKind].FPUVersion) {
289 Features.push_back("+fp-armv8");
292 Features.push_back("+vfp4");
293 Features.push_back("-fp-armv8");
295 case ARM::FV_VFPV3_FP16:
296 Features.push_back("+vfp3");
297 Features.push_back("+fp16");
298 Features.push_back("-vfp4");
299 Features.push_back("-fp-armv8");
302 Features.push_back("+vfp3");
303 Features.push_back("-fp16");
304 Features.push_back("-vfp4");
305 Features.push_back("-fp-armv8");
308 Features.push_back("+vfp2");
309 Features.push_back("-vfp3");
310 Features.push_back("-fp16");
311 Features.push_back("-vfp4");
312 Features.push_back("-fp-armv8");
315 Features.push_back("-vfp2");
316 Features.push_back("-vfp3");
317 Features.push_back("-fp16");
318 Features.push_back("-vfp4");
319 Features.push_back("-fp-armv8");
325 // crypto includes neon, so we handle this similarly to FPU version.
326 switch (FPUNames[FPUKind].NeonSupport) {
328 Features.push_back("+crypto");
331 Features.push_back("+neon");
332 Features.push_back("-crypto");
335 Features.push_back("-neon");
336 Features.push_back("-crypto");
343 const char *ARMTargetParser::getArchName(unsigned ArchKind) {
344 if (ArchKind >= ARM::AK_LAST)
346 return ARCHNames[ArchKind].Name;
349 const char *ARMTargetParser::getCPUAttr(unsigned ArchKind) {
350 if (ArchKind >= ARM::AK_LAST)
352 return ARCHNames[ArchKind].CPUAttr;
355 const char *ARMTargetParser::getSubArch(unsigned ArchKind) {
356 if (ArchKind >= ARM::AK_LAST)
358 return ARCHNames[ArchKind].SubArch;
361 unsigned ARMTargetParser::getArchAttr(unsigned ArchKind) {
362 if (ArchKind >= ARM::AK_LAST)
363 return ARMBuildAttrs::CPUArch::Pre_v4;
364 return ARCHNames[ArchKind].ArchAttr;
367 const char *ARMTargetParser::getArchExtName(unsigned ArchExtKind) {
368 if (ArchExtKind >= ARM::AEK_LAST)
370 return ARCHExtNames[ArchExtKind].Name;
373 const char *ARMTargetParser::getDefaultCPU(StringRef Arch) {
374 unsigned AK = parseArch(Arch);
375 if (AK == ARM::AK_INVALID)
378 // Look for multiple AKs to find the default for pair AK+Name.
379 for (const auto CPU : CPUNames) {
380 if (CPU.ArchID == AK && CPU.Default)
386 // ======================================================= //
388 // ======================================================= //
390 StringRef ARMTargetParser::getFPUSynonym(StringRef FPU) {
391 return StringSwitch<StringRef>(FPU)
392 .Cases("fpa", "fpe2", "fpe3", "maverick", "invalid") // Unsupported
393 .Case("vfp2", "vfpv2")
394 .Case("vfp3", "vfpv3")
395 .Case("vfp4", "vfpv4")
396 .Case("vfp3-d16", "vfpv3-d16")
397 .Case("vfp4-d16", "vfpv4-d16")
398 .Cases("fp4-sp-d16", "vfpv4-sp-d16", "fpv4-sp-d16")
399 .Cases("fp4-dp-d16", "fpv4-dp-d16", "vfpv4-d16")
400 .Case("fp5-sp-d16", "fpv5-sp-d16")
401 .Cases("fp5-dp-d16", "fpv5-dp-d16", "fpv5-d16")
402 // FIXME: Clang uses it, but it's bogus, since neon defaults to vfpv3.
403 .Case("neon-vfpv3", "neon")
407 StringRef ARMTargetParser::getArchSynonym(StringRef Arch) {
408 return StringSwitch<StringRef>(Arch)
409 .Case("v6sm", "v6s-m")
414 .Case("v7em", "v7e-m")
415 .Cases("v8", "v8a", "aarch64", "arm64", "v8-a")
416 .Case("v8.1a", "v8.1-a")
420 // MArch is expected to be of the form (arm|thumb)?(eb)?(v.+)?(eb)?, but
421 // (iwmmxt|xscale)(eb)? is also permitted. If the former, return
422 // "v.+", if the latter, return unmodified string, minus 'eb'.
423 // If invalid, return empty string.
424 StringRef ARMTargetParser::getCanonicalArchName(StringRef Arch) {
425 size_t offset = StringRef::npos;
427 StringRef Error = "";
429 // Begins with "arm" / "thumb", move past it.
430 if (A.startswith("arm64"))
432 else if (A.startswith("arm"))
434 else if (A.startswith("thumb"))
436 else if (A.startswith("aarch64")) {
438 // AArch64 uses "_be", not "eb" suffix.
439 if (A.find("eb") != StringRef::npos)
441 if (A.substr(offset,3) == "_be")
445 // Ex. "armebv7", move past the "eb".
446 if (offset != StringRef::npos && A.substr(offset, 2) == "eb")
448 // Or, if it ends with eb ("armv7eb"), chop it off.
449 else if (A.endswith("eb"))
450 A = A.substr(0, A.size() - 2);
452 if (offset != StringRef::npos)
453 A = A.substr(offset);
455 // Empty string means offset reached the end, which means it's valid.
459 // Only match non-marketing names
460 if (offset != StringRef::npos) {
461 // Must start with 'vN'.
462 if (A[0] != 'v' || !std::isdigit(A[1]))
464 // Can't have an extra 'eb'.
465 if (A.find("eb") != StringRef::npos)
469 // Arch will either be a 'v' name (v7a) or a marketing name (xscale).
473 unsigned ARMTargetParser::parseFPU(StringRef FPU) {
474 StringRef Syn = getFPUSynonym(FPU);
475 for (const auto F : FPUNames) {
479 return ARM::FK_INVALID;
482 // Allows partial match, ex. "v7a" matches "armv7a".
483 unsigned ARMTargetParser::parseArch(StringRef Arch) {
484 Arch = getCanonicalArchName(Arch);
485 StringRef Syn = getArchSynonym(Arch);
486 for (const auto A : ARCHNames) {
487 if (StringRef(A.Name).endswith(Syn))
490 return ARM::AK_INVALID;
493 unsigned ARMTargetParser::parseArchExt(StringRef ArchExt) {
494 for (const auto A : ARCHExtNames) {
495 if (ArchExt == A.Name)
498 return ARM::AEK_INVALID;
501 unsigned ARMTargetParser::parseCPUArch(StringRef CPU) {
502 for (const auto C : CPUNames) {
506 return ARM::AK_INVALID;
509 // ARM, Thumb, AArch64
510 unsigned ARMTargetParser::parseArchISA(StringRef Arch) {
511 return StringSwitch<unsigned>(Arch)
512 .StartsWith("aarch64", ARM::IK_AARCH64)
513 .StartsWith("arm64", ARM::IK_AARCH64)
514 .StartsWith("thumb", ARM::IK_THUMB)
515 .StartsWith("arm", ARM::IK_ARM)
516 .Default(ARM::EK_INVALID);
520 unsigned ARMTargetParser::parseArchEndian(StringRef Arch) {
521 if (Arch.startswith("armeb") ||
522 Arch.startswith("thumbeb") ||
523 Arch.startswith("aarch64_be"))
526 if (Arch.startswith("arm") || Arch.startswith("thumb")) {
527 if (Arch.endswith("eb"))
530 return ARM::EK_LITTLE;
533 if (Arch.startswith("aarch64"))
534 return ARM::EK_LITTLE;
536 return ARM::EK_INVALID;
540 unsigned ARMTargetParser::parseArchProfile(StringRef Arch) {
541 Arch = getCanonicalArchName(Arch);
542 switch(parseArch(Arch)) {
545 case ARM::AK_ARMV6SM:
546 case ARM::AK_ARMV7EM:
553 case ARM::AK_ARMV8_1A:
556 return ARM::PK_INVALID;
559 // Version number (ex. v7 = 7).
560 unsigned ARMTargetParser::parseArchVersion(StringRef Arch) {
561 Arch = getCanonicalArchName(Arch);
562 switch(parseArch(Arch)) {
574 case ARM::AK_ARMV5TE:
576 case ARM::AK_IWMMXT2:
579 case ARM::AK_ARMV5TEJ:
584 case ARM::AK_ARMV6T2:
586 case ARM::AK_ARMV6ZK:
588 case ARM::AK_ARMV6SM:
589 case ARM::AK_ARMV6HL:
596 case ARM::AK_ARMV7HL:
598 case ARM::AK_ARMV7EM:
601 case ARM::AK_ARMV8_1A: