1 //===-- TargetParser - Parser for target features ---------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements a target parser to recognise hardware features such as
11 // FPU/CPU/ARCH names as well as specific support such as HDIV, etc.
13 //===----------------------------------------------------------------------===//
15 #include "llvm/Support/ARMBuildAttributes.h"
16 #include "llvm/Support/TargetParser.h"
17 #include "llvm/ADT/StringExtras.h"
18 #include "llvm/ADT/StringSwitch.h"
26 // List of canonical FPU names (use getFPUSynonym) and which architectural
27 // features they correspond to (use getFPUFeatures).
28 // FIXME: TableGen this.
29 // The entries must appear in the order listed in ARM::FPUKind for correct indexing
34 ARM::FPUVersion FPUVersion;
35 ARM::NeonSupportLevel NeonSupport;
36 ARM::FPURestriction Restriction;
38 StringRef getName() const { return StringRef(NameCStr, NameLength); }
40 #define ARM_FPU(NAME, KIND, VERSION, NEON_SUPPORT, RESTRICTION) \
41 { NAME, sizeof(NAME) - 1, KIND, VERSION, NEON_SUPPORT, RESTRICTION },
42 #include "llvm/Support/ARMTargetParser.def"
45 // List of canonical arch names (use getArchSynonym).
46 // This table also provides the build attribute fields for CPU arch
47 // and Arch ID, according to the Addenda to the ARM ABI, chapters
48 // 2.4 and 2.3.5.2 respectively.
49 // FIXME: SubArch values were simplified to fit into the expectations
50 // of the triples and are not conforming with their official names.
51 // Check to see if the expectation should be changed.
52 // FIXME: TableGen this.
57 const char *CPUAttrCStr;
59 const char *SubArchCStr;
61 ARMBuildAttrs::CPUArch ArchAttr; // Arch ID in build attributes.
63 unsigned ArchBaseExtensions;
65 StringRef getName() const { return StringRef(NameCStr, NameLength); }
67 // CPU class in build attributes.
68 StringRef getCPUAttr() const { return StringRef(CPUAttrCStr, CPUAttrLength); }
71 StringRef getSubArch() const { return StringRef(SubArchCStr, SubArchLength); }
73 #define ARM_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU, ARCH_BASE_EXT) \
74 {NAME, sizeof(NAME) - 1, ID, CPU_ATTR, sizeof(CPU_ATTR) - 1, SUB_ARCH, \
75 sizeof(SUB_ARCH) - 1, ARCH_ATTR, ARCH_FPU, ARCH_BASE_EXT},
76 #include "llvm/Support/ARMTargetParser.def"
79 // List of Arch Extension names.
80 // FIXME: TableGen this.
86 StringRef getName() const { return StringRef(NameCStr, NameLength); }
88 #define ARM_ARCH_EXT_NAME(NAME, ID) { NAME, sizeof(NAME) - 1, ID },
89 #include "llvm/Support/ARMTargetParser.def"
92 // List of HWDiv names (use getHWDivSynonym) and which architectural
93 // features they correspond to (use getHWDivFeatures).
94 // FIXME: TableGen this.
100 StringRef getName() const { return StringRef(NameCStr, NameLength); }
102 #define ARM_HW_DIV_NAME(NAME, ID) { NAME, sizeof(NAME) - 1, ID },
103 #include "llvm/Support/ARMTargetParser.def"
106 // List of CPU names and their arches.
107 // The same CPU can have multiple arches and can be default on multiple arches.
108 // When finding the Arch for a CPU, first-found prevails. Sort them accordingly.
109 // When this becomes table-generated, we'd probably need two tables.
110 // FIXME: TableGen this.
111 static const struct {
112 const char *NameCStr;
114 ARM::ArchKind ArchID;
115 bool Default; // is $Name the default CPU for $ArchID ?
116 unsigned DefaultExtensions;
118 StringRef getName() const { return StringRef(NameCStr, NameLength); }
120 #define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \
121 { NAME, sizeof(NAME) - 1, ID, IS_DEFAULT, DEFAULT_EXT },
122 #include "llvm/Support/ARMTargetParser.def"
127 // ======================================================= //
129 // ======================================================= //
131 StringRef llvm::ARM::getFPUName(unsigned FPUKind) {
132 if (FPUKind >= ARM::FK_LAST)
134 return FPUNames[FPUKind].getName();
137 unsigned llvm::ARM::getFPUVersion(unsigned FPUKind) {
138 if (FPUKind >= ARM::FK_LAST)
140 return FPUNames[FPUKind].FPUVersion;
143 unsigned llvm::ARM::getFPUNeonSupportLevel(unsigned FPUKind) {
144 if (FPUKind >= ARM::FK_LAST)
146 return FPUNames[FPUKind].NeonSupport;
149 unsigned llvm::ARM::getFPURestriction(unsigned FPUKind) {
150 if (FPUKind >= ARM::FK_LAST)
152 return FPUNames[FPUKind].Restriction;
155 unsigned llvm::ARM::getDefaultFPU(StringRef CPU, unsigned ArchKind) {
156 if (CPU == "generic")
157 return ARCHNames[ArchKind].DefaultFPU;
159 return StringSwitch<unsigned>(CPU)
160 #define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \
161 .Case(NAME, DEFAULT_FPU)
162 #include "llvm/Support/ARMTargetParser.def"
163 .Default(ARM::FK_INVALID);
166 unsigned llvm::ARM::getDefaultExtensions(StringRef CPU, unsigned ArchKind) {
167 if (CPU == "generic")
168 return ARCHNames[ArchKind].ArchBaseExtensions;
170 return StringSwitch<unsigned>(CPU)
171 #define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \
172 .Case(NAME, ARCHNames[ID].ArchBaseExtensions | DEFAULT_EXT)
173 #include "llvm/Support/ARMTargetParser.def"
174 .Default(ARM::AEK_INVALID);
177 bool llvm::ARM::getHWDivFeatures(unsigned HWDivKind,
178 std::vector<const char *> &Features) {
180 if (HWDivKind == ARM::AEK_INVALID)
183 if (HWDivKind & ARM::AEK_HWDIVARM)
184 Features.push_back("+hwdiv-arm");
186 Features.push_back("-hwdiv-arm");
188 if (HWDivKind & ARM::AEK_HWDIV)
189 Features.push_back("+hwdiv");
191 Features.push_back("-hwdiv");
196 bool llvm::ARM::getExtensionFeatures(unsigned Extensions,
197 std::vector<const char *> &Features) {
199 if (Extensions == ARM::AEK_INVALID)
202 if (Extensions & ARM::AEK_CRC)
203 Features.push_back("+crc");
205 Features.push_back("-crc");
207 if (Extensions & ARM::AEK_DSP)
208 Features.push_back("+dsp");
210 Features.push_back("-dsp");
212 return getHWDivFeatures(Extensions, Features);
215 bool llvm::ARM::getFPUFeatures(unsigned FPUKind,
216 std::vector<const char *> &Features) {
218 if (FPUKind >= ARM::FK_LAST || FPUKind == ARM::FK_INVALID)
221 // fp-only-sp and d16 subtarget features are independent of each other, so we
222 // must enable/disable both.
223 switch (FPUNames[FPUKind].Restriction) {
225 Features.push_back("+fp-only-sp");
226 Features.push_back("+d16");
229 Features.push_back("-fp-only-sp");
230 Features.push_back("+d16");
233 Features.push_back("-fp-only-sp");
234 Features.push_back("-d16");
238 // FPU version subtarget features are inclusive of lower-numbered ones, so
239 // enable the one corresponding to this version and disable all that are
240 // higher. We also have to make sure to disable fp16 when vfp4 is disabled,
241 // as +vfp4 implies +fp16 but -vfp4 does not imply -fp16.
242 switch (FPUNames[FPUKind].FPUVersion) {
244 Features.push_back("+fp-armv8");
247 Features.push_back("+vfp4");
248 Features.push_back("-fp-armv8");
250 case ARM::FV_VFPV3_FP16:
251 Features.push_back("+vfp3");
252 Features.push_back("+fp16");
253 Features.push_back("-vfp4");
254 Features.push_back("-fp-armv8");
257 Features.push_back("+vfp3");
258 Features.push_back("-fp16");
259 Features.push_back("-vfp4");
260 Features.push_back("-fp-armv8");
263 Features.push_back("+vfp2");
264 Features.push_back("-vfp3");
265 Features.push_back("-fp16");
266 Features.push_back("-vfp4");
267 Features.push_back("-fp-armv8");
270 Features.push_back("-vfp2");
271 Features.push_back("-vfp3");
272 Features.push_back("-fp16");
273 Features.push_back("-vfp4");
274 Features.push_back("-fp-armv8");
278 // crypto includes neon, so we handle this similarly to FPU version.
279 switch (FPUNames[FPUKind].NeonSupport) {
281 Features.push_back("+neon");
282 Features.push_back("+crypto");
285 Features.push_back("+neon");
286 Features.push_back("-crypto");
289 Features.push_back("-neon");
290 Features.push_back("-crypto");
297 StringRef llvm::ARM::getArchName(unsigned ArchKind) {
298 if (ArchKind >= ARM::AK_LAST)
300 return ARCHNames[ArchKind].getName();
303 StringRef llvm::ARM::getCPUAttr(unsigned ArchKind) {
304 if (ArchKind >= ARM::AK_LAST)
306 return ARCHNames[ArchKind].getCPUAttr();
309 StringRef llvm::ARM::getSubArch(unsigned ArchKind) {
310 if (ArchKind >= ARM::AK_LAST)
312 return ARCHNames[ArchKind].getSubArch();
315 unsigned llvm::ARM::getArchAttr(unsigned ArchKind) {
316 if (ArchKind >= ARM::AK_LAST)
317 return ARMBuildAttrs::CPUArch::Pre_v4;
318 return ARCHNames[ArchKind].ArchAttr;
321 StringRef llvm::ARM::getArchExtName(unsigned ArchExtKind) {
322 for (const auto AE : ARCHExtNames) {
323 if (ArchExtKind == AE.ID)
329 StringRef llvm::ARM::getHWDivName(unsigned HWDivKind) {
330 for (const auto D : HWDivNames) {
331 if (HWDivKind == D.ID)
337 StringRef llvm::ARM::getDefaultCPU(StringRef Arch) {
338 unsigned AK = parseArch(Arch);
339 if (AK == ARM::AK_INVALID)
342 // Look for multiple AKs to find the default for pair AK+Name.
343 for (const auto CPU : CPUNames) {
344 if (CPU.ArchID == AK && CPU.Default)
345 return CPU.getName();
348 // If we can't find a default then target the architecture instead
352 // ======================================================= //
354 // ======================================================= //
356 static StringRef getHWDivSynonym(StringRef HWDiv) {
357 return StringSwitch<StringRef>(HWDiv)
358 .Case("thumb,arm", "arm,thumb")
362 static StringRef getFPUSynonym(StringRef FPU) {
363 return StringSwitch<StringRef>(FPU)
364 .Cases("fpa", "fpe2", "fpe3", "maverick", "invalid") // Unsupported
365 .Case("vfp2", "vfpv2")
366 .Case("vfp3", "vfpv3")
367 .Case("vfp4", "vfpv4")
368 .Case("vfp3-d16", "vfpv3-d16")
369 .Case("vfp4-d16", "vfpv4-d16")
370 .Cases("fp4-sp-d16", "vfpv4-sp-d16", "fpv4-sp-d16")
371 .Cases("fp4-dp-d16", "fpv4-dp-d16", "vfpv4-d16")
372 .Case("fp5-sp-d16", "fpv5-sp-d16")
373 .Cases("fp5-dp-d16", "fpv5-dp-d16", "fpv5-d16")
374 // FIXME: Clang uses it, but it's bogus, since neon defaults to vfpv3.
375 .Case("neon-vfpv3", "neon")
379 static StringRef getArchSynonym(StringRef Arch) {
380 return StringSwitch<StringRef>(Arch)
384 .Cases("v6m", "v6sm", "v6s-m", "v6-m")
385 .Cases("v7", "v7a", "v7hl", "v7l", "v7-a")
388 .Case("v7em", "v7e-m")
389 .Cases("v8", "v8a", "aarch64", "arm64", "v8-a")
390 .Case("v8.1a", "v8.1-a")
394 // MArch is expected to be of the form (arm|thumb)?(eb)?(v.+)?(eb)?, but
395 // (iwmmxt|xscale)(eb)? is also permitted. If the former, return
396 // "v.+", if the latter, return unmodified string, minus 'eb'.
397 // If invalid, return empty string.
398 StringRef llvm::ARM::getCanonicalArchName(StringRef Arch) {
399 size_t offset = StringRef::npos;
401 StringRef Error = "";
403 // Begins with "arm" / "thumb", move past it.
404 if (A.startswith("arm64"))
406 else if (A.startswith("arm"))
408 else if (A.startswith("thumb"))
410 else if (A.startswith("aarch64")) {
412 // AArch64 uses "_be", not "eb" suffix.
413 if (A.find("eb") != StringRef::npos)
415 if (A.substr(offset, 3) == "_be")
419 // Ex. "armebv7", move past the "eb".
420 if (offset != StringRef::npos && A.substr(offset, 2) == "eb")
422 // Or, if it ends with eb ("armv7eb"), chop it off.
423 else if (A.endswith("eb"))
424 A = A.substr(0, A.size() - 2);
426 if (offset != StringRef::npos)
427 A = A.substr(offset);
429 // Empty string means offset reached the end, which means it's valid.
433 // Only match non-marketing names
434 if (offset != StringRef::npos) {
435 // Must start with 'vN'.
436 if (A[0] != 'v' || !std::isdigit(A[1]))
438 // Can't have an extra 'eb'.
439 if (A.find("eb") != StringRef::npos)
443 // Arch will either be a 'v' name (v7a) or a marketing name (xscale).
447 unsigned llvm::ARM::parseHWDiv(StringRef HWDiv) {
448 StringRef Syn = getHWDivSynonym(HWDiv);
449 for (const auto D : HWDivNames) {
450 if (Syn == D.getName())
453 return ARM::AEK_INVALID;
456 unsigned llvm::ARM::parseFPU(StringRef FPU) {
457 StringRef Syn = getFPUSynonym(FPU);
458 for (const auto F : FPUNames) {
459 if (Syn == F.getName())
462 return ARM::FK_INVALID;
465 // Allows partial match, ex. "v7a" matches "armv7a".
466 unsigned llvm::ARM::parseArch(StringRef Arch) {
467 Arch = getCanonicalArchName(Arch);
468 StringRef Syn = getArchSynonym(Arch);
469 for (const auto A : ARCHNames) {
470 if (A.getName().endswith(Syn))
473 return ARM::AK_INVALID;
476 unsigned llvm::ARM::parseArchExt(StringRef ArchExt) {
477 for (const auto A : ARCHExtNames) {
478 if (ArchExt == A.getName())
481 return ARM::AEK_INVALID;
484 unsigned llvm::ARM::parseCPUArch(StringRef CPU) {
485 for (const auto C : CPUNames) {
486 if (CPU == C.getName())
489 return ARM::AK_INVALID;
492 // ARM, Thumb, AArch64
493 unsigned llvm::ARM::parseArchISA(StringRef Arch) {
494 return StringSwitch<unsigned>(Arch)
495 .StartsWith("aarch64", ARM::IK_AARCH64)
496 .StartsWith("arm64", ARM::IK_AARCH64)
497 .StartsWith("thumb", ARM::IK_THUMB)
498 .StartsWith("arm", ARM::IK_ARM)
499 .Default(ARM::EK_INVALID);
503 unsigned llvm::ARM::parseArchEndian(StringRef Arch) {
504 if (Arch.startswith("armeb") || Arch.startswith("thumbeb") ||
505 Arch.startswith("aarch64_be"))
508 if (Arch.startswith("arm") || Arch.startswith("thumb")) {
509 if (Arch.endswith("eb"))
512 return ARM::EK_LITTLE;
515 if (Arch.startswith("aarch64"))
516 return ARM::EK_LITTLE;
518 return ARM::EK_INVALID;
522 unsigned llvm::ARM::parseArchProfile(StringRef Arch) {
523 Arch = getCanonicalArchName(Arch);
524 switch (parseArch(Arch)) {
527 case ARM::AK_ARMV7EM:
534 case ARM::AK_ARMV8_1A:
537 return ARM::PK_INVALID;
540 // Version number (ex. v7 = 7).
541 unsigned llvm::ARM::parseArchVersion(StringRef Arch) {
542 Arch = getCanonicalArchName(Arch);
543 switch (parseArch(Arch)) {
554 case ARM::AK_ARMV5TE:
556 case ARM::AK_IWMMXT2:
558 case ARM::AK_ARMV5TEJ:
563 case ARM::AK_ARMV6T2:
565 case ARM::AK_ARMV6ZK:
572 case ARM::AK_ARMV7EM:
576 case ARM::AK_ARMV8_1A: