1 //===-- RuntimeDyldMachO.cpp - Run-time dynamic linker for MC-JIT -*- C++ -*-=//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Implementation of the MC-JIT runtime dynamic linker.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "dyld"
15 #include "llvm/ADT/OwningPtr.h"
16 #include "llvm/ADT/StringRef.h"
17 #include "llvm/ADT/STLExtras.h"
18 #include "RuntimeDyldMachO.h"
20 using namespace llvm::object;
24 void RuntimeDyldMachO::resolveRelocation(uint8_t *LocalAddress,
25 uint64_t FinalAddress,
29 bool isPCRel = (Type >> 24) & 1;
30 unsigned MachoType = (Type >> 28) & 0xf;
31 unsigned Size = 1 << ((Type >> 25) & 3);
33 DEBUG(dbgs() << "resolveRelocation LocalAddress: " << format("%p", LocalAddress)
34 << " FinalAddress: " << format("%p", FinalAddress)
35 << " Value: " << format("%p", Value)
36 << " Addend: " << Addend
37 << " isPCRel: " << isPCRel
38 << " MachoType: " << MachoType
42 // This just dispatches to the proper target specific routine.
44 default: llvm_unreachable("Unsupported CPU type!");
46 resolveX86_64Relocation(LocalAddress,
55 resolveI386Relocation(LocalAddress,
63 case Triple::arm: // Fall through.
65 resolveARMRelocation(LocalAddress,
76 bool RuntimeDyldMachO::
77 resolveI386Relocation(uint8_t *LocalAddress,
78 uint64_t FinalAddress,
85 Value -= FinalAddress + 4; // see resolveX86_64Relocation
89 llvm_unreachable("Invalid relocation type!");
90 case macho::RIT_Vanilla: {
91 uint8_t *p = LocalAddress;
92 uint64_t ValueToWrite = Value + Addend;
93 for (unsigned i = 0; i < Size; ++i) {
94 *p++ = (uint8_t)(ValueToWrite & 0xff);
98 case macho::RIT_Difference:
99 case macho::RIT_Generic_LocalDifference:
100 case macho::RIT_Generic_PreboundLazyPointer:
101 return Error("Relocation type not implemented yet!");
105 bool RuntimeDyldMachO::
106 resolveX86_64Relocation(uint8_t *LocalAddress,
107 uint64_t FinalAddress,
113 // If the relocation is PC-relative, the value to be encoded is the
114 // pointer difference.
116 // FIXME: It seems this value needs to be adjusted by 4 for an effective PC
117 // address. Is that expected? Only for branches, perhaps?
118 Value -= FinalAddress + 4;
122 llvm_unreachable("Invalid relocation type!");
123 case macho::RIT_X86_64_Signed1:
124 case macho::RIT_X86_64_Signed2:
125 case macho::RIT_X86_64_Signed4:
126 case macho::RIT_X86_64_Signed:
127 case macho::RIT_X86_64_Unsigned:
128 case macho::RIT_X86_64_Branch: {
130 // Mask in the target value a byte at a time (we don't have an alignment
131 // guarantee for the target address, so this is safest).
132 uint8_t *p = (uint8_t*)LocalAddress;
133 for (unsigned i = 0; i < Size; ++i) {
134 *p++ = (uint8_t)Value;
139 case macho::RIT_X86_64_GOTLoad:
140 case macho::RIT_X86_64_GOT:
141 case macho::RIT_X86_64_Subtractor:
142 case macho::RIT_X86_64_TLV:
143 return Error("Relocation type not implemented yet!");
147 bool RuntimeDyldMachO::
148 resolveARMRelocation(uint8_t *LocalAddress,
149 uint64_t FinalAddress,
155 // If the relocation is PC-relative, the value to be encoded is the
156 // pointer difference.
158 Value -= FinalAddress;
159 // ARM PCRel relocations have an effective-PC offset of two instructions
160 // (four bytes in Thumb mode, 8 bytes in ARM mode).
161 // FIXME: For now, assume ARM mode.
167 llvm_unreachable("Invalid relocation type!");
168 case macho::RIT_Vanilla: {
169 // Mask in the target value a byte at a time (we don't have an alignment
170 // guarantee for the target address, so this is safest).
171 uint8_t *p = (uint8_t*)LocalAddress;
172 for (unsigned i = 0; i < Size; ++i) {
173 *p++ = (uint8_t)Value;
178 case macho::RIT_ARM_Branch24Bit: {
179 // Mask the value into the target address. We know instructions are
180 // 32-bit aligned, so we can do it all at once.
181 uint32_t *p = (uint32_t*)LocalAddress;
182 // The low two bits of the value are not encoded.
184 // Mask the value to 24 bits.
186 // FIXME: If the destination is a Thumb function (and the instruction
187 // is a non-predicated BL instruction), we need to change it to a BLX
188 // instruction instead.
190 // Insert the value into the instruction.
191 *p = (*p & ~0xffffff) | Value;
194 case macho::RIT_ARM_ThumbBranch22Bit:
195 case macho::RIT_ARM_ThumbBranch32Bit:
196 case macho::RIT_ARM_Half:
197 case macho::RIT_ARM_HalfDifference:
198 case macho::RIT_Pair:
199 case macho::RIT_Difference:
200 case macho::RIT_ARM_LocalDifference:
201 case macho::RIT_ARM_PreboundLazyPointer:
202 return Error("Relocation type not implemented yet!");
207 void RuntimeDyldMachO::processRelocationRef(const ObjRelocationInfo &Rel,
209 ObjSectionToIDMap &ObjSectionToID,
210 LocalSymbolMap &Symbols,
213 uint32_t RelType = (uint32_t) (Rel.Type & 0xffffffffL);
214 RelocationValueRef Value;
215 SectionEntry &Section = Sections[Rel.SectionID];
216 uint8_t *Target = Section.Address + Rel.Offset;
218 bool isExtern = (RelType >> 27) & 1;
220 StringRef TargetName;
221 const SymbolRef &Symbol = Rel.Symbol;
222 Symbol.getName(TargetName);
223 // First look the symbol in object file symbols.
224 LocalSymbolMap::iterator lsi = Symbols.find(TargetName.data());
225 if (lsi != Symbols.end()) {
226 Value.SectionID = lsi->second.first;
227 Value.Addend = lsi->second.second;
229 // Second look the symbol in global symbol table.
230 StringMap<SymbolLoc>::iterator gsi = SymbolTable.find(TargetName.data());
231 if (gsi != SymbolTable.end()) {
232 Value.SectionID = gsi->second.first;
233 Value.Addend = gsi->second.second;
235 Value.SymbolName = TargetName.data();
239 uint8_t sectionIndex = static_cast<uint8_t>(RelType & 0xFF);
240 section_iterator si = Obj.begin_sections(),
241 se = Obj.end_sections();
242 for (uint8_t i = 1; i < sectionIndex; i++) {
248 assert(si != se && "No section containing relocation!");
249 Value.SectionID = findOrEmitSection(Obj, *si, true, ObjSectionToID);
250 Value.Addend = *(const intptr_t *)Target;
252 // The MachO addend is offset from the current section, we need set it
253 // as offset from destination section
254 Value.Addend += Section.ObjAddress - Sections[Value.SectionID].ObjAddress;
258 if (Arch == Triple::arm && RelType == macho::RIT_ARM_Branch24Bit) {
259 // This is an ARM branch relocation, need to use a stub function.
261 // Look up for existing stub.
262 StubMap::const_iterator i = Stubs.find(Value);
263 if (i != Stubs.end())
264 resolveRelocation(Target, (uint64_t)Target,
265 (uint64_t)Section.Address + i->second,
268 // Create a new stub function.
269 Stubs[Value] = Section.StubOffset;
270 uint8_t *StubTargetAddr = createStubFunction(Section.Address +
272 AddRelocation(Value, Rel.SectionID, StubTargetAddr - Section.Address,
274 resolveRelocation(Target, (uint64_t)Target,
275 (uint64_t)Section.Address + Section.StubOffset,
277 Section.StubOffset += getMaxStubSize();
280 AddRelocation(Value, Rel.SectionID, Rel.Offset, RelType);
284 bool RuntimeDyldMachO::isCompatibleFormat(const MemoryBuffer *InputBuffer) const {
285 StringRef Magic = InputBuffer->getBuffer().slice(0, 4);
286 if (Magic == "\xFE\xED\xFA\xCE") return true;
287 if (Magic == "\xCE\xFA\xED\xFE") return true;
288 if (Magic == "\xFE\xED\xFA\xCF") return true;
289 if (Magic == "\xCF\xFA\xED\xFE") return true;
293 } // end namespace llvm