1 //===-- llvm/CodeGen/VirtRegMap.h - Virtual Register Map -*- C++ -*--------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements a virtual register map. This maps virtual registers to
11 // physical registers and virtual registers to stack slots. It is created and
12 // updated by a register allocator and then used by a machine code rewriter that
13 // adds spill code and rewrites virtual into physical register references.
15 //===----------------------------------------------------------------------===//
17 #ifndef LLVM_CODEGEN_VIRTREGMAP_H
18 #define LLVM_CODEGEN_VIRTREGMAP_H
20 #include "llvm/CodeGen/MachineFunctionPass.h"
21 #include "llvm/CodeGen/LiveInterval.h"
22 #include "llvm/Target/TargetRegisterInfo.h"
23 #include "llvm/ADT/BitVector.h"
24 #include "llvm/ADT/DenseMap.h"
25 #include "llvm/ADT/IndexedMap.h"
26 #include "llvm/ADT/SmallPtrSet.h"
27 #include "llvm/ADT/SmallVector.h"
33 class MachineFunction;
34 class MachineRegisterInfo;
35 class TargetInstrInfo;
36 class TargetRegisterInfo;
39 class VirtRegMap : public MachineFunctionPass {
43 NO_STACK_SLOT = (1L << 30)-1,
44 MAX_STACK_SLOT = (1L << 18)-1
47 enum ModRef { isRef = 1, isMod = 2, isModRef = 3 };
48 typedef std::multimap<MachineInstr*,
49 std::pair<unsigned, ModRef> > MI2VirtMapTy;
52 MachineRegisterInfo *MRI;
53 const TargetInstrInfo *TII;
54 const TargetRegisterInfo *TRI;
57 DenseMap<const TargetRegisterClass*, BitVector> allocatableRCRegs;
59 /// Virt2PhysMap - This is a virtual to physical register
60 /// mapping. Each virtual register is required to have an entry in
61 /// it; even spilled virtual registers (the register mapped to a
62 /// spilled register is the temporary used to load it from the
64 IndexedMap<unsigned, VirtReg2IndexFunctor> Virt2PhysMap;
66 /// Virt2StackSlotMap - This is virtual register to stack slot
67 /// mapping. Each spilled virtual register has an entry in it
68 /// which corresponds to the stack slot this register is spilled
70 IndexedMap<int, VirtReg2IndexFunctor> Virt2StackSlotMap;
72 /// Virt2ReMatIdMap - This is virtual register to rematerialization id
73 /// mapping. Each spilled virtual register that should be remat'd has an
74 /// entry in it which corresponds to the remat id.
75 IndexedMap<int, VirtReg2IndexFunctor> Virt2ReMatIdMap;
77 /// Virt2SplitMap - This is virtual register to splitted virtual register
79 IndexedMap<unsigned, VirtReg2IndexFunctor> Virt2SplitMap;
81 /// Virt2SplitKillMap - This is splitted virtual register to its last use
82 /// (kill) index mapping.
83 IndexedMap<SlotIndex> Virt2SplitKillMap;
85 /// ReMatMap - This is virtual register to re-materialized instruction
86 /// mapping. Each virtual register whose definition is going to be
87 /// re-materialized has an entry in it.
88 IndexedMap<MachineInstr*, VirtReg2IndexFunctor> ReMatMap;
90 /// MI2VirtMap - This is MachineInstr to virtual register
91 /// mapping. In the case of memory spill code being folded into
92 /// instructions, we need to know which virtual register was
93 /// read/written by this instruction.
94 MI2VirtMapTy MI2VirtMap;
96 /// SpillPt2VirtMap - This records the virtual registers which should
97 /// be spilled right after the MachineInstr due to live interval
99 std::map<MachineInstr*, std::vector<std::pair<unsigned,bool> > >
102 /// RestorePt2VirtMap - This records the virtual registers which should
103 /// be restored right before the MachineInstr due to live interval
105 std::map<MachineInstr*, std::vector<unsigned> > RestorePt2VirtMap;
107 /// EmergencySpillMap - This records the physical registers that should
108 /// be spilled / restored around the MachineInstr since the register
109 /// allocator has run out of registers.
110 std::map<MachineInstr*, std::vector<unsigned> > EmergencySpillMap;
112 /// EmergencySpillSlots - This records emergency spill slots used to
113 /// spill physical registers when the register allocator runs out of
114 /// registers. Ideally only one stack slot is used per function per
116 std::map<const TargetRegisterClass*, int> EmergencySpillSlots;
118 /// ReMatId - Instead of assigning a stack slot to a to be rematerialized
119 /// virtual register, an unique id is being assigned. This keeps track of
120 /// the highest id used so far. Note, this starts at (1<<18) to avoid
121 /// conflicts with stack slot numbers.
124 /// LowSpillSlot, HighSpillSlot - Lowest and highest spill slot indexes.
125 int LowSpillSlot, HighSpillSlot;
127 /// SpillSlotToUsesMap - Records uses for each register spill slot.
128 SmallVector<SmallPtrSet<MachineInstr*, 4>, 8> SpillSlotToUsesMap;
130 /// ImplicitDefed - One bit for each virtual register. If set it indicates
131 /// the register is implicitly defined.
132 BitVector ImplicitDefed;
134 /// UnusedRegs - A list of physical registers that have not been used.
135 BitVector UnusedRegs;
137 /// createSpillSlot - Allocate a spill slot for RC from MFI.
138 unsigned createSpillSlot(const TargetRegisterClass *RC);
140 VirtRegMap(const VirtRegMap&); // DO NOT IMPLEMENT
141 void operator=(const VirtRegMap&); // DO NOT IMPLEMENT
145 VirtRegMap() : MachineFunctionPass(ID), Virt2PhysMap(NO_PHYS_REG),
146 Virt2StackSlotMap(NO_STACK_SLOT),
147 Virt2ReMatIdMap(NO_STACK_SLOT), Virt2SplitMap(0),
148 Virt2SplitKillMap(SlotIndex()), ReMatMap(NULL),
149 ReMatId(MAX_STACK_SLOT+1),
150 LowSpillSlot(NO_STACK_SLOT), HighSpillSlot(NO_STACK_SLOT) { }
151 virtual bool runOnMachineFunction(MachineFunction &MF);
153 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
154 AU.setPreservesAll();
155 MachineFunctionPass::getAnalysisUsage(AU);
158 MachineFunction &getMachineFunction() const {
159 assert(MF && "getMachineFunction called before runOnMAchineFunction");
165 /// @brief returns true if the specified virtual register is
166 /// mapped to a physical register
167 bool hasPhys(unsigned virtReg) const {
168 return getPhys(virtReg) != NO_PHYS_REG;
171 /// @brief returns the physical register mapped to the specified
173 unsigned getPhys(unsigned virtReg) const {
174 assert(TargetRegisterInfo::isVirtualRegister(virtReg));
175 return Virt2PhysMap[virtReg];
178 /// @brief creates a mapping for the specified virtual register to
179 /// the specified physical register
180 void assignVirt2Phys(unsigned virtReg, unsigned physReg) {
181 assert(TargetRegisterInfo::isVirtualRegister(virtReg) &&
182 TargetRegisterInfo::isPhysicalRegister(physReg));
183 assert(Virt2PhysMap[virtReg] == NO_PHYS_REG &&
184 "attempt to assign physical register to already mapped "
186 Virt2PhysMap[virtReg] = physReg;
189 /// @brief clears the specified virtual register's, physical
191 void clearVirt(unsigned virtReg) {
192 assert(TargetRegisterInfo::isVirtualRegister(virtReg));
193 assert(Virt2PhysMap[virtReg] != NO_PHYS_REG &&
194 "attempt to clear a not assigned virtual register");
195 Virt2PhysMap[virtReg] = NO_PHYS_REG;
198 /// @brief clears all virtual to physical register mappings
199 void clearAllVirt() {
200 Virt2PhysMap.clear();
204 /// @brief returns the register allocation preference.
205 unsigned getRegAllocPref(unsigned virtReg);
207 /// @brief records virtReg is a split live interval from SReg.
208 void setIsSplitFromReg(unsigned virtReg, unsigned SReg) {
209 Virt2SplitMap[virtReg] = SReg;
212 /// @brief returns the live interval virtReg is split from.
213 unsigned getPreSplitReg(unsigned virtReg) {
214 return Virt2SplitMap[virtReg];
217 /// @brief returns true if the specified virtual register is not
218 /// mapped to a stack slot or rematerialized.
219 bool isAssignedReg(unsigned virtReg) const {
220 if (getStackSlot(virtReg) == NO_STACK_SLOT &&
221 getReMatId(virtReg) == NO_STACK_SLOT)
223 // Split register can be assigned a physical register as well as a
224 // stack slot or remat id.
225 return (Virt2SplitMap[virtReg] && Virt2PhysMap[virtReg] != NO_PHYS_REG);
228 /// @brief returns the stack slot mapped to the specified virtual
230 int getStackSlot(unsigned virtReg) const {
231 assert(TargetRegisterInfo::isVirtualRegister(virtReg));
232 return Virt2StackSlotMap[virtReg];
235 /// @brief returns the rematerialization id mapped to the specified virtual
237 int getReMatId(unsigned virtReg) const {
238 assert(TargetRegisterInfo::isVirtualRegister(virtReg));
239 return Virt2ReMatIdMap[virtReg];
242 /// @brief create a mapping for the specifed virtual register to
243 /// the next available stack slot
244 int assignVirt2StackSlot(unsigned virtReg);
245 /// @brief create a mapping for the specified virtual register to
246 /// the specified stack slot
247 void assignVirt2StackSlot(unsigned virtReg, int frameIndex);
249 /// @brief assign an unique re-materialization id to the specified
250 /// virtual register.
251 int assignVirtReMatId(unsigned virtReg);
252 /// @brief assign an unique re-materialization id to the specified
253 /// virtual register.
254 void assignVirtReMatId(unsigned virtReg, int id);
256 /// @brief returns true if the specified virtual register is being
258 bool isReMaterialized(unsigned virtReg) const {
259 return ReMatMap[virtReg] != NULL;
262 /// @brief returns the original machine instruction being re-issued
263 /// to re-materialize the specified virtual register.
264 MachineInstr *getReMaterializedMI(unsigned virtReg) const {
265 return ReMatMap[virtReg];
268 /// @brief records the specified virtual register will be
269 /// re-materialized and the original instruction which will be re-issed
270 /// for this purpose. If parameter all is true, then all uses of the
271 /// registers are rematerialized and it's safe to delete the definition.
272 void setVirtIsReMaterialized(unsigned virtReg, MachineInstr *def) {
273 ReMatMap[virtReg] = def;
276 /// @brief record the last use (kill) of a split virtual register.
277 void addKillPoint(unsigned virtReg, SlotIndex index) {
278 Virt2SplitKillMap[virtReg] = index;
281 SlotIndex getKillPoint(unsigned virtReg) const {
282 return Virt2SplitKillMap[virtReg];
285 /// @brief remove the last use (kill) of a split virtual register.
286 void removeKillPoint(unsigned virtReg) {
287 Virt2SplitKillMap[virtReg] = SlotIndex();
290 /// @brief returns true if the specified MachineInstr is a spill point.
291 bool isSpillPt(MachineInstr *Pt) const {
292 return SpillPt2VirtMap.find(Pt) != SpillPt2VirtMap.end();
295 /// @brief returns the virtual registers that should be spilled due to
296 /// splitting right after the specified MachineInstr.
297 std::vector<std::pair<unsigned,bool> > &getSpillPtSpills(MachineInstr *Pt) {
298 return SpillPt2VirtMap[Pt];
301 /// @brief records the specified MachineInstr as a spill point for virtReg.
302 void addSpillPoint(unsigned virtReg, bool isKill, MachineInstr *Pt) {
303 std::map<MachineInstr*, std::vector<std::pair<unsigned,bool> > >::iterator
304 I = SpillPt2VirtMap.find(Pt);
305 if (I != SpillPt2VirtMap.end())
306 I->second.push_back(std::make_pair(virtReg, isKill));
308 std::vector<std::pair<unsigned,bool> > Virts;
309 Virts.push_back(std::make_pair(virtReg, isKill));
310 SpillPt2VirtMap.insert(std::make_pair(Pt, Virts));
314 /// @brief - transfer spill point information from one instruction to
316 void transferSpillPts(MachineInstr *Old, MachineInstr *New) {
317 std::map<MachineInstr*, std::vector<std::pair<unsigned,bool> > >::iterator
318 I = SpillPt2VirtMap.find(Old);
319 if (I == SpillPt2VirtMap.end())
321 while (!I->second.empty()) {
322 unsigned virtReg = I->second.back().first;
323 bool isKill = I->second.back().second;
324 I->second.pop_back();
325 addSpillPoint(virtReg, isKill, New);
327 SpillPt2VirtMap.erase(I);
330 /// @brief returns true if the specified MachineInstr is a restore point.
331 bool isRestorePt(MachineInstr *Pt) const {
332 return RestorePt2VirtMap.find(Pt) != RestorePt2VirtMap.end();
335 /// @brief returns the virtual registers that should be restoreed due to
336 /// splitting right after the specified MachineInstr.
337 std::vector<unsigned> &getRestorePtRestores(MachineInstr *Pt) {
338 return RestorePt2VirtMap[Pt];
341 /// @brief records the specified MachineInstr as a restore point for virtReg.
342 void addRestorePoint(unsigned virtReg, MachineInstr *Pt) {
343 std::map<MachineInstr*, std::vector<unsigned> >::iterator I =
344 RestorePt2VirtMap.find(Pt);
345 if (I != RestorePt2VirtMap.end())
346 I->second.push_back(virtReg);
348 std::vector<unsigned> Virts;
349 Virts.push_back(virtReg);
350 RestorePt2VirtMap.insert(std::make_pair(Pt, Virts));
354 /// @brief - transfer restore point information from one instruction to
356 void transferRestorePts(MachineInstr *Old, MachineInstr *New) {
357 std::map<MachineInstr*, std::vector<unsigned> >::iterator I =
358 RestorePt2VirtMap.find(Old);
359 if (I == RestorePt2VirtMap.end())
361 while (!I->second.empty()) {
362 unsigned virtReg = I->second.back();
363 I->second.pop_back();
364 addRestorePoint(virtReg, New);
366 RestorePt2VirtMap.erase(I);
369 /// @brief records that the specified physical register must be spilled
370 /// around the specified machine instr.
371 void addEmergencySpill(unsigned PhysReg, MachineInstr *MI) {
372 if (EmergencySpillMap.find(MI) != EmergencySpillMap.end())
373 EmergencySpillMap[MI].push_back(PhysReg);
375 std::vector<unsigned> PhysRegs;
376 PhysRegs.push_back(PhysReg);
377 EmergencySpillMap.insert(std::make_pair(MI, PhysRegs));
381 /// @brief returns true if one or more physical registers must be spilled
382 /// around the specified instruction.
383 bool hasEmergencySpills(MachineInstr *MI) const {
384 return EmergencySpillMap.find(MI) != EmergencySpillMap.end();
387 /// @brief returns the physical registers to be spilled and restored around
389 std::vector<unsigned> &getEmergencySpills(MachineInstr *MI) {
390 return EmergencySpillMap[MI];
393 /// @brief - transfer emergency spill information from one instruction to
395 void transferEmergencySpills(MachineInstr *Old, MachineInstr *New) {
396 std::map<MachineInstr*,std::vector<unsigned> >::iterator I =
397 EmergencySpillMap.find(Old);
398 if (I == EmergencySpillMap.end())
400 while (!I->second.empty()) {
401 unsigned virtReg = I->second.back();
402 I->second.pop_back();
403 addEmergencySpill(virtReg, New);
405 EmergencySpillMap.erase(I);
408 /// @brief return or get a emergency spill slot for the register class.
409 int getEmergencySpillSlot(const TargetRegisterClass *RC);
411 /// @brief Return lowest spill slot index.
412 int getLowSpillSlot() const {
416 /// @brief Return highest spill slot index.
417 int getHighSpillSlot() const {
418 return HighSpillSlot;
421 /// @brief Records a spill slot use.
422 void addSpillSlotUse(int FrameIndex, MachineInstr *MI);
424 /// @brief Returns true if spill slot has been used.
425 bool isSpillSlotUsed(int FrameIndex) const {
426 assert(FrameIndex >= 0 && "Spill slot index should not be negative!");
427 return !SpillSlotToUsesMap[FrameIndex-LowSpillSlot].empty();
430 /// @brief Mark the specified register as being implicitly defined.
431 void setIsImplicitlyDefined(unsigned VirtReg) {
432 ImplicitDefed.set(VirtReg-TargetRegisterInfo::FirstVirtualRegister);
435 /// @brief Returns true if the virtual register is implicitly defined.
436 bool isImplicitlyDefined(unsigned VirtReg) const {
437 return ImplicitDefed[VirtReg-TargetRegisterInfo::FirstVirtualRegister];
440 /// @brief Updates information about the specified virtual register's value
441 /// folded into newMI machine instruction.
442 void virtFolded(unsigned VirtReg, MachineInstr *OldMI, MachineInstr *NewMI,
445 /// @brief Updates information about the specified virtual register's value
446 /// folded into the specified machine instruction.
447 void virtFolded(unsigned VirtReg, MachineInstr *MI, ModRef MRInfo);
449 /// @brief returns the virtual registers' values folded in memory
450 /// operands of this instruction
451 std::pair<MI2VirtMapTy::const_iterator, MI2VirtMapTy::const_iterator>
452 getFoldedVirts(MachineInstr* MI) const {
453 return MI2VirtMap.equal_range(MI);
456 /// RemoveMachineInstrFromMaps - MI is being erased, remove it from the
457 /// the folded instruction map and spill point map.
458 void RemoveMachineInstrFromMaps(MachineInstr *MI);
460 /// FindUnusedRegisters - Gather a list of allocatable registers that
461 /// have not been allocated to any virtual register.
462 bool FindUnusedRegisters(LiveIntervals* LIs);
464 /// HasUnusedRegisters - Return true if there are any allocatable registers
465 /// that have not been allocated to any virtual register.
466 bool HasUnusedRegisters() const {
467 return !UnusedRegs.none();
470 /// setRegisterUsed - Remember the physical register is now used.
471 void setRegisterUsed(unsigned Reg) {
472 UnusedRegs.reset(Reg);
475 /// isRegisterUnused - Return true if the physical register has not been
477 bool isRegisterUnused(unsigned Reg) const {
478 return UnusedRegs[Reg];
481 /// getFirstUnusedRegister - Return the first physical register that has not
483 unsigned getFirstUnusedRegister(const TargetRegisterClass *RC) {
484 int Reg = UnusedRegs.find_first();
486 if (allocatableRCRegs[RC][Reg])
487 return (unsigned)Reg;
488 Reg = UnusedRegs.find_next(Reg);
493 void print(raw_ostream &OS, const Module* M = 0) const;
497 inline raw_ostream &operator<<(raw_ostream &OS, const VirtRegMap &VRM) {
501 } // End llvm namespace