1 //===-- llvm/CodeGen/VirtRegMap.cpp - Virtual Register Map ----------------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the VirtRegMap class.
12 // It also contains implementations of the the Spiller interface, which, given a
13 // virtual register map and a machine function, eliminates all virtual
14 // references by replacing them with physical register references - adding spill
17 //===----------------------------------------------------------------------===//
19 #define DEBUG_TYPE "spiller"
20 #include "VirtRegMap.h"
21 #include "llvm/Function.h"
22 #include "llvm/CodeGen/MachineFrameInfo.h"
23 #include "llvm/CodeGen/MachineFunction.h"
24 #include "llvm/CodeGen/SSARegMap.h"
25 #include "llvm/Target/TargetMachine.h"
26 #include "llvm/Target/TargetInstrInfo.h"
27 #include "llvm/Support/CommandLine.h"
28 #include "llvm/Support/Debug.h"
29 #include "llvm/ADT/Statistic.h"
30 #include "llvm/ADT/STLExtras.h"
34 Statistic<> NumSpills("spiller", "Number of register spills");
35 Statistic<> NumStores("spiller", "Number of stores added");
36 Statistic<> NumLoads ("spiller", "Number of loads added");
37 Statistic<> NumReused("spiller", "Number of values reused");
38 Statistic<> NumDSE ("spiller", "Number of dead stores elided");
40 enum SpillerName { simple, local };
44 cl::desc("Spiller to use: (default: local)"),
46 cl::values(clEnumVal(simple, " simple spiller"),
47 clEnumVal(local, " local spiller"),
52 //===----------------------------------------------------------------------===//
53 // VirtRegMap implementation
54 //===----------------------------------------------------------------------===//
56 void VirtRegMap::grow() {
57 Virt2PhysMap.grow(MF.getSSARegMap()->getLastVirtReg());
58 Virt2StackSlotMap.grow(MF.getSSARegMap()->getLastVirtReg());
61 int VirtRegMap::assignVirt2StackSlot(unsigned virtReg) {
62 assert(MRegisterInfo::isVirtualRegister(virtReg));
63 assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT &&
64 "attempt to assign stack slot to already spilled register");
65 const TargetRegisterClass* RC = MF.getSSARegMap()->getRegClass(virtReg);
66 int frameIndex = MF.getFrameInfo()->CreateStackObject(RC->getSize(),
68 Virt2StackSlotMap[virtReg] = frameIndex;
73 void VirtRegMap::assignVirt2StackSlot(unsigned virtReg, int frameIndex) {
74 assert(MRegisterInfo::isVirtualRegister(virtReg));
75 assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT &&
76 "attempt to assign stack slot to already spilled register");
77 Virt2StackSlotMap[virtReg] = frameIndex;
80 void VirtRegMap::virtFolded(unsigned VirtReg, MachineInstr *OldMI,
81 unsigned OpNo, MachineInstr *NewMI) {
82 // Move previous memory references folded to new instruction.
83 MI2VirtMapTy::iterator IP = MI2VirtMap.lower_bound(NewMI);
84 for (MI2VirtMapTy::iterator I = MI2VirtMap.lower_bound(OldMI),
85 E = MI2VirtMap.end(); I != E && I->first == OldMI; ) {
86 MI2VirtMap.insert(IP, std::make_pair(NewMI, I->second));
87 MI2VirtMap.erase(I++);
91 if (!OldMI->getOperand(OpNo).isDef()) {
92 assert(OldMI->getOperand(OpNo).isUse() && "Operand is not use or def?");
95 MRInfo = OldMI->getOperand(OpNo).isUse() ? isModRef : isMod;
98 // add new memory reference
99 MI2VirtMap.insert(IP, std::make_pair(NewMI, std::make_pair(VirtReg, MRInfo)));
102 void VirtRegMap::print(std::ostream &OS) const {
103 const MRegisterInfo* MRI = MF.getTarget().getRegisterInfo();
105 OS << "********** REGISTER MAP **********\n";
106 for (unsigned i = MRegisterInfo::FirstVirtualRegister,
107 e = MF.getSSARegMap()->getLastVirtReg(); i <= e; ++i) {
108 if (Virt2PhysMap[i] != (unsigned)VirtRegMap::NO_PHYS_REG)
109 OS << "[reg" << i << " -> " << MRI->getName(Virt2PhysMap[i]) << "]\n";
113 for (unsigned i = MRegisterInfo::FirstVirtualRegister,
114 e = MF.getSSARegMap()->getLastVirtReg(); i <= e; ++i)
115 if (Virt2StackSlotMap[i] != VirtRegMap::NO_STACK_SLOT)
116 OS << "[reg" << i << " -> fi#" << Virt2StackSlotMap[i] << "]\n";
120 void VirtRegMap::dump() const { print(std::cerr); }
123 //===----------------------------------------------------------------------===//
124 // Simple Spiller Implementation
125 //===----------------------------------------------------------------------===//
127 Spiller::~Spiller() {}
130 struct SimpleSpiller : public Spiller {
131 bool runOnMachineFunction(MachineFunction& mf, const VirtRegMap &VRM);
135 bool SimpleSpiller::runOnMachineFunction(MachineFunction& MF,
136 const VirtRegMap& VRM) {
137 DEBUG(std::cerr << "********** REWRITE MACHINE CODE **********\n");
138 DEBUG(std::cerr << "********** Function: "
139 << MF.getFunction()->getName() << '\n');
140 const TargetMachine& TM = MF.getTarget();
141 const MRegisterInfo& MRI = *TM.getRegisterInfo();
143 // LoadedRegs - Keep track of which vregs are loaded, so that we only load
144 // each vreg once (in the case where a spilled vreg is used by multiple
145 // operands). This is always smaller than the number of operands to the
146 // current machine instr, so it should be small.
147 std::vector<unsigned> LoadedRegs;
149 for (MachineFunction::iterator MBBI = MF.begin(), E = MF.end();
151 DEBUG(std::cerr << MBBI->getBasicBlock()->getName() << ":\n");
152 MachineBasicBlock &MBB = *MBBI;
153 for (MachineBasicBlock::iterator MII = MBB.begin(),
154 E = MBB.end(); MII != E; ++MII) {
155 MachineInstr &MI = *MII;
156 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
157 MachineOperand &MO = MI.getOperand(i);
158 if (MO.isRegister() && MO.getReg() &&
159 MRegisterInfo::isVirtualRegister(MO.getReg())) {
160 unsigned VirtReg = MO.getReg();
161 unsigned PhysReg = VRM.getPhys(VirtReg);
162 if (VRM.hasStackSlot(VirtReg)) {
163 int StackSlot = VRM.getStackSlot(VirtReg);
166 std::find(LoadedRegs.begin(), LoadedRegs.end(), VirtReg)
167 == LoadedRegs.end()) {
168 MRI.loadRegFromStackSlot(MBB, &MI, PhysReg, StackSlot);
169 LoadedRegs.push_back(VirtReg);
171 DEBUG(std::cerr << '\t' << *prior(MII));
175 MRI.storeRegToStackSlot(MBB, next(MII), PhysReg, StackSlot);
179 MI.SetMachineOperandReg(i, PhysReg);
182 DEBUG(std::cerr << '\t' << MI);
189 //===----------------------------------------------------------------------===//
190 // Local Spiller Implementation
191 //===----------------------------------------------------------------------===//
194 /// LocalSpiller - This spiller does a simple pass over the machine basic
195 /// block to attempt to keep spills in registers as much as possible for
196 /// blocks that have low register pressure (the vreg may be spilled due to
197 /// register pressure in other blocks).
198 class LocalSpiller : public Spiller {
199 const MRegisterInfo *MRI;
200 const TargetInstrInfo *TII;
202 bool runOnMachineFunction(MachineFunction &MF, const VirtRegMap &VRM) {
203 MRI = MF.getTarget().getRegisterInfo();
204 TII = MF.getTarget().getInstrInfo();
205 DEBUG(std::cerr << "\n**** Local spiller rewriting function '"
206 << MF.getFunction()->getName() << "':\n");
208 for (MachineFunction::iterator MBB = MF.begin(), E = MF.end();
210 RewriteMBB(*MBB, VRM);
214 void RewriteMBB(MachineBasicBlock &MBB, const VirtRegMap &VRM);
215 void ClobberPhysReg(unsigned PR, std::map<int, unsigned> &SpillSlots,
216 std::map<unsigned, int> &PhysRegs);
217 void ClobberPhysRegOnly(unsigned PR, std::map<int, unsigned> &SpillSlots,
218 std::map<unsigned, int> &PhysRegs);
222 void LocalSpiller::ClobberPhysRegOnly(unsigned PhysReg,
223 std::map<int, unsigned> &SpillSlots,
224 std::map<unsigned, int> &PhysRegs) {
225 std::map<unsigned, int>::iterator I = PhysRegs.find(PhysReg);
226 if (I != PhysRegs.end()) {
227 int Slot = I->second;
229 assert(SpillSlots[Slot] == PhysReg && "Bidirectional map mismatch!");
230 SpillSlots.erase(Slot);
231 DEBUG(std::cerr << "PhysReg " << MRI->getName(PhysReg)
232 << " clobbered, invalidating SS#" << Slot << "\n");
237 void LocalSpiller::ClobberPhysReg(unsigned PhysReg,
238 std::map<int, unsigned> &SpillSlots,
239 std::map<unsigned, int> &PhysRegs) {
240 for (const unsigned *AS = MRI->getAliasSet(PhysReg); *AS; ++AS)
241 ClobberPhysRegOnly(*AS, SpillSlots, PhysRegs);
242 ClobberPhysRegOnly(PhysReg, SpillSlots, PhysRegs);
246 // ReusedOp - For each reused operand, we keep track of a bit of information, in
247 // case we need to rollback upon processing a new operand. See comments below.
250 // The MachineInstr operand that reused an available value.
253 // StackSlot - The spill slot of the value being reused.
256 // PhysRegReused - The physical register the value was available in.
257 unsigned PhysRegReused;
259 // AssignedPhysReg - The physreg that was assigned for use by the reload.
260 unsigned AssignedPhysReg;
262 ReusedOp(unsigned o, unsigned ss, unsigned prr, unsigned apr)
263 : Operand(o), StackSlot(ss), PhysRegReused(prr), AssignedPhysReg(apr) {}
268 /// rewriteMBB - Keep track of which spills are available even after the
269 /// register allocator is done with them. If possible, avoid reloading vregs.
270 void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, const VirtRegMap &VRM) {
272 // SpillSlotsAvailable - This map keeps track of all of the spilled virtual
273 // register values that are still available, due to being loaded to stored to,
274 // but not invalidated yet.
275 std::map<int, unsigned> SpillSlotsAvailable;
277 // PhysRegsAvailable - This is the inverse of SpillSlotsAvailable, indicating
278 // which physregs are in use holding a stack slot value.
279 std::map<unsigned, int> PhysRegsAvailable;
281 DEBUG(std::cerr << MBB.getBasicBlock()->getName() << ":\n");
283 std::vector<ReusedOp> ReusedOperands;
285 // DefAndUseVReg - When we see a def&use operand that is spilled, keep track
286 // of it. ".first" is the machine operand index (should always be 0 for now),
287 // and ".second" is the virtual register that is spilled.
288 std::vector<std::pair<unsigned, unsigned> > DefAndUseVReg;
290 // MaybeDeadStores - When we need to write a value back into a stack slot,
291 // keep track of the inserted store. If the stack slot value is never read
292 // (because the value was used from some available register, for example), and
293 // subsequently stored to, the original store is dead. This map keeps track
294 // of inserted stores that are not used. If we see a subsequent store to the
295 // same stack slot, the original store is deleted.
296 std::map<int, MachineInstr*> MaybeDeadStores;
298 for (MachineBasicBlock::iterator MII = MBB.begin(), E = MBB.end();
300 MachineInstr &MI = *MII;
301 MachineBasicBlock::iterator NextMII = MII; ++NextMII;
303 ReusedOperands.clear();
304 DefAndUseVReg.clear();
306 // Process all of the spilled uses and all non spilled reg references.
307 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
308 MachineOperand &MO = MI.getOperand(i);
309 if (MO.isRegister() && MO.getReg() &&
310 MRegisterInfo::isVirtualRegister(MO.getReg())) {
311 unsigned VirtReg = MO.getReg();
313 if (!VRM.hasStackSlot(VirtReg)) {
314 // This virtual register was assigned a physreg!
315 MI.SetMachineOperandReg(i, VRM.getPhys(VirtReg));
317 // Is this virtual register a spilled value?
319 int StackSlot = VRM.getStackSlot(VirtReg);
322 // Check to see if this stack slot is available.
323 std::map<int, unsigned>::iterator SSI =
324 SpillSlotsAvailable.find(StackSlot);
325 if (SSI != SpillSlotsAvailable.end()) {
326 DEBUG(std::cerr << "Reusing SS#" << StackSlot << " from physreg "
327 << MRI->getName(SSI->second) << " for vreg"
328 << VirtReg <<" instead of reloading into physreg "
329 << MRI->getName(VRM.getPhys(VirtReg)) << "\n");
330 // If this stack slot value is already available, reuse it!
331 PhysReg = SSI->second;
332 MI.SetMachineOperandReg(i, PhysReg);
334 // The only technical detail we have is that we don't know that
335 // PhysReg won't be clobbered by a reloaded stack slot that occurs
336 // later in the instruction. In particular, consider 'op V1, V2'.
337 // If V1 is available in physreg R0, we would choose to reuse it
338 // here, instead of reloading it into the register the allocator
339 // indicated (say R1). However, V2 might have to be reloaded
340 // later, and it might indicate that it needs to live in R0. When
341 // this occurs, we need to have information available that
342 // indicates it is safe to use R1 for the reload instead of R0.
344 // To further complicate matters, we might conflict with an alias,
345 // or R0 and R1 might not be compatible with each other. In this
346 // case, we actually insert a reload for V1 in R1, ensuring that
347 // we can get at R0 or its alias.
348 ReusedOperands.push_back(ReusedOp(i, StackSlot, PhysReg,
349 VRM.getPhys(VirtReg)));
352 // Otherwise, reload it and remember that we have it.
353 PhysReg = VRM.getPhys(VirtReg);
356 // Note that, if we reused a register for a previous operand, the
357 // register we want to reload into might not actually be
358 // available. If this occurs, use the register indicated by the
360 if (!ReusedOperands.empty()) // This is most often empty.
361 for (unsigned ro = 0, e = ReusedOperands.size(); ro != e; ++ro)
362 if (ReusedOperands[ro].PhysRegReused == PhysReg) {
363 // Yup, use the reload register that we didn't use before.
364 PhysReg = ReusedOperands[ro].AssignedPhysReg;
365 goto RecheckRegister;
367 ReusedOp &Op = ReusedOperands[ro];
368 unsigned PRRU = Op.PhysRegReused;
369 for (const unsigned *AS = MRI->getAliasSet(PRRU); *AS; ++AS)
370 if (*AS == PhysReg) {
371 // Okay, we found out that an alias of a reused register
372 // was used. This isn't good because it means we have
373 // to undo a previous reuse.
374 MRI->loadRegFromStackSlot(MBB, &MI, Op.AssignedPhysReg,
376 ClobberPhysReg(Op.AssignedPhysReg, SpillSlotsAvailable,
379 // Any stores to this stack slot are not dead anymore.
380 MaybeDeadStores.erase(Op.StackSlot);
382 MI.SetMachineOperandReg(Op.Operand, Op.AssignedPhysReg);
383 PhysRegsAvailable[Op.AssignedPhysReg] = Op.StackSlot;
384 SpillSlotsAvailable[Op.StackSlot] = Op.AssignedPhysReg;
385 PhysRegsAvailable.erase(Op.PhysRegReused);
386 DEBUG(std::cerr << "Remembering SS#" << Op.StackSlot
388 << MRI->getName(Op.AssignedPhysReg) << "\n");
390 DEBUG(std::cerr << '\t' << *prior(MII));
392 DEBUG(std::cerr << "Reuse undone!\n");
393 ReusedOperands.erase(ReusedOperands.begin()+ro);
400 MRI->loadRegFromStackSlot(MBB, &MI, PhysReg, StackSlot);
401 // This invalidates PhysReg.
402 ClobberPhysReg(PhysReg, SpillSlotsAvailable, PhysRegsAvailable);
404 // Any stores to this stack slot are not dead anymore.
405 MaybeDeadStores.erase(StackSlot);
407 MI.SetMachineOperandReg(i, PhysReg);
408 PhysRegsAvailable[PhysReg] = StackSlot;
409 SpillSlotsAvailable[StackSlot] = PhysReg;
410 DEBUG(std::cerr << "Remembering SS#" << StackSlot <<" in physreg "
411 << MRI->getName(PhysReg) << "\n");
413 DEBUG(std::cerr << '\t' << *prior(MII));
416 // If this is both a def and a use, we need to emit a store to the
417 // stack slot after the instruction. Keep track of D&U operands
418 // because we already changed it to a physreg here.
420 // Remember that this was a def-and-use operand, and that the
421 // stack slot is live after this instruction executes.
422 DefAndUseVReg.push_back(std::make_pair(i, VirtReg));
429 // Loop over all of the implicit defs, clearing them from our available
431 const TargetInstrDescriptor &InstrDesc = TII->get(MI.getOpcode());
432 for (const unsigned* ImpDef = InstrDesc.ImplicitDefs; *ImpDef; ++ImpDef)
433 ClobberPhysReg(*ImpDef, SpillSlotsAvailable, PhysRegsAvailable);
435 DEBUG(std::cerr << '\t' << MI);
437 // If we have folded references to memory operands, make sure we clear all
438 // physical registers that may contain the value of the spilled virtual
440 VirtRegMap::MI2VirtMapTy::const_iterator I, E;
441 for (tie(I, E) = VRM.getFoldedVirts(&MI); I != E; ++I) {
442 DEBUG(std::cerr << "Folded vreg: " << I->second.first << " MR: "
443 << I->second.second);
444 unsigned VirtReg = I->second.first;
445 VirtRegMap::ModRef MR = I->second.second;
446 if (VRM.hasStackSlot(VirtReg)) {
447 int SS = VRM.getStackSlot(VirtReg);
448 DEBUG(std::cerr << " - StackSlot: " << SS << "\n");
450 // If this reference is not a use, any previous store is now dead.
451 // Otherwise, the store to this stack slot is not dead anymore.
452 std::map<int, MachineInstr*>::iterator MDSI = MaybeDeadStores.find(SS);
453 if (MDSI != MaybeDeadStores.end()) {
454 if (MR & VirtRegMap::isRef) // Previous store is not dead.
455 MaybeDeadStores.erase(MDSI);
457 // If we get here, the store is dead, nuke it now.
458 assert(MR == VirtRegMap::isMod && "Can't be modref!");
459 MBB.erase(MDSI->second);
460 MaybeDeadStores.erase(MDSI);
465 // If the spill slot value is available, and this is a new definition of
466 // the value, the value is not available anymore.
467 if (MR & VirtRegMap::isMod) {
468 std::map<int, unsigned>::iterator It = SpillSlotsAvailable.find(SS);
469 if (It != SpillSlotsAvailable.end()) {
470 PhysRegsAvailable.erase(It->second);
471 SpillSlotsAvailable.erase(It);
475 DEBUG(std::cerr << ": No stack slot!\n");
479 // Process all of the spilled defs.
480 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
481 MachineOperand &MO = MI.getOperand(i);
482 if (MO.isRegister() && MO.getReg() && MO.isDef()) {
483 unsigned VirtReg = MO.getReg();
485 bool TakenCareOf = false;
486 if (!MRegisterInfo::isVirtualRegister(VirtReg)) {
487 // Check to see if this is a def-and-use vreg operand that we do need
488 // to insert a store for.
489 bool OpTakenCareOf = false;
490 if (MO.isUse() && !DefAndUseVReg.empty()) {
491 for (unsigned dau = 0, e = DefAndUseVReg.size(); dau != e; ++dau)
492 if (DefAndUseVReg[dau].first == i) {
493 VirtReg = DefAndUseVReg[dau].second;
494 OpTakenCareOf = true;
499 if (!OpTakenCareOf) {
500 ClobberPhysReg(VirtReg, SpillSlotsAvailable, PhysRegsAvailable);
506 // The only vregs left are stack slot definitions.
507 int StackSlot = VRM.getStackSlot(VirtReg);
510 // If this is a def&use operand, and we used a different physreg for
511 // it than the one assigned, make sure to execute the store from the
512 // correct physical register.
513 if (MO.getReg() == VirtReg)
514 PhysReg = VRM.getPhys(VirtReg);
516 PhysReg = MO.getReg();
518 MRI->storeRegToStackSlot(MBB, next(MII), PhysReg, StackSlot);
519 DEBUG(std::cerr << "Store:\t" << *next(MII));
520 MI.SetMachineOperandReg(i, PhysReg);
522 // If there is a dead store to this stack slot, nuke it now.
523 MachineInstr *&LastStore = MaybeDeadStores[StackSlot];
525 DEBUG(std::cerr << " Killed store:\t" << *LastStore);
527 MBB.erase(LastStore);
529 LastStore = next(MII);
531 // If the stack slot value was previously available in some other
532 // register, change it now. Otherwise, make the register available,
534 std::map<int, unsigned>::iterator SSA =
535 SpillSlotsAvailable.find(StackSlot);
536 if (SSA != SpillSlotsAvailable.end()) {
537 // Remove the record for physreg.
538 PhysRegsAvailable.erase(SSA->second);
539 SpillSlotsAvailable.erase(SSA);
541 ClobberPhysReg(PhysReg, SpillSlotsAvailable, PhysRegsAvailable);
543 PhysRegsAvailable[PhysReg] = StackSlot;
544 SpillSlotsAvailable[StackSlot] = PhysReg;
545 DEBUG(std::cerr << "Updating SS#" << StackSlot <<" in physreg "
546 << MRI->getName(PhysReg) << " for virtreg #"
560 llvm::Spiller* llvm::createSpiller() {
561 switch (SpillerOpt) {
562 default: assert(0 && "Unreachable!");
564 return new LocalSpiller();
566 return new SimpleSpiller();