1 //===-- llvm/CodeGen/VirtRegMap.cpp - Virtual Register Map ----------------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the VirtRegMap class.
12 // It also contains implementations of the the Spiller interface, which, given a
13 // virtual register map and a machine function, eliminates all virtual
14 // references by replacing them with physical register references - adding spill
17 //===----------------------------------------------------------------------===//
19 #define DEBUG_TYPE "spiller"
20 #include "VirtRegMap.h"
21 #include "llvm/Function.h"
22 #include "llvm/CodeGen/MachineFrameInfo.h"
23 #include "llvm/CodeGen/MachineFunction.h"
24 #include "llvm/CodeGen/SSARegMap.h"
25 #include "llvm/Target/TargetMachine.h"
26 #include "llvm/Target/TargetInstrInfo.h"
27 #include "llvm/Support/CommandLine.h"
28 #include "llvm/Support/Debug.h"
29 #include "llvm/ADT/Statistic.h"
30 #include "llvm/ADT/STLExtras.h"
36 Statistic<> NumSpills("spiller", "Number of register spills");
37 Statistic<> NumStores("spiller", "Number of stores added");
38 Statistic<> NumLoads ("spiller", "Number of loads added");
39 Statistic<> NumReused("spiller", "Number of values reused");
40 Statistic<> NumDSE ("spiller", "Number of dead stores elided");
41 Statistic<> NumDCE ("spiller", "Number of copies elided");
43 enum SpillerName { simple, local };
47 cl::desc("Spiller to use: (default: local)"),
49 cl::values(clEnumVal(simple, " simple spiller"),
50 clEnumVal(local, " local spiller"),
54 // TEMPORARY option to test a fix.
56 SpillerCheckLiveOut("spiller-check-liveout", cl::Hidden);
59 //===----------------------------------------------------------------------===//
60 // VirtRegMap implementation
61 //===----------------------------------------------------------------------===//
63 void VirtRegMap::grow() {
64 Virt2PhysMap.grow(MF.getSSARegMap()->getLastVirtReg());
65 Virt2StackSlotMap.grow(MF.getSSARegMap()->getLastVirtReg());
68 int VirtRegMap::assignVirt2StackSlot(unsigned virtReg) {
69 assert(MRegisterInfo::isVirtualRegister(virtReg));
70 assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT &&
71 "attempt to assign stack slot to already spilled register");
72 const TargetRegisterClass* RC = MF.getSSARegMap()->getRegClass(virtReg);
73 int frameIndex = MF.getFrameInfo()->CreateStackObject(RC->getSize(),
75 Virt2StackSlotMap[virtReg] = frameIndex;
80 void VirtRegMap::assignVirt2StackSlot(unsigned virtReg, int frameIndex) {
81 assert(MRegisterInfo::isVirtualRegister(virtReg));
82 assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT &&
83 "attempt to assign stack slot to already spilled register");
84 Virt2StackSlotMap[virtReg] = frameIndex;
87 void VirtRegMap::virtFolded(unsigned VirtReg, MachineInstr *OldMI,
88 unsigned OpNo, MachineInstr *NewMI,
90 // Move previous memory references folded to new instruction.
91 MI2VirtMapTy::iterator IP = MI2VirtMap.lower_bound(NewMI);
92 for (MI2VirtMapTy::iterator I = MI2VirtMap.lower_bound(OldMI),
93 E = MI2VirtMap.end(); I != E && I->first == OldMI; ) {
94 MI2VirtMap.insert(IP, std::make_pair(NewMI, I->second));
95 MI2VirtMap.erase(I++);
99 if (!OldMI->getOperand(OpNo).isDef()) {
100 assert(OldMI->getOperand(OpNo).isUse() && "Operand is not use or def?");
103 MRInfo = OldMI->getOperand(OpNo).isUse() ? isModRef : isMod;
104 if (LiveOut) MRInfo = (ModRef)(MRInfo | isLiveOut);
107 // add new memory reference
108 MI2VirtMap.insert(IP, std::make_pair(NewMI, std::make_pair(VirtReg, MRInfo)));
111 void VirtRegMap::print(std::ostream &OS) const {
112 const MRegisterInfo* MRI = MF.getTarget().getRegisterInfo();
114 OS << "********** REGISTER MAP **********\n";
115 for (unsigned i = MRegisterInfo::FirstVirtualRegister,
116 e = MF.getSSARegMap()->getLastVirtReg(); i <= e; ++i) {
117 if (Virt2PhysMap[i] != (unsigned)VirtRegMap::NO_PHYS_REG)
118 OS << "[reg" << i << " -> " << MRI->getName(Virt2PhysMap[i]) << "]\n";
122 for (unsigned i = MRegisterInfo::FirstVirtualRegister,
123 e = MF.getSSARegMap()->getLastVirtReg(); i <= e; ++i)
124 if (Virt2StackSlotMap[i] != VirtRegMap::NO_STACK_SLOT)
125 OS << "[reg" << i << " -> fi#" << Virt2StackSlotMap[i] << "]\n";
129 void VirtRegMap::dump() const { print(std::cerr); }
132 //===----------------------------------------------------------------------===//
133 // Simple Spiller Implementation
134 //===----------------------------------------------------------------------===//
136 Spiller::~Spiller() {}
139 struct SimpleSpiller : public Spiller {
140 bool runOnMachineFunction(MachineFunction& mf, const VirtRegMap &VRM);
144 bool SimpleSpiller::runOnMachineFunction(MachineFunction &MF,
145 const VirtRegMap &VRM) {
146 DEBUG(std::cerr << "********** REWRITE MACHINE CODE **********\n");
147 DEBUG(std::cerr << "********** Function: "
148 << MF.getFunction()->getName() << '\n');
149 const TargetMachine &TM = MF.getTarget();
150 const MRegisterInfo &MRI = *TM.getRegisterInfo();
151 bool *PhysRegsUsed = MF.getUsedPhysregs();
153 // LoadedRegs - Keep track of which vregs are loaded, so that we only load
154 // each vreg once (in the case where a spilled vreg is used by multiple
155 // operands). This is always smaller than the number of operands to the
156 // current machine instr, so it should be small.
157 std::vector<unsigned> LoadedRegs;
159 for (MachineFunction::iterator MBBI = MF.begin(), E = MF.end();
161 DEBUG(std::cerr << MBBI->getBasicBlock()->getName() << ":\n");
162 MachineBasicBlock &MBB = *MBBI;
163 for (MachineBasicBlock::iterator MII = MBB.begin(),
164 E = MBB.end(); MII != E; ++MII) {
165 MachineInstr &MI = *MII;
166 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
167 MachineOperand &MO = MI.getOperand(i);
168 if (MO.isRegister() && MO.getReg())
169 if (MRegisterInfo::isVirtualRegister(MO.getReg())) {
170 unsigned VirtReg = MO.getReg();
171 unsigned PhysReg = VRM.getPhys(VirtReg);
172 if (VRM.hasStackSlot(VirtReg)) {
173 int StackSlot = VRM.getStackSlot(VirtReg);
174 const TargetRegisterClass* RC =
175 MF.getSSARegMap()->getRegClass(VirtReg);
178 std::find(LoadedRegs.begin(), LoadedRegs.end(), VirtReg)
179 == LoadedRegs.end()) {
180 MRI.loadRegFromStackSlot(MBB, &MI, PhysReg, StackSlot, RC);
181 LoadedRegs.push_back(VirtReg);
183 DEBUG(std::cerr << '\t' << *prior(MII));
187 MRI.storeRegToStackSlot(MBB, next(MII), PhysReg, StackSlot, RC);
191 PhysRegsUsed[PhysReg] = true;
192 MI.SetMachineOperandReg(i, PhysReg);
194 PhysRegsUsed[MO.getReg()] = true;
198 DEBUG(std::cerr << '\t' << MI);
205 //===----------------------------------------------------------------------===//
206 // Local Spiller Implementation
207 //===----------------------------------------------------------------------===//
210 /// LocalSpiller - This spiller does a simple pass over the machine basic
211 /// block to attempt to keep spills in registers as much as possible for
212 /// blocks that have low register pressure (the vreg may be spilled due to
213 /// register pressure in other blocks).
214 class LocalSpiller : public Spiller {
215 const MRegisterInfo *MRI;
216 const TargetInstrInfo *TII;
218 bool runOnMachineFunction(MachineFunction &MF, const VirtRegMap &VRM) {
219 MRI = MF.getTarget().getRegisterInfo();
220 TII = MF.getTarget().getInstrInfo();
221 DEBUG(std::cerr << "\n**** Local spiller rewriting function '"
222 << MF.getFunction()->getName() << "':\n");
224 for (MachineFunction::iterator MBB = MF.begin(), E = MF.end();
226 RewriteMBB(*MBB, VRM);
230 void RewriteMBB(MachineBasicBlock &MBB, const VirtRegMap &VRM);
231 void ClobberPhysReg(unsigned PR, std::map<int, unsigned> &SpillSlots,
232 std::multimap<unsigned, int> &PhysRegs);
233 void ClobberPhysRegOnly(unsigned PR, std::map<int, unsigned> &SpillSlots,
234 std::multimap<unsigned, int> &PhysRegs);
235 void ModifyStackSlot(int Slot, std::map<int, unsigned> &SpillSlots,
236 std::multimap<unsigned, int> &PhysRegs);
240 /// AvailableSpills - As the local spiller is scanning and rewriting an MBB from
241 /// top down, keep track of which spills slots are available in each register.
243 /// Note that not all physregs are created equal here. In particular, some
244 /// physregs are reloads that we are allowed to clobber or ignore at any time.
245 /// Other physregs are values that the register allocated program is using that
246 /// we cannot CHANGE, but we can read if we like. We keep track of this on a
247 /// per-stack-slot basis as the low bit in the value of the SpillSlotsAvailable
248 /// entries. The predicate 'canClobberPhysReg()' checks this bit and
249 /// addAvailable sets it if.
250 class AvailableSpills {
251 const MRegisterInfo *MRI;
252 const TargetInstrInfo *TII;
254 // SpillSlotsAvailable - This map keeps track of all of the spilled virtual
255 // register values that are still available, due to being loaded or stored to,
256 // but not invalidated yet.
257 std::map<int, unsigned> SpillSlotsAvailable;
259 // PhysRegsAvailable - This is the inverse of SpillSlotsAvailable, indicating
260 // which stack slot values are currently held by a physreg. This is used to
261 // invalidate entries in SpillSlotsAvailable when a physreg is modified.
262 std::multimap<unsigned, int> PhysRegsAvailable;
264 void ClobberPhysRegOnly(unsigned PhysReg);
266 AvailableSpills(const MRegisterInfo *mri, const TargetInstrInfo *tii)
267 : MRI(mri), TII(tii) {
270 /// getSpillSlotPhysReg - If the specified stack slot is available in a
271 /// physical register, return that PhysReg, otherwise return 0.
272 unsigned getSpillSlotPhysReg(int Slot) const {
273 std::map<int, unsigned>::const_iterator I = SpillSlotsAvailable.find(Slot);
274 if (I != SpillSlotsAvailable.end())
275 return I->second >> 1; // Remove the CanClobber bit.
279 const MRegisterInfo *getRegInfo() const { return MRI; }
281 /// addAvailable - Mark that the specified stack slot is available in the
282 /// specified physreg. If CanClobber is true, the physreg can be modified at
283 /// any time without changing the semantics of the program.
284 void addAvailable(int Slot, unsigned Reg, bool CanClobber = true) {
285 // If this stack slot is thought to be available in some other physreg,
286 // remove its record.
287 ModifyStackSlot(Slot);
289 PhysRegsAvailable.insert(std::make_pair(Reg, Slot));
290 SpillSlotsAvailable[Slot] = (Reg << 1) | (unsigned)CanClobber;
292 DEBUG(std::cerr << "Remembering SS#" << Slot << " in physreg "
293 << MRI->getName(Reg) << "\n");
296 /// canClobberPhysReg - Return true if the spiller is allowed to change the
297 /// value of the specified stackslot register if it desires. The specified
298 /// stack slot must be available in a physreg for this query to make sense.
299 bool canClobberPhysReg(int Slot) const {
300 assert(SpillSlotsAvailable.count(Slot) && "Slot not available!");
301 return SpillSlotsAvailable.find(Slot)->second & 1;
304 /// ClobberPhysReg - This is called when the specified physreg changes
305 /// value. We use this to invalidate any info about stuff we thing lives in
306 /// it and any of its aliases.
307 void ClobberPhysReg(unsigned PhysReg);
309 /// ModifyStackSlot - This method is called when the value in a stack slot
310 /// changes. This removes information about which register the previous value
311 /// for this slot lives in (as the previous value is dead now).
312 void ModifyStackSlot(int Slot);
315 /// ClobberPhysRegOnly - This is called when the specified physreg changes
316 /// value. We use this to invalidate any info about stuff we thing lives in it.
317 void AvailableSpills::ClobberPhysRegOnly(unsigned PhysReg) {
318 std::multimap<unsigned, int>::iterator I =
319 PhysRegsAvailable.lower_bound(PhysReg);
320 while (I != PhysRegsAvailable.end() && I->first == PhysReg) {
321 int Slot = I->second;
322 PhysRegsAvailable.erase(I++);
323 assert((SpillSlotsAvailable[Slot] >> 1) == PhysReg &&
324 "Bidirectional map mismatch!");
325 SpillSlotsAvailable.erase(Slot);
326 DEBUG(std::cerr << "PhysReg " << MRI->getName(PhysReg)
327 << " clobbered, invalidating SS#" << Slot << "\n");
331 /// ClobberPhysReg - This is called when the specified physreg changes
332 /// value. We use this to invalidate any info about stuff we thing lives in
333 /// it and any of its aliases.
334 void AvailableSpills::ClobberPhysReg(unsigned PhysReg) {
335 for (const unsigned *AS = MRI->getAliasSet(PhysReg); *AS; ++AS)
336 ClobberPhysRegOnly(*AS);
337 ClobberPhysRegOnly(PhysReg);
340 /// ModifyStackSlot - This method is called when the value in a stack slot
341 /// changes. This removes information about which register the previous value
342 /// for this slot lives in (as the previous value is dead now).
343 void AvailableSpills::ModifyStackSlot(int Slot) {
344 std::map<int, unsigned>::iterator It = SpillSlotsAvailable.find(Slot);
345 if (It == SpillSlotsAvailable.end()) return;
346 unsigned Reg = It->second >> 1;
347 SpillSlotsAvailable.erase(It);
349 // This register may hold the value of multiple stack slots, only remove this
350 // stack slot from the set of values the register contains.
351 std::multimap<unsigned, int>::iterator I = PhysRegsAvailable.lower_bound(Reg);
353 assert(I != PhysRegsAvailable.end() && I->first == Reg &&
354 "Map inverse broken!");
355 if (I->second == Slot) break;
357 PhysRegsAvailable.erase(I);
362 // ReusedOp - For each reused operand, we keep track of a bit of information, in
363 // case we need to rollback upon processing a new operand. See comments below.
366 // The MachineInstr operand that reused an available value.
369 // StackSlot - The spill slot of the value being reused.
372 // PhysRegReused - The physical register the value was available in.
373 unsigned PhysRegReused;
375 // AssignedPhysReg - The physreg that was assigned for use by the reload.
376 unsigned AssignedPhysReg;
378 // VirtReg - The virtual register itself.
381 ReusedOp(unsigned o, unsigned ss, unsigned prr, unsigned apr,
383 : Operand(o), StackSlot(ss), PhysRegReused(prr), AssignedPhysReg(apr),
387 /// ReuseInfo - This maintains a collection of ReuseOp's for each operand that
388 /// is reused instead of reloaded.
391 std::vector<ReusedOp> Reuses;
393 ReuseInfo(MachineInstr &mi) : MI(mi) {}
395 bool hasReuses() const {
396 return !Reuses.empty();
399 /// addReuse - If we choose to reuse a virtual register that is already
400 /// available instead of reloading it, remember that we did so.
401 void addReuse(unsigned OpNo, unsigned StackSlot,
402 unsigned PhysRegReused, unsigned AssignedPhysReg,
404 // If the reload is to the assigned register anyway, no undo will be
406 if (PhysRegReused == AssignedPhysReg) return;
408 // Otherwise, remember this.
409 Reuses.push_back(ReusedOp(OpNo, StackSlot, PhysRegReused,
410 AssignedPhysReg, VirtReg));
413 /// GetRegForReload - We are about to emit a reload into PhysReg. If there
414 /// is some other operand that is using the specified register, either pick
415 /// a new register to use, or evict the previous reload and use this reg.
416 unsigned GetRegForReload(unsigned PhysReg, MachineInstr *MI,
417 AvailableSpills &Spills,
418 std::map<int, MachineInstr*> &MaybeDeadStores) {
419 if (Reuses.empty()) return PhysReg; // This is most often empty.
421 for (unsigned ro = 0, e = Reuses.size(); ro != e; ++ro) {
422 ReusedOp &Op = Reuses[ro];
423 // If we find some other reuse that was supposed to use this register
424 // exactly for its reload, we can change this reload to use ITS reload
426 if (Op.PhysRegReused == PhysReg) {
427 // Yup, use the reload register that we didn't use before.
428 unsigned NewReg = Op.AssignedPhysReg;
430 // Remove the record for the previous reuse. We know it can never be
432 Reuses.erase(Reuses.begin()+ro);
433 return GetRegForReload(NewReg, MI, Spills, MaybeDeadStores);
435 // Otherwise, we might also have a problem if a previously reused
436 // value aliases the new register. If so, codegen the previous reload
438 unsigned PRRU = Op.PhysRegReused;
439 const MRegisterInfo *MRI = Spills.getRegInfo();
440 if (MRI->areAliases(PRRU, PhysReg)) {
441 // Okay, we found out that an alias of a reused register
442 // was used. This isn't good because it means we have
443 // to undo a previous reuse.
444 MachineBasicBlock *MBB = MI->getParent();
445 const TargetRegisterClass *AliasRC =
446 MBB->getParent()->getSSARegMap()->getRegClass(Op.VirtReg);
448 // Copy Op out of the vector and remove it, we're going to insert an
449 // explicit load for it.
451 Reuses.erase(Reuses.begin()+ro);
453 // Ok, we're going to try to reload the assigned physreg into the
454 // slot that we were supposed to in the first place. However, that
455 // register could hold a reuse. Check to see if it conflicts or
456 // would prefer us to use a different register.
457 unsigned NewPhysReg = GetRegForReload(NewOp.AssignedPhysReg,
458 MI, Spills, MaybeDeadStores);
460 MRI->loadRegFromStackSlot(*MBB, MI, NewPhysReg,
461 NewOp.StackSlot, AliasRC);
462 Spills.ClobberPhysReg(NewPhysReg);
463 Spills.ClobberPhysReg(NewOp.PhysRegReused);
465 // Any stores to this stack slot are not dead anymore.
466 MaybeDeadStores.erase(NewOp.StackSlot);
468 MI->SetMachineOperandReg(NewOp.Operand, NewPhysReg);
470 Spills.addAvailable(NewOp.StackSlot, NewPhysReg);
472 DEBUG(MachineBasicBlock::iterator MII = MI;
473 std::cerr << '\t' << *prior(MII));
475 DEBUG(std::cerr << "Reuse undone!\n");
478 // Finally, PhysReg is now available, go ahead and use it.
489 /// rewriteMBB - Keep track of which spills are available even after the
490 /// register allocator is done with them. If possible, avoid reloading vregs.
491 void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, const VirtRegMap &VRM) {
493 DEBUG(std::cerr << MBB.getBasicBlock()->getName() << ":\n");
495 // Spills - Keep track of which spilled values are available in physregs so
496 // that we can choose to reuse the physregs instead of emitting reloads.
497 AvailableSpills Spills(MRI, TII);
499 // DefAndUseVReg - When we see a def&use operand that is spilled, keep track
500 // of it. ".first" is the machine operand index (should always be 0 for now),
501 // and ".second" is the virtual register that is spilled.
502 std::vector<std::pair<unsigned, unsigned> > DefAndUseVReg;
504 // MaybeDeadStores - When we need to write a value back into a stack slot,
505 // keep track of the inserted store. If the stack slot value is never read
506 // (because the value was used from some available register, for example), and
507 // subsequently stored to, the original store is dead. This map keeps track
508 // of inserted stores that are not used. If we see a subsequent store to the
509 // same stack slot, the original store is deleted.
510 std::map<int, MachineInstr*> MaybeDeadStores;
512 bool *PhysRegsUsed = MBB.getParent()->getUsedPhysregs();
514 for (MachineBasicBlock::iterator MII = MBB.begin(), E = MBB.end();
516 MachineInstr &MI = *MII;
517 MachineBasicBlock::iterator NextMII = MII; ++NextMII;
519 /// ReusedOperands - Keep track of operand reuse in case we need to undo
521 ReuseInfo ReusedOperands(MI);
523 DefAndUseVReg.clear();
525 // Process all of the spilled uses and all non spilled reg references.
526 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
527 MachineOperand &MO = MI.getOperand(i);
528 if (!MO.isRegister() || MO.getReg() == 0)
529 continue; // Ignore non-register operands.
531 if (MRegisterInfo::isPhysicalRegister(MO.getReg())) {
532 // Ignore physregs for spilling, but remember that it is used by this
534 PhysRegsUsed[MO.getReg()] = true;
538 assert(MRegisterInfo::isVirtualRegister(MO.getReg()) &&
539 "Not a virtual or a physical register?");
541 unsigned VirtReg = MO.getReg();
542 if (!VRM.hasStackSlot(VirtReg)) {
543 // This virtual register was assigned a physreg!
544 unsigned Phys = VRM.getPhys(VirtReg);
545 PhysRegsUsed[Phys] = true;
546 MI.SetMachineOperandReg(i, Phys);
550 // This virtual register is now known to be a spilled value.
552 continue; // Handle defs in the loop below (handle use&def here though)
554 // If this is both a def and a use, we need to emit a store to the
555 // stack slot after the instruction. Keep track of D&U operands
556 // because we are about to change it to a physreg here.
558 // Remember that this was a def-and-use operand, and that the
559 // stack slot is live after this instruction executes.
560 DefAndUseVReg.push_back(std::make_pair(i, VirtReg));
563 int StackSlot = VRM.getStackSlot(VirtReg);
566 // Check to see if this stack slot is available.
567 if ((PhysReg = Spills.getSpillSlotPhysReg(StackSlot))) {
569 // Don't reuse it for a def&use operand if we aren't allowed to change
571 if (!MO.isDef() || Spills.canClobberPhysReg(StackSlot)) {
572 // If this stack slot value is already available, reuse it!
573 DEBUG(std::cerr << "Reusing SS#" << StackSlot << " from physreg "
574 << MRI->getName(PhysReg) << " for vreg"
575 << VirtReg <<" instead of reloading into physreg "
576 << MRI->getName(VRM.getPhys(VirtReg)) << "\n");
577 MI.SetMachineOperandReg(i, PhysReg);
579 // The only technical detail we have is that we don't know that
580 // PhysReg won't be clobbered by a reloaded stack slot that occurs
581 // later in the instruction. In particular, consider 'op V1, V2'.
582 // If V1 is available in physreg R0, we would choose to reuse it
583 // here, instead of reloading it into the register the allocator
584 // indicated (say R1). However, V2 might have to be reloaded
585 // later, and it might indicate that it needs to live in R0. When
586 // this occurs, we need to have information available that
587 // indicates it is safe to use R1 for the reload instead of R0.
589 // To further complicate matters, we might conflict with an alias,
590 // or R0 and R1 might not be compatible with each other. In this
591 // case, we actually insert a reload for V1 in R1, ensuring that
592 // we can get at R0 or its alias.
593 ReusedOperands.addReuse(i, StackSlot, PhysReg,
594 VRM.getPhys(VirtReg), VirtReg);
599 // Otherwise we have a situation where we have a two-address instruction
600 // whose mod/ref operand needs to be reloaded. This reload is already
601 // available in some register "PhysReg", but if we used PhysReg as the
602 // operand to our 2-addr instruction, the instruction would modify
603 // PhysReg. This isn't cool if something later uses PhysReg and expects
604 // to get its initial value.
606 // To avoid this problem, and to avoid doing a load right after a store,
607 // we emit a copy from PhysReg into the designated register for this
609 unsigned DesignatedReg = VRM.getPhys(VirtReg);
610 assert(DesignatedReg && "Must map virtreg to physreg!");
612 // Note that, if we reused a register for a previous operand, the
613 // register we want to reload into might not actually be
614 // available. If this occurs, use the register indicated by the
616 if (ReusedOperands.hasReuses())
617 DesignatedReg = ReusedOperands.GetRegForReload(DesignatedReg, &MI,
618 Spills, MaybeDeadStores);
620 // If the mapped designated register is actually the physreg we have
621 // incoming, we don't need to inserted a dead copy.
622 if (DesignatedReg == PhysReg) {
623 // If this stack slot value is already available, reuse it!
624 DEBUG(std::cerr << "Reusing SS#" << StackSlot << " from physreg "
625 << MRI->getName(PhysReg) << " for vreg"
627 << " instead of reloading into same physreg.\n");
628 MI.SetMachineOperandReg(i, PhysReg);
633 const TargetRegisterClass* RC =
634 MBB.getParent()->getSSARegMap()->getRegClass(VirtReg);
636 PhysRegsUsed[DesignatedReg] = true;
637 MRI->copyRegToReg(MBB, &MI, DesignatedReg, PhysReg, RC);
639 // This invalidates DesignatedReg.
640 Spills.ClobberPhysReg(DesignatedReg);
642 Spills.addAvailable(StackSlot, DesignatedReg);
643 MI.SetMachineOperandReg(i, DesignatedReg);
644 DEBUG(std::cerr << '\t' << *prior(MII));
649 // Otherwise, reload it and remember that we have it.
650 PhysReg = VRM.getPhys(VirtReg);
651 assert(PhysReg && "Must map virtreg to physreg!");
652 const TargetRegisterClass* RC =
653 MBB.getParent()->getSSARegMap()->getRegClass(VirtReg);
655 // Note that, if we reused a register for a previous operand, the
656 // register we want to reload into might not actually be
657 // available. If this occurs, use the register indicated by the
659 if (ReusedOperands.hasReuses())
660 PhysReg = ReusedOperands.GetRegForReload(PhysReg, &MI,
661 Spills, MaybeDeadStores);
663 PhysRegsUsed[PhysReg] = true;
664 MRI->loadRegFromStackSlot(MBB, &MI, PhysReg, StackSlot, RC);
665 // This invalidates PhysReg.
666 Spills.ClobberPhysReg(PhysReg);
668 // Any stores to this stack slot are not dead anymore.
669 MaybeDeadStores.erase(StackSlot);
670 Spills.addAvailable(StackSlot, PhysReg);
672 MI.SetMachineOperandReg(i, PhysReg);
673 DEBUG(std::cerr << '\t' << *prior(MII));
676 // Loop over all of the implicit defs, clearing them from our available
678 for (const unsigned *ImpDef = TII->getImplicitDefs(MI.getOpcode());
680 PhysRegsUsed[*ImpDef] = true;
681 Spills.ClobberPhysReg(*ImpDef);
684 DEBUG(std::cerr << '\t' << MI);
686 // If we have folded references to memory operands, make sure we clear all
687 // physical registers that may contain the value of the spilled virtual
689 VirtRegMap::MI2VirtMapTy::const_iterator I, End;
690 for (tie(I, End) = VRM.getFoldedVirts(&MI); I != End; ++I) {
691 DEBUG(std::cerr << "Folded vreg: " << I->second.first << " MR: "
692 << I->second.second);
693 unsigned VirtReg = I->second.first;
694 VirtRegMap::ModRef MR = I->second.second;
695 if (!VRM.hasStackSlot(VirtReg)) {
696 DEBUG(std::cerr << ": No stack slot!\n");
699 int SS = VRM.getStackSlot(VirtReg);
700 DEBUG(std::cerr << " - StackSlot: " << SS << "\n");
702 // If this folded instruction is just a use, check to see if it's a
703 // straight load from the virt reg slot.
704 if ((MR & VirtRegMap::isRef) && !(MR & VirtRegMap::isMod)) {
706 if (unsigned DestReg = TII->isLoadFromStackSlot(&MI, FrameIdx)) {
707 // If this spill slot is available, turn it into a copy (or nothing)
708 // instead of leaving it as a load!
710 if (FrameIdx == SS && (InReg = Spills.getSpillSlotPhysReg(SS))) {
711 DEBUG(std::cerr << "Promoted Load To Copy: " << MI);
712 MachineFunction &MF = *MBB.getParent();
713 if (DestReg != InReg) {
714 MRI->copyRegToReg(MBB, &MI, DestReg, InReg,
715 MF.getSSARegMap()->getRegClass(VirtReg));
716 // Revisit the copy so we make sure to notice the effects of the
717 // operation on the destreg (either needing to RA it if it's
718 // virtual or needing to clobber any values if it's physical).
720 --NextMII; // backtrack to the copy.
723 goto ProcessNextInst;
728 // If this reference is not a use, any previous store is now dead.
729 // Otherwise, the store to this stack slot is not dead anymore.
730 std::map<int, MachineInstr*>::iterator MDSI = MaybeDeadStores.find(SS);
731 if (MDSI != MaybeDeadStores.end()) {
732 if (MR & VirtRegMap::isRef) // Previous store is not dead.
733 MaybeDeadStores.erase(MDSI);
735 // If we get here, the store is dead, nuke it now.
736 assert(!(MR & VirtRegMap::isRef) && "Can't be modref!");
737 // Don't nuke it if the value is needed in another block.
738 if (!SpillerCheckLiveOut || !(MR & VirtRegMap::isLiveOut)) {
739 DEBUG(std::cerr << " Killed store:\t" << *MDSI->second);
740 MBB.erase(MDSI->second);
741 MaybeDeadStores.erase(MDSI);
747 // If the spill slot value is available, and this is a new definition of
748 // the value, the value is not available anymore.
749 if (MR & VirtRegMap::isMod) {
750 // Notice that the value in this stack slot has been modified.
751 Spills.ModifyStackSlot(SS);
753 // If this is *just* a mod of the value, check to see if this is just a
754 // store to the spill slot (i.e. the spill got merged into the copy). If
755 // so, realize that the vreg is available now, and add the store to the
756 // MaybeDeadStore info.
758 if (!(MR & VirtRegMap::isRef)) {
759 if (unsigned SrcReg = TII->isStoreToStackSlot(&MI, StackSlot)) {
760 assert(MRegisterInfo::isPhysicalRegister(SrcReg) &&
761 "Src hasn't been allocated yet?");
762 // Okay, this is certainly a store of SrcReg to [StackSlot]. Mark
763 // this as a potentially dead store in case there is a subsequent
764 // store into the stack slot without a read from it.
765 MaybeDeadStores[StackSlot] = &MI;
767 // If the stack slot value was previously available in some other
768 // register, change it now. Otherwise, make the register available,
770 Spills.addAvailable(StackSlot, SrcReg, false /*don't clobber*/);
776 // Process all of the spilled defs.
777 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
778 MachineOperand &MO = MI.getOperand(i);
779 if (MO.isRegister() && MO.getReg() && MO.isDef()) {
780 unsigned VirtReg = MO.getReg();
782 if (!MRegisterInfo::isVirtualRegister(VirtReg)) {
783 // Check to see if this is a def-and-use vreg operand that we do need
784 // to insert a store for.
785 bool OpTakenCareOf = false;
786 if (MO.isUse() && !DefAndUseVReg.empty()) {
787 for (unsigned dau = 0, e = DefAndUseVReg.size(); dau != e; ++dau)
788 if (DefAndUseVReg[dau].first == i) {
789 VirtReg = DefAndUseVReg[dau].second;
790 OpTakenCareOf = true;
795 if (!OpTakenCareOf) {
796 // Check to see if this is a noop copy. If so, eliminate the
797 // instruction before considering the dest reg to be changed.
799 if (TII->isMoveInstr(MI, Src, Dst) && Src == Dst) {
801 DEBUG(std::cerr << "Removing now-noop copy: " << MI);
803 goto ProcessNextInst;
805 Spills.ClobberPhysReg(VirtReg);
810 // The only vregs left are stack slot definitions.
811 int StackSlot = VRM.getStackSlot(VirtReg);
812 const TargetRegisterClass *RC =
813 MBB.getParent()->getSSARegMap()->getRegClass(VirtReg);
816 // If this is a def&use operand, and we used a different physreg for
817 // it than the one assigned, make sure to execute the store from the
818 // correct physical register.
819 if (MO.getReg() == VirtReg)
820 PhysReg = VRM.getPhys(VirtReg);
822 PhysReg = MO.getReg();
824 PhysRegsUsed[PhysReg] = true;
825 MRI->storeRegToStackSlot(MBB, next(MII), PhysReg, StackSlot, RC);
826 DEBUG(std::cerr << "Store:\t" << *next(MII));
827 MI.SetMachineOperandReg(i, PhysReg);
829 // Check to see if this is a noop copy. If so, eliminate the
830 // instruction before considering the dest reg to be changed.
833 if (TII->isMoveInstr(MI, Src, Dst) && Src == Dst) {
835 DEBUG(std::cerr << "Removing now-noop copy: " << MI);
837 goto ProcessNextInst;
841 // If there is a dead store to this stack slot, nuke it now.
842 MachineInstr *&LastStore = MaybeDeadStores[StackSlot];
844 DEBUG(std::cerr << " Killed store:\t" << *LastStore);
846 MBB.erase(LastStore);
848 LastStore = next(MII);
850 // If the stack slot value was previously available in some other
851 // register, change it now. Otherwise, make the register available,
853 Spills.ModifyStackSlot(StackSlot);
854 Spills.ClobberPhysReg(PhysReg);
855 Spills.addAvailable(StackSlot, PhysReg);
866 llvm::Spiller* llvm::createSpiller() {
867 switch (SpillerOpt) {
868 default: assert(0 && "Unreachable!");
870 return new LocalSpiller();
872 return new SimpleSpiller();