1 //===-- TwoAddressInstructionPass.cpp - Two-Address instruction pass ------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the TwoAddress instruction pass which is used
11 // by most register allocators. Two-Address instructions are rewritten
21 // Note that if a register allocator chooses to use this pass, that it
22 // has to be capable of handling the non-SSA nature of these rewritten
25 // It is also worth noting that the duplicate operand of the two
26 // address instruction is removed.
28 //===----------------------------------------------------------------------===//
30 #define DEBUG_TYPE "twoaddrinstr"
31 #include "llvm/Function.h"
32 #include "llvm/CodeGen/Passes.h"
33 #include "llvm/CodeGen/LiveVariables.h"
34 #include "llvm/CodeGen/MachineFunctionPass.h"
35 #include "llvm/CodeGen/MachineInstr.h"
36 #include "llvm/CodeGen/SSARegMap.h"
37 #include "llvm/Target/MRegisterInfo.h"
38 #include "llvm/Target/TargetInstrInfo.h"
39 #include "llvm/Target/TargetMachine.h"
40 #include "Support/Debug.h"
41 #include "Support/Statistic.h"
42 #include "Support/STLExtras.h"
46 Statistic<> numTwoAddressInstrs("twoaddressinstruction",
47 "Number of two-address instructions");
48 Statistic<> numInstrsAdded("twoaddressinstruction",
49 "Number of instructions added");
51 struct TwoAddressInstructionPass : public MachineFunctionPass
53 virtual void getAnalysisUsage(AnalysisUsage &AU) const;
55 /// runOnMachineFunction - pass entry point
56 bool runOnMachineFunction(MachineFunction&);
59 RegisterPass<TwoAddressInstructionPass> X(
60 "twoaddressinstruction", "Two-Address instruction pass");
63 const PassInfo *llvm::TwoAddressInstructionPassID = X.getPassInfo();
65 void TwoAddressInstructionPass::getAnalysisUsage(AnalysisUsage &AU) const
67 AU.addPreserved<LiveVariables>();
68 AU.addPreservedID(PHIEliminationID);
69 MachineFunctionPass::getAnalysisUsage(AU);
72 /// runOnMachineFunction - Reduce two-address instructions to two
75 bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
76 DEBUG(std::cerr << "Machine Function\n");
77 const TargetMachine &TM = MF.getTarget();
78 const MRegisterInfo &MRI = *TM.getRegisterInfo();
79 const TargetInstrInfo &TII = *TM.getInstrInfo();
80 LiveVariables* LV = getAnalysisToUpdate<LiveVariables>();
82 bool MadeChange = false;
84 DEBUG(std::cerr << "********** REWRITING TWO-ADDR INSTRS **********\n");
85 DEBUG(std::cerr << "********** Function: "
86 << MF.getFunction()->getName() << '\n');
88 for (MachineFunction::iterator mbbi = MF.begin(), mbbe = MF.end();
89 mbbi != mbbe; ++mbbi) {
90 for (MachineBasicBlock::iterator mi = mbbi->begin(), me = mbbi->end();
92 unsigned opcode = mi->getOpcode();
94 // ignore if it is not a two-address instruction
95 if (!TII.isTwoAddrInstr(opcode))
98 ++numTwoAddressInstrs;
100 DEBUG(std::cerr << '\t'; mi->print(std::cerr, &TM));
102 assert(mi->getOperand(1).isRegister() &&
103 mi->getOperand(1).getReg() &&
104 mi->getOperand(1).isUse() &&
105 "two address instruction invalid");
107 // if the two operands are the same we just remove the use
108 // and mark the def as def&use
109 if (mi->getOperand(0).getReg() ==
110 mi->getOperand(1).getReg()) {
120 unsigned regA = mi->getOperand(0).getReg();
121 unsigned regB = mi->getOperand(1).getReg();
123 assert(MRegisterInfo::isVirtualRegister(regA) &&
124 MRegisterInfo::isVirtualRegister(regB) &&
125 "cannot update physical register live information");
127 // first make sure we do not have a use of a in the
128 // instruction (a = b + a for example) because our
129 // transformation will not work. This should never occur
130 // because we are in SSA form.
131 for (unsigned i = 1; i != mi->getNumOperands(); ++i)
132 assert(!mi->getOperand(i).isRegister() ||
133 mi->getOperand(i).getReg() != regA);
135 const TargetRegisterClass* rc =
136 MF.getSSARegMap()->getRegClass(regA);
137 unsigned Added = MRI.copyRegToReg(*mbbi, mi, regA, regB, rc);
138 numInstrsAdded += Added;
140 MachineBasicBlock::iterator prevMi = prior(mi);
141 DEBUG(std::cerr << "\t\tprepend:\t";
142 prevMi->print(std::cerr, &TM));
145 // update live variables for regA
147 "Cannot handle multi-instruction copies yet!");
148 LiveVariables::VarInfo& varInfo = LV->getVarInfo(regA);
149 varInfo.DefInst = prevMi;
151 // update live variables for regB
152 if (LV->removeVirtualRegisterKilled(regB, &*mbbi, mi))
153 LV->addVirtualRegisterKilled(regB, prevMi);
155 if (LV->removeVirtualRegisterDead(regB, &*mbbi, mi))
156 LV->addVirtualRegisterDead(regB, prevMi);
159 // replace all occurences of regB with regA
160 for (unsigned i = 1, e = mi->getNumOperands(); i != e; ++i) {
161 if (mi->getOperand(i).isRegister() &&
162 mi->getOperand(i).getReg() == regB)
163 mi->SetMachineOperandReg(i, regA);
167 assert(mi->getOperand(0).isDef());
168 mi->getOperand(0).setUse();
169 mi->RemoveOperand(1);
171 DEBUG(std::cerr << "\t\trewrite to:\t";
172 mi->print(std::cerr, &TM));