1 //===- StrongPhiElimination.cpp - Eliminate PHI nodes by inserting copies -===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This pass eliminates machine instruction PHI nodes by inserting copy
11 // instructions, using an intelligent copy-folding technique based on
12 // dominator information. This is technique is derived from:
14 // Budimlic, et al. Fast copy coalescing and live-range identification.
15 // In Proceedings of the ACM SIGPLAN 2002 Conference on Programming Language
16 // Design and Implementation (Berlin, Germany, June 17 - 19, 2002).
17 // PLDI '02. ACM, New York, NY, 25-32.
18 // DOI= http://doi.acm.org/10.1145/512529.512534
20 //===----------------------------------------------------------------------===//
22 #define DEBUG_TYPE "strongphielim"
23 #include "llvm/CodeGen/Passes.h"
24 #include "llvm/CodeGen/LiveIntervalAnalysis.h"
25 #include "llvm/CodeGen/MachineDominators.h"
26 #include "llvm/CodeGen/MachineFunctionPass.h"
27 #include "llvm/CodeGen/MachineInstr.h"
28 #include "llvm/CodeGen/MachineLoopInfo.h"
29 #include "llvm/CodeGen/MachineRegisterInfo.h"
30 #include "llvm/CodeGen/RegisterCoalescer.h"
31 #include "llvm/Target/TargetInstrInfo.h"
32 #include "llvm/Target/TargetMachine.h"
33 #include "llvm/ADT/DepthFirstIterator.h"
34 #include "llvm/ADT/Statistic.h"
35 #include "llvm/Support/Compiler.h"
39 struct VISIBILITY_HIDDEN StrongPHIElimination : public MachineFunctionPass {
40 static char ID; // Pass identification, replacement for typeid
41 StrongPHIElimination() : MachineFunctionPass((intptr_t)&ID) {}
43 // Waiting stores, for each MBB, the set of copies that need to
44 // be inserted into that MBB
45 DenseMap<MachineBasicBlock*,
46 std::map<unsigned, unsigned> > Waiting;
48 // Stacks holds the renaming stack for each register
49 std::map<unsigned, std::vector<unsigned> > Stacks;
51 // Registers in UsedByAnother are PHI nodes that are themselves
52 // used as operands to another another PHI node
53 std::set<unsigned> UsedByAnother;
55 // RenameSets are the is a map from a PHI-defined register
56 // to the input registers to be coalesced along with the
57 // predecessor block for those input registers.
58 std::map<unsigned, std::map<unsigned, MachineBasicBlock*> > RenameSets;
60 // PhiValueNumber holds the ID numbers of the VNs for each phi that we're
61 // eliminating, indexed by the register defined by that phi.
62 std::map<unsigned, unsigned> PhiValueNumber;
64 // Store the DFS-in number of each block
65 DenseMap<MachineBasicBlock*, unsigned> preorder;
67 // Store the DFS-out number of each block
68 DenseMap<MachineBasicBlock*, unsigned> maxpreorder;
70 bool runOnMachineFunction(MachineFunction &Fn);
72 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
73 AU.addRequired<MachineDominatorTree>();
74 AU.addRequired<LiveIntervals>();
76 // TODO: Actually make this true.
77 AU.addPreserved<LiveIntervals>();
78 AU.addPreserved<RegisterCoalescer>();
79 MachineFunctionPass::getAnalysisUsage(AU);
82 virtual void releaseMemory() {
88 UsedByAnother.clear();
94 /// DomForestNode - Represents a node in the "dominator forest". This is
95 /// a forest in which the nodes represent registers and the edges
96 /// represent a dominance relation in the block defining those registers.
97 struct DomForestNode {
99 // Store references to our children
100 std::vector<DomForestNode*> children;
101 // The register we represent
104 // Add another node as our child
105 void addChild(DomForestNode* DFN) { children.push_back(DFN); }
108 typedef std::vector<DomForestNode*>::iterator iterator;
110 // Create a DomForestNode by providing the register it represents, and
111 // the node to be its parent. The virtual root node has register 0
112 // and a null parent.
113 DomForestNode(unsigned r, DomForestNode* parent) : reg(r) {
115 parent->addChild(this);
119 for (iterator I = begin(), E = end(); I != E; ++I)
123 /// getReg - Return the regiser that this node represents
124 inline unsigned getReg() { return reg; }
126 // Provide iterator access to our children
127 inline DomForestNode::iterator begin() { return children.begin(); }
128 inline DomForestNode::iterator end() { return children.end(); }
131 void computeDFS(MachineFunction& MF);
132 void processBlock(MachineBasicBlock* MBB);
134 std::vector<DomForestNode*> computeDomForest(
135 std::map<unsigned, MachineBasicBlock*>& instrs,
136 MachineRegisterInfo& MRI);
137 void processPHIUnion(MachineInstr* Inst,
138 std::map<unsigned, MachineBasicBlock*>& PHIUnion,
139 std::vector<StrongPHIElimination::DomForestNode*>& DF,
140 std::vector<std::pair<unsigned, unsigned> >& locals);
141 void ScheduleCopies(MachineBasicBlock* MBB, std::set<unsigned>& pushed);
142 void InsertCopies(MachineDomTreeNode* MBB,
143 SmallPtrSet<MachineBasicBlock*, 16>& v);
144 void mergeLiveIntervals(unsigned primary, unsigned secondary,
145 MachineBasicBlock* pred);
149 char StrongPHIElimination::ID = 0;
150 static RegisterPass<StrongPHIElimination>
151 X("strong-phi-node-elimination",
152 "Eliminate PHI nodes for register allocation, intelligently");
154 const PassInfo *const llvm::StrongPHIEliminationID = &X;
156 /// computeDFS - Computes the DFS-in and DFS-out numbers of the dominator tree
157 /// of the given MachineFunction. These numbers are then used in other parts
158 /// of the PHI elimination process.
159 void StrongPHIElimination::computeDFS(MachineFunction& MF) {
160 SmallPtrSet<MachineDomTreeNode*, 8> frontier;
161 SmallPtrSet<MachineDomTreeNode*, 8> visited;
165 MachineDominatorTree& DT = getAnalysis<MachineDominatorTree>();
167 MachineDomTreeNode* node = DT.getRootNode();
169 std::vector<MachineDomTreeNode*> worklist;
170 worklist.push_back(node);
172 while (!worklist.empty()) {
173 MachineDomTreeNode* currNode = worklist.back();
175 if (!frontier.count(currNode)) {
176 frontier.insert(currNode);
178 preorder.insert(std::make_pair(currNode->getBlock(), time));
181 bool inserted = false;
182 for (MachineDomTreeNode::iterator I = currNode->begin(), E = currNode->end();
184 if (!frontier.count(*I) && !visited.count(*I)) {
185 worklist.push_back(*I);
191 frontier.erase(currNode);
192 visited.insert(currNode);
193 maxpreorder.insert(std::make_pair(currNode->getBlock(), time));
202 /// PreorderSorter - a helper class that is used to sort registers
203 /// according to the preorder number of their defining blocks
204 class PreorderSorter {
206 DenseMap<MachineBasicBlock*, unsigned>& preorder;
207 MachineRegisterInfo& MRI;
210 PreorderSorter(DenseMap<MachineBasicBlock*, unsigned>& p,
211 MachineRegisterInfo& M) : preorder(p), MRI(M) { }
213 bool operator()(unsigned A, unsigned B) {
217 MachineBasicBlock* ABlock = MRI.getVRegDef(A)->getParent();
218 MachineBasicBlock* BBlock = MRI.getVRegDef(B)->getParent();
220 if (preorder[ABlock] < preorder[BBlock])
222 else if (preorder[ABlock] > preorder[BBlock])
231 /// computeDomForest - compute the subforest of the DomTree corresponding
232 /// to the defining blocks of the registers in question
233 std::vector<StrongPHIElimination::DomForestNode*>
234 StrongPHIElimination::computeDomForest(
235 std::map<unsigned, MachineBasicBlock*>& regs,
236 MachineRegisterInfo& MRI) {
237 // Begin by creating a virtual root node, since the actual results
238 // may well be a forest. Assume this node has maximum DFS-out number.
239 DomForestNode* VirtualRoot = new DomForestNode(0, 0);
240 maxpreorder.insert(std::make_pair((MachineBasicBlock*)0, ~0UL));
242 // Populate a worklist with the registers
243 std::vector<unsigned> worklist;
244 worklist.reserve(regs.size());
245 for (std::map<unsigned, MachineBasicBlock*>::iterator I = regs.begin(),
246 E = regs.end(); I != E; ++I)
247 worklist.push_back(I->first);
249 // Sort the registers by the DFS-in number of their defining block
250 PreorderSorter PS(preorder, MRI);
251 std::sort(worklist.begin(), worklist.end(), PS);
253 // Create a "current parent" stack, and put the virtual root on top of it
254 DomForestNode* CurrentParent = VirtualRoot;
255 std::vector<DomForestNode*> stack;
256 stack.push_back(VirtualRoot);
258 // Iterate over all the registers in the previously computed order
259 for (std::vector<unsigned>::iterator I = worklist.begin(), E = worklist.end();
261 unsigned pre = preorder[MRI.getVRegDef(*I)->getParent()];
262 MachineBasicBlock* parentBlock = CurrentParent->getReg() ?
263 MRI.getVRegDef(CurrentParent->getReg())->getParent() :
266 // If the DFS-in number of the register is greater than the DFS-out number
267 // of the current parent, repeatedly pop the parent stack until it isn't.
268 while (pre > maxpreorder[parentBlock]) {
270 CurrentParent = stack.back();
272 parentBlock = CurrentParent->getReg() ?
273 MRI.getVRegDef(CurrentParent->getReg())->getParent() :
277 // Now that we've found the appropriate parent, create a DomForestNode for
278 // this register and attach it to the forest
279 DomForestNode* child = new DomForestNode(*I, CurrentParent);
281 // Push this new node on the "current parent" stack
282 stack.push_back(child);
283 CurrentParent = child;
286 // Return a vector containing the children of the virtual root node
287 std::vector<DomForestNode*> ret;
288 ret.insert(ret.end(), VirtualRoot->begin(), VirtualRoot->end());
292 /// isLiveIn - helper method that determines, from a regno, if a register
293 /// is live into a block
294 static bool isLiveIn(unsigned r, MachineBasicBlock* MBB,
296 LiveInterval& I = LI.getOrCreateInterval(r);
297 unsigned idx = LI.getMBBStartIdx(MBB);
298 return I.liveBeforeAndAt(idx);
301 /// isLiveOut - help method that determines, from a regno, if a register is
302 /// live out of a block.
303 static bool isLiveOut(unsigned r, MachineBasicBlock* MBB,
305 for (MachineBasicBlock::succ_iterator PI = MBB->succ_begin(),
306 E = MBB->succ_end(); PI != E; ++PI)
307 if (isLiveIn(r, *PI, LI))
313 /// interferes - checks for local interferences by scanning a block. The only
314 /// trick parameter is 'mode' which tells it the relationship of the two
315 /// registers. 0 - defined in the same block, 1 - first properly dominates
316 /// second, 2 - second properly dominates first
317 static bool interferes(unsigned a, unsigned b, MachineBasicBlock* scan,
318 LiveIntervals& LV, unsigned mode) {
319 MachineInstr* def = 0;
320 MachineInstr* kill = 0;
322 // The code is still in SSA form at this point, so there is only one
323 // definition per VReg. Thus we can safely use MRI->getVRegDef().
324 const MachineRegisterInfo* MRI = &scan->getParent()->getRegInfo();
326 bool interference = false;
328 // Wallk the block, checking for interferences
329 for (MachineBasicBlock::iterator MBI = scan->begin(), MBE = scan->end();
331 MachineInstr* curr = MBI;
333 // Same defining block...
335 if (curr == MRI->getVRegDef(a)) {
336 // If we find our first definition, save it
339 // If there's already an unkilled definition, then
340 // this is an interference
344 // If there's a definition followed by a KillInst, then
345 // they can't interfere
347 interference = false;
350 // Symmetric with the above
351 } else if (curr == MRI->getVRegDef(b)) {
358 interference = false;
361 // Store KillInsts if they match up with the definition
362 } else if (curr->killsRegister(a)) {
363 if (def == MRI->getVRegDef(a)) {
365 } else if (curr->killsRegister(b)) {
366 if (def == MRI->getVRegDef(b)) {
371 // First properly dominates second...
372 } else if (mode == 1) {
373 if (curr == MRI->getVRegDef(b)) {
374 // Definition of second without kill of first is an interference
378 // Definition after a kill is a non-interference
380 interference = false;
383 // Save KillInsts of First
384 } else if (curr->killsRegister(a)) {
387 // Symmetric with the above
388 } else if (mode == 2) {
389 if (curr == MRI->getVRegDef(a)) {
394 interference = false;
397 } else if (curr->killsRegister(b)) {
406 /// processBlock - Determine how to break up PHIs in the current block. Each
407 /// PHI is broken up by some combination of renaming its operands and inserting
408 /// copies. This method is responsible for determining which operands receive
410 void StrongPHIElimination::processBlock(MachineBasicBlock* MBB) {
411 LiveIntervals& LI = getAnalysis<LiveIntervals>();
412 MachineRegisterInfo& MRI = MBB->getParent()->getRegInfo();
414 // Holds names that have been added to a set in any PHI within this block
415 // before the current one.
416 std::set<unsigned> ProcessedNames;
418 // Iterate over all the PHI nodes in this block
419 MachineBasicBlock::iterator P = MBB->begin();
420 while (P != MBB->end() && P->getOpcode() == TargetInstrInfo::PHI) {
421 unsigned DestReg = P->getOperand(0).getReg();
424 // Don't both doing PHI elimination for dead PHI's.
425 if (P->registerDefIsDead(DestReg)) {
430 LiveInterval& PI = LI.getOrCreateInterval(DestReg);
431 unsigned pIdx = LI.getDefIndex(LI.getInstructionIndex(P));
432 VNInfo* PVN = PI.getLiveRangeContaining(pIdx)->valno;
433 PhiValueNumber.insert(std::make_pair(DestReg, PVN->id));
435 // PHIUnion is the set of incoming registers to the PHI node that
436 // are going to be renames rather than having copies inserted. This set
437 // is refinded over the course of this function. UnionedBlocks is the set
438 // of corresponding MBBs.
439 std::map<unsigned, MachineBasicBlock*> PHIUnion;
440 SmallPtrSet<MachineBasicBlock*, 8> UnionedBlocks;
442 // Iterate over the operands of the PHI node
443 for (int i = P->getNumOperands() - 1; i >= 2; i-=2) {
444 unsigned SrcReg = P->getOperand(i-1).getReg();
446 // Don't need to try to coalesce a register with itself.
447 if (SrcReg == DestReg) {
448 ProcessedNames.insert(SrcReg);
452 // Check for trivial interferences via liveness information, allowing us
453 // to avoid extra work later. Any registers that interfere cannot both
454 // be in the renaming set, so choose one and add copies for it instead.
455 // The conditions are:
456 // 1) if the operand is live into the PHI node's block OR
457 // 2) if the PHI node is live out of the operand's defining block OR
458 // 3) if the operand is itself a PHI node and the original PHI is
459 // live into the operand's defining block OR
460 // 4) if the operand is already being renamed for another PHI node
462 // 5) if any two operands are defined in the same block, insert copies
464 if (isLiveIn(SrcReg, P->getParent(), LI) ||
465 isLiveOut(P->getOperand(0).getReg(),
466 MRI.getVRegDef(SrcReg)->getParent(), LI) ||
467 ( MRI.getVRegDef(SrcReg)->getOpcode() == TargetInstrInfo::PHI &&
468 isLiveIn(P->getOperand(0).getReg(),
469 MRI.getVRegDef(SrcReg)->getParent(), LI) ) ||
470 ProcessedNames.count(SrcReg) ||
471 UnionedBlocks.count(MRI.getVRegDef(SrcReg)->getParent())) {
473 // Add a copy for the selected register
474 MachineBasicBlock* From = P->getOperand(i).getMBB();
475 Waiting[From].insert(std::make_pair(SrcReg, DestReg));
476 UsedByAnother.insert(SrcReg);
478 // Otherwise, add it to the renaming set
479 PHIUnion.insert(std::make_pair(SrcReg,P->getOperand(i).getMBB()));
480 UnionedBlocks.insert(MRI.getVRegDef(SrcReg)->getParent());
484 // Compute the dominator forest for the renaming set. This is a forest
485 // where the nodes are the registers and the edges represent dominance
486 // relations between the defining blocks of the registers
487 std::vector<StrongPHIElimination::DomForestNode*> DF =
488 computeDomForest(PHIUnion, MRI);
490 // Walk DomForest to resolve interferences at an inter-block level. This
491 // will remove registers from the renaming set (and insert copies for them)
492 // if interferences are found.
493 std::vector<std::pair<unsigned, unsigned> > localInterferences;
494 processPHIUnion(P, PHIUnion, DF, localInterferences);
496 // If one of the inputs is defined in the same block as the current PHI
497 // then we need to check for a local interference between that input and
499 for (std::map<unsigned, MachineBasicBlock*>::iterator I = PHIUnion.begin(),
500 E = PHIUnion.end(); I != E; ++I)
501 if (MRI.getVRegDef(I->first)->getParent() == P->getParent())
502 localInterferences.push_back(std::make_pair(I->first,
503 P->getOperand(0).getReg()));
505 // The dominator forest walk may have returned some register pairs whose
506 // interference cannot be determined from dominator analysis. We now
507 // examine these pairs for local interferences.
508 for (std::vector<std::pair<unsigned, unsigned> >::iterator I =
509 localInterferences.begin(), E = localInterferences.end(); I != E; ++I) {
510 std::pair<unsigned, unsigned> p = *I;
512 MachineDominatorTree& MDT = getAnalysis<MachineDominatorTree>();
514 // Determine the block we need to scan and the relationship between
516 MachineBasicBlock* scan = 0;
518 if (MRI.getVRegDef(p.first)->getParent() ==
519 MRI.getVRegDef(p.second)->getParent()) {
520 scan = MRI.getVRegDef(p.first)->getParent();
521 mode = 0; // Same block
522 } else if (MDT.dominates(MRI.getVRegDef(p.first)->getParent(),
523 MRI.getVRegDef(p.second)->getParent())) {
524 scan = MRI.getVRegDef(p.second)->getParent();
525 mode = 1; // First dominates second
527 scan = MRI.getVRegDef(p.first)->getParent();
528 mode = 2; // Second dominates first
531 // If there's an interference, we need to insert copies
532 if (interferes(p.first, p.second, scan, LI, mode)) {
533 // Insert copies for First
534 for (int i = P->getNumOperands() - 1; i >= 2; i-=2) {
535 if (P->getOperand(i-1).getReg() == p.first) {
536 unsigned SrcReg = p.first;
537 MachineBasicBlock* From = P->getOperand(i).getMBB();
539 Waiting[From].insert(std::make_pair(SrcReg,
540 P->getOperand(0).getReg()));
541 UsedByAnother.insert(SrcReg);
543 PHIUnion.erase(SrcReg);
549 // Add the renaming set for this PHI node to our overall renaming information
550 RenameSets.insert(std::make_pair(P->getOperand(0).getReg(), PHIUnion));
552 // Remember which registers are already renamed, so that we don't try to
553 // rename them for another PHI node in this block
554 for (std::map<unsigned, MachineBasicBlock*>::iterator I = PHIUnion.begin(),
555 E = PHIUnion.end(); I != E; ++I)
556 ProcessedNames.insert(I->first);
562 /// processPHIUnion - Take a set of candidate registers to be coalesced when
563 /// decomposing the PHI instruction. Use the DominanceForest to remove the ones
564 /// that are known to interfere, and flag others that need to be checked for
565 /// local interferences.
566 void StrongPHIElimination::processPHIUnion(MachineInstr* Inst,
567 std::map<unsigned, MachineBasicBlock*>& PHIUnion,
568 std::vector<StrongPHIElimination::DomForestNode*>& DF,
569 std::vector<std::pair<unsigned, unsigned> >& locals) {
571 std::vector<DomForestNode*> worklist(DF.begin(), DF.end());
572 SmallPtrSet<DomForestNode*, 4> visited;
574 // Code is still in SSA form, so we can use MRI::getVRegDef()
575 MachineRegisterInfo& MRI = Inst->getParent()->getParent()->getRegInfo();
577 LiveIntervals& LI = getAnalysis<LiveIntervals>();
578 unsigned DestReg = Inst->getOperand(0).getReg();
580 // DF walk on the DomForest
581 while (!worklist.empty()) {
582 DomForestNode* DFNode = worklist.back();
584 visited.insert(DFNode);
586 bool inserted = false;
587 for (DomForestNode::iterator CI = DFNode->begin(), CE = DFNode->end();
589 DomForestNode* child = *CI;
591 // If the current node is live-out of the defining block of one of its
592 // children, insert a copy for it. NOTE: The paper actually calls for
593 // a more elaborate heuristic for determining whether to insert copies
594 // for the child or the parent. In the interest of simplicity, we're
595 // just always choosing the parent.
596 if (isLiveOut(DFNode->getReg(),
597 MRI.getVRegDef(child->getReg())->getParent(), LI)) {
598 // Insert copies for parent
599 for (int i = Inst->getNumOperands() - 1; i >= 2; i-=2) {
600 if (Inst->getOperand(i-1).getReg() == DFNode->getReg()) {
601 unsigned SrcReg = DFNode->getReg();
602 MachineBasicBlock* From = Inst->getOperand(i).getMBB();
604 Waiting[From].insert(std::make_pair(SrcReg, DestReg));
605 UsedByAnother.insert(SrcReg);
607 PHIUnion.erase(SrcReg);
611 // If a node is live-in to the defining block of one of its children, but
612 // not live-out, then we need to scan that block for local interferences.
613 } else if (isLiveIn(DFNode->getReg(),
614 MRI.getVRegDef(child->getReg())->getParent(), LI) ||
615 MRI.getVRegDef(DFNode->getReg())->getParent() ==
616 MRI.getVRegDef(child->getReg())->getParent()) {
617 // Add (p, c) to possible local interferences
618 locals.push_back(std::make_pair(DFNode->getReg(), child->getReg()));
621 if (!visited.count(child)) {
622 worklist.push_back(child);
627 if (!inserted) worklist.pop_back();
631 /// ScheduleCopies - Insert copies into predecessor blocks, scheduling
632 /// them properly so as to avoid the 'lost copy' and the 'virtual swap'
635 /// Based on "Practical Improvements to the Construction and Destruction
636 /// of Static Single Assignment Form" by Briggs, et al.
637 void StrongPHIElimination::ScheduleCopies(MachineBasicBlock* MBB,
638 std::set<unsigned>& pushed) {
639 // FIXME: This function needs to update LiveIntervals
640 std::map<unsigned, unsigned>& copy_set= Waiting[MBB];
642 std::map<unsigned, unsigned> worklist;
643 std::map<unsigned, unsigned> map;
645 // Setup worklist of initial copies
646 for (std::map<unsigned, unsigned>::iterator I = copy_set.begin(),
647 E = copy_set.end(); I != E; ) {
648 map.insert(std::make_pair(I->first, I->first));
649 map.insert(std::make_pair(I->second, I->second));
651 if (!UsedByAnother.count(I->second)) {
654 // Avoid iterator invalidation
655 unsigned first = I->first;
657 copy_set.erase(first);
663 LiveIntervals& LI = getAnalysis<LiveIntervals>();
664 MachineFunction* MF = MBB->getParent();
665 MachineRegisterInfo& MRI = MF->getRegInfo();
666 const TargetInstrInfo *TII = MF->getTarget().getInstrInfo();
668 SmallVector<std::pair<unsigned, MachineInstr*>, 4> InsertedPHIDests;
670 // Iterate over the worklist, inserting copies
671 while (!worklist.empty() || !copy_set.empty()) {
672 while (!worklist.empty()) {
673 std::pair<unsigned, unsigned> curr = *worklist.begin();
674 worklist.erase(curr.first);
676 const TargetRegisterClass *RC = MF->getRegInfo().getRegClass(curr.first);
678 if (isLiveOut(curr.second, MBB, LI)) {
679 // Create a temporary
680 unsigned t = MF->getRegInfo().createVirtualRegister(RC);
682 // Insert copy from curr.second to a temporary at
683 // the Phi defining curr.second
684 MachineBasicBlock::iterator PI = MRI.getVRegDef(curr.second);
685 TII->copyRegToReg(*PI->getParent(), PI, t,
686 curr.second, RC, RC);
688 // Push temporary on Stacks
689 Stacks[curr.second].push_back(t);
691 // Insert curr.second in pushed
692 pushed.insert(curr.second);
694 // Create a live interval for this temporary
695 InsertedPHIDests.push_back(std::make_pair(t, --PI));
698 // Insert copy from map[curr.first] to curr.second
699 TII->copyRegToReg(*MBB, MBB->getFirstTerminator(), curr.second,
700 map[curr.first], RC, RC);
701 map[curr.first] = curr.second;
703 // Push this copy onto InsertedPHICopies so we can
704 // update LiveIntervals with it.
705 MachineBasicBlock::iterator MI = MBB->getFirstTerminator();
706 InsertedPHIDests.push_back(std::make_pair(curr.second, --MI));
708 // If curr.first is a destination in copy_set...
709 for (std::map<unsigned, unsigned>::iterator I = copy_set.begin(),
710 E = copy_set.end(); I != E; )
711 if (curr.first == I->second) {
712 std::pair<unsigned, unsigned> temp = *I;
714 // Avoid iterator invalidation
716 copy_set.erase(temp.first);
717 worklist.insert(temp);
725 if (!copy_set.empty()) {
726 std::pair<unsigned, unsigned> curr = *copy_set.begin();
727 copy_set.erase(curr.first);
729 const TargetRegisterClass *RC = MF->getRegInfo().getRegClass(curr.first);
731 // Insert a copy from dest to a new temporary t at the end of b
732 unsigned t = MF->getRegInfo().createVirtualRegister(RC);
733 TII->copyRegToReg(*MBB, MBB->getFirstTerminator(), t,
734 curr.second, RC, RC);
735 map[curr.second] = t;
737 worklist.insert(curr);
741 // Renumber the instructions so that we can perform the index computations
742 // needed to create new live intervals.
743 LI.computeNumbering();
745 // For copies that we inserted at the ends of predecessors, we construct
746 // live intervals. This is pretty easy, since we know that the destination
747 // register cannot have be in live at that point previously. We just have
748 // to make sure that, for registers that serve as inputs to more than one
749 // PHI, we don't create multiple overlapping live intervals.
750 std::set<unsigned> RegHandled;
751 for (SmallVector<std::pair<unsigned, MachineInstr*>, 4>::iterator I =
752 InsertedPHIDests.begin(), E = InsertedPHIDests.end(); I != E; ++I)
753 if (RegHandled.insert(I->first).second &&
754 !LI.getOrCreateInterval(I->first).liveAt(
755 LI.getMBBEndIdx(I->second->getParent())))
756 LI.addLiveRangeToEndOfBlock(I->first, I->second);
759 /// InsertCopies - insert copies into MBB and all of its successors
760 void StrongPHIElimination::InsertCopies(MachineDomTreeNode* MDTN,
761 SmallPtrSet<MachineBasicBlock*, 16>& visited) {
762 MachineBasicBlock* MBB = MDTN->getBlock();
765 std::set<unsigned> pushed;
767 LiveIntervals& LI = getAnalysis<LiveIntervals>();
768 // Rewrite register uses from Stacks
769 for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end();
771 if (I->getOpcode() == TargetInstrInfo::PHI)
774 for (unsigned i = 0; i < I->getNumOperands(); ++i)
775 if (I->getOperand(i).isRegister() &&
776 Stacks[I->getOperand(i).getReg()].size()) {
777 // Remove the live range for the old vreg.
778 LiveInterval& OldInt = LI.getInterval(I->getOperand(i).getReg());
779 LiveInterval::iterator OldLR = OldInt.FindLiveRangeContaining(
780 LiveIntervals::getUseIndex(LI.getInstructionIndex(I)));
781 if (OldLR != OldInt.end())
782 OldInt.removeRange(*OldLR, true);
784 // Change the register
785 I->getOperand(i).setReg(Stacks[I->getOperand(i).getReg()].back());
787 // Add a live range for the new vreg
788 LiveInterval& Int = LI.getInterval(I->getOperand(i).getReg());
789 VNInfo* FirstVN = *Int.vni_begin();
790 FirstVN->hasPHIKill = false;
791 if (I->getOperand(i).isKill())
792 FirstVN->kills.push_back(
793 LiveIntervals::getUseIndex(LI.getInstructionIndex(I)));
795 LiveRange LR (LI.getMBBStartIdx(I->getParent()),
796 LiveIntervals::getUseIndex(LI.getInstructionIndex(I)),
803 // Schedule the copies for this block
804 ScheduleCopies(MBB, pushed);
806 // Recur down the dominator tree.
807 for (MachineDomTreeNode::iterator I = MDTN->begin(),
808 E = MDTN->end(); I != E; ++I)
809 if (!visited.count((*I)->getBlock()))
810 InsertCopies(*I, visited);
812 // As we exit this block, pop the names we pushed while processing it
813 for (std::set<unsigned>::iterator I = pushed.begin(),
814 E = pushed.end(); I != E; ++I)
815 Stacks[*I].pop_back();
818 void StrongPHIElimination::mergeLiveIntervals(unsigned primary,
820 MachineBasicBlock* pred) {
822 LiveIntervals& LI = getAnalysis<LiveIntervals>();
823 LiveInterval& LHS = LI.getOrCreateInterval(primary);
824 LiveInterval& RHS = LI.getOrCreateInterval(secondary);
826 LI.computeNumbering();
827 const LiveRange* RangeMergingIn =
828 RHS.getLiveRangeContaining(LI.getMBBEndIdx(pred));
829 VNInfo* RHSVN = RangeMergingIn->valno;
830 VNInfo* NewVN = LHS.getNextValue(RangeMergingIn->valno->def,
831 RangeMergingIn->valno->copy,
832 LI.getVNInfoAllocator());
834 // If we discover that a live range was defined by a two-addr
835 // instruction, we need to merge over the input as well, even if
836 // it has a different VNInfo.
837 SmallPtrSet<VNInfo*, 4> MergedVNs;
838 MergedVNs.insert(RHSVN);
840 DenseMap<VNInfo*, VNInfo*> VNMap;
841 VNMap.insert(std::make_pair(RangeMergingIn->valno, NewVN));
843 // Find all VNs that are the inputs to two-address instructiosn
844 // chaining upwards from the VN we're trying to merge.
848 unsigned defIndex = RHSVN->def;
850 if (defIndex != ~0U) {
851 MachineInstr* instr = LI.getInstructionFromIndex(defIndex);
853 for (unsigned i = 0; i < instr->getNumOperands(); ++i) {
854 if (instr->getOperand(i).isReg() &&
855 instr->getOperand(i).getReg() == secondary)
856 if (instr->isRegReDefinedByTwoAddr(secondary, i)) {
857 RHSVN = RHS.getLiveRangeContaining(defIndex-1)->valno;
860 VNInfo* NextVN = LHS.getNextValue(RHSVN->def,
862 LI.getVNInfoAllocator());
863 VNMap.insert(std::make_pair(RHSVN, NextVN));
871 // Merge VNs from RHS into LHS using the mapping we computed above.
872 for (DenseMap<VNInfo*, VNInfo*>::iterator VI = VNMap.begin(),
873 VE = VNMap.end(); VI != VE; ++VI) {
874 LHS.MergeValueInAsValue(RHS, VI->first, VI->second);
875 RHS.removeValNo(VI->first);
878 if (RHS.begin() == RHS.end())
879 LI.removeInterval(RHS.reg);
882 bool StrongPHIElimination::runOnMachineFunction(MachineFunction &Fn) {
883 LiveIntervals& LI = getAnalysis<LiveIntervals>();
885 // Compute DFS numbers of each block
888 // Determine which phi node operands need copies
889 for (MachineFunction::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I)
891 I->begin()->getOpcode() == TargetInstrInfo::PHI)
894 // Break interferences where two different phis want to coalesce
895 // in the same register.
896 std::set<unsigned> seen;
897 typedef std::map<unsigned, std::map<unsigned, MachineBasicBlock*> >
899 for (RenameSetType::iterator I = RenameSets.begin(), E = RenameSets.end();
901 for (std::map<unsigned, MachineBasicBlock*>::iterator
902 OI = I->second.begin(), OE = I->second.end(); OI != OE; ) {
903 if (!seen.count(OI->first)) {
904 seen.insert(OI->first);
907 Waiting[OI->second].insert(std::make_pair(OI->first, I->first));
908 unsigned reg = OI->first;
910 I->second.erase(reg);
916 // FIXME: This process should probably preserve LiveIntervals
917 SmallPtrSet<MachineBasicBlock*, 16> visited;
918 MachineDominatorTree& MDT = getAnalysis<MachineDominatorTree>();
919 InsertCopies(MDT.getRootNode(), visited);
922 for (RenameSetType::iterator I = RenameSets.begin(), E = RenameSets.end();
924 while (I->second.size()) {
925 std::map<unsigned, MachineBasicBlock*>::iterator SI = I->second.begin();
927 if (SI->first != I->first) {
928 mergeLiveIntervals(I->first, SI->first, SI->second);
929 Fn.getRegInfo().replaceRegWith(SI->first, I->first);
931 if (RenameSets.count(SI->first)) {
932 I->second.insert(RenameSets[SI->first].begin(),
933 RenameSets[SI->first].end());
934 RenameSets.erase(SI->first);
938 I->second.erase(SI->first);
941 // FIXME: Insert last-minute copies
944 std::vector<MachineInstr*> phis;
945 for (MachineFunction::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I) {
946 for (MachineBasicBlock::iterator BI = I->begin(), BE = I->end();
948 if (BI->getOpcode() == TargetInstrInfo::PHI)
952 for (std::vector<MachineInstr*>::iterator I = phis.begin(), E = phis.end();
954 MachineInstr* PInstr = *(I++);
956 // If this is a dead PHI node, then remove it from LiveIntervals.
957 unsigned DestReg = PInstr->getOperand(0).getReg();
958 LiveInterval& PI = LI.getInterval(DestReg);
959 if (PInstr->registerDefIsDead(DestReg)) {
960 if (PI.containsOneValue()) {
961 LI.removeInterval(DestReg);
963 unsigned idx = LI.getDefIndex(LI.getInstructionIndex(PInstr));
964 PI.removeRange(*PI.getLiveRangeContaining(idx), true);
967 // Trim live intervals of input registers. They are no longer live into
968 // this block if they died after the PHI. If they lived after it, don't
969 // trim them because they might have other legitimate uses.
970 for (unsigned i = 1; i < PInstr->getNumOperands(); i += 2) {
971 unsigned reg = PInstr->getOperand(i).getReg();
973 MachineBasicBlock* MBB = PInstr->getOperand(i+1).getMBB();
974 LiveInterval& InputI = LI.getInterval(reg);
975 if (MBB != PInstr->getParent() &&
976 InputI.liveAt(LI.getMBBStartIdx(PInstr->getParent())) &&
977 InputI.expiredAt(LI.getInstructionIndex(PInstr) +
978 LiveIntervals::InstrSlots::NUM))
979 InputI.removeRange(LI.getMBBStartIdx(PInstr->getParent()),
980 LI.getInstructionIndex(PInstr),
984 // If the PHI is not dead, then the valno defined by the PHI
985 // now has an unknown def.
986 unsigned idx = LI.getDefIndex(LI.getInstructionIndex(PInstr));
987 const LiveRange* PLR = PI.getLiveRangeContaining(idx);
988 PLR->valno->def = ~0U;
989 LiveRange R (LI.getMBBStartIdx(PInstr->getParent()),
990 PLR->start, PLR->valno);
994 LI.RemoveMachineInstrFromMaps(PInstr);
995 PInstr->eraseFromParent();
998 LI.computeNumbering();