1 //===-- StackSlotColoring.cpp - Stack slot coloring pass. -----------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the stack slot coloring pass.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "stackcoloring"
15 #include "VirtRegMap.h"
16 #include "llvm/Function.h"
17 #include "llvm/Module.h"
18 #include "llvm/CodeGen/Passes.h"
19 #include "llvm/CodeGen/LiveIntervalAnalysis.h"
20 #include "llvm/CodeGen/LiveStackAnalysis.h"
21 #include "llvm/CodeGen/MachineFrameInfo.h"
22 #include "llvm/CodeGen/MachineLoopInfo.h"
23 #include "llvm/CodeGen/MachineMemOperand.h"
24 #include "llvm/CodeGen/MachineRegisterInfo.h"
25 #include "llvm/CodeGen/PseudoSourceValue.h"
26 #include "llvm/Support/CommandLine.h"
27 #include "llvm/Support/Debug.h"
28 #include "llvm/Target/TargetInstrInfo.h"
29 #include "llvm/Target/TargetMachine.h"
30 #include "llvm/ADT/BitVector.h"
31 #include "llvm/ADT/SmallSet.h"
32 #include "llvm/ADT/SmallVector.h"
33 #include "llvm/ADT/Statistic.h"
38 DisableSharing("no-stack-slot-sharing",
39 cl::init(false), cl::Hidden,
40 cl::desc("Suppress slot sharing during stack coloring"));
43 ColorWithRegsOpt("color-ss-with-regs",
44 cl::init(false), cl::Hidden,
45 cl::desc("Color stack slots with free registers"));
48 static cl::opt<int> DCELimit("ssc-dce-limit", cl::init(-1), cl::Hidden);
50 STATISTIC(NumEliminated, "Number of stack slots eliminated due to coloring");
51 STATISTIC(NumRegRepl, "Number of stack slot refs replaced with reg refs");
52 STATISTIC(NumLoadElim, "Number of loads eliminated");
53 STATISTIC(NumStoreElim, "Number of stores eliminated");
54 STATISTIC(NumDead, "Number of trivially dead stack accesses eliminated");
57 class StackSlotColoring : public MachineFunctionPass {
61 MachineFrameInfo *MFI;
62 MachineRegisterInfo *MRI;
63 const TargetInstrInfo *TII;
64 const TargetRegisterInfo *TRI;
65 const MachineLoopInfo *loopInfo;
67 // SSIntervals - Spill slot intervals.
68 std::vector<LiveInterval*> SSIntervals;
70 // SSRefs - Keep a list of frame index references for each spill slot.
71 SmallVector<SmallVector<MachineInstr*, 8>, 16> SSRefs;
73 // OrigAlignments - Alignments of stack objects before coloring.
74 SmallVector<unsigned, 16> OrigAlignments;
76 // OrigSizes - Sizess of stack objects before coloring.
77 SmallVector<unsigned, 16> OrigSizes;
79 // AllColors - If index is set, it's a spill slot, i.e. color.
80 // FIXME: This assumes PEI locate spill slot with smaller indices
81 // closest to stack pointer / frame pointer. Therefore, smaller
82 // index == better color.
85 // NextColor - Next "color" that's not yet used.
88 // UsedColors - "Colors" that have been assigned.
91 // Assignments - Color to intervals mapping.
92 SmallVector<SmallVector<LiveInterval*,4>, 16> Assignments;
95 static char ID; // Pass identification
97 MachineFunctionPass(&ID), ColorWithRegs(false), NextColor(-1) {}
98 StackSlotColoring(bool RegColor) :
99 MachineFunctionPass(&ID), ColorWithRegs(RegColor), NextColor(-1) {}
101 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
102 AU.setPreservesCFG();
103 AU.addRequired<SlotIndexes>();
104 AU.addPreserved<SlotIndexes>();
105 AU.addRequired<LiveStacks>();
106 AU.addRequired<VirtRegMap>();
107 AU.addPreserved<VirtRegMap>();
108 AU.addRequired<MachineLoopInfo>();
109 AU.addPreserved<MachineLoopInfo>();
110 AU.addPreservedID(MachineDominatorsID);
111 MachineFunctionPass::getAnalysisUsage(AU);
114 virtual bool runOnMachineFunction(MachineFunction &MF);
115 virtual const char* getPassName() const {
116 return "Stack Slot Coloring";
120 void InitializeSlots();
121 bool CheckForSetJmpCall(const MachineFunction &MF) const;
122 void ScanForSpillSlotRefs(MachineFunction &MF);
123 bool OverlapWithAssignments(LiveInterval *li, int Color) const;
124 int ColorSlot(LiveInterval *li);
125 bool ColorSlots(MachineFunction &MF);
126 bool ColorSlotsWithFreeRegs(SmallVector<int, 16> &SlotMapping,
127 SmallVector<SmallVector<int, 4>, 16> &RevMap,
128 BitVector &SlotIsReg);
129 void RewriteInstruction(MachineInstr *MI, int OldFI, int NewFI,
130 MachineFunction &MF);
131 bool PropagateBackward(MachineBasicBlock::iterator MII,
132 MachineBasicBlock *MBB,
133 unsigned OldReg, unsigned NewReg);
134 bool PropagateForward(MachineBasicBlock::iterator MII,
135 MachineBasicBlock *MBB,
136 unsigned OldReg, unsigned NewReg);
137 void UnfoldAndRewriteInstruction(MachineInstr *MI, int OldFI,
138 unsigned Reg, const TargetRegisterClass *RC,
139 SmallSet<unsigned, 4> &Defs,
140 MachineFunction &MF);
141 bool AllMemRefsCanBeUnfolded(int SS);
142 bool RemoveDeadStores(MachineBasicBlock* MBB);
144 } // end anonymous namespace
146 char StackSlotColoring::ID = 0;
148 static RegisterPass<StackSlotColoring>
149 X("stack-slot-coloring", "Stack Slot Coloring");
151 FunctionPass *llvm::createStackSlotColoringPass(bool RegColor) {
152 return new StackSlotColoring(RegColor);
156 // IntervalSorter - Comparison predicate that sort live intervals by
158 struct IntervalSorter {
159 bool operator()(LiveInterval* LHS, LiveInterval* RHS) const {
160 return LHS->weight > RHS->weight;
165 /// ScanForSpillSlotRefs - Scan all the machine instructions for spill slot
166 /// references and update spill slot weights.
167 void StackSlotColoring::ScanForSpillSlotRefs(MachineFunction &MF) {
168 SSRefs.resize(MFI->getObjectIndexEnd());
170 // FIXME: Need the equivalent of MachineRegisterInfo for frameindex operands.
171 for (MachineFunction::iterator MBBI = MF.begin(), E = MF.end();
173 MachineBasicBlock *MBB = &*MBBI;
174 unsigned loopDepth = loopInfo->getLoopDepth(MBB);
175 for (MachineBasicBlock::iterator MII = MBB->begin(), EE = MBB->end();
177 MachineInstr *MI = &*MII;
178 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
179 MachineOperand &MO = MI->getOperand(i);
182 int FI = MO.getIndex();
185 if (!LS->hasInterval(FI))
187 LiveInterval &li = LS->getInterval(FI);
188 if (!MI->isDebugValue())
189 li.weight += LiveIntervals::getSpillWeight(false, true, loopDepth);
190 SSRefs[FI].push_back(MI);
196 /// InitializeSlots - Process all spill stack slot liveintervals and add them
197 /// to a sorted (by weight) list.
198 void StackSlotColoring::InitializeSlots() {
199 int LastFI = MFI->getObjectIndexEnd();
200 OrigAlignments.resize(LastFI);
201 OrigSizes.resize(LastFI);
202 AllColors.resize(LastFI);
203 UsedColors.resize(LastFI);
204 Assignments.resize(LastFI);
206 // Gather all spill slots into a list.
207 DEBUG(dbgs() << "Spill slot intervals:\n");
208 for (LiveStacks::iterator i = LS->begin(), e = LS->end(); i != e; ++i) {
209 LiveInterval &li = i->second;
211 int FI = li.getStackSlotIndex();
212 if (MFI->isDeadObjectIndex(FI))
214 SSIntervals.push_back(&li);
215 OrigAlignments[FI] = MFI->getObjectAlignment(FI);
216 OrigSizes[FI] = MFI->getObjectSize(FI);
219 DEBUG(dbgs() << '\n');
221 // Sort them by weight.
222 std::stable_sort(SSIntervals.begin(), SSIntervals.end(), IntervalSorter());
224 // Get first "color".
225 NextColor = AllColors.find_first();
228 /// OverlapWithAssignments - Return true if LiveInterval overlaps with any
229 /// LiveIntervals that have already been assigned to the specified color.
231 StackSlotColoring::OverlapWithAssignments(LiveInterval *li, int Color) const {
232 const SmallVector<LiveInterval*,4> &OtherLIs = Assignments[Color];
233 for (unsigned i = 0, e = OtherLIs.size(); i != e; ++i) {
234 LiveInterval *OtherLI = OtherLIs[i];
235 if (OtherLI->overlaps(*li))
241 /// ColorSlotsWithFreeRegs - If there are any free registers available, try
242 /// replacing spill slots references with registers instead.
244 StackSlotColoring::ColorSlotsWithFreeRegs(SmallVector<int, 16> &SlotMapping,
245 SmallVector<SmallVector<int, 4>, 16> &RevMap,
246 BitVector &SlotIsReg) {
247 if (!(ColorWithRegs || ColorWithRegsOpt) || !VRM->HasUnusedRegisters())
250 bool Changed = false;
251 DEBUG(dbgs() << "Assigning unused registers to spill slots:\n");
252 for (unsigned i = 0, e = SSIntervals.size(); i != e; ++i) {
253 LiveInterval *li = SSIntervals[i];
254 int SS = li->getStackSlotIndex();
255 if (!UsedColors[SS] || li->weight < 20)
256 // If the weight is < 20, i.e. two references in a loop with depth 1,
257 // don't bother with it.
260 // These slots allow to share the same registers.
261 bool AllColored = true;
262 SmallVector<unsigned, 4> ColoredRegs;
263 for (unsigned j = 0, ee = RevMap[SS].size(); j != ee; ++j) {
264 int RSS = RevMap[SS][j];
265 const TargetRegisterClass *RC = LS->getIntervalRegClass(RSS);
266 // If it's not colored to another stack slot, try coloring it
267 // to a "free" register.
272 unsigned Reg = VRM->getFirstUnusedRegister(RC);
277 if (!AllMemRefsCanBeUnfolded(RSS)) {
281 DEBUG(dbgs() << "Assigning fi#" << RSS << " to "
282 << TRI->getName(Reg) << '\n');
283 ColoredRegs.push_back(Reg);
284 SlotMapping[RSS] = Reg;
290 // Register and its sub-registers are no longer free.
291 while (!ColoredRegs.empty()) {
292 unsigned Reg = ColoredRegs.back();
293 ColoredRegs.pop_back();
294 VRM->setRegisterUsed(Reg);
295 // If reg is a callee-saved register, it will have to be spilled in
297 MRI->setPhysRegUsed(Reg);
298 for (const unsigned *AS = TRI->getAliasSet(Reg); *AS; ++AS) {
299 VRM->setRegisterUsed(*AS);
300 MRI->setPhysRegUsed(*AS);
303 // This spill slot is dead after the rewrites
305 MFI->RemoveStackObject(SS);
309 DEBUG(dbgs() << '\n');
314 /// ColorSlot - Assign a "color" (stack slot) to the specified stack slot.
316 int StackSlotColoring::ColorSlot(LiveInterval *li) {
319 if (!DisableSharing) {
320 // Check if it's possible to reuse any of the used colors.
321 Color = UsedColors.find_first();
322 while (Color != -1) {
323 if (!OverlapWithAssignments(li, Color)) {
328 Color = UsedColors.find_next(Color);
332 // Assign it to the first available color (assumed to be the best) if it's
333 // not possible to share a used color with other objects.
335 assert(NextColor != -1 && "No more spill slots?");
337 UsedColors.set(Color);
338 NextColor = AllColors.find_next(NextColor);
341 // Record the assignment.
342 Assignments[Color].push_back(li);
343 int FI = li->getStackSlotIndex();
344 DEBUG(dbgs() << "Assigning fi#" << FI << " to fi#" << Color << "\n");
346 // Change size and alignment of the allocated slot. If there are multiple
347 // objects sharing the same slot, then make sure the size and alignment
348 // are large enough for all.
349 unsigned Align = OrigAlignments[FI];
350 if (!Share || Align > MFI->getObjectAlignment(Color))
351 MFI->setObjectAlignment(Color, Align);
352 int64_t Size = OrigSizes[FI];
353 if (!Share || Size > MFI->getObjectSize(Color))
354 MFI->setObjectSize(Color, Size);
358 /// Colorslots - Color all spill stack slots and rewrite all frameindex machine
359 /// operands in the function.
360 bool StackSlotColoring::ColorSlots(MachineFunction &MF) {
361 unsigned NumObjs = MFI->getObjectIndexEnd();
362 SmallVector<int, 16> SlotMapping(NumObjs, -1);
363 SmallVector<float, 16> SlotWeights(NumObjs, 0.0);
364 SmallVector<SmallVector<int, 4>, 16> RevMap(NumObjs);
365 BitVector SlotIsReg(NumObjs);
366 BitVector UsedColors(NumObjs);
368 DEBUG(dbgs() << "Color spill slot intervals:\n");
369 bool Changed = false;
370 for (unsigned i = 0, e = SSIntervals.size(); i != e; ++i) {
371 LiveInterval *li = SSIntervals[i];
372 int SS = li->getStackSlotIndex();
373 int NewSS = ColorSlot(li);
374 assert(NewSS >= 0 && "Stack coloring failed?");
375 SlotMapping[SS] = NewSS;
376 RevMap[NewSS].push_back(SS);
377 SlotWeights[NewSS] += li->weight;
378 UsedColors.set(NewSS);
379 Changed |= (SS != NewSS);
382 DEBUG(dbgs() << "\nSpill slots after coloring:\n");
383 for (unsigned i = 0, e = SSIntervals.size(); i != e; ++i) {
384 LiveInterval *li = SSIntervals[i];
385 int SS = li->getStackSlotIndex();
386 li->weight = SlotWeights[SS];
388 // Sort them by new weight.
389 std::stable_sort(SSIntervals.begin(), SSIntervals.end(), IntervalSorter());
392 for (unsigned i = 0, e = SSIntervals.size(); i != e; ++i)
393 DEBUG(SSIntervals[i]->dump());
394 DEBUG(dbgs() << '\n');
397 // Can we "color" a stack slot with a unused register?
398 Changed |= ColorSlotsWithFreeRegs(SlotMapping, RevMap, SlotIsReg);
403 // Rewrite all MO_FrameIndex operands.
404 SmallVector<SmallSet<unsigned, 4>, 4> NewDefs(MF.getNumBlockIDs());
405 for (unsigned SS = 0, SE = SSRefs.size(); SS != SE; ++SS) {
406 bool isReg = SlotIsReg[SS];
407 int NewFI = SlotMapping[SS];
408 if (NewFI == -1 || (NewFI == (int)SS && !isReg))
411 const TargetRegisterClass *RC = LS->getIntervalRegClass(SS);
412 SmallVector<MachineInstr*, 8> &RefMIs = SSRefs[SS];
413 for (unsigned i = 0, e = RefMIs.size(); i != e; ++i)
415 RewriteInstruction(RefMIs[i], SS, NewFI, MF);
417 // Rewrite to use a register instead.
418 unsigned MBBId = RefMIs[i]->getParent()->getNumber();
419 SmallSet<unsigned, 4> &Defs = NewDefs[MBBId];
420 UnfoldAndRewriteInstruction(RefMIs[i], SS, NewFI, RC, Defs, MF);
424 // Delete unused stack slots.
425 while (NextColor != -1) {
426 DEBUG(dbgs() << "Removing unused stack object fi#" << NextColor << "\n");
427 MFI->RemoveStackObject(NextColor);
428 NextColor = AllColors.find_next(NextColor);
434 /// AllMemRefsCanBeUnfolded - Return true if all references of the specified
435 /// spill slot index can be unfolded.
436 bool StackSlotColoring::AllMemRefsCanBeUnfolded(int SS) {
437 SmallVector<MachineInstr*, 8> &RefMIs = SSRefs[SS];
438 for (unsigned i = 0, e = RefMIs.size(); i != e; ++i) {
439 MachineInstr *MI = RefMIs[i];
440 if (TII->isLoadFromStackSlot(MI, SS) ||
441 TII->isStoreToStackSlot(MI, SS))
442 // Restore and spill will become copies.
444 if (!TII->getOpcodeAfterMemoryUnfold(MI->getOpcode(), false, false))
446 for (unsigned j = 0, ee = MI->getNumOperands(); j != ee; ++j) {
447 MachineOperand &MO = MI->getOperand(j);
448 if (MO.isFI() && MO.getIndex() != SS)
449 // If it uses another frameindex, we can, currently* unfold it.
456 /// RewriteInstruction - Rewrite specified instruction by replacing references
457 /// to old frame index with new one.
458 void StackSlotColoring::RewriteInstruction(MachineInstr *MI, int OldFI,
459 int NewFI, MachineFunction &MF) {
460 // Update the operands.
461 for (unsigned i = 0, ee = MI->getNumOperands(); i != ee; ++i) {
462 MachineOperand &MO = MI->getOperand(i);
465 int FI = MO.getIndex();
471 // Update the memory references. This changes the MachineMemOperands
472 // directly. They may be in use by multiple instructions, however all
473 // instructions using OldFI are being rewritten to use NewFI.
474 const Value *OldSV = PseudoSourceValue::getFixedStack(OldFI);
475 const Value *NewSV = PseudoSourceValue::getFixedStack(NewFI);
476 for (MachineInstr::mmo_iterator I = MI->memoperands_begin(),
477 E = MI->memoperands_end(); I != E; ++I)
478 if ((*I)->getValue() == OldSV)
479 (*I)->setValue(NewSV);
482 /// PropagateBackward - Traverse backward and look for the definition of
483 /// OldReg. If it can successfully update all of the references with NewReg,
484 /// do so and return true.
485 bool StackSlotColoring::PropagateBackward(MachineBasicBlock::iterator MII,
486 MachineBasicBlock *MBB,
487 unsigned OldReg, unsigned NewReg) {
488 if (MII == MBB->begin())
491 SmallVector<MachineOperand*, 4> Uses;
492 SmallVector<MachineOperand*, 4> Refs;
493 while (--MII != MBB->begin()) {
494 bool FoundDef = false; // Not counting 2address def.
497 const TargetInstrDesc &TID = MII->getDesc();
498 for (unsigned i = 0, e = MII->getNumOperands(); i != e; ++i) {
499 MachineOperand &MO = MII->getOperand(i);
502 unsigned Reg = MO.getReg();
509 // Abort the use is actually a sub-register def. We don't have enough
510 // information to figure out if it is really legal.
511 if (MO.getSubReg() || MII->isExtractSubreg() ||
512 MII->isInsertSubreg() || MII->isSubregToReg())
515 const TargetRegisterClass *RC = TID.OpInfo[i].getRegClass(TRI);
516 if (RC && !RC->contains(NewReg))
523 if (!MII->isRegTiedToUseOperand(i))
526 } else if (TRI->regsOverlap(Reg, NewReg)) {
528 } else if (TRI->regsOverlap(Reg, OldReg)) {
529 if (!MO.isUse() || !MO.isKill())
535 // Found non-two-address def. Stop here.
536 for (unsigned i = 0, e = Refs.size(); i != e; ++i)
537 Refs[i]->setReg(NewReg);
541 // Two-address uses must be updated as well.
542 for (unsigned i = 0, e = Uses.size(); i != e; ++i)
543 Refs.push_back(Uses[i]);
548 /// PropagateForward - Traverse forward and look for the kill of OldReg. If
549 /// it can successfully update all of the uses with NewReg, do so and
551 bool StackSlotColoring::PropagateForward(MachineBasicBlock::iterator MII,
552 MachineBasicBlock *MBB,
553 unsigned OldReg, unsigned NewReg) {
554 if (MII == MBB->end())
557 SmallVector<MachineOperand*, 4> Uses;
558 while (++MII != MBB->end()) {
559 bool FoundKill = false;
560 const TargetInstrDesc &TID = MII->getDesc();
561 for (unsigned i = 0, e = MII->getNumOperands(); i != e; ++i) {
562 MachineOperand &MO = MII->getOperand(i);
565 unsigned Reg = MO.getReg();
569 if (MO.isDef() || MO.isImplicit())
572 // Abort the use is actually a sub-register use. We don't have enough
573 // information to figure out if it is really legal.
574 if (MO.getSubReg() || MII->isExtractSubreg())
577 const TargetRegisterClass *RC = TID.OpInfo[i].getRegClass(TRI);
578 if (RC && !RC->contains(NewReg))
584 } else if (TRI->regsOverlap(Reg, NewReg) ||
585 TRI->regsOverlap(Reg, OldReg))
589 for (unsigned i = 0, e = Uses.size(); i != e; ++i)
590 Uses[i]->setReg(NewReg);
597 /// UnfoldAndRewriteInstruction - Rewrite specified instruction by unfolding
598 /// folded memory references and replacing those references with register
599 /// references instead.
601 StackSlotColoring::UnfoldAndRewriteInstruction(MachineInstr *MI, int OldFI,
603 const TargetRegisterClass *RC,
604 SmallSet<unsigned, 4> &Defs,
605 MachineFunction &MF) {
606 MachineBasicBlock *MBB = MI->getParent();
607 if (unsigned DstReg = TII->isLoadFromStackSlot(MI, OldFI)) {
608 if (PropagateForward(MI, MBB, DstReg, Reg)) {
609 DEBUG(dbgs() << "Eliminated load: ");
613 TII->copyRegToReg(*MBB, MI, DstReg, Reg, RC, RC,
618 if (!Defs.count(Reg)) {
619 // If this is the first use of Reg in this MBB and it wasn't previously
620 // defined in MBB, add it to livein.
624 } else if (unsigned SrcReg = TII->isStoreToStackSlot(MI, OldFI)) {
625 if (MI->killsRegister(SrcReg) && PropagateBackward(MI, MBB, SrcReg, Reg)) {
626 DEBUG(dbgs() << "Eliminated store: ");
630 TII->copyRegToReg(*MBB, MI, Reg, SrcReg, RC, RC,
635 // Remember reg has been defined in MBB.
638 SmallVector<MachineInstr*, 4> NewMIs;
639 bool Success = TII->unfoldMemoryOperand(MF, MI, Reg, false, false, NewMIs);
640 Success = Success; // Silence compiler warning.
641 assert(Success && "Failed to unfold!");
642 MachineInstr *NewMI = NewMIs[0];
643 MBB->insert(MI, NewMI);
646 if (NewMI->readsRegister(Reg)) {
647 if (!Defs.count(Reg))
648 // If this is the first use of Reg in this MBB and it wasn't previously
649 // defined in MBB, add it to livein.
657 /// RemoveDeadStores - Scan through a basic block and look for loads followed
658 /// by stores. If they're both using the same stack slot, then the store is
659 /// definitely dead. This could obviously be much more aggressive (consider
660 /// pairs with instructions between them), but such extensions might have a
661 /// considerable compile time impact.
662 bool StackSlotColoring::RemoveDeadStores(MachineBasicBlock* MBB) {
663 // FIXME: This could be much more aggressive, but we need to investigate
664 // the compile time impact of doing so.
665 bool changed = false;
667 SmallVector<MachineInstr*, 4> toErase;
669 for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end();
671 if (DCELimit != -1 && (int)NumDead >= DCELimit)
674 MachineBasicBlock::iterator NextMI = llvm::next(I);
675 if (NextMI == MBB->end()) continue;
677 int FirstSS, SecondSS;
678 unsigned LoadReg = 0;
679 unsigned StoreReg = 0;
680 if (!(LoadReg = TII->isLoadFromStackSlot(I, FirstSS))) continue;
681 if (!(StoreReg = TII->isStoreToStackSlot(NextMI, SecondSS))) continue;
682 if (FirstSS != SecondSS || LoadReg != StoreReg || FirstSS == -1) continue;
687 if (NextMI->findRegisterUseOperandIdx(LoadReg, true, 0) != -1) {
689 toErase.push_back(I);
692 toErase.push_back(NextMI);
696 for (SmallVector<MachineInstr*, 4>::iterator I = toErase.begin(),
697 E = toErase.end(); I != E; ++I)
698 (*I)->eraseFromParent();
704 bool StackSlotColoring::runOnMachineFunction(MachineFunction &MF) {
706 dbgs() << "********** Stack Slot Coloring **********\n"
707 << "********** Function: "
708 << MF.getFunction()->getName() << '\n';
711 MFI = MF.getFrameInfo();
712 MRI = &MF.getRegInfo();
713 TII = MF.getTarget().getInstrInfo();
714 TRI = MF.getTarget().getRegisterInfo();
715 LS = &getAnalysis<LiveStacks>();
716 VRM = &getAnalysis<VirtRegMap>();
717 loopInfo = &getAnalysis<MachineLoopInfo>();
719 bool Changed = false;
721 unsigned NumSlots = LS->getNumIntervals();
723 if (NumSlots == 0 || !VRM->HasUnusedRegisters())
728 // If there are calls to setjmp or sigsetjmp, don't perform stack slot
729 // coloring. The stack could be modified before the longjmp is executed,
730 // resulting in the wrong value being used afterwards. (See
731 // <rdar://problem/8007500>.)
732 if (MF.callsSetJmp())
735 // Gather spill slot references
736 ScanForSpillSlotRefs(MF);
738 Changed = ColorSlots(MF);
742 for (unsigned i = 0, e = SSRefs.size(); i != e; ++i)
745 OrigAlignments.clear();
749 for (unsigned i = 0, e = Assignments.size(); i != e; ++i)
750 Assignments[i].clear();
754 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I)
755 Changed |= RemoveDeadStores(I);