1 //===---------------------------- StackMaps.cpp ---------------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #include "llvm/CodeGen/StackMaps.h"
11 #include "llvm/CodeGen/AsmPrinter.h"
12 #include "llvm/CodeGen/MachineFrameInfo.h"
13 #include "llvm/CodeGen/MachineFunction.h"
14 #include "llvm/CodeGen/MachineInstr.h"
15 #include "llvm/IR/DataLayout.h"
16 #include "llvm/MC/MCContext.h"
17 #include "llvm/MC/MCExpr.h"
18 #include "llvm/MC/MCObjectFileInfo.h"
19 #include "llvm/MC/MCSectionMachO.h"
20 #include "llvm/MC/MCStreamer.h"
21 #include "llvm/Support/CommandLine.h"
22 #include "llvm/Target/TargetMachine.h"
23 #include "llvm/Target/TargetOpcodes.h"
24 #include "llvm/Target/TargetRegisterInfo.h"
25 #include "llvm/Target/TargetSubtargetInfo.h"
30 #define DEBUG_TYPE "stackmaps"
32 static cl::opt<int> StackMapVersion(
33 "stackmap-version", cl::init(1),
34 cl::desc("Specify the stackmap encoding version (default = 1)"));
36 const char *StackMaps::WSMP = "Stack Maps: ";
38 PatchPointOpers::PatchPointOpers(const MachineInstr *MI)
39 : MI(MI), HasDef(MI->getOperand(0).isReg() && MI->getOperand(0).isDef() &&
40 !MI->getOperand(0).isImplicit()),
41 IsAnyReg(MI->getOperand(getMetaIdx(CCPos)).getImm() ==
42 CallingConv::AnyReg) {
44 unsigned CheckStartIdx = 0, e = MI->getNumOperands();
45 while (CheckStartIdx < e && MI->getOperand(CheckStartIdx).isReg() &&
46 MI->getOperand(CheckStartIdx).isDef() &&
47 !MI->getOperand(CheckStartIdx).isImplicit())
50 assert(getMetaIdx() == CheckStartIdx &&
51 "Unexpected additional definition in Patchpoint intrinsic.");
55 unsigned PatchPointOpers::getNextScratchIdx(unsigned StartIdx) const {
57 StartIdx = getVarIdx();
59 // Find the next scratch register (implicit def and early clobber)
60 unsigned ScratchIdx = StartIdx, e = MI->getNumOperands();
61 while (ScratchIdx < e &&
62 !(MI->getOperand(ScratchIdx).isReg() &&
63 MI->getOperand(ScratchIdx).isDef() &&
64 MI->getOperand(ScratchIdx).isImplicit() &&
65 MI->getOperand(ScratchIdx).isEarlyClobber()))
68 assert(ScratchIdx != e && "No scratch register available");
72 StackMaps::StackMaps(AsmPrinter &AP) : AP(AP) {
73 if (StackMapVersion != 1)
74 llvm_unreachable("Unsupported stackmap version!");
77 /// Go up the super-register chain until we hit a valid dwarf register number.
78 static unsigned getDwarfRegNum(unsigned Reg, const TargetRegisterInfo *TRI) {
79 int RegNum = TRI->getDwarfRegNum(Reg, false);
80 for (MCSuperRegIterator SR(Reg, TRI); SR.isValid() && RegNum < 0; ++SR)
81 RegNum = TRI->getDwarfRegNum(*SR, false);
83 assert(RegNum >= 0 && "Invalid Dwarf register number.");
84 return (unsigned)RegNum;
87 MachineInstr::const_mop_iterator
88 StackMaps::parseOperand(MachineInstr::const_mop_iterator MOI,
89 MachineInstr::const_mop_iterator MOE, LocationVec &Locs,
90 LiveOutVec &LiveOuts) const {
91 const TargetRegisterInfo *TRI = AP.MF->getSubtarget().getRegisterInfo();
93 switch (MOI->getImm()) {
95 llvm_unreachable("Unrecognized operand type.");
96 case StackMaps::DirectMemRefOp: {
97 unsigned Size = AP.TM.getDataLayout()->getPointerSizeInBits();
98 assert((Size % 8) == 0 && "Need pointer size in bytes.");
100 unsigned Reg = (++MOI)->getReg();
101 int64_t Imm = (++MOI)->getImm();
102 Locs.emplace_back(StackMaps::Location::Direct, Size,
103 getDwarfRegNum(Reg, TRI), Imm);
106 case StackMaps::IndirectMemRefOp: {
107 int64_t Size = (++MOI)->getImm();
108 assert(Size > 0 && "Need a valid size for indirect memory locations.");
109 unsigned Reg = (++MOI)->getReg();
110 int64_t Imm = (++MOI)->getImm();
111 Locs.emplace_back(StackMaps::Location::Indirect, Size,
112 getDwarfRegNum(Reg, TRI), Imm);
115 case StackMaps::ConstantOp: {
117 assert(MOI->isImm() && "Expected constant operand.");
118 int64_t Imm = MOI->getImm();
119 Locs.emplace_back(Location::Constant, sizeof(int64_t), 0, Imm);
126 // The physical register number will ultimately be encoded as a DWARF regno.
127 // The stack map also records the size of a spill slot that can hold the
128 // register content. (The runtime can track the actual size of the data type
131 // Skip implicit registers (this includes our scratch registers)
132 if (MOI->isImplicit())
135 assert(TargetRegisterInfo::isPhysicalRegister(MOI->getReg()) &&
136 "Virtreg operands should have been rewritten before now.");
137 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(MOI->getReg());
138 assert(!MOI->getSubReg() && "Physical subreg still around.");
141 unsigned DwarfRegNum = getDwarfRegNum(MOI->getReg(), TRI);
142 unsigned LLVMRegNum = TRI->getLLVMRegNum(DwarfRegNum, false);
143 unsigned SubRegIdx = TRI->getSubRegIndex(LLVMRegNum, MOI->getReg());
145 Offset = TRI->getSubRegIdxOffset(SubRegIdx);
147 Locs.emplace_back(Location::Register, RC->getSize(), DwarfRegNum, Offset);
151 if (MOI->isRegLiveOut())
152 LiveOuts = parseRegisterLiveOutMask(MOI->getRegLiveOut());
157 void StackMaps::print(raw_ostream &OS) {
158 const TargetRegisterInfo *TRI =
159 AP.MF ? AP.MF->getSubtarget().getRegisterInfo() : nullptr;
160 OS << WSMP << "callsites:\n";
161 for (const auto &CSI : CSInfos) {
162 const LocationVec &CSLocs = CSI.Locations;
163 const LiveOutVec &LiveOuts = CSI.LiveOuts;
165 OS << WSMP << "callsite " << CSI.ID << "\n";
166 OS << WSMP << " has " << CSLocs.size() << " locations\n";
169 for (const auto &Loc : CSLocs) {
170 OS << WSMP << "\t\tLoc " << Idx << ": ";
172 case Location::Unprocessed:
173 OS << "<Unprocessed operand>";
175 case Location::Register:
178 OS << TRI->getName(Loc.Reg);
182 case Location::Direct:
185 OS << TRI->getName(Loc.Reg);
189 OS << " + " << Loc.Offset;
191 case Location::Indirect:
194 OS << TRI->getName(Loc.Reg);
197 OS << "+" << Loc.Offset;
199 case Location::Constant:
200 OS << "Constant " << Loc.Offset;
202 case Location::ConstantIndex:
203 OS << "Constant Index " << Loc.Offset;
206 OS << "\t[encoding: .byte " << Loc.Type << ", .byte " << Loc.Size
207 << ", .short " << Loc.Reg << ", .int " << Loc.Offset << "]\n";
211 OS << WSMP << "\thas " << LiveOuts.size() << " live-out registers\n";
214 for (const auto &LO : LiveOuts) {
215 OS << WSMP << "\t\tLO " << Idx << ": ";
217 OS << TRI->getName(LO.Reg);
220 OS << "\t[encoding: .short " << LO.DwarfRegNum << ", .byte 0, .byte "
227 /// Create a live-out register record for the given register Reg.
228 StackMaps::LiveOutReg
229 StackMaps::createLiveOutReg(unsigned Reg, const TargetRegisterInfo *TRI) const {
230 unsigned DwarfRegNum = getDwarfRegNum(Reg, TRI);
231 unsigned Size = TRI->getMinimalPhysRegClass(Reg)->getSize();
232 return LiveOutReg(Reg, DwarfRegNum, Size);
235 /// Parse the register live-out mask and return a vector of live-out registers
236 /// that need to be recorded in the stackmap.
237 StackMaps::LiveOutVec
238 StackMaps::parseRegisterLiveOutMask(const uint32_t *Mask) const {
239 assert(Mask && "No register mask specified");
240 const TargetRegisterInfo *TRI = AP.MF->getSubtarget().getRegisterInfo();
243 // Create a LiveOutReg for each bit that is set in the register mask.
244 for (unsigned Reg = 0, NumRegs = TRI->getNumRegs(); Reg != NumRegs; ++Reg)
245 if ((Mask[Reg / 32] >> Reg % 32) & 1)
246 LiveOuts.push_back(createLiveOutReg(Reg, TRI));
248 // We don't need to keep track of a register if its super-register is already
249 // in the list. Merge entries that refer to the same dwarf register and use
250 // the maximum size that needs to be spilled.
251 std::sort(LiveOuts.begin(), LiveOuts.end());
252 for (LiveOutVec::iterator I = LiveOuts.begin(), E = LiveOuts.end(); I != E;
254 for (LiveOutVec::iterator II = std::next(I); II != E; ++II) {
255 if (I->DwarfRegNum != II->DwarfRegNum) {
256 // Skip all the now invalid entries.
260 I->Size = std::max(I->Size, II->Size);
261 if (TRI->isSuperRegister(I->Reg, II->Reg))
267 std::remove_if(LiveOuts.begin(), LiveOuts.end(), LiveOutReg::IsInvalid),
272 void StackMaps::recordStackMapOpers(const MachineInstr &MI, uint64_t ID,
273 MachineInstr::const_mop_iterator MOI,
274 MachineInstr::const_mop_iterator MOE,
277 MCContext &OutContext = AP.OutStreamer->getContext();
278 MCSymbol *MILabel = OutContext.createTempSymbol();
279 AP.OutStreamer->EmitLabel(MILabel);
281 LocationVec Locations;
285 assert(PatchPointOpers(&MI).hasDef() && "Stackmap has no return value.");
286 parseOperand(MI.operands_begin(), std::next(MI.operands_begin()), Locations,
292 MOI = parseOperand(MOI, MOE, Locations, LiveOuts);
295 // Move large constants into the constant pool.
296 for (auto &Loc : Locations) {
297 // Constants are encoded as sign-extended integers.
298 // -1 is directly encoded as .long 0xFFFFFFFF with no constant pool.
299 if (Loc.Type == Location::Constant && !isInt<32>(Loc.Offset)) {
300 Loc.Type = Location::ConstantIndex;
301 // ConstPool is intentionally a MapVector of 'uint64_t's (as
302 // opposed to 'int64_t's). We should never be in a situation
303 // where we have to insert either the tombstone or the empty
304 // keys into a map, and for a DenseMap<uint64_t, T> these are
305 // (uint64_t)0 and (uint64_t)-1. They can be and are
306 // represented using 32 bit integers.
307 assert((uint64_t)Loc.Offset != DenseMapInfo<uint64_t>::getEmptyKey() &&
308 (uint64_t)Loc.Offset !=
309 DenseMapInfo<uint64_t>::getTombstoneKey() &&
310 "empty and tombstone keys should fit in 32 bits!");
311 auto Result = ConstPool.insert(std::make_pair(Loc.Offset, Loc.Offset));
312 Loc.Offset = Result.first - ConstPool.begin();
316 // Create an expression to calculate the offset of the callsite from function
318 const MCExpr *CSOffsetExpr = MCBinaryExpr::createSub(
319 MCSymbolRefExpr::create(MILabel, OutContext),
320 MCSymbolRefExpr::create(AP.CurrentFnSymForSize, OutContext), OutContext);
322 CSInfos.emplace_back(CSOffsetExpr, ID, std::move(Locations),
323 std::move(LiveOuts));
325 // Record the stack size of the current function.
326 const MachineFrameInfo *MFI = AP.MF->getFrameInfo();
327 const TargetRegisterInfo *RegInfo = AP.MF->getSubtarget().getRegisterInfo();
328 bool HasDynamicFrameSize =
329 MFI->hasVarSizedObjects() || RegInfo->needsStackRealignment(*(AP.MF));
330 FnStackSize[AP.CurrentFnSym] =
331 HasDynamicFrameSize ? UINT64_MAX : MFI->getStackSize();
334 void StackMaps::recordStackMap(const MachineInstr &MI) {
335 assert(MI.getOpcode() == TargetOpcode::STACKMAP && "expected stackmap");
337 int64_t ID = MI.getOperand(0).getImm();
338 recordStackMapOpers(MI, ID, std::next(MI.operands_begin(), 2),
342 void StackMaps::recordPatchPoint(const MachineInstr &MI) {
343 assert(MI.getOpcode() == TargetOpcode::PATCHPOINT && "expected patchpoint");
345 PatchPointOpers opers(&MI);
346 int64_t ID = opers.getMetaOper(PatchPointOpers::IDPos).getImm();
348 auto MOI = std::next(MI.operands_begin(), opers.getStackMapStartIdx());
349 recordStackMapOpers(MI, ID, MOI, MI.operands_end(),
350 opers.isAnyReg() && opers.hasDef());
354 auto &Locations = CSInfos.back().Locations;
355 if (opers.isAnyReg()) {
356 unsigned NArgs = opers.getMetaOper(PatchPointOpers::NArgPos).getImm();
357 for (unsigned i = 0, e = (opers.hasDef() ? NArgs + 1 : NArgs); i != e; ++i)
358 assert(Locations[i].Type == Location::Register &&
359 "anyreg arg must be in reg.");
363 void StackMaps::recordStatepoint(const MachineInstr &MI) {
364 assert(MI.getOpcode() == TargetOpcode::STATEPOINT && "expected statepoint");
366 StatepointOpers opers(&MI);
367 // Record all the deopt and gc operands (they're contiguous and run from the
368 // initial index to the end of the operand list)
369 const unsigned StartIdx = opers.getVarIdx();
370 recordStackMapOpers(MI, opers.getID(), MI.operands_begin() + StartIdx,
371 MI.operands_end(), false);
374 /// Emit the stackmap header.
377 /// uint8 : Stack Map Version (currently 1)
378 /// uint8 : Reserved (expected to be 0)
379 /// uint16 : Reserved (expected to be 0)
381 /// uint32 : NumFunctions
382 /// uint32 : NumConstants
383 /// uint32 : NumRecords
384 void StackMaps::emitStackmapHeader(MCStreamer &OS) {
386 OS.EmitIntValue(StackMapVersion, 1); // Version.
387 OS.EmitIntValue(0, 1); // Reserved.
388 OS.EmitIntValue(0, 2); // Reserved.
391 DEBUG(dbgs() << WSMP << "#functions = " << FnStackSize.size() << '\n');
392 OS.EmitIntValue(FnStackSize.size(), 4);
394 DEBUG(dbgs() << WSMP << "#constants = " << ConstPool.size() << '\n');
395 OS.EmitIntValue(ConstPool.size(), 4);
397 DEBUG(dbgs() << WSMP << "#callsites = " << CSInfos.size() << '\n');
398 OS.EmitIntValue(CSInfos.size(), 4);
401 /// Emit the function frame record for each function.
403 /// StkSizeRecord[NumFunctions] {
404 /// uint64 : Function Address
405 /// uint64 : Stack Size
407 void StackMaps::emitFunctionFrameRecords(MCStreamer &OS) {
408 // Function Frame records.
409 DEBUG(dbgs() << WSMP << "functions:\n");
410 for (auto const &FR : FnStackSize) {
411 DEBUG(dbgs() << WSMP << "function addr: " << FR.first
412 << " frame size: " << FR.second);
413 OS.EmitSymbolValue(FR.first, 8);
414 OS.EmitIntValue(FR.second, 8);
418 /// Emit the constant pool.
420 /// int64 : Constants[NumConstants]
421 void StackMaps::emitConstantPoolEntries(MCStreamer &OS) {
422 // Constant pool entries.
423 DEBUG(dbgs() << WSMP << "constants:\n");
424 for (const auto &ConstEntry : ConstPool) {
425 DEBUG(dbgs() << WSMP << ConstEntry.second << '\n');
426 OS.EmitIntValue(ConstEntry.second, 8);
430 /// Emit the callsite info for each callsite.
432 /// StkMapRecord[NumRecords] {
433 /// uint64 : PatchPoint ID
434 /// uint32 : Instruction Offset
435 /// uint16 : Reserved (record flags)
436 /// uint16 : NumLocations
437 /// Location[NumLocations] {
438 /// uint8 : Register | Direct | Indirect | Constant | ConstantIndex
439 /// uint8 : Size in Bytes
440 /// uint16 : Dwarf RegNum
444 /// uint16 : NumLiveOuts
445 /// LiveOuts[NumLiveOuts] {
446 /// uint16 : Dwarf RegNum
448 /// uint8 : Size in Bytes
450 /// uint32 : Padding (only if required to align to 8 byte)
453 /// Location Encoding, Type, Value:
454 /// 0x1, Register, Reg (value in register)
455 /// 0x2, Direct, Reg + Offset (frame index)
456 /// 0x3, Indirect, [Reg + Offset] (spilled value)
457 /// 0x4, Constant, Offset (small constant)
458 /// 0x5, ConstIndex, Constants[Offset] (large constant)
459 void StackMaps::emitCallsiteEntries(MCStreamer &OS) {
460 DEBUG(print(dbgs()));
462 for (const auto &CSI : CSInfos) {
463 const LocationVec &CSLocs = CSI.Locations;
464 const LiveOutVec &LiveOuts = CSI.LiveOuts;
466 // Verify stack map entry. It's better to communicate a problem to the
467 // runtime than crash in case of in-process compilation. Currently, we do
468 // simple overflow checks, but we may eventually communicate other
469 // compilation errors this way.
470 if (CSLocs.size() > UINT16_MAX || LiveOuts.size() > UINT16_MAX) {
471 OS.EmitIntValue(UINT64_MAX, 8); // Invalid ID.
472 OS.EmitValue(CSI.CSOffsetExpr, 4);
473 OS.EmitIntValue(0, 2); // Reserved.
474 OS.EmitIntValue(0, 2); // 0 locations.
475 OS.EmitIntValue(0, 2); // padding.
476 OS.EmitIntValue(0, 2); // 0 live-out registers.
477 OS.EmitIntValue(0, 4); // padding.
481 OS.EmitIntValue(CSI.ID, 8);
482 OS.EmitValue(CSI.CSOffsetExpr, 4);
484 // Reserved for flags.
485 OS.EmitIntValue(0, 2);
486 OS.EmitIntValue(CSLocs.size(), 2);
488 for (const auto &Loc : CSLocs) {
489 OS.EmitIntValue(Loc.Type, 1);
490 OS.EmitIntValue(Loc.Size, 1);
491 OS.EmitIntValue(Loc.Reg, 2);
492 OS.EmitIntValue(Loc.Offset, 4);
495 // Num live-out registers and padding to align to 4 byte.
496 OS.EmitIntValue(0, 2);
497 OS.EmitIntValue(LiveOuts.size(), 2);
499 for (const auto &LO : LiveOuts) {
500 OS.EmitIntValue(LO.DwarfRegNum, 2);
501 OS.EmitIntValue(0, 1);
502 OS.EmitIntValue(LO.Size, 1);
504 // Emit alignment to 8 byte.
505 OS.EmitValueToAlignment(8);
509 /// Serialize the stackmap data.
510 void StackMaps::serializeToStackMapSection() {
512 // Bail out if there's no stack map data.
513 assert((!CSInfos.empty() || (CSInfos.empty() && ConstPool.empty())) &&
514 "Expected empty constant pool too!");
515 assert((!CSInfos.empty() || (CSInfos.empty() && FnStackSize.empty())) &&
516 "Expected empty function record too!");
520 MCContext &OutContext = AP.OutStreamer->getContext();
521 MCStreamer &OS = *AP.OutStreamer;
523 // Create the section.
524 MCSection *StackMapSection =
525 OutContext.getObjectFileInfo()->getStackMapSection();
526 OS.SwitchSection(StackMapSection);
528 // Emit a dummy symbol to force section inclusion.
529 OS.EmitLabel(OutContext.getOrCreateSymbol(Twine("__LLVM_StackMaps")));
532 DEBUG(dbgs() << "********** Stack Map Output **********\n");
533 emitStackmapHeader(OS);
534 emitFunctionFrameRecords(OS);
535 emitConstantPoolEntries(OS);
536 emitCallsiteEntries(OS);