1 //===-------- SplitKit.h - Toolkit for splitting live ranges ----*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the SplitAnalysis class as well as mutator functions for
11 // live range splitting.
13 //===----------------------------------------------------------------------===//
15 #include "llvm/ADT/DenseMap.h"
16 #include "llvm/ADT/IntervalMap.h"
17 #include "llvm/ADT/SmallPtrSet.h"
18 #include "llvm/CodeGen/SlotIndexes.h"
22 class ConnectedVNInfoEqClasses;
27 class MachineLoopInfo;
28 class MachineRegisterInfo;
29 class TargetInstrInfo;
30 class TargetRegisterInfo;
35 /// At some point we should just include MachineDominators.h:
36 class MachineDominatorTree;
37 template <class NodeT> class DomTreeNodeBase;
38 typedef DomTreeNodeBase<MachineBasicBlock> MachineDomTreeNode;
41 /// SplitAnalysis - Analyze a LiveInterval, looking for live range splitting
45 const MachineFunction &MF;
46 const VirtRegMap &VRM;
47 const LiveIntervals &LIS;
48 const MachineLoopInfo &Loops;
49 const TargetInstrInfo &TII;
51 // Instructions using the the current register.
52 typedef SmallPtrSet<const MachineInstr*, 16> InstrPtrSet;
53 InstrPtrSet UsingInstrs;
55 // Sorted slot indexes of using instructions.
56 SmallVector<SlotIndex, 8> UseSlots;
58 // The number of instructions using CurLI in each basic block.
59 typedef DenseMap<const MachineBasicBlock*, unsigned> BlockCountMap;
60 BlockCountMap UsingBlocks;
62 /// Additional information about basic blocks where the current variable is
63 /// live. Such a block will look like one of these templates:
65 /// 1. | o---x | Internal to block. Variable is only live in this block.
66 /// 2. |---x | Live-in, kill.
67 /// 3. | o---| Def, live-out.
68 /// 4. |---x o---| Live-in, kill, def, live-out.
69 /// 5. |---o---o---| Live-through with uses or defs.
70 /// 6. |-----------| Live-through without uses. Transparent.
73 MachineBasicBlock *MBB;
74 SlotIndex FirstUse; ///< First instr using current reg.
75 SlotIndex LastUse; ///< Last instr using current reg.
76 SlotIndex Kill; ///< Interval end point inside block.
77 SlotIndex Def; ///< Interval start point inside block.
78 /// Last possible point for splitting live ranges.
79 SlotIndex LastSplitPoint;
80 bool Uses; ///< Current reg has uses or defs in block.
81 bool LiveThrough; ///< Live in whole block (Templ 5. or 6. above).
82 bool LiveIn; ///< Current reg is live in.
83 bool LiveOut; ///< Current reg is live out.
85 // Per-interference pattern scratch data.
86 bool OverlapEntry; ///< Interference overlaps entering interval.
87 bool OverlapExit; ///< Interference overlaps exiting interval.
90 /// Basic blocks where var is live. This array is parallel to
92 SmallVector<BlockInfo, 8> LiveBlocks;
95 // Current live interval.
96 const LiveInterval *CurLI;
98 // Sumarize statistics by counting instructions using CurLI.
101 /// calcLiveBlockInfo - Compute per-block information about CurLI.
102 void calcLiveBlockInfo();
104 /// canAnalyzeBranch - Return true if MBB ends in a branch that can be
106 bool canAnalyzeBranch(const MachineBasicBlock *MBB);
109 SplitAnalysis(const VirtRegMap &vrm, const LiveIntervals &lis,
110 const MachineLoopInfo &mli);
112 /// analyze - set CurLI to the specified interval, and analyze how it may be
114 void analyze(const LiveInterval *li);
116 /// clear - clear all data structures so SplitAnalysis is ready to analyze a
120 /// getParent - Return the last analyzed interval.
121 const LiveInterval &getParent() const { return *CurLI; }
123 /// hasUses - Return true if MBB has any uses of CurLI.
124 bool hasUses(const MachineBasicBlock *MBB) const {
125 return UsingBlocks.lookup(MBB);
128 typedef SmallPtrSet<const MachineBasicBlock*, 16> BlockPtrSet;
130 // Print a set of blocks with use counts.
131 void print(const BlockPtrSet&, raw_ostream&) const;
133 /// getMultiUseBlocks - Add basic blocks to Blocks that may benefit from
134 /// having CurLI split to a new live interval. Return true if Blocks can be
135 /// passed to SplitEditor::splitSingleBlocks.
136 bool getMultiUseBlocks(BlockPtrSet &Blocks);
138 /// getBlockForInsideSplit - If CurLI is contained inside a single basic
139 /// block, and it would pay to subdivide the interval inside that block,
140 /// return it. Otherwise return NULL. The returned block can be passed to
141 /// SplitEditor::splitInsideBlock.
142 const MachineBasicBlock *getBlockForInsideSplit();
146 /// LiveIntervalMap - Map values from a large LiveInterval into a small
147 /// interval that is a subset. Insert phi-def values as needed. This class is
148 /// used by SplitEditor to create new smaller LiveIntervals.
150 /// ParentLI is the larger interval, LI is the subset interval. Every value
151 /// in LI corresponds to exactly one value in ParentLI, and the live range
152 /// of the value is contained within the live range of the ParentLI value.
153 /// Values in ParentLI may map to any number of OpenLI values, including 0.
154 class LiveIntervalMap {
156 MachineDominatorTree &MDT;
158 // The parent interval is never changed.
159 const LiveInterval &ParentLI;
161 // The child interval's values are fully contained inside ParentLI values.
164 typedef DenseMap<const VNInfo*, VNInfo*> ValueMap;
166 // Map ParentLI values to simple values in LI that are defined at the same
167 // SlotIndex, or NULL for ParentLI values that have complex LI defs.
168 // Note there is a difference between values mapping to NULL (complex), and
169 // values not present (unknown/unmapped).
172 typedef std::pair<VNInfo*, MachineDomTreeNode*> LiveOutPair;
173 typedef DenseMap<MachineBasicBlock*,LiveOutPair> LiveOutMap;
175 // LiveOutCache - Map each basic block where LI is live out to the live-out
176 // value and its defining block. One of these conditions shall be true:
178 // 1. !LiveOutCache.count(MBB)
179 // 2. LiveOutCache[MBB].second.getNode() == MBB
180 // 3. forall P in preds(MBB): LiveOutCache[P] == LiveOutCache[MBB]
182 // This is only a cache, the values can be computed as:
184 // VNI = LI->getVNInfoAt(LIS.getMBBEndIdx(MBB))
185 // Node = mbt_[LIS.getMBBFromIndex(VNI->def)]
187 // The cache is also used as a visiteed set by mapValue().
188 LiveOutMap LiveOutCache;
190 // Dump the live-out cache to dbgs().
194 LiveIntervalMap(LiveIntervals &lis,
195 MachineDominatorTree &mdt,
196 const LiveInterval &parentli)
197 : LIS(lis), MDT(mdt), ParentLI(parentli), LI(0) {}
199 /// reset - clear all data structures and start a new live interval.
200 void reset(LiveInterval *);
202 /// getLI - return the current live interval.
203 LiveInterval *getLI() const { return LI; }
205 /// defValue - define a value in LI from the ParentLI value VNI and Idx.
206 /// Idx does not have to be ParentVNI->def, but it must be contained within
207 /// ParentVNI's live range in ParentLI.
208 /// Return the new LI value.
209 VNInfo *defValue(const VNInfo *ParentVNI, SlotIndex Idx);
211 /// mapValue - map ParentVNI to the corresponding LI value at Idx. It is
212 /// assumed that ParentVNI is live at Idx.
213 /// If ParentVNI has not been defined by defValue, it is assumed that
214 /// ParentVNI->def dominates Idx.
215 /// If ParentVNI has been defined by defValue one or more times, a value that
216 /// dominates Idx will be returned. This may require creating extra phi-def
217 /// values and adding live ranges to LI.
218 /// If simple is not NULL, *simple will indicate if ParentVNI is a simply
220 VNInfo *mapValue(const VNInfo *ParentVNI, SlotIndex Idx, bool *simple = 0);
222 // extendTo - Find the last LI value defined in MBB at or before Idx. The
223 // parentli is assumed to be live at Idx. Extend the live range to include
224 // Idx. Return the found VNInfo, or NULL.
225 VNInfo *extendTo(const MachineBasicBlock *MBB, SlotIndex Idx);
227 /// isMapped - Return true is ParentVNI is a known mapped value. It may be a
228 /// simple 1-1 mapping or a complex mapping to later defs.
229 bool isMapped(const VNInfo *ParentVNI) const {
230 return Values.count(ParentVNI);
233 /// isComplexMapped - Return true if ParentVNI has received new definitions
235 bool isComplexMapped(const VNInfo *ParentVNI) const;
237 /// markComplexMapped - Mark ParentVNI as complex mapped regardless of the
238 /// number of definitions.
239 void markComplexMapped(const VNInfo *ParentVNI) { Values[ParentVNI] = 0; }
241 // addSimpleRange - Add a simple range from ParentLI to LI.
242 // ParentVNI must be live in the [Start;End) interval.
243 void addSimpleRange(SlotIndex Start, SlotIndex End, const VNInfo *ParentVNI);
245 /// addRange - Add live ranges to LI where [Start;End) intersects ParentLI.
246 /// All needed values whose def is not inside [Start;End) must be defined
247 /// beforehand so mapValue will work.
248 void addRange(SlotIndex Start, SlotIndex End);
252 /// SplitEditor - Edit machine code and LiveIntervals for live range
255 /// - Create a SplitEditor from a SplitAnalysis.
256 /// - Start a new live interval with openIntv.
257 /// - Mark the places where the new interval is entered using enterIntv*
258 /// - Mark the ranges where the new interval is used with useIntv*
259 /// - Mark the places where the interval is exited with exitIntv*.
260 /// - Finish the current interval with closeIntv and repeat from 2.
261 /// - Rewrite instructions with finish().
267 MachineRegisterInfo &MRI;
268 MachineDominatorTree &MDT;
269 const TargetInstrInfo &TII;
270 const TargetRegisterInfo &TRI;
272 /// Edit - The current parent register and new intervals created.
275 /// Index into Edit of the currently open interval.
276 /// The index 0 is used for the complement, so the first interval started by
277 /// openIntv will be 1.
280 typedef IntervalMap<SlotIndex, unsigned> RegAssignMap;
282 /// Allocator for the interval map. This will eventually be shared with
283 /// SlotIndexes and LiveIntervals.
284 RegAssignMap::Allocator Allocator;
286 /// RegAssign - Map of the assigned register indexes.
287 /// Edit.get(RegAssign.lookup(Idx)) is the register that should be live at
289 RegAssignMap RegAssign;
291 /// LIMappers - One LiveIntervalMap or each interval in Edit.
292 SmallVector<LiveIntervalMap, 4> LIMappers;
294 /// defFromParent - Define Reg from ParentVNI at UseIdx using either
295 /// rematerialization or a COPY from parent. Return the new value.
296 VNInfo *defFromParent(unsigned RegIdx,
299 MachineBasicBlock &MBB,
300 MachineBasicBlock::iterator I);
302 /// rewriteAssigned - Rewrite all uses of Edit.getReg() to assigned registers.
303 void rewriteAssigned();
305 /// rewriteComponents - Rewrite all uses of Intv[0] according to the eq
306 /// classes in ConEQ.
307 /// This must be done when Intvs[0] is styill live at all uses, before calling
308 /// ConEq.Distribute().
309 void rewriteComponents(const SmallVectorImpl<LiveInterval*> &Intvs,
310 const ConnectedVNInfoEqClasses &ConEq);
313 /// Create a new SplitEditor for editing the LiveInterval analyzed by SA.
314 /// Newly created intervals will be appended to newIntervals.
315 SplitEditor(SplitAnalysis &SA, LiveIntervals&, VirtRegMap&,
316 MachineDominatorTree&, LiveRangeEdit&);
318 /// getAnalysis - Get the corresponding analysis.
319 SplitAnalysis &getAnalysis() { return SA; }
321 /// Create a new virtual register and live interval.
324 /// enterIntvBefore - Enter the open interval before the instruction at Idx.
325 /// If the parent interval is not live before Idx, a COPY is not inserted.
326 /// Return the beginning of the new live range.
327 SlotIndex enterIntvBefore(SlotIndex Idx);
329 /// enterIntvAtEnd - Enter the open interval at the end of MBB.
330 /// Use the open interval from he inserted copy to the MBB end.
331 /// Return the beginning of the new live range.
332 SlotIndex enterIntvAtEnd(MachineBasicBlock &MBB);
334 /// useIntv - indicate that all instructions in MBB should use OpenLI.
335 void useIntv(const MachineBasicBlock &MBB);
337 /// useIntv - indicate that all instructions in range should use OpenLI.
338 void useIntv(SlotIndex Start, SlotIndex End);
340 /// leaveIntvAfter - Leave the open interval after the instruction at Idx.
341 /// Return the end of the live range.
342 SlotIndex leaveIntvAfter(SlotIndex Idx);
344 /// leaveIntvBefore - Leave the open interval before the instruction at Idx.
345 /// Return the end of the live range.
346 SlotIndex leaveIntvBefore(SlotIndex Idx);
348 /// leaveIntvAtTop - Leave the interval at the top of MBB.
349 /// Add liveness from the MBB top to the copy.
350 /// Return the end of the live range.
351 SlotIndex leaveIntvAtTop(MachineBasicBlock &MBB);
353 /// overlapIntv - Indicate that all instructions in range should use the open
354 /// interval, but also let the complement interval be live.
356 /// This doubles the register pressure, but is sometimes required to deal with
357 /// register uses after the last valid split point.
359 /// The Start index should be a return value from a leaveIntv* call, and End
360 /// should be in the same basic block. The parent interval must have the same
361 /// value across the range.
363 void overlapIntv(SlotIndex Start, SlotIndex End);
365 /// closeIntv - Indicate that we are done editing the currently open
366 /// LiveInterval, and ranges can be trimmed.
369 /// finish - after all the new live ranges have been created, compute the
370 /// remaining live range, and rewrite instructions to use the new registers.
373 /// dump - print the current interval maping to dbgs().
376 // ===--- High level methods ---===
378 /// splitSingleBlocks - Split CurLI into a separate live interval inside each
379 /// basic block in Blocks.
380 void splitSingleBlocks(const SplitAnalysis::BlockPtrSet &Blocks);
382 /// splitInsideBlock - Split CurLI into multiple intervals inside MBB.
383 void splitInsideBlock(const MachineBasicBlock *);