1 //===---------- SplitKit.cpp - Toolkit for splitting live ranges ----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the SplitAnalysis class as well as mutator functions for
11 // live range splitting.
13 //===----------------------------------------------------------------------===//
15 #define DEBUG_TYPE "regalloc"
17 #include "LiveRangeEdit.h"
18 #include "VirtRegMap.h"
19 #include "llvm/ADT/Statistic.h"
20 #include "llvm/CodeGen/LiveIntervalAnalysis.h"
21 #include "llvm/CodeGen/MachineDominators.h"
22 #include "llvm/CodeGen/MachineInstrBuilder.h"
23 #include "llvm/CodeGen/MachineRegisterInfo.h"
24 #include "llvm/Support/Debug.h"
25 #include "llvm/Support/raw_ostream.h"
26 #include "llvm/Target/TargetInstrInfo.h"
27 #include "llvm/Target/TargetMachine.h"
31 STATISTIC(NumFinished, "Number of splits finished");
32 STATISTIC(NumSimple, "Number of splits that were simple");
34 //===----------------------------------------------------------------------===//
36 //===----------------------------------------------------------------------===//
38 SplitAnalysis::SplitAnalysis(const VirtRegMap &vrm,
39 const LiveIntervals &lis,
40 const MachineLoopInfo &mli)
41 : MF(vrm.getMachineFunction()),
45 TII(*MF.getTarget().getInstrInfo()),
47 LastSplitPoint(MF.getNumBlockIDs()) {}
49 void SplitAnalysis::clear() {
52 ThroughBlocks.clear();
56 SlotIndex SplitAnalysis::computeLastSplitPoint(unsigned Num) {
57 const MachineBasicBlock *MBB = MF.getBlockNumbered(Num);
58 const MachineBasicBlock *LPad = MBB->getLandingPadSuccessor();
59 std::pair<SlotIndex, SlotIndex> &LSP = LastSplitPoint[Num];
61 // Compute split points on the first call. The pair is independent of the
62 // current live interval.
63 if (!LSP.first.isValid()) {
64 MachineBasicBlock::const_iterator FirstTerm = MBB->getFirstTerminator();
65 if (FirstTerm == MBB->end())
66 LSP.first = LIS.getMBBEndIdx(MBB);
68 LSP.first = LIS.getInstructionIndex(FirstTerm);
70 // If there is a landing pad successor, also find the call instruction.
73 // There may not be a call instruction (?) in which case we ignore LPad.
74 LSP.second = LSP.first;
75 for (MachineBasicBlock::const_iterator I = FirstTerm, E = MBB->begin();
77 if (I->getDesc().isCall()) {
78 LSP.second = LIS.getInstructionIndex(I);
83 // If CurLI is live into a landing pad successor, move the last split point
84 // back to the call that may throw.
85 if (LPad && LSP.second.isValid() && LIS.isLiveInToMBB(*CurLI, LPad))
91 /// analyzeUses - Count instructions, basic blocks, and loops using CurLI.
92 void SplitAnalysis::analyzeUses() {
93 assert(UseSlots.empty() && "Call clear first");
95 // First get all the defs from the interval values. This provides the correct
96 // slots for early clobbers.
97 for (LiveInterval::const_vni_iterator I = CurLI->vni_begin(),
98 E = CurLI->vni_end(); I != E; ++I)
99 if (!(*I)->isPHIDef() && !(*I)->isUnused())
100 UseSlots.push_back((*I)->def);
102 // Get use slots form the use-def chain.
103 const MachineRegisterInfo &MRI = MF.getRegInfo();
104 for (MachineRegisterInfo::use_nodbg_iterator
105 I = MRI.use_nodbg_begin(CurLI->reg), E = MRI.use_nodbg_end(); I != E;
107 if (!I.getOperand().isUndef())
108 UseSlots.push_back(LIS.getInstructionIndex(&*I).getDefIndex());
110 array_pod_sort(UseSlots.begin(), UseSlots.end());
112 // Remove duplicates, keeping the smaller slot for each instruction.
113 // That is what we want for early clobbers.
114 UseSlots.erase(std::unique(UseSlots.begin(), UseSlots.end(),
115 SlotIndex::isSameInstr),
118 // Compute per-live block info.
119 if (!calcLiveBlockInfo()) {
120 // FIXME: calcLiveBlockInfo found inconsistencies in the live range.
121 // I am looking at you, SimpleRegisterCoalescing!
122 DEBUG(dbgs() << "*** Fixing inconsistent live interval! ***\n");
123 const_cast<LiveIntervals&>(LIS)
124 .shrinkToUses(const_cast<LiveInterval*>(CurLI));
126 ThroughBlocks.clear();
127 bool fixed = calcLiveBlockInfo();
129 assert(fixed && "Couldn't fix broken live interval");
132 DEBUG(dbgs() << "Analyze counted "
133 << UseSlots.size() << " instrs in "
134 << UseBlocks.size() << " blocks, through "
135 << NumThroughBlocks << " blocks.\n");
138 /// calcLiveBlockInfo - Fill the LiveBlocks array with information about blocks
139 /// where CurLI is live.
140 bool SplitAnalysis::calcLiveBlockInfo() {
141 ThroughBlocks.resize(MF.getNumBlockIDs());
142 NumThroughBlocks = 0;
146 LiveInterval::const_iterator LVI = CurLI->begin();
147 LiveInterval::const_iterator LVE = CurLI->end();
149 SmallVectorImpl<SlotIndex>::const_iterator UseI, UseE;
150 UseI = UseSlots.begin();
151 UseE = UseSlots.end();
153 // Loop over basic blocks where CurLI is live.
154 MachineFunction::iterator MFI = LIS.getMBBFromIndex(LVI->start);
158 SlotIndex Start, Stop;
159 tie(Start, Stop) = LIS.getSlotIndexes()->getMBBRange(BI.MBB);
161 // LVI is the first live segment overlapping MBB.
162 BI.LiveIn = LVI->start <= Start;
166 // Find the first and last uses in the block.
167 bool Uses = UseI != UseE && *UseI < Stop;
170 assert(BI.FirstUse >= Start);
172 while (UseI != UseE && *UseI < Stop);
173 BI.LastUse = UseI[-1];
174 assert(BI.LastUse < Stop);
177 // Look for gaps in the live range.
180 while (LVI->end < Stop) {
181 SlotIndex LastStop = LVI->end;
182 if (++LVI == LVE || LVI->start >= Stop) {
187 if (LastStop < LVI->start) {
194 // Don't set LiveThrough when the block has a gap.
195 BI.LiveThrough = !hasGap && BI.LiveIn && BI.LiveOut;
197 UseBlocks.push_back(BI);
200 ThroughBlocks.set(BI.MBB->getNumber());
202 // FIXME: This should never happen. The live range stops or starts without a
203 // corresponding use. An earlier pass did something wrong.
204 if (!BI.LiveThrough && !Uses)
207 // LVI is now at LVE or LVI->end >= Stop.
211 // Live segment ends exactly at Stop. Move to the next segment.
212 if (LVI->end == Stop && ++LVI == LVE)
215 // Pick the next basic block.
216 if (LVI->start < Stop)
219 MFI = LIS.getMBBFromIndex(LVI->start);
224 bool SplitAnalysis::isOriginalEndpoint(SlotIndex Idx) const {
225 unsigned OrigReg = VRM.getOriginal(CurLI->reg);
226 const LiveInterval &Orig = LIS.getInterval(OrigReg);
227 assert(!Orig.empty() && "Splitting empty interval?");
228 LiveInterval::const_iterator I = Orig.find(Idx);
230 // Range containing Idx should begin at Idx.
231 if (I != Orig.end() && I->start <= Idx)
232 return I->start == Idx;
234 // Range does not contain Idx, previous must end at Idx.
235 return I != Orig.begin() && (--I)->end == Idx;
238 void SplitAnalysis::analyze(const LiveInterval *li) {
245 //===----------------------------------------------------------------------===//
247 //===----------------------------------------------------------------------===//
249 /// Create a new SplitEditor for editing the LiveInterval analyzed by SA.
250 SplitEditor::SplitEditor(SplitAnalysis &sa,
253 MachineDominatorTree &mdt)
254 : SA(sa), LIS(lis), VRM(vrm),
255 MRI(vrm.getMachineFunction().getRegInfo()),
257 TII(*vrm.getMachineFunction().getTarget().getInstrInfo()),
258 TRI(*vrm.getMachineFunction().getTarget().getRegisterInfo()),
264 void SplitEditor::reset(LiveRangeEdit &lre) {
270 // We don't need to clear LiveOutCache, only LiveOutSeen entries are read.
273 // We don't need an AliasAnalysis since we will only be performing
274 // cheap-as-a-copy remats anyway.
275 Edit->anyRematerializable(LIS, TII, 0);
278 void SplitEditor::dump() const {
279 if (RegAssign.empty()) {
280 dbgs() << " empty\n";
284 for (RegAssignMap::const_iterator I = RegAssign.begin(); I.valid(); ++I)
285 dbgs() << " [" << I.start() << ';' << I.stop() << "):" << I.value();
289 VNInfo *SplitEditor::defValue(unsigned RegIdx,
290 const VNInfo *ParentVNI,
292 assert(ParentVNI && "Mapping NULL value");
293 assert(Idx.isValid() && "Invalid SlotIndex");
294 assert(Edit->getParent().getVNInfoAt(Idx) == ParentVNI && "Bad Parent VNI");
295 LiveInterval *LI = Edit->get(RegIdx);
297 // Create a new value.
298 VNInfo *VNI = LI->getNextValue(Idx, 0, LIS.getVNInfoAllocator());
300 // Use insert for lookup, so we can add missing values with a second lookup.
301 std::pair<ValueMap::iterator, bool> InsP =
302 Values.insert(std::make_pair(std::make_pair(RegIdx, ParentVNI->id), VNI));
304 // This was the first time (RegIdx, ParentVNI) was mapped.
305 // Keep it as a simple def without any liveness.
309 // If the previous value was a simple mapping, add liveness for it now.
310 if (VNInfo *OldVNI = InsP.first->second) {
311 SlotIndex Def = OldVNI->def;
312 LI->addRange(LiveRange(Def, Def.getNextSlot(), OldVNI));
313 // No longer a simple mapping.
314 InsP.first->second = 0;
317 // This is a complex mapping, add liveness for VNI
318 SlotIndex Def = VNI->def;
319 LI->addRange(LiveRange(Def, Def.getNextSlot(), VNI));
324 void SplitEditor::markComplexMapped(unsigned RegIdx, const VNInfo *ParentVNI) {
325 assert(ParentVNI && "Mapping NULL value");
326 VNInfo *&VNI = Values[std::make_pair(RegIdx, ParentVNI->id)];
328 // ParentVNI was either unmapped or already complex mapped. Either way.
332 // This was previously a single mapping. Make sure the old def is represented
333 // by a trivial live range.
334 SlotIndex Def = VNI->def;
335 Edit->get(RegIdx)->addRange(LiveRange(Def, Def.getNextSlot(), VNI));
339 // extendRange - Extend the live range to reach Idx.
340 // Potentially create phi-def values.
341 void SplitEditor::extendRange(unsigned RegIdx, SlotIndex Idx) {
342 assert(Idx.isValid() && "Invalid SlotIndex");
343 MachineBasicBlock *IdxMBB = LIS.getMBBFromIndex(Idx);
344 assert(IdxMBB && "No MBB at Idx");
345 LiveInterval *LI = Edit->get(RegIdx);
347 // Is there a def in the same MBB we can extend?
348 if (LI->extendInBlock(LIS.getMBBStartIdx(IdxMBB), Idx))
351 // Now for the fun part. We know that ParentVNI potentially has multiple defs,
352 // and we may need to create even more phi-defs to preserve VNInfo SSA form.
353 // Perform a search for all predecessor blocks where we know the dominating
354 // VNInfo. Insert phi-def VNInfos along the path back to IdxMBB.
356 // Initialize the live-out cache the first time it is needed.
357 if (LiveOutSeen.empty()) {
358 unsigned N = VRM.getMachineFunction().getNumBlockIDs();
359 LiveOutSeen.resize(N);
360 LiveOutCache.resize(N);
363 // Blocks where LI should be live-in.
364 SmallVector<MachineDomTreeNode*, 16> LiveIn;
365 LiveIn.push_back(MDT[IdxMBB]);
367 // Remember if we have seen more than one value.
368 bool UniqueVNI = true;
371 // Using LiveOutCache as a visited set, perform a BFS for all reaching defs.
372 for (unsigned i = 0; i != LiveIn.size(); ++i) {
373 MachineBasicBlock *MBB = LiveIn[i]->getBlock();
374 assert(!MBB->pred_empty() && "Value live-in to entry block?");
375 for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
376 PE = MBB->pred_end(); PI != PE; ++PI) {
377 MachineBasicBlock *Pred = *PI;
378 LiveOutPair &LOP = LiveOutCache[Pred];
380 // Is this a known live-out block?
381 if (LiveOutSeen.test(Pred->getNumber())) {
382 if (VNInfo *VNI = LOP.first) {
383 if (IdxVNI && IdxVNI != VNI)
390 // First time. LOP is garbage and must be cleared below.
391 LiveOutSeen.set(Pred->getNumber());
393 // Does Pred provide a live-out value?
394 SlotIndex Start, Last;
395 tie(Start, Last) = LIS.getSlotIndexes()->getMBBRange(Pred);
396 Last = Last.getPrevSlot();
397 VNInfo *VNI = LI->extendInBlock(Start, Last);
400 LOP.second = MDT[LIS.getMBBFromIndex(VNI->def)];
401 if (IdxVNI && IdxVNI != VNI)
408 // No, we need a live-in value for Pred as well
410 LiveIn.push_back(MDT[Pred]);
412 UniqueVNI = false; // Loopback to IdxMBB, ask updateSSA() for help.
416 // We may need to add phi-def values to preserve the SSA form.
418 LiveOutPair LOP(IdxVNI, MDT[LIS.getMBBFromIndex(IdxVNI->def)]);
419 // Update LiveOutCache, but skip IdxMBB at LiveIn[0].
420 for (unsigned i = 1, e = LiveIn.size(); i != e; ++i)
421 LiveOutCache[LiveIn[i]->getBlock()] = LOP;
423 IdxVNI = updateSSA(RegIdx, LiveIn, Idx, IdxMBB);
425 // Since we went through the trouble of a full BFS visiting all reaching defs,
426 // the values in LiveIn are now accurate. No more phi-defs are needed
427 // for these blocks, so we can color the live ranges.
428 for (unsigned i = 0, e = LiveIn.size(); i != e; ++i) {
429 MachineBasicBlock *MBB = LiveIn[i]->getBlock();
430 SlotIndex Start = LIS.getMBBStartIdx(MBB);
431 VNInfo *VNI = LiveOutCache[MBB].first;
433 // Anything in LiveIn other than IdxMBB is live-through.
434 // In IdxMBB, we should stop at Idx unless the same value is live-out.
435 if (MBB == IdxMBB && IdxVNI != VNI)
436 LI->addRange(LiveRange(Start, Idx.getNextSlot(), IdxVNI));
438 LI->addRange(LiveRange(Start, LIS.getMBBEndIdx(MBB), VNI));
442 VNInfo *SplitEditor::updateSSA(unsigned RegIdx,
443 SmallVectorImpl<MachineDomTreeNode*> &LiveIn,
445 const MachineBasicBlock *IdxMBB) {
446 // This is essentially the same iterative algorithm that SSAUpdater uses,
447 // except we already have a dominator tree, so we don't have to recompute it.
448 LiveInterval *LI = Edit->get(RegIdx);
453 // Propagate live-out values down the dominator tree, inserting phi-defs
454 // when necessary. Since LiveIn was created by a BFS, going backwards makes
455 // it more likely for us to visit immediate dominators before their
457 for (unsigned i = LiveIn.size(); i; --i) {
458 MachineDomTreeNode *Node = LiveIn[i-1];
459 MachineBasicBlock *MBB = Node->getBlock();
460 MachineDomTreeNode *IDom = Node->getIDom();
461 LiveOutPair IDomValue;
463 // We need a live-in value to a block with no immediate dominator?
464 // This is probably an unreachable block that has survived somehow.
465 bool needPHI = !IDom || !LiveOutSeen.test(IDom->getBlock()->getNumber());
467 // IDom dominates all of our predecessors, but it may not be the immediate
468 // dominator. Check if any of them have live-out values that are properly
469 // dominated by IDom. If so, we need a phi-def here.
471 IDomValue = LiveOutCache[IDom->getBlock()];
472 for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
473 PE = MBB->pred_end(); PI != PE; ++PI) {
474 LiveOutPair Value = LiveOutCache[*PI];
475 if (!Value.first || Value.first == IDomValue.first)
477 // This predecessor is carrying something other than IDomValue.
478 // It could be because IDomValue hasn't propagated yet, or it could be
479 // because MBB is in the dominance frontier of that value.
480 if (MDT.dominates(IDom, Value.second)) {
487 // Create a phi-def if required.
490 SlotIndex Start = LIS.getMBBStartIdx(MBB);
491 VNInfo *VNI = LI->getNextValue(Start, 0, LIS.getVNInfoAllocator());
492 VNI->setIsPHIDef(true);
493 // We no longer need LI to be live-in.
494 LiveIn.erase(LiveIn.begin()+(i-1));
495 // Blocks in LiveIn are either IdxMBB, or have a value live-through.
498 // Check if we need to update live-out info.
499 LiveOutPair &LOP = LiveOutCache[MBB];
500 if (LOP.second == Node || !LiveOutSeen.test(MBB->getNumber())) {
501 // We already have a live-out defined in MBB, so this must be IdxMBB.
502 assert(MBB == IdxMBB && "Adding phi-def to known live-out");
503 LI->addRange(LiveRange(Start, Idx.getNextSlot(), VNI));
505 // This phi-def is also live-out, so color the whole block.
506 LI->addRange(LiveRange(Start, LIS.getMBBEndIdx(MBB), VNI));
507 LOP = LiveOutPair(VNI, Node);
509 } else if (IDomValue.first) {
510 // No phi-def here. Remember incoming value for IdxMBB.
512 IdxVNI = IDomValue.first;
513 // IdxMBB need not be live-out.
514 if (!LiveOutSeen.test(MBB->getNumber()))
517 assert(LiveOutSeen.test(MBB->getNumber()) && "Expected live-out block");
518 // Propagate IDomValue if needed:
519 // MBB is live-out and doesn't define its own value.
520 LiveOutPair &LOP = LiveOutCache[MBB];
521 if (LOP.second != Node && LOP.first != IDomValue.first) {
529 assert(IdxVNI && "Didn't find value for Idx");
533 VNInfo *SplitEditor::defFromParent(unsigned RegIdx,
536 MachineBasicBlock &MBB,
537 MachineBasicBlock::iterator I) {
538 MachineInstr *CopyMI = 0;
540 LiveInterval *LI = Edit->get(RegIdx);
542 // Attempt cheap-as-a-copy rematerialization.
543 LiveRangeEdit::Remat RM(ParentVNI);
544 if (Edit->canRematerializeAt(RM, UseIdx, true, LIS)) {
545 Def = Edit->rematerializeAt(MBB, I, LI->reg, RM, LIS, TII, TRI);
547 // Can't remat, just insert a copy from parent.
548 CopyMI = BuildMI(MBB, I, DebugLoc(), TII.get(TargetOpcode::COPY), LI->reg)
549 .addReg(Edit->getReg());
550 Def = LIS.InsertMachineInstrInMaps(CopyMI).getDefIndex();
553 // Define the value in Reg.
554 VNInfo *VNI = defValue(RegIdx, ParentVNI, Def);
555 VNI->setCopy(CopyMI);
559 /// Create a new virtual register and live interval.
560 void SplitEditor::openIntv() {
561 assert(!OpenIdx && "Previous LI not closed before openIntv");
563 // Create the complement as index 0.
565 Edit->create(LIS, VRM);
567 // Create the open interval.
568 OpenIdx = Edit->size();
569 Edit->create(LIS, VRM);
572 SlotIndex SplitEditor::enterIntvBefore(SlotIndex Idx) {
573 assert(OpenIdx && "openIntv not called before enterIntvBefore");
574 DEBUG(dbgs() << " enterIntvBefore " << Idx);
575 Idx = Idx.getBaseIndex();
576 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Idx);
578 DEBUG(dbgs() << ": not live\n");
581 DEBUG(dbgs() << ": valno " << ParentVNI->id << '\n');
582 MachineInstr *MI = LIS.getInstructionFromIndex(Idx);
583 assert(MI && "enterIntvBefore called with invalid index");
585 VNInfo *VNI = defFromParent(OpenIdx, ParentVNI, Idx, *MI->getParent(), MI);
589 SlotIndex SplitEditor::enterIntvAtEnd(MachineBasicBlock &MBB) {
590 assert(OpenIdx && "openIntv not called before enterIntvAtEnd");
591 SlotIndex End = LIS.getMBBEndIdx(&MBB);
592 SlotIndex Last = End.getPrevSlot();
593 DEBUG(dbgs() << " enterIntvAtEnd BB#" << MBB.getNumber() << ", " << Last);
594 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Last);
596 DEBUG(dbgs() << ": not live\n");
599 DEBUG(dbgs() << ": valno " << ParentVNI->id);
600 VNInfo *VNI = defFromParent(OpenIdx, ParentVNI, Last, MBB,
601 LIS.getLastSplitPoint(Edit->getParent(), &MBB));
602 RegAssign.insert(VNI->def, End, OpenIdx);
607 /// useIntv - indicate that all instructions in MBB should use OpenLI.
608 void SplitEditor::useIntv(const MachineBasicBlock &MBB) {
609 useIntv(LIS.getMBBStartIdx(&MBB), LIS.getMBBEndIdx(&MBB));
612 void SplitEditor::useIntv(SlotIndex Start, SlotIndex End) {
613 assert(OpenIdx && "openIntv not called before useIntv");
614 DEBUG(dbgs() << " useIntv [" << Start << ';' << End << "):");
615 RegAssign.insert(Start, End, OpenIdx);
619 SlotIndex SplitEditor::leaveIntvAfter(SlotIndex Idx) {
620 assert(OpenIdx && "openIntv not called before leaveIntvAfter");
621 DEBUG(dbgs() << " leaveIntvAfter " << Idx);
623 // The interval must be live beyond the instruction at Idx.
624 Idx = Idx.getBoundaryIndex();
625 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Idx);
627 DEBUG(dbgs() << ": not live\n");
628 return Idx.getNextSlot();
630 DEBUG(dbgs() << ": valno " << ParentVNI->id << '\n');
632 MachineInstr *MI = LIS.getInstructionFromIndex(Idx);
633 assert(MI && "No instruction at index");
634 VNInfo *VNI = defFromParent(0, ParentVNI, Idx, *MI->getParent(),
635 llvm::next(MachineBasicBlock::iterator(MI)));
639 SlotIndex SplitEditor::leaveIntvBefore(SlotIndex Idx) {
640 assert(OpenIdx && "openIntv not called before leaveIntvBefore");
641 DEBUG(dbgs() << " leaveIntvBefore " << Idx);
643 // The interval must be live into the instruction at Idx.
644 Idx = Idx.getBoundaryIndex();
645 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Idx);
647 DEBUG(dbgs() << ": not live\n");
648 return Idx.getNextSlot();
650 DEBUG(dbgs() << ": valno " << ParentVNI->id << '\n');
652 MachineInstr *MI = LIS.getInstructionFromIndex(Idx);
653 assert(MI && "No instruction at index");
654 VNInfo *VNI = defFromParent(0, ParentVNI, Idx, *MI->getParent(), MI);
658 SlotIndex SplitEditor::leaveIntvAtTop(MachineBasicBlock &MBB) {
659 assert(OpenIdx && "openIntv not called before leaveIntvAtTop");
660 SlotIndex Start = LIS.getMBBStartIdx(&MBB);
661 DEBUG(dbgs() << " leaveIntvAtTop BB#" << MBB.getNumber() << ", " << Start);
663 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Start);
665 DEBUG(dbgs() << ": not live\n");
669 VNInfo *VNI = defFromParent(0, ParentVNI, Start, MBB,
670 MBB.SkipPHIsAndLabels(MBB.begin()));
671 RegAssign.insert(Start, VNI->def, OpenIdx);
676 void SplitEditor::overlapIntv(SlotIndex Start, SlotIndex End) {
677 assert(OpenIdx && "openIntv not called before overlapIntv");
678 const VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Start);
679 assert(ParentVNI == Edit->getParent().getVNInfoAt(End.getPrevSlot()) &&
680 "Parent changes value in extended range");
681 assert(LIS.getMBBFromIndex(Start) == LIS.getMBBFromIndex(End) &&
682 "Range cannot span basic blocks");
684 // The complement interval will be extended as needed by extendRange().
686 markComplexMapped(0, ParentVNI);
687 DEBUG(dbgs() << " overlapIntv [" << Start << ';' << End << "):");
688 RegAssign.insert(Start, End, OpenIdx);
692 /// closeIntv - Indicate that we are done editing the currently open
693 /// LiveInterval, and ranges can be trimmed.
694 void SplitEditor::closeIntv() {
695 assert(OpenIdx && "openIntv not called before closeIntv");
699 /// transferSimpleValues - Transfer all simply defined values to the new live
701 /// Values that were rematerialized or that have multiple defs are left alone.
702 bool SplitEditor::transferSimpleValues() {
703 bool Skipped = false;
704 RegAssignMap::const_iterator AssignI = RegAssign.begin();
705 for (LiveInterval::const_iterator ParentI = Edit->getParent().begin(),
706 ParentE = Edit->getParent().end(); ParentI != ParentE; ++ParentI) {
707 DEBUG(dbgs() << " blit " << *ParentI << ':');
708 VNInfo *ParentVNI = ParentI->valno;
709 // RegAssign has holes where RegIdx 0 should be used.
710 SlotIndex Start = ParentI->start;
711 AssignI.advanceTo(Start);
714 SlotIndex End = ParentI->end;
715 if (!AssignI.valid()) {
717 } else if (AssignI.start() <= Start) {
718 RegIdx = AssignI.value();
719 if (AssignI.stop() < End) {
720 End = AssignI.stop();
725 End = std::min(End, AssignI.start());
727 DEBUG(dbgs() << " [" << Start << ';' << End << ")=" << RegIdx);
728 if (VNInfo *VNI = Values.lookup(std::make_pair(RegIdx, ParentVNI->id))) {
729 DEBUG(dbgs() << ':' << VNI->id);
730 Edit->get(RegIdx)->addRange(LiveRange(Start, End, VNI));
734 } while (Start != ParentI->end);
735 DEBUG(dbgs() << '\n');
740 void SplitEditor::extendPHIKillRanges() {
741 // Extend live ranges to be live-out for successor PHI values.
742 for (LiveInterval::const_vni_iterator I = Edit->getParent().vni_begin(),
743 E = Edit->getParent().vni_end(); I != E; ++I) {
744 const VNInfo *PHIVNI = *I;
745 if (PHIVNI->isUnused() || !PHIVNI->isPHIDef())
747 unsigned RegIdx = RegAssign.lookup(PHIVNI->def);
748 MachineBasicBlock *MBB = LIS.getMBBFromIndex(PHIVNI->def);
749 for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
750 PE = MBB->pred_end(); PI != PE; ++PI) {
751 SlotIndex End = LIS.getMBBEndIdx(*PI).getPrevSlot();
752 // The predecessor may not have a live-out value. That is OK, like an
753 // undef PHI operand.
754 if (Edit->getParent().liveAt(End)) {
755 assert(RegAssign.lookup(End) == RegIdx &&
756 "Different register assignment in phi predecessor");
757 extendRange(RegIdx, End);
763 /// rewriteAssigned - Rewrite all uses of Edit->getReg().
764 void SplitEditor::rewriteAssigned(bool ExtendRanges) {
765 for (MachineRegisterInfo::reg_iterator RI = MRI.reg_begin(Edit->getReg()),
766 RE = MRI.reg_end(); RI != RE;) {
767 MachineOperand &MO = RI.getOperand();
768 MachineInstr *MI = MO.getParent();
770 // LiveDebugVariables should have handled all DBG_VALUE instructions.
771 if (MI->isDebugValue()) {
772 DEBUG(dbgs() << "Zapping " << *MI);
777 // <undef> operands don't really read the register, so just assign them to
779 if (MO.isUse() && MO.isUndef()) {
780 MO.setReg(Edit->get(0)->reg);
784 SlotIndex Idx = LIS.getInstructionIndex(MI);
786 Idx = MO.isEarlyClobber() ? Idx.getUseIndex() : Idx.getDefIndex();
788 // Rewrite to the mapped register at Idx.
789 unsigned RegIdx = RegAssign.lookup(Idx);
790 MO.setReg(Edit->get(RegIdx)->reg);
791 DEBUG(dbgs() << " rewr BB#" << MI->getParent()->getNumber() << '\t'
792 << Idx << ':' << RegIdx << '\t' << *MI);
794 // Extend liveness to Idx if the instruction reads reg.
798 // Skip instructions that don't read Reg.
800 if (!MO.getSubReg() && !MO.isEarlyClobber())
802 // We may wan't to extend a live range for a partial redef, or for a use
803 // tied to an early clobber.
804 Idx = Idx.getPrevSlot();
805 if (!Edit->getParent().liveAt(Idx))
808 Idx = Idx.getUseIndex();
810 extendRange(RegIdx, Idx);
814 void SplitEditor::deleteRematVictims() {
815 SmallVector<MachineInstr*, 8> Dead;
816 for (LiveRangeEdit::iterator I = Edit->begin(), E = Edit->end(); I != E; ++I){
817 LiveInterval *LI = *I;
818 for (LiveInterval::const_iterator LII = LI->begin(), LIE = LI->end();
820 // Dead defs end at the store slot.
821 if (LII->end != LII->valno->def.getNextSlot())
823 MachineInstr *MI = LIS.getInstructionFromIndex(LII->valno->def);
824 assert(MI && "Missing instruction for dead def");
825 MI->addRegisterDead(LI->reg, &TRI);
827 if (!MI->allDefsAreDead())
830 DEBUG(dbgs() << "All defs dead: " << *MI);
838 Edit->eliminateDeadDefs(Dead, LIS, VRM, TII);
841 void SplitEditor::finish() {
842 assert(OpenIdx == 0 && "Previous LI not closed before rewrite");
845 // At this point, the live intervals in Edit contain VNInfos corresponding to
846 // the inserted copies.
848 // Add the original defs from the parent interval.
849 for (LiveInterval::const_vni_iterator I = Edit->getParent().vni_begin(),
850 E = Edit->getParent().vni_end(); I != E; ++I) {
851 const VNInfo *ParentVNI = *I;
852 if (ParentVNI->isUnused())
854 unsigned RegIdx = RegAssign.lookup(ParentVNI->def);
855 VNInfo *VNI = defValue(RegIdx, ParentVNI, ParentVNI->def);
856 VNI->setIsPHIDef(ParentVNI->isPHIDef());
857 VNI->setCopy(ParentVNI->getCopy());
859 // Mark rematted values as complex everywhere to force liveness computation.
860 // The new live ranges may be truncated.
861 if (Edit->didRematerialize(ParentVNI))
862 for (unsigned i = 0, e = Edit->size(); i != e; ++i)
863 markComplexMapped(i, ParentVNI);
867 // Every new interval must have a def by now, otherwise the split is bogus.
868 for (LiveRangeEdit::iterator I = Edit->begin(), E = Edit->end(); I != E; ++I)
869 assert((*I)->hasAtLeastOneValue() && "Split interval has no value");
872 // Transfer the simply mapped values, check if any are complex.
873 bool Complex = transferSimpleValues();
875 extendPHIKillRanges();
879 // Rewrite virtual registers, possibly extending ranges.
880 rewriteAssigned(Complex);
882 // Delete defs that were rematted everywhere.
884 deleteRematVictims();
886 // Get rid of unused values and set phi-kill flags.
887 for (LiveRangeEdit::iterator I = Edit->begin(), E = Edit->end(); I != E; ++I)
888 (*I)->RenumberValues(LIS);
890 // Now check if any registers were separated into multiple components.
891 ConnectedVNInfoEqClasses ConEQ(LIS);
892 for (unsigned i = 0, e = Edit->size(); i != e; ++i) {
893 // Don't use iterators, they are invalidated by create() below.
894 LiveInterval *li = Edit->get(i);
895 unsigned NumComp = ConEQ.Classify(li);
898 DEBUG(dbgs() << " " << NumComp << " components: " << *li << '\n');
899 SmallVector<LiveInterval*, 8> dups;
901 for (unsigned i = 1; i != NumComp; ++i)
902 dups.push_back(&Edit->create(LIS, VRM));
903 ConEQ.Distribute(&dups[0], MRI);
906 // Calculate spill weight and allocation hints for new intervals.
907 Edit->calculateRegClassAndHint(VRM.getMachineFunction(), LIS, SA.Loops);
911 //===----------------------------------------------------------------------===//
912 // Single Block Splitting
913 //===----------------------------------------------------------------------===//
915 /// getMultiUseBlocks - if CurLI has more than one use in a basic block, it
916 /// may be an advantage to split CurLI for the duration of the block.
917 bool SplitAnalysis::getMultiUseBlocks(BlockPtrSet &Blocks) {
918 // If CurLI is local to one block, there is no point to splitting it.
919 if (UseBlocks.size() <= 1)
921 // Add blocks with multiple uses.
922 for (unsigned i = 0, e = UseBlocks.size(); i != e; ++i) {
923 const BlockInfo &BI = UseBlocks[i];
924 if (BI.FirstUse == BI.LastUse)
926 Blocks.insert(BI.MBB);
928 return !Blocks.empty();
931 /// splitSingleBlocks - Split CurLI into a separate live interval inside each
932 /// basic block in Blocks.
933 void SplitEditor::splitSingleBlocks(const SplitAnalysis::BlockPtrSet &Blocks) {
934 DEBUG(dbgs() << " splitSingleBlocks for " << Blocks.size() << " blocks.\n");
935 ArrayRef<SplitAnalysis::BlockInfo> UseBlocks = SA.getUseBlocks();
936 for (unsigned i = 0; i != UseBlocks.size(); ++i) {
937 const SplitAnalysis::BlockInfo &BI = UseBlocks[i];
938 if (!Blocks.count(BI.MBB))
942 SlotIndex LastSplitPoint = SA.getLastSplitPoint(BI.MBB->getNumber());
943 SlotIndex SegStart = enterIntvBefore(std::min(BI.FirstUse,
945 if (!BI.LiveOut || BI.LastUse < LastSplitPoint) {
946 useIntv(SegStart, leaveIntvAfter(BI.LastUse));
948 // The last use is after the last valid split point.
949 SlotIndex SegStop = leaveIntvBefore(LastSplitPoint);
950 useIntv(SegStart, SegStop);
951 overlapIntv(SegStop, BI.LastUse);