1 //===---------- SplitKit.cpp - Toolkit for splitting live ranges ----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the SplitAnalysis class as well as mutator functions for
11 // live range splitting.
13 //===----------------------------------------------------------------------===//
15 #define DEBUG_TYPE "regalloc"
17 #include "LiveRangeEdit.h"
18 #include "VirtRegMap.h"
19 #include "llvm/ADT/Statistic.h"
20 #include "llvm/CodeGen/LiveIntervalAnalysis.h"
21 #include "llvm/CodeGen/MachineDominators.h"
22 #include "llvm/CodeGen/MachineInstrBuilder.h"
23 #include "llvm/CodeGen/MachineRegisterInfo.h"
24 #include "llvm/Support/Debug.h"
25 #include "llvm/Support/raw_ostream.h"
26 #include "llvm/Target/TargetInstrInfo.h"
27 #include "llvm/Target/TargetMachine.h"
31 STATISTIC(NumFinished, "Number of splits finished");
32 STATISTIC(NumSimple, "Number of splits that were simple");
33 STATISTIC(NumCopies, "Number of copies inserted for splitting");
34 STATISTIC(NumRemats, "Number of rematerialized defs for splitting");
35 STATISTIC(NumRepairs, "Number of invalid live ranges repaired");
37 //===----------------------------------------------------------------------===//
39 //===----------------------------------------------------------------------===//
41 SplitAnalysis::SplitAnalysis(const VirtRegMap &vrm,
42 const LiveIntervals &lis,
43 const MachineLoopInfo &mli)
44 : MF(vrm.getMachineFunction()),
48 TII(*MF.getTarget().getInstrInfo()),
50 LastSplitPoint(MF.getNumBlockIDs()) {}
52 void SplitAnalysis::clear() {
55 ThroughBlocks.clear();
57 DidRepairRange = false;
60 SlotIndex SplitAnalysis::computeLastSplitPoint(unsigned Num) {
61 const MachineBasicBlock *MBB = MF.getBlockNumbered(Num);
62 const MachineBasicBlock *LPad = MBB->getLandingPadSuccessor();
63 std::pair<SlotIndex, SlotIndex> &LSP = LastSplitPoint[Num];
65 // Compute split points on the first call. The pair is independent of the
66 // current live interval.
67 if (!LSP.first.isValid()) {
68 MachineBasicBlock::const_iterator FirstTerm = MBB->getFirstTerminator();
69 if (FirstTerm == MBB->end())
70 LSP.first = LIS.getMBBEndIdx(MBB);
72 LSP.first = LIS.getInstructionIndex(FirstTerm);
74 // If there is a landing pad successor, also find the call instruction.
77 // There may not be a call instruction (?) in which case we ignore LPad.
78 LSP.second = LSP.first;
79 for (MachineBasicBlock::const_iterator I = FirstTerm, E = MBB->begin();
81 if (I->getDesc().isCall()) {
82 LSP.second = LIS.getInstructionIndex(I);
87 // If CurLI is live into a landing pad successor, move the last split point
88 // back to the call that may throw.
89 if (LPad && LSP.second.isValid() && LIS.isLiveInToMBB(*CurLI, LPad))
95 /// analyzeUses - Count instructions, basic blocks, and loops using CurLI.
96 void SplitAnalysis::analyzeUses() {
97 assert(UseSlots.empty() && "Call clear first");
99 // First get all the defs from the interval values. This provides the correct
100 // slots for early clobbers.
101 for (LiveInterval::const_vni_iterator I = CurLI->vni_begin(),
102 E = CurLI->vni_end(); I != E; ++I)
103 if (!(*I)->isPHIDef() && !(*I)->isUnused())
104 UseSlots.push_back((*I)->def);
106 // Get use slots form the use-def chain.
107 const MachineRegisterInfo &MRI = MF.getRegInfo();
108 for (MachineRegisterInfo::use_nodbg_iterator
109 I = MRI.use_nodbg_begin(CurLI->reg), E = MRI.use_nodbg_end(); I != E;
111 if (!I.getOperand().isUndef())
112 UseSlots.push_back(LIS.getInstructionIndex(&*I).getDefIndex());
114 array_pod_sort(UseSlots.begin(), UseSlots.end());
116 // Remove duplicates, keeping the smaller slot for each instruction.
117 // That is what we want for early clobbers.
118 UseSlots.erase(std::unique(UseSlots.begin(), UseSlots.end(),
119 SlotIndex::isSameInstr),
122 // Compute per-live block info.
123 if (!calcLiveBlockInfo()) {
124 // FIXME: calcLiveBlockInfo found inconsistencies in the live range.
125 // I am looking at you, SimpleRegisterCoalescing!
126 DidRepairRange = true;
128 DEBUG(dbgs() << "*** Fixing inconsistent live interval! ***\n");
129 const_cast<LiveIntervals&>(LIS)
130 .shrinkToUses(const_cast<LiveInterval*>(CurLI));
132 ThroughBlocks.clear();
133 bool fixed = calcLiveBlockInfo();
135 assert(fixed && "Couldn't fix broken live interval");
138 DEBUG(dbgs() << "Analyze counted "
139 << UseSlots.size() << " instrs in "
140 << UseBlocks.size() << " blocks, through "
141 << NumThroughBlocks << " blocks.\n");
144 /// calcLiveBlockInfo - Fill the LiveBlocks array with information about blocks
145 /// where CurLI is live.
146 bool SplitAnalysis::calcLiveBlockInfo() {
147 ThroughBlocks.resize(MF.getNumBlockIDs());
148 NumThroughBlocks = 0;
152 LiveInterval::const_iterator LVI = CurLI->begin();
153 LiveInterval::const_iterator LVE = CurLI->end();
155 SmallVectorImpl<SlotIndex>::const_iterator UseI, UseE;
156 UseI = UseSlots.begin();
157 UseE = UseSlots.end();
159 // Loop over basic blocks where CurLI is live.
160 MachineFunction::iterator MFI = LIS.getMBBFromIndex(LVI->start);
164 SlotIndex Start, Stop;
165 tie(Start, Stop) = LIS.getSlotIndexes()->getMBBRange(BI.MBB);
167 // LVI is the first live segment overlapping MBB.
168 BI.LiveIn = LVI->start <= Start;
172 // Find the first and last uses in the block.
173 bool Uses = UseI != UseE && *UseI < Stop;
176 assert(BI.FirstUse >= Start);
178 while (UseI != UseE && *UseI < Stop);
179 BI.LastUse = UseI[-1];
180 assert(BI.LastUse < Stop);
183 // Look for gaps in the live range.
186 while (LVI->end < Stop) {
187 SlotIndex LastStop = LVI->end;
188 if (++LVI == LVE || LVI->start >= Stop) {
193 if (LastStop < LVI->start) {
200 // Don't set LiveThrough when the block has a gap.
201 BI.LiveThrough = !hasGap && BI.LiveIn && BI.LiveOut;
203 UseBlocks.push_back(BI);
206 ThroughBlocks.set(BI.MBB->getNumber());
208 // FIXME: This should never happen. The live range stops or starts without a
209 // corresponding use. An earlier pass did something wrong.
210 if (!BI.LiveThrough && !Uses)
213 // LVI is now at LVE or LVI->end >= Stop.
217 // Live segment ends exactly at Stop. Move to the next segment.
218 if (LVI->end == Stop && ++LVI == LVE)
221 // Pick the next basic block.
222 if (LVI->start < Stop)
225 MFI = LIS.getMBBFromIndex(LVI->start);
230 unsigned SplitAnalysis::countLiveBlocks(const LiveInterval *cli) const {
233 LiveInterval *li = const_cast<LiveInterval*>(cli);
234 LiveInterval::iterator LVI = li->begin();
235 LiveInterval::iterator LVE = li->end();
238 // Loop over basic blocks where li is live.
239 MachineFunction::const_iterator MFI = LIS.getMBBFromIndex(LVI->start);
240 SlotIndex Stop = LIS.getMBBEndIdx(MFI);
243 LVI = li->advanceTo(LVI, Stop);
248 Stop = LIS.getMBBEndIdx(MFI);
249 } while (Stop <= LVI->start);
253 bool SplitAnalysis::isOriginalEndpoint(SlotIndex Idx) const {
254 unsigned OrigReg = VRM.getOriginal(CurLI->reg);
255 const LiveInterval &Orig = LIS.getInterval(OrigReg);
256 assert(!Orig.empty() && "Splitting empty interval?");
257 LiveInterval::const_iterator I = Orig.find(Idx);
259 // Range containing Idx should begin at Idx.
260 if (I != Orig.end() && I->start <= Idx)
261 return I->start == Idx;
263 // Range does not contain Idx, previous must end at Idx.
264 return I != Orig.begin() && (--I)->end == Idx;
267 void SplitAnalysis::analyze(const LiveInterval *li) {
274 //===----------------------------------------------------------------------===//
276 //===----------------------------------------------------------------------===//
278 /// Create a new SplitEditor for editing the LiveInterval analyzed by SA.
279 SplitEditor::SplitEditor(SplitAnalysis &sa,
282 MachineDominatorTree &mdt)
283 : SA(sa), LIS(lis), VRM(vrm),
284 MRI(vrm.getMachineFunction().getRegInfo()),
286 TII(*vrm.getMachineFunction().getTarget().getInstrInfo()),
287 TRI(*vrm.getMachineFunction().getTarget().getRegisterInfo()),
293 void SplitEditor::reset(LiveRangeEdit &lre) {
299 // We don't need to clear LiveOutCache, only LiveOutSeen entries are read.
302 // We don't need an AliasAnalysis since we will only be performing
303 // cheap-as-a-copy remats anyway.
304 Edit->anyRematerializable(LIS, TII, 0);
307 void SplitEditor::dump() const {
308 if (RegAssign.empty()) {
309 dbgs() << " empty\n";
313 for (RegAssignMap::const_iterator I = RegAssign.begin(); I.valid(); ++I)
314 dbgs() << " [" << I.start() << ';' << I.stop() << "):" << I.value();
318 VNInfo *SplitEditor::defValue(unsigned RegIdx,
319 const VNInfo *ParentVNI,
321 assert(ParentVNI && "Mapping NULL value");
322 assert(Idx.isValid() && "Invalid SlotIndex");
323 assert(Edit->getParent().getVNInfoAt(Idx) == ParentVNI && "Bad Parent VNI");
324 LiveInterval *LI = Edit->get(RegIdx);
326 // Create a new value.
327 VNInfo *VNI = LI->getNextValue(Idx, 0, LIS.getVNInfoAllocator());
329 // Use insert for lookup, so we can add missing values with a second lookup.
330 std::pair<ValueMap::iterator, bool> InsP =
331 Values.insert(std::make_pair(std::make_pair(RegIdx, ParentVNI->id), VNI));
333 // This was the first time (RegIdx, ParentVNI) was mapped.
334 // Keep it as a simple def without any liveness.
338 // If the previous value was a simple mapping, add liveness for it now.
339 if (VNInfo *OldVNI = InsP.first->second) {
340 SlotIndex Def = OldVNI->def;
341 LI->addRange(LiveRange(Def, Def.getNextSlot(), OldVNI));
342 // No longer a simple mapping.
343 InsP.first->second = 0;
346 // This is a complex mapping, add liveness for VNI
347 SlotIndex Def = VNI->def;
348 LI->addRange(LiveRange(Def, Def.getNextSlot(), VNI));
353 void SplitEditor::markComplexMapped(unsigned RegIdx, const VNInfo *ParentVNI) {
354 assert(ParentVNI && "Mapping NULL value");
355 VNInfo *&VNI = Values[std::make_pair(RegIdx, ParentVNI->id)];
357 // ParentVNI was either unmapped or already complex mapped. Either way.
361 // This was previously a single mapping. Make sure the old def is represented
362 // by a trivial live range.
363 SlotIndex Def = VNI->def;
364 Edit->get(RegIdx)->addRange(LiveRange(Def, Def.getNextSlot(), VNI));
368 // extendRange - Extend the live range to reach Idx.
369 // Potentially create phi-def values.
370 void SplitEditor::extendRange(unsigned RegIdx, SlotIndex Idx) {
371 assert(Idx.isValid() && "Invalid SlotIndex");
372 MachineBasicBlock *IdxMBB = LIS.getMBBFromIndex(Idx);
373 assert(IdxMBB && "No MBB at Idx");
374 LiveInterval *LI = Edit->get(RegIdx);
376 // Is there a def in the same MBB we can extend?
377 if (LI->extendInBlock(LIS.getMBBStartIdx(IdxMBB), Idx))
380 // Now for the fun part. We know that ParentVNI potentially has multiple defs,
381 // and we may need to create even more phi-defs to preserve VNInfo SSA form.
382 // Perform a search for all predecessor blocks where we know the dominating
384 VNInfo *VNI = findReachingDefs(LI, IdxMBB, Idx.getNextSlot());
386 // When there were multiple different values, we may need new PHIs.
390 // Poor man's SSA update for the single-value case.
391 LiveOutPair LOP(VNI, MDT[LIS.getMBBFromIndex(VNI->def)]);
392 for (SmallVectorImpl<LiveInBlock>::iterator I = LiveInBlocks.begin(),
393 E = LiveInBlocks.end(); I != E; ++I) {
394 MachineBasicBlock *MBB = I->DomNode->getBlock();
395 SlotIndex Start = LIS.getMBBStartIdx(MBB);
396 if (I->Kill.isValid())
397 LI->addRange(LiveRange(Start, I->Kill, VNI));
399 LiveOutCache[MBB] = LOP;
400 LI->addRange(LiveRange(Start, LIS.getMBBEndIdx(MBB), VNI));
405 /// findReachingDefs - Search the CFG for known live-out values.
406 /// Add required live-in blocks to LiveInBlocks.
407 VNInfo *SplitEditor::findReachingDefs(LiveInterval *LI,
408 MachineBasicBlock *KillMBB,
410 // Initialize the live-out cache the first time it is needed.
411 if (LiveOutSeen.empty()) {
412 unsigned N = VRM.getMachineFunction().getNumBlockIDs();
413 LiveOutSeen.resize(N);
414 LiveOutCache.resize(N);
417 // Blocks where LI should be live-in.
418 SmallVector<MachineBasicBlock*, 16> WorkList(1, KillMBB);
420 // Remember if we have seen more than one value.
421 bool UniqueVNI = true;
424 // Using LiveOutCache as a visited set, perform a BFS for all reaching defs.
425 for (unsigned i = 0; i != WorkList.size(); ++i) {
426 MachineBasicBlock *MBB = WorkList[i];
427 assert(!MBB->pred_empty() && "Value live-in to entry block?");
428 for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
429 PE = MBB->pred_end(); PI != PE; ++PI) {
430 MachineBasicBlock *Pred = *PI;
431 LiveOutPair &LOP = LiveOutCache[Pred];
433 // Is this a known live-out block?
434 if (LiveOutSeen.test(Pred->getNumber())) {
435 if (VNInfo *VNI = LOP.first) {
436 if (TheVNI && TheVNI != VNI)
443 // First time. LOP is garbage and must be cleared below.
444 LiveOutSeen.set(Pred->getNumber());
446 // Does Pred provide a live-out value?
447 SlotIndex Start, Last;
448 tie(Start, Last) = LIS.getSlotIndexes()->getMBBRange(Pred);
449 Last = Last.getPrevSlot();
450 VNInfo *VNI = LI->extendInBlock(Start, Last);
453 LOP.second = MDT[LIS.getMBBFromIndex(VNI->def)];
454 if (TheVNI && TheVNI != VNI)
461 // No, we need a live-in value for Pred as well
463 WorkList.push_back(Pred);
465 // Loopback to KillMBB, so value is really live through.
470 // Transfer WorkList to LiveInBlocks in reverse order.
471 // This ordering works best with updateSSA().
472 LiveInBlocks.clear();
473 LiveInBlocks.reserve(WorkList.size());
474 while(!WorkList.empty())
475 LiveInBlocks.push_back(MDT[WorkList.pop_back_val()]);
477 // The kill block may not be live-through.
478 assert(LiveInBlocks.back().DomNode->getBlock() == KillMBB);
479 LiveInBlocks.back().Kill = Kill;
481 return UniqueVNI ? TheVNI : 0;
484 void SplitEditor::updateSSA() {
485 // This is essentially the same iterative algorithm that SSAUpdater uses,
486 // except we already have a dominator tree, so we don't have to recompute it.
490 // Propagate live-out values down the dominator tree, inserting phi-defs
492 for (SmallVectorImpl<LiveInBlock>::iterator I = LiveInBlocks.begin(),
493 E = LiveInBlocks.end(); I != E; ++I) {
494 MachineDomTreeNode *Node = I->DomNode;
495 // Skip block if the live-in value has already been determined.
498 MachineBasicBlock *MBB = Node->getBlock();
499 MachineDomTreeNode *IDom = Node->getIDom();
500 LiveOutPair IDomValue;
502 // We need a live-in value to a block with no immediate dominator?
503 // This is probably an unreachable block that has survived somehow.
504 bool needPHI = !IDom || !LiveOutSeen.test(IDom->getBlock()->getNumber());
506 // IDom dominates all of our predecessors, but it may not be their
507 // immediate dominator. Check if any of them have live-out values that are
508 // properly dominated by IDom. If so, we need a phi-def here.
510 IDomValue = LiveOutCache[IDom->getBlock()];
511 for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
512 PE = MBB->pred_end(); PI != PE; ++PI) {
513 LiveOutPair Value = LiveOutCache[*PI];
514 if (!Value.first || Value.first == IDomValue.first)
516 // This predecessor is carrying something other than IDomValue.
517 // It could be because IDomValue hasn't propagated yet, or it could be
518 // because MBB is in the dominance frontier of that value.
519 if (MDT.dominates(IDom, Value.second)) {
526 // The value may be live-through even if Kill is set, as can happen when
527 // we are called from extendRange. In that case LiveOutSeen is true, and
528 // LiveOutCache indicates a foreign or missing value.
529 LiveOutPair &LOP = LiveOutCache[MBB];
531 // Create a phi-def if required.
534 SlotIndex Start = LIS.getMBBStartIdx(MBB);
535 unsigned RegIdx = RegAssign.lookup(Start);
536 LiveInterval *LI = Edit->get(RegIdx);
537 VNInfo *VNI = LI->getNextValue(Start, 0, LIS.getVNInfoAllocator());
538 VNI->setIsPHIDef(true);
540 // This block is done, we know the final value.
542 if (I->Kill.isValid())
543 LI->addRange(LiveRange(Start, I->Kill, VNI));
545 LI->addRange(LiveRange(Start, LIS.getMBBEndIdx(MBB), VNI));
546 LOP = LiveOutPair(VNI, Node);
548 } else if (IDomValue.first) {
549 // No phi-def here. Remember incoming value.
550 I->Value = IDomValue.first;
551 if (I->Kill.isValid())
553 // Propagate IDomValue if needed:
554 // MBB is live-out and doesn't define its own value.
555 if (LOP.second != Node && LOP.first != IDomValue.first) {
563 // The values in LiveInBlocks are now accurate. No more phi-defs are needed
564 // for these blocks, so we can color the live ranges.
565 for (SmallVectorImpl<LiveInBlock>::iterator I = LiveInBlocks.begin(),
566 E = LiveInBlocks.end(); I != E; ++I) {
569 assert(I->Value && "No live-in value found");
570 MachineBasicBlock *MBB = I->DomNode->getBlock();
571 SlotIndex Start = LIS.getMBBStartIdx(MBB);
572 unsigned RegIdx = RegAssign.lookup(Start);
573 LiveInterval *LI = Edit->get(RegIdx);
574 LI->addRange(LiveRange(Start, I->Kill.isValid() ?
575 I->Kill : LIS.getMBBEndIdx(MBB), I->Value));
579 VNInfo *SplitEditor::defFromParent(unsigned RegIdx,
582 MachineBasicBlock &MBB,
583 MachineBasicBlock::iterator I) {
584 MachineInstr *CopyMI = 0;
586 LiveInterval *LI = Edit->get(RegIdx);
588 // We may be trying to avoid interference that ends at a deleted instruction,
589 // so always begin RegIdx 0 early and all others late.
590 bool Late = RegIdx != 0;
592 // Attempt cheap-as-a-copy rematerialization.
593 LiveRangeEdit::Remat RM(ParentVNI);
594 if (Edit->canRematerializeAt(RM, UseIdx, true, LIS)) {
595 Def = Edit->rematerializeAt(MBB, I, LI->reg, RM, LIS, TII, TRI, Late);
598 // Can't remat, just insert a copy from parent.
599 CopyMI = BuildMI(MBB, I, DebugLoc(), TII.get(TargetOpcode::COPY), LI->reg)
600 .addReg(Edit->getReg());
601 Def = LIS.getSlotIndexes()->insertMachineInstrInMaps(CopyMI, Late)
606 // Define the value in Reg.
607 VNInfo *VNI = defValue(RegIdx, ParentVNI, Def);
608 VNI->setCopy(CopyMI);
612 /// Create a new virtual register and live interval.
613 unsigned SplitEditor::openIntv() {
614 // Create the complement as index 0.
616 Edit->create(LIS, VRM);
618 // Create the open interval.
619 OpenIdx = Edit->size();
620 Edit->create(LIS, VRM);
624 void SplitEditor::selectIntv(unsigned Idx) {
625 assert(Idx != 0 && "Cannot select the complement interval");
626 assert(Idx < Edit->size() && "Can only select previously opened interval");
630 SlotIndex SplitEditor::enterIntvBefore(SlotIndex Idx) {
631 assert(OpenIdx && "openIntv not called before enterIntvBefore");
632 DEBUG(dbgs() << " enterIntvBefore " << Idx);
633 Idx = Idx.getBaseIndex();
634 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Idx);
636 DEBUG(dbgs() << ": not live\n");
639 DEBUG(dbgs() << ": valno " << ParentVNI->id << '\n');
640 MachineInstr *MI = LIS.getInstructionFromIndex(Idx);
641 assert(MI && "enterIntvBefore called with invalid index");
643 VNInfo *VNI = defFromParent(OpenIdx, ParentVNI, Idx, *MI->getParent(), MI);
647 SlotIndex SplitEditor::enterIntvAtEnd(MachineBasicBlock &MBB) {
648 assert(OpenIdx && "openIntv not called before enterIntvAtEnd");
649 SlotIndex End = LIS.getMBBEndIdx(&MBB);
650 SlotIndex Last = End.getPrevSlot();
651 DEBUG(dbgs() << " enterIntvAtEnd BB#" << MBB.getNumber() << ", " << Last);
652 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Last);
654 DEBUG(dbgs() << ": not live\n");
657 DEBUG(dbgs() << ": valno " << ParentVNI->id);
658 VNInfo *VNI = defFromParent(OpenIdx, ParentVNI, Last, MBB,
659 LIS.getLastSplitPoint(Edit->getParent(), &MBB));
660 RegAssign.insert(VNI->def, End, OpenIdx);
665 /// useIntv - indicate that all instructions in MBB should use OpenLI.
666 void SplitEditor::useIntv(const MachineBasicBlock &MBB) {
667 useIntv(LIS.getMBBStartIdx(&MBB), LIS.getMBBEndIdx(&MBB));
670 void SplitEditor::useIntv(SlotIndex Start, SlotIndex End) {
671 assert(OpenIdx && "openIntv not called before useIntv");
672 DEBUG(dbgs() << " useIntv [" << Start << ';' << End << "):");
673 RegAssign.insert(Start, End, OpenIdx);
677 SlotIndex SplitEditor::leaveIntvAfter(SlotIndex Idx) {
678 assert(OpenIdx && "openIntv not called before leaveIntvAfter");
679 DEBUG(dbgs() << " leaveIntvAfter " << Idx);
681 // The interval must be live beyond the instruction at Idx.
682 Idx = Idx.getBoundaryIndex();
683 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Idx);
685 DEBUG(dbgs() << ": not live\n");
686 return Idx.getNextSlot();
688 DEBUG(dbgs() << ": valno " << ParentVNI->id << '\n');
690 MachineInstr *MI = LIS.getInstructionFromIndex(Idx);
691 assert(MI && "No instruction at index");
692 VNInfo *VNI = defFromParent(0, ParentVNI, Idx, *MI->getParent(),
693 llvm::next(MachineBasicBlock::iterator(MI)));
697 SlotIndex SplitEditor::leaveIntvBefore(SlotIndex Idx) {
698 assert(OpenIdx && "openIntv not called before leaveIntvBefore");
699 DEBUG(dbgs() << " leaveIntvBefore " << Idx);
701 // The interval must be live into the instruction at Idx.
702 Idx = Idx.getBoundaryIndex();
703 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Idx);
705 DEBUG(dbgs() << ": not live\n");
706 return Idx.getNextSlot();
708 DEBUG(dbgs() << ": valno " << ParentVNI->id << '\n');
710 MachineInstr *MI = LIS.getInstructionFromIndex(Idx);
711 assert(MI && "No instruction at index");
712 VNInfo *VNI = defFromParent(0, ParentVNI, Idx, *MI->getParent(), MI);
716 SlotIndex SplitEditor::leaveIntvAtTop(MachineBasicBlock &MBB) {
717 assert(OpenIdx && "openIntv not called before leaveIntvAtTop");
718 SlotIndex Start = LIS.getMBBStartIdx(&MBB);
719 DEBUG(dbgs() << " leaveIntvAtTop BB#" << MBB.getNumber() << ", " << Start);
721 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Start);
723 DEBUG(dbgs() << ": not live\n");
727 VNInfo *VNI = defFromParent(0, ParentVNI, Start, MBB,
728 MBB.SkipPHIsAndLabels(MBB.begin()));
729 RegAssign.insert(Start, VNI->def, OpenIdx);
734 void SplitEditor::overlapIntv(SlotIndex Start, SlotIndex End) {
735 assert(OpenIdx && "openIntv not called before overlapIntv");
736 const VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Start);
737 assert(ParentVNI == Edit->getParent().getVNInfoAt(End.getPrevSlot()) &&
738 "Parent changes value in extended range");
739 assert(LIS.getMBBFromIndex(Start) == LIS.getMBBFromIndex(End) &&
740 "Range cannot span basic blocks");
742 // The complement interval will be extended as needed by extendRange().
744 markComplexMapped(0, ParentVNI);
745 DEBUG(dbgs() << " overlapIntv [" << Start << ';' << End << "):");
746 RegAssign.insert(Start, End, OpenIdx);
750 /// transferValues - Transfer all possible values to the new live ranges.
751 /// Values that were rematerialized are left alone, they need extendRange().
752 bool SplitEditor::transferValues() {
753 bool Skipped = false;
754 LiveInBlocks.clear();
755 RegAssignMap::const_iterator AssignI = RegAssign.begin();
756 for (LiveInterval::const_iterator ParentI = Edit->getParent().begin(),
757 ParentE = Edit->getParent().end(); ParentI != ParentE; ++ParentI) {
758 DEBUG(dbgs() << " blit " << *ParentI << ':');
759 VNInfo *ParentVNI = ParentI->valno;
760 // RegAssign has holes where RegIdx 0 should be used.
761 SlotIndex Start = ParentI->start;
762 AssignI.advanceTo(Start);
765 SlotIndex End = ParentI->end;
766 if (!AssignI.valid()) {
768 } else if (AssignI.start() <= Start) {
769 RegIdx = AssignI.value();
770 if (AssignI.stop() < End) {
771 End = AssignI.stop();
776 End = std::min(End, AssignI.start());
779 // The interval [Start;End) is continuously mapped to RegIdx, ParentVNI.
780 DEBUG(dbgs() << " [" << Start << ';' << End << ")=" << RegIdx);
781 LiveInterval *LI = Edit->get(RegIdx);
783 // Check for a simply defined value that can be blitted directly.
784 if (VNInfo *VNI = Values.lookup(std::make_pair(RegIdx, ParentVNI->id))) {
785 DEBUG(dbgs() << ':' << VNI->id);
786 LI->addRange(LiveRange(Start, End, VNI));
791 // Skip rematerialized values, we need to use extendRange() and
792 // extendPHIKillRanges() to completely recompute the live ranges.
793 if (Edit->didRematerialize(ParentVNI)) {
794 DEBUG(dbgs() << "(remat)");
800 // Initialize the live-out cache the first time it is needed.
801 if (LiveOutSeen.empty()) {
802 unsigned N = VRM.getMachineFunction().getNumBlockIDs();
803 LiveOutSeen.resize(N);
804 LiveOutCache.resize(N);
807 // This value has multiple defs in RegIdx, but it wasn't rematerialized,
808 // so the live range is accurate. Add live-in blocks in [Start;End) to the
810 MachineFunction::iterator MBB = LIS.getMBBFromIndex(Start);
811 SlotIndex BlockStart, BlockEnd;
812 tie(BlockStart, BlockEnd) = LIS.getSlotIndexes()->getMBBRange(MBB);
814 // The first block may be live-in, or it may have its own def.
815 if (Start != BlockStart) {
816 VNInfo *VNI = LI->extendInBlock(BlockStart,
817 std::min(BlockEnd, End).getPrevSlot());
818 assert(VNI && "Missing def for complex mapped value");
819 DEBUG(dbgs() << ':' << VNI->id << "*BB#" << MBB->getNumber());
820 // MBB has its own def. Is it also live-out?
821 if (BlockEnd <= End) {
822 LiveOutSeen.set(MBB->getNumber());
823 LiveOutCache[MBB] = LiveOutPair(VNI, MDT[MBB]);
825 // Skip to the next block for live-in.
827 BlockStart = BlockEnd;
830 // Handle the live-in blocks covered by [Start;End).
831 assert(Start <= BlockStart && "Expected live-in block");
832 while (BlockStart < End) {
833 DEBUG(dbgs() << ">BB#" << MBB->getNumber());
834 BlockEnd = LIS.getMBBEndIdx(MBB);
835 if (BlockStart == ParentVNI->def) {
836 // This block has the def of a parent PHI, so it isn't live-in.
837 assert(ParentVNI->isPHIDef() && "Non-phi defined at block start?");
838 VNInfo *VNI = LI->extendInBlock(BlockStart,
839 std::min(BlockEnd, End).getPrevSlot());
840 assert(VNI && "Missing def for complex mapped parent PHI");
841 if (End >= BlockEnd) {
843 LiveOutSeen.set(MBB->getNumber());
844 LiveOutCache[MBB] = LiveOutPair(VNI, MDT[MBB]);
847 // This block needs a live-in value.
848 LiveInBlocks.push_back(MDT[MBB]);
849 // The last block covered may not be live-out.
851 LiveInBlocks.back().Kill = End;
853 // Live-out, but we need updateSSA to tell us the value.
854 LiveOutSeen.set(MBB->getNumber());
855 LiveOutCache[MBB] = LiveOutPair((VNInfo*)0,
856 (MachineDomTreeNode*)0);
859 BlockStart = BlockEnd;
863 } while (Start != ParentI->end);
864 DEBUG(dbgs() << '\n');
867 if (!LiveInBlocks.empty())
873 void SplitEditor::extendPHIKillRanges() {
874 // Extend live ranges to be live-out for successor PHI values.
875 for (LiveInterval::const_vni_iterator I = Edit->getParent().vni_begin(),
876 E = Edit->getParent().vni_end(); I != E; ++I) {
877 const VNInfo *PHIVNI = *I;
878 if (PHIVNI->isUnused() || !PHIVNI->isPHIDef())
880 unsigned RegIdx = RegAssign.lookup(PHIVNI->def);
881 MachineBasicBlock *MBB = LIS.getMBBFromIndex(PHIVNI->def);
882 for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
883 PE = MBB->pred_end(); PI != PE; ++PI) {
884 SlotIndex End = LIS.getMBBEndIdx(*PI).getPrevSlot();
885 // The predecessor may not have a live-out value. That is OK, like an
886 // undef PHI operand.
887 if (Edit->getParent().liveAt(End)) {
888 assert(RegAssign.lookup(End) == RegIdx &&
889 "Different register assignment in phi predecessor");
890 extendRange(RegIdx, End);
896 /// rewriteAssigned - Rewrite all uses of Edit->getReg().
897 void SplitEditor::rewriteAssigned(bool ExtendRanges) {
898 for (MachineRegisterInfo::reg_iterator RI = MRI.reg_begin(Edit->getReg()),
899 RE = MRI.reg_end(); RI != RE;) {
900 MachineOperand &MO = RI.getOperand();
901 MachineInstr *MI = MO.getParent();
903 // LiveDebugVariables should have handled all DBG_VALUE instructions.
904 if (MI->isDebugValue()) {
905 DEBUG(dbgs() << "Zapping " << *MI);
910 // <undef> operands don't really read the register, so just assign them to
912 if (MO.isUse() && MO.isUndef()) {
913 MO.setReg(Edit->get(0)->reg);
917 SlotIndex Idx = LIS.getInstructionIndex(MI);
919 Idx = MO.isEarlyClobber() ? Idx.getUseIndex() : Idx.getDefIndex();
921 // Rewrite to the mapped register at Idx.
922 unsigned RegIdx = RegAssign.lookup(Idx);
923 MO.setReg(Edit->get(RegIdx)->reg);
924 DEBUG(dbgs() << " rewr BB#" << MI->getParent()->getNumber() << '\t'
925 << Idx << ':' << RegIdx << '\t' << *MI);
927 // Extend liveness to Idx if the instruction reads reg.
931 // Skip instructions that don't read Reg.
933 if (!MO.getSubReg() && !MO.isEarlyClobber())
935 // We may wan't to extend a live range for a partial redef, or for a use
936 // tied to an early clobber.
937 Idx = Idx.getPrevSlot();
938 if (!Edit->getParent().liveAt(Idx))
941 Idx = Idx.getUseIndex();
943 extendRange(RegIdx, Idx);
947 void SplitEditor::deleteRematVictims() {
948 SmallVector<MachineInstr*, 8> Dead;
949 for (LiveRangeEdit::iterator I = Edit->begin(), E = Edit->end(); I != E; ++I){
950 LiveInterval *LI = *I;
951 for (LiveInterval::const_iterator LII = LI->begin(), LIE = LI->end();
953 // Dead defs end at the store slot.
954 if (LII->end != LII->valno->def.getNextSlot())
956 MachineInstr *MI = LIS.getInstructionFromIndex(LII->valno->def);
957 assert(MI && "Missing instruction for dead def");
958 MI->addRegisterDead(LI->reg, &TRI);
960 if (!MI->allDefsAreDead())
963 DEBUG(dbgs() << "All defs dead: " << *MI);
971 Edit->eliminateDeadDefs(Dead, LIS, VRM, TII);
974 void SplitEditor::finish(SmallVectorImpl<unsigned> *LRMap) {
977 // At this point, the live intervals in Edit contain VNInfos corresponding to
978 // the inserted copies.
980 // Add the original defs from the parent interval.
981 for (LiveInterval::const_vni_iterator I = Edit->getParent().vni_begin(),
982 E = Edit->getParent().vni_end(); I != E; ++I) {
983 const VNInfo *ParentVNI = *I;
984 if (ParentVNI->isUnused())
986 unsigned RegIdx = RegAssign.lookup(ParentVNI->def);
987 VNInfo *VNI = defValue(RegIdx, ParentVNI, ParentVNI->def);
988 VNI->setIsPHIDef(ParentVNI->isPHIDef());
989 VNI->setCopy(ParentVNI->getCopy());
991 // Mark rematted values as complex everywhere to force liveness computation.
992 // The new live ranges may be truncated.
993 if (Edit->didRematerialize(ParentVNI))
994 for (unsigned i = 0, e = Edit->size(); i != e; ++i)
995 markComplexMapped(i, ParentVNI);
999 // Every new interval must have a def by now, otherwise the split is bogus.
1000 for (LiveRangeEdit::iterator I = Edit->begin(), E = Edit->end(); I != E; ++I)
1001 assert((*I)->hasAtLeastOneValue() && "Split interval has no value");
1004 // Transfer the simply mapped values, check if any are skipped.
1005 bool Skipped = transferValues();
1007 extendPHIKillRanges();
1011 // Rewrite virtual registers, possibly extending ranges.
1012 rewriteAssigned(Skipped);
1014 // Delete defs that were rematted everywhere.
1016 deleteRematVictims();
1018 // Get rid of unused values and set phi-kill flags.
1019 for (LiveRangeEdit::iterator I = Edit->begin(), E = Edit->end(); I != E; ++I)
1020 (*I)->RenumberValues(LIS);
1022 // Provide a reverse mapping from original indices to Edit ranges.
1025 for (unsigned i = 0, e = Edit->size(); i != e; ++i)
1026 LRMap->push_back(i);
1029 // Now check if any registers were separated into multiple components.
1030 ConnectedVNInfoEqClasses ConEQ(LIS);
1031 for (unsigned i = 0, e = Edit->size(); i != e; ++i) {
1032 // Don't use iterators, they are invalidated by create() below.
1033 LiveInterval *li = Edit->get(i);
1034 unsigned NumComp = ConEQ.Classify(li);
1037 DEBUG(dbgs() << " " << NumComp << " components: " << *li << '\n');
1038 SmallVector<LiveInterval*, 8> dups;
1040 for (unsigned j = 1; j != NumComp; ++j)
1041 dups.push_back(&Edit->create(LIS, VRM));
1042 ConEQ.Distribute(&dups[0], MRI);
1043 // The new intervals all map back to i.
1045 LRMap->resize(Edit->size(), i);
1048 // Calculate spill weight and allocation hints for new intervals.
1049 Edit->calculateRegClassAndHint(VRM.getMachineFunction(), LIS, SA.Loops);
1051 assert(!LRMap || LRMap->size() == Edit->size());
1055 //===----------------------------------------------------------------------===//
1056 // Single Block Splitting
1057 //===----------------------------------------------------------------------===//
1059 /// getMultiUseBlocks - if CurLI has more than one use in a basic block, it
1060 /// may be an advantage to split CurLI for the duration of the block.
1061 bool SplitAnalysis::getMultiUseBlocks(BlockPtrSet &Blocks) {
1062 // If CurLI is local to one block, there is no point to splitting it.
1063 if (UseBlocks.size() <= 1)
1065 // Add blocks with multiple uses.
1066 for (unsigned i = 0, e = UseBlocks.size(); i != e; ++i) {
1067 const BlockInfo &BI = UseBlocks[i];
1068 if (BI.FirstUse == BI.LastUse)
1070 Blocks.insert(BI.MBB);
1072 return !Blocks.empty();
1075 void SplitEditor::splitSingleBlock(const SplitAnalysis::BlockInfo &BI) {
1077 SlotIndex LastSplitPoint = SA.getLastSplitPoint(BI.MBB->getNumber());
1078 SlotIndex SegStart = enterIntvBefore(std::min(BI.FirstUse,
1080 if (!BI.LiveOut || BI.LastUse < LastSplitPoint) {
1081 useIntv(SegStart, leaveIntvAfter(BI.LastUse));
1083 // The last use is after the last valid split point.
1084 SlotIndex SegStop = leaveIntvBefore(LastSplitPoint);
1085 useIntv(SegStart, SegStop);
1086 overlapIntv(SegStop, BI.LastUse);
1090 /// splitSingleBlocks - Split CurLI into a separate live interval inside each
1091 /// basic block in Blocks.
1092 void SplitEditor::splitSingleBlocks(const SplitAnalysis::BlockPtrSet &Blocks) {
1093 DEBUG(dbgs() << " splitSingleBlocks for " << Blocks.size() << " blocks.\n");
1094 ArrayRef<SplitAnalysis::BlockInfo> UseBlocks = SA.getUseBlocks();
1095 for (unsigned i = 0; i != UseBlocks.size(); ++i) {
1096 const SplitAnalysis::BlockInfo &BI = UseBlocks[i];
1097 if (Blocks.count(BI.MBB))
1098 splitSingleBlock(BI);