1 //===---------- SplitKit.cpp - Toolkit for splitting live ranges ----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the SplitAnalysis class as well as mutator functions for
11 // live range splitting.
13 //===----------------------------------------------------------------------===//
15 #define DEBUG_TYPE "regalloc"
17 #include "LiveRangeEdit.h"
18 #include "VirtRegMap.h"
19 #include "llvm/ADT/Statistic.h"
20 #include "llvm/CodeGen/CalcSpillWeights.h"
21 #include "llvm/CodeGen/LiveIntervalAnalysis.h"
22 #include "llvm/CodeGen/MachineDominators.h"
23 #include "llvm/CodeGen/MachineInstrBuilder.h"
24 #include "llvm/CodeGen/MachineRegisterInfo.h"
25 #include "llvm/Support/CommandLine.h"
26 #include "llvm/Support/Debug.h"
27 #include "llvm/Support/raw_ostream.h"
28 #include "llvm/Target/TargetInstrInfo.h"
29 #include "llvm/Target/TargetMachine.h"
34 AllowSplit("spiller-splits-edges",
35 cl::desc("Allow critical edge splitting during spilling"));
37 STATISTIC(NumFinished, "Number of splits finished");
38 STATISTIC(NumSimple, "Number of splits that were simple");
40 //===----------------------------------------------------------------------===//
42 //===----------------------------------------------------------------------===//
44 SplitAnalysis::SplitAnalysis(const VirtRegMap &vrm,
45 const LiveIntervals &lis,
46 const MachineLoopInfo &mli)
47 : MF(vrm.getMachineFunction()),
51 TII(*MF.getTarget().getInstrInfo()),
54 void SplitAnalysis::clear() {
62 bool SplitAnalysis::canAnalyzeBranch(const MachineBasicBlock *MBB) {
63 MachineBasicBlock *T, *F;
64 SmallVector<MachineOperand, 4> Cond;
65 return !TII.AnalyzeBranch(const_cast<MachineBasicBlock&>(*MBB), T, F, Cond);
68 /// analyzeUses - Count instructions, basic blocks, and loops using CurLI.
69 void SplitAnalysis::analyzeUses() {
70 const MachineRegisterInfo &MRI = MF.getRegInfo();
71 for (MachineRegisterInfo::reg_iterator I = MRI.reg_begin(CurLI->reg),
72 E = MRI.reg_end(); I != E; ++I) {
73 MachineOperand &MO = I.getOperand();
74 if (MO.isUse() && MO.isUndef())
76 MachineInstr *MI = MO.getParent();
77 if (MI->isDebugValue() || !UsingInstrs.insert(MI))
79 UseSlots.push_back(LIS.getInstructionIndex(MI).getDefIndex());
80 MachineBasicBlock *MBB = MI->getParent();
83 array_pod_sort(UseSlots.begin(), UseSlots.end());
85 DEBUG(dbgs() << " counted "
86 << UsingInstrs.size() << " instrs, "
87 << UsingBlocks.size() << " blocks.\n");
90 /// calcLiveBlockInfo - Fill the LiveBlocks array with information about blocks
91 /// where CurLI is live.
92 void SplitAnalysis::calcLiveBlockInfo() {
96 LiveInterval::const_iterator LVI = CurLI->begin();
97 LiveInterval::const_iterator LVE = CurLI->end();
99 SmallVectorImpl<SlotIndex>::const_iterator UseI, UseE;
100 UseI = UseSlots.begin();
101 UseE = UseSlots.end();
103 // Loop over basic blocks where CurLI is live.
104 MachineFunction::iterator MFI = LIS.getMBBFromIndex(LVI->start);
108 SlotIndex Start, Stop;
109 tie(Start, Stop) = LIS.getSlotIndexes()->getMBBRange(BI.MBB);
111 // The last split point is the latest possible insertion point that dominates
112 // all successor blocks. If interference reaches LastSplitPoint, it is not
113 // possible to insert a split or reload that makes CurLI live in the
115 MachineBasicBlock::iterator LSP = LIS.getLastSplitPoint(*CurLI, BI.MBB);
116 if (LSP == BI.MBB->end())
117 BI.LastSplitPoint = Stop;
119 BI.LastSplitPoint = LIS.getInstructionIndex(LSP);
121 // LVI is the first live segment overlapping MBB.
122 BI.LiveIn = LVI->start <= Start;
126 // Find the first and last uses in the block.
127 BI.Uses = hasUses(MFI);
128 if (BI.Uses && UseI != UseE) {
130 assert(BI.FirstUse >= Start);
132 while (UseI != UseE && *UseI < Stop);
133 BI.LastUse = UseI[-1];
134 assert(BI.LastUse < Stop);
137 // Look for gaps in the live range.
140 while (LVI->end < Stop) {
141 SlotIndex LastStop = LVI->end;
142 if (++LVI == LVE || LVI->start >= Stop) {
147 if (LastStop < LVI->start) {
154 // Don't set LiveThrough when the block has a gap.
155 BI.LiveThrough = !hasGap && BI.LiveIn && BI.LiveOut;
156 LiveBlocks.push_back(BI);
158 // LVI is now at LVE or LVI->end >= Stop.
162 // Live segment ends exactly at Stop. Move to the next segment.
163 if (LVI->end == Stop && ++LVI == LVE)
166 // Pick the next basic block.
167 if (LVI->start < Stop)
170 MFI = LIS.getMBBFromIndex(LVI->start);
174 bool SplitAnalysis::isOriginalEndpoint(SlotIndex Idx) const {
175 unsigned OrigReg = VRM.getOriginal(CurLI->reg);
176 const LiveInterval &Orig = LIS.getInterval(OrigReg);
177 assert(!Orig.empty() && "Splitting empty interval?");
178 LiveInterval::const_iterator I = Orig.find(Idx);
180 // Range containing Idx should begin at Idx.
181 if (I != Orig.end() && I->start <= Idx)
182 return I->start == Idx;
184 // Range does not contain Idx, previous must end at Idx.
185 return I != Orig.begin() && (--I)->end == Idx;
188 void SplitAnalysis::print(const BlockPtrSet &B, raw_ostream &OS) const {
189 for (BlockPtrSet::const_iterator I = B.begin(), E = B.end(); I != E; ++I) {
190 unsigned count = UsingBlocks.lookup(*I);
191 OS << " BB#" << (*I)->getNumber();
193 OS << '(' << count << ')';
197 void SplitAnalysis::analyze(const LiveInterval *li) {
204 //===----------------------------------------------------------------------===//
206 //===----------------------------------------------------------------------===//
208 /// Create a new SplitEditor for editing the LiveInterval analyzed by SA.
209 SplitEditor::SplitEditor(SplitAnalysis &sa,
212 MachineDominatorTree &mdt,
214 : SA(sa), LIS(lis), VRM(vrm),
215 MRI(vrm.getMachineFunction().getRegInfo()),
217 TII(*vrm.getMachineFunction().getTarget().getInstrInfo()),
218 TRI(*vrm.getMachineFunction().getTarget().getRegisterInfo()),
223 // We don't need an AliasAnalysis since we will only be performing
224 // cheap-as-a-copy remats anyway.
225 Edit.anyRematerializable(LIS, TII, 0);
228 void SplitEditor::dump() const {
229 if (RegAssign.empty()) {
230 dbgs() << " empty\n";
234 for (RegAssignMap::const_iterator I = RegAssign.begin(); I.valid(); ++I)
235 dbgs() << " [" << I.start() << ';' << I.stop() << "):" << I.value();
239 VNInfo *SplitEditor::defValue(unsigned RegIdx,
240 const VNInfo *ParentVNI,
242 assert(ParentVNI && "Mapping NULL value");
243 assert(Idx.isValid() && "Invalid SlotIndex");
244 assert(Edit.getParent().getVNInfoAt(Idx) == ParentVNI && "Bad Parent VNI");
245 LiveInterval *LI = Edit.get(RegIdx);
247 // Create a new value.
248 VNInfo *VNI = LI->getNextValue(Idx, 0, LIS.getVNInfoAllocator());
250 // Preserve the PHIDef bit.
251 if (ParentVNI->isPHIDef() && Idx == ParentVNI->def)
252 VNI->setIsPHIDef(true);
254 // Use insert for lookup, so we can add missing values with a second lookup.
255 std::pair<ValueMap::iterator, bool> InsP =
256 Values.insert(std::make_pair(std::make_pair(RegIdx, ParentVNI->id), VNI));
258 // This was the first time (RegIdx, ParentVNI) was mapped.
259 // Keep it as a simple def without any liveness.
263 // If the previous value was a simple mapping, add liveness for it now.
264 if (VNInfo *OldVNI = InsP.first->second) {
265 SlotIndex Def = OldVNI->def;
266 LI->addRange(LiveRange(Def, Def.getNextSlot(), OldVNI));
267 // No longer a simple mapping.
268 InsP.first->second = 0;
271 // This is a complex mapping, add liveness for VNI
272 SlotIndex Def = VNI->def;
273 LI->addRange(LiveRange(Def, Def.getNextSlot(), VNI));
278 void SplitEditor::markComplexMapped(unsigned RegIdx, const VNInfo *ParentVNI) {
279 assert(ParentVNI && "Mapping NULL value");
280 VNInfo *&VNI = Values[std::make_pair(RegIdx, ParentVNI->id)];
282 // ParentVNI was either unmapped or already complex mapped. Either way.
286 // This was previously a single mapping. Make sure the old def is represented
287 // by a trivial live range.
288 SlotIndex Def = VNI->def;
289 Edit.get(RegIdx)->addRange(LiveRange(Def, Def.getNextSlot(), VNI));
293 // extendRange - Extend the live range to reach Idx.
294 // Potentially create phi-def values.
295 void SplitEditor::extendRange(unsigned RegIdx, SlotIndex Idx) {
296 assert(Idx.isValid() && "Invalid SlotIndex");
297 MachineBasicBlock *IdxMBB = LIS.getMBBFromIndex(Idx);
298 assert(IdxMBB && "No MBB at Idx");
299 LiveInterval *LI = Edit.get(RegIdx);
301 // Is there a def in the same MBB we can extend?
302 if (LI->extendInBlock(LIS.getMBBStartIdx(IdxMBB), Idx))
305 // Now for the fun part. We know that ParentVNI potentially has multiple defs,
306 // and we may need to create even more phi-defs to preserve VNInfo SSA form.
307 // Perform a search for all predecessor blocks where we know the dominating
308 // VNInfo. Insert phi-def VNInfos along the path back to IdxMBB.
309 DEBUG(dbgs() << "\n Reaching defs for BB#" << IdxMBB->getNumber()
310 << " at " << Idx << " in " << *LI << '\n');
312 // Blocks where LI should be live-in.
313 SmallVector<MachineDomTreeNode*, 16> LiveIn;
314 LiveIn.push_back(MDT[IdxMBB]);
316 // Using LiveOutCache as a visited set, perform a BFS for all reaching defs.
317 for (unsigned i = 0; i != LiveIn.size(); ++i) {
318 MachineBasicBlock *MBB = LiveIn[i]->getBlock();
319 for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
320 PE = MBB->pred_end(); PI != PE; ++PI) {
321 MachineBasicBlock *Pred = *PI;
322 // Is this a known live-out block?
323 std::pair<LiveOutMap::iterator,bool> LOIP =
324 LiveOutCache.insert(std::make_pair(Pred, LiveOutPair()));
325 // Yes, we have been here before.
329 // Does Pred provide a live-out value?
330 SlotIndex Start, Last;
331 tie(Start, Last) = LIS.getSlotIndexes()->getMBBRange(Pred);
332 Last = Last.getPrevSlot();
333 if (VNInfo *VNI = LI->extendInBlock(Start, Last)) {
334 MachineBasicBlock *DefMBB = LIS.getMBBFromIndex(VNI->def);
335 LiveOutPair &LOP = LOIP.first->second;
337 LOP.second = MDT[DefMBB];
340 // No, we need a live-in value for Pred as well
342 LiveIn.push_back(MDT[Pred]);
346 // We may need to add phi-def values to preserve the SSA form.
347 VNInfo *IdxVNI = updateSSA(RegIdx, LiveIn, Idx, IdxMBB);
350 // Check the LiveOutCache invariants.
351 for (LiveOutMap::iterator I = LiveOutCache.begin(), E = LiveOutCache.end();
353 assert(I->first && "Null MBB entry in cache");
354 assert(I->second.first && "Null VNInfo in cache");
355 assert(I->second.second && "Null DomTreeNode in cache");
356 if (I->second.second->getBlock() == I->first)
358 for (MachineBasicBlock::pred_iterator PI = I->first->pred_begin(),
359 PE = I->first->pred_end(); PI != PE; ++PI)
360 assert(LiveOutCache.lookup(*PI) == I->second && "Bad invariant");
364 // Since we went through the trouble of a full BFS visiting all reaching defs,
365 // the values in LiveIn are now accurate. No more phi-defs are needed
366 // for these blocks, so we can color the live ranges.
367 for (unsigned i = 0, e = LiveIn.size(); i != e; ++i) {
368 MachineBasicBlock *MBB = LiveIn[i]->getBlock();
369 SlotIndex Start = LIS.getMBBStartIdx(MBB);
370 VNInfo *VNI = LiveOutCache.lookup(MBB).first;
372 // Anything in LiveIn other than IdxMBB is live-through.
373 // In IdxMBB, we should stop at Idx unless the same value is live-out.
374 if (MBB == IdxMBB && IdxVNI != VNI)
375 LI->addRange(LiveRange(Start, Idx.getNextSlot(), IdxVNI));
377 LI->addRange(LiveRange(Start, LIS.getMBBEndIdx(MBB), VNI));
381 VNInfo *SplitEditor::updateSSA(unsigned RegIdx,
382 SmallVectorImpl<MachineDomTreeNode*> &LiveIn,
384 const MachineBasicBlock *IdxMBB) {
385 // This is essentially the same iterative algorithm that SSAUpdater uses,
386 // except we already have a dominator tree, so we don't have to recompute it.
387 LiveInterval *LI = Edit.get(RegIdx);
392 DEBUG(dbgs() << " Iterating over " << LiveIn.size() << " blocks.\n");
393 // Propagate live-out values down the dominator tree, inserting phi-defs
394 // when necessary. Since LiveIn was created by a BFS, going backwards makes
395 // it more likely for us to visit immediate dominators before their
397 for (unsigned i = LiveIn.size(); i; --i) {
398 MachineDomTreeNode *Node = LiveIn[i-1];
399 MachineBasicBlock *MBB = Node->getBlock();
400 MachineDomTreeNode *IDom = Node->getIDom();
401 LiveOutPair IDomValue;
402 // We need a live-in value to a block with no immediate dominator?
403 // This is probably an unreachable block that has survived somehow.
404 bool needPHI = !IDom;
406 // Get the IDom live-out value.
408 LiveOutMap::iterator I = LiveOutCache.find(IDom->getBlock());
409 if (I != LiveOutCache.end())
410 IDomValue = I->second;
412 // If IDom is outside our set of live-out blocks, there must be new
413 // defs, and we need a phi-def here.
417 // IDom dominates all of our predecessors, but it may not be the immediate
418 // dominator. Check if any of them have live-out values that are properly
419 // dominated by IDom. If so, we need a phi-def here.
421 for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
422 PE = MBB->pred_end(); PI != PE; ++PI) {
423 LiveOutPair Value = LiveOutCache[*PI];
424 if (!Value.first || Value.first == IDomValue.first)
426 // This predecessor is carrying something other than IDomValue.
427 // It could be because IDomValue hasn't propagated yet, or it could be
428 // because MBB is in the dominance frontier of that value.
429 if (MDT.dominates(IDom, Value.second)) {
436 // Create a phi-def if required.
439 SlotIndex Start = LIS.getMBBStartIdx(MBB);
440 VNInfo *VNI = LI->getNextValue(Start, 0, LIS.getVNInfoAllocator());
441 VNI->setIsPHIDef(true);
442 DEBUG(dbgs() << " - BB#" << MBB->getNumber()
443 << " phi-def #" << VNI->id << " at " << Start << '\n');
444 // We no longer need LI to be live-in.
445 LiveIn.erase(LiveIn.begin()+(i-1));
446 // Blocks in LiveIn are either IdxMBB, or have a value live-through.
449 // Check if we need to update live-out info.
450 LiveOutMap::iterator I = LiveOutCache.find(MBB);
451 if (I == LiveOutCache.end() || I->second.second == Node) {
452 // We already have a live-out defined in MBB, so this must be IdxMBB.
453 assert(MBB == IdxMBB && "Adding phi-def to known live-out");
454 LI->addRange(LiveRange(Start, Idx.getNextSlot(), VNI));
456 // This phi-def is also live-out, so color the whole block.
457 LI->addRange(LiveRange(Start, LIS.getMBBEndIdx(MBB), VNI));
458 I->second = LiveOutPair(VNI, Node);
460 } else if (IDomValue.first) {
461 // No phi-def here. Remember incoming value for IdxMBB.
463 IdxVNI = IDomValue.first;
464 // Propagate IDomValue if needed:
465 // MBB is live-out and doesn't define its own value.
466 LiveOutMap::iterator I = LiveOutCache.find(MBB);
467 if (I != LiveOutCache.end() && I->second.second != Node &&
468 I->second.first != IDomValue.first) {
470 I->second = IDomValue;
471 DEBUG(dbgs() << " - BB#" << MBB->getNumber()
472 << " idom valno #" << IDomValue.first->id
473 << " from BB#" << IDom->getBlock()->getNumber() << '\n');
477 DEBUG(dbgs() << " - made " << Changes << " changes.\n");
480 assert(IdxVNI && "Didn't find value for Idx");
484 VNInfo *SplitEditor::defFromParent(unsigned RegIdx,
487 MachineBasicBlock &MBB,
488 MachineBasicBlock::iterator I) {
489 MachineInstr *CopyMI = 0;
491 LiveInterval *LI = Edit.get(RegIdx);
493 // Attempt cheap-as-a-copy rematerialization.
494 LiveRangeEdit::Remat RM(ParentVNI);
495 if (Edit.canRematerializeAt(RM, UseIdx, true, LIS)) {
496 Def = Edit.rematerializeAt(MBB, I, LI->reg, RM, LIS, TII, TRI);
498 // Can't remat, just insert a copy from parent.
499 CopyMI = BuildMI(MBB, I, DebugLoc(), TII.get(TargetOpcode::COPY), LI->reg)
500 .addReg(Edit.getReg());
501 Def = LIS.InsertMachineInstrInMaps(CopyMI).getDefIndex();
504 // Define the value in Reg.
505 VNInfo *VNI = defValue(RegIdx, ParentVNI, Def);
506 VNI->setCopy(CopyMI);
510 /// Create a new virtual register and live interval.
511 void SplitEditor::openIntv() {
512 assert(!OpenIdx && "Previous LI not closed before openIntv");
514 // Create the complement as index 0.
516 Edit.create(MRI, LIS, VRM);
518 // Create the open interval.
519 OpenIdx = Edit.size();
520 Edit.create(MRI, LIS, VRM);
523 SlotIndex SplitEditor::enterIntvBefore(SlotIndex Idx) {
524 assert(OpenIdx && "openIntv not called before enterIntvBefore");
525 DEBUG(dbgs() << " enterIntvBefore " << Idx);
526 Idx = Idx.getBaseIndex();
527 VNInfo *ParentVNI = Edit.getParent().getVNInfoAt(Idx);
529 DEBUG(dbgs() << ": not live\n");
532 DEBUG(dbgs() << ": valno " << ParentVNI->id << '\n');
533 MachineInstr *MI = LIS.getInstructionFromIndex(Idx);
534 assert(MI && "enterIntvBefore called with invalid index");
536 VNInfo *VNI = defFromParent(OpenIdx, ParentVNI, Idx, *MI->getParent(), MI);
540 SlotIndex SplitEditor::enterIntvAtEnd(MachineBasicBlock &MBB) {
541 assert(OpenIdx && "openIntv not called before enterIntvAtEnd");
542 SlotIndex End = LIS.getMBBEndIdx(&MBB);
543 SlotIndex Last = End.getPrevSlot();
544 DEBUG(dbgs() << " enterIntvAtEnd BB#" << MBB.getNumber() << ", " << Last);
545 VNInfo *ParentVNI = Edit.getParent().getVNInfoAt(Last);
547 DEBUG(dbgs() << ": not live\n");
550 DEBUG(dbgs() << ": valno " << ParentVNI->id);
551 VNInfo *VNI = defFromParent(OpenIdx, ParentVNI, Last, MBB,
552 LIS.getLastSplitPoint(Edit.getParent(), &MBB));
553 RegAssign.insert(VNI->def, End, OpenIdx);
558 /// useIntv - indicate that all instructions in MBB should use OpenLI.
559 void SplitEditor::useIntv(const MachineBasicBlock &MBB) {
560 useIntv(LIS.getMBBStartIdx(&MBB), LIS.getMBBEndIdx(&MBB));
563 void SplitEditor::useIntv(SlotIndex Start, SlotIndex End) {
564 assert(OpenIdx && "openIntv not called before useIntv");
565 DEBUG(dbgs() << " useIntv [" << Start << ';' << End << "):");
566 RegAssign.insert(Start, End, OpenIdx);
570 SlotIndex SplitEditor::leaveIntvAfter(SlotIndex Idx) {
571 assert(OpenIdx && "openIntv not called before leaveIntvAfter");
572 DEBUG(dbgs() << " leaveIntvAfter " << Idx);
574 // The interval must be live beyond the instruction at Idx.
575 Idx = Idx.getBoundaryIndex();
576 VNInfo *ParentVNI = Edit.getParent().getVNInfoAt(Idx);
578 DEBUG(dbgs() << ": not live\n");
579 return Idx.getNextSlot();
581 DEBUG(dbgs() << ": valno " << ParentVNI->id << '\n');
583 MachineInstr *MI = LIS.getInstructionFromIndex(Idx);
584 assert(MI && "No instruction at index");
585 VNInfo *VNI = defFromParent(0, ParentVNI, Idx, *MI->getParent(),
586 llvm::next(MachineBasicBlock::iterator(MI)));
590 SlotIndex SplitEditor::leaveIntvBefore(SlotIndex Idx) {
591 assert(OpenIdx && "openIntv not called before leaveIntvBefore");
592 DEBUG(dbgs() << " leaveIntvBefore " << Idx);
594 // The interval must be live into the instruction at Idx.
595 Idx = Idx.getBoundaryIndex();
596 VNInfo *ParentVNI = Edit.getParent().getVNInfoAt(Idx);
598 DEBUG(dbgs() << ": not live\n");
599 return Idx.getNextSlot();
601 DEBUG(dbgs() << ": valno " << ParentVNI->id << '\n');
603 MachineInstr *MI = LIS.getInstructionFromIndex(Idx);
604 assert(MI && "No instruction at index");
605 VNInfo *VNI = defFromParent(0, ParentVNI, Idx, *MI->getParent(), MI);
609 SlotIndex SplitEditor::leaveIntvAtTop(MachineBasicBlock &MBB) {
610 assert(OpenIdx && "openIntv not called before leaveIntvAtTop");
611 SlotIndex Start = LIS.getMBBStartIdx(&MBB);
612 DEBUG(dbgs() << " leaveIntvAtTop BB#" << MBB.getNumber() << ", " << Start);
614 VNInfo *ParentVNI = Edit.getParent().getVNInfoAt(Start);
616 DEBUG(dbgs() << ": not live\n");
620 VNInfo *VNI = defFromParent(0, ParentVNI, Start, MBB,
621 MBB.SkipPHIsAndLabels(MBB.begin()));
622 RegAssign.insert(Start, VNI->def, OpenIdx);
627 void SplitEditor::overlapIntv(SlotIndex Start, SlotIndex End) {
628 assert(OpenIdx && "openIntv not called before overlapIntv");
629 const VNInfo *ParentVNI = Edit.getParent().getVNInfoAt(Start);
630 assert(ParentVNI == Edit.getParent().getVNInfoAt(End.getPrevSlot()) &&
631 "Parent changes value in extended range");
632 assert(LIS.getMBBFromIndex(Start) == LIS.getMBBFromIndex(End) &&
633 "Range cannot span basic blocks");
635 // The complement interval will be extended as needed by extendRange().
636 markComplexMapped(0, ParentVNI);
637 DEBUG(dbgs() << " overlapIntv [" << Start << ';' << End << "):");
638 RegAssign.insert(Start, End, OpenIdx);
642 /// closeIntv - Indicate that we are done editing the currently open
643 /// LiveInterval, and ranges can be trimmed.
644 void SplitEditor::closeIntv() {
645 assert(OpenIdx && "openIntv not called before closeIntv");
649 /// transferSimpleValues - Transfer all simply defined values to the new live
651 /// Values that were rematerialized or that have multiple defs are left alone.
652 bool SplitEditor::transferSimpleValues() {
653 bool Skipped = false;
654 RegAssignMap::const_iterator AssignI = RegAssign.begin();
655 for (LiveInterval::const_iterator ParentI = Edit.getParent().begin(),
656 ParentE = Edit.getParent().end(); ParentI != ParentE; ++ParentI) {
657 DEBUG(dbgs() << " blit " << *ParentI << ':');
658 VNInfo *ParentVNI = ParentI->valno;
659 // RegAssign has holes where RegIdx 0 should be used.
660 SlotIndex Start = ParentI->start;
661 AssignI.advanceTo(Start);
664 SlotIndex End = ParentI->end;
665 if (!AssignI.valid()) {
667 } else if (AssignI.start() <= Start) {
668 RegIdx = AssignI.value();
669 if (AssignI.stop() < End) {
670 End = AssignI.stop();
675 End = std::min(End, AssignI.start());
677 DEBUG(dbgs() << " [" << Start << ';' << End << ")=" << RegIdx);
678 if (VNInfo *VNI = Values.lookup(std::make_pair(RegIdx, ParentVNI->id))) {
679 DEBUG(dbgs() << ':' << VNI->id);
680 Edit.get(RegIdx)->addRange(LiveRange(Start, End, VNI));
684 } while (Start != ParentI->end);
685 DEBUG(dbgs() << '\n');
690 void SplitEditor::extendPHIKillRanges() {
691 // Extend live ranges to be live-out for successor PHI values.
692 for (LiveInterval::const_vni_iterator I = Edit.getParent().vni_begin(),
693 E = Edit.getParent().vni_end(); I != E; ++I) {
694 const VNInfo *PHIVNI = *I;
695 if (PHIVNI->isUnused() || !PHIVNI->isPHIDef())
697 unsigned RegIdx = RegAssign.lookup(PHIVNI->def);
698 MachineBasicBlock *MBB = LIS.getMBBFromIndex(PHIVNI->def);
699 for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
700 PE = MBB->pred_end(); PI != PE; ++PI) {
701 SlotIndex End = LIS.getMBBEndIdx(*PI).getPrevSlot();
702 // The predecessor may not have a live-out value. That is OK, like an
703 // undef PHI operand.
704 if (Edit.getParent().liveAt(End)) {
705 assert(RegAssign.lookup(End) == RegIdx &&
706 "Different register assignment in phi predecessor");
707 extendRange(RegIdx, End);
713 /// rewriteAssigned - Rewrite all uses of Edit.getReg().
714 void SplitEditor::rewriteAssigned(bool ExtendRanges) {
715 for (MachineRegisterInfo::reg_iterator RI = MRI.reg_begin(Edit.getReg()),
716 RE = MRI.reg_end(); RI != RE;) {
717 MachineOperand &MO = RI.getOperand();
718 MachineInstr *MI = MO.getParent();
720 // LiveDebugVariables should have handled all DBG_VALUE instructions.
721 if (MI->isDebugValue()) {
722 DEBUG(dbgs() << "Zapping " << *MI);
727 // <undef> operands don't really read the register, so just assign them to
729 if (MO.isUse() && MO.isUndef()) {
730 MO.setReg(Edit.get(0)->reg);
734 SlotIndex Idx = LIS.getInstructionIndex(MI);
735 Idx = MO.isUse() ? Idx.getUseIndex() : Idx.getDefIndex();
737 // Rewrite to the mapped register at Idx.
738 unsigned RegIdx = RegAssign.lookup(Idx);
739 MO.setReg(Edit.get(RegIdx)->reg);
740 DEBUG(dbgs() << " rewr BB#" << MI->getParent()->getNumber() << '\t'
741 << Idx << ':' << RegIdx << '\t' << *MI);
743 // Extend liveness to Idx.
745 extendRange(RegIdx, Idx);
749 /// rewriteSplit - Rewrite uses of Intvs[0] according to the ConEQ mapping.
750 void SplitEditor::rewriteComponents(const SmallVectorImpl<LiveInterval*> &Intvs,
751 const ConnectedVNInfoEqClasses &ConEq) {
752 for (MachineRegisterInfo::reg_iterator RI = MRI.reg_begin(Intvs[0]->reg),
753 RE = MRI.reg_end(); RI != RE;) {
754 MachineOperand &MO = RI.getOperand();
755 MachineInstr *MI = MO.getParent();
757 if (MO.isUse() && MO.isUndef())
759 // DBG_VALUE instructions should have been eliminated earlier.
760 SlotIndex Idx = LIS.getInstructionIndex(MI);
761 Idx = MO.isUse() ? Idx.getUseIndex() : Idx.getDefIndex();
762 DEBUG(dbgs() << " rewr BB#" << MI->getParent()->getNumber() << '\t'
764 const VNInfo *VNI = Intvs[0]->getVNInfoAt(Idx);
765 assert(VNI && "Interval not live at use.");
766 MO.setReg(Intvs[ConEq.getEqClass(VNI)]->reg);
767 DEBUG(dbgs() << VNI->id << '\t' << *MI);
771 void SplitEditor::finish() {
772 assert(OpenIdx == 0 && "Previous LI not closed before rewrite");
775 // At this point, the live intervals in Edit contain VNInfos corresponding to
776 // the inserted copies.
778 // Add the original defs from the parent interval.
779 for (LiveInterval::const_vni_iterator I = Edit.getParent().vni_begin(),
780 E = Edit.getParent().vni_end(); I != E; ++I) {
781 const VNInfo *ParentVNI = *I;
782 if (ParentVNI->isUnused())
784 unsigned RegIdx = RegAssign.lookup(ParentVNI->def);
785 defValue(RegIdx, ParentVNI, ParentVNI->def);
786 // Mark rematted values as complex everywhere to force liveness computation.
787 // The new live ranges may be truncated.
788 if (Edit.didRematerialize(ParentVNI))
789 for (unsigned i = 0, e = Edit.size(); i != e; ++i)
790 markComplexMapped(i, ParentVNI);
794 // Every new interval must have a def by now, otherwise the split is bogus.
795 for (LiveRangeEdit::iterator I = Edit.begin(), E = Edit.end(); I != E; ++I)
796 assert((*I)->hasAtLeastOneValue() && "Split interval has no value");
799 // Transfer the simply mapped values, check if any are complex.
800 bool Complex = transferSimpleValues();
802 extendPHIKillRanges();
806 // Rewrite virtual registers, possibly extending ranges.
807 rewriteAssigned(Complex);
809 // FIXME: Delete defs that were rematted everywhere.
811 // Get rid of unused values and set phi-kill flags.
812 for (LiveRangeEdit::iterator I = Edit.begin(), E = Edit.end(); I != E; ++I)
813 (*I)->RenumberValues(LIS);
815 // Now check if any registers were separated into multiple components.
816 ConnectedVNInfoEqClasses ConEQ(LIS);
817 for (unsigned i = 0, e = Edit.size(); i != e; ++i) {
818 // Don't use iterators, they are invalidated by create() below.
819 LiveInterval *li = Edit.get(i);
820 unsigned NumComp = ConEQ.Classify(li);
823 DEBUG(dbgs() << " " << NumComp << " components: " << *li << '\n');
824 SmallVector<LiveInterval*, 8> dups;
826 for (unsigned i = 1; i != NumComp; ++i)
827 dups.push_back(&Edit.create(MRI, LIS, VRM));
828 rewriteComponents(dups, ConEQ);
829 ConEQ.Distribute(&dups[0]);
832 // Calculate spill weight and allocation hints for new intervals.
833 VirtRegAuxInfo vrai(VRM.getMachineFunction(), LIS, SA.Loops);
834 for (LiveRangeEdit::iterator I = Edit.begin(), E = Edit.end(); I != E; ++I){
835 LiveInterval &li = **I;
836 vrai.CalculateRegClass(li.reg);
837 vrai.CalculateWeightAndHint(li);
838 DEBUG(dbgs() << " new interval " << MRI.getRegClass(li.reg)->getName()
839 << ":" << li << '\n');
844 //===----------------------------------------------------------------------===//
845 // Single Block Splitting
846 //===----------------------------------------------------------------------===//
848 /// getMultiUseBlocks - if CurLI has more than one use in a basic block, it
849 /// may be an advantage to split CurLI for the duration of the block.
850 bool SplitAnalysis::getMultiUseBlocks(BlockPtrSet &Blocks) {
851 // If CurLI is local to one block, there is no point to splitting it.
852 if (LiveBlocks.size() <= 1)
854 // Add blocks with multiple uses.
855 for (unsigned i = 0, e = LiveBlocks.size(); i != e; ++i) {
856 const BlockInfo &BI = LiveBlocks[i];
859 unsigned Instrs = UsingBlocks.lookup(BI.MBB);
862 if (Instrs == 2 && BI.LiveIn && BI.LiveOut && !BI.LiveThrough)
864 Blocks.insert(BI.MBB);
866 return !Blocks.empty();
869 /// splitSingleBlocks - Split CurLI into a separate live interval inside each
870 /// basic block in Blocks.
871 void SplitEditor::splitSingleBlocks(const SplitAnalysis::BlockPtrSet &Blocks) {
872 DEBUG(dbgs() << " splitSingleBlocks for " << Blocks.size() << " blocks.\n");
874 for (unsigned i = 0, e = SA.LiveBlocks.size(); i != e; ++i) {
875 const SplitAnalysis::BlockInfo &BI = SA.LiveBlocks[i];
876 if (!BI.Uses || !Blocks.count(BI.MBB))
880 SlotIndex SegStart = enterIntvBefore(BI.FirstUse);
881 if (!BI.LiveOut || BI.LastUse < BI.LastSplitPoint) {
882 useIntv(SegStart, leaveIntvAfter(BI.LastUse));
884 // The last use is after the last valid split point.
885 SlotIndex SegStop = leaveIntvBefore(BI.LastSplitPoint);
886 useIntv(SegStart, SegStop);
887 overlapIntv(SegStop, BI.LastUse);