1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
13 #include "llvm/CodeGen/SelectionDAG.h"
14 #include "llvm/Constants.h"
15 #include "llvm/Analysis/ValueTracking.h"
16 #include "llvm/GlobalAlias.h"
17 #include "llvm/GlobalVariable.h"
18 #include "llvm/Intrinsics.h"
19 #include "llvm/DerivedTypes.h"
20 #include "llvm/Assembly/Writer.h"
21 #include "llvm/CallingConv.h"
22 #include "llvm/CodeGen/MachineBasicBlock.h"
23 #include "llvm/CodeGen/MachineConstantPool.h"
24 #include "llvm/CodeGen/MachineFrameInfo.h"
25 #include "llvm/CodeGen/MachineModuleInfo.h"
26 #include "llvm/CodeGen/PseudoSourceValue.h"
27 #include "llvm/Target/TargetRegisterInfo.h"
28 #include "llvm/Target/TargetData.h"
29 #include "llvm/Target/TargetLowering.h"
30 #include "llvm/Target/TargetOptions.h"
31 #include "llvm/Target/TargetInstrInfo.h"
32 #include "llvm/Target/TargetMachine.h"
33 #include "llvm/Support/CommandLine.h"
34 #include "llvm/Support/MathExtras.h"
35 #include "llvm/Support/raw_ostream.h"
36 #include "llvm/ADT/SetVector.h"
37 #include "llvm/ADT/SmallPtrSet.h"
38 #include "llvm/ADT/SmallSet.h"
39 #include "llvm/ADT/SmallVector.h"
40 #include "llvm/ADT/StringExtras.h"
45 /// makeVTList - Return an instance of the SDVTList struct initialized with the
46 /// specified members.
47 static SDVTList makeVTList(const MVT *VTs, unsigned NumVTs) {
48 SDVTList Res = {VTs, NumVTs};
52 static const fltSemantics *MVTToAPFloatSemantics(MVT VT) {
53 switch (VT.getSimpleVT()) {
54 default: assert(0 && "Unknown FP format");
55 case MVT::f32: return &APFloat::IEEEsingle;
56 case MVT::f64: return &APFloat::IEEEdouble;
57 case MVT::f80: return &APFloat::x87DoubleExtended;
58 case MVT::f128: return &APFloat::IEEEquad;
59 case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
63 SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {}
65 //===----------------------------------------------------------------------===//
66 // ConstantFPSDNode Class
67 //===----------------------------------------------------------------------===//
69 /// isExactlyValue - We don't rely on operator== working on double values, as
70 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
71 /// As such, this method can be used to do an exact bit-for-bit comparison of
72 /// two floating point values.
73 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
74 return getValueAPF().bitwiseIsEqual(V);
77 bool ConstantFPSDNode::isValueValidForType(MVT VT,
79 assert(VT.isFloatingPoint() && "Can only convert between FP types");
81 // PPC long double cannot be converted to any other type.
82 if (VT == MVT::ppcf128 ||
83 &Val.getSemantics() == &APFloat::PPCDoubleDouble)
86 // convert modifies in place, so make a copy.
87 APFloat Val2 = APFloat(Val);
89 (void) Val2.convert(*MVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
94 //===----------------------------------------------------------------------===//
96 //===----------------------------------------------------------------------===//
98 /// isBuildVectorAllOnes - Return true if the specified node is a
99 /// BUILD_VECTOR where all of the elements are ~0 or undef.
100 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
101 // Look through a bit convert.
102 if (N->getOpcode() == ISD::BIT_CONVERT)
103 N = N->getOperand(0).getNode();
105 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
107 unsigned i = 0, e = N->getNumOperands();
109 // Skip over all of the undef values.
110 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
113 // Do not accept an all-undef vector.
114 if (i == e) return false;
116 // Do not accept build_vectors that aren't all constants or which have non-~0
118 SDValue NotZero = N->getOperand(i);
119 if (isa<ConstantSDNode>(NotZero)) {
120 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue())
122 } else if (isa<ConstantFPSDNode>(NotZero)) {
123 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF().
124 bitcastToAPInt().isAllOnesValue())
129 // Okay, we have at least one ~0 value, check to see if the rest match or are
131 for (++i; i != e; ++i)
132 if (N->getOperand(i) != NotZero &&
133 N->getOperand(i).getOpcode() != ISD::UNDEF)
139 /// isBuildVectorAllZeros - Return true if the specified node is a
140 /// BUILD_VECTOR where all of the elements are 0 or undef.
141 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
142 // Look through a bit convert.
143 if (N->getOpcode() == ISD::BIT_CONVERT)
144 N = N->getOperand(0).getNode();
146 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
148 unsigned i = 0, e = N->getNumOperands();
150 // Skip over all of the undef values.
151 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
154 // Do not accept an all-undef vector.
155 if (i == e) return false;
157 // Do not accept build_vectors that aren't all constants or which have non-~0
159 SDValue Zero = N->getOperand(i);
160 if (isa<ConstantSDNode>(Zero)) {
161 if (!cast<ConstantSDNode>(Zero)->isNullValue())
163 } else if (isa<ConstantFPSDNode>(Zero)) {
164 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero())
169 // Okay, we have at least one ~0 value, check to see if the rest match or are
171 for (++i; i != e; ++i)
172 if (N->getOperand(i) != Zero &&
173 N->getOperand(i).getOpcode() != ISD::UNDEF)
178 /// isScalarToVector - Return true if the specified node is a
179 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
180 /// element is not an undef.
181 bool ISD::isScalarToVector(const SDNode *N) {
182 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
185 if (N->getOpcode() != ISD::BUILD_VECTOR)
187 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
189 unsigned NumElems = N->getNumOperands();
190 for (unsigned i = 1; i < NumElems; ++i) {
191 SDValue V = N->getOperand(i);
192 if (V.getOpcode() != ISD::UNDEF)
199 /// isDebugLabel - Return true if the specified node represents a debug
200 /// label (i.e. ISD::DBG_LABEL or TargetInstrInfo::DBG_LABEL node).
201 bool ISD::isDebugLabel(const SDNode *N) {
203 if (N->getOpcode() == ISD::DBG_LABEL)
205 if (N->isMachineOpcode() &&
206 N->getMachineOpcode() == TargetInstrInfo::DBG_LABEL)
211 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
212 /// when given the operation for (X op Y).
213 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
214 // To perform this operation, we just need to swap the L and G bits of the
216 unsigned OldL = (Operation >> 2) & 1;
217 unsigned OldG = (Operation >> 1) & 1;
218 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
219 (OldL << 1) | // New G bit
220 (OldG << 2)); // New L bit.
223 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
224 /// 'op' is a valid SetCC operation.
225 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
226 unsigned Operation = Op;
228 Operation ^= 7; // Flip L, G, E bits, but not U.
230 Operation ^= 15; // Flip all of the condition bits.
232 if (Operation > ISD::SETTRUE2)
233 Operation &= ~8; // Don't let N and U bits get set.
235 return ISD::CondCode(Operation);
239 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
240 /// signed operation and 2 if the result is an unsigned comparison. Return zero
241 /// if the operation does not depend on the sign of the input (setne and seteq).
242 static int isSignedOp(ISD::CondCode Opcode) {
244 default: assert(0 && "Illegal integer setcc operation!");
246 case ISD::SETNE: return 0;
250 case ISD::SETGE: return 1;
254 case ISD::SETUGE: return 2;
258 /// getSetCCOrOperation - Return the result of a logical OR between different
259 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
260 /// returns SETCC_INVALID if it is not possible to represent the resultant
262 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
264 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
265 // Cannot fold a signed integer setcc with an unsigned integer setcc.
266 return ISD::SETCC_INVALID;
268 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
270 // If the N and U bits get set then the resultant comparison DOES suddenly
271 // care about orderedness, and is true when ordered.
272 if (Op > ISD::SETTRUE2)
273 Op &= ~16; // Clear the U bit if the N bit is set.
275 // Canonicalize illegal integer setcc's.
276 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
279 return ISD::CondCode(Op);
282 /// getSetCCAndOperation - Return the result of a logical AND between different
283 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
284 /// function returns zero if it is not possible to represent the resultant
286 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
288 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
289 // Cannot fold a signed setcc with an unsigned setcc.
290 return ISD::SETCC_INVALID;
292 // Combine all of the condition bits.
293 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
295 // Canonicalize illegal integer setcc's.
299 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
300 case ISD::SETOEQ: // SETEQ & SETU[LG]E
301 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
302 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
303 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
310 const TargetMachine &SelectionDAG::getTarget() const {
311 return MF->getTarget();
314 //===----------------------------------------------------------------------===//
315 // SDNode Profile Support
316 //===----------------------------------------------------------------------===//
318 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
320 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
324 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
325 /// solely with their pointer.
326 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
327 ID.AddPointer(VTList.VTs);
330 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
332 static void AddNodeIDOperands(FoldingSetNodeID &ID,
333 const SDValue *Ops, unsigned NumOps) {
334 for (; NumOps; --NumOps, ++Ops) {
335 ID.AddPointer(Ops->getNode());
336 ID.AddInteger(Ops->getResNo());
340 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
342 static void AddNodeIDOperands(FoldingSetNodeID &ID,
343 const SDUse *Ops, unsigned NumOps) {
344 for (; NumOps; --NumOps, ++Ops) {
345 ID.AddPointer(Ops->getNode());
346 ID.AddInteger(Ops->getResNo());
350 static void AddNodeIDNode(FoldingSetNodeID &ID,
351 unsigned short OpC, SDVTList VTList,
352 const SDValue *OpList, unsigned N) {
353 AddNodeIDOpcode(ID, OpC);
354 AddNodeIDValueTypes(ID, VTList);
355 AddNodeIDOperands(ID, OpList, N);
358 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
360 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
361 switch (N->getOpcode()) {
362 default: break; // Normal nodes don't need extra info.
364 ID.AddInteger(cast<ARG_FLAGSSDNode>(N)->getArgFlags().getRawBits());
366 case ISD::TargetConstant:
368 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
370 case ISD::TargetConstantFP:
371 case ISD::ConstantFP: {
372 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
375 case ISD::TargetGlobalAddress:
376 case ISD::GlobalAddress:
377 case ISD::TargetGlobalTLSAddress:
378 case ISD::GlobalTLSAddress: {
379 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
380 ID.AddPointer(GA->getGlobal());
381 ID.AddInteger(GA->getOffset());
384 case ISD::BasicBlock:
385 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
388 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
390 case ISD::DBG_STOPPOINT: {
391 const DbgStopPointSDNode *DSP = cast<DbgStopPointSDNode>(N);
392 ID.AddInteger(DSP->getLine());
393 ID.AddInteger(DSP->getColumn());
394 ID.AddPointer(DSP->getCompileUnit());
398 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
400 case ISD::MEMOPERAND: {
401 const MachineMemOperand &MO = cast<MemOperandSDNode>(N)->MO;
405 case ISD::FrameIndex:
406 case ISD::TargetFrameIndex:
407 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
410 case ISD::TargetJumpTable:
411 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
413 case ISD::ConstantPool:
414 case ISD::TargetConstantPool: {
415 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
416 ID.AddInteger(CP->getAlignment());
417 ID.AddInteger(CP->getOffset());
418 if (CP->isMachineConstantPoolEntry())
419 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID);
421 ID.AddPointer(CP->getConstVal());
425 const CallSDNode *Call = cast<CallSDNode>(N);
426 ID.AddInteger(Call->getCallingConv());
427 ID.AddInteger(Call->isVarArg());
431 const LoadSDNode *LD = cast<LoadSDNode>(N);
432 ID.AddInteger(LD->getMemoryVT().getRawBits());
433 ID.AddInteger(LD->getRawSubclassData());
437 const StoreSDNode *ST = cast<StoreSDNode>(N);
438 ID.AddInteger(ST->getMemoryVT().getRawBits());
439 ID.AddInteger(ST->getRawSubclassData());
442 case ISD::ATOMIC_CMP_SWAP:
443 case ISD::ATOMIC_SWAP:
444 case ISD::ATOMIC_LOAD_ADD:
445 case ISD::ATOMIC_LOAD_SUB:
446 case ISD::ATOMIC_LOAD_AND:
447 case ISD::ATOMIC_LOAD_OR:
448 case ISD::ATOMIC_LOAD_XOR:
449 case ISD::ATOMIC_LOAD_NAND:
450 case ISD::ATOMIC_LOAD_MIN:
451 case ISD::ATOMIC_LOAD_MAX:
452 case ISD::ATOMIC_LOAD_UMIN:
453 case ISD::ATOMIC_LOAD_UMAX: {
454 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
455 ID.AddInteger(AT->getMemoryVT().getRawBits());
456 ID.AddInteger(AT->getRawSubclassData());
459 } // end switch (N->getOpcode())
462 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
464 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
465 AddNodeIDOpcode(ID, N->getOpcode());
466 // Add the return value info.
467 AddNodeIDValueTypes(ID, N->getVTList());
468 // Add the operand info.
469 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
471 // Handle SDNode leafs with special info.
472 AddNodeIDCustom(ID, N);
475 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
476 /// the CSE map that carries alignment, volatility, indexing mode, and
477 /// extension/truncation information.
479 static inline unsigned
480 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM,
481 bool isVolatile, unsigned Alignment) {
482 assert((ConvType & 3) == ConvType &&
483 "ConvType may not require more than 2 bits!");
484 assert((AM & 7) == AM &&
485 "AM may not require more than 3 bits!");
489 ((Log2_32(Alignment) + 1) << 6);
492 //===----------------------------------------------------------------------===//
493 // SelectionDAG Class
494 //===----------------------------------------------------------------------===//
496 /// doNotCSE - Return true if CSE should not be performed for this node.
497 static bool doNotCSE(SDNode *N) {
498 if (N->getValueType(0) == MVT::Flag)
499 return true; // Never CSE anything that produces a flag.
501 switch (N->getOpcode()) {
503 case ISD::HANDLENODE:
505 case ISD::DBG_STOPPOINT:
508 return true; // Never CSE these nodes.
511 // Check that remaining values produced are not flags.
512 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
513 if (N->getValueType(i) == MVT::Flag)
514 return true; // Never CSE anything that produces a flag.
519 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
521 void SelectionDAG::RemoveDeadNodes() {
522 // Create a dummy node (which is not added to allnodes), that adds a reference
523 // to the root node, preventing it from being deleted.
524 HandleSDNode Dummy(getRoot());
526 SmallVector<SDNode*, 128> DeadNodes;
528 // Add all obviously-dead nodes to the DeadNodes worklist.
529 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
531 DeadNodes.push_back(I);
533 RemoveDeadNodes(DeadNodes);
535 // If the root changed (e.g. it was a dead load, update the root).
536 setRoot(Dummy.getValue());
539 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
540 /// given list, and any nodes that become unreachable as a result.
541 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes,
542 DAGUpdateListener *UpdateListener) {
544 // Process the worklist, deleting the nodes and adding their uses to the
546 while (!DeadNodes.empty()) {
547 SDNode *N = DeadNodes.pop_back_val();
550 UpdateListener->NodeDeleted(N, 0);
552 // Take the node out of the appropriate CSE map.
553 RemoveNodeFromCSEMaps(N);
555 // Next, brutally remove the operand list. This is safe to do, as there are
556 // no cycles in the graph.
557 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
559 SDNode *Operand = Use.getNode();
562 // Now that we removed this operand, see if there are no uses of it left.
563 if (Operand->use_empty())
564 DeadNodes.push_back(Operand);
571 void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){
572 SmallVector<SDNode*, 16> DeadNodes(1, N);
573 RemoveDeadNodes(DeadNodes, UpdateListener);
576 void SelectionDAG::DeleteNode(SDNode *N) {
577 // First take this out of the appropriate CSE map.
578 RemoveNodeFromCSEMaps(N);
580 // Finally, remove uses due to operands of this node, remove from the
581 // AllNodes list, and delete the node.
582 DeleteNodeNotInCSEMaps(N);
585 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
586 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
587 assert(N->use_empty() && "Cannot delete a node that is not dead!");
589 // Drop all of the operands and decrement used node's use counts.
595 void SelectionDAG::DeallocateNode(SDNode *N) {
596 if (N->OperandsNeedDelete)
597 delete[] N->OperandList;
599 // Set the opcode to DELETED_NODE to help catch bugs when node
600 // memory is reallocated.
601 N->NodeType = ISD::DELETED_NODE;
603 NodeAllocator.Deallocate(AllNodes.remove(N));
606 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
607 /// correspond to it. This is useful when we're about to delete or repurpose
608 /// the node. We don't want future request for structurally identical nodes
609 /// to return N anymore.
610 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
612 switch (N->getOpcode()) {
613 case ISD::EntryToken:
614 assert(0 && "EntryToken should not be in CSEMaps!");
616 case ISD::HANDLENODE: return false; // noop.
618 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
619 "Cond code doesn't exist!");
620 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
621 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
623 case ISD::ExternalSymbol:
624 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
626 case ISD::TargetExternalSymbol:
628 TargetExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
630 case ISD::VALUETYPE: {
631 MVT VT = cast<VTSDNode>(N)->getVT();
632 if (VT.isExtended()) {
633 Erased = ExtendedValueTypeNodes.erase(VT);
635 Erased = ValueTypeNodes[VT.getSimpleVT()] != 0;
636 ValueTypeNodes[VT.getSimpleVT()] = 0;
641 // Remove it from the CSE Map.
642 Erased = CSEMap.RemoveNode(N);
646 // Verify that the node was actually in one of the CSE maps, unless it has a
647 // flag result (which cannot be CSE'd) or is one of the special cases that are
648 // not subject to CSE.
649 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag &&
650 !N->isMachineOpcode() && !doNotCSE(N)) {
653 assert(0 && "Node is not in map!");
659 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
660 /// maps and modified in place. Add it back to the CSE maps, unless an identical
661 /// node already exists, in which case transfer all its users to the existing
662 /// node. This transfer can potentially trigger recursive merging.
665 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N,
666 DAGUpdateListener *UpdateListener) {
667 // For node types that aren't CSE'd, just act as if no identical node
670 SDNode *Existing = CSEMap.GetOrInsertNode(N);
672 // If there was already an existing matching node, use ReplaceAllUsesWith
673 // to replace the dead one with the existing one. This can cause
674 // recursive merging of other unrelated nodes down the line.
675 ReplaceAllUsesWith(N, Existing, UpdateListener);
677 // N is now dead. Inform the listener if it exists and delete it.
679 UpdateListener->NodeDeleted(N, Existing);
680 DeleteNodeNotInCSEMaps(N);
685 // If the node doesn't already exist, we updated it. Inform a listener if
688 UpdateListener->NodeUpdated(N);
691 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
692 /// were replaced with those specified. If this node is never memoized,
693 /// return null, otherwise return a pointer to the slot it would take. If a
694 /// node already exists with these operands, the slot will be non-null.
695 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
700 SDValue Ops[] = { Op };
702 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
703 AddNodeIDCustom(ID, N);
704 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
707 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
708 /// were replaced with those specified. If this node is never memoized,
709 /// return null, otherwise return a pointer to the slot it would take. If a
710 /// node already exists with these operands, the slot will be non-null.
711 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
712 SDValue Op1, SDValue Op2,
717 SDValue Ops[] = { Op1, Op2 };
719 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
720 AddNodeIDCustom(ID, N);
721 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
725 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
726 /// were replaced with those specified. If this node is never memoized,
727 /// return null, otherwise return a pointer to the slot it would take. If a
728 /// node already exists with these operands, the slot will be non-null.
729 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
730 const SDValue *Ops,unsigned NumOps,
736 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
737 AddNodeIDCustom(ID, N);
738 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
741 /// VerifyNode - Sanity check the given node. Aborts if it is invalid.
742 void SelectionDAG::VerifyNode(SDNode *N) {
743 switch (N->getOpcode()) {
746 case ISD::BUILD_PAIR: {
747 MVT VT = N->getValueType(0);
748 assert(N->getNumValues() == 1 && "Too many results!");
749 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
750 "Wrong return type!");
751 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
752 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
753 "Mismatched operand types!");
754 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
755 "Wrong operand type!");
756 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
757 "Wrong return type size");
760 case ISD::BUILD_VECTOR: {
761 assert(N->getNumValues() == 1 && "Too many results!");
762 assert(N->getValueType(0).isVector() && "Wrong return type!");
763 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
764 "Wrong number of operands!");
765 // FIXME: Change vector_shuffle to a variadic node with mask elements being
766 // operands of the node. Currently the mask is a BUILD_VECTOR passed as an
767 // operand, and it is not always possible to legalize it. Turning off the
768 // following checks at least makes it possible to legalize most of the time.
769 // MVT EltVT = N->getValueType(0).getVectorElementType();
770 // for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I)
771 // assert(I->getValueType() == EltVT &&
772 // "Wrong operand type!");
778 /// getMVTAlignment - Compute the default alignment value for the
781 unsigned SelectionDAG::getMVTAlignment(MVT VT) const {
782 const Type *Ty = VT == MVT::iPTR ?
783 PointerType::get(Type::Int8Ty, 0) :
786 return TLI.getTargetData()->getABITypeAlignment(Ty);
789 // EntryNode could meaningfully have debug info if we can find it...
790 SelectionDAG::SelectionDAG(TargetLowering &tli, FunctionLoweringInfo &fli)
791 : TLI(tli), FLI(fli), DW(0),
792 EntryNode(ISD::EntryToken, DebugLoc::getUnknownLoc(),
793 getVTList(MVT::Other)), Root(getEntryNode()) {
794 AllNodes.push_back(&EntryNode);
797 void SelectionDAG::init(MachineFunction &mf, MachineModuleInfo *mmi,
804 SelectionDAG::~SelectionDAG() {
808 void SelectionDAG::allnodes_clear() {
809 assert(&*AllNodes.begin() == &EntryNode);
810 AllNodes.remove(AllNodes.begin());
811 while (!AllNodes.empty())
812 DeallocateNode(AllNodes.begin());
815 void SelectionDAG::clear() {
817 OperandAllocator.Reset();
820 ExtendedValueTypeNodes.clear();
821 ExternalSymbols.clear();
822 TargetExternalSymbols.clear();
823 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
824 static_cast<CondCodeSDNode*>(0));
825 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
826 static_cast<SDNode*>(0));
828 EntryNode.UseList = 0;
829 AllNodes.push_back(&EntryNode);
830 Root = getEntryNode();
833 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, MVT VT) {
834 if (Op.getValueType() == VT) return Op;
835 APInt Imm = APInt::getLowBitsSet(Op.getValueSizeInBits(),
837 return getNode(ISD::AND, DL, Op.getValueType(), Op,
838 getConstant(Imm, Op.getValueType()));
841 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
843 SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, MVT VT) {
846 MVT EltVT = VT.getVectorElementType();
848 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), EltVT);
849 std::vector<SDValue> NegOnes(VT.getVectorNumElements(), NegOneElt);
850 NegOne = getNode(ISD::BUILD_VECTOR, DL, VT, &NegOnes[0], NegOnes.size());
852 NegOne = getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
854 return getNode(ISD::XOR, DL, VT, Val, NegOne);
857 SDValue SelectionDAG::getConstant(uint64_t Val, MVT VT, bool isT) {
858 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
859 assert((EltVT.getSizeInBits() >= 64 ||
860 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
861 "getConstant with a uint64_t value that doesn't fit in the type!");
862 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
865 SDValue SelectionDAG::getConstant(const APInt &Val, MVT VT, bool isT) {
866 return getConstant(*ConstantInt::get(Val), VT, isT);
869 SDValue SelectionDAG::getConstant(const ConstantInt &Val, MVT VT, bool isT) {
870 assert(VT.isInteger() && "Cannot create FP integer constant!");
872 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
873 assert(Val.getBitWidth() == EltVT.getSizeInBits() &&
874 "APInt size does not match type size!");
876 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
878 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
882 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
884 return SDValue(N, 0);
886 N = NodeAllocator.Allocate<ConstantSDNode>();
887 new (N) ConstantSDNode(isT, &Val, EltVT);
888 CSEMap.InsertNode(N, IP);
889 AllNodes.push_back(N);
892 SDValue Result(N, 0);
894 SmallVector<SDValue, 8> Ops;
895 Ops.assign(VT.getVectorNumElements(), Result);
896 Result = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(),
897 VT, &Ops[0], Ops.size());
902 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
903 return getConstant(Val, TLI.getPointerTy(), isTarget);
907 SDValue SelectionDAG::getConstantFP(const APFloat& V, MVT VT, bool isTarget) {
908 return getConstantFP(*ConstantFP::get(V), VT, isTarget);
911 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, MVT VT, bool isTarget){
912 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
915 VT.isVector() ? VT.getVectorElementType() : VT;
917 // Do the map lookup using the actual bit pattern for the floating point
918 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
919 // we don't have issues with SNANs.
920 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
922 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
926 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
928 return SDValue(N, 0);
930 N = NodeAllocator.Allocate<ConstantFPSDNode>();
931 new (N) ConstantFPSDNode(isTarget, &V, EltVT);
932 CSEMap.InsertNode(N, IP);
933 AllNodes.push_back(N);
936 SDValue Result(N, 0);
938 SmallVector<SDValue, 8> Ops;
939 Ops.assign(VT.getVectorNumElements(), Result);
940 // FIXME DebugLoc info might be appropriate here
941 Result = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(),
942 VT, &Ops[0], Ops.size());
947 SDValue SelectionDAG::getConstantFP(double Val, MVT VT, bool isTarget) {
949 VT.isVector() ? VT.getVectorElementType() : VT;
951 return getConstantFP(APFloat((float)Val), VT, isTarget);
953 return getConstantFP(APFloat(Val), VT, isTarget);
956 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV,
957 MVT VT, int64_t Offset,
961 // Truncate (with sign-extension) the offset value to the pointer size.
962 unsigned BitWidth = TLI.getPointerTy().getSizeInBits();
964 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth));
966 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
968 // If GV is an alias then use the aliasee for determining thread-localness.
969 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
970 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
973 if (GVar && GVar->isThreadLocal())
974 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
976 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
979 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
981 ID.AddInteger(Offset);
983 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
984 return SDValue(E, 0);
985 SDNode *N = NodeAllocator.Allocate<GlobalAddressSDNode>();
986 new (N) GlobalAddressSDNode(isTargetGA, GV, VT, Offset);
987 CSEMap.InsertNode(N, IP);
988 AllNodes.push_back(N);
989 return SDValue(N, 0);
992 SDValue SelectionDAG::getFrameIndex(int FI, MVT VT, bool isTarget) {
993 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
995 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
998 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
999 return SDValue(E, 0);
1000 SDNode *N = NodeAllocator.Allocate<FrameIndexSDNode>();
1001 new (N) FrameIndexSDNode(FI, VT, isTarget);
1002 CSEMap.InsertNode(N, IP);
1003 AllNodes.push_back(N);
1004 return SDValue(N, 0);
1007 SDValue SelectionDAG::getJumpTable(int JTI, MVT VT, bool isTarget){
1008 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1009 FoldingSetNodeID ID;
1010 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1013 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1014 return SDValue(E, 0);
1015 SDNode *N = NodeAllocator.Allocate<JumpTableSDNode>();
1016 new (N) JumpTableSDNode(JTI, VT, isTarget);
1017 CSEMap.InsertNode(N, IP);
1018 AllNodes.push_back(N);
1019 return SDValue(N, 0);
1022 SDValue SelectionDAG::getConstantPool(Constant *C, MVT VT,
1023 unsigned Alignment, int Offset,
1026 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1027 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1028 FoldingSetNodeID ID;
1029 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1030 ID.AddInteger(Alignment);
1031 ID.AddInteger(Offset);
1034 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1035 return SDValue(E, 0);
1036 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>();
1037 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment);
1038 CSEMap.InsertNode(N, IP);
1039 AllNodes.push_back(N);
1040 return SDValue(N, 0);
1044 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, MVT VT,
1045 unsigned Alignment, int Offset,
1048 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1049 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1050 FoldingSetNodeID ID;
1051 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1052 ID.AddInteger(Alignment);
1053 ID.AddInteger(Offset);
1054 C->AddSelectionDAGCSEId(ID);
1056 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1057 return SDValue(E, 0);
1058 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>();
1059 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment);
1060 CSEMap.InsertNode(N, IP);
1061 AllNodes.push_back(N);
1062 return SDValue(N, 0);
1065 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1066 FoldingSetNodeID ID;
1067 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1070 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1071 return SDValue(E, 0);
1072 SDNode *N = NodeAllocator.Allocate<BasicBlockSDNode>();
1073 new (N) BasicBlockSDNode(MBB);
1074 CSEMap.InsertNode(N, IP);
1075 AllNodes.push_back(N);
1076 return SDValue(N, 0);
1079 SDValue SelectionDAG::getArgFlags(ISD::ArgFlagsTy Flags) {
1080 FoldingSetNodeID ID;
1081 AddNodeIDNode(ID, ISD::ARG_FLAGS, getVTList(MVT::Other), 0, 0);
1082 ID.AddInteger(Flags.getRawBits());
1084 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1085 return SDValue(E, 0);
1086 SDNode *N = NodeAllocator.Allocate<ARG_FLAGSSDNode>();
1087 new (N) ARG_FLAGSSDNode(Flags);
1088 CSEMap.InsertNode(N, IP);
1089 AllNodes.push_back(N);
1090 return SDValue(N, 0);
1093 SDValue SelectionDAG::getValueType(MVT VT) {
1094 if (VT.isSimple() && (unsigned)VT.getSimpleVT() >= ValueTypeNodes.size())
1095 ValueTypeNodes.resize(VT.getSimpleVT()+1);
1097 SDNode *&N = VT.isExtended() ?
1098 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT()];
1100 if (N) return SDValue(N, 0);
1101 N = NodeAllocator.Allocate<VTSDNode>();
1102 new (N) VTSDNode(VT);
1103 AllNodes.push_back(N);
1104 return SDValue(N, 0);
1107 SDValue SelectionDAG::getExternalSymbol(const char *Sym, MVT VT) {
1108 SDNode *&N = ExternalSymbols[Sym];
1109 if (N) return SDValue(N, 0);
1110 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1111 new (N) ExternalSymbolSDNode(false, Sym, VT);
1112 AllNodes.push_back(N);
1113 return SDValue(N, 0);
1116 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, MVT VT) {
1117 SDNode *&N = TargetExternalSymbols[Sym];
1118 if (N) return SDValue(N, 0);
1119 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1120 new (N) ExternalSymbolSDNode(true, Sym, VT);
1121 AllNodes.push_back(N);
1122 return SDValue(N, 0);
1125 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1126 if ((unsigned)Cond >= CondCodeNodes.size())
1127 CondCodeNodes.resize(Cond+1);
1129 if (CondCodeNodes[Cond] == 0) {
1130 CondCodeSDNode *N = NodeAllocator.Allocate<CondCodeSDNode>();
1131 new (N) CondCodeSDNode(Cond);
1132 CondCodeNodes[Cond] = N;
1133 AllNodes.push_back(N);
1135 return SDValue(CondCodeNodes[Cond], 0);
1138 SDValue SelectionDAG::getConvertRndSat(MVT VT, DebugLoc dl,
1139 SDValue Val, SDValue DTy,
1140 SDValue STy, SDValue Rnd, SDValue Sat,
1141 ISD::CvtCode Code) {
1142 // If the src and dest types are the same and the conversion is between
1143 // integer types of the same sign or two floats, no conversion is necessary.
1145 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1148 FoldingSetNodeID ID;
1150 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1151 return SDValue(E, 0);
1152 CvtRndSatSDNode *N = NodeAllocator.Allocate<CvtRndSatSDNode>();
1153 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1154 new (N) CvtRndSatSDNode(VT, dl, Ops, 5, Code);
1155 CSEMap.InsertNode(N, IP);
1156 AllNodes.push_back(N);
1157 return SDValue(N, 0);
1160 SDValue SelectionDAG::getRegister(unsigned RegNo, MVT VT) {
1161 FoldingSetNodeID ID;
1162 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1163 ID.AddInteger(RegNo);
1165 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1166 return SDValue(E, 0);
1167 SDNode *N = NodeAllocator.Allocate<RegisterSDNode>();
1168 new (N) RegisterSDNode(RegNo, VT);
1169 CSEMap.InsertNode(N, IP);
1170 AllNodes.push_back(N);
1171 return SDValue(N, 0);
1174 SDValue SelectionDAG::getDbgStopPoint(SDValue Root,
1175 unsigned Line, unsigned Col,
1177 SDNode *N = NodeAllocator.Allocate<DbgStopPointSDNode>();
1178 new (N) DbgStopPointSDNode(Root, Line, Col, CU);
1179 AllNodes.push_back(N);
1180 return SDValue(N, 0);
1183 SDValue SelectionDAG::getLabel(unsigned Opcode, DebugLoc dl,
1186 FoldingSetNodeID ID;
1187 SDValue Ops[] = { Root };
1188 AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), &Ops[0], 1);
1189 ID.AddInteger(LabelID);
1191 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1192 return SDValue(E, 0);
1193 SDNode *N = NodeAllocator.Allocate<LabelSDNode>();
1194 new (N) LabelSDNode(Opcode, dl, Root, LabelID);
1195 CSEMap.InsertNode(N, IP);
1196 AllNodes.push_back(N);
1197 return SDValue(N, 0);
1200 SDValue SelectionDAG::getSrcValue(const Value *V) {
1201 assert((!V || isa<PointerType>(V->getType())) &&
1202 "SrcValue is not a pointer?");
1204 FoldingSetNodeID ID;
1205 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1209 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1210 return SDValue(E, 0);
1212 SDNode *N = NodeAllocator.Allocate<SrcValueSDNode>();
1213 new (N) SrcValueSDNode(V);
1214 CSEMap.InsertNode(N, IP);
1215 AllNodes.push_back(N);
1216 return SDValue(N, 0);
1219 SDValue SelectionDAG::getMemOperand(const MachineMemOperand &MO) {
1221 const Value *v = MO.getValue();
1222 assert((!v || isa<PointerType>(v->getType())) &&
1223 "SrcValue is not a pointer?");
1226 FoldingSetNodeID ID;
1227 AddNodeIDNode(ID, ISD::MEMOPERAND, getVTList(MVT::Other), 0, 0);
1231 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1232 return SDValue(E, 0);
1234 SDNode *N = NodeAllocator.Allocate<MemOperandSDNode>();
1235 new (N) MemOperandSDNode(MO);
1236 CSEMap.InsertNode(N, IP);
1237 AllNodes.push_back(N);
1238 return SDValue(N, 0);
1241 /// getShiftAmountOperand - Return the specified value casted to
1242 /// the target's desired shift amount type.
1243 SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) {
1244 MVT OpTy = Op.getValueType();
1245 MVT ShTy = TLI.getShiftAmountTy();
1246 if (OpTy == ShTy || OpTy.isVector()) return Op;
1248 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1249 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op);
1252 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1253 /// specified value type.
1254 SDValue SelectionDAG::CreateStackTemporary(MVT VT, unsigned minAlign) {
1255 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1256 unsigned ByteSize = VT.getStoreSizeInBits()/8;
1257 const Type *Ty = VT.getTypeForMVT();
1258 unsigned StackAlign =
1259 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign);
1261 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign);
1262 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1265 /// CreateStackTemporary - Create a stack temporary suitable for holding
1266 /// either of the specified value types.
1267 SDValue SelectionDAG::CreateStackTemporary(MVT VT1, MVT VT2) {
1268 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1269 VT2.getStoreSizeInBits())/8;
1270 const Type *Ty1 = VT1.getTypeForMVT();
1271 const Type *Ty2 = VT2.getTypeForMVT();
1272 const TargetData *TD = TLI.getTargetData();
1273 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1274 TD->getPrefTypeAlignment(Ty2));
1276 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1277 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align);
1278 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1281 SDValue SelectionDAG::FoldSetCC(MVT VT, SDValue N1,
1282 SDValue N2, ISD::CondCode Cond, DebugLoc dl) {
1283 // These setcc operations always fold.
1287 case ISD::SETFALSE2: return getConstant(0, VT);
1289 case ISD::SETTRUE2: return getConstant(1, VT);
1301 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1305 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1306 const APInt &C2 = N2C->getAPIntValue();
1307 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1308 const APInt &C1 = N1C->getAPIntValue();
1311 default: assert(0 && "Unknown integer setcc!");
1312 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1313 case ISD::SETNE: return getConstant(C1 != C2, VT);
1314 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1315 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1316 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1317 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1318 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1319 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1320 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1321 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1325 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1326 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1327 // No compile time operations on this type yet.
1328 if (N1C->getValueType(0) == MVT::ppcf128)
1331 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1334 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1335 return getUNDEF(VT);
1337 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1338 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1339 return getUNDEF(VT);
1341 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1342 R==APFloat::cmpLessThan, VT);
1343 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1344 return getUNDEF(VT);
1346 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1347 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1348 return getUNDEF(VT);
1350 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1351 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1352 return getUNDEF(VT);
1354 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1355 R==APFloat::cmpEqual, VT);
1356 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1357 return getUNDEF(VT);
1359 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1360 R==APFloat::cmpEqual, VT);
1361 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1362 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1363 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1364 R==APFloat::cmpEqual, VT);
1365 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1366 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1367 R==APFloat::cmpLessThan, VT);
1368 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1369 R==APFloat::cmpUnordered, VT);
1370 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1371 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1374 // Ensure that the constant occurs on the RHS.
1375 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1379 // Could not fold it.
1383 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1384 /// use this predicate to simplify operations downstream.
1385 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1386 unsigned BitWidth = Op.getValueSizeInBits();
1387 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1390 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1391 /// this predicate to simplify operations downstream. Mask is known to be zero
1392 /// for bits that V cannot have.
1393 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1394 unsigned Depth) const {
1395 APInt KnownZero, KnownOne;
1396 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
1397 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1398 return (KnownZero & Mask) == Mask;
1401 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1402 /// known to be either zero or one and return them in the KnownZero/KnownOne
1403 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1405 void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask,
1406 APInt &KnownZero, APInt &KnownOne,
1407 unsigned Depth) const {
1408 unsigned BitWidth = Mask.getBitWidth();
1409 assert(BitWidth == Op.getValueType().getSizeInBits() &&
1410 "Mask size mismatches value type size!");
1412 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1413 if (Depth == 6 || Mask == 0)
1414 return; // Limit search depth.
1416 APInt KnownZero2, KnownOne2;
1418 switch (Op.getOpcode()) {
1420 // We know all of the bits for a constant!
1421 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask;
1422 KnownZero = ~KnownOne & Mask;
1425 // If either the LHS or the RHS are Zero, the result is zero.
1426 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1427 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero,
1428 KnownZero2, KnownOne2, Depth+1);
1429 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1430 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1432 // Output known-1 bits are only known if set in both the LHS & RHS.
1433 KnownOne &= KnownOne2;
1434 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1435 KnownZero |= KnownZero2;
1438 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1439 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne,
1440 KnownZero2, KnownOne2, Depth+1);
1441 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1442 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1444 // Output known-0 bits are only known if clear in both the LHS & RHS.
1445 KnownZero &= KnownZero2;
1446 // Output known-1 are known to be set if set in either the LHS | RHS.
1447 KnownOne |= KnownOne2;
1450 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1451 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
1452 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1453 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1455 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1456 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1457 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1458 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1459 KnownZero = KnownZeroOut;
1463 APInt Mask2 = APInt::getAllOnesValue(BitWidth);
1464 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1);
1465 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1466 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1467 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1469 // If low bits are zero in either operand, output low known-0 bits.
1470 // Also compute a conserative estimate for high known-0 bits.
1471 // More trickiness is possible, but this is sufficient for the
1472 // interesting case of alignment computation.
1474 unsigned TrailZ = KnownZero.countTrailingOnes() +
1475 KnownZero2.countTrailingOnes();
1476 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1477 KnownZero2.countLeadingOnes(),
1478 BitWidth) - BitWidth;
1480 TrailZ = std::min(TrailZ, BitWidth);
1481 LeadZ = std::min(LeadZ, BitWidth);
1482 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1483 APInt::getHighBitsSet(BitWidth, LeadZ);
1488 // For the purposes of computing leading zeros we can conservatively
1489 // treat a udiv as a logical right shift by the power of 2 known to
1490 // be less than the denominator.
1491 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1492 ComputeMaskedBits(Op.getOperand(0),
1493 AllOnes, KnownZero2, KnownOne2, Depth+1);
1494 unsigned LeadZ = KnownZero2.countLeadingOnes();
1498 ComputeMaskedBits(Op.getOperand(1),
1499 AllOnes, KnownZero2, KnownOne2, Depth+1);
1500 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1501 if (RHSUnknownLeadingOnes != BitWidth)
1502 LeadZ = std::min(BitWidth,
1503 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1505 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask;
1509 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1);
1510 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1);
1511 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1512 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1514 // Only known if known in both the LHS and RHS.
1515 KnownOne &= KnownOne2;
1516 KnownZero &= KnownZero2;
1518 case ISD::SELECT_CC:
1519 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1);
1520 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1);
1521 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1522 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1524 // Only known if known in both the LHS and RHS.
1525 KnownOne &= KnownOne2;
1526 KnownZero &= KnownZero2;
1534 if (Op.getResNo() != 1)
1536 // The boolean result conforms to getBooleanContents. Fall through.
1538 // If we know the result of a setcc has the top bits zero, use this info.
1539 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent &&
1541 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1544 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1545 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1546 unsigned ShAmt = SA->getZExtValue();
1548 // If the shift count is an invalid immediate, don't do anything.
1549 if (ShAmt >= BitWidth)
1552 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt),
1553 KnownZero, KnownOne, Depth+1);
1554 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1555 KnownZero <<= ShAmt;
1557 // low bits known zero.
1558 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1562 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1563 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1564 unsigned ShAmt = SA->getZExtValue();
1566 // If the shift count is an invalid immediate, don't do anything.
1567 if (ShAmt >= BitWidth)
1570 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt),
1571 KnownZero, KnownOne, Depth+1);
1572 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1573 KnownZero = KnownZero.lshr(ShAmt);
1574 KnownOne = KnownOne.lshr(ShAmt);
1576 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1577 KnownZero |= HighBits; // High bits known zero.
1581 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1582 unsigned ShAmt = SA->getZExtValue();
1584 // If the shift count is an invalid immediate, don't do anything.
1585 if (ShAmt >= BitWidth)
1588 APInt InDemandedMask = (Mask << ShAmt);
1589 // If any of the demanded bits are produced by the sign extension, we also
1590 // demand the input sign bit.
1591 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1592 if (HighBits.getBoolValue())
1593 InDemandedMask |= APInt::getSignBit(BitWidth);
1595 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne,
1597 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1598 KnownZero = KnownZero.lshr(ShAmt);
1599 KnownOne = KnownOne.lshr(ShAmt);
1601 // Handle the sign bits.
1602 APInt SignBit = APInt::getSignBit(BitWidth);
1603 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1605 if (KnownZero.intersects(SignBit)) {
1606 KnownZero |= HighBits; // New bits are known zero.
1607 } else if (KnownOne.intersects(SignBit)) {
1608 KnownOne |= HighBits; // New bits are known one.
1612 case ISD::SIGN_EXTEND_INREG: {
1613 MVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1614 unsigned EBits = EVT.getSizeInBits();
1616 // Sign extension. Compute the demanded bits in the result that are not
1617 // present in the input.
1618 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask;
1620 APInt InSignBit = APInt::getSignBit(EBits);
1621 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits);
1623 // If the sign extended bits are demanded, we know that the sign
1625 InSignBit.zext(BitWidth);
1626 if (NewBits.getBoolValue())
1627 InputDemandedBits |= InSignBit;
1629 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits,
1630 KnownZero, KnownOne, Depth+1);
1631 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1633 // If the sign bit of the input is known set or clear, then we know the
1634 // top bits of the result.
1635 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1636 KnownZero |= NewBits;
1637 KnownOne &= ~NewBits;
1638 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1639 KnownOne |= NewBits;
1640 KnownZero &= ~NewBits;
1641 } else { // Input sign bit unknown
1642 KnownZero &= ~NewBits;
1643 KnownOne &= ~NewBits;
1650 unsigned LowBits = Log2_32(BitWidth)+1;
1651 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1656 if (ISD::isZEXTLoad(Op.getNode())) {
1657 LoadSDNode *LD = cast<LoadSDNode>(Op);
1658 MVT VT = LD->getMemoryVT();
1659 unsigned MemBits = VT.getSizeInBits();
1660 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask;
1664 case ISD::ZERO_EXTEND: {
1665 MVT InVT = Op.getOperand(0).getValueType();
1666 unsigned InBits = InVT.getSizeInBits();
1667 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1668 APInt InMask = Mask;
1669 InMask.trunc(InBits);
1670 KnownZero.trunc(InBits);
1671 KnownOne.trunc(InBits);
1672 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1673 KnownZero.zext(BitWidth);
1674 KnownOne.zext(BitWidth);
1675 KnownZero |= NewBits;
1678 case ISD::SIGN_EXTEND: {
1679 MVT InVT = Op.getOperand(0).getValueType();
1680 unsigned InBits = InVT.getSizeInBits();
1681 APInt InSignBit = APInt::getSignBit(InBits);
1682 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1683 APInt InMask = Mask;
1684 InMask.trunc(InBits);
1686 // If any of the sign extended bits are demanded, we know that the sign
1687 // bit is demanded. Temporarily set this bit in the mask for our callee.
1688 if (NewBits.getBoolValue())
1689 InMask |= InSignBit;
1691 KnownZero.trunc(InBits);
1692 KnownOne.trunc(InBits);
1693 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1695 // Note if the sign bit is known to be zero or one.
1696 bool SignBitKnownZero = KnownZero.isNegative();
1697 bool SignBitKnownOne = KnownOne.isNegative();
1698 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1699 "Sign bit can't be known to be both zero and one!");
1701 // If the sign bit wasn't actually demanded by our caller, we don't
1702 // want it set in the KnownZero and KnownOne result values. Reset the
1703 // mask and reapply it to the result values.
1705 InMask.trunc(InBits);
1706 KnownZero &= InMask;
1709 KnownZero.zext(BitWidth);
1710 KnownOne.zext(BitWidth);
1712 // If the sign bit is known zero or one, the top bits match.
1713 if (SignBitKnownZero)
1714 KnownZero |= NewBits;
1715 else if (SignBitKnownOne)
1716 KnownOne |= NewBits;
1719 case ISD::ANY_EXTEND: {
1720 MVT InVT = Op.getOperand(0).getValueType();
1721 unsigned InBits = InVT.getSizeInBits();
1722 APInt InMask = Mask;
1723 InMask.trunc(InBits);
1724 KnownZero.trunc(InBits);
1725 KnownOne.trunc(InBits);
1726 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1727 KnownZero.zext(BitWidth);
1728 KnownOne.zext(BitWidth);
1731 case ISD::TRUNCATE: {
1732 MVT InVT = Op.getOperand(0).getValueType();
1733 unsigned InBits = InVT.getSizeInBits();
1734 APInt InMask = Mask;
1735 InMask.zext(InBits);
1736 KnownZero.zext(InBits);
1737 KnownOne.zext(InBits);
1738 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1739 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1740 KnownZero.trunc(BitWidth);
1741 KnownOne.trunc(BitWidth);
1744 case ISD::AssertZext: {
1745 MVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1746 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1747 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
1749 KnownZero |= (~InMask) & Mask;
1753 // All bits are zero except the low bit.
1754 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1758 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
1759 // We know that the top bits of C-X are clear if X contains less bits
1760 // than C (i.e. no wrap-around can happen). For example, 20-X is
1761 // positive if we can prove that X is >= 0 and < 16.
1762 if (CLHS->getAPIntValue().isNonNegative()) {
1763 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
1764 // NLZ can't be BitWidth with no sign bit
1765 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
1766 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2,
1769 // If all of the MaskV bits are known to be zero, then we know the
1770 // output top bits are zero, because we now know that the output is
1772 if ((KnownZero2 & MaskV) == MaskV) {
1773 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
1774 // Top bits known zero.
1775 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask;
1782 // Output known-0 bits are known if clear or set in both the low clear bits
1783 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
1784 // low 3 bits clear.
1785 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes());
1786 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1787 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1788 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
1790 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1);
1791 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1792 KnownZeroOut = std::min(KnownZeroOut,
1793 KnownZero2.countTrailingOnes());
1795 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
1799 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1800 const APInt &RA = Rem->getAPIntValue();
1801 if (RA.isPowerOf2() || (-RA).isPowerOf2()) {
1802 APInt LowBits = RA.isStrictlyPositive() ? (RA - 1) : ~RA;
1803 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
1804 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1);
1806 // If the sign bit of the first operand is zero, the sign bit of
1807 // the result is zero. If the first operand has no one bits below
1808 // the second operand's single 1 bit, its sign will be zero.
1809 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
1810 KnownZero2 |= ~LowBits;
1812 KnownZero |= KnownZero2 & Mask;
1814 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1819 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1820 const APInt &RA = Rem->getAPIntValue();
1821 if (RA.isPowerOf2()) {
1822 APInt LowBits = (RA - 1);
1823 APInt Mask2 = LowBits & Mask;
1824 KnownZero |= ~LowBits & Mask;
1825 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1);
1826 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1831 // Since the result is less than or equal to either operand, any leading
1832 // zero bits in either operand must also exist in the result.
1833 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1834 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne,
1836 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2,
1839 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
1840 KnownZero2.countLeadingOnes());
1842 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
1846 // Allow the target to implement this method for its nodes.
1847 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) {
1848 case ISD::INTRINSIC_WO_CHAIN:
1849 case ISD::INTRINSIC_W_CHAIN:
1850 case ISD::INTRINSIC_VOID:
1851 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this);
1857 /// ComputeNumSignBits - Return the number of times the sign bit of the
1858 /// register is replicated into the other bits. We know that at least 1 bit
1859 /// is always equal to the sign bit (itself), but other cases can give us
1860 /// information. For example, immediately after an "SRA X, 2", we know that
1861 /// the top 3 bits are all equal to each other, so we return 3.
1862 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
1863 MVT VT = Op.getValueType();
1864 assert(VT.isInteger() && "Invalid VT!");
1865 unsigned VTBits = VT.getSizeInBits();
1867 unsigned FirstAnswer = 1;
1870 return 1; // Limit search depth.
1872 switch (Op.getOpcode()) {
1874 case ISD::AssertSext:
1875 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1876 return VTBits-Tmp+1;
1877 case ISD::AssertZext:
1878 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1881 case ISD::Constant: {
1882 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
1883 // If negative, return # leading ones.
1884 if (Val.isNegative())
1885 return Val.countLeadingOnes();
1887 // Return # leading zeros.
1888 return Val.countLeadingZeros();
1891 case ISD::SIGN_EXTEND:
1892 Tmp = VTBits-Op.getOperand(0).getValueType().getSizeInBits();
1893 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
1895 case ISD::SIGN_EXTEND_INREG:
1896 // Max of the input and what this extends.
1897 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1900 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1901 return std::max(Tmp, Tmp2);
1904 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1905 // SRA X, C -> adds C sign bits.
1906 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1907 Tmp += C->getZExtValue();
1908 if (Tmp > VTBits) Tmp = VTBits;
1912 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1913 // shl destroys sign bits.
1914 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1915 if (C->getZExtValue() >= VTBits || // Bad shift.
1916 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
1917 return Tmp - C->getZExtValue();
1922 case ISD::XOR: // NOT is handled here.
1923 // Logical binary ops preserve the number of sign bits at the worst.
1924 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1926 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
1927 FirstAnswer = std::min(Tmp, Tmp2);
1928 // We computed what we know about the sign bits as our first
1929 // answer. Now proceed to the generic code that uses
1930 // ComputeMaskedBits, and pick whichever answer is better.
1935 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
1936 if (Tmp == 1) return 1; // Early out.
1937 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
1938 return std::min(Tmp, Tmp2);
1946 if (Op.getResNo() != 1)
1948 // The boolean result conforms to getBooleanContents. Fall through.
1950 // If setcc returns 0/-1, all bits are sign bits.
1951 if (TLI.getBooleanContents() ==
1952 TargetLowering::ZeroOrNegativeOneBooleanContent)
1957 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1958 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
1960 // Handle rotate right by N like a rotate left by 32-N.
1961 if (Op.getOpcode() == ISD::ROTR)
1962 RotAmt = (VTBits-RotAmt) & (VTBits-1);
1964 // If we aren't rotating out all of the known-in sign bits, return the
1965 // number that are left. This handles rotl(sext(x), 1) for example.
1966 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1967 if (Tmp > RotAmt+1) return Tmp-RotAmt;
1971 // Add can have at most one carry bit. Thus we know that the output
1972 // is, at worst, one more bit than the inputs.
1973 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1974 if (Tmp == 1) return 1; // Early out.
1976 // Special case decrementing a value (ADD X, -1):
1977 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
1978 if (CRHS->isAllOnesValue()) {
1979 APInt KnownZero, KnownOne;
1980 APInt Mask = APInt::getAllOnesValue(VTBits);
1981 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
1983 // If the input is known to be 0 or 1, the output is 0/-1, which is all
1985 if ((KnownZero | APInt(VTBits, 1)) == Mask)
1988 // If we are subtracting one from a positive number, there is no carry
1989 // out of the result.
1990 if (KnownZero.isNegative())
1994 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
1995 if (Tmp2 == 1) return 1;
1996 return std::min(Tmp, Tmp2)-1;
2000 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2001 if (Tmp2 == 1) return 1;
2004 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2005 if (CLHS->isNullValue()) {
2006 APInt KnownZero, KnownOne;
2007 APInt Mask = APInt::getAllOnesValue(VTBits);
2008 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
2009 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2011 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2014 // If the input is known to be positive (the sign bit is known clear),
2015 // the output of the NEG has the same number of sign bits as the input.
2016 if (KnownZero.isNegative())
2019 // Otherwise, we treat this like a SUB.
2022 // Sub can have at most one carry bit. Thus we know that the output
2023 // is, at worst, one more bit than the inputs.
2024 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2025 if (Tmp == 1) return 1; // Early out.
2026 return std::min(Tmp, Tmp2)-1;
2029 // FIXME: it's tricky to do anything useful for this, but it is an important
2030 // case for targets like X86.
2034 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2035 if (Op.getOpcode() == ISD::LOAD) {
2036 LoadSDNode *LD = cast<LoadSDNode>(Op);
2037 unsigned ExtType = LD->getExtensionType();
2040 case ISD::SEXTLOAD: // '17' bits known
2041 Tmp = LD->getMemoryVT().getSizeInBits();
2042 return VTBits-Tmp+1;
2043 case ISD::ZEXTLOAD: // '16' bits known
2044 Tmp = LD->getMemoryVT().getSizeInBits();
2049 // Allow the target to implement this method for its nodes.
2050 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2051 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2052 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2053 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2054 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2055 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2058 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2059 // use this information.
2060 APInt KnownZero, KnownOne;
2061 APInt Mask = APInt::getAllOnesValue(VTBits);
2062 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
2064 if (KnownZero.isNegative()) { // sign bit is 0
2066 } else if (KnownOne.isNegative()) { // sign bit is 1;
2073 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2074 // the number of identical bits in the top of the input value.
2076 Mask <<= Mask.getBitWidth()-VTBits;
2077 // Return # leading zeros. We use 'min' here in case Val was zero before
2078 // shifting. We don't want to return '64' as for an i32 "0".
2079 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2083 bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const {
2084 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op);
2085 if (!GA) return false;
2086 if (GA->getOffset() != 0) return false;
2087 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal());
2088 if (!GV) return false;
2089 MachineModuleInfo *MMI = getMachineModuleInfo();
2090 return MMI && MMI->hasDebugInfo();
2094 /// getShuffleScalarElt - Returns the scalar element that will make up the ith
2095 /// element of the result of the vector shuffle.
2096 SDValue SelectionDAG::getShuffleScalarElt(const SDNode *N, unsigned i) {
2097 MVT VT = N->getValueType(0);
2098 DebugLoc dl = N->getDebugLoc();
2099 SDValue PermMask = N->getOperand(2);
2100 SDValue Idx = PermMask.getOperand(i);
2101 if (Idx.getOpcode() == ISD::UNDEF)
2102 return getUNDEF(VT.getVectorElementType());
2103 unsigned Index = cast<ConstantSDNode>(Idx)->getZExtValue();
2104 unsigned NumElems = PermMask.getNumOperands();
2105 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1);
2108 if (V.getOpcode() == ISD::BIT_CONVERT) {
2109 V = V.getOperand(0);
2110 MVT VVT = V.getValueType();
2111 if (!VVT.isVector() || VVT.getVectorNumElements() != NumElems)
2114 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR)
2115 return (Index == 0) ? V.getOperand(0)
2116 : getUNDEF(VT.getVectorElementType());
2117 if (V.getOpcode() == ISD::BUILD_VECTOR)
2118 return V.getOperand(Index);
2119 if (V.getOpcode() == ISD::VECTOR_SHUFFLE)
2120 return getShuffleScalarElt(V.getNode(), Index);
2125 /// getNode - Gets or creates the specified node.
2127 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT) {
2128 FoldingSetNodeID ID;
2129 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2131 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2132 return SDValue(E, 0);
2133 SDNode *N = NodeAllocator.Allocate<SDNode>();
2134 new (N) SDNode(Opcode, DL, getVTList(VT));
2135 CSEMap.InsertNode(N, IP);
2137 AllNodes.push_back(N);
2141 return SDValue(N, 0);
2144 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
2145 MVT VT, SDValue Operand) {
2146 // Constant fold unary operations with an integer constant operand.
2147 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2148 const APInt &Val = C->getAPIntValue();
2149 unsigned BitWidth = VT.getSizeInBits();
2152 case ISD::SIGN_EXTEND:
2153 return getConstant(APInt(Val).sextOrTrunc(BitWidth), VT);
2154 case ISD::ANY_EXTEND:
2155 case ISD::ZERO_EXTEND:
2157 return getConstant(APInt(Val).zextOrTrunc(BitWidth), VT);
2158 case ISD::UINT_TO_FP:
2159 case ISD::SINT_TO_FP: {
2160 const uint64_t zero[] = {0, 0};
2161 // No compile time operations on this type.
2162 if (VT==MVT::ppcf128)
2164 APFloat apf = APFloat(APInt(BitWidth, 2, zero));
2165 (void)apf.convertFromAPInt(Val,
2166 Opcode==ISD::SINT_TO_FP,
2167 APFloat::rmNearestTiesToEven);
2168 return getConstantFP(apf, VT);
2170 case ISD::BIT_CONVERT:
2171 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2172 return getConstantFP(Val.bitsToFloat(), VT);
2173 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2174 return getConstantFP(Val.bitsToDouble(), VT);
2177 return getConstant(Val.byteSwap(), VT);
2179 return getConstant(Val.countPopulation(), VT);
2181 return getConstant(Val.countLeadingZeros(), VT);
2183 return getConstant(Val.countTrailingZeros(), VT);
2187 // Constant fold unary operations with a floating point constant operand.
2188 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2189 APFloat V = C->getValueAPF(); // make copy
2190 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) {
2194 return getConstantFP(V, VT);
2197 return getConstantFP(V, VT);
2199 case ISD::FP_EXTEND: {
2201 // This can return overflow, underflow, or inexact; we don't care.
2202 // FIXME need to be more flexible about rounding mode.
2203 (void)V.convert(*MVTToAPFloatSemantics(VT),
2204 APFloat::rmNearestTiesToEven, &ignored);
2205 return getConstantFP(V, VT);
2207 case ISD::FP_TO_SINT:
2208 case ISD::FP_TO_UINT: {
2211 assert(integerPartWidth >= 64);
2212 // FIXME need to be more flexible about rounding mode.
2213 APFloat::opStatus s = V.convertToInteger(&x, 64U,
2214 Opcode==ISD::FP_TO_SINT,
2215 APFloat::rmTowardZero, &ignored);
2216 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2218 return getConstant(x, VT);
2220 case ISD::BIT_CONVERT:
2221 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2222 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2223 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2224 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2230 unsigned OpOpcode = Operand.getNode()->getOpcode();
2232 case ISD::TokenFactor:
2233 case ISD::MERGE_VALUES:
2234 case ISD::CONCAT_VECTORS:
2235 return Operand; // Factor, merge or concat of one node? No need.
2236 case ISD::FP_ROUND: assert(0 && "Invalid method to make FP_ROUND node");
2237 case ISD::FP_EXTEND:
2238 assert(VT.isFloatingPoint() &&
2239 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2240 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2241 if (Operand.getOpcode() == ISD::UNDEF)
2242 return getUNDEF(VT);
2244 case ISD::SIGN_EXTEND:
2245 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2246 "Invalid SIGN_EXTEND!");
2247 if (Operand.getValueType() == VT) return Operand; // noop extension
2248 assert(Operand.getValueType().bitsLT(VT)
2249 && "Invalid sext node, dst < src!");
2250 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2251 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2253 case ISD::ZERO_EXTEND:
2254 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2255 "Invalid ZERO_EXTEND!");
2256 if (Operand.getValueType() == VT) return Operand; // noop extension
2257 assert(Operand.getValueType().bitsLT(VT)
2258 && "Invalid zext node, dst < src!");
2259 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2260 return getNode(ISD::ZERO_EXTEND, DL, VT,
2261 Operand.getNode()->getOperand(0));
2263 case ISD::ANY_EXTEND:
2264 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2265 "Invalid ANY_EXTEND!");
2266 if (Operand.getValueType() == VT) return Operand; // noop extension
2267 assert(Operand.getValueType().bitsLT(VT)
2268 && "Invalid anyext node, dst < src!");
2269 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND)
2270 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2271 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2274 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2275 "Invalid TRUNCATE!");
2276 if (Operand.getValueType() == VT) return Operand; // noop truncate
2277 assert(Operand.getValueType().bitsGT(VT)
2278 && "Invalid truncate node, src < dst!");
2279 if (OpOpcode == ISD::TRUNCATE)
2280 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2281 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2282 OpOpcode == ISD::ANY_EXTEND) {
2283 // If the source is smaller than the dest, we still need an extend.
2284 if (Operand.getNode()->getOperand(0).getValueType().bitsLT(VT))
2285 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2286 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2287 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2289 return Operand.getNode()->getOperand(0);
2292 case ISD::BIT_CONVERT:
2293 // Basic sanity checking.
2294 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2295 && "Cannot BIT_CONVERT between types of different sizes!");
2296 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2297 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x)
2298 return getNode(ISD::BIT_CONVERT, DL, VT, Operand.getOperand(0));
2299 if (OpOpcode == ISD::UNDEF)
2300 return getUNDEF(VT);
2302 case ISD::SCALAR_TO_VECTOR:
2303 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2304 VT.getVectorElementType() == Operand.getValueType() &&
2305 "Illegal SCALAR_TO_VECTOR node!");
2306 if (OpOpcode == ISD::UNDEF)
2307 return getUNDEF(VT);
2308 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2309 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2310 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2311 Operand.getConstantOperandVal(1) == 0 &&
2312 Operand.getOperand(0).getValueType() == VT)
2313 return Operand.getOperand(0);
2316 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
2317 if (UnsafeFPMath && OpOpcode == ISD::FSUB)
2318 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
2319 Operand.getNode()->getOperand(0));
2320 if (OpOpcode == ISD::FNEG) // --X -> X
2321 return Operand.getNode()->getOperand(0);
2324 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2325 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
2330 SDVTList VTs = getVTList(VT);
2331 if (VT != MVT::Flag) { // Don't CSE flag producing nodes
2332 FoldingSetNodeID ID;
2333 SDValue Ops[1] = { Operand };
2334 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2336 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2337 return SDValue(E, 0);
2338 N = NodeAllocator.Allocate<UnarySDNode>();
2339 new (N) UnarySDNode(Opcode, DL, VTs, Operand);
2340 CSEMap.InsertNode(N, IP);
2342 N = NodeAllocator.Allocate<UnarySDNode>();
2343 new (N) UnarySDNode(Opcode, DL, VTs, Operand);
2346 AllNodes.push_back(N);
2350 return SDValue(N, 0);
2353 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2355 ConstantSDNode *Cst1,
2356 ConstantSDNode *Cst2) {
2357 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
2360 case ISD::ADD: return getConstant(C1 + C2, VT);
2361 case ISD::SUB: return getConstant(C1 - C2, VT);
2362 case ISD::MUL: return getConstant(C1 * C2, VT);
2364 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2367 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2370 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2373 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2375 case ISD::AND: return getConstant(C1 & C2, VT);
2376 case ISD::OR: return getConstant(C1 | C2, VT);
2377 case ISD::XOR: return getConstant(C1 ^ C2, VT);
2378 case ISD::SHL: return getConstant(C1 << C2, VT);
2379 case ISD::SRL: return getConstant(C1.lshr(C2), VT);
2380 case ISD::SRA: return getConstant(C1.ashr(C2), VT);
2381 case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2382 case ISD::ROTR: return getConstant(C1.rotr(C2), VT);
2389 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
2390 SDValue N1, SDValue N2) {
2391 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2392 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2395 case ISD::TokenFactor:
2396 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2397 N2.getValueType() == MVT::Other && "Invalid token factor!");
2398 // Fold trivial token factors.
2399 if (N1.getOpcode() == ISD::EntryToken) return N2;
2400 if (N2.getOpcode() == ISD::EntryToken) return N1;
2401 if (N1 == N2) return N1;
2403 case ISD::CONCAT_VECTORS:
2404 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2405 // one big BUILD_VECTOR.
2406 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2407 N2.getOpcode() == ISD::BUILD_VECTOR) {
2408 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2409 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2410 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2414 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2415 N1.getValueType() == VT && "Binary operator types must match!");
2416 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2417 // worth handling here.
2418 if (N2C && N2C->isNullValue())
2420 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2427 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2428 N1.getValueType() == VT && "Binary operator types must match!");
2429 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2430 // it's worth handling here.
2431 if (N2C && N2C->isNullValue())
2441 assert(VT.isInteger() && "This operator does not apply to FP types!");
2449 if (Opcode == ISD::FADD) {
2451 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
2452 if (CFP->getValueAPF().isZero())
2455 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2456 if (CFP->getValueAPF().isZero())
2458 } else if (Opcode == ISD::FSUB) {
2460 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2461 if (CFP->getValueAPF().isZero())
2465 assert(N1.getValueType() == N2.getValueType() &&
2466 N1.getValueType() == VT && "Binary operator types must match!");
2468 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2469 assert(N1.getValueType() == VT &&
2470 N1.getValueType().isFloatingPoint() &&
2471 N2.getValueType().isFloatingPoint() &&
2472 "Invalid FCOPYSIGN!");
2479 assert(VT == N1.getValueType() &&
2480 "Shift operators return type must be the same as their first arg");
2481 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2482 "Shifts only work on integers");
2484 // Always fold shifts of i1 values so the code generator doesn't need to
2485 // handle them. Since we know the size of the shift has to be less than the
2486 // size of the value, the shift/rotate count is guaranteed to be zero.
2490 case ISD::FP_ROUND_INREG: {
2491 MVT EVT = cast<VTSDNode>(N2)->getVT();
2492 assert(VT == N1.getValueType() && "Not an inreg round!");
2493 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2494 "Cannot FP_ROUND_INREG integer types");
2495 assert(EVT.bitsLE(VT) && "Not rounding down!");
2496 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2500 assert(VT.isFloatingPoint() &&
2501 N1.getValueType().isFloatingPoint() &&
2502 VT.bitsLE(N1.getValueType()) &&
2503 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2504 if (N1.getValueType() == VT) return N1; // noop conversion.
2506 case ISD::AssertSext:
2507 case ISD::AssertZext: {
2508 MVT EVT = cast<VTSDNode>(N2)->getVT();
2509 assert(VT == N1.getValueType() && "Not an inreg extend!");
2510 assert(VT.isInteger() && EVT.isInteger() &&
2511 "Cannot *_EXTEND_INREG FP types");
2512 assert(EVT.bitsLE(VT) && "Not extending!");
2513 if (VT == EVT) return N1; // noop assertion.
2516 case ISD::SIGN_EXTEND_INREG: {
2517 MVT EVT = cast<VTSDNode>(N2)->getVT();
2518 assert(VT == N1.getValueType() && "Not an inreg extend!");
2519 assert(VT.isInteger() && EVT.isInteger() &&
2520 "Cannot *_EXTEND_INREG FP types");
2521 assert(EVT.bitsLE(VT) && "Not extending!");
2522 if (EVT == VT) return N1; // Not actually extending
2525 APInt Val = N1C->getAPIntValue();
2526 unsigned FromBits = cast<VTSDNode>(N2)->getVT().getSizeInBits();
2527 Val <<= Val.getBitWidth()-FromBits;
2528 Val = Val.ashr(Val.getBitWidth()-FromBits);
2529 return getConstant(Val, VT);
2533 case ISD::EXTRACT_VECTOR_ELT:
2534 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2535 if (N1.getOpcode() == ISD::UNDEF)
2536 return getUNDEF(VT);
2538 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2539 // expanding copies of large vectors from registers.
2541 N1.getOpcode() == ISD::CONCAT_VECTORS &&
2542 N1.getNumOperands() > 0) {
2544 N1.getOperand(0).getValueType().getVectorNumElements();
2545 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
2546 N1.getOperand(N2C->getZExtValue() / Factor),
2547 getConstant(N2C->getZExtValue() % Factor,
2548 N2.getValueType()));
2551 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2552 // expanding large vector constants.
2553 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR)
2554 return N1.getOperand(N2C->getZExtValue());
2556 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2557 // operations are lowered to scalars.
2558 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2559 // If the indices are the same, return the inserted element.
2560 if (N1.getOperand(2) == N2)
2561 return N1.getOperand(1);
2562 // If the indices are known different, extract the element from
2563 // the original vector.
2564 else if (isa<ConstantSDNode>(N1.getOperand(2)) &&
2565 isa<ConstantSDNode>(N2))
2566 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
2569 case ISD::EXTRACT_ELEMENT:
2570 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
2571 assert(!N1.getValueType().isVector() && !VT.isVector() &&
2572 (N1.getValueType().isInteger() == VT.isInteger()) &&
2573 "Wrong types for EXTRACT_ELEMENT!");
2575 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2576 // 64-bit integers into 32-bit parts. Instead of building the extract of
2577 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2578 if (N1.getOpcode() == ISD::BUILD_PAIR)
2579 return N1.getOperand(N2C->getZExtValue());
2581 // EXTRACT_ELEMENT of a constant int is also very common.
2582 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2583 unsigned ElementSize = VT.getSizeInBits();
2584 unsigned Shift = ElementSize * N2C->getZExtValue();
2585 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2586 return getConstant(ShiftedVal.trunc(ElementSize), VT);
2589 case ISD::EXTRACT_SUBVECTOR:
2590 if (N1.getValueType() == VT) // Trivial extraction.
2597 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
2598 if (SV.getNode()) return SV;
2599 } else { // Cannonicalize constant to RHS if commutative
2600 if (isCommutativeBinOp(Opcode)) {
2601 std::swap(N1C, N2C);
2607 // Constant fold FP operations.
2608 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
2609 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
2611 if (!N2CFP && isCommutativeBinOp(Opcode)) {
2612 // Cannonicalize constant to RHS if commutative
2613 std::swap(N1CFP, N2CFP);
2615 } else if (N2CFP && VT != MVT::ppcf128) {
2616 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
2617 APFloat::opStatus s;
2620 s = V1.add(V2, APFloat::rmNearestTiesToEven);
2621 if (s != APFloat::opInvalidOp)
2622 return getConstantFP(V1, VT);
2625 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
2626 if (s!=APFloat::opInvalidOp)
2627 return getConstantFP(V1, VT);
2630 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
2631 if (s!=APFloat::opInvalidOp)
2632 return getConstantFP(V1, VT);
2635 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
2636 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2637 return getConstantFP(V1, VT);
2640 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
2641 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2642 return getConstantFP(V1, VT);
2644 case ISD::FCOPYSIGN:
2646 return getConstantFP(V1, VT);
2652 // Canonicalize an UNDEF to the RHS, even over a constant.
2653 if (N1.getOpcode() == ISD::UNDEF) {
2654 if (isCommutativeBinOp(Opcode)) {
2658 case ISD::FP_ROUND_INREG:
2659 case ISD::SIGN_EXTEND_INREG:
2665 return N1; // fold op(undef, arg2) -> undef
2673 return getConstant(0, VT); // fold op(undef, arg2) -> 0
2674 // For vectors, we can't easily build an all zero vector, just return
2681 // Fold a bunch of operators when the RHS is undef.
2682 if (N2.getOpcode() == ISD::UNDEF) {
2685 if (N1.getOpcode() == ISD::UNDEF)
2686 // Handle undef ^ undef -> 0 special case. This is a common
2688 return getConstant(0, VT);
2703 return N2; // fold op(arg1, undef) -> undef
2709 return getConstant(0, VT); // fold op(arg1, undef) -> 0
2710 // For vectors, we can't easily build an all zero vector, just return
2715 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
2716 // For vectors, we can't easily build an all one vector, just return
2724 // Memoize this node if possible.
2726 SDVTList VTs = getVTList(VT);
2727 if (VT != MVT::Flag) {
2728 SDValue Ops[] = { N1, N2 };
2729 FoldingSetNodeID ID;
2730 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
2732 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2733 return SDValue(E, 0);
2734 N = NodeAllocator.Allocate<BinarySDNode>();
2735 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2);
2736 CSEMap.InsertNode(N, IP);
2738 N = NodeAllocator.Allocate<BinarySDNode>();
2739 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2);
2742 AllNodes.push_back(N);
2746 return SDValue(N, 0);
2749 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
2750 SDValue N1, SDValue N2, SDValue N3) {
2751 // Perform various simplifications.
2752 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2753 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2755 case ISD::CONCAT_VECTORS:
2756 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2757 // one big BUILD_VECTOR.
2758 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2759 N2.getOpcode() == ISD::BUILD_VECTOR &&
2760 N3.getOpcode() == ISD::BUILD_VECTOR) {
2761 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2762 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2763 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end());
2764 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2768 // Use FoldSetCC to simplify SETCC's.
2769 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
2770 if (Simp.getNode()) return Simp;
2775 if (N1C->getZExtValue())
2776 return N2; // select true, X, Y -> X
2778 return N3; // select false, X, Y -> Y
2781 if (N2 == N3) return N2; // select C, X, X -> X
2785 if (N2C->getZExtValue()) // Unconditional branch
2786 return getNode(ISD::BR, DL, MVT::Other, N1, N3);
2788 return N1; // Never-taken branch
2791 case ISD::VECTOR_SHUFFLE:
2792 assert(N1.getValueType() == N2.getValueType() &&
2793 N1.getValueType().isVector() &&
2794 VT.isVector() && N3.getValueType().isVector() &&
2795 N3.getOpcode() == ISD::BUILD_VECTOR &&
2796 VT.getVectorNumElements() == N3.getNumOperands() &&
2797 "Illegal VECTOR_SHUFFLE node!");
2799 case ISD::BIT_CONVERT:
2800 // Fold bit_convert nodes from a type to themselves.
2801 if (N1.getValueType() == VT)
2806 // Memoize node if it doesn't produce a flag.
2808 SDVTList VTs = getVTList(VT);
2809 if (VT != MVT::Flag) {
2810 SDValue Ops[] = { N1, N2, N3 };
2811 FoldingSetNodeID ID;
2812 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
2814 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2815 return SDValue(E, 0);
2816 N = NodeAllocator.Allocate<TernarySDNode>();
2817 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
2818 CSEMap.InsertNode(N, IP);
2820 N = NodeAllocator.Allocate<TernarySDNode>();
2821 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
2823 AllNodes.push_back(N);
2827 return SDValue(N, 0);
2830 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
2831 SDValue N1, SDValue N2, SDValue N3,
2833 SDValue Ops[] = { N1, N2, N3, N4 };
2834 return getNode(Opcode, DL, VT, Ops, 4);
2837 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
2838 SDValue N1, SDValue N2, SDValue N3,
2839 SDValue N4, SDValue N5) {
2840 SDValue Ops[] = { N1, N2, N3, N4, N5 };
2841 return getNode(Opcode, DL, VT, Ops, 5);
2844 /// getMemsetValue - Vectorized representation of the memset value
2846 static SDValue getMemsetValue(SDValue Value, MVT VT, SelectionDAG &DAG,
2848 unsigned NumBits = VT.isVector() ?
2849 VT.getVectorElementType().getSizeInBits() : VT.getSizeInBits();
2850 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
2851 APInt Val = APInt(NumBits, C->getZExtValue() & 255);
2853 for (unsigned i = NumBits; i > 8; i >>= 1) {
2854 Val = (Val << Shift) | Val;
2858 return DAG.getConstant(Val, VT);
2859 return DAG.getConstantFP(APFloat(Val), VT);
2862 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
2863 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value);
2865 for (unsigned i = NumBits; i > 8; i >>= 1) {
2866 Value = DAG.getNode(ISD::OR, dl, VT,
2867 DAG.getNode(ISD::SHL, dl, VT, Value,
2868 DAG.getConstant(Shift,
2869 TLI.getShiftAmountTy())),
2877 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
2878 /// used when a memcpy is turned into a memset when the source is a constant
2880 static SDValue getMemsetStringVal(MVT VT, DebugLoc dl, SelectionDAG &DAG,
2881 const TargetLowering &TLI,
2882 std::string &Str, unsigned Offset) {
2883 // Handle vector with all elements zero.
2886 return DAG.getConstant(0, VT);
2887 unsigned NumElts = VT.getVectorNumElements();
2888 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
2889 return DAG.getNode(ISD::BIT_CONVERT, dl, VT,
2890 DAG.getConstant(0, MVT::getVectorVT(EltVT, NumElts)));
2893 assert(!VT.isVector() && "Can't handle vector type here!");
2894 unsigned NumBits = VT.getSizeInBits();
2895 unsigned MSB = NumBits / 8;
2897 if (TLI.isLittleEndian())
2898 Offset = Offset + MSB - 1;
2899 for (unsigned i = 0; i != MSB; ++i) {
2900 Val = (Val << 8) | (unsigned char)Str[Offset];
2901 Offset += TLI.isLittleEndian() ? -1 : 1;
2903 return DAG.getConstant(Val, VT);
2906 /// getMemBasePlusOffset - Returns base and offset node for the
2908 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
2909 SelectionDAG &DAG) {
2910 MVT VT = Base.getValueType();
2911 return DAG.getNode(ISD::ADD, Base.getDebugLoc(),
2912 VT, Base, DAG.getConstant(Offset, VT));
2915 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
2917 static bool isMemSrcFromString(SDValue Src, std::string &Str) {
2918 unsigned SrcDelta = 0;
2919 GlobalAddressSDNode *G = NULL;
2920 if (Src.getOpcode() == ISD::GlobalAddress)
2921 G = cast<GlobalAddressSDNode>(Src);
2922 else if (Src.getOpcode() == ISD::ADD &&
2923 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
2924 Src.getOperand(1).getOpcode() == ISD::Constant) {
2925 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
2926 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
2931 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal());
2932 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false))
2938 /// MeetsMaxMemopRequirement - Determines if the number of memory ops required
2939 /// to replace the memset / memcpy is below the threshold. It also returns the
2940 /// types of the sequence of memory ops to perform memset / memcpy.
2942 bool MeetsMaxMemopRequirement(std::vector<MVT> &MemOps,
2943 SDValue Dst, SDValue Src,
2944 unsigned Limit, uint64_t Size, unsigned &Align,
2945 std::string &Str, bool &isSrcStr,
2947 const TargetLowering &TLI) {
2948 isSrcStr = isMemSrcFromString(Src, Str);
2949 bool isSrcConst = isa<ConstantSDNode>(Src);
2950 bool AllowUnalign = TLI.allowsUnalignedMemoryAccesses();
2951 MVT VT = TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr);
2952 if (VT != MVT::iAny) {
2953 unsigned NewAlign = (unsigned)
2954 TLI.getTargetData()->getABITypeAlignment(VT.getTypeForMVT());
2955 // If source is a string constant, this will require an unaligned load.
2956 if (NewAlign > Align && (isSrcConst || AllowUnalign)) {
2957 if (Dst.getOpcode() != ISD::FrameIndex) {
2958 // Can't change destination alignment. It requires a unaligned store.
2962 int FI = cast<FrameIndexSDNode>(Dst)->getIndex();
2963 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
2964 if (MFI->isFixedObjectIndex(FI)) {
2965 // Can't change destination alignment. It requires a unaligned store.
2969 // Give the stack frame object a larger alignment if needed.
2970 if (MFI->getObjectAlignment(FI) < NewAlign)
2971 MFI->setObjectAlignment(FI, NewAlign);
2978 if (VT == MVT::iAny) {
2982 switch (Align & 7) {
2983 case 0: VT = MVT::i64; break;
2984 case 4: VT = MVT::i32; break;
2985 case 2: VT = MVT::i16; break;
2986 default: VT = MVT::i8; break;
2991 while (!TLI.isTypeLegal(LVT))
2992 LVT = (MVT::SimpleValueType)(LVT.getSimpleVT() - 1);
2993 assert(LVT.isInteger());
2999 unsigned NumMemOps = 0;
3001 unsigned VTSize = VT.getSizeInBits() / 8;
3002 while (VTSize > Size) {
3003 // For now, only use non-vector load / store's for the left-over pieces.
3004 if (VT.isVector()) {
3006 while (!TLI.isTypeLegal(VT))
3007 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1);
3008 VTSize = VT.getSizeInBits() / 8;
3010 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1);
3015 if (++NumMemOps > Limit)
3017 MemOps.push_back(VT);
3024 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3025 SDValue Chain, SDValue Dst,
3026 SDValue Src, uint64_t Size,
3027 unsigned Align, bool AlwaysInline,
3028 const Value *DstSV, uint64_t DstSVOff,
3029 const Value *SrcSV, uint64_t SrcSVOff){
3030 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3032 // Expand memcpy to a series of load and store ops if the size operand falls
3033 // below a certain threshold.
3034 std::vector<MVT> MemOps;
3035 uint64_t Limit = -1ULL;
3037 Limit = TLI.getMaxStoresPerMemcpy();
3038 unsigned DstAlign = Align; // Destination alignment can change.
3041 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
3042 Str, CopyFromStr, DAG, TLI))
3046 bool isZeroStr = CopyFromStr && Str.empty();
3047 SmallVector<SDValue, 8> OutChains;
3048 unsigned NumMemOps = MemOps.size();
3049 uint64_t SrcOff = 0, DstOff = 0;
3050 for (unsigned i = 0; i < NumMemOps; i++) {
3052 unsigned VTSize = VT.getSizeInBits() / 8;
3053 SDValue Value, Store;
3055 if (CopyFromStr && (isZeroStr || !VT.isVector())) {
3056 // It's unlikely a store of a vector immediate can be done in a single
3057 // instruction. It would require a load from a constantpool first.
3058 // We also handle store a vector with all zero's.
3059 // FIXME: Handle other cases where store of vector immediate is done in
3060 // a single instruction.
3061 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff);
3062 Store = DAG.getStore(Chain, dl, Value,
3063 getMemBasePlusOffset(Dst, DstOff, DAG),
3064 DstSV, DstSVOff + DstOff, false, DstAlign);
3066 Value = DAG.getLoad(VT, dl, Chain,
3067 getMemBasePlusOffset(Src, SrcOff, DAG),
3068 SrcSV, SrcSVOff + SrcOff, false, Align);
3069 Store = DAG.getStore(Chain, dl, Value,
3070 getMemBasePlusOffset(Dst, DstOff, DAG),
3071 DstSV, DstSVOff + DstOff, false, DstAlign);
3073 OutChains.push_back(Store);
3078 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3079 &OutChains[0], OutChains.size());
3082 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3083 SDValue Chain, SDValue Dst,
3084 SDValue Src, uint64_t Size,
3085 unsigned Align, bool AlwaysInline,
3086 const Value *DstSV, uint64_t DstSVOff,
3087 const Value *SrcSV, uint64_t SrcSVOff){
3088 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3090 // Expand memmove to a series of load and store ops if the size operand falls
3091 // below a certain threshold.
3092 std::vector<MVT> MemOps;
3093 uint64_t Limit = -1ULL;
3095 Limit = TLI.getMaxStoresPerMemmove();
3096 unsigned DstAlign = Align; // Destination alignment can change.
3099 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
3100 Str, CopyFromStr, DAG, TLI))
3103 uint64_t SrcOff = 0, DstOff = 0;
3105 SmallVector<SDValue, 8> LoadValues;
3106 SmallVector<SDValue, 8> LoadChains;
3107 SmallVector<SDValue, 8> OutChains;
3108 unsigned NumMemOps = MemOps.size();
3109 for (unsigned i = 0; i < NumMemOps; i++) {
3111 unsigned VTSize = VT.getSizeInBits() / 8;
3112 SDValue Value, Store;
3114 Value = DAG.getLoad(VT, dl, Chain,
3115 getMemBasePlusOffset(Src, SrcOff, DAG),
3116 SrcSV, SrcSVOff + SrcOff, false, Align);
3117 LoadValues.push_back(Value);
3118 LoadChains.push_back(Value.getValue(1));
3121 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3122 &LoadChains[0], LoadChains.size());
3124 for (unsigned i = 0; i < NumMemOps; i++) {
3126 unsigned VTSize = VT.getSizeInBits() / 8;
3127 SDValue Value, Store;
3129 Store = DAG.getStore(Chain, dl, LoadValues[i],
3130 getMemBasePlusOffset(Dst, DstOff, DAG),
3131 DstSV, DstSVOff + DstOff, false, DstAlign);
3132 OutChains.push_back(Store);
3136 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3137 &OutChains[0], OutChains.size());
3140 static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl,
3141 SDValue Chain, SDValue Dst,
3142 SDValue Src, uint64_t Size,
3144 const Value *DstSV, uint64_t DstSVOff) {
3145 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3147 // Expand memset to a series of load/store ops if the size operand
3148 // falls below a certain threshold.
3149 std::vector<MVT> MemOps;
3152 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, TLI.getMaxStoresPerMemset(),
3153 Size, Align, Str, CopyFromStr, DAG, TLI))
3156 SmallVector<SDValue, 8> OutChains;
3157 uint64_t DstOff = 0;
3159 unsigned NumMemOps = MemOps.size();
3160 for (unsigned i = 0; i < NumMemOps; i++) {
3162 unsigned VTSize = VT.getSizeInBits() / 8;
3163 SDValue Value = getMemsetValue(Src, VT, DAG, dl);
3164 SDValue Store = DAG.getStore(Chain, dl, Value,
3165 getMemBasePlusOffset(Dst, DstOff, DAG),
3166 DstSV, DstSVOff + DstOff);
3167 OutChains.push_back(Store);
3171 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3172 &OutChains[0], OutChains.size());
3175 SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst,
3176 SDValue Src, SDValue Size,
3177 unsigned Align, bool AlwaysInline,
3178 const Value *DstSV, uint64_t DstSVOff,
3179 const Value *SrcSV, uint64_t SrcSVOff) {
3181 // Check to see if we should lower the memcpy to loads and stores first.
3182 // For cases within the target-specified limits, this is the best choice.
3183 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3185 // Memcpy with size zero? Just return the original chain.
3186 if (ConstantSize->isNullValue())
3190 getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3191 ConstantSize->getZExtValue(),
3192 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3193 if (Result.getNode())
3197 // Then check to see if we should lower the memcpy with target-specific
3198 // code. If the target chooses to do this, this is the next best.
3200 TLI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align,
3202 DstSV, DstSVOff, SrcSV, SrcSVOff);
3203 if (Result.getNode())
3206 // If we really need inline code and the target declined to provide it,
3207 // use a (potentially long) sequence of loads and stores.
3209 assert(ConstantSize && "AlwaysInline requires a constant size!");
3210 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3211 ConstantSize->getZExtValue(), Align, true,
3212 DstSV, DstSVOff, SrcSV, SrcSVOff);
3215 // Emit a library call.
3216 TargetLowering::ArgListTy Args;
3217 TargetLowering::ArgListEntry Entry;
3218 Entry.Ty = TLI.getTargetData()->getIntPtrType();
3219 Entry.Node = Dst; Args.push_back(Entry);
3220 Entry.Node = Src; Args.push_back(Entry);
3221 Entry.Node = Size; Args.push_back(Entry);
3222 // FIXME: pass in DebugLoc
3223 std::pair<SDValue,SDValue> CallResult =
3224 TLI.LowerCallTo(Chain, Type::VoidTy,
3225 false, false, false, false, CallingConv::C, false,
3226 getExternalSymbol("memcpy", TLI.getPointerTy()),
3228 return CallResult.second;
3231 SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst,
3232 SDValue Src, SDValue Size,
3234 const Value *DstSV, uint64_t DstSVOff,
3235 const Value *SrcSV, uint64_t SrcSVOff) {
3237 // Check to see if we should lower the memmove to loads and stores first.
3238 // For cases within the target-specified limits, this is the best choice.
3239 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3241 // Memmove with size zero? Just return the original chain.
3242 if (ConstantSize->isNullValue())
3246 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
3247 ConstantSize->getZExtValue(),
3248 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3249 if (Result.getNode())
3253 // Then check to see if we should lower the memmove with target-specific
3254 // code. If the target chooses to do this, this is the next best.
3256 TLI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align,
3257 DstSV, DstSVOff, SrcSV, SrcSVOff);
3258 if (Result.getNode())
3261 // Emit a library call.
3262 TargetLowering::ArgListTy Args;
3263 TargetLowering::ArgListEntry Entry;
3264 Entry.Ty = TLI.getTargetData()->getIntPtrType();
3265 Entry.Node = Dst; Args.push_back(Entry);
3266 Entry.Node = Src; Args.push_back(Entry);
3267 Entry.Node = Size; Args.push_back(Entry);
3268 // FIXME: pass in DebugLoc
3269 std::pair<SDValue,SDValue> CallResult =
3270 TLI.LowerCallTo(Chain, Type::VoidTy,
3271 false, false, false, false, CallingConv::C, false,
3272 getExternalSymbol("memmove", TLI.getPointerTy()),
3274 return CallResult.second;
3277 SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst,
3278 SDValue Src, SDValue Size,
3280 const Value *DstSV, uint64_t DstSVOff) {
3282 // Check to see if we should lower the memset to stores first.
3283 // For cases within the target-specified limits, this is the best choice.
3284 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3286 // Memset with size zero? Just return the original chain.
3287 if (ConstantSize->isNullValue())
3291 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
3292 Align, DstSV, DstSVOff);
3293 if (Result.getNode())
3297 // Then check to see if we should lower the memset with target-specific
3298 // code. If the target chooses to do this, this is the next best.
3300 TLI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align,
3302 if (Result.getNode())
3305 // Emit a library call.
3306 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType();
3307 TargetLowering::ArgListTy Args;
3308 TargetLowering::ArgListEntry Entry;
3309 Entry.Node = Dst; Entry.Ty = IntPtrTy;
3310 Args.push_back(Entry);
3311 // Extend or truncate the argument to be an i32 value for the call.
3312 if (Src.getValueType().bitsGT(MVT::i32))
3313 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
3315 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
3316 Entry.Node = Src; Entry.Ty = Type::Int32Ty; Entry.isSExt = true;
3317 Args.push_back(Entry);
3318 Entry.Node = Size; Entry.Ty = IntPtrTy; Entry.isSExt = false;
3319 Args.push_back(Entry);
3320 // FIXME: pass in DebugLoc
3321 std::pair<SDValue,SDValue> CallResult =
3322 TLI.LowerCallTo(Chain, Type::VoidTy,
3323 false, false, false, false, CallingConv::C, false,
3324 getExternalSymbol("memset", TLI.getPointerTy()),
3326 return CallResult.second;
3329 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, MVT MemVT,
3331 SDValue Ptr, SDValue Cmp,
3332 SDValue Swp, const Value* PtrVal,
3333 unsigned Alignment) {
3334 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
3335 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3337 MVT VT = Cmp.getValueType();
3339 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3340 Alignment = getMVTAlignment(MemVT);
3342 SDVTList VTs = getVTList(VT, MVT::Other);
3343 FoldingSetNodeID ID;
3344 ID.AddInteger(MemVT.getRawBits());
3345 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3346 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3348 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3349 return SDValue(E, 0);
3350 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3351 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT,
3352 Chain, Ptr, Cmp, Swp, PtrVal, Alignment);
3353 CSEMap.InsertNode(N, IP);
3354 AllNodes.push_back(N);
3355 return SDValue(N, 0);
3358 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, MVT MemVT,
3360 SDValue Ptr, SDValue Val,
3361 const Value* PtrVal,
3362 unsigned Alignment) {
3363 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
3364 Opcode == ISD::ATOMIC_LOAD_SUB ||
3365 Opcode == ISD::ATOMIC_LOAD_AND ||
3366 Opcode == ISD::ATOMIC_LOAD_OR ||
3367 Opcode == ISD::ATOMIC_LOAD_XOR ||
3368 Opcode == ISD::ATOMIC_LOAD_NAND ||
3369 Opcode == ISD::ATOMIC_LOAD_MIN ||
3370 Opcode == ISD::ATOMIC_LOAD_MAX ||
3371 Opcode == ISD::ATOMIC_LOAD_UMIN ||
3372 Opcode == ISD::ATOMIC_LOAD_UMAX ||
3373 Opcode == ISD::ATOMIC_SWAP) &&
3374 "Invalid Atomic Op");
3376 MVT VT = Val.getValueType();
3378 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3379 Alignment = getMVTAlignment(MemVT);
3381 SDVTList VTs = getVTList(VT, MVT::Other);
3382 FoldingSetNodeID ID;
3383 ID.AddInteger(MemVT.getRawBits());
3384 SDValue Ops[] = {Chain, Ptr, Val};
3385 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3387 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3388 return SDValue(E, 0);
3389 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3390 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT,
3391 Chain, Ptr, Val, PtrVal, Alignment);
3392 CSEMap.InsertNode(N, IP);
3393 AllNodes.push_back(N);
3394 return SDValue(N, 0);
3397 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
3398 /// Allowed to return something different (and simpler) if Simplify is true.
3399 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps,
3404 SmallVector<MVT, 4> VTs;
3405 VTs.reserve(NumOps);
3406 for (unsigned i = 0; i < NumOps; ++i)
3407 VTs.push_back(Ops[i].getValueType());
3408 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps),
3413 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl,
3414 const MVT *VTs, unsigned NumVTs,
3415 const SDValue *Ops, unsigned NumOps,
3416 MVT MemVT, const Value *srcValue, int SVOff,
3417 unsigned Align, bool Vol,
3418 bool ReadMem, bool WriteMem) {
3419 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps,
3420 MemVT, srcValue, SVOff, Align, Vol,
3425 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
3426 const SDValue *Ops, unsigned NumOps,
3427 MVT MemVT, const Value *srcValue, int SVOff,
3428 unsigned Align, bool Vol,
3429 bool ReadMem, bool WriteMem) {
3430 // Memoize the node unless it returns a flag.
3431 MemIntrinsicSDNode *N;
3432 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3433 FoldingSetNodeID ID;
3434 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3436 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3437 return SDValue(E, 0);
3439 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3440 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT,
3441 srcValue, SVOff, Align, Vol, ReadMem, WriteMem);
3442 CSEMap.InsertNode(N, IP);
3444 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3445 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT,
3446 srcValue, SVOff, Align, Vol, ReadMem, WriteMem);
3448 AllNodes.push_back(N);
3449 return SDValue(N, 0);
3453 SelectionDAG::getCall(unsigned CallingConv, DebugLoc dl, bool IsVarArgs,
3454 bool IsTailCall, bool IsInreg, SDVTList VTs,
3455 const SDValue *Operands, unsigned NumOperands) {
3456 // Do not include isTailCall in the folding set profile.
3457 FoldingSetNodeID ID;
3458 AddNodeIDNode(ID, ISD::CALL, VTs, Operands, NumOperands);
3459 ID.AddInteger(CallingConv);
3460 ID.AddInteger(IsVarArgs);
3462 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3463 // Instead of including isTailCall in the folding set, we just
3464 // set the flag of the existing node.
3466 cast<CallSDNode>(E)->setNotTailCall();
3467 return SDValue(E, 0);
3469 SDNode *N = NodeAllocator.Allocate<CallSDNode>();
3470 new (N) CallSDNode(CallingConv, dl, IsVarArgs, IsTailCall, IsInreg,
3471 VTs, Operands, NumOperands);
3472 CSEMap.InsertNode(N, IP);
3473 AllNodes.push_back(N);
3474 return SDValue(N, 0);
3478 SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl,
3479 ISD::LoadExtType ExtType, MVT VT, SDValue Chain,
3480 SDValue Ptr, SDValue Offset,
3481 const Value *SV, int SVOffset, MVT EVT,
3482 bool isVolatile, unsigned Alignment) {
3483 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3484 Alignment = getMVTAlignment(VT);
3487 ExtType = ISD::NON_EXTLOAD;
3488 } else if (ExtType == ISD::NON_EXTLOAD) {
3489 assert(VT == EVT && "Non-extending load from different memory type!");
3493 assert(EVT.getVectorNumElements() == VT.getVectorNumElements() &&
3494 "Invalid vector extload!");
3496 assert(EVT.bitsLT(VT) &&
3497 "Should only be an extending load, not truncating!");
3498 assert((ExtType == ISD::EXTLOAD || VT.isInteger()) &&
3499 "Cannot sign/zero extend a FP/Vector load!");
3500 assert(VT.isInteger() == EVT.isInteger() &&
3501 "Cannot convert from FP to Int or Int -> FP!");
3504 bool Indexed = AM != ISD::UNINDEXED;
3505 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
3506 "Unindexed load with an offset!");
3508 SDVTList VTs = Indexed ?
3509 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
3510 SDValue Ops[] = { Chain, Ptr, Offset };
3511 FoldingSetNodeID ID;
3512 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
3513 ID.AddInteger(EVT.getRawBits());
3514 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, isVolatile, Alignment));
3516 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3517 return SDValue(E, 0);
3518 SDNode *N = NodeAllocator.Allocate<LoadSDNode>();
3519 new (N) LoadSDNode(Ops, dl, VTs, AM, ExtType, EVT, SV, SVOffset,
3520 Alignment, isVolatile);
3521 CSEMap.InsertNode(N, IP);
3522 AllNodes.push_back(N);
3523 return SDValue(N, 0);
3526 SDValue SelectionDAG::getLoad(MVT VT, DebugLoc dl,
3527 SDValue Chain, SDValue Ptr,
3528 const Value *SV, int SVOffset,
3529 bool isVolatile, unsigned Alignment) {
3530 SDValue Undef = getUNDEF(Ptr.getValueType());
3531 return getLoad(ISD::UNINDEXED, dl, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef,
3532 SV, SVOffset, VT, isVolatile, Alignment);
3535 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, MVT VT,
3536 SDValue Chain, SDValue Ptr,
3538 int SVOffset, MVT EVT,
3539 bool isVolatile, unsigned Alignment) {
3540 SDValue Undef = getUNDEF(Ptr.getValueType());
3541 return getLoad(ISD::UNINDEXED, dl, ExtType, VT, Chain, Ptr, Undef,
3542 SV, SVOffset, EVT, isVolatile, Alignment);
3546 SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base,
3547 SDValue Offset, ISD::MemIndexedMode AM) {
3548 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
3549 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
3550 "Load is already a indexed load!");
3551 return getLoad(AM, dl, LD->getExtensionType(), OrigLoad.getValueType(),
3552 LD->getChain(), Base, Offset, LD->getSrcValue(),
3553 LD->getSrcValueOffset(), LD->getMemoryVT(),
3554 LD->isVolatile(), LD->getAlignment());
3557 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
3558 SDValue Ptr, const Value *SV, int SVOffset,
3559 bool isVolatile, unsigned Alignment) {
3560 MVT VT = Val.getValueType();
3562 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3563 Alignment = getMVTAlignment(VT);
3565 SDVTList VTs = getVTList(MVT::Other);
3566 SDValue Undef = getUNDEF(Ptr.getValueType());
3567 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3568 FoldingSetNodeID ID;
3569 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3570 ID.AddInteger(VT.getRawBits());
3571 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED,
3572 isVolatile, Alignment));
3574 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3575 return SDValue(E, 0);
3576 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3577 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, false,
3578 VT, SV, SVOffset, Alignment, isVolatile);
3579 CSEMap.InsertNode(N, IP);
3580 AllNodes.push_back(N);
3581 return SDValue(N, 0);
3584 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
3585 SDValue Ptr, const Value *SV,
3586 int SVOffset, MVT SVT,
3587 bool isVolatile, unsigned Alignment) {
3588 MVT VT = Val.getValueType();
3591 return getStore(Chain, dl, Val, Ptr, SV, SVOffset, isVolatile, Alignment);
3593 assert(VT.bitsGT(SVT) && "Not a truncation?");
3594 assert(VT.isInteger() == SVT.isInteger() &&
3595 "Can't do FP-INT conversion!");
3597 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3598 Alignment = getMVTAlignment(VT);
3600 SDVTList VTs = getVTList(MVT::Other);
3601 SDValue Undef = getUNDEF(Ptr.getValueType());
3602 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3603 FoldingSetNodeID ID;
3604 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3605 ID.AddInteger(SVT.getRawBits());
3606 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED,
3607 isVolatile, Alignment));
3609 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3610 return SDValue(E, 0);
3611 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3612 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, true,
3613 SVT, SV, SVOffset, Alignment, isVolatile);
3614 CSEMap.InsertNode(N, IP);
3615 AllNodes.push_back(N);
3616 return SDValue(N, 0);
3620 SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base,
3621 SDValue Offset, ISD::MemIndexedMode AM) {
3622 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
3623 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
3624 "Store is already a indexed store!");
3625 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
3626 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
3627 FoldingSetNodeID ID;
3628 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3629 ID.AddInteger(ST->getMemoryVT().getRawBits());
3630 ID.AddInteger(ST->getRawSubclassData());
3632 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3633 return SDValue(E, 0);
3634 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3635 new (N) StoreSDNode(Ops, dl, VTs, AM,
3636 ST->isTruncatingStore(), ST->getMemoryVT(),
3637 ST->getSrcValue(), ST->getSrcValueOffset(),
3638 ST->getAlignment(), ST->isVolatile());
3639 CSEMap.InsertNode(N, IP);
3640 AllNodes.push_back(N);
3641 return SDValue(N, 0);
3644 SDValue SelectionDAG::getVAArg(MVT VT, DebugLoc dl,
3645 SDValue Chain, SDValue Ptr,
3647 SDValue Ops[] = { Chain, Ptr, SV };
3648 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 3);
3651 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
3652 const SDUse *Ops, unsigned NumOps) {
3654 case 0: return getNode(Opcode, DL, VT);
3655 case 1: return getNode(Opcode, DL, VT, Ops[0]);
3656 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
3657 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
3661 // Copy from an SDUse array into an SDValue array for use with
3662 // the regular getNode logic.
3663 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
3664 return getNode(Opcode, DL, VT, &NewOps[0], NumOps);
3667 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
3668 const SDValue *Ops, unsigned NumOps) {
3670 case 0: return getNode(Opcode, DL, VT);
3671 case 1: return getNode(Opcode, DL, VT, Ops[0]);
3672 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
3673 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
3679 case ISD::SELECT_CC: {
3680 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
3681 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
3682 "LHS and RHS of condition must have same type!");
3683 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
3684 "True and False arms of SelectCC must have same type!");
3685 assert(Ops[2].getValueType() == VT &&
3686 "select_cc node must be of same type as true and false value!");
3690 assert(NumOps == 5 && "BR_CC takes 5 operands!");
3691 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
3692 "LHS/RHS of comparison should match types!");
3699 SDVTList VTs = getVTList(VT);
3701 if (VT != MVT::Flag) {
3702 FoldingSetNodeID ID;
3703 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
3706 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3707 return SDValue(E, 0);
3709 N = NodeAllocator.Allocate<SDNode>();
3710 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps);
3711 CSEMap.InsertNode(N, IP);
3713 N = NodeAllocator.Allocate<SDNode>();
3714 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps);
3717 AllNodes.push_back(N);
3721 return SDValue(N, 0);
3724 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
3725 const std::vector<MVT> &ResultTys,
3726 const SDValue *Ops, unsigned NumOps) {
3727 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()),
3731 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
3732 const MVT *VTs, unsigned NumVTs,
3733 const SDValue *Ops, unsigned NumOps) {
3735 return getNode(Opcode, DL, VTs[0], Ops, NumOps);
3736 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps);
3739 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
3740 const SDValue *Ops, unsigned NumOps) {
3741 if (VTList.NumVTs == 1)
3742 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps);
3745 // FIXME: figure out how to safely handle things like
3746 // int foo(int x) { return 1 << (x & 255); }
3747 // int bar() { return foo(256); }
3749 case ISD::SRA_PARTS:
3750 case ISD::SRL_PARTS:
3751 case ISD::SHL_PARTS:
3752 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
3753 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
3754 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
3755 else if (N3.getOpcode() == ISD::AND)
3756 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
3757 // If the and is only masking out bits that cannot effect the shift,
3758 // eliminate the and.
3759 unsigned NumBits = VT.getSizeInBits()*2;
3760 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
3761 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
3767 // Memoize the node unless it returns a flag.
3769 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3770 FoldingSetNodeID ID;
3771 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3773 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3774 return SDValue(E, 0);
3776 N = NodeAllocator.Allocate<UnarySDNode>();
3777 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]);
3778 } else if (NumOps == 2) {
3779 N = NodeAllocator.Allocate<BinarySDNode>();
3780 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
3781 } else if (NumOps == 3) {
3782 N = NodeAllocator.Allocate<TernarySDNode>();
3783 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]);
3785 N = NodeAllocator.Allocate<SDNode>();
3786 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps);
3788 CSEMap.InsertNode(N, IP);
3791 N = NodeAllocator.Allocate<UnarySDNode>();
3792 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]);
3793 } else if (NumOps == 2) {
3794 N = NodeAllocator.Allocate<BinarySDNode>();
3795 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
3796 } else if (NumOps == 3) {
3797 N = NodeAllocator.Allocate<TernarySDNode>();
3798 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]);
3800 N = NodeAllocator.Allocate<SDNode>();
3801 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps);
3804 AllNodes.push_back(N);
3808 return SDValue(N, 0);
3811 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) {
3812 return getNode(Opcode, DL, VTList, 0, 0);
3815 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
3817 SDValue Ops[] = { N1 };
3818 return getNode(Opcode, DL, VTList, Ops, 1);
3821 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
3822 SDValue N1, SDValue N2) {
3823 SDValue Ops[] = { N1, N2 };
3824 return getNode(Opcode, DL, VTList, Ops, 2);
3827 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
3828 SDValue N1, SDValue N2, SDValue N3) {
3829 SDValue Ops[] = { N1, N2, N3 };
3830 return getNode(Opcode, DL, VTList, Ops, 3);
3833 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
3834 SDValue N1, SDValue N2, SDValue N3,
3836 SDValue Ops[] = { N1, N2, N3, N4 };
3837 return getNode(Opcode, DL, VTList, Ops, 4);
3840 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
3841 SDValue N1, SDValue N2, SDValue N3,
3842 SDValue N4, SDValue N5) {
3843 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3844 return getNode(Opcode, DL, VTList, Ops, 5);
3847 SDVTList SelectionDAG::getVTList(MVT VT) {
3848 return makeVTList(SDNode::getValueTypeList(VT), 1);
3851 SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2) {
3852 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
3853 E = VTList.rend(); I != E; ++I)
3854 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
3857 MVT *Array = Allocator.Allocate<MVT>(2);
3860 SDVTList Result = makeVTList(Array, 2);
3861 VTList.push_back(Result);
3865 SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2, MVT VT3) {
3866 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
3867 E = VTList.rend(); I != E; ++I)
3868 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
3872 MVT *Array = Allocator.Allocate<MVT>(3);
3876 SDVTList Result = makeVTList(Array, 3);
3877 VTList.push_back(Result);
3881 SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2, MVT VT3, MVT VT4) {
3882 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
3883 E = VTList.rend(); I != E; ++I)
3884 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
3885 I->VTs[2] == VT3 && I->VTs[3] == VT4)
3888 MVT *Array = Allocator.Allocate<MVT>(3);
3893 SDVTList Result = makeVTList(Array, 4);
3894 VTList.push_back(Result);
3898 SDVTList SelectionDAG::getVTList(const MVT *VTs, unsigned NumVTs) {
3900 case 0: assert(0 && "Cannot have nodes without results!");
3901 case 1: return getVTList(VTs[0]);
3902 case 2: return getVTList(VTs[0], VTs[1]);
3903 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
3907 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
3908 E = VTList.rend(); I != E; ++I) {
3909 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
3912 bool NoMatch = false;
3913 for (unsigned i = 2; i != NumVTs; ++i)
3914 if (VTs[i] != I->VTs[i]) {
3922 MVT *Array = Allocator.Allocate<MVT>(NumVTs);
3923 std::copy(VTs, VTs+NumVTs, Array);
3924 SDVTList Result = makeVTList(Array, NumVTs);
3925 VTList.push_back(Result);
3930 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
3931 /// specified operands. If the resultant node already exists in the DAG,
3932 /// this does not modify the specified node, instead it returns the node that
3933 /// already exists. If the resultant node does not exist in the DAG, the
3934 /// input node is returned. As a degenerate case, if you specify the same
3935 /// input operands as the node already has, the input node is returned.
3936 SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) {
3937 SDNode *N = InN.getNode();
3938 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
3940 // Check to see if there is no change.
3941 if (Op == N->getOperand(0)) return InN;
3943 // See if the modified node already exists.
3944 void *InsertPos = 0;
3945 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
3946 return SDValue(Existing, InN.getResNo());
3948 // Nope it doesn't. Remove the node from its current place in the maps.
3950 if (!RemoveNodeFromCSEMaps(N))
3953 // Now we update the operands.
3954 N->OperandList[0].set(Op);
3956 // If this gets put into a CSE map, add it.
3957 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
3961 SDValue SelectionDAG::
3962 UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) {
3963 SDNode *N = InN.getNode();
3964 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
3966 // Check to see if there is no change.
3967 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
3968 return InN; // No operands changed, just return the input node.
3970 // See if the modified node already exists.
3971 void *InsertPos = 0;
3972 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
3973 return SDValue(Existing, InN.getResNo());
3975 // Nope it doesn't. Remove the node from its current place in the maps.
3977 if (!RemoveNodeFromCSEMaps(N))
3980 // Now we update the operands.
3981 if (N->OperandList[0] != Op1)
3982 N->OperandList[0].set(Op1);
3983 if (N->OperandList[1] != Op2)
3984 N->OperandList[1].set(Op2);
3986 // If this gets put into a CSE map, add it.
3987 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
3991 SDValue SelectionDAG::
3992 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) {
3993 SDValue Ops[] = { Op1, Op2, Op3 };
3994 return UpdateNodeOperands(N, Ops, 3);
3997 SDValue SelectionDAG::
3998 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
3999 SDValue Op3, SDValue Op4) {
4000 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
4001 return UpdateNodeOperands(N, Ops, 4);
4004 SDValue SelectionDAG::
4005 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
4006 SDValue Op3, SDValue Op4, SDValue Op5) {
4007 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
4008 return UpdateNodeOperands(N, Ops, 5);
4011 SDValue SelectionDAG::
4012 UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) {
4013 SDNode *N = InN.getNode();
4014 assert(N->getNumOperands() == NumOps &&
4015 "Update with wrong number of operands");
4017 // Check to see if there is no change.
4018 bool AnyChange = false;
4019 for (unsigned i = 0; i != NumOps; ++i) {
4020 if (Ops[i] != N->getOperand(i)) {
4026 // No operands changed, just return the input node.
4027 if (!AnyChange) return InN;
4029 // See if the modified node already exists.
4030 void *InsertPos = 0;
4031 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
4032 return SDValue(Existing, InN.getResNo());
4034 // Nope it doesn't. Remove the node from its current place in the maps.
4036 if (!RemoveNodeFromCSEMaps(N))
4039 // Now we update the operands.
4040 for (unsigned i = 0; i != NumOps; ++i)
4041 if (N->OperandList[i] != Ops[i])
4042 N->OperandList[i].set(Ops[i]);
4044 // If this gets put into a CSE map, add it.
4045 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4049 /// DropOperands - Release the operands and set this node to have
4051 void SDNode::DropOperands() {
4052 // Unlike the code in MorphNodeTo that does this, we don't need to
4053 // watch for dead nodes here.
4054 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
4060 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
4063 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4065 SDVTList VTs = getVTList(VT);
4066 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
4069 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4070 MVT VT, SDValue Op1) {
4071 SDVTList VTs = getVTList(VT);
4072 SDValue Ops[] = { Op1 };
4073 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4076 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4077 MVT VT, SDValue Op1,
4079 SDVTList VTs = getVTList(VT);
4080 SDValue Ops[] = { Op1, Op2 };
4081 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4084 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4085 MVT VT, SDValue Op1,
4086 SDValue Op2, SDValue Op3) {
4087 SDVTList VTs = getVTList(VT);
4088 SDValue Ops[] = { Op1, Op2, Op3 };
4089 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4092 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4093 MVT VT, const SDValue *Ops,
4095 SDVTList VTs = getVTList(VT);
4096 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4099 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4100 MVT VT1, MVT VT2, const SDValue *Ops,
4102 SDVTList VTs = getVTList(VT1, VT2);
4103 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4106 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4108 SDVTList VTs = getVTList(VT1, VT2);
4109 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
4112 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4113 MVT VT1, MVT VT2, MVT VT3,
4114 const SDValue *Ops, unsigned NumOps) {
4115 SDVTList VTs = getVTList(VT1, VT2, VT3);
4116 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4119 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4120 MVT VT1, MVT VT2, MVT VT3, MVT VT4,
4121 const SDValue *Ops, unsigned NumOps) {
4122 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4123 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4126 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4129 SDVTList VTs = getVTList(VT1, VT2);
4130 SDValue Ops[] = { Op1 };
4131 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4134 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4136 SDValue Op1, SDValue Op2) {
4137 SDVTList VTs = getVTList(VT1, VT2);
4138 SDValue Ops[] = { Op1, Op2 };
4139 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4142 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4144 SDValue Op1, SDValue Op2,
4146 SDVTList VTs = getVTList(VT1, VT2);
4147 SDValue Ops[] = { Op1, Op2, Op3 };
4148 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4151 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4152 MVT VT1, MVT VT2, MVT VT3,
4153 SDValue Op1, SDValue Op2,
4155 SDVTList VTs = getVTList(VT1, VT2, VT3);
4156 SDValue Ops[] = { Op1, Op2, Op3 };
4157 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4160 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4161 SDVTList VTs, const SDValue *Ops,
4163 return MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
4166 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4168 SDVTList VTs = getVTList(VT);
4169 return MorphNodeTo(N, Opc, VTs, 0, 0);
4172 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4173 MVT VT, SDValue Op1) {
4174 SDVTList VTs = getVTList(VT);
4175 SDValue Ops[] = { Op1 };
4176 return MorphNodeTo(N, Opc, VTs, Ops, 1);
4179 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4180 MVT VT, SDValue Op1,
4182 SDVTList VTs = getVTList(VT);
4183 SDValue Ops[] = { Op1, Op2 };
4184 return MorphNodeTo(N, Opc, VTs, Ops, 2);
4187 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4188 MVT VT, SDValue Op1,
4189 SDValue Op2, SDValue Op3) {
4190 SDVTList VTs = getVTList(VT);
4191 SDValue Ops[] = { Op1, Op2, Op3 };
4192 return MorphNodeTo(N, Opc, VTs, Ops, 3);
4195 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4196 MVT VT, const SDValue *Ops,
4198 SDVTList VTs = getVTList(VT);
4199 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4202 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4203 MVT VT1, MVT VT2, const SDValue *Ops,
4205 SDVTList VTs = getVTList(VT1, VT2);
4206 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4209 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4211 SDVTList VTs = getVTList(VT1, VT2);
4212 return MorphNodeTo(N, Opc, VTs, (SDValue *)0, 0);
4215 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4216 MVT VT1, MVT VT2, MVT VT3,
4217 const SDValue *Ops, unsigned NumOps) {
4218 SDVTList VTs = getVTList(VT1, VT2, VT3);
4219 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4222 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4225 SDVTList VTs = getVTList(VT1, VT2);
4226 SDValue Ops[] = { Op1 };
4227 return MorphNodeTo(N, Opc, VTs, Ops, 1);
4230 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4232 SDValue Op1, SDValue Op2) {
4233 SDVTList VTs = getVTList(VT1, VT2);
4234 SDValue Ops[] = { Op1, Op2 };
4235 return MorphNodeTo(N, Opc, VTs, Ops, 2);
4238 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4240 SDValue Op1, SDValue Op2,
4242 SDVTList VTs = getVTList(VT1, VT2);
4243 SDValue Ops[] = { Op1, Op2, Op3 };
4244 return MorphNodeTo(N, Opc, VTs, Ops, 3);
4247 /// MorphNodeTo - These *mutate* the specified node to have the specified
4248 /// return type, opcode, and operands.
4250 /// Note that MorphNodeTo returns the resultant node. If there is already a
4251 /// node of the specified opcode and operands, it returns that node instead of
4252 /// the current one. Note that the DebugLoc need not be the same.
4254 /// Using MorphNodeTo is faster than creating a new node and swapping it in
4255 /// with ReplaceAllUsesWith both because it often avoids allocating a new
4256 /// node, and because it doesn't require CSE recalculation for any of
4257 /// the node's users.
4259 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4260 SDVTList VTs, const SDValue *Ops,
4262 // If an identical node already exists, use it.
4264 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) {
4265 FoldingSetNodeID ID;
4266 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
4267 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
4271 if (!RemoveNodeFromCSEMaps(N))
4274 // Start the morphing.
4276 N->ValueList = VTs.VTs;
4277 N->NumValues = VTs.NumVTs;
4279 // Clear the operands list, updating used nodes to remove this from their
4280 // use list. Keep track of any operands that become dead as a result.
4281 SmallPtrSet<SDNode*, 16> DeadNodeSet;
4282 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
4284 SDNode *Used = Use.getNode();
4286 if (Used->use_empty())
4287 DeadNodeSet.insert(Used);
4290 // If NumOps is larger than the # of operands we currently have, reallocate
4291 // the operand list.
4292 if (NumOps > N->NumOperands) {
4293 if (N->OperandsNeedDelete)
4294 delete[] N->OperandList;
4296 if (N->isMachineOpcode()) {
4297 // We're creating a final node that will live unmorphed for the
4298 // remainder of the current SelectionDAG iteration, so we can allocate
4299 // the operands directly out of a pool with no recycling metadata.
4300 N->OperandList = OperandAllocator.Allocate<SDUse>(NumOps);
4301 N->OperandsNeedDelete = false;
4303 N->OperandList = new SDUse[NumOps];
4304 N->OperandsNeedDelete = true;
4308 // Assign the new operands.
4309 N->NumOperands = NumOps;
4310 for (unsigned i = 0, e = NumOps; i != e; ++i) {
4311 N->OperandList[i].setUser(N);
4312 N->OperandList[i].setInitial(Ops[i]);
4315 // Delete any nodes that are still dead after adding the uses for the
4317 SmallVector<SDNode *, 16> DeadNodes;
4318 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
4319 E = DeadNodeSet.end(); I != E; ++I)
4320 if ((*I)->use_empty())
4321 DeadNodes.push_back(*I);
4322 RemoveDeadNodes(DeadNodes);
4325 CSEMap.InsertNode(N, IP); // Memoize the new node.
4330 /// getTargetNode - These are used for target selectors to create a new node
4331 /// with specified return type(s), target opcode, and operands.
4333 /// Note that getTargetNode returns the resultant node. If there is already a
4334 /// node of the specified opcode and operands, it returns that node instead of
4335 /// the current one.
4336 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT) {
4337 return getNode(~Opcode, dl, VT).getNode();
4340 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT,
4342 return getNode(~Opcode, dl, VT, Op1).getNode();
4345 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT,
4346 SDValue Op1, SDValue Op2) {
4347 return getNode(~Opcode, dl, VT, Op1, Op2).getNode();
4350 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT,
4351 SDValue Op1, SDValue Op2,
4353 return getNode(~Opcode, dl, VT, Op1, Op2, Op3).getNode();
4356 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT,
4357 const SDValue *Ops, unsigned NumOps) {
4358 return getNode(~Opcode, dl, VT, Ops, NumOps).getNode();
4361 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4363 SDVTList VTs = getVTList(VT1, VT2);
4365 return getNode(~Opcode, dl, VTs, &Op, 0).getNode();
4368 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1,
4369 MVT VT2, SDValue Op1) {
4370 SDVTList VTs = getVTList(VT1, VT2);
4371 return getNode(~Opcode, dl, VTs, &Op1, 1).getNode();
4374 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1,
4375 MVT VT2, SDValue Op1,
4377 SDVTList VTs = getVTList(VT1, VT2);
4378 SDValue Ops[] = { Op1, Op2 };
4379 return getNode(~Opcode, dl, VTs, Ops, 2).getNode();
4382 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1,
4383 MVT VT2, SDValue Op1,
4384 SDValue Op2, SDValue Op3) {
4385 SDVTList VTs = getVTList(VT1, VT2);
4386 SDValue Ops[] = { Op1, Op2, Op3 };
4387 return getNode(~Opcode, dl, VTs, Ops, 3).getNode();
4390 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4392 const SDValue *Ops, unsigned NumOps) {
4393 SDVTList VTs = getVTList(VT1, VT2);
4394 return getNode(~Opcode, dl, VTs, Ops, NumOps).getNode();
4397 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4398 MVT VT1, MVT VT2, MVT VT3,
4399 SDValue Op1, SDValue Op2) {
4400 SDVTList VTs = getVTList(VT1, VT2, VT3);
4401 SDValue Ops[] = { Op1, Op2 };
4402 return getNode(~Opcode, dl, VTs, Ops, 2).getNode();
4405 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4406 MVT VT1, MVT VT2, MVT VT3,
4407 SDValue Op1, SDValue Op2,
4409 SDVTList VTs = getVTList(VT1, VT2, VT3);
4410 SDValue Ops[] = { Op1, Op2, Op3 };
4411 return getNode(~Opcode, dl, VTs, Ops, 3).getNode();
4414 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4415 MVT VT1, MVT VT2, MVT VT3,
4416 const SDValue *Ops, unsigned NumOps) {
4417 SDVTList VTs = getVTList(VT1, VT2, VT3);
4418 return getNode(~Opcode, dl, VTs, Ops, NumOps).getNode();
4421 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1,
4422 MVT VT2, MVT VT3, MVT VT4,
4423 const SDValue *Ops, unsigned NumOps) {
4424 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4425 return getNode(~Opcode, dl, VTs, Ops, NumOps).getNode();
4428 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4429 const std::vector<MVT> &ResultTys,
4430 const SDValue *Ops, unsigned NumOps) {
4431 return getNode(~Opcode, dl, ResultTys, Ops, NumOps).getNode();
4434 /// getNodeIfExists - Get the specified node if it's already available, or
4435 /// else return NULL.
4436 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
4437 const SDValue *Ops, unsigned NumOps) {
4438 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4439 FoldingSetNodeID ID;
4440 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4442 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4448 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4449 /// This can cause recursive merging of nodes in the DAG.
4451 /// This version assumes From has a single result value.
4453 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To,
4454 DAGUpdateListener *UpdateListener) {
4455 SDNode *From = FromN.getNode();
4456 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
4457 "Cannot replace with this method!");
4458 assert(From != To.getNode() && "Cannot replace uses of with self");
4460 // Iterate over all the existing uses of From. New uses will be added
4461 // to the beginning of the use list, which we avoid visiting.
4462 // This specifically avoids visiting uses of From that arise while the
4463 // replacement is happening, because any such uses would be the result
4464 // of CSE: If an existing node looks like From after one of its operands
4465 // is replaced by To, we don't want to replace of all its users with To
4466 // too. See PR3018 for more info.
4467 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
4471 // This node is about to morph, remove its old self from the CSE maps.
4472 RemoveNodeFromCSEMaps(User);
4474 // A user can appear in a use list multiple times, and when this
4475 // happens the uses are usually next to each other in the list.
4476 // To help reduce the number of CSE recomputations, process all
4477 // the uses of this user that we can find this way.
4479 SDUse &Use = UI.getUse();
4482 } while (UI != UE && *UI == User);
4484 // Now that we have modified User, add it back to the CSE maps. If it
4485 // already exists there, recursively merge the results together.
4486 AddModifiedNodeToCSEMaps(User, UpdateListener);
4490 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4491 /// This can cause recursive merging of nodes in the DAG.
4493 /// This version assumes From/To have matching types and numbers of result
4496 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To,
4497 DAGUpdateListener *UpdateListener) {
4498 assert(From->getVTList().VTs == To->getVTList().VTs &&
4499 From->getNumValues() == To->getNumValues() &&
4500 "Cannot use this version of ReplaceAllUsesWith!");
4502 // Handle the trivial case.
4506 // Iterate over just the existing users of From. See the comments in
4507 // the ReplaceAllUsesWith above.
4508 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
4512 // This node is about to morph, remove its old self from the CSE maps.
4513 RemoveNodeFromCSEMaps(User);
4515 // A user can appear in a use list multiple times, and when this
4516 // happens the uses are usually next to each other in the list.
4517 // To help reduce the number of CSE recomputations, process all
4518 // the uses of this user that we can find this way.
4520 SDUse &Use = UI.getUse();
4523 } while (UI != UE && *UI == User);
4525 // Now that we have modified User, add it back to the CSE maps. If it
4526 // already exists there, recursively merge the results together.
4527 AddModifiedNodeToCSEMaps(User, UpdateListener);
4531 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4532 /// This can cause recursive merging of nodes in the DAG.
4534 /// This version can replace From with any result values. To must match the
4535 /// number and types of values returned by From.
4536 void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
4538 DAGUpdateListener *UpdateListener) {
4539 if (From->getNumValues() == 1) // Handle the simple case efficiently.
4540 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener);
4542 // Iterate over just the existing users of From. See the comments in
4543 // the ReplaceAllUsesWith above.
4544 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
4548 // This node is about to morph, remove its old self from the CSE maps.
4549 RemoveNodeFromCSEMaps(User);
4551 // A user can appear in a use list multiple times, and when this
4552 // happens the uses are usually next to each other in the list.
4553 // To help reduce the number of CSE recomputations, process all
4554 // the uses of this user that we can find this way.
4556 SDUse &Use = UI.getUse();
4557 const SDValue &ToOp = To[Use.getResNo()];
4560 } while (UI != UE && *UI == User);
4562 // Now that we have modified User, add it back to the CSE maps. If it
4563 // already exists there, recursively merge the results together.
4564 AddModifiedNodeToCSEMaps(User, UpdateListener);
4568 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
4569 /// uses of other values produced by From.getNode() alone. The Deleted
4570 /// vector is handled the same way as for ReplaceAllUsesWith.
4571 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To,
4572 DAGUpdateListener *UpdateListener){
4573 // Handle the really simple, really trivial case efficiently.
4574 if (From == To) return;
4576 // Handle the simple, trivial, case efficiently.
4577 if (From.getNode()->getNumValues() == 1) {
4578 ReplaceAllUsesWith(From, To, UpdateListener);
4582 // Iterate over just the existing users of From. See the comments in
4583 // the ReplaceAllUsesWith above.
4584 SDNode::use_iterator UI = From.getNode()->use_begin(),
4585 UE = From.getNode()->use_end();
4588 bool UserRemovedFromCSEMaps = false;
4590 // A user can appear in a use list multiple times, and when this
4591 // happens the uses are usually next to each other in the list.
4592 // To help reduce the number of CSE recomputations, process all
4593 // the uses of this user that we can find this way.
4595 SDUse &Use = UI.getUse();
4597 // Skip uses of different values from the same node.
4598 if (Use.getResNo() != From.getResNo()) {
4603 // If this node hasn't been modified yet, it's still in the CSE maps,
4604 // so remove its old self from the CSE maps.
4605 if (!UserRemovedFromCSEMaps) {
4606 RemoveNodeFromCSEMaps(User);
4607 UserRemovedFromCSEMaps = true;
4612 } while (UI != UE && *UI == User);
4614 // We are iterating over all uses of the From node, so if a use
4615 // doesn't use the specific value, no changes are made.
4616 if (!UserRemovedFromCSEMaps)
4619 // Now that we have modified User, add it back to the CSE maps. If it
4620 // already exists there, recursively merge the results together.
4621 AddModifiedNodeToCSEMaps(User, UpdateListener);
4626 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
4627 /// to record information about a use.
4634 /// operator< - Sort Memos by User.
4635 bool operator<(const UseMemo &L, const UseMemo &R) {
4636 return (intptr_t)L.User < (intptr_t)R.User;
4640 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
4641 /// uses of other values produced by From.getNode() alone. The same value
4642 /// may appear in both the From and To list. The Deleted vector is
4643 /// handled the same way as for ReplaceAllUsesWith.
4644 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
4647 DAGUpdateListener *UpdateListener){
4648 // Handle the simple, trivial case efficiently.
4650 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener);
4652 // Read up all the uses and make records of them. This helps
4653 // processing new uses that are introduced during the
4654 // replacement process.
4655 SmallVector<UseMemo, 4> Uses;
4656 for (unsigned i = 0; i != Num; ++i) {
4657 unsigned FromResNo = From[i].getResNo();
4658 SDNode *FromNode = From[i].getNode();
4659 for (SDNode::use_iterator UI = FromNode->use_begin(),
4660 E = FromNode->use_end(); UI != E; ++UI) {
4661 SDUse &Use = UI.getUse();
4662 if (Use.getResNo() == FromResNo) {
4663 UseMemo Memo = { *UI, i, &Use };
4664 Uses.push_back(Memo);
4669 // Sort the uses, so that all the uses from a given User are together.
4670 std::sort(Uses.begin(), Uses.end());
4672 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
4673 UseIndex != UseIndexEnd; ) {
4674 // We know that this user uses some value of From. If it is the right
4675 // value, update it.
4676 SDNode *User = Uses[UseIndex].User;
4678 // This node is about to morph, remove its old self from the CSE maps.
4679 RemoveNodeFromCSEMaps(User);
4681 // The Uses array is sorted, so all the uses for a given User
4682 // are next to each other in the list.
4683 // To help reduce the number of CSE recomputations, process all
4684 // the uses of this user that we can find this way.
4686 unsigned i = Uses[UseIndex].Index;
4687 SDUse &Use = *Uses[UseIndex].Use;
4691 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
4693 // Now that we have modified User, add it back to the CSE maps. If it
4694 // already exists there, recursively merge the results together.
4695 AddModifiedNodeToCSEMaps(User, UpdateListener);
4699 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
4700 /// based on their topological order. It returns the maximum id and a vector
4701 /// of the SDNodes* in assigned order by reference.
4702 unsigned SelectionDAG::AssignTopologicalOrder() {
4704 unsigned DAGSize = 0;
4706 // SortedPos tracks the progress of the algorithm. Nodes before it are
4707 // sorted, nodes after it are unsorted. When the algorithm completes
4708 // it is at the end of the list.
4709 allnodes_iterator SortedPos = allnodes_begin();
4711 // Visit all the nodes. Move nodes with no operands to the front of
4712 // the list immediately. Annotate nodes that do have operands with their
4713 // operand count. Before we do this, the Node Id fields of the nodes
4714 // may contain arbitrary values. After, the Node Id fields for nodes
4715 // before SortedPos will contain the topological sort index, and the
4716 // Node Id fields for nodes At SortedPos and after will contain the
4717 // count of outstanding operands.
4718 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
4720 unsigned Degree = N->getNumOperands();
4722 // A node with no uses, add it to the result array immediately.
4723 N->setNodeId(DAGSize++);
4724 allnodes_iterator Q = N;
4726 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
4729 // Temporarily use the Node Id as scratch space for the degree count.
4730 N->setNodeId(Degree);
4734 // Visit all the nodes. As we iterate, moves nodes into sorted order,
4735 // such that by the time the end is reached all nodes will be sorted.
4736 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
4738 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
4741 unsigned Degree = P->getNodeId();
4744 // All of P's operands are sorted, so P may sorted now.
4745 P->setNodeId(DAGSize++);
4747 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
4750 // Update P's outstanding operand count.
4751 P->setNodeId(Degree);
4756 assert(SortedPos == AllNodes.end() &&
4757 "Topological sort incomplete!");
4758 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
4759 "First node in topological sort is not the entry token!");
4760 assert(AllNodes.front().getNodeId() == 0 &&
4761 "First node in topological sort has non-zero id!");
4762 assert(AllNodes.front().getNumOperands() == 0 &&
4763 "First node in topological sort has operands!");
4764 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
4765 "Last node in topologic sort has unexpected id!");
4766 assert(AllNodes.back().use_empty() &&
4767 "Last node in topologic sort has users!");
4768 assert(DAGSize == allnodes_size() && "Node count mismatch!");
4774 //===----------------------------------------------------------------------===//
4776 //===----------------------------------------------------------------------===//
4778 HandleSDNode::~HandleSDNode() {
4782 GlobalAddressSDNode::GlobalAddressSDNode(bool isTarget, const GlobalValue *GA,
4784 : SDNode(isa<GlobalVariable>(GA) &&
4785 cast<GlobalVariable>(GA)->isThreadLocal() ?
4787 (isTarget ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress) :
4789 (isTarget ? ISD::TargetGlobalAddress : ISD::GlobalAddress),
4790 DebugLoc::getUnknownLoc(), getSDVTList(VT)), Offset(o) {
4791 TheGlobal = const_cast<GlobalValue*>(GA);
4794 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, MVT memvt,
4795 const Value *srcValue, int SVO,
4796 unsigned alignment, bool vol)
4797 : SDNode(Opc, dl, VTs), MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO) {
4798 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, vol, alignment);
4799 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
4800 assert(getAlignment() == alignment && "Alignment representation error!");
4801 assert(isVolatile() == vol && "Volatile representation error!");
4804 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs,
4806 unsigned NumOps, MVT memvt, const Value *srcValue,
4807 int SVO, unsigned alignment, bool vol)
4808 : SDNode(Opc, dl, VTs, Ops, NumOps),
4809 MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO) {
4810 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, vol, alignment);
4811 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
4812 assert(getAlignment() == alignment && "Alignment representation error!");
4813 assert(isVolatile() == vol && "Volatile representation error!");
4816 /// getMemOperand - Return a MachineMemOperand object describing the memory
4817 /// reference performed by this memory reference.
4818 MachineMemOperand MemSDNode::getMemOperand() const {
4820 if (isa<LoadSDNode>(this))
4821 Flags = MachineMemOperand::MOLoad;
4822 else if (isa<StoreSDNode>(this))
4823 Flags = MachineMemOperand::MOStore;
4824 else if (isa<AtomicSDNode>(this)) {
4825 Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
4828 const MemIntrinsicSDNode* MemIntrinNode = dyn_cast<MemIntrinsicSDNode>(this);
4829 assert(MemIntrinNode && "Unknown MemSDNode opcode!");
4830 if (MemIntrinNode->readMem()) Flags |= MachineMemOperand::MOLoad;
4831 if (MemIntrinNode->writeMem()) Flags |= MachineMemOperand::MOStore;
4834 int Size = (getMemoryVT().getSizeInBits() + 7) >> 3;
4835 if (isVolatile()) Flags |= MachineMemOperand::MOVolatile;
4837 // Check if the memory reference references a frame index
4838 const FrameIndexSDNode *FI =
4839 dyn_cast<const FrameIndexSDNode>(getBasePtr().getNode());
4840 if (!getSrcValue() && FI)
4841 return MachineMemOperand(PseudoSourceValue::getFixedStack(FI->getIndex()),
4842 Flags, 0, Size, getAlignment());
4844 return MachineMemOperand(getSrcValue(), Flags, getSrcValueOffset(),
4845 Size, getAlignment());
4848 /// Profile - Gather unique data for the node.
4850 void SDNode::Profile(FoldingSetNodeID &ID) const {
4851 AddNodeIDNode(ID, this);
4854 /// getValueTypeList - Return a pointer to the specified value type.
4856 const MVT *SDNode::getValueTypeList(MVT VT) {
4857 if (VT.isExtended()) {
4858 static std::set<MVT, MVT::compareRawBits> EVTs;
4859 return &(*EVTs.insert(VT).first);
4861 static MVT VTs[MVT::LAST_VALUETYPE];
4862 VTs[VT.getSimpleVT()] = VT;
4863 return &VTs[VT.getSimpleVT()];
4867 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
4868 /// indicated value. This method ignores uses of other values defined by this
4870 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
4871 assert(Value < getNumValues() && "Bad value!");
4873 // TODO: Only iterate over uses of a given value of the node
4874 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
4875 if (UI.getUse().getResNo() == Value) {
4882 // Found exactly the right number of uses?
4887 /// hasAnyUseOfValue - Return true if there are any use of the indicated
4888 /// value. This method ignores uses of other values defined by this operation.
4889 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
4890 assert(Value < getNumValues() && "Bad value!");
4892 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
4893 if (UI.getUse().getResNo() == Value)
4900 /// isOnlyUserOf - Return true if this node is the only use of N.
4902 bool SDNode::isOnlyUserOf(SDNode *N) const {
4904 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
4915 /// isOperand - Return true if this node is an operand of N.
4917 bool SDValue::isOperandOf(SDNode *N) const {
4918 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
4919 if (*this == N->getOperand(i))
4924 bool SDNode::isOperandOf(SDNode *N) const {
4925 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
4926 if (this == N->OperandList[i].getNode())
4931 /// reachesChainWithoutSideEffects - Return true if this operand (which must
4932 /// be a chain) reaches the specified operand without crossing any
4933 /// side-effecting instructions. In practice, this looks through token
4934 /// factors and non-volatile loads. In order to remain efficient, this only
4935 /// looks a couple of nodes in, it does not do an exhaustive search.
4936 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
4937 unsigned Depth) const {
4938 if (*this == Dest) return true;
4940 // Don't search too deeply, we just want to be able to see through
4941 // TokenFactor's etc.
4942 if (Depth == 0) return false;
4944 // If this is a token factor, all inputs to the TF happen in parallel. If any
4945 // of the operands of the TF reach dest, then we can do the xform.
4946 if (getOpcode() == ISD::TokenFactor) {
4947 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
4948 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
4953 // Loads don't have side effects, look through them.
4954 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
4955 if (!Ld->isVolatile())
4956 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
4962 static void findPredecessor(SDNode *N, const SDNode *P, bool &found,
4963 SmallPtrSet<SDNode *, 32> &Visited) {
4964 if (found || !Visited.insert(N))
4967 for (unsigned i = 0, e = N->getNumOperands(); !found && i != e; ++i) {
4968 SDNode *Op = N->getOperand(i).getNode();
4973 findPredecessor(Op, P, found, Visited);
4977 /// isPredecessorOf - Return true if this node is a predecessor of N. This node
4978 /// is either an operand of N or it can be reached by recursively traversing
4979 /// up the operands.
4980 /// NOTE: this is an expensive method. Use it carefully.
4981 bool SDNode::isPredecessorOf(SDNode *N) const {
4982 SmallPtrSet<SDNode *, 32> Visited;
4984 findPredecessor(N, this, found, Visited);
4988 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
4989 assert(Num < NumOperands && "Invalid child # of SDNode!");
4990 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
4993 std::string SDNode::getOperationName(const SelectionDAG *G) const {
4994 switch (getOpcode()) {
4996 if (getOpcode() < ISD::BUILTIN_OP_END)
4997 return "<<Unknown DAG Node>>";
4998 if (isMachineOpcode()) {
5000 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo())
5001 if (getMachineOpcode() < TII->getNumOpcodes())
5002 return TII->get(getMachineOpcode()).getName();
5003 return "<<Unknown Machine Node>>";
5006 const TargetLowering &TLI = G->getTargetLoweringInfo();
5007 const char *Name = TLI.getTargetNodeName(getOpcode());
5008 if (Name) return Name;
5009 return "<<Unknown Target Node>>";
5011 return "<<Unknown Node>>";
5014 case ISD::DELETED_NODE:
5015 return "<<Deleted Node!>>";
5017 case ISD::PREFETCH: return "Prefetch";
5018 case ISD::MEMBARRIER: return "MemBarrier";
5019 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
5020 case ISD::ATOMIC_SWAP: return "AtomicSwap";
5021 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
5022 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
5023 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
5024 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
5025 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
5026 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
5027 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
5028 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
5029 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
5030 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
5031 case ISD::PCMARKER: return "PCMarker";
5032 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
5033 case ISD::SRCVALUE: return "SrcValue";
5034 case ISD::MEMOPERAND: return "MemOperand";
5035 case ISD::EntryToken: return "EntryToken";
5036 case ISD::TokenFactor: return "TokenFactor";
5037 case ISD::AssertSext: return "AssertSext";
5038 case ISD::AssertZext: return "AssertZext";
5040 case ISD::BasicBlock: return "BasicBlock";
5041 case ISD::ARG_FLAGS: return "ArgFlags";
5042 case ISD::VALUETYPE: return "ValueType";
5043 case ISD::Register: return "Register";
5045 case ISD::Constant: return "Constant";
5046 case ISD::ConstantFP: return "ConstantFP";
5047 case ISD::GlobalAddress: return "GlobalAddress";
5048 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
5049 case ISD::FrameIndex: return "FrameIndex";
5050 case ISD::JumpTable: return "JumpTable";
5051 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
5052 case ISD::RETURNADDR: return "RETURNADDR";
5053 case ISD::FRAMEADDR: return "FRAMEADDR";
5054 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
5055 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR";
5056 case ISD::EHSELECTION: return "EHSELECTION";
5057 case ISD::EH_RETURN: return "EH_RETURN";
5058 case ISD::ConstantPool: return "ConstantPool";
5059 case ISD::ExternalSymbol: return "ExternalSymbol";
5060 case ISD::INTRINSIC_WO_CHAIN: {
5061 unsigned IID = cast<ConstantSDNode>(getOperand(0))->getZExtValue();
5062 return Intrinsic::getName((Intrinsic::ID)IID);
5064 case ISD::INTRINSIC_VOID:
5065 case ISD::INTRINSIC_W_CHAIN: {
5066 unsigned IID = cast<ConstantSDNode>(getOperand(1))->getZExtValue();
5067 return Intrinsic::getName((Intrinsic::ID)IID);
5070 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
5071 case ISD::TargetConstant: return "TargetConstant";
5072 case ISD::TargetConstantFP:return "TargetConstantFP";
5073 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
5074 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
5075 case ISD::TargetFrameIndex: return "TargetFrameIndex";
5076 case ISD::TargetJumpTable: return "TargetJumpTable";
5077 case ISD::TargetConstantPool: return "TargetConstantPool";
5078 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
5080 case ISD::CopyToReg: return "CopyToReg";
5081 case ISD::CopyFromReg: return "CopyFromReg";
5082 case ISD::UNDEF: return "undef";
5083 case ISD::MERGE_VALUES: return "merge_values";
5084 case ISD::INLINEASM: return "inlineasm";
5085 case ISD::DBG_LABEL: return "dbg_label";
5086 case ISD::EH_LABEL: return "eh_label";
5087 case ISD::DECLARE: return "declare";
5088 case ISD::HANDLENODE: return "handlenode";
5089 case ISD::FORMAL_ARGUMENTS: return "formal_arguments";
5090 case ISD::CALL: return "call";
5093 case ISD::FABS: return "fabs";
5094 case ISD::FNEG: return "fneg";
5095 case ISD::FSQRT: return "fsqrt";
5096 case ISD::FSIN: return "fsin";
5097 case ISD::FCOS: return "fcos";
5098 case ISD::FPOWI: return "fpowi";
5099 case ISD::FPOW: return "fpow";
5100 case ISD::FTRUNC: return "ftrunc";
5101 case ISD::FFLOOR: return "ffloor";
5102 case ISD::FCEIL: return "fceil";
5103 case ISD::FRINT: return "frint";
5104 case ISD::FNEARBYINT: return "fnearbyint";
5107 case ISD::ADD: return "add";
5108 case ISD::SUB: return "sub";
5109 case ISD::MUL: return "mul";
5110 case ISD::MULHU: return "mulhu";
5111 case ISD::MULHS: return "mulhs";
5112 case ISD::SDIV: return "sdiv";
5113 case ISD::UDIV: return "udiv";
5114 case ISD::SREM: return "srem";
5115 case ISD::UREM: return "urem";
5116 case ISD::SMUL_LOHI: return "smul_lohi";
5117 case ISD::UMUL_LOHI: return "umul_lohi";
5118 case ISD::SDIVREM: return "sdivrem";
5119 case ISD::UDIVREM: return "udivrem";
5120 case ISD::AND: return "and";
5121 case ISD::OR: return "or";
5122 case ISD::XOR: return "xor";
5123 case ISD::SHL: return "shl";
5124 case ISD::SRA: return "sra";
5125 case ISD::SRL: return "srl";
5126 case ISD::ROTL: return "rotl";
5127 case ISD::ROTR: return "rotr";
5128 case ISD::FADD: return "fadd";
5129 case ISD::FSUB: return "fsub";
5130 case ISD::FMUL: return "fmul";
5131 case ISD::FDIV: return "fdiv";
5132 case ISD::FREM: return "frem";
5133 case ISD::FCOPYSIGN: return "fcopysign";
5134 case ISD::FGETSIGN: return "fgetsign";
5136 case ISD::SETCC: return "setcc";
5137 case ISD::VSETCC: return "vsetcc";
5138 case ISD::SELECT: return "select";
5139 case ISD::SELECT_CC: return "select_cc";
5140 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
5141 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
5142 case ISD::CONCAT_VECTORS: return "concat_vectors";
5143 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
5144 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
5145 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
5146 case ISD::CARRY_FALSE: return "carry_false";
5147 case ISD::ADDC: return "addc";
5148 case ISD::ADDE: return "adde";
5149 case ISD::SADDO: return "saddo";
5150 case ISD::UADDO: return "uaddo";
5151 case ISD::SSUBO: return "ssubo";
5152 case ISD::USUBO: return "usubo";
5153 case ISD::SMULO: return "smulo";
5154 case ISD::UMULO: return "umulo";
5155 case ISD::SUBC: return "subc";
5156 case ISD::SUBE: return "sube";
5157 case ISD::SHL_PARTS: return "shl_parts";
5158 case ISD::SRA_PARTS: return "sra_parts";
5159 case ISD::SRL_PARTS: return "srl_parts";
5161 // Conversion operators.
5162 case ISD::SIGN_EXTEND: return "sign_extend";
5163 case ISD::ZERO_EXTEND: return "zero_extend";
5164 case ISD::ANY_EXTEND: return "any_extend";
5165 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
5166 case ISD::TRUNCATE: return "truncate";
5167 case ISD::FP_ROUND: return "fp_round";
5168 case ISD::FLT_ROUNDS_: return "flt_rounds";
5169 case ISD::FP_ROUND_INREG: return "fp_round_inreg";
5170 case ISD::FP_EXTEND: return "fp_extend";
5172 case ISD::SINT_TO_FP: return "sint_to_fp";
5173 case ISD::UINT_TO_FP: return "uint_to_fp";
5174 case ISD::FP_TO_SINT: return "fp_to_sint";
5175 case ISD::FP_TO_UINT: return "fp_to_uint";
5176 case ISD::BIT_CONVERT: return "bit_convert";
5178 case ISD::CONVERT_RNDSAT: {
5179 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) {
5180 default: assert(0 && "Unknown cvt code!");
5181 case ISD::CVT_FF: return "cvt_ff";
5182 case ISD::CVT_FS: return "cvt_fs";
5183 case ISD::CVT_FU: return "cvt_fu";
5184 case ISD::CVT_SF: return "cvt_sf";
5185 case ISD::CVT_UF: return "cvt_uf";
5186 case ISD::CVT_SS: return "cvt_ss";
5187 case ISD::CVT_SU: return "cvt_su";
5188 case ISD::CVT_US: return "cvt_us";
5189 case ISD::CVT_UU: return "cvt_uu";
5193 // Control flow instructions
5194 case ISD::BR: return "br";
5195 case ISD::BRIND: return "brind";
5196 case ISD::BR_JT: return "br_jt";
5197 case ISD::BRCOND: return "brcond";
5198 case ISD::BR_CC: return "br_cc";
5199 case ISD::RET: return "ret";
5200 case ISD::CALLSEQ_START: return "callseq_start";
5201 case ISD::CALLSEQ_END: return "callseq_end";
5204 case ISD::LOAD: return "load";
5205 case ISD::STORE: return "store";
5206 case ISD::VAARG: return "vaarg";
5207 case ISD::VACOPY: return "vacopy";
5208 case ISD::VAEND: return "vaend";
5209 case ISD::VASTART: return "vastart";
5210 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
5211 case ISD::EXTRACT_ELEMENT: return "extract_element";
5212 case ISD::BUILD_PAIR: return "build_pair";
5213 case ISD::STACKSAVE: return "stacksave";
5214 case ISD::STACKRESTORE: return "stackrestore";
5215 case ISD::TRAP: return "trap";
5218 case ISD::BSWAP: return "bswap";
5219 case ISD::CTPOP: return "ctpop";
5220 case ISD::CTTZ: return "cttz";
5221 case ISD::CTLZ: return "ctlz";
5224 case ISD::DBG_STOPPOINT: return "dbg_stoppoint";
5225 case ISD::DEBUG_LOC: return "debug_loc";
5228 case ISD::TRAMPOLINE: return "trampoline";
5231 switch (cast<CondCodeSDNode>(this)->get()) {
5232 default: assert(0 && "Unknown setcc condition!");
5233 case ISD::SETOEQ: return "setoeq";
5234 case ISD::SETOGT: return "setogt";
5235 case ISD::SETOGE: return "setoge";
5236 case ISD::SETOLT: return "setolt";
5237 case ISD::SETOLE: return "setole";
5238 case ISD::SETONE: return "setone";
5240 case ISD::SETO: return "seto";
5241 case ISD::SETUO: return "setuo";
5242 case ISD::SETUEQ: return "setue";
5243 case ISD::SETUGT: return "setugt";
5244 case ISD::SETUGE: return "setuge";
5245 case ISD::SETULT: return "setult";
5246 case ISD::SETULE: return "setule";
5247 case ISD::SETUNE: return "setune";
5249 case ISD::SETEQ: return "seteq";
5250 case ISD::SETGT: return "setgt";
5251 case ISD::SETGE: return "setge";
5252 case ISD::SETLT: return "setlt";
5253 case ISD::SETLE: return "setle";
5254 case ISD::SETNE: return "setne";
5259 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
5268 return "<post-inc>";
5270 return "<post-dec>";
5274 std::string ISD::ArgFlagsTy::getArgFlagsString() {
5275 std::string S = "< ";
5289 if (getByValAlign())
5290 S += "byval-align:" + utostr(getByValAlign()) + " ";
5292 S += "orig-align:" + utostr(getOrigAlign()) + " ";
5294 S += "byval-size:" + utostr(getByValSize()) + " ";
5298 void SDNode::dump() const { dump(0); }
5299 void SDNode::dump(const SelectionDAG *G) const {
5303 void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const {
5304 OS << (void*)this << ": ";
5306 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
5308 if (getValueType(i) == MVT::Other)
5311 OS << getValueType(i).getMVTString();
5313 OS << " = " << getOperationName(G);
5316 void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const {
5317 if (!isTargetOpcode() && getOpcode() == ISD::VECTOR_SHUFFLE) {
5318 SDNode *Mask = getOperand(2).getNode();
5320 for (unsigned i = 0, e = Mask->getNumOperands(); i != e; ++i) {
5322 if (Mask->getOperand(i).getOpcode() == ISD::UNDEF)
5325 OS << cast<ConstantSDNode>(Mask->getOperand(i))->getZExtValue();
5330 if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
5331 OS << '<' << CSDN->getAPIntValue() << '>';
5332 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
5333 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle)
5334 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
5335 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble)
5336 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
5339 CSDN->getValueAPF().bitcastToAPInt().dump();
5342 } else if (const GlobalAddressSDNode *GADN =
5343 dyn_cast<GlobalAddressSDNode>(this)) {
5344 int64_t offset = GADN->getOffset();
5346 WriteAsOperand(OS, GADN->getGlobal());
5349 OS << " + " << offset;
5351 OS << " " << offset;
5352 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
5353 OS << "<" << FIDN->getIndex() << ">";
5354 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
5355 OS << "<" << JTDN->getIndex() << ">";
5356 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
5357 int offset = CP->getOffset();
5358 if (CP->isMachineConstantPoolEntry())
5359 OS << "<" << *CP->getMachineCPVal() << ">";
5361 OS << "<" << *CP->getConstVal() << ">";
5363 OS << " + " << offset;
5365 OS << " " << offset;
5366 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
5368 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
5370 OS << LBB->getName() << " ";
5371 OS << (const void*)BBDN->getBasicBlock() << ">";
5372 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
5373 if (G && R->getReg() &&
5374 TargetRegisterInfo::isPhysicalRegister(R->getReg())) {
5375 OS << " " << G->getTarget().getRegisterInfo()->getName(R->getReg());
5377 OS << " #" << R->getReg();
5379 } else if (const ExternalSymbolSDNode *ES =
5380 dyn_cast<ExternalSymbolSDNode>(this)) {
5381 OS << "'" << ES->getSymbol() << "'";
5382 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
5384 OS << "<" << M->getValue() << ">";
5387 } else if (const MemOperandSDNode *M = dyn_cast<MemOperandSDNode>(this)) {
5388 if (M->MO.getValue())
5389 OS << "<" << M->MO.getValue() << ":" << M->MO.getOffset() << ">";
5391 OS << "<null:" << M->MO.getOffset() << ">";
5392 } else if (const ARG_FLAGSSDNode *N = dyn_cast<ARG_FLAGSSDNode>(this)) {
5393 OS << N->getArgFlags().getArgFlagsString();
5394 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
5395 OS << ":" << N->getVT().getMVTString();
5397 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
5398 const Value *SrcValue = LD->getSrcValue();
5399 int SrcOffset = LD->getSrcValueOffset();
5405 OS << ":" << SrcOffset << ">";
5408 switch (LD->getExtensionType()) {
5409 default: doExt = false; break;
5410 case ISD::EXTLOAD: OS << " <anyext "; break;
5411 case ISD::SEXTLOAD: OS << " <sext "; break;
5412 case ISD::ZEXTLOAD: OS << " <zext "; break;
5415 OS << LD->getMemoryVT().getMVTString() << ">";
5417 const char *AM = getIndexedModeName(LD->getAddressingMode());
5420 if (LD->isVolatile())
5421 OS << " <volatile>";
5422 OS << " alignment=" << LD->getAlignment();
5423 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
5424 const Value *SrcValue = ST->getSrcValue();
5425 int SrcOffset = ST->getSrcValueOffset();
5431 OS << ":" << SrcOffset << ">";
5433 if (ST->isTruncatingStore())
5434 OS << " <trunc " << ST->getMemoryVT().getMVTString() << ">";
5436 const char *AM = getIndexedModeName(ST->getAddressingMode());
5439 if (ST->isVolatile())
5440 OS << " <volatile>";
5441 OS << " alignment=" << ST->getAlignment();
5442 } else if (const AtomicSDNode* AT = dyn_cast<AtomicSDNode>(this)) {
5443 const Value *SrcValue = AT->getSrcValue();
5444 int SrcOffset = AT->getSrcValueOffset();
5450 OS << ":" << SrcOffset << ">";
5451 if (AT->isVolatile())
5452 OS << " <volatile>";
5453 OS << " alignment=" << AT->getAlignment();
5457 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
5460 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
5462 OS << (void*)getOperand(i).getNode();
5463 if (unsigned RN = getOperand(i).getResNo())
5466 print_details(OS, G);
5469 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
5470 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5471 if (N->getOperand(i).getNode()->hasOneUse())
5472 DumpNodes(N->getOperand(i).getNode(), indent+2, G);
5474 cerr << "\n" << std::string(indent+2, ' ')
5475 << (void*)N->getOperand(i).getNode() << ": <multiple use>";
5478 cerr << "\n" << std::string(indent, ' ');
5482 void SelectionDAG::dump() const {
5483 cerr << "SelectionDAG has " << AllNodes.size() << " nodes:";
5485 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end();
5487 const SDNode *N = I;
5488 if (!N->hasOneUse() && N != getRoot().getNode())
5489 DumpNodes(N, 2, this);
5492 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
5497 void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
5499 print_details(OS, G);
5502 typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet;
5503 static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
5504 const SelectionDAG *G, VisitedSDNodeSet &once) {
5505 if (!once.insert(N)) // If we've been here before, return now.
5507 // Dump the current SDNode, but don't end the line yet.
5508 OS << std::string(indent, ' ');
5510 // Having printed this SDNode, walk the children:
5511 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
5512 const SDNode *child = N->getOperand(i).getNode();
5515 if (child->getNumOperands() == 0) {
5516 // This child has no grandchildren; print it inline right here.
5517 child->printr(OS, G);
5519 } else { // Just the address. FIXME: also print the child's opcode
5521 if (unsigned RN = N->getOperand(i).getResNo())
5526 // Dump children that have grandchildren on their own line(s).
5527 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
5528 const SDNode *child = N->getOperand(i).getNode();
5529 DumpNodesr(OS, child, indent+2, G, once);
5533 void SDNode::dumpr() const {
5534 VisitedSDNodeSet once;
5535 DumpNodesr(errs(), this, 0, 0, once);
5538 const Type *ConstantPoolSDNode::getType() const {
5539 if (isMachineConstantPoolEntry())
5540 return Val.MachineCPVal->getType();
5541 return Val.ConstVal->getType();
5544 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
5546 unsigned &SplatBitSize,
5548 unsigned MinSplatBits) {
5549 MVT VT = getValueType(0);
5550 assert(VT.isVector() && "Expected a vector type");
5551 unsigned sz = VT.getSizeInBits();
5552 if (MinSplatBits > sz)
5555 SplatValue = APInt(sz, 0);
5556 SplatUndef = APInt(sz, 0);
5558 // Get the bits. Bits with undefined values (when the corresponding element
5559 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
5560 // in SplatValue. If any of the values are not constant, give up and return
5562 unsigned int nOps = getNumOperands();
5563 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
5564 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
5565 for (unsigned i = 0; i < nOps; ++i) {
5566 SDValue OpVal = getOperand(i);
5567 unsigned BitPos = i * EltBitSize;
5569 if (OpVal.getOpcode() == ISD::UNDEF)
5570 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos +EltBitSize);
5571 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
5572 SplatValue |= APInt(CN->getAPIntValue()).zextOrTrunc(sz) << BitPos;
5573 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
5574 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
5579 // The build_vector is all constants or undefs. Find the smallest element
5580 // size that splats the vector.
5582 HasAnyUndefs = (SplatUndef != 0);
5585 unsigned HalfSize = sz / 2;
5586 APInt HighValue = APInt(SplatValue).lshr(HalfSize).trunc(HalfSize);
5587 APInt LowValue = APInt(SplatValue).trunc(HalfSize);
5588 APInt HighUndef = APInt(SplatUndef).lshr(HalfSize).trunc(HalfSize);
5589 APInt LowUndef = APInt(SplatUndef).trunc(HalfSize);
5591 // If the two halves do not match (ignoring undef bits), stop here.
5592 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
5593 MinSplatBits > HalfSize)
5596 SplatValue = HighValue | LowValue;
5597 SplatUndef = HighUndef & LowUndef;