1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
13 #include "llvm/CodeGen/SelectionDAG.h"
14 #include "llvm/Constants.h"
15 #include "llvm/Analysis/ValueTracking.h"
16 #include "llvm/GlobalAlias.h"
17 #include "llvm/GlobalVariable.h"
18 #include "llvm/Intrinsics.h"
19 #include "llvm/DerivedTypes.h"
20 #include "llvm/Assembly/Writer.h"
21 #include "llvm/CallingConv.h"
22 #include "llvm/CodeGen/MachineBasicBlock.h"
23 #include "llvm/CodeGen/MachineConstantPool.h"
24 #include "llvm/CodeGen/MachineFrameInfo.h"
25 #include "llvm/CodeGen/MachineModuleInfo.h"
26 #include "llvm/CodeGen/PseudoSourceValue.h"
27 #include "llvm/Target/TargetRegisterInfo.h"
28 #include "llvm/Target/TargetData.h"
29 #include "llvm/Target/TargetLowering.h"
30 #include "llvm/Target/TargetOptions.h"
31 #include "llvm/Target/TargetInstrInfo.h"
32 #include "llvm/Target/TargetMachine.h"
33 #include "llvm/Support/CommandLine.h"
34 #include "llvm/Support/MathExtras.h"
35 #include "llvm/Support/raw_ostream.h"
36 #include "llvm/ADT/SetVector.h"
37 #include "llvm/ADT/SmallPtrSet.h"
38 #include "llvm/ADT/SmallSet.h"
39 #include "llvm/ADT/SmallVector.h"
40 #include "llvm/ADT/StringExtras.h"
45 /// makeVTList - Return an instance of the SDVTList struct initialized with the
46 /// specified members.
47 static SDVTList makeVTList(const MVT *VTs, unsigned NumVTs) {
48 SDVTList Res = {VTs, NumVTs};
52 static const fltSemantics *MVTToAPFloatSemantics(MVT VT) {
53 switch (VT.getSimpleVT()) {
54 default: assert(0 && "Unknown FP format");
55 case MVT::f32: return &APFloat::IEEEsingle;
56 case MVT::f64: return &APFloat::IEEEdouble;
57 case MVT::f80: return &APFloat::x87DoubleExtended;
58 case MVT::f128: return &APFloat::IEEEquad;
59 case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
63 SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {}
65 //===----------------------------------------------------------------------===//
66 // ConstantFPSDNode Class
67 //===----------------------------------------------------------------------===//
69 /// isExactlyValue - We don't rely on operator== working on double values, as
70 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
71 /// As such, this method can be used to do an exact bit-for-bit comparison of
72 /// two floating point values.
73 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
74 return getValueAPF().bitwiseIsEqual(V);
77 bool ConstantFPSDNode::isValueValidForType(MVT VT,
79 assert(VT.isFloatingPoint() && "Can only convert between FP types");
81 // PPC long double cannot be converted to any other type.
82 if (VT == MVT::ppcf128 ||
83 &Val.getSemantics() == &APFloat::PPCDoubleDouble)
86 // convert modifies in place, so make a copy.
87 APFloat Val2 = APFloat(Val);
89 (void) Val2.convert(*MVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
94 //===----------------------------------------------------------------------===//
96 //===----------------------------------------------------------------------===//
98 /// isBuildVectorAllOnes - Return true if the specified node is a
99 /// BUILD_VECTOR where all of the elements are ~0 or undef.
100 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
101 // Look through a bit convert.
102 if (N->getOpcode() == ISD::BIT_CONVERT)
103 N = N->getOperand(0).getNode();
105 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
107 unsigned i = 0, e = N->getNumOperands();
109 // Skip over all of the undef values.
110 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
113 // Do not accept an all-undef vector.
114 if (i == e) return false;
116 // Do not accept build_vectors that aren't all constants or which have non-~0
118 SDValue NotZero = N->getOperand(i);
119 if (isa<ConstantSDNode>(NotZero)) {
120 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue())
122 } else if (isa<ConstantFPSDNode>(NotZero)) {
123 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF().
124 bitcastToAPInt().isAllOnesValue())
129 // Okay, we have at least one ~0 value, check to see if the rest match or are
131 for (++i; i != e; ++i)
132 if (N->getOperand(i) != NotZero &&
133 N->getOperand(i).getOpcode() != ISD::UNDEF)
139 /// isBuildVectorAllZeros - Return true if the specified node is a
140 /// BUILD_VECTOR where all of the elements are 0 or undef.
141 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
142 // Look through a bit convert.
143 if (N->getOpcode() == ISD::BIT_CONVERT)
144 N = N->getOperand(0).getNode();
146 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
148 unsigned i = 0, e = N->getNumOperands();
150 // Skip over all of the undef values.
151 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
154 // Do not accept an all-undef vector.
155 if (i == e) return false;
157 // Do not accept build_vectors that aren't all constants or which have non-~0
159 SDValue Zero = N->getOperand(i);
160 if (isa<ConstantSDNode>(Zero)) {
161 if (!cast<ConstantSDNode>(Zero)->isNullValue())
163 } else if (isa<ConstantFPSDNode>(Zero)) {
164 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero())
169 // Okay, we have at least one ~0 value, check to see if the rest match or are
171 for (++i; i != e; ++i)
172 if (N->getOperand(i) != Zero &&
173 N->getOperand(i).getOpcode() != ISD::UNDEF)
178 /// isScalarToVector - Return true if the specified node is a
179 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
180 /// element is not an undef.
181 bool ISD::isScalarToVector(const SDNode *N) {
182 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
185 if (N->getOpcode() != ISD::BUILD_VECTOR)
187 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
189 unsigned NumElems = N->getNumOperands();
190 for (unsigned i = 1; i < NumElems; ++i) {
191 SDValue V = N->getOperand(i);
192 if (V.getOpcode() != ISD::UNDEF)
199 /// isDebugLabel - Return true if the specified node represents a debug
200 /// label (i.e. ISD::DBG_LABEL or TargetInstrInfo::DBG_LABEL node).
201 bool ISD::isDebugLabel(const SDNode *N) {
203 if (N->getOpcode() == ISD::DBG_LABEL)
205 if (N->isMachineOpcode() &&
206 N->getMachineOpcode() == TargetInstrInfo::DBG_LABEL)
211 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
212 /// when given the operation for (X op Y).
213 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
214 // To perform this operation, we just need to swap the L and G bits of the
216 unsigned OldL = (Operation >> 2) & 1;
217 unsigned OldG = (Operation >> 1) & 1;
218 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
219 (OldL << 1) | // New G bit
220 (OldG << 2)); // New L bit.
223 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
224 /// 'op' is a valid SetCC operation.
225 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
226 unsigned Operation = Op;
228 Operation ^= 7; // Flip L, G, E bits, but not U.
230 Operation ^= 15; // Flip all of the condition bits.
232 if (Operation > ISD::SETTRUE2)
233 Operation &= ~8; // Don't let N and U bits get set.
235 return ISD::CondCode(Operation);
239 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
240 /// signed operation and 2 if the result is an unsigned comparison. Return zero
241 /// if the operation does not depend on the sign of the input (setne and seteq).
242 static int isSignedOp(ISD::CondCode Opcode) {
244 default: assert(0 && "Illegal integer setcc operation!");
246 case ISD::SETNE: return 0;
250 case ISD::SETGE: return 1;
254 case ISD::SETUGE: return 2;
258 /// getSetCCOrOperation - Return the result of a logical OR between different
259 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
260 /// returns SETCC_INVALID if it is not possible to represent the resultant
262 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
264 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
265 // Cannot fold a signed integer setcc with an unsigned integer setcc.
266 return ISD::SETCC_INVALID;
268 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
270 // If the N and U bits get set then the resultant comparison DOES suddenly
271 // care about orderedness, and is true when ordered.
272 if (Op > ISD::SETTRUE2)
273 Op &= ~16; // Clear the U bit if the N bit is set.
275 // Canonicalize illegal integer setcc's.
276 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
279 return ISD::CondCode(Op);
282 /// getSetCCAndOperation - Return the result of a logical AND between different
283 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
284 /// function returns zero if it is not possible to represent the resultant
286 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
288 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
289 // Cannot fold a signed setcc with an unsigned setcc.
290 return ISD::SETCC_INVALID;
292 // Combine all of the condition bits.
293 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
295 // Canonicalize illegal integer setcc's.
299 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
300 case ISD::SETOEQ: // SETEQ & SETU[LG]E
301 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
302 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
303 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
310 const TargetMachine &SelectionDAG::getTarget() const {
311 return MF->getTarget();
314 //===----------------------------------------------------------------------===//
315 // SDNode Profile Support
316 //===----------------------------------------------------------------------===//
318 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
320 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
324 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
325 /// solely with their pointer.
326 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
327 ID.AddPointer(VTList.VTs);
330 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
332 static void AddNodeIDOperands(FoldingSetNodeID &ID,
333 const SDValue *Ops, unsigned NumOps) {
334 for (; NumOps; --NumOps, ++Ops) {
335 ID.AddPointer(Ops->getNode());
336 ID.AddInteger(Ops->getResNo());
340 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
342 static void AddNodeIDOperands(FoldingSetNodeID &ID,
343 const SDUse *Ops, unsigned NumOps) {
344 for (; NumOps; --NumOps, ++Ops) {
345 ID.AddPointer(Ops->getNode());
346 ID.AddInteger(Ops->getResNo());
350 static void AddNodeIDNode(FoldingSetNodeID &ID,
351 unsigned short OpC, SDVTList VTList,
352 const SDValue *OpList, unsigned N) {
353 AddNodeIDOpcode(ID, OpC);
354 AddNodeIDValueTypes(ID, VTList);
355 AddNodeIDOperands(ID, OpList, N);
358 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
360 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
361 switch (N->getOpcode()) {
362 default: break; // Normal nodes don't need extra info.
364 ID.AddInteger(cast<ARG_FLAGSSDNode>(N)->getArgFlags().getRawBits());
366 case ISD::TargetConstant:
368 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
370 case ISD::TargetConstantFP:
371 case ISD::ConstantFP: {
372 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
375 case ISD::TargetGlobalAddress:
376 case ISD::GlobalAddress:
377 case ISD::TargetGlobalTLSAddress:
378 case ISD::GlobalTLSAddress: {
379 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
380 ID.AddPointer(GA->getGlobal());
381 ID.AddInteger(GA->getOffset());
384 case ISD::BasicBlock:
385 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
388 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
390 case ISD::DBG_STOPPOINT: {
391 const DbgStopPointSDNode *DSP = cast<DbgStopPointSDNode>(N);
392 ID.AddInteger(DSP->getLine());
393 ID.AddInteger(DSP->getColumn());
394 ID.AddPointer(DSP->getCompileUnit());
398 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
400 case ISD::MEMOPERAND: {
401 const MachineMemOperand &MO = cast<MemOperandSDNode>(N)->MO;
405 case ISD::FrameIndex:
406 case ISD::TargetFrameIndex:
407 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
410 case ISD::TargetJumpTable:
411 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
413 case ISD::ConstantPool:
414 case ISD::TargetConstantPool: {
415 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
416 ID.AddInteger(CP->getAlignment());
417 ID.AddInteger(CP->getOffset());
418 if (CP->isMachineConstantPoolEntry())
419 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID);
421 ID.AddPointer(CP->getConstVal());
425 const CallSDNode *Call = cast<CallSDNode>(N);
426 ID.AddInteger(Call->getCallingConv());
427 ID.AddInteger(Call->isVarArg());
431 const LoadSDNode *LD = cast<LoadSDNode>(N);
432 ID.AddInteger(LD->getMemoryVT().getRawBits());
433 ID.AddInteger(LD->getRawSubclassData());
437 const StoreSDNode *ST = cast<StoreSDNode>(N);
438 ID.AddInteger(ST->getMemoryVT().getRawBits());
439 ID.AddInteger(ST->getRawSubclassData());
442 case ISD::ATOMIC_CMP_SWAP:
443 case ISD::ATOMIC_SWAP:
444 case ISD::ATOMIC_LOAD_ADD:
445 case ISD::ATOMIC_LOAD_SUB:
446 case ISD::ATOMIC_LOAD_AND:
447 case ISD::ATOMIC_LOAD_OR:
448 case ISD::ATOMIC_LOAD_XOR:
449 case ISD::ATOMIC_LOAD_NAND:
450 case ISD::ATOMIC_LOAD_MIN:
451 case ISD::ATOMIC_LOAD_MAX:
452 case ISD::ATOMIC_LOAD_UMIN:
453 case ISD::ATOMIC_LOAD_UMAX: {
454 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
455 ID.AddInteger(AT->getMemoryVT().getRawBits());
456 ID.AddInteger(AT->getRawSubclassData());
459 } // end switch (N->getOpcode())
462 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
464 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
465 AddNodeIDOpcode(ID, N->getOpcode());
466 // Add the return value info.
467 AddNodeIDValueTypes(ID, N->getVTList());
468 // Add the operand info.
469 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
471 // Handle SDNode leafs with special info.
472 AddNodeIDCustom(ID, N);
475 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
476 /// the CSE map that carries alignment, volatility, indexing mode, and
477 /// extension/truncation information.
479 static inline unsigned
480 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM,
481 bool isVolatile, unsigned Alignment) {
482 assert((ConvType & 3) == ConvType &&
483 "ConvType may not require more than 2 bits!");
484 assert((AM & 7) == AM &&
485 "AM may not require more than 3 bits!");
489 ((Log2_32(Alignment) + 1) << 6);
492 //===----------------------------------------------------------------------===//
493 // SelectionDAG Class
494 //===----------------------------------------------------------------------===//
496 /// doNotCSE - Return true if CSE should not be performed for this node.
497 static bool doNotCSE(SDNode *N) {
498 if (N->getValueType(0) == MVT::Flag)
499 return true; // Never CSE anything that produces a flag.
501 switch (N->getOpcode()) {
503 case ISD::HANDLENODE:
505 case ISD::DBG_STOPPOINT:
508 return true; // Never CSE these nodes.
511 // Check that remaining values produced are not flags.
512 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
513 if (N->getValueType(i) == MVT::Flag)
514 return true; // Never CSE anything that produces a flag.
519 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
521 void SelectionDAG::RemoveDeadNodes() {
522 // Create a dummy node (which is not added to allnodes), that adds a reference
523 // to the root node, preventing it from being deleted.
524 HandleSDNode Dummy(getRoot());
526 SmallVector<SDNode*, 128> DeadNodes;
528 // Add all obviously-dead nodes to the DeadNodes worklist.
529 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
531 DeadNodes.push_back(I);
533 RemoveDeadNodes(DeadNodes);
535 // If the root changed (e.g. it was a dead load, update the root).
536 setRoot(Dummy.getValue());
539 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
540 /// given list, and any nodes that become unreachable as a result.
541 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes,
542 DAGUpdateListener *UpdateListener) {
544 // Process the worklist, deleting the nodes and adding their uses to the
546 while (!DeadNodes.empty()) {
547 SDNode *N = DeadNodes.pop_back_val();
550 UpdateListener->NodeDeleted(N, 0);
552 // Take the node out of the appropriate CSE map.
553 RemoveNodeFromCSEMaps(N);
555 // Next, brutally remove the operand list. This is safe to do, as there are
556 // no cycles in the graph.
557 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
559 SDNode *Operand = Use.getNode();
562 // Now that we removed this operand, see if there are no uses of it left.
563 if (Operand->use_empty())
564 DeadNodes.push_back(Operand);
571 void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){
572 SmallVector<SDNode*, 16> DeadNodes(1, N);
573 RemoveDeadNodes(DeadNodes, UpdateListener);
576 void SelectionDAG::DeleteNode(SDNode *N) {
577 // First take this out of the appropriate CSE map.
578 RemoveNodeFromCSEMaps(N);
580 // Finally, remove uses due to operands of this node, remove from the
581 // AllNodes list, and delete the node.
582 DeleteNodeNotInCSEMaps(N);
585 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
586 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
587 assert(N->use_empty() && "Cannot delete a node that is not dead!");
589 // Drop all of the operands and decrement used node's use counts.
595 void SelectionDAG::DeallocateNode(SDNode *N) {
596 if (N->OperandsNeedDelete)
597 delete[] N->OperandList;
599 // Set the opcode to DELETED_NODE to help catch bugs when node
600 // memory is reallocated.
601 N->NodeType = ISD::DELETED_NODE;
603 NodeAllocator.Deallocate(AllNodes.remove(N));
606 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
607 /// correspond to it. This is useful when we're about to delete or repurpose
608 /// the node. We don't want future request for structurally identical nodes
609 /// to return N anymore.
610 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
612 switch (N->getOpcode()) {
613 case ISD::EntryToken:
614 assert(0 && "EntryToken should not be in CSEMaps!");
616 case ISD::HANDLENODE: return false; // noop.
618 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
619 "Cond code doesn't exist!");
620 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
621 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
623 case ISD::ExternalSymbol:
624 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
626 case ISD::TargetExternalSymbol:
628 TargetExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
630 case ISD::VALUETYPE: {
631 MVT VT = cast<VTSDNode>(N)->getVT();
632 if (VT.isExtended()) {
633 Erased = ExtendedValueTypeNodes.erase(VT);
635 Erased = ValueTypeNodes[VT.getSimpleVT()] != 0;
636 ValueTypeNodes[VT.getSimpleVT()] = 0;
641 // Remove it from the CSE Map.
642 Erased = CSEMap.RemoveNode(N);
646 // Verify that the node was actually in one of the CSE maps, unless it has a
647 // flag result (which cannot be CSE'd) or is one of the special cases that are
648 // not subject to CSE.
649 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag &&
650 !N->isMachineOpcode() && !doNotCSE(N)) {
653 assert(0 && "Node is not in map!");
659 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
660 /// maps and modified in place. Add it back to the CSE maps, unless an identical
661 /// node already exists, in which case transfer all its users to the existing
662 /// node. This transfer can potentially trigger recursive merging.
665 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N,
666 DAGUpdateListener *UpdateListener) {
667 // For node types that aren't CSE'd, just act as if no identical node
670 SDNode *Existing = CSEMap.GetOrInsertNode(N);
672 // If there was already an existing matching node, use ReplaceAllUsesWith
673 // to replace the dead one with the existing one. This can cause
674 // recursive merging of other unrelated nodes down the line.
675 ReplaceAllUsesWith(N, Existing, UpdateListener);
677 // N is now dead. Inform the listener if it exists and delete it.
679 UpdateListener->NodeDeleted(N, Existing);
680 DeleteNodeNotInCSEMaps(N);
685 // If the node doesn't already exist, we updated it. Inform a listener if
688 UpdateListener->NodeUpdated(N);
691 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
692 /// were replaced with those specified. If this node is never memoized,
693 /// return null, otherwise return a pointer to the slot it would take. If a
694 /// node already exists with these operands, the slot will be non-null.
695 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
700 SDValue Ops[] = { Op };
702 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
703 AddNodeIDCustom(ID, N);
704 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
707 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
708 /// were replaced with those specified. If this node is never memoized,
709 /// return null, otherwise return a pointer to the slot it would take. If a
710 /// node already exists with these operands, the slot will be non-null.
711 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
712 SDValue Op1, SDValue Op2,
717 SDValue Ops[] = { Op1, Op2 };
719 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
720 AddNodeIDCustom(ID, N);
721 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
725 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
726 /// were replaced with those specified. If this node is never memoized,
727 /// return null, otherwise return a pointer to the slot it would take. If a
728 /// node already exists with these operands, the slot will be non-null.
729 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
730 const SDValue *Ops,unsigned NumOps,
736 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
737 AddNodeIDCustom(ID, N);
738 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
741 /// VerifyNode - Sanity check the given node. Aborts if it is invalid.
742 void SelectionDAG::VerifyNode(SDNode *N) {
743 switch (N->getOpcode()) {
746 case ISD::BUILD_PAIR: {
747 MVT VT = N->getValueType(0);
748 assert(N->getNumValues() == 1 && "Too many results!");
749 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
750 "Wrong return type!");
751 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
752 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
753 "Mismatched operand types!");
754 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
755 "Wrong operand type!");
756 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
757 "Wrong return type size");
760 case ISD::BUILD_VECTOR: {
761 assert(N->getNumValues() == 1 && "Too many results!");
762 assert(N->getValueType(0).isVector() && "Wrong return type!");
763 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
764 "Wrong number of operands!");
765 // FIXME: Change vector_shuffle to a variadic node with mask elements being
766 // operands of the node. Currently the mask is a BUILD_VECTOR passed as an
767 // operand, and it is not always possible to legalize it. Turning off the
768 // following checks at least makes it possible to legalize most of the time.
769 // MVT EltVT = N->getValueType(0).getVectorElementType();
770 // for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I)
771 // assert((I->getValueType() == EltVT ||
772 // I->getValueType() == TLI.getTypeToTransformTo(EltVT)) &&
773 // "Wrong operand type!");
779 /// getMVTAlignment - Compute the default alignment value for the
782 unsigned SelectionDAG::getMVTAlignment(MVT VT) const {
783 const Type *Ty = VT == MVT::iPTR ?
784 PointerType::get(Type::Int8Ty, 0) :
787 return TLI.getTargetData()->getABITypeAlignment(Ty);
790 // EntryNode could meaningfully have debug info if we can find it...
791 SelectionDAG::SelectionDAG(TargetLowering &tli, FunctionLoweringInfo &fli)
792 : TLI(tli), FLI(fli), DW(0),
793 EntryNode(ISD::EntryToken, DebugLoc::getUnknownLoc(),
794 getVTList(MVT::Other)), Root(getEntryNode()) {
795 AllNodes.push_back(&EntryNode);
798 void SelectionDAG::init(MachineFunction &mf, MachineModuleInfo *mmi,
805 SelectionDAG::~SelectionDAG() {
809 void SelectionDAG::allnodes_clear() {
810 assert(&*AllNodes.begin() == &EntryNode);
811 AllNodes.remove(AllNodes.begin());
812 while (!AllNodes.empty())
813 DeallocateNode(AllNodes.begin());
816 void SelectionDAG::clear() {
818 OperandAllocator.Reset();
821 ExtendedValueTypeNodes.clear();
822 ExternalSymbols.clear();
823 TargetExternalSymbols.clear();
824 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
825 static_cast<CondCodeSDNode*>(0));
826 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
827 static_cast<SDNode*>(0));
829 EntryNode.UseList = 0;
830 AllNodes.push_back(&EntryNode);
831 Root = getEntryNode();
834 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, MVT VT) {
835 if (Op.getValueType() == VT) return Op;
836 APInt Imm = APInt::getLowBitsSet(Op.getValueSizeInBits(),
838 return getNode(ISD::AND, DL, Op.getValueType(), Op,
839 getConstant(Imm, Op.getValueType()));
842 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
844 SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, MVT VT) {
847 MVT EltVT = VT.getVectorElementType();
849 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), EltVT);
850 std::vector<SDValue> NegOnes(VT.getVectorNumElements(), NegOneElt);
851 NegOne = getNode(ISD::BUILD_VECTOR, DL, VT, &NegOnes[0], NegOnes.size());
853 NegOne = getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
855 return getNode(ISD::XOR, DL, VT, Val, NegOne);
858 SDValue SelectionDAG::getConstant(uint64_t Val, MVT VT, bool isT) {
859 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
860 assert((EltVT.getSizeInBits() >= 64 ||
861 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
862 "getConstant with a uint64_t value that doesn't fit in the type!");
863 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
866 SDValue SelectionDAG::getConstant(const APInt &Val, MVT VT, bool isT) {
867 return getConstant(*ConstantInt::get(Val), VT, isT);
870 SDValue SelectionDAG::getConstant(const ConstantInt &Val, MVT VT, bool isT) {
871 assert(VT.isInteger() && "Cannot create FP integer constant!");
873 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
874 assert(Val.getBitWidth() == EltVT.getSizeInBits() &&
875 "APInt size does not match type size!");
877 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
879 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
883 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
885 return SDValue(N, 0);
887 N = NodeAllocator.Allocate<ConstantSDNode>();
888 new (N) ConstantSDNode(isT, &Val, EltVT);
889 CSEMap.InsertNode(N, IP);
890 AllNodes.push_back(N);
893 SDValue Result(N, 0);
895 SmallVector<SDValue, 8> Ops;
896 Ops.assign(VT.getVectorNumElements(), Result);
897 Result = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(),
898 VT, &Ops[0], Ops.size());
903 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
904 return getConstant(Val, TLI.getPointerTy(), isTarget);
908 SDValue SelectionDAG::getConstantFP(const APFloat& V, MVT VT, bool isTarget) {
909 return getConstantFP(*ConstantFP::get(V), VT, isTarget);
912 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, MVT VT, bool isTarget){
913 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
916 VT.isVector() ? VT.getVectorElementType() : VT;
918 // Do the map lookup using the actual bit pattern for the floating point
919 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
920 // we don't have issues with SNANs.
921 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
923 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
927 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
929 return SDValue(N, 0);
931 N = NodeAllocator.Allocate<ConstantFPSDNode>();
932 new (N) ConstantFPSDNode(isTarget, &V, EltVT);
933 CSEMap.InsertNode(N, IP);
934 AllNodes.push_back(N);
937 SDValue Result(N, 0);
939 SmallVector<SDValue, 8> Ops;
940 Ops.assign(VT.getVectorNumElements(), Result);
941 // FIXME DebugLoc info might be appropriate here
942 Result = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(),
943 VT, &Ops[0], Ops.size());
948 SDValue SelectionDAG::getConstantFP(double Val, MVT VT, bool isTarget) {
950 VT.isVector() ? VT.getVectorElementType() : VT;
952 return getConstantFP(APFloat((float)Val), VT, isTarget);
954 return getConstantFP(APFloat(Val), VT, isTarget);
957 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV,
958 MVT VT, int64_t Offset,
962 // Truncate (with sign-extension) the offset value to the pointer size.
963 unsigned BitWidth = TLI.getPointerTy().getSizeInBits();
965 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth));
967 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
969 // If GV is an alias then use the aliasee for determining thread-localness.
970 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
971 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
974 if (GVar && GVar->isThreadLocal())
975 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
977 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
980 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
982 ID.AddInteger(Offset);
984 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
985 return SDValue(E, 0);
986 SDNode *N = NodeAllocator.Allocate<GlobalAddressSDNode>();
987 new (N) GlobalAddressSDNode(isTargetGA, GV, VT, Offset);
988 CSEMap.InsertNode(N, IP);
989 AllNodes.push_back(N);
990 return SDValue(N, 0);
993 SDValue SelectionDAG::getFrameIndex(int FI, MVT VT, bool isTarget) {
994 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
996 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
999 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1000 return SDValue(E, 0);
1001 SDNode *N = NodeAllocator.Allocate<FrameIndexSDNode>();
1002 new (N) FrameIndexSDNode(FI, VT, isTarget);
1003 CSEMap.InsertNode(N, IP);
1004 AllNodes.push_back(N);
1005 return SDValue(N, 0);
1008 SDValue SelectionDAG::getJumpTable(int JTI, MVT VT, bool isTarget){
1009 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1010 FoldingSetNodeID ID;
1011 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1014 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1015 return SDValue(E, 0);
1016 SDNode *N = NodeAllocator.Allocate<JumpTableSDNode>();
1017 new (N) JumpTableSDNode(JTI, VT, isTarget);
1018 CSEMap.InsertNode(N, IP);
1019 AllNodes.push_back(N);
1020 return SDValue(N, 0);
1023 SDValue SelectionDAG::getConstantPool(Constant *C, MVT VT,
1024 unsigned Alignment, int Offset,
1027 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1028 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1029 FoldingSetNodeID ID;
1030 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1031 ID.AddInteger(Alignment);
1032 ID.AddInteger(Offset);
1035 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1036 return SDValue(E, 0);
1037 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>();
1038 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment);
1039 CSEMap.InsertNode(N, IP);
1040 AllNodes.push_back(N);
1041 return SDValue(N, 0);
1045 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, MVT VT,
1046 unsigned Alignment, int Offset,
1049 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1050 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1051 FoldingSetNodeID ID;
1052 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1053 ID.AddInteger(Alignment);
1054 ID.AddInteger(Offset);
1055 C->AddSelectionDAGCSEId(ID);
1057 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1058 return SDValue(E, 0);
1059 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>();
1060 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment);
1061 CSEMap.InsertNode(N, IP);
1062 AllNodes.push_back(N);
1063 return SDValue(N, 0);
1066 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1067 FoldingSetNodeID ID;
1068 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1071 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1072 return SDValue(E, 0);
1073 SDNode *N = NodeAllocator.Allocate<BasicBlockSDNode>();
1074 new (N) BasicBlockSDNode(MBB);
1075 CSEMap.InsertNode(N, IP);
1076 AllNodes.push_back(N);
1077 return SDValue(N, 0);
1080 SDValue SelectionDAG::getArgFlags(ISD::ArgFlagsTy Flags) {
1081 FoldingSetNodeID ID;
1082 AddNodeIDNode(ID, ISD::ARG_FLAGS, getVTList(MVT::Other), 0, 0);
1083 ID.AddInteger(Flags.getRawBits());
1085 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1086 return SDValue(E, 0);
1087 SDNode *N = NodeAllocator.Allocate<ARG_FLAGSSDNode>();
1088 new (N) ARG_FLAGSSDNode(Flags);
1089 CSEMap.InsertNode(N, IP);
1090 AllNodes.push_back(N);
1091 return SDValue(N, 0);
1094 SDValue SelectionDAG::getValueType(MVT VT) {
1095 if (VT.isSimple() && (unsigned)VT.getSimpleVT() >= ValueTypeNodes.size())
1096 ValueTypeNodes.resize(VT.getSimpleVT()+1);
1098 SDNode *&N = VT.isExtended() ?
1099 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT()];
1101 if (N) return SDValue(N, 0);
1102 N = NodeAllocator.Allocate<VTSDNode>();
1103 new (N) VTSDNode(VT);
1104 AllNodes.push_back(N);
1105 return SDValue(N, 0);
1108 SDValue SelectionDAG::getExternalSymbol(const char *Sym, MVT VT) {
1109 SDNode *&N = ExternalSymbols[Sym];
1110 if (N) return SDValue(N, 0);
1111 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1112 new (N) ExternalSymbolSDNode(false, Sym, VT);
1113 AllNodes.push_back(N);
1114 return SDValue(N, 0);
1117 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, MVT VT) {
1118 SDNode *&N = TargetExternalSymbols[Sym];
1119 if (N) return SDValue(N, 0);
1120 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1121 new (N) ExternalSymbolSDNode(true, Sym, VT);
1122 AllNodes.push_back(N);
1123 return SDValue(N, 0);
1126 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1127 if ((unsigned)Cond >= CondCodeNodes.size())
1128 CondCodeNodes.resize(Cond+1);
1130 if (CondCodeNodes[Cond] == 0) {
1131 CondCodeSDNode *N = NodeAllocator.Allocate<CondCodeSDNode>();
1132 new (N) CondCodeSDNode(Cond);
1133 CondCodeNodes[Cond] = N;
1134 AllNodes.push_back(N);
1136 return SDValue(CondCodeNodes[Cond], 0);
1139 SDValue SelectionDAG::getConvertRndSat(MVT VT, DebugLoc dl,
1140 SDValue Val, SDValue DTy,
1141 SDValue STy, SDValue Rnd, SDValue Sat,
1142 ISD::CvtCode Code) {
1143 // If the src and dest types are the same and the conversion is between
1144 // integer types of the same sign or two floats, no conversion is necessary.
1146 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1149 FoldingSetNodeID ID;
1151 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1152 return SDValue(E, 0);
1153 CvtRndSatSDNode *N = NodeAllocator.Allocate<CvtRndSatSDNode>();
1154 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1155 new (N) CvtRndSatSDNode(VT, dl, Ops, 5, Code);
1156 CSEMap.InsertNode(N, IP);
1157 AllNodes.push_back(N);
1158 return SDValue(N, 0);
1161 SDValue SelectionDAG::getRegister(unsigned RegNo, MVT VT) {
1162 FoldingSetNodeID ID;
1163 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1164 ID.AddInteger(RegNo);
1166 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1167 return SDValue(E, 0);
1168 SDNode *N = NodeAllocator.Allocate<RegisterSDNode>();
1169 new (N) RegisterSDNode(RegNo, VT);
1170 CSEMap.InsertNode(N, IP);
1171 AllNodes.push_back(N);
1172 return SDValue(N, 0);
1175 SDValue SelectionDAG::getDbgStopPoint(SDValue Root,
1176 unsigned Line, unsigned Col,
1178 SDNode *N = NodeAllocator.Allocate<DbgStopPointSDNode>();
1179 new (N) DbgStopPointSDNode(Root, Line, Col, CU);
1180 AllNodes.push_back(N);
1181 return SDValue(N, 0);
1184 SDValue SelectionDAG::getLabel(unsigned Opcode, DebugLoc dl,
1187 FoldingSetNodeID ID;
1188 SDValue Ops[] = { Root };
1189 AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), &Ops[0], 1);
1190 ID.AddInteger(LabelID);
1192 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1193 return SDValue(E, 0);
1194 SDNode *N = NodeAllocator.Allocate<LabelSDNode>();
1195 new (N) LabelSDNode(Opcode, dl, Root, LabelID);
1196 CSEMap.InsertNode(N, IP);
1197 AllNodes.push_back(N);
1198 return SDValue(N, 0);
1201 SDValue SelectionDAG::getSrcValue(const Value *V) {
1202 assert((!V || isa<PointerType>(V->getType())) &&
1203 "SrcValue is not a pointer?");
1205 FoldingSetNodeID ID;
1206 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1210 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1211 return SDValue(E, 0);
1213 SDNode *N = NodeAllocator.Allocate<SrcValueSDNode>();
1214 new (N) SrcValueSDNode(V);
1215 CSEMap.InsertNode(N, IP);
1216 AllNodes.push_back(N);
1217 return SDValue(N, 0);
1220 SDValue SelectionDAG::getMemOperand(const MachineMemOperand &MO) {
1222 const Value *v = MO.getValue();
1223 assert((!v || isa<PointerType>(v->getType())) &&
1224 "SrcValue is not a pointer?");
1227 FoldingSetNodeID ID;
1228 AddNodeIDNode(ID, ISD::MEMOPERAND, getVTList(MVT::Other), 0, 0);
1232 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1233 return SDValue(E, 0);
1235 SDNode *N = NodeAllocator.Allocate<MemOperandSDNode>();
1236 new (N) MemOperandSDNode(MO);
1237 CSEMap.InsertNode(N, IP);
1238 AllNodes.push_back(N);
1239 return SDValue(N, 0);
1242 /// getShiftAmountOperand - Return the specified value casted to
1243 /// the target's desired shift amount type.
1244 SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) {
1245 MVT OpTy = Op.getValueType();
1246 MVT ShTy = TLI.getShiftAmountTy();
1247 if (OpTy == ShTy || OpTy.isVector()) return Op;
1249 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1250 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op);
1253 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1254 /// specified value type.
1255 SDValue SelectionDAG::CreateStackTemporary(MVT VT, unsigned minAlign) {
1256 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1257 unsigned ByteSize = VT.getStoreSizeInBits()/8;
1258 const Type *Ty = VT.getTypeForMVT();
1259 unsigned StackAlign =
1260 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign);
1262 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign);
1263 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1266 /// CreateStackTemporary - Create a stack temporary suitable for holding
1267 /// either of the specified value types.
1268 SDValue SelectionDAG::CreateStackTemporary(MVT VT1, MVT VT2) {
1269 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1270 VT2.getStoreSizeInBits())/8;
1271 const Type *Ty1 = VT1.getTypeForMVT();
1272 const Type *Ty2 = VT2.getTypeForMVT();
1273 const TargetData *TD = TLI.getTargetData();
1274 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1275 TD->getPrefTypeAlignment(Ty2));
1277 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1278 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align);
1279 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1282 SDValue SelectionDAG::FoldSetCC(MVT VT, SDValue N1,
1283 SDValue N2, ISD::CondCode Cond, DebugLoc dl) {
1284 // These setcc operations always fold.
1288 case ISD::SETFALSE2: return getConstant(0, VT);
1290 case ISD::SETTRUE2: return getConstant(1, VT);
1302 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1306 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1307 const APInt &C2 = N2C->getAPIntValue();
1308 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1309 const APInt &C1 = N1C->getAPIntValue();
1312 default: assert(0 && "Unknown integer setcc!");
1313 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1314 case ISD::SETNE: return getConstant(C1 != C2, VT);
1315 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1316 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1317 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1318 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1319 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1320 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1321 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1322 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1326 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1327 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1328 // No compile time operations on this type yet.
1329 if (N1C->getValueType(0) == MVT::ppcf128)
1332 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1335 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1336 return getUNDEF(VT);
1338 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1339 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1340 return getUNDEF(VT);
1342 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1343 R==APFloat::cmpLessThan, VT);
1344 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1345 return getUNDEF(VT);
1347 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1348 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1349 return getUNDEF(VT);
1351 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1352 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1353 return getUNDEF(VT);
1355 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1356 R==APFloat::cmpEqual, VT);
1357 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1358 return getUNDEF(VT);
1360 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1361 R==APFloat::cmpEqual, VT);
1362 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1363 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1364 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1365 R==APFloat::cmpEqual, VT);
1366 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1367 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1368 R==APFloat::cmpLessThan, VT);
1369 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1370 R==APFloat::cmpUnordered, VT);
1371 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1372 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1375 // Ensure that the constant occurs on the RHS.
1376 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1380 // Could not fold it.
1384 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1385 /// use this predicate to simplify operations downstream.
1386 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1387 unsigned BitWidth = Op.getValueSizeInBits();
1388 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1391 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1392 /// this predicate to simplify operations downstream. Mask is known to be zero
1393 /// for bits that V cannot have.
1394 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1395 unsigned Depth) const {
1396 APInt KnownZero, KnownOne;
1397 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
1398 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1399 return (KnownZero & Mask) == Mask;
1402 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1403 /// known to be either zero or one and return them in the KnownZero/KnownOne
1404 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1406 void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask,
1407 APInt &KnownZero, APInt &KnownOne,
1408 unsigned Depth) const {
1409 unsigned BitWidth = Mask.getBitWidth();
1410 assert(BitWidth == Op.getValueType().getSizeInBits() &&
1411 "Mask size mismatches value type size!");
1413 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1414 if (Depth == 6 || Mask == 0)
1415 return; // Limit search depth.
1417 APInt KnownZero2, KnownOne2;
1419 switch (Op.getOpcode()) {
1421 // We know all of the bits for a constant!
1422 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask;
1423 KnownZero = ~KnownOne & Mask;
1426 // If either the LHS or the RHS are Zero, the result is zero.
1427 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1428 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero,
1429 KnownZero2, KnownOne2, Depth+1);
1430 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1431 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1433 // Output known-1 bits are only known if set in both the LHS & RHS.
1434 KnownOne &= KnownOne2;
1435 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1436 KnownZero |= KnownZero2;
1439 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1440 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne,
1441 KnownZero2, KnownOne2, Depth+1);
1442 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1443 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1445 // Output known-0 bits are only known if clear in both the LHS & RHS.
1446 KnownZero &= KnownZero2;
1447 // Output known-1 are known to be set if set in either the LHS | RHS.
1448 KnownOne |= KnownOne2;
1451 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1452 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
1453 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1454 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1456 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1457 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1458 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1459 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1460 KnownZero = KnownZeroOut;
1464 APInt Mask2 = APInt::getAllOnesValue(BitWidth);
1465 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1);
1466 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1467 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1468 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1470 // If low bits are zero in either operand, output low known-0 bits.
1471 // Also compute a conserative estimate for high known-0 bits.
1472 // More trickiness is possible, but this is sufficient for the
1473 // interesting case of alignment computation.
1475 unsigned TrailZ = KnownZero.countTrailingOnes() +
1476 KnownZero2.countTrailingOnes();
1477 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1478 KnownZero2.countLeadingOnes(),
1479 BitWidth) - BitWidth;
1481 TrailZ = std::min(TrailZ, BitWidth);
1482 LeadZ = std::min(LeadZ, BitWidth);
1483 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1484 APInt::getHighBitsSet(BitWidth, LeadZ);
1489 // For the purposes of computing leading zeros we can conservatively
1490 // treat a udiv as a logical right shift by the power of 2 known to
1491 // be less than the denominator.
1492 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1493 ComputeMaskedBits(Op.getOperand(0),
1494 AllOnes, KnownZero2, KnownOne2, Depth+1);
1495 unsigned LeadZ = KnownZero2.countLeadingOnes();
1499 ComputeMaskedBits(Op.getOperand(1),
1500 AllOnes, KnownZero2, KnownOne2, Depth+1);
1501 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1502 if (RHSUnknownLeadingOnes != BitWidth)
1503 LeadZ = std::min(BitWidth,
1504 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1506 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask;
1510 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1);
1511 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1);
1512 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1513 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1515 // Only known if known in both the LHS and RHS.
1516 KnownOne &= KnownOne2;
1517 KnownZero &= KnownZero2;
1519 case ISD::SELECT_CC:
1520 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1);
1521 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1);
1522 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1523 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1525 // Only known if known in both the LHS and RHS.
1526 KnownOne &= KnownOne2;
1527 KnownZero &= KnownZero2;
1535 if (Op.getResNo() != 1)
1537 // The boolean result conforms to getBooleanContents. Fall through.
1539 // If we know the result of a setcc has the top bits zero, use this info.
1540 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent &&
1542 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1545 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1546 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1547 unsigned ShAmt = SA->getZExtValue();
1549 // If the shift count is an invalid immediate, don't do anything.
1550 if (ShAmt >= BitWidth)
1553 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt),
1554 KnownZero, KnownOne, Depth+1);
1555 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1556 KnownZero <<= ShAmt;
1558 // low bits known zero.
1559 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1563 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1564 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1565 unsigned ShAmt = SA->getZExtValue();
1567 // If the shift count is an invalid immediate, don't do anything.
1568 if (ShAmt >= BitWidth)
1571 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt),
1572 KnownZero, KnownOne, Depth+1);
1573 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1574 KnownZero = KnownZero.lshr(ShAmt);
1575 KnownOne = KnownOne.lshr(ShAmt);
1577 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1578 KnownZero |= HighBits; // High bits known zero.
1582 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1583 unsigned ShAmt = SA->getZExtValue();
1585 // If the shift count is an invalid immediate, don't do anything.
1586 if (ShAmt >= BitWidth)
1589 APInt InDemandedMask = (Mask << ShAmt);
1590 // If any of the demanded bits are produced by the sign extension, we also
1591 // demand the input sign bit.
1592 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1593 if (HighBits.getBoolValue())
1594 InDemandedMask |= APInt::getSignBit(BitWidth);
1596 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne,
1598 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1599 KnownZero = KnownZero.lshr(ShAmt);
1600 KnownOne = KnownOne.lshr(ShAmt);
1602 // Handle the sign bits.
1603 APInt SignBit = APInt::getSignBit(BitWidth);
1604 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1606 if (KnownZero.intersects(SignBit)) {
1607 KnownZero |= HighBits; // New bits are known zero.
1608 } else if (KnownOne.intersects(SignBit)) {
1609 KnownOne |= HighBits; // New bits are known one.
1613 case ISD::SIGN_EXTEND_INREG: {
1614 MVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1615 unsigned EBits = EVT.getSizeInBits();
1617 // Sign extension. Compute the demanded bits in the result that are not
1618 // present in the input.
1619 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask;
1621 APInt InSignBit = APInt::getSignBit(EBits);
1622 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits);
1624 // If the sign extended bits are demanded, we know that the sign
1626 InSignBit.zext(BitWidth);
1627 if (NewBits.getBoolValue())
1628 InputDemandedBits |= InSignBit;
1630 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits,
1631 KnownZero, KnownOne, Depth+1);
1632 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1634 // If the sign bit of the input is known set or clear, then we know the
1635 // top bits of the result.
1636 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1637 KnownZero |= NewBits;
1638 KnownOne &= ~NewBits;
1639 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1640 KnownOne |= NewBits;
1641 KnownZero &= ~NewBits;
1642 } else { // Input sign bit unknown
1643 KnownZero &= ~NewBits;
1644 KnownOne &= ~NewBits;
1651 unsigned LowBits = Log2_32(BitWidth)+1;
1652 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1657 if (ISD::isZEXTLoad(Op.getNode())) {
1658 LoadSDNode *LD = cast<LoadSDNode>(Op);
1659 MVT VT = LD->getMemoryVT();
1660 unsigned MemBits = VT.getSizeInBits();
1661 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask;
1665 case ISD::ZERO_EXTEND: {
1666 MVT InVT = Op.getOperand(0).getValueType();
1667 unsigned InBits = InVT.getSizeInBits();
1668 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1669 APInt InMask = Mask;
1670 InMask.trunc(InBits);
1671 KnownZero.trunc(InBits);
1672 KnownOne.trunc(InBits);
1673 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1674 KnownZero.zext(BitWidth);
1675 KnownOne.zext(BitWidth);
1676 KnownZero |= NewBits;
1679 case ISD::SIGN_EXTEND: {
1680 MVT InVT = Op.getOperand(0).getValueType();
1681 unsigned InBits = InVT.getSizeInBits();
1682 APInt InSignBit = APInt::getSignBit(InBits);
1683 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1684 APInt InMask = Mask;
1685 InMask.trunc(InBits);
1687 // If any of the sign extended bits are demanded, we know that the sign
1688 // bit is demanded. Temporarily set this bit in the mask for our callee.
1689 if (NewBits.getBoolValue())
1690 InMask |= InSignBit;
1692 KnownZero.trunc(InBits);
1693 KnownOne.trunc(InBits);
1694 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1696 // Note if the sign bit is known to be zero or one.
1697 bool SignBitKnownZero = KnownZero.isNegative();
1698 bool SignBitKnownOne = KnownOne.isNegative();
1699 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1700 "Sign bit can't be known to be both zero and one!");
1702 // If the sign bit wasn't actually demanded by our caller, we don't
1703 // want it set in the KnownZero and KnownOne result values. Reset the
1704 // mask and reapply it to the result values.
1706 InMask.trunc(InBits);
1707 KnownZero &= InMask;
1710 KnownZero.zext(BitWidth);
1711 KnownOne.zext(BitWidth);
1713 // If the sign bit is known zero or one, the top bits match.
1714 if (SignBitKnownZero)
1715 KnownZero |= NewBits;
1716 else if (SignBitKnownOne)
1717 KnownOne |= NewBits;
1720 case ISD::ANY_EXTEND: {
1721 MVT InVT = Op.getOperand(0).getValueType();
1722 unsigned InBits = InVT.getSizeInBits();
1723 APInt InMask = Mask;
1724 InMask.trunc(InBits);
1725 KnownZero.trunc(InBits);
1726 KnownOne.trunc(InBits);
1727 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1728 KnownZero.zext(BitWidth);
1729 KnownOne.zext(BitWidth);
1732 case ISD::TRUNCATE: {
1733 MVT InVT = Op.getOperand(0).getValueType();
1734 unsigned InBits = InVT.getSizeInBits();
1735 APInt InMask = Mask;
1736 InMask.zext(InBits);
1737 KnownZero.zext(InBits);
1738 KnownOne.zext(InBits);
1739 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1740 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1741 KnownZero.trunc(BitWidth);
1742 KnownOne.trunc(BitWidth);
1745 case ISD::AssertZext: {
1746 MVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1747 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1748 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
1750 KnownZero |= (~InMask) & Mask;
1754 // All bits are zero except the low bit.
1755 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1759 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
1760 // We know that the top bits of C-X are clear if X contains less bits
1761 // than C (i.e. no wrap-around can happen). For example, 20-X is
1762 // positive if we can prove that X is >= 0 and < 16.
1763 if (CLHS->getAPIntValue().isNonNegative()) {
1764 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
1765 // NLZ can't be BitWidth with no sign bit
1766 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
1767 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2,
1770 // If all of the MaskV bits are known to be zero, then we know the
1771 // output top bits are zero, because we now know that the output is
1773 if ((KnownZero2 & MaskV) == MaskV) {
1774 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
1775 // Top bits known zero.
1776 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask;
1783 // Output known-0 bits are known if clear or set in both the low clear bits
1784 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
1785 // low 3 bits clear.
1786 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes());
1787 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1788 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1789 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
1791 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1);
1792 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1793 KnownZeroOut = std::min(KnownZeroOut,
1794 KnownZero2.countTrailingOnes());
1796 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
1800 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1801 const APInt &RA = Rem->getAPIntValue();
1802 if (RA.isPowerOf2() || (-RA).isPowerOf2()) {
1803 APInt LowBits = RA.isStrictlyPositive() ? (RA - 1) : ~RA;
1804 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
1805 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1);
1807 // If the sign bit of the first operand is zero, the sign bit of
1808 // the result is zero. If the first operand has no one bits below
1809 // the second operand's single 1 bit, its sign will be zero.
1810 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
1811 KnownZero2 |= ~LowBits;
1813 KnownZero |= KnownZero2 & Mask;
1815 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1820 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1821 const APInt &RA = Rem->getAPIntValue();
1822 if (RA.isPowerOf2()) {
1823 APInt LowBits = (RA - 1);
1824 APInt Mask2 = LowBits & Mask;
1825 KnownZero |= ~LowBits & Mask;
1826 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1);
1827 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1832 // Since the result is less than or equal to either operand, any leading
1833 // zero bits in either operand must also exist in the result.
1834 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1835 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne,
1837 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2,
1840 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
1841 KnownZero2.countLeadingOnes());
1843 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
1847 // Allow the target to implement this method for its nodes.
1848 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) {
1849 case ISD::INTRINSIC_WO_CHAIN:
1850 case ISD::INTRINSIC_W_CHAIN:
1851 case ISD::INTRINSIC_VOID:
1852 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this);
1858 /// ComputeNumSignBits - Return the number of times the sign bit of the
1859 /// register is replicated into the other bits. We know that at least 1 bit
1860 /// is always equal to the sign bit (itself), but other cases can give us
1861 /// information. For example, immediately after an "SRA X, 2", we know that
1862 /// the top 3 bits are all equal to each other, so we return 3.
1863 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
1864 MVT VT = Op.getValueType();
1865 assert(VT.isInteger() && "Invalid VT!");
1866 unsigned VTBits = VT.getSizeInBits();
1868 unsigned FirstAnswer = 1;
1871 return 1; // Limit search depth.
1873 switch (Op.getOpcode()) {
1875 case ISD::AssertSext:
1876 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1877 return VTBits-Tmp+1;
1878 case ISD::AssertZext:
1879 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1882 case ISD::Constant: {
1883 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
1884 // If negative, return # leading ones.
1885 if (Val.isNegative())
1886 return Val.countLeadingOnes();
1888 // Return # leading zeros.
1889 return Val.countLeadingZeros();
1892 case ISD::SIGN_EXTEND:
1893 Tmp = VTBits-Op.getOperand(0).getValueType().getSizeInBits();
1894 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
1896 case ISD::SIGN_EXTEND_INREG:
1897 // Max of the input and what this extends.
1898 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1901 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1902 return std::max(Tmp, Tmp2);
1905 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1906 // SRA X, C -> adds C sign bits.
1907 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1908 Tmp += C->getZExtValue();
1909 if (Tmp > VTBits) Tmp = VTBits;
1913 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1914 // shl destroys sign bits.
1915 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1916 if (C->getZExtValue() >= VTBits || // Bad shift.
1917 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
1918 return Tmp - C->getZExtValue();
1923 case ISD::XOR: // NOT is handled here.
1924 // Logical binary ops preserve the number of sign bits at the worst.
1925 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1927 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
1928 FirstAnswer = std::min(Tmp, Tmp2);
1929 // We computed what we know about the sign bits as our first
1930 // answer. Now proceed to the generic code that uses
1931 // ComputeMaskedBits, and pick whichever answer is better.
1936 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
1937 if (Tmp == 1) return 1; // Early out.
1938 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
1939 return std::min(Tmp, Tmp2);
1947 if (Op.getResNo() != 1)
1949 // The boolean result conforms to getBooleanContents. Fall through.
1951 // If setcc returns 0/-1, all bits are sign bits.
1952 if (TLI.getBooleanContents() ==
1953 TargetLowering::ZeroOrNegativeOneBooleanContent)
1958 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1959 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
1961 // Handle rotate right by N like a rotate left by 32-N.
1962 if (Op.getOpcode() == ISD::ROTR)
1963 RotAmt = (VTBits-RotAmt) & (VTBits-1);
1965 // If we aren't rotating out all of the known-in sign bits, return the
1966 // number that are left. This handles rotl(sext(x), 1) for example.
1967 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1968 if (Tmp > RotAmt+1) return Tmp-RotAmt;
1972 // Add can have at most one carry bit. Thus we know that the output
1973 // is, at worst, one more bit than the inputs.
1974 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1975 if (Tmp == 1) return 1; // Early out.
1977 // Special case decrementing a value (ADD X, -1):
1978 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
1979 if (CRHS->isAllOnesValue()) {
1980 APInt KnownZero, KnownOne;
1981 APInt Mask = APInt::getAllOnesValue(VTBits);
1982 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
1984 // If the input is known to be 0 or 1, the output is 0/-1, which is all
1986 if ((KnownZero | APInt(VTBits, 1)) == Mask)
1989 // If we are subtracting one from a positive number, there is no carry
1990 // out of the result.
1991 if (KnownZero.isNegative())
1995 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
1996 if (Tmp2 == 1) return 1;
1997 return std::min(Tmp, Tmp2)-1;
2001 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2002 if (Tmp2 == 1) return 1;
2005 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2006 if (CLHS->isNullValue()) {
2007 APInt KnownZero, KnownOne;
2008 APInt Mask = APInt::getAllOnesValue(VTBits);
2009 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
2010 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2012 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2015 // If the input is known to be positive (the sign bit is known clear),
2016 // the output of the NEG has the same number of sign bits as the input.
2017 if (KnownZero.isNegative())
2020 // Otherwise, we treat this like a SUB.
2023 // Sub can have at most one carry bit. Thus we know that the output
2024 // is, at worst, one more bit than the inputs.
2025 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2026 if (Tmp == 1) return 1; // Early out.
2027 return std::min(Tmp, Tmp2)-1;
2030 // FIXME: it's tricky to do anything useful for this, but it is an important
2031 // case for targets like X86.
2035 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2036 if (Op.getOpcode() == ISD::LOAD) {
2037 LoadSDNode *LD = cast<LoadSDNode>(Op);
2038 unsigned ExtType = LD->getExtensionType();
2041 case ISD::SEXTLOAD: // '17' bits known
2042 Tmp = LD->getMemoryVT().getSizeInBits();
2043 return VTBits-Tmp+1;
2044 case ISD::ZEXTLOAD: // '16' bits known
2045 Tmp = LD->getMemoryVT().getSizeInBits();
2050 // Allow the target to implement this method for its nodes.
2051 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2052 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2053 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2054 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2055 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2056 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2059 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2060 // use this information.
2061 APInt KnownZero, KnownOne;
2062 APInt Mask = APInt::getAllOnesValue(VTBits);
2063 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
2065 if (KnownZero.isNegative()) { // sign bit is 0
2067 } else if (KnownOne.isNegative()) { // sign bit is 1;
2074 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2075 // the number of identical bits in the top of the input value.
2077 Mask <<= Mask.getBitWidth()-VTBits;
2078 // Return # leading zeros. We use 'min' here in case Val was zero before
2079 // shifting. We don't want to return '64' as for an i32 "0".
2080 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2084 bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const {
2085 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op);
2086 if (!GA) return false;
2087 if (GA->getOffset() != 0) return false;
2088 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal());
2089 if (!GV) return false;
2090 MachineModuleInfo *MMI = getMachineModuleInfo();
2091 return MMI && MMI->hasDebugInfo();
2095 /// getShuffleScalarElt - Returns the scalar element that will make up the ith
2096 /// element of the result of the vector shuffle.
2097 SDValue SelectionDAG::getShuffleScalarElt(const SDNode *N, unsigned i) {
2098 MVT VT = N->getValueType(0);
2099 DebugLoc dl = N->getDebugLoc();
2100 SDValue PermMask = N->getOperand(2);
2101 SDValue Idx = PermMask.getOperand(i);
2102 if (Idx.getOpcode() == ISD::UNDEF)
2103 return getUNDEF(VT.getVectorElementType());
2104 unsigned Index = cast<ConstantSDNode>(Idx)->getZExtValue();
2105 unsigned NumElems = PermMask.getNumOperands();
2106 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1);
2109 if (V.getOpcode() == ISD::BIT_CONVERT) {
2110 V = V.getOperand(0);
2111 MVT VVT = V.getValueType();
2112 if (!VVT.isVector() || VVT.getVectorNumElements() != NumElems)
2115 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR)
2116 return (Index == 0) ? V.getOperand(0)
2117 : getUNDEF(VT.getVectorElementType());
2118 if (V.getOpcode() == ISD::BUILD_VECTOR)
2119 return V.getOperand(Index);
2120 if (V.getOpcode() == ISD::VECTOR_SHUFFLE)
2121 return getShuffleScalarElt(V.getNode(), Index);
2126 /// getNode - Gets or creates the specified node.
2128 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT) {
2129 FoldingSetNodeID ID;
2130 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2132 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2133 return SDValue(E, 0);
2134 SDNode *N = NodeAllocator.Allocate<SDNode>();
2135 new (N) SDNode(Opcode, DL, getVTList(VT));
2136 CSEMap.InsertNode(N, IP);
2138 AllNodes.push_back(N);
2142 return SDValue(N, 0);
2145 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
2146 MVT VT, SDValue Operand) {
2147 // Constant fold unary operations with an integer constant operand.
2148 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2149 const APInt &Val = C->getAPIntValue();
2150 unsigned BitWidth = VT.getSizeInBits();
2153 case ISD::SIGN_EXTEND:
2154 return getConstant(APInt(Val).sextOrTrunc(BitWidth), VT);
2155 case ISD::ANY_EXTEND:
2156 case ISD::ZERO_EXTEND:
2158 return getConstant(APInt(Val).zextOrTrunc(BitWidth), VT);
2159 case ISD::UINT_TO_FP:
2160 case ISD::SINT_TO_FP: {
2161 const uint64_t zero[] = {0, 0};
2162 // No compile time operations on this type.
2163 if (VT==MVT::ppcf128)
2165 APFloat apf = APFloat(APInt(BitWidth, 2, zero));
2166 (void)apf.convertFromAPInt(Val,
2167 Opcode==ISD::SINT_TO_FP,
2168 APFloat::rmNearestTiesToEven);
2169 return getConstantFP(apf, VT);
2171 case ISD::BIT_CONVERT:
2172 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2173 return getConstantFP(Val.bitsToFloat(), VT);
2174 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2175 return getConstantFP(Val.bitsToDouble(), VT);
2178 return getConstant(Val.byteSwap(), VT);
2180 return getConstant(Val.countPopulation(), VT);
2182 return getConstant(Val.countLeadingZeros(), VT);
2184 return getConstant(Val.countTrailingZeros(), VT);
2188 // Constant fold unary operations with a floating point constant operand.
2189 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2190 APFloat V = C->getValueAPF(); // make copy
2191 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) {
2195 return getConstantFP(V, VT);
2198 return getConstantFP(V, VT);
2200 case ISD::FP_EXTEND: {
2202 // This can return overflow, underflow, or inexact; we don't care.
2203 // FIXME need to be more flexible about rounding mode.
2204 (void)V.convert(*MVTToAPFloatSemantics(VT),
2205 APFloat::rmNearestTiesToEven, &ignored);
2206 return getConstantFP(V, VT);
2208 case ISD::FP_TO_SINT:
2209 case ISD::FP_TO_UINT: {
2212 assert(integerPartWidth >= 64);
2213 // FIXME need to be more flexible about rounding mode.
2214 APFloat::opStatus s = V.convertToInteger(&x, 64U,
2215 Opcode==ISD::FP_TO_SINT,
2216 APFloat::rmTowardZero, &ignored);
2217 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2219 return getConstant(x, VT);
2221 case ISD::BIT_CONVERT:
2222 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2223 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2224 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2225 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2231 unsigned OpOpcode = Operand.getNode()->getOpcode();
2233 case ISD::TokenFactor:
2234 case ISD::MERGE_VALUES:
2235 case ISD::CONCAT_VECTORS:
2236 return Operand; // Factor, merge or concat of one node? No need.
2237 case ISD::FP_ROUND: assert(0 && "Invalid method to make FP_ROUND node");
2238 case ISD::FP_EXTEND:
2239 assert(VT.isFloatingPoint() &&
2240 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2241 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2242 if (Operand.getOpcode() == ISD::UNDEF)
2243 return getUNDEF(VT);
2245 case ISD::SIGN_EXTEND:
2246 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2247 "Invalid SIGN_EXTEND!");
2248 if (Operand.getValueType() == VT) return Operand; // noop extension
2249 assert(Operand.getValueType().bitsLT(VT)
2250 && "Invalid sext node, dst < src!");
2251 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2252 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2254 case ISD::ZERO_EXTEND:
2255 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2256 "Invalid ZERO_EXTEND!");
2257 if (Operand.getValueType() == VT) return Operand; // noop extension
2258 assert(Operand.getValueType().bitsLT(VT)
2259 && "Invalid zext node, dst < src!");
2260 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2261 return getNode(ISD::ZERO_EXTEND, DL, VT,
2262 Operand.getNode()->getOperand(0));
2264 case ISD::ANY_EXTEND:
2265 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2266 "Invalid ANY_EXTEND!");
2267 if (Operand.getValueType() == VT) return Operand; // noop extension
2268 assert(Operand.getValueType().bitsLT(VT)
2269 && "Invalid anyext node, dst < src!");
2270 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND)
2271 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2272 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2275 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2276 "Invalid TRUNCATE!");
2277 if (Operand.getValueType() == VT) return Operand; // noop truncate
2278 assert(Operand.getValueType().bitsGT(VT)
2279 && "Invalid truncate node, src < dst!");
2280 if (OpOpcode == ISD::TRUNCATE)
2281 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2282 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2283 OpOpcode == ISD::ANY_EXTEND) {
2284 // If the source is smaller than the dest, we still need an extend.
2285 if (Operand.getNode()->getOperand(0).getValueType().bitsLT(VT))
2286 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2287 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2288 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2290 return Operand.getNode()->getOperand(0);
2293 case ISD::BIT_CONVERT:
2294 // Basic sanity checking.
2295 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2296 && "Cannot BIT_CONVERT between types of different sizes!");
2297 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2298 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x)
2299 return getNode(ISD::BIT_CONVERT, DL, VT, Operand.getOperand(0));
2300 if (OpOpcode == ISD::UNDEF)
2301 return getUNDEF(VT);
2303 case ISD::SCALAR_TO_VECTOR:
2304 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2305 VT.getVectorElementType() == Operand.getValueType() &&
2306 "Illegal SCALAR_TO_VECTOR node!");
2307 if (OpOpcode == ISD::UNDEF)
2308 return getUNDEF(VT);
2309 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2310 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2311 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2312 Operand.getConstantOperandVal(1) == 0 &&
2313 Operand.getOperand(0).getValueType() == VT)
2314 return Operand.getOperand(0);
2317 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
2318 if (UnsafeFPMath && OpOpcode == ISD::FSUB)
2319 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
2320 Operand.getNode()->getOperand(0));
2321 if (OpOpcode == ISD::FNEG) // --X -> X
2322 return Operand.getNode()->getOperand(0);
2325 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2326 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
2331 SDVTList VTs = getVTList(VT);
2332 if (VT != MVT::Flag) { // Don't CSE flag producing nodes
2333 FoldingSetNodeID ID;
2334 SDValue Ops[1] = { Operand };
2335 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2337 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2338 return SDValue(E, 0);
2339 N = NodeAllocator.Allocate<UnarySDNode>();
2340 new (N) UnarySDNode(Opcode, DL, VTs, Operand);
2341 CSEMap.InsertNode(N, IP);
2343 N = NodeAllocator.Allocate<UnarySDNode>();
2344 new (N) UnarySDNode(Opcode, DL, VTs, Operand);
2347 AllNodes.push_back(N);
2351 return SDValue(N, 0);
2354 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2356 ConstantSDNode *Cst1,
2357 ConstantSDNode *Cst2) {
2358 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
2361 case ISD::ADD: return getConstant(C1 + C2, VT);
2362 case ISD::SUB: return getConstant(C1 - C2, VT);
2363 case ISD::MUL: return getConstant(C1 * C2, VT);
2365 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2368 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2371 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2374 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2376 case ISD::AND: return getConstant(C1 & C2, VT);
2377 case ISD::OR: return getConstant(C1 | C2, VT);
2378 case ISD::XOR: return getConstant(C1 ^ C2, VT);
2379 case ISD::SHL: return getConstant(C1 << C2, VT);
2380 case ISD::SRL: return getConstant(C1.lshr(C2), VT);
2381 case ISD::SRA: return getConstant(C1.ashr(C2), VT);
2382 case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2383 case ISD::ROTR: return getConstant(C1.rotr(C2), VT);
2390 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
2391 SDValue N1, SDValue N2) {
2392 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2393 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2396 case ISD::TokenFactor:
2397 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2398 N2.getValueType() == MVT::Other && "Invalid token factor!");
2399 // Fold trivial token factors.
2400 if (N1.getOpcode() == ISD::EntryToken) return N2;
2401 if (N2.getOpcode() == ISD::EntryToken) return N1;
2402 if (N1 == N2) return N1;
2404 case ISD::CONCAT_VECTORS:
2405 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2406 // one big BUILD_VECTOR.
2407 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2408 N2.getOpcode() == ISD::BUILD_VECTOR) {
2409 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2410 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2411 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2415 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2416 N1.getValueType() == VT && "Binary operator types must match!");
2417 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2418 // worth handling here.
2419 if (N2C && N2C->isNullValue())
2421 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2428 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2429 N1.getValueType() == VT && "Binary operator types must match!");
2430 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2431 // it's worth handling here.
2432 if (N2C && N2C->isNullValue())
2442 assert(VT.isInteger() && "This operator does not apply to FP types!");
2450 if (Opcode == ISD::FADD) {
2452 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
2453 if (CFP->getValueAPF().isZero())
2456 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2457 if (CFP->getValueAPF().isZero())
2459 } else if (Opcode == ISD::FSUB) {
2461 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2462 if (CFP->getValueAPF().isZero())
2466 assert(N1.getValueType() == N2.getValueType() &&
2467 N1.getValueType() == VT && "Binary operator types must match!");
2469 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2470 assert(N1.getValueType() == VT &&
2471 N1.getValueType().isFloatingPoint() &&
2472 N2.getValueType().isFloatingPoint() &&
2473 "Invalid FCOPYSIGN!");
2480 assert(VT == N1.getValueType() &&
2481 "Shift operators return type must be the same as their first arg");
2482 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2483 "Shifts only work on integers");
2485 // Always fold shifts of i1 values so the code generator doesn't need to
2486 // handle them. Since we know the size of the shift has to be less than the
2487 // size of the value, the shift/rotate count is guaranteed to be zero.
2491 case ISD::FP_ROUND_INREG: {
2492 MVT EVT = cast<VTSDNode>(N2)->getVT();
2493 assert(VT == N1.getValueType() && "Not an inreg round!");
2494 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2495 "Cannot FP_ROUND_INREG integer types");
2496 assert(EVT.bitsLE(VT) && "Not rounding down!");
2497 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2501 assert(VT.isFloatingPoint() &&
2502 N1.getValueType().isFloatingPoint() &&
2503 VT.bitsLE(N1.getValueType()) &&
2504 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2505 if (N1.getValueType() == VT) return N1; // noop conversion.
2507 case ISD::AssertSext:
2508 case ISD::AssertZext: {
2509 MVT EVT = cast<VTSDNode>(N2)->getVT();
2510 assert(VT == N1.getValueType() && "Not an inreg extend!");
2511 assert(VT.isInteger() && EVT.isInteger() &&
2512 "Cannot *_EXTEND_INREG FP types");
2513 assert(EVT.bitsLE(VT) && "Not extending!");
2514 if (VT == EVT) return N1; // noop assertion.
2517 case ISD::SIGN_EXTEND_INREG: {
2518 MVT EVT = cast<VTSDNode>(N2)->getVT();
2519 assert(VT == N1.getValueType() && "Not an inreg extend!");
2520 assert(VT.isInteger() && EVT.isInteger() &&
2521 "Cannot *_EXTEND_INREG FP types");
2522 assert(EVT.bitsLE(VT) && "Not extending!");
2523 if (EVT == VT) return N1; // Not actually extending
2526 APInt Val = N1C->getAPIntValue();
2527 unsigned FromBits = cast<VTSDNode>(N2)->getVT().getSizeInBits();
2528 Val <<= Val.getBitWidth()-FromBits;
2529 Val = Val.ashr(Val.getBitWidth()-FromBits);
2530 return getConstant(Val, VT);
2534 case ISD::EXTRACT_VECTOR_ELT:
2535 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2536 if (N1.getOpcode() == ISD::UNDEF)
2537 return getUNDEF(VT);
2539 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2540 // expanding copies of large vectors from registers.
2542 N1.getOpcode() == ISD::CONCAT_VECTORS &&
2543 N1.getNumOperands() > 0) {
2545 N1.getOperand(0).getValueType().getVectorNumElements();
2546 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
2547 N1.getOperand(N2C->getZExtValue() / Factor),
2548 getConstant(N2C->getZExtValue() % Factor,
2549 N2.getValueType()));
2552 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2553 // expanding large vector constants.
2554 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
2555 SDValue Elt = N1.getOperand(N2C->getZExtValue());
2556 if (Elt.getValueType() != VT) {
2557 // If the vector element type is not legal, the BUILD_VECTOR operands
2558 // are promoted and implicitly truncated. Make that explicit here.
2559 assert(Elt.getValueType() == TLI.getTypeToTransformTo(VT) &&
2560 "Bad type for BUILD_VECTOR operand");
2561 Elt = getNode(ISD::TRUNCATE, DL, VT, Elt);
2566 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2567 // operations are lowered to scalars.
2568 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2569 // If the indices are the same, return the inserted element.
2570 if (N1.getOperand(2) == N2)
2571 return N1.getOperand(1);
2572 // If the indices are known different, extract the element from
2573 // the original vector.
2574 else if (isa<ConstantSDNode>(N1.getOperand(2)) &&
2575 isa<ConstantSDNode>(N2))
2576 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
2579 case ISD::EXTRACT_ELEMENT:
2580 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
2581 assert(!N1.getValueType().isVector() && !VT.isVector() &&
2582 (N1.getValueType().isInteger() == VT.isInteger()) &&
2583 "Wrong types for EXTRACT_ELEMENT!");
2585 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2586 // 64-bit integers into 32-bit parts. Instead of building the extract of
2587 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2588 if (N1.getOpcode() == ISD::BUILD_PAIR)
2589 return N1.getOperand(N2C->getZExtValue());
2591 // EXTRACT_ELEMENT of a constant int is also very common.
2592 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2593 unsigned ElementSize = VT.getSizeInBits();
2594 unsigned Shift = ElementSize * N2C->getZExtValue();
2595 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2596 return getConstant(ShiftedVal.trunc(ElementSize), VT);
2599 case ISD::EXTRACT_SUBVECTOR:
2600 if (N1.getValueType() == VT) // Trivial extraction.
2607 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
2608 if (SV.getNode()) return SV;
2609 } else { // Cannonicalize constant to RHS if commutative
2610 if (isCommutativeBinOp(Opcode)) {
2611 std::swap(N1C, N2C);
2617 // Constant fold FP operations.
2618 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
2619 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
2621 if (!N2CFP && isCommutativeBinOp(Opcode)) {
2622 // Cannonicalize constant to RHS if commutative
2623 std::swap(N1CFP, N2CFP);
2625 } else if (N2CFP && VT != MVT::ppcf128) {
2626 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
2627 APFloat::opStatus s;
2630 s = V1.add(V2, APFloat::rmNearestTiesToEven);
2631 if (s != APFloat::opInvalidOp)
2632 return getConstantFP(V1, VT);
2635 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
2636 if (s!=APFloat::opInvalidOp)
2637 return getConstantFP(V1, VT);
2640 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
2641 if (s!=APFloat::opInvalidOp)
2642 return getConstantFP(V1, VT);
2645 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
2646 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2647 return getConstantFP(V1, VT);
2650 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
2651 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2652 return getConstantFP(V1, VT);
2654 case ISD::FCOPYSIGN:
2656 return getConstantFP(V1, VT);
2662 // Canonicalize an UNDEF to the RHS, even over a constant.
2663 if (N1.getOpcode() == ISD::UNDEF) {
2664 if (isCommutativeBinOp(Opcode)) {
2668 case ISD::FP_ROUND_INREG:
2669 case ISD::SIGN_EXTEND_INREG:
2675 return N1; // fold op(undef, arg2) -> undef
2683 return getConstant(0, VT); // fold op(undef, arg2) -> 0
2684 // For vectors, we can't easily build an all zero vector, just return
2691 // Fold a bunch of operators when the RHS is undef.
2692 if (N2.getOpcode() == ISD::UNDEF) {
2695 if (N1.getOpcode() == ISD::UNDEF)
2696 // Handle undef ^ undef -> 0 special case. This is a common
2698 return getConstant(0, VT);
2713 return N2; // fold op(arg1, undef) -> undef
2719 return getConstant(0, VT); // fold op(arg1, undef) -> 0
2720 // For vectors, we can't easily build an all zero vector, just return
2725 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
2726 // For vectors, we can't easily build an all one vector, just return
2734 // Memoize this node if possible.
2736 SDVTList VTs = getVTList(VT);
2737 if (VT != MVT::Flag) {
2738 SDValue Ops[] = { N1, N2 };
2739 FoldingSetNodeID ID;
2740 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
2742 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2743 return SDValue(E, 0);
2744 N = NodeAllocator.Allocate<BinarySDNode>();
2745 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2);
2746 CSEMap.InsertNode(N, IP);
2748 N = NodeAllocator.Allocate<BinarySDNode>();
2749 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2);
2752 AllNodes.push_back(N);
2756 return SDValue(N, 0);
2759 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
2760 SDValue N1, SDValue N2, SDValue N3) {
2761 // Perform various simplifications.
2762 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2763 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2765 case ISD::CONCAT_VECTORS:
2766 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2767 // one big BUILD_VECTOR.
2768 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2769 N2.getOpcode() == ISD::BUILD_VECTOR &&
2770 N3.getOpcode() == ISD::BUILD_VECTOR) {
2771 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2772 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2773 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end());
2774 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2778 // Use FoldSetCC to simplify SETCC's.
2779 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
2780 if (Simp.getNode()) return Simp;
2785 if (N1C->getZExtValue())
2786 return N2; // select true, X, Y -> X
2788 return N3; // select false, X, Y -> Y
2791 if (N2 == N3) return N2; // select C, X, X -> X
2795 if (N2C->getZExtValue()) // Unconditional branch
2796 return getNode(ISD::BR, DL, MVT::Other, N1, N3);
2798 return N1; // Never-taken branch
2801 case ISD::VECTOR_SHUFFLE:
2802 assert(N1.getValueType() == N2.getValueType() &&
2803 N1.getValueType().isVector() &&
2804 VT.isVector() && N3.getValueType().isVector() &&
2805 N3.getOpcode() == ISD::BUILD_VECTOR &&
2806 VT.getVectorNumElements() == N3.getNumOperands() &&
2807 "Illegal VECTOR_SHUFFLE node!");
2809 case ISD::BIT_CONVERT:
2810 // Fold bit_convert nodes from a type to themselves.
2811 if (N1.getValueType() == VT)
2816 // Memoize node if it doesn't produce a flag.
2818 SDVTList VTs = getVTList(VT);
2819 if (VT != MVT::Flag) {
2820 SDValue Ops[] = { N1, N2, N3 };
2821 FoldingSetNodeID ID;
2822 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
2824 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2825 return SDValue(E, 0);
2826 N = NodeAllocator.Allocate<TernarySDNode>();
2827 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
2828 CSEMap.InsertNode(N, IP);
2830 N = NodeAllocator.Allocate<TernarySDNode>();
2831 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
2833 AllNodes.push_back(N);
2837 return SDValue(N, 0);
2840 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
2841 SDValue N1, SDValue N2, SDValue N3,
2843 SDValue Ops[] = { N1, N2, N3, N4 };
2844 return getNode(Opcode, DL, VT, Ops, 4);
2847 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
2848 SDValue N1, SDValue N2, SDValue N3,
2849 SDValue N4, SDValue N5) {
2850 SDValue Ops[] = { N1, N2, N3, N4, N5 };
2851 return getNode(Opcode, DL, VT, Ops, 5);
2854 /// getMemsetValue - Vectorized representation of the memset value
2856 static SDValue getMemsetValue(SDValue Value, MVT VT, SelectionDAG &DAG,
2858 unsigned NumBits = VT.isVector() ?
2859 VT.getVectorElementType().getSizeInBits() : VT.getSizeInBits();
2860 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
2861 APInt Val = APInt(NumBits, C->getZExtValue() & 255);
2863 for (unsigned i = NumBits; i > 8; i >>= 1) {
2864 Val = (Val << Shift) | Val;
2868 return DAG.getConstant(Val, VT);
2869 return DAG.getConstantFP(APFloat(Val), VT);
2872 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
2873 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value);
2875 for (unsigned i = NumBits; i > 8; i >>= 1) {
2876 Value = DAG.getNode(ISD::OR, dl, VT,
2877 DAG.getNode(ISD::SHL, dl, VT, Value,
2878 DAG.getConstant(Shift,
2879 TLI.getShiftAmountTy())),
2887 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
2888 /// used when a memcpy is turned into a memset when the source is a constant
2890 static SDValue getMemsetStringVal(MVT VT, DebugLoc dl, SelectionDAG &DAG,
2891 const TargetLowering &TLI,
2892 std::string &Str, unsigned Offset) {
2893 // Handle vector with all elements zero.
2896 return DAG.getConstant(0, VT);
2897 unsigned NumElts = VT.getVectorNumElements();
2898 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
2899 return DAG.getNode(ISD::BIT_CONVERT, dl, VT,
2900 DAG.getConstant(0, MVT::getVectorVT(EltVT, NumElts)));
2903 assert(!VT.isVector() && "Can't handle vector type here!");
2904 unsigned NumBits = VT.getSizeInBits();
2905 unsigned MSB = NumBits / 8;
2907 if (TLI.isLittleEndian())
2908 Offset = Offset + MSB - 1;
2909 for (unsigned i = 0; i != MSB; ++i) {
2910 Val = (Val << 8) | (unsigned char)Str[Offset];
2911 Offset += TLI.isLittleEndian() ? -1 : 1;
2913 return DAG.getConstant(Val, VT);
2916 /// getMemBasePlusOffset - Returns base and offset node for the
2918 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
2919 SelectionDAG &DAG) {
2920 MVT VT = Base.getValueType();
2921 return DAG.getNode(ISD::ADD, Base.getDebugLoc(),
2922 VT, Base, DAG.getConstant(Offset, VT));
2925 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
2927 static bool isMemSrcFromString(SDValue Src, std::string &Str) {
2928 unsigned SrcDelta = 0;
2929 GlobalAddressSDNode *G = NULL;
2930 if (Src.getOpcode() == ISD::GlobalAddress)
2931 G = cast<GlobalAddressSDNode>(Src);
2932 else if (Src.getOpcode() == ISD::ADD &&
2933 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
2934 Src.getOperand(1).getOpcode() == ISD::Constant) {
2935 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
2936 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
2941 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal());
2942 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false))
2948 /// MeetsMaxMemopRequirement - Determines if the number of memory ops required
2949 /// to replace the memset / memcpy is below the threshold. It also returns the
2950 /// types of the sequence of memory ops to perform memset / memcpy.
2952 bool MeetsMaxMemopRequirement(std::vector<MVT> &MemOps,
2953 SDValue Dst, SDValue Src,
2954 unsigned Limit, uint64_t Size, unsigned &Align,
2955 std::string &Str, bool &isSrcStr,
2957 const TargetLowering &TLI) {
2958 isSrcStr = isMemSrcFromString(Src, Str);
2959 bool isSrcConst = isa<ConstantSDNode>(Src);
2960 bool AllowUnalign = TLI.allowsUnalignedMemoryAccesses();
2961 MVT VT = TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr);
2962 if (VT != MVT::iAny) {
2963 unsigned NewAlign = (unsigned)
2964 TLI.getTargetData()->getABITypeAlignment(VT.getTypeForMVT());
2965 // If source is a string constant, this will require an unaligned load.
2966 if (NewAlign > Align && (isSrcConst || AllowUnalign)) {
2967 if (Dst.getOpcode() != ISD::FrameIndex) {
2968 // Can't change destination alignment. It requires a unaligned store.
2972 int FI = cast<FrameIndexSDNode>(Dst)->getIndex();
2973 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
2974 if (MFI->isFixedObjectIndex(FI)) {
2975 // Can't change destination alignment. It requires a unaligned store.
2979 // Give the stack frame object a larger alignment if needed.
2980 if (MFI->getObjectAlignment(FI) < NewAlign)
2981 MFI->setObjectAlignment(FI, NewAlign);
2988 if (VT == MVT::iAny) {
2992 switch (Align & 7) {
2993 case 0: VT = MVT::i64; break;
2994 case 4: VT = MVT::i32; break;
2995 case 2: VT = MVT::i16; break;
2996 default: VT = MVT::i8; break;
3001 while (!TLI.isTypeLegal(LVT))
3002 LVT = (MVT::SimpleValueType)(LVT.getSimpleVT() - 1);
3003 assert(LVT.isInteger());
3009 unsigned NumMemOps = 0;
3011 unsigned VTSize = VT.getSizeInBits() / 8;
3012 while (VTSize > Size) {
3013 // For now, only use non-vector load / store's for the left-over pieces.
3014 if (VT.isVector()) {
3016 while (!TLI.isTypeLegal(VT))
3017 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1);
3018 VTSize = VT.getSizeInBits() / 8;
3020 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1);
3025 if (++NumMemOps > Limit)
3027 MemOps.push_back(VT);
3034 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3035 SDValue Chain, SDValue Dst,
3036 SDValue Src, uint64_t Size,
3037 unsigned Align, bool AlwaysInline,
3038 const Value *DstSV, uint64_t DstSVOff,
3039 const Value *SrcSV, uint64_t SrcSVOff){
3040 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3042 // Expand memcpy to a series of load and store ops if the size operand falls
3043 // below a certain threshold.
3044 std::vector<MVT> MemOps;
3045 uint64_t Limit = -1ULL;
3047 Limit = TLI.getMaxStoresPerMemcpy();
3048 unsigned DstAlign = Align; // Destination alignment can change.
3051 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
3052 Str, CopyFromStr, DAG, TLI))
3056 bool isZeroStr = CopyFromStr && Str.empty();
3057 SmallVector<SDValue, 8> OutChains;
3058 unsigned NumMemOps = MemOps.size();
3059 uint64_t SrcOff = 0, DstOff = 0;
3060 for (unsigned i = 0; i < NumMemOps; i++) {
3062 unsigned VTSize = VT.getSizeInBits() / 8;
3063 SDValue Value, Store;
3065 if (CopyFromStr && (isZeroStr || !VT.isVector())) {
3066 // It's unlikely a store of a vector immediate can be done in a single
3067 // instruction. It would require a load from a constantpool first.
3068 // We also handle store a vector with all zero's.
3069 // FIXME: Handle other cases where store of vector immediate is done in
3070 // a single instruction.
3071 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff);
3072 Store = DAG.getStore(Chain, dl, Value,
3073 getMemBasePlusOffset(Dst, DstOff, DAG),
3074 DstSV, DstSVOff + DstOff, false, DstAlign);
3076 Value = DAG.getLoad(VT, dl, Chain,
3077 getMemBasePlusOffset(Src, SrcOff, DAG),
3078 SrcSV, SrcSVOff + SrcOff, false, Align);
3079 Store = DAG.getStore(Chain, dl, Value,
3080 getMemBasePlusOffset(Dst, DstOff, DAG),
3081 DstSV, DstSVOff + DstOff, false, DstAlign);
3083 OutChains.push_back(Store);
3088 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3089 &OutChains[0], OutChains.size());
3092 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3093 SDValue Chain, SDValue Dst,
3094 SDValue Src, uint64_t Size,
3095 unsigned Align, bool AlwaysInline,
3096 const Value *DstSV, uint64_t DstSVOff,
3097 const Value *SrcSV, uint64_t SrcSVOff){
3098 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3100 // Expand memmove to a series of load and store ops if the size operand falls
3101 // below a certain threshold.
3102 std::vector<MVT> MemOps;
3103 uint64_t Limit = -1ULL;
3105 Limit = TLI.getMaxStoresPerMemmove();
3106 unsigned DstAlign = Align; // Destination alignment can change.
3109 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
3110 Str, CopyFromStr, DAG, TLI))
3113 uint64_t SrcOff = 0, DstOff = 0;
3115 SmallVector<SDValue, 8> LoadValues;
3116 SmallVector<SDValue, 8> LoadChains;
3117 SmallVector<SDValue, 8> OutChains;
3118 unsigned NumMemOps = MemOps.size();
3119 for (unsigned i = 0; i < NumMemOps; i++) {
3121 unsigned VTSize = VT.getSizeInBits() / 8;
3122 SDValue Value, Store;
3124 Value = DAG.getLoad(VT, dl, Chain,
3125 getMemBasePlusOffset(Src, SrcOff, DAG),
3126 SrcSV, SrcSVOff + SrcOff, false, Align);
3127 LoadValues.push_back(Value);
3128 LoadChains.push_back(Value.getValue(1));
3131 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3132 &LoadChains[0], LoadChains.size());
3134 for (unsigned i = 0; i < NumMemOps; i++) {
3136 unsigned VTSize = VT.getSizeInBits() / 8;
3137 SDValue Value, Store;
3139 Store = DAG.getStore(Chain, dl, LoadValues[i],
3140 getMemBasePlusOffset(Dst, DstOff, DAG),
3141 DstSV, DstSVOff + DstOff, false, DstAlign);
3142 OutChains.push_back(Store);
3146 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3147 &OutChains[0], OutChains.size());
3150 static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl,
3151 SDValue Chain, SDValue Dst,
3152 SDValue Src, uint64_t Size,
3154 const Value *DstSV, uint64_t DstSVOff) {
3155 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3157 // Expand memset to a series of load/store ops if the size operand
3158 // falls below a certain threshold.
3159 std::vector<MVT> MemOps;
3162 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, TLI.getMaxStoresPerMemset(),
3163 Size, Align, Str, CopyFromStr, DAG, TLI))
3166 SmallVector<SDValue, 8> OutChains;
3167 uint64_t DstOff = 0;
3169 unsigned NumMemOps = MemOps.size();
3170 for (unsigned i = 0; i < NumMemOps; i++) {
3172 unsigned VTSize = VT.getSizeInBits() / 8;
3173 SDValue Value = getMemsetValue(Src, VT, DAG, dl);
3174 SDValue Store = DAG.getStore(Chain, dl, Value,
3175 getMemBasePlusOffset(Dst, DstOff, DAG),
3176 DstSV, DstSVOff + DstOff);
3177 OutChains.push_back(Store);
3181 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3182 &OutChains[0], OutChains.size());
3185 SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst,
3186 SDValue Src, SDValue Size,
3187 unsigned Align, bool AlwaysInline,
3188 const Value *DstSV, uint64_t DstSVOff,
3189 const Value *SrcSV, uint64_t SrcSVOff) {
3191 // Check to see if we should lower the memcpy to loads and stores first.
3192 // For cases within the target-specified limits, this is the best choice.
3193 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3195 // Memcpy with size zero? Just return the original chain.
3196 if (ConstantSize->isNullValue())
3200 getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3201 ConstantSize->getZExtValue(),
3202 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3203 if (Result.getNode())
3207 // Then check to see if we should lower the memcpy with target-specific
3208 // code. If the target chooses to do this, this is the next best.
3210 TLI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align,
3212 DstSV, DstSVOff, SrcSV, SrcSVOff);
3213 if (Result.getNode())
3216 // If we really need inline code and the target declined to provide it,
3217 // use a (potentially long) sequence of loads and stores.
3219 assert(ConstantSize && "AlwaysInline requires a constant size!");
3220 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3221 ConstantSize->getZExtValue(), Align, true,
3222 DstSV, DstSVOff, SrcSV, SrcSVOff);
3225 // Emit a library call.
3226 TargetLowering::ArgListTy Args;
3227 TargetLowering::ArgListEntry Entry;
3228 Entry.Ty = TLI.getTargetData()->getIntPtrType();
3229 Entry.Node = Dst; Args.push_back(Entry);
3230 Entry.Node = Src; Args.push_back(Entry);
3231 Entry.Node = Size; Args.push_back(Entry);
3232 // FIXME: pass in DebugLoc
3233 std::pair<SDValue,SDValue> CallResult =
3234 TLI.LowerCallTo(Chain, Type::VoidTy,
3235 false, false, false, false, CallingConv::C, false,
3236 getExternalSymbol("memcpy", TLI.getPointerTy()),
3238 return CallResult.second;
3241 SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst,
3242 SDValue Src, SDValue Size,
3244 const Value *DstSV, uint64_t DstSVOff,
3245 const Value *SrcSV, uint64_t SrcSVOff) {
3247 // Check to see if we should lower the memmove to loads and stores first.
3248 // For cases within the target-specified limits, this is the best choice.
3249 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3251 // Memmove with size zero? Just return the original chain.
3252 if (ConstantSize->isNullValue())
3256 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
3257 ConstantSize->getZExtValue(),
3258 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3259 if (Result.getNode())
3263 // Then check to see if we should lower the memmove with target-specific
3264 // code. If the target chooses to do this, this is the next best.
3266 TLI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align,
3267 DstSV, DstSVOff, SrcSV, SrcSVOff);
3268 if (Result.getNode())
3271 // Emit a library call.
3272 TargetLowering::ArgListTy Args;
3273 TargetLowering::ArgListEntry Entry;
3274 Entry.Ty = TLI.getTargetData()->getIntPtrType();
3275 Entry.Node = Dst; Args.push_back(Entry);
3276 Entry.Node = Src; Args.push_back(Entry);
3277 Entry.Node = Size; Args.push_back(Entry);
3278 // FIXME: pass in DebugLoc
3279 std::pair<SDValue,SDValue> CallResult =
3280 TLI.LowerCallTo(Chain, Type::VoidTy,
3281 false, false, false, false, CallingConv::C, false,
3282 getExternalSymbol("memmove", TLI.getPointerTy()),
3284 return CallResult.second;
3287 SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst,
3288 SDValue Src, SDValue Size,
3290 const Value *DstSV, uint64_t DstSVOff) {
3292 // Check to see if we should lower the memset to stores first.
3293 // For cases within the target-specified limits, this is the best choice.
3294 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3296 // Memset with size zero? Just return the original chain.
3297 if (ConstantSize->isNullValue())
3301 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
3302 Align, DstSV, DstSVOff);
3303 if (Result.getNode())
3307 // Then check to see if we should lower the memset with target-specific
3308 // code. If the target chooses to do this, this is the next best.
3310 TLI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align,
3312 if (Result.getNode())
3315 // Emit a library call.
3316 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType();
3317 TargetLowering::ArgListTy Args;
3318 TargetLowering::ArgListEntry Entry;
3319 Entry.Node = Dst; Entry.Ty = IntPtrTy;
3320 Args.push_back(Entry);
3321 // Extend or truncate the argument to be an i32 value for the call.
3322 if (Src.getValueType().bitsGT(MVT::i32))
3323 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
3325 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
3326 Entry.Node = Src; Entry.Ty = Type::Int32Ty; Entry.isSExt = true;
3327 Args.push_back(Entry);
3328 Entry.Node = Size; Entry.Ty = IntPtrTy; Entry.isSExt = false;
3329 Args.push_back(Entry);
3330 // FIXME: pass in DebugLoc
3331 std::pair<SDValue,SDValue> CallResult =
3332 TLI.LowerCallTo(Chain, Type::VoidTy,
3333 false, false, false, false, CallingConv::C, false,
3334 getExternalSymbol("memset", TLI.getPointerTy()),
3336 return CallResult.second;
3339 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, MVT MemVT,
3341 SDValue Ptr, SDValue Cmp,
3342 SDValue Swp, const Value* PtrVal,
3343 unsigned Alignment) {
3344 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
3345 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3347 MVT VT = Cmp.getValueType();
3349 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3350 Alignment = getMVTAlignment(MemVT);
3352 SDVTList VTs = getVTList(VT, MVT::Other);
3353 FoldingSetNodeID ID;
3354 ID.AddInteger(MemVT.getRawBits());
3355 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3356 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3358 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3359 return SDValue(E, 0);
3360 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3361 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT,
3362 Chain, Ptr, Cmp, Swp, PtrVal, Alignment);
3363 CSEMap.InsertNode(N, IP);
3364 AllNodes.push_back(N);
3365 return SDValue(N, 0);
3368 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, MVT MemVT,
3370 SDValue Ptr, SDValue Val,
3371 const Value* PtrVal,
3372 unsigned Alignment) {
3373 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
3374 Opcode == ISD::ATOMIC_LOAD_SUB ||
3375 Opcode == ISD::ATOMIC_LOAD_AND ||
3376 Opcode == ISD::ATOMIC_LOAD_OR ||
3377 Opcode == ISD::ATOMIC_LOAD_XOR ||
3378 Opcode == ISD::ATOMIC_LOAD_NAND ||
3379 Opcode == ISD::ATOMIC_LOAD_MIN ||
3380 Opcode == ISD::ATOMIC_LOAD_MAX ||
3381 Opcode == ISD::ATOMIC_LOAD_UMIN ||
3382 Opcode == ISD::ATOMIC_LOAD_UMAX ||
3383 Opcode == ISD::ATOMIC_SWAP) &&
3384 "Invalid Atomic Op");
3386 MVT VT = Val.getValueType();
3388 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3389 Alignment = getMVTAlignment(MemVT);
3391 SDVTList VTs = getVTList(VT, MVT::Other);
3392 FoldingSetNodeID ID;
3393 ID.AddInteger(MemVT.getRawBits());
3394 SDValue Ops[] = {Chain, Ptr, Val};
3395 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3397 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3398 return SDValue(E, 0);
3399 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3400 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT,
3401 Chain, Ptr, Val, PtrVal, Alignment);
3402 CSEMap.InsertNode(N, IP);
3403 AllNodes.push_back(N);
3404 return SDValue(N, 0);
3407 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
3408 /// Allowed to return something different (and simpler) if Simplify is true.
3409 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps,
3414 SmallVector<MVT, 4> VTs;
3415 VTs.reserve(NumOps);
3416 for (unsigned i = 0; i < NumOps; ++i)
3417 VTs.push_back(Ops[i].getValueType());
3418 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps),
3423 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl,
3424 const MVT *VTs, unsigned NumVTs,
3425 const SDValue *Ops, unsigned NumOps,
3426 MVT MemVT, const Value *srcValue, int SVOff,
3427 unsigned Align, bool Vol,
3428 bool ReadMem, bool WriteMem) {
3429 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps,
3430 MemVT, srcValue, SVOff, Align, Vol,
3435 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
3436 const SDValue *Ops, unsigned NumOps,
3437 MVT MemVT, const Value *srcValue, int SVOff,
3438 unsigned Align, bool Vol,
3439 bool ReadMem, bool WriteMem) {
3440 // Memoize the node unless it returns a flag.
3441 MemIntrinsicSDNode *N;
3442 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3443 FoldingSetNodeID ID;
3444 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3446 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3447 return SDValue(E, 0);
3449 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3450 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT,
3451 srcValue, SVOff, Align, Vol, ReadMem, WriteMem);
3452 CSEMap.InsertNode(N, IP);
3454 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3455 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT,
3456 srcValue, SVOff, Align, Vol, ReadMem, WriteMem);
3458 AllNodes.push_back(N);
3459 return SDValue(N, 0);
3463 SelectionDAG::getCall(unsigned CallingConv, DebugLoc dl, bool IsVarArgs,
3464 bool IsTailCall, bool IsInreg, SDVTList VTs,
3465 const SDValue *Operands, unsigned NumOperands) {
3466 // Do not include isTailCall in the folding set profile.
3467 FoldingSetNodeID ID;
3468 AddNodeIDNode(ID, ISD::CALL, VTs, Operands, NumOperands);
3469 ID.AddInteger(CallingConv);
3470 ID.AddInteger(IsVarArgs);
3472 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3473 // Instead of including isTailCall in the folding set, we just
3474 // set the flag of the existing node.
3476 cast<CallSDNode>(E)->setNotTailCall();
3477 return SDValue(E, 0);
3479 SDNode *N = NodeAllocator.Allocate<CallSDNode>();
3480 new (N) CallSDNode(CallingConv, dl, IsVarArgs, IsTailCall, IsInreg,
3481 VTs, Operands, NumOperands);
3482 CSEMap.InsertNode(N, IP);
3483 AllNodes.push_back(N);
3484 return SDValue(N, 0);
3488 SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl,
3489 ISD::LoadExtType ExtType, MVT VT, SDValue Chain,
3490 SDValue Ptr, SDValue Offset,
3491 const Value *SV, int SVOffset, MVT EVT,
3492 bool isVolatile, unsigned Alignment) {
3493 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3494 Alignment = getMVTAlignment(VT);
3497 ExtType = ISD::NON_EXTLOAD;
3498 } else if (ExtType == ISD::NON_EXTLOAD) {
3499 assert(VT == EVT && "Non-extending load from different memory type!");
3503 assert(EVT.getVectorNumElements() == VT.getVectorNumElements() &&
3504 "Invalid vector extload!");
3506 assert(EVT.bitsLT(VT) &&
3507 "Should only be an extending load, not truncating!");
3508 assert((ExtType == ISD::EXTLOAD || VT.isInteger()) &&
3509 "Cannot sign/zero extend a FP/Vector load!");
3510 assert(VT.isInteger() == EVT.isInteger() &&
3511 "Cannot convert from FP to Int or Int -> FP!");
3514 bool Indexed = AM != ISD::UNINDEXED;
3515 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
3516 "Unindexed load with an offset!");
3518 SDVTList VTs = Indexed ?
3519 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
3520 SDValue Ops[] = { Chain, Ptr, Offset };
3521 FoldingSetNodeID ID;
3522 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
3523 ID.AddInteger(EVT.getRawBits());
3524 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, isVolatile, Alignment));
3526 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3527 return SDValue(E, 0);
3528 SDNode *N = NodeAllocator.Allocate<LoadSDNode>();
3529 new (N) LoadSDNode(Ops, dl, VTs, AM, ExtType, EVT, SV, SVOffset,
3530 Alignment, isVolatile);
3531 CSEMap.InsertNode(N, IP);
3532 AllNodes.push_back(N);
3533 return SDValue(N, 0);
3536 SDValue SelectionDAG::getLoad(MVT VT, DebugLoc dl,
3537 SDValue Chain, SDValue Ptr,
3538 const Value *SV, int SVOffset,
3539 bool isVolatile, unsigned Alignment) {
3540 SDValue Undef = getUNDEF(Ptr.getValueType());
3541 return getLoad(ISD::UNINDEXED, dl, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef,
3542 SV, SVOffset, VT, isVolatile, Alignment);
3545 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, MVT VT,
3546 SDValue Chain, SDValue Ptr,
3548 int SVOffset, MVT EVT,
3549 bool isVolatile, unsigned Alignment) {
3550 SDValue Undef = getUNDEF(Ptr.getValueType());
3551 return getLoad(ISD::UNINDEXED, dl, ExtType, VT, Chain, Ptr, Undef,
3552 SV, SVOffset, EVT, isVolatile, Alignment);
3556 SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base,
3557 SDValue Offset, ISD::MemIndexedMode AM) {
3558 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
3559 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
3560 "Load is already a indexed load!");
3561 return getLoad(AM, dl, LD->getExtensionType(), OrigLoad.getValueType(),
3562 LD->getChain(), Base, Offset, LD->getSrcValue(),
3563 LD->getSrcValueOffset(), LD->getMemoryVT(),
3564 LD->isVolatile(), LD->getAlignment());
3567 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
3568 SDValue Ptr, const Value *SV, int SVOffset,
3569 bool isVolatile, unsigned Alignment) {
3570 MVT VT = Val.getValueType();
3572 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3573 Alignment = getMVTAlignment(VT);
3575 SDVTList VTs = getVTList(MVT::Other);
3576 SDValue Undef = getUNDEF(Ptr.getValueType());
3577 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3578 FoldingSetNodeID ID;
3579 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3580 ID.AddInteger(VT.getRawBits());
3581 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED,
3582 isVolatile, Alignment));
3584 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3585 return SDValue(E, 0);
3586 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3587 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, false,
3588 VT, SV, SVOffset, Alignment, isVolatile);
3589 CSEMap.InsertNode(N, IP);
3590 AllNodes.push_back(N);
3591 return SDValue(N, 0);
3594 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
3595 SDValue Ptr, const Value *SV,
3596 int SVOffset, MVT SVT,
3597 bool isVolatile, unsigned Alignment) {
3598 MVT VT = Val.getValueType();
3601 return getStore(Chain, dl, Val, Ptr, SV, SVOffset, isVolatile, Alignment);
3603 assert(VT.bitsGT(SVT) && "Not a truncation?");
3604 assert(VT.isInteger() == SVT.isInteger() &&
3605 "Can't do FP-INT conversion!");
3607 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3608 Alignment = getMVTAlignment(VT);
3610 SDVTList VTs = getVTList(MVT::Other);
3611 SDValue Undef = getUNDEF(Ptr.getValueType());
3612 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3613 FoldingSetNodeID ID;
3614 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3615 ID.AddInteger(SVT.getRawBits());
3616 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED,
3617 isVolatile, Alignment));
3619 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3620 return SDValue(E, 0);
3621 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3622 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, true,
3623 SVT, SV, SVOffset, Alignment, isVolatile);
3624 CSEMap.InsertNode(N, IP);
3625 AllNodes.push_back(N);
3626 return SDValue(N, 0);
3630 SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base,
3631 SDValue Offset, ISD::MemIndexedMode AM) {
3632 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
3633 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
3634 "Store is already a indexed store!");
3635 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
3636 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
3637 FoldingSetNodeID ID;
3638 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3639 ID.AddInteger(ST->getMemoryVT().getRawBits());
3640 ID.AddInteger(ST->getRawSubclassData());
3642 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3643 return SDValue(E, 0);
3644 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3645 new (N) StoreSDNode(Ops, dl, VTs, AM,
3646 ST->isTruncatingStore(), ST->getMemoryVT(),
3647 ST->getSrcValue(), ST->getSrcValueOffset(),
3648 ST->getAlignment(), ST->isVolatile());
3649 CSEMap.InsertNode(N, IP);
3650 AllNodes.push_back(N);
3651 return SDValue(N, 0);
3654 SDValue SelectionDAG::getVAArg(MVT VT, DebugLoc dl,
3655 SDValue Chain, SDValue Ptr,
3657 SDValue Ops[] = { Chain, Ptr, SV };
3658 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 3);
3661 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
3662 const SDUse *Ops, unsigned NumOps) {
3664 case 0: return getNode(Opcode, DL, VT);
3665 case 1: return getNode(Opcode, DL, VT, Ops[0]);
3666 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
3667 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
3671 // Copy from an SDUse array into an SDValue array for use with
3672 // the regular getNode logic.
3673 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
3674 return getNode(Opcode, DL, VT, &NewOps[0], NumOps);
3677 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
3678 const SDValue *Ops, unsigned NumOps) {
3680 case 0: return getNode(Opcode, DL, VT);
3681 case 1: return getNode(Opcode, DL, VT, Ops[0]);
3682 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
3683 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
3689 case ISD::SELECT_CC: {
3690 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
3691 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
3692 "LHS and RHS of condition must have same type!");
3693 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
3694 "True and False arms of SelectCC must have same type!");
3695 assert(Ops[2].getValueType() == VT &&
3696 "select_cc node must be of same type as true and false value!");
3700 assert(NumOps == 5 && "BR_CC takes 5 operands!");
3701 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
3702 "LHS/RHS of comparison should match types!");
3709 SDVTList VTs = getVTList(VT);
3711 if (VT != MVT::Flag) {
3712 FoldingSetNodeID ID;
3713 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
3716 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3717 return SDValue(E, 0);
3719 N = NodeAllocator.Allocate<SDNode>();
3720 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps);
3721 CSEMap.InsertNode(N, IP);
3723 N = NodeAllocator.Allocate<SDNode>();
3724 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps);
3727 AllNodes.push_back(N);
3731 return SDValue(N, 0);
3734 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
3735 const std::vector<MVT> &ResultTys,
3736 const SDValue *Ops, unsigned NumOps) {
3737 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()),
3741 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
3742 const MVT *VTs, unsigned NumVTs,
3743 const SDValue *Ops, unsigned NumOps) {
3745 return getNode(Opcode, DL, VTs[0], Ops, NumOps);
3746 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps);
3749 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
3750 const SDValue *Ops, unsigned NumOps) {
3751 if (VTList.NumVTs == 1)
3752 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps);
3755 // FIXME: figure out how to safely handle things like
3756 // int foo(int x) { return 1 << (x & 255); }
3757 // int bar() { return foo(256); }
3759 case ISD::SRA_PARTS:
3760 case ISD::SRL_PARTS:
3761 case ISD::SHL_PARTS:
3762 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
3763 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
3764 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
3765 else if (N3.getOpcode() == ISD::AND)
3766 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
3767 // If the and is only masking out bits that cannot effect the shift,
3768 // eliminate the and.
3769 unsigned NumBits = VT.getSizeInBits()*2;
3770 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
3771 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
3777 // Memoize the node unless it returns a flag.
3779 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3780 FoldingSetNodeID ID;
3781 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3783 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3784 return SDValue(E, 0);
3786 N = NodeAllocator.Allocate<UnarySDNode>();
3787 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]);
3788 } else if (NumOps == 2) {
3789 N = NodeAllocator.Allocate<BinarySDNode>();
3790 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
3791 } else if (NumOps == 3) {
3792 N = NodeAllocator.Allocate<TernarySDNode>();
3793 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]);
3795 N = NodeAllocator.Allocate<SDNode>();
3796 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps);
3798 CSEMap.InsertNode(N, IP);
3801 N = NodeAllocator.Allocate<UnarySDNode>();
3802 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]);
3803 } else if (NumOps == 2) {
3804 N = NodeAllocator.Allocate<BinarySDNode>();
3805 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
3806 } else if (NumOps == 3) {
3807 N = NodeAllocator.Allocate<TernarySDNode>();
3808 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]);
3810 N = NodeAllocator.Allocate<SDNode>();
3811 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps);
3814 AllNodes.push_back(N);
3818 return SDValue(N, 0);
3821 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) {
3822 return getNode(Opcode, DL, VTList, 0, 0);
3825 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
3827 SDValue Ops[] = { N1 };
3828 return getNode(Opcode, DL, VTList, Ops, 1);
3831 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
3832 SDValue N1, SDValue N2) {
3833 SDValue Ops[] = { N1, N2 };
3834 return getNode(Opcode, DL, VTList, Ops, 2);
3837 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
3838 SDValue N1, SDValue N2, SDValue N3) {
3839 SDValue Ops[] = { N1, N2, N3 };
3840 return getNode(Opcode, DL, VTList, Ops, 3);
3843 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
3844 SDValue N1, SDValue N2, SDValue N3,
3846 SDValue Ops[] = { N1, N2, N3, N4 };
3847 return getNode(Opcode, DL, VTList, Ops, 4);
3850 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
3851 SDValue N1, SDValue N2, SDValue N3,
3852 SDValue N4, SDValue N5) {
3853 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3854 return getNode(Opcode, DL, VTList, Ops, 5);
3857 SDVTList SelectionDAG::getVTList(MVT VT) {
3858 return makeVTList(SDNode::getValueTypeList(VT), 1);
3861 SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2) {
3862 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
3863 E = VTList.rend(); I != E; ++I)
3864 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
3867 MVT *Array = Allocator.Allocate<MVT>(2);
3870 SDVTList Result = makeVTList(Array, 2);
3871 VTList.push_back(Result);
3875 SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2, MVT VT3) {
3876 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
3877 E = VTList.rend(); I != E; ++I)
3878 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
3882 MVT *Array = Allocator.Allocate<MVT>(3);
3886 SDVTList Result = makeVTList(Array, 3);
3887 VTList.push_back(Result);
3891 SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2, MVT VT3, MVT VT4) {
3892 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
3893 E = VTList.rend(); I != E; ++I)
3894 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
3895 I->VTs[2] == VT3 && I->VTs[3] == VT4)
3898 MVT *Array = Allocator.Allocate<MVT>(3);
3903 SDVTList Result = makeVTList(Array, 4);
3904 VTList.push_back(Result);
3908 SDVTList SelectionDAG::getVTList(const MVT *VTs, unsigned NumVTs) {
3910 case 0: assert(0 && "Cannot have nodes without results!");
3911 case 1: return getVTList(VTs[0]);
3912 case 2: return getVTList(VTs[0], VTs[1]);
3913 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
3917 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
3918 E = VTList.rend(); I != E; ++I) {
3919 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
3922 bool NoMatch = false;
3923 for (unsigned i = 2; i != NumVTs; ++i)
3924 if (VTs[i] != I->VTs[i]) {
3932 MVT *Array = Allocator.Allocate<MVT>(NumVTs);
3933 std::copy(VTs, VTs+NumVTs, Array);
3934 SDVTList Result = makeVTList(Array, NumVTs);
3935 VTList.push_back(Result);
3940 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
3941 /// specified operands. If the resultant node already exists in the DAG,
3942 /// this does not modify the specified node, instead it returns the node that
3943 /// already exists. If the resultant node does not exist in the DAG, the
3944 /// input node is returned. As a degenerate case, if you specify the same
3945 /// input operands as the node already has, the input node is returned.
3946 SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) {
3947 SDNode *N = InN.getNode();
3948 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
3950 // Check to see if there is no change.
3951 if (Op == N->getOperand(0)) return InN;
3953 // See if the modified node already exists.
3954 void *InsertPos = 0;
3955 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
3956 return SDValue(Existing, InN.getResNo());
3958 // Nope it doesn't. Remove the node from its current place in the maps.
3960 if (!RemoveNodeFromCSEMaps(N))
3963 // Now we update the operands.
3964 N->OperandList[0].set(Op);
3966 // If this gets put into a CSE map, add it.
3967 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
3971 SDValue SelectionDAG::
3972 UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) {
3973 SDNode *N = InN.getNode();
3974 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
3976 // Check to see if there is no change.
3977 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
3978 return InN; // No operands changed, just return the input node.
3980 // See if the modified node already exists.
3981 void *InsertPos = 0;
3982 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
3983 return SDValue(Existing, InN.getResNo());
3985 // Nope it doesn't. Remove the node from its current place in the maps.
3987 if (!RemoveNodeFromCSEMaps(N))
3990 // Now we update the operands.
3991 if (N->OperandList[0] != Op1)
3992 N->OperandList[0].set(Op1);
3993 if (N->OperandList[1] != Op2)
3994 N->OperandList[1].set(Op2);
3996 // If this gets put into a CSE map, add it.
3997 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4001 SDValue SelectionDAG::
4002 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) {
4003 SDValue Ops[] = { Op1, Op2, Op3 };
4004 return UpdateNodeOperands(N, Ops, 3);
4007 SDValue SelectionDAG::
4008 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
4009 SDValue Op3, SDValue Op4) {
4010 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
4011 return UpdateNodeOperands(N, Ops, 4);
4014 SDValue SelectionDAG::
4015 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
4016 SDValue Op3, SDValue Op4, SDValue Op5) {
4017 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
4018 return UpdateNodeOperands(N, Ops, 5);
4021 SDValue SelectionDAG::
4022 UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) {
4023 SDNode *N = InN.getNode();
4024 assert(N->getNumOperands() == NumOps &&
4025 "Update with wrong number of operands");
4027 // Check to see if there is no change.
4028 bool AnyChange = false;
4029 for (unsigned i = 0; i != NumOps; ++i) {
4030 if (Ops[i] != N->getOperand(i)) {
4036 // No operands changed, just return the input node.
4037 if (!AnyChange) return InN;
4039 // See if the modified node already exists.
4040 void *InsertPos = 0;
4041 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
4042 return SDValue(Existing, InN.getResNo());
4044 // Nope it doesn't. Remove the node from its current place in the maps.
4046 if (!RemoveNodeFromCSEMaps(N))
4049 // Now we update the operands.
4050 for (unsigned i = 0; i != NumOps; ++i)
4051 if (N->OperandList[i] != Ops[i])
4052 N->OperandList[i].set(Ops[i]);
4054 // If this gets put into a CSE map, add it.
4055 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4059 /// DropOperands - Release the operands and set this node to have
4061 void SDNode::DropOperands() {
4062 // Unlike the code in MorphNodeTo that does this, we don't need to
4063 // watch for dead nodes here.
4064 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
4070 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
4073 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4075 SDVTList VTs = getVTList(VT);
4076 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
4079 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4080 MVT VT, SDValue Op1) {
4081 SDVTList VTs = getVTList(VT);
4082 SDValue Ops[] = { Op1 };
4083 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4086 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4087 MVT VT, SDValue Op1,
4089 SDVTList VTs = getVTList(VT);
4090 SDValue Ops[] = { Op1, Op2 };
4091 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4094 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4095 MVT VT, SDValue Op1,
4096 SDValue Op2, SDValue Op3) {
4097 SDVTList VTs = getVTList(VT);
4098 SDValue Ops[] = { Op1, Op2, Op3 };
4099 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4102 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4103 MVT VT, const SDValue *Ops,
4105 SDVTList VTs = getVTList(VT);
4106 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4109 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4110 MVT VT1, MVT VT2, const SDValue *Ops,
4112 SDVTList VTs = getVTList(VT1, VT2);
4113 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4116 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4118 SDVTList VTs = getVTList(VT1, VT2);
4119 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
4122 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4123 MVT VT1, MVT VT2, MVT VT3,
4124 const SDValue *Ops, unsigned NumOps) {
4125 SDVTList VTs = getVTList(VT1, VT2, VT3);
4126 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4129 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4130 MVT VT1, MVT VT2, MVT VT3, MVT VT4,
4131 const SDValue *Ops, unsigned NumOps) {
4132 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4133 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4136 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4139 SDVTList VTs = getVTList(VT1, VT2);
4140 SDValue Ops[] = { Op1 };
4141 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4144 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4146 SDValue Op1, SDValue Op2) {
4147 SDVTList VTs = getVTList(VT1, VT2);
4148 SDValue Ops[] = { Op1, Op2 };
4149 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4152 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4154 SDValue Op1, SDValue Op2,
4156 SDVTList VTs = getVTList(VT1, VT2);
4157 SDValue Ops[] = { Op1, Op2, Op3 };
4158 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4161 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4162 MVT VT1, MVT VT2, MVT VT3,
4163 SDValue Op1, SDValue Op2,
4165 SDVTList VTs = getVTList(VT1, VT2, VT3);
4166 SDValue Ops[] = { Op1, Op2, Op3 };
4167 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4170 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4171 SDVTList VTs, const SDValue *Ops,
4173 return MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
4176 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4178 SDVTList VTs = getVTList(VT);
4179 return MorphNodeTo(N, Opc, VTs, 0, 0);
4182 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4183 MVT VT, SDValue Op1) {
4184 SDVTList VTs = getVTList(VT);
4185 SDValue Ops[] = { Op1 };
4186 return MorphNodeTo(N, Opc, VTs, Ops, 1);
4189 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4190 MVT VT, SDValue Op1,
4192 SDVTList VTs = getVTList(VT);
4193 SDValue Ops[] = { Op1, Op2 };
4194 return MorphNodeTo(N, Opc, VTs, Ops, 2);
4197 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4198 MVT VT, SDValue Op1,
4199 SDValue Op2, SDValue Op3) {
4200 SDVTList VTs = getVTList(VT);
4201 SDValue Ops[] = { Op1, Op2, Op3 };
4202 return MorphNodeTo(N, Opc, VTs, Ops, 3);
4205 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4206 MVT VT, const SDValue *Ops,
4208 SDVTList VTs = getVTList(VT);
4209 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4212 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4213 MVT VT1, MVT VT2, const SDValue *Ops,
4215 SDVTList VTs = getVTList(VT1, VT2);
4216 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4219 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4221 SDVTList VTs = getVTList(VT1, VT2);
4222 return MorphNodeTo(N, Opc, VTs, (SDValue *)0, 0);
4225 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4226 MVT VT1, MVT VT2, MVT VT3,
4227 const SDValue *Ops, unsigned NumOps) {
4228 SDVTList VTs = getVTList(VT1, VT2, VT3);
4229 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4232 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4235 SDVTList VTs = getVTList(VT1, VT2);
4236 SDValue Ops[] = { Op1 };
4237 return MorphNodeTo(N, Opc, VTs, Ops, 1);
4240 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4242 SDValue Op1, SDValue Op2) {
4243 SDVTList VTs = getVTList(VT1, VT2);
4244 SDValue Ops[] = { Op1, Op2 };
4245 return MorphNodeTo(N, Opc, VTs, Ops, 2);
4248 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4250 SDValue Op1, SDValue Op2,
4252 SDVTList VTs = getVTList(VT1, VT2);
4253 SDValue Ops[] = { Op1, Op2, Op3 };
4254 return MorphNodeTo(N, Opc, VTs, Ops, 3);
4257 /// MorphNodeTo - These *mutate* the specified node to have the specified
4258 /// return type, opcode, and operands.
4260 /// Note that MorphNodeTo returns the resultant node. If there is already a
4261 /// node of the specified opcode and operands, it returns that node instead of
4262 /// the current one. Note that the DebugLoc need not be the same.
4264 /// Using MorphNodeTo is faster than creating a new node and swapping it in
4265 /// with ReplaceAllUsesWith both because it often avoids allocating a new
4266 /// node, and because it doesn't require CSE recalculation for any of
4267 /// the node's users.
4269 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4270 SDVTList VTs, const SDValue *Ops,
4272 // If an identical node already exists, use it.
4274 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) {
4275 FoldingSetNodeID ID;
4276 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
4277 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
4281 if (!RemoveNodeFromCSEMaps(N))
4284 // Start the morphing.
4286 N->ValueList = VTs.VTs;
4287 N->NumValues = VTs.NumVTs;
4289 // Clear the operands list, updating used nodes to remove this from their
4290 // use list. Keep track of any operands that become dead as a result.
4291 SmallPtrSet<SDNode*, 16> DeadNodeSet;
4292 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
4294 SDNode *Used = Use.getNode();
4296 if (Used->use_empty())
4297 DeadNodeSet.insert(Used);
4300 // If NumOps is larger than the # of operands we currently have, reallocate
4301 // the operand list.
4302 if (NumOps > N->NumOperands) {
4303 if (N->OperandsNeedDelete)
4304 delete[] N->OperandList;
4306 if (N->isMachineOpcode()) {
4307 // We're creating a final node that will live unmorphed for the
4308 // remainder of the current SelectionDAG iteration, so we can allocate
4309 // the operands directly out of a pool with no recycling metadata.
4310 N->OperandList = OperandAllocator.Allocate<SDUse>(NumOps);
4311 N->OperandsNeedDelete = false;
4313 N->OperandList = new SDUse[NumOps];
4314 N->OperandsNeedDelete = true;
4318 // Assign the new operands.
4319 N->NumOperands = NumOps;
4320 for (unsigned i = 0, e = NumOps; i != e; ++i) {
4321 N->OperandList[i].setUser(N);
4322 N->OperandList[i].setInitial(Ops[i]);
4325 // Delete any nodes that are still dead after adding the uses for the
4327 SmallVector<SDNode *, 16> DeadNodes;
4328 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
4329 E = DeadNodeSet.end(); I != E; ++I)
4330 if ((*I)->use_empty())
4331 DeadNodes.push_back(*I);
4332 RemoveDeadNodes(DeadNodes);
4335 CSEMap.InsertNode(N, IP); // Memoize the new node.
4340 /// getTargetNode - These are used for target selectors to create a new node
4341 /// with specified return type(s), target opcode, and operands.
4343 /// Note that getTargetNode returns the resultant node. If there is already a
4344 /// node of the specified opcode and operands, it returns that node instead of
4345 /// the current one.
4346 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT) {
4347 return getNode(~Opcode, dl, VT).getNode();
4350 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT,
4352 return getNode(~Opcode, dl, VT, Op1).getNode();
4355 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT,
4356 SDValue Op1, SDValue Op2) {
4357 return getNode(~Opcode, dl, VT, Op1, Op2).getNode();
4360 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT,
4361 SDValue Op1, SDValue Op2,
4363 return getNode(~Opcode, dl, VT, Op1, Op2, Op3).getNode();
4366 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT,
4367 const SDValue *Ops, unsigned NumOps) {
4368 return getNode(~Opcode, dl, VT, Ops, NumOps).getNode();
4371 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4373 SDVTList VTs = getVTList(VT1, VT2);
4375 return getNode(~Opcode, dl, VTs, &Op, 0).getNode();
4378 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1,
4379 MVT VT2, SDValue Op1) {
4380 SDVTList VTs = getVTList(VT1, VT2);
4381 return getNode(~Opcode, dl, VTs, &Op1, 1).getNode();
4384 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1,
4385 MVT VT2, SDValue Op1,
4387 SDVTList VTs = getVTList(VT1, VT2);
4388 SDValue Ops[] = { Op1, Op2 };
4389 return getNode(~Opcode, dl, VTs, Ops, 2).getNode();
4392 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1,
4393 MVT VT2, SDValue Op1,
4394 SDValue Op2, SDValue Op3) {
4395 SDVTList VTs = getVTList(VT1, VT2);
4396 SDValue Ops[] = { Op1, Op2, Op3 };
4397 return getNode(~Opcode, dl, VTs, Ops, 3).getNode();
4400 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4402 const SDValue *Ops, unsigned NumOps) {
4403 SDVTList VTs = getVTList(VT1, VT2);
4404 return getNode(~Opcode, dl, VTs, Ops, NumOps).getNode();
4407 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4408 MVT VT1, MVT VT2, MVT VT3,
4409 SDValue Op1, SDValue Op2) {
4410 SDVTList VTs = getVTList(VT1, VT2, VT3);
4411 SDValue Ops[] = { Op1, Op2 };
4412 return getNode(~Opcode, dl, VTs, Ops, 2).getNode();
4415 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4416 MVT VT1, MVT VT2, MVT VT3,
4417 SDValue Op1, SDValue Op2,
4419 SDVTList VTs = getVTList(VT1, VT2, VT3);
4420 SDValue Ops[] = { Op1, Op2, Op3 };
4421 return getNode(~Opcode, dl, VTs, Ops, 3).getNode();
4424 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4425 MVT VT1, MVT VT2, MVT VT3,
4426 const SDValue *Ops, unsigned NumOps) {
4427 SDVTList VTs = getVTList(VT1, VT2, VT3);
4428 return getNode(~Opcode, dl, VTs, Ops, NumOps).getNode();
4431 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1,
4432 MVT VT2, MVT VT3, MVT VT4,
4433 const SDValue *Ops, unsigned NumOps) {
4434 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4435 return getNode(~Opcode, dl, VTs, Ops, NumOps).getNode();
4438 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4439 const std::vector<MVT> &ResultTys,
4440 const SDValue *Ops, unsigned NumOps) {
4441 return getNode(~Opcode, dl, ResultTys, Ops, NumOps).getNode();
4444 /// getNodeIfExists - Get the specified node if it's already available, or
4445 /// else return NULL.
4446 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
4447 const SDValue *Ops, unsigned NumOps) {
4448 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4449 FoldingSetNodeID ID;
4450 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4452 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4458 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4459 /// This can cause recursive merging of nodes in the DAG.
4461 /// This version assumes From has a single result value.
4463 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To,
4464 DAGUpdateListener *UpdateListener) {
4465 SDNode *From = FromN.getNode();
4466 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
4467 "Cannot replace with this method!");
4468 assert(From != To.getNode() && "Cannot replace uses of with self");
4470 // Iterate over all the existing uses of From. New uses will be added
4471 // to the beginning of the use list, which we avoid visiting.
4472 // This specifically avoids visiting uses of From that arise while the
4473 // replacement is happening, because any such uses would be the result
4474 // of CSE: If an existing node looks like From after one of its operands
4475 // is replaced by To, we don't want to replace of all its users with To
4476 // too. See PR3018 for more info.
4477 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
4481 // This node is about to morph, remove its old self from the CSE maps.
4482 RemoveNodeFromCSEMaps(User);
4484 // A user can appear in a use list multiple times, and when this
4485 // happens the uses are usually next to each other in the list.
4486 // To help reduce the number of CSE recomputations, process all
4487 // the uses of this user that we can find this way.
4489 SDUse &Use = UI.getUse();
4492 } while (UI != UE && *UI == User);
4494 // Now that we have modified User, add it back to the CSE maps. If it
4495 // already exists there, recursively merge the results together.
4496 AddModifiedNodeToCSEMaps(User, UpdateListener);
4500 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4501 /// This can cause recursive merging of nodes in the DAG.
4503 /// This version assumes that for each value of From, there is a
4504 /// corresponding value in To in the same position with the same type.
4506 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To,
4507 DAGUpdateListener *UpdateListener) {
4509 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
4510 assert((!From->hasAnyUseOfValue(i) ||
4511 From->getValueType(i) == To->getValueType(i)) &&
4512 "Cannot use this version of ReplaceAllUsesWith!");
4515 // Handle the trivial case.
4519 // Iterate over just the existing users of From. See the comments in
4520 // the ReplaceAllUsesWith above.
4521 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
4525 // This node is about to morph, remove its old self from the CSE maps.
4526 RemoveNodeFromCSEMaps(User);
4528 // A user can appear in a use list multiple times, and when this
4529 // happens the uses are usually next to each other in the list.
4530 // To help reduce the number of CSE recomputations, process all
4531 // the uses of this user that we can find this way.
4533 SDUse &Use = UI.getUse();
4536 } while (UI != UE && *UI == User);
4538 // Now that we have modified User, add it back to the CSE maps. If it
4539 // already exists there, recursively merge the results together.
4540 AddModifiedNodeToCSEMaps(User, UpdateListener);
4544 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4545 /// This can cause recursive merging of nodes in the DAG.
4547 /// This version can replace From with any result values. To must match the
4548 /// number and types of values returned by From.
4549 void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
4551 DAGUpdateListener *UpdateListener) {
4552 if (From->getNumValues() == 1) // Handle the simple case efficiently.
4553 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener);
4555 // Iterate over just the existing users of From. See the comments in
4556 // the ReplaceAllUsesWith above.
4557 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
4561 // This node is about to morph, remove its old self from the CSE maps.
4562 RemoveNodeFromCSEMaps(User);
4564 // A user can appear in a use list multiple times, and when this
4565 // happens the uses are usually next to each other in the list.
4566 // To help reduce the number of CSE recomputations, process all
4567 // the uses of this user that we can find this way.
4569 SDUse &Use = UI.getUse();
4570 const SDValue &ToOp = To[Use.getResNo()];
4573 } while (UI != UE && *UI == User);
4575 // Now that we have modified User, add it back to the CSE maps. If it
4576 // already exists there, recursively merge the results together.
4577 AddModifiedNodeToCSEMaps(User, UpdateListener);
4581 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
4582 /// uses of other values produced by From.getNode() alone. The Deleted
4583 /// vector is handled the same way as for ReplaceAllUsesWith.
4584 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To,
4585 DAGUpdateListener *UpdateListener){
4586 // Handle the really simple, really trivial case efficiently.
4587 if (From == To) return;
4589 // Handle the simple, trivial, case efficiently.
4590 if (From.getNode()->getNumValues() == 1) {
4591 ReplaceAllUsesWith(From, To, UpdateListener);
4595 // Iterate over just the existing users of From. See the comments in
4596 // the ReplaceAllUsesWith above.
4597 SDNode::use_iterator UI = From.getNode()->use_begin(),
4598 UE = From.getNode()->use_end();
4601 bool UserRemovedFromCSEMaps = false;
4603 // A user can appear in a use list multiple times, and when this
4604 // happens the uses are usually next to each other in the list.
4605 // To help reduce the number of CSE recomputations, process all
4606 // the uses of this user that we can find this way.
4608 SDUse &Use = UI.getUse();
4610 // Skip uses of different values from the same node.
4611 if (Use.getResNo() != From.getResNo()) {
4616 // If this node hasn't been modified yet, it's still in the CSE maps,
4617 // so remove its old self from the CSE maps.
4618 if (!UserRemovedFromCSEMaps) {
4619 RemoveNodeFromCSEMaps(User);
4620 UserRemovedFromCSEMaps = true;
4625 } while (UI != UE && *UI == User);
4627 // We are iterating over all uses of the From node, so if a use
4628 // doesn't use the specific value, no changes are made.
4629 if (!UserRemovedFromCSEMaps)
4632 // Now that we have modified User, add it back to the CSE maps. If it
4633 // already exists there, recursively merge the results together.
4634 AddModifiedNodeToCSEMaps(User, UpdateListener);
4639 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
4640 /// to record information about a use.
4647 /// operator< - Sort Memos by User.
4648 bool operator<(const UseMemo &L, const UseMemo &R) {
4649 return (intptr_t)L.User < (intptr_t)R.User;
4653 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
4654 /// uses of other values produced by From.getNode() alone. The same value
4655 /// may appear in both the From and To list. The Deleted vector is
4656 /// handled the same way as for ReplaceAllUsesWith.
4657 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
4660 DAGUpdateListener *UpdateListener){
4661 // Handle the simple, trivial case efficiently.
4663 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener);
4665 // Read up all the uses and make records of them. This helps
4666 // processing new uses that are introduced during the
4667 // replacement process.
4668 SmallVector<UseMemo, 4> Uses;
4669 for (unsigned i = 0; i != Num; ++i) {
4670 unsigned FromResNo = From[i].getResNo();
4671 SDNode *FromNode = From[i].getNode();
4672 for (SDNode::use_iterator UI = FromNode->use_begin(),
4673 E = FromNode->use_end(); UI != E; ++UI) {
4674 SDUse &Use = UI.getUse();
4675 if (Use.getResNo() == FromResNo) {
4676 UseMemo Memo = { *UI, i, &Use };
4677 Uses.push_back(Memo);
4682 // Sort the uses, so that all the uses from a given User are together.
4683 std::sort(Uses.begin(), Uses.end());
4685 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
4686 UseIndex != UseIndexEnd; ) {
4687 // We know that this user uses some value of From. If it is the right
4688 // value, update it.
4689 SDNode *User = Uses[UseIndex].User;
4691 // This node is about to morph, remove its old self from the CSE maps.
4692 RemoveNodeFromCSEMaps(User);
4694 // The Uses array is sorted, so all the uses for a given User
4695 // are next to each other in the list.
4696 // To help reduce the number of CSE recomputations, process all
4697 // the uses of this user that we can find this way.
4699 unsigned i = Uses[UseIndex].Index;
4700 SDUse &Use = *Uses[UseIndex].Use;
4704 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
4706 // Now that we have modified User, add it back to the CSE maps. If it
4707 // already exists there, recursively merge the results together.
4708 AddModifiedNodeToCSEMaps(User, UpdateListener);
4712 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
4713 /// based on their topological order. It returns the maximum id and a vector
4714 /// of the SDNodes* in assigned order by reference.
4715 unsigned SelectionDAG::AssignTopologicalOrder() {
4717 unsigned DAGSize = 0;
4719 // SortedPos tracks the progress of the algorithm. Nodes before it are
4720 // sorted, nodes after it are unsorted. When the algorithm completes
4721 // it is at the end of the list.
4722 allnodes_iterator SortedPos = allnodes_begin();
4724 // Visit all the nodes. Move nodes with no operands to the front of
4725 // the list immediately. Annotate nodes that do have operands with their
4726 // operand count. Before we do this, the Node Id fields of the nodes
4727 // may contain arbitrary values. After, the Node Id fields for nodes
4728 // before SortedPos will contain the topological sort index, and the
4729 // Node Id fields for nodes At SortedPos and after will contain the
4730 // count of outstanding operands.
4731 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
4733 unsigned Degree = N->getNumOperands();
4735 // A node with no uses, add it to the result array immediately.
4736 N->setNodeId(DAGSize++);
4737 allnodes_iterator Q = N;
4739 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
4742 // Temporarily use the Node Id as scratch space for the degree count.
4743 N->setNodeId(Degree);
4747 // Visit all the nodes. As we iterate, moves nodes into sorted order,
4748 // such that by the time the end is reached all nodes will be sorted.
4749 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
4751 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
4754 unsigned Degree = P->getNodeId();
4757 // All of P's operands are sorted, so P may sorted now.
4758 P->setNodeId(DAGSize++);
4760 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
4763 // Update P's outstanding operand count.
4764 P->setNodeId(Degree);
4769 assert(SortedPos == AllNodes.end() &&
4770 "Topological sort incomplete!");
4771 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
4772 "First node in topological sort is not the entry token!");
4773 assert(AllNodes.front().getNodeId() == 0 &&
4774 "First node in topological sort has non-zero id!");
4775 assert(AllNodes.front().getNumOperands() == 0 &&
4776 "First node in topological sort has operands!");
4777 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
4778 "Last node in topologic sort has unexpected id!");
4779 assert(AllNodes.back().use_empty() &&
4780 "Last node in topologic sort has users!");
4781 assert(DAGSize == allnodes_size() && "Node count mismatch!");
4787 //===----------------------------------------------------------------------===//
4789 //===----------------------------------------------------------------------===//
4791 HandleSDNode::~HandleSDNode() {
4795 GlobalAddressSDNode::GlobalAddressSDNode(bool isTarget, const GlobalValue *GA,
4797 : SDNode(isa<GlobalVariable>(GA) &&
4798 cast<GlobalVariable>(GA)->isThreadLocal() ?
4800 (isTarget ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress) :
4802 (isTarget ? ISD::TargetGlobalAddress : ISD::GlobalAddress),
4803 DebugLoc::getUnknownLoc(), getSDVTList(VT)), Offset(o) {
4804 TheGlobal = const_cast<GlobalValue*>(GA);
4807 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, MVT memvt,
4808 const Value *srcValue, int SVO,
4809 unsigned alignment, bool vol)
4810 : SDNode(Opc, dl, VTs), MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO) {
4811 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, vol, alignment);
4812 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
4813 assert(getAlignment() == alignment && "Alignment representation error!");
4814 assert(isVolatile() == vol && "Volatile representation error!");
4817 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs,
4819 unsigned NumOps, MVT memvt, const Value *srcValue,
4820 int SVO, unsigned alignment, bool vol)
4821 : SDNode(Opc, dl, VTs, Ops, NumOps),
4822 MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO) {
4823 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, vol, alignment);
4824 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
4825 assert(getAlignment() == alignment && "Alignment representation error!");
4826 assert(isVolatile() == vol && "Volatile representation error!");
4829 /// getMemOperand - Return a MachineMemOperand object describing the memory
4830 /// reference performed by this memory reference.
4831 MachineMemOperand MemSDNode::getMemOperand() const {
4833 if (isa<LoadSDNode>(this))
4834 Flags = MachineMemOperand::MOLoad;
4835 else if (isa<StoreSDNode>(this))
4836 Flags = MachineMemOperand::MOStore;
4837 else if (isa<AtomicSDNode>(this)) {
4838 Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
4841 const MemIntrinsicSDNode* MemIntrinNode = dyn_cast<MemIntrinsicSDNode>(this);
4842 assert(MemIntrinNode && "Unknown MemSDNode opcode!");
4843 if (MemIntrinNode->readMem()) Flags |= MachineMemOperand::MOLoad;
4844 if (MemIntrinNode->writeMem()) Flags |= MachineMemOperand::MOStore;
4847 int Size = (getMemoryVT().getSizeInBits() + 7) >> 3;
4848 if (isVolatile()) Flags |= MachineMemOperand::MOVolatile;
4850 // Check if the memory reference references a frame index
4851 const FrameIndexSDNode *FI =
4852 dyn_cast<const FrameIndexSDNode>(getBasePtr().getNode());
4853 if (!getSrcValue() && FI)
4854 return MachineMemOperand(PseudoSourceValue::getFixedStack(FI->getIndex()),
4855 Flags, 0, Size, getAlignment());
4857 return MachineMemOperand(getSrcValue(), Flags, getSrcValueOffset(),
4858 Size, getAlignment());
4861 /// Profile - Gather unique data for the node.
4863 void SDNode::Profile(FoldingSetNodeID &ID) const {
4864 AddNodeIDNode(ID, this);
4867 /// getValueTypeList - Return a pointer to the specified value type.
4869 const MVT *SDNode::getValueTypeList(MVT VT) {
4870 if (VT.isExtended()) {
4871 static std::set<MVT, MVT::compareRawBits> EVTs;
4872 return &(*EVTs.insert(VT).first);
4874 static MVT VTs[MVT::LAST_VALUETYPE];
4875 VTs[VT.getSimpleVT()] = VT;
4876 return &VTs[VT.getSimpleVT()];
4880 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
4881 /// indicated value. This method ignores uses of other values defined by this
4883 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
4884 assert(Value < getNumValues() && "Bad value!");
4886 // TODO: Only iterate over uses of a given value of the node
4887 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
4888 if (UI.getUse().getResNo() == Value) {
4895 // Found exactly the right number of uses?
4900 /// hasAnyUseOfValue - Return true if there are any use of the indicated
4901 /// value. This method ignores uses of other values defined by this operation.
4902 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
4903 assert(Value < getNumValues() && "Bad value!");
4905 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
4906 if (UI.getUse().getResNo() == Value)
4913 /// isOnlyUserOf - Return true if this node is the only use of N.
4915 bool SDNode::isOnlyUserOf(SDNode *N) const {
4917 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
4928 /// isOperand - Return true if this node is an operand of N.
4930 bool SDValue::isOperandOf(SDNode *N) const {
4931 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
4932 if (*this == N->getOperand(i))
4937 bool SDNode::isOperandOf(SDNode *N) const {
4938 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
4939 if (this == N->OperandList[i].getNode())
4944 /// reachesChainWithoutSideEffects - Return true if this operand (which must
4945 /// be a chain) reaches the specified operand without crossing any
4946 /// side-effecting instructions. In practice, this looks through token
4947 /// factors and non-volatile loads. In order to remain efficient, this only
4948 /// looks a couple of nodes in, it does not do an exhaustive search.
4949 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
4950 unsigned Depth) const {
4951 if (*this == Dest) return true;
4953 // Don't search too deeply, we just want to be able to see through
4954 // TokenFactor's etc.
4955 if (Depth == 0) return false;
4957 // If this is a token factor, all inputs to the TF happen in parallel. If any
4958 // of the operands of the TF reach dest, then we can do the xform.
4959 if (getOpcode() == ISD::TokenFactor) {
4960 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
4961 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
4966 // Loads don't have side effects, look through them.
4967 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
4968 if (!Ld->isVolatile())
4969 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
4975 static void findPredecessor(SDNode *N, const SDNode *P, bool &found,
4976 SmallPtrSet<SDNode *, 32> &Visited) {
4977 if (found || !Visited.insert(N))
4980 for (unsigned i = 0, e = N->getNumOperands(); !found && i != e; ++i) {
4981 SDNode *Op = N->getOperand(i).getNode();
4986 findPredecessor(Op, P, found, Visited);
4990 /// isPredecessorOf - Return true if this node is a predecessor of N. This node
4991 /// is either an operand of N or it can be reached by recursively traversing
4992 /// up the operands.
4993 /// NOTE: this is an expensive method. Use it carefully.
4994 bool SDNode::isPredecessorOf(SDNode *N) const {
4995 SmallPtrSet<SDNode *, 32> Visited;
4997 findPredecessor(N, this, found, Visited);
5001 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
5002 assert(Num < NumOperands && "Invalid child # of SDNode!");
5003 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
5006 std::string SDNode::getOperationName(const SelectionDAG *G) const {
5007 switch (getOpcode()) {
5009 if (getOpcode() < ISD::BUILTIN_OP_END)
5010 return "<<Unknown DAG Node>>";
5011 if (isMachineOpcode()) {
5013 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo())
5014 if (getMachineOpcode() < TII->getNumOpcodes())
5015 return TII->get(getMachineOpcode()).getName();
5016 return "<<Unknown Machine Node>>";
5019 const TargetLowering &TLI = G->getTargetLoweringInfo();
5020 const char *Name = TLI.getTargetNodeName(getOpcode());
5021 if (Name) return Name;
5022 return "<<Unknown Target Node>>";
5024 return "<<Unknown Node>>";
5027 case ISD::DELETED_NODE:
5028 return "<<Deleted Node!>>";
5030 case ISD::PREFETCH: return "Prefetch";
5031 case ISD::MEMBARRIER: return "MemBarrier";
5032 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
5033 case ISD::ATOMIC_SWAP: return "AtomicSwap";
5034 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
5035 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
5036 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
5037 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
5038 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
5039 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
5040 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
5041 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
5042 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
5043 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
5044 case ISD::PCMARKER: return "PCMarker";
5045 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
5046 case ISD::SRCVALUE: return "SrcValue";
5047 case ISD::MEMOPERAND: return "MemOperand";
5048 case ISD::EntryToken: return "EntryToken";
5049 case ISD::TokenFactor: return "TokenFactor";
5050 case ISD::AssertSext: return "AssertSext";
5051 case ISD::AssertZext: return "AssertZext";
5053 case ISD::BasicBlock: return "BasicBlock";
5054 case ISD::ARG_FLAGS: return "ArgFlags";
5055 case ISD::VALUETYPE: return "ValueType";
5056 case ISD::Register: return "Register";
5058 case ISD::Constant: return "Constant";
5059 case ISD::ConstantFP: return "ConstantFP";
5060 case ISD::GlobalAddress: return "GlobalAddress";
5061 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
5062 case ISD::FrameIndex: return "FrameIndex";
5063 case ISD::JumpTable: return "JumpTable";
5064 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
5065 case ISD::RETURNADDR: return "RETURNADDR";
5066 case ISD::FRAMEADDR: return "FRAMEADDR";
5067 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
5068 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR";
5069 case ISD::EHSELECTION: return "EHSELECTION";
5070 case ISD::EH_RETURN: return "EH_RETURN";
5071 case ISD::ConstantPool: return "ConstantPool";
5072 case ISD::ExternalSymbol: return "ExternalSymbol";
5073 case ISD::INTRINSIC_WO_CHAIN: {
5074 unsigned IID = cast<ConstantSDNode>(getOperand(0))->getZExtValue();
5075 return Intrinsic::getName((Intrinsic::ID)IID);
5077 case ISD::INTRINSIC_VOID:
5078 case ISD::INTRINSIC_W_CHAIN: {
5079 unsigned IID = cast<ConstantSDNode>(getOperand(1))->getZExtValue();
5080 return Intrinsic::getName((Intrinsic::ID)IID);
5083 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
5084 case ISD::TargetConstant: return "TargetConstant";
5085 case ISD::TargetConstantFP:return "TargetConstantFP";
5086 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
5087 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
5088 case ISD::TargetFrameIndex: return "TargetFrameIndex";
5089 case ISD::TargetJumpTable: return "TargetJumpTable";
5090 case ISD::TargetConstantPool: return "TargetConstantPool";
5091 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
5093 case ISD::CopyToReg: return "CopyToReg";
5094 case ISD::CopyFromReg: return "CopyFromReg";
5095 case ISD::UNDEF: return "undef";
5096 case ISD::MERGE_VALUES: return "merge_values";
5097 case ISD::INLINEASM: return "inlineasm";
5098 case ISD::DBG_LABEL: return "dbg_label";
5099 case ISD::EH_LABEL: return "eh_label";
5100 case ISD::DECLARE: return "declare";
5101 case ISD::HANDLENODE: return "handlenode";
5102 case ISD::FORMAL_ARGUMENTS: return "formal_arguments";
5103 case ISD::CALL: return "call";
5106 case ISD::FABS: return "fabs";
5107 case ISD::FNEG: return "fneg";
5108 case ISD::FSQRT: return "fsqrt";
5109 case ISD::FSIN: return "fsin";
5110 case ISD::FCOS: return "fcos";
5111 case ISD::FPOWI: return "fpowi";
5112 case ISD::FPOW: return "fpow";
5113 case ISD::FTRUNC: return "ftrunc";
5114 case ISD::FFLOOR: return "ffloor";
5115 case ISD::FCEIL: return "fceil";
5116 case ISD::FRINT: return "frint";
5117 case ISD::FNEARBYINT: return "fnearbyint";
5120 case ISD::ADD: return "add";
5121 case ISD::SUB: return "sub";
5122 case ISD::MUL: return "mul";
5123 case ISD::MULHU: return "mulhu";
5124 case ISD::MULHS: return "mulhs";
5125 case ISD::SDIV: return "sdiv";
5126 case ISD::UDIV: return "udiv";
5127 case ISD::SREM: return "srem";
5128 case ISD::UREM: return "urem";
5129 case ISD::SMUL_LOHI: return "smul_lohi";
5130 case ISD::UMUL_LOHI: return "umul_lohi";
5131 case ISD::SDIVREM: return "sdivrem";
5132 case ISD::UDIVREM: return "udivrem";
5133 case ISD::AND: return "and";
5134 case ISD::OR: return "or";
5135 case ISD::XOR: return "xor";
5136 case ISD::SHL: return "shl";
5137 case ISD::SRA: return "sra";
5138 case ISD::SRL: return "srl";
5139 case ISD::ROTL: return "rotl";
5140 case ISD::ROTR: return "rotr";
5141 case ISD::FADD: return "fadd";
5142 case ISD::FSUB: return "fsub";
5143 case ISD::FMUL: return "fmul";
5144 case ISD::FDIV: return "fdiv";
5145 case ISD::FREM: return "frem";
5146 case ISD::FCOPYSIGN: return "fcopysign";
5147 case ISD::FGETSIGN: return "fgetsign";
5149 case ISD::SETCC: return "setcc";
5150 case ISD::VSETCC: return "vsetcc";
5151 case ISD::SELECT: return "select";
5152 case ISD::SELECT_CC: return "select_cc";
5153 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
5154 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
5155 case ISD::CONCAT_VECTORS: return "concat_vectors";
5156 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
5157 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
5158 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
5159 case ISD::CARRY_FALSE: return "carry_false";
5160 case ISD::ADDC: return "addc";
5161 case ISD::ADDE: return "adde";
5162 case ISD::SADDO: return "saddo";
5163 case ISD::UADDO: return "uaddo";
5164 case ISD::SSUBO: return "ssubo";
5165 case ISD::USUBO: return "usubo";
5166 case ISD::SMULO: return "smulo";
5167 case ISD::UMULO: return "umulo";
5168 case ISD::SUBC: return "subc";
5169 case ISD::SUBE: return "sube";
5170 case ISD::SHL_PARTS: return "shl_parts";
5171 case ISD::SRA_PARTS: return "sra_parts";
5172 case ISD::SRL_PARTS: return "srl_parts";
5174 // Conversion operators.
5175 case ISD::SIGN_EXTEND: return "sign_extend";
5176 case ISD::ZERO_EXTEND: return "zero_extend";
5177 case ISD::ANY_EXTEND: return "any_extend";
5178 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
5179 case ISD::TRUNCATE: return "truncate";
5180 case ISD::FP_ROUND: return "fp_round";
5181 case ISD::FLT_ROUNDS_: return "flt_rounds";
5182 case ISD::FP_ROUND_INREG: return "fp_round_inreg";
5183 case ISD::FP_EXTEND: return "fp_extend";
5185 case ISD::SINT_TO_FP: return "sint_to_fp";
5186 case ISD::UINT_TO_FP: return "uint_to_fp";
5187 case ISD::FP_TO_SINT: return "fp_to_sint";
5188 case ISD::FP_TO_UINT: return "fp_to_uint";
5189 case ISD::BIT_CONVERT: return "bit_convert";
5191 case ISD::CONVERT_RNDSAT: {
5192 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) {
5193 default: assert(0 && "Unknown cvt code!");
5194 case ISD::CVT_FF: return "cvt_ff";
5195 case ISD::CVT_FS: return "cvt_fs";
5196 case ISD::CVT_FU: return "cvt_fu";
5197 case ISD::CVT_SF: return "cvt_sf";
5198 case ISD::CVT_UF: return "cvt_uf";
5199 case ISD::CVT_SS: return "cvt_ss";
5200 case ISD::CVT_SU: return "cvt_su";
5201 case ISD::CVT_US: return "cvt_us";
5202 case ISD::CVT_UU: return "cvt_uu";
5206 // Control flow instructions
5207 case ISD::BR: return "br";
5208 case ISD::BRIND: return "brind";
5209 case ISD::BR_JT: return "br_jt";
5210 case ISD::BRCOND: return "brcond";
5211 case ISD::BR_CC: return "br_cc";
5212 case ISD::RET: return "ret";
5213 case ISD::CALLSEQ_START: return "callseq_start";
5214 case ISD::CALLSEQ_END: return "callseq_end";
5217 case ISD::LOAD: return "load";
5218 case ISD::STORE: return "store";
5219 case ISD::VAARG: return "vaarg";
5220 case ISD::VACOPY: return "vacopy";
5221 case ISD::VAEND: return "vaend";
5222 case ISD::VASTART: return "vastart";
5223 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
5224 case ISD::EXTRACT_ELEMENT: return "extract_element";
5225 case ISD::BUILD_PAIR: return "build_pair";
5226 case ISD::STACKSAVE: return "stacksave";
5227 case ISD::STACKRESTORE: return "stackrestore";
5228 case ISD::TRAP: return "trap";
5231 case ISD::BSWAP: return "bswap";
5232 case ISD::CTPOP: return "ctpop";
5233 case ISD::CTTZ: return "cttz";
5234 case ISD::CTLZ: return "ctlz";
5237 case ISD::DBG_STOPPOINT: return "dbg_stoppoint";
5238 case ISD::DEBUG_LOC: return "debug_loc";
5241 case ISD::TRAMPOLINE: return "trampoline";
5244 switch (cast<CondCodeSDNode>(this)->get()) {
5245 default: assert(0 && "Unknown setcc condition!");
5246 case ISD::SETOEQ: return "setoeq";
5247 case ISD::SETOGT: return "setogt";
5248 case ISD::SETOGE: return "setoge";
5249 case ISD::SETOLT: return "setolt";
5250 case ISD::SETOLE: return "setole";
5251 case ISD::SETONE: return "setone";
5253 case ISD::SETO: return "seto";
5254 case ISD::SETUO: return "setuo";
5255 case ISD::SETUEQ: return "setue";
5256 case ISD::SETUGT: return "setugt";
5257 case ISD::SETUGE: return "setuge";
5258 case ISD::SETULT: return "setult";
5259 case ISD::SETULE: return "setule";
5260 case ISD::SETUNE: return "setune";
5262 case ISD::SETEQ: return "seteq";
5263 case ISD::SETGT: return "setgt";
5264 case ISD::SETGE: return "setge";
5265 case ISD::SETLT: return "setlt";
5266 case ISD::SETLE: return "setle";
5267 case ISD::SETNE: return "setne";
5272 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
5281 return "<post-inc>";
5283 return "<post-dec>";
5287 std::string ISD::ArgFlagsTy::getArgFlagsString() {
5288 std::string S = "< ";
5302 if (getByValAlign())
5303 S += "byval-align:" + utostr(getByValAlign()) + " ";
5305 S += "orig-align:" + utostr(getOrigAlign()) + " ";
5307 S += "byval-size:" + utostr(getByValSize()) + " ";
5311 void SDNode::dump() const { dump(0); }
5312 void SDNode::dump(const SelectionDAG *G) const {
5316 void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const {
5317 OS << (void*)this << ": ";
5319 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
5321 if (getValueType(i) == MVT::Other)
5324 OS << getValueType(i).getMVTString();
5326 OS << " = " << getOperationName(G);
5329 void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const {
5330 if (!isTargetOpcode() && getOpcode() == ISD::VECTOR_SHUFFLE) {
5331 SDNode *Mask = getOperand(2).getNode();
5333 for (unsigned i = 0, e = Mask->getNumOperands(); i != e; ++i) {
5335 if (Mask->getOperand(i).getOpcode() == ISD::UNDEF)
5338 OS << cast<ConstantSDNode>(Mask->getOperand(i))->getZExtValue();
5343 if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
5344 OS << '<' << CSDN->getAPIntValue() << '>';
5345 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
5346 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle)
5347 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
5348 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble)
5349 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
5352 CSDN->getValueAPF().bitcastToAPInt().dump();
5355 } else if (const GlobalAddressSDNode *GADN =
5356 dyn_cast<GlobalAddressSDNode>(this)) {
5357 int64_t offset = GADN->getOffset();
5359 WriteAsOperand(OS, GADN->getGlobal());
5362 OS << " + " << offset;
5364 OS << " " << offset;
5365 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
5366 OS << "<" << FIDN->getIndex() << ">";
5367 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
5368 OS << "<" << JTDN->getIndex() << ">";
5369 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
5370 int offset = CP->getOffset();
5371 if (CP->isMachineConstantPoolEntry())
5372 OS << "<" << *CP->getMachineCPVal() << ">";
5374 OS << "<" << *CP->getConstVal() << ">";
5376 OS << " + " << offset;
5378 OS << " " << offset;
5379 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
5381 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
5383 OS << LBB->getName() << " ";
5384 OS << (const void*)BBDN->getBasicBlock() << ">";
5385 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
5386 if (G && R->getReg() &&
5387 TargetRegisterInfo::isPhysicalRegister(R->getReg())) {
5388 OS << " " << G->getTarget().getRegisterInfo()->getName(R->getReg());
5390 OS << " #" << R->getReg();
5392 } else if (const ExternalSymbolSDNode *ES =
5393 dyn_cast<ExternalSymbolSDNode>(this)) {
5394 OS << "'" << ES->getSymbol() << "'";
5395 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
5397 OS << "<" << M->getValue() << ">";
5400 } else if (const MemOperandSDNode *M = dyn_cast<MemOperandSDNode>(this)) {
5401 if (M->MO.getValue())
5402 OS << "<" << M->MO.getValue() << ":" << M->MO.getOffset() << ">";
5404 OS << "<null:" << M->MO.getOffset() << ">";
5405 } else if (const ARG_FLAGSSDNode *N = dyn_cast<ARG_FLAGSSDNode>(this)) {
5406 OS << N->getArgFlags().getArgFlagsString();
5407 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
5408 OS << ":" << N->getVT().getMVTString();
5410 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
5411 const Value *SrcValue = LD->getSrcValue();
5412 int SrcOffset = LD->getSrcValueOffset();
5418 OS << ":" << SrcOffset << ">";
5421 switch (LD->getExtensionType()) {
5422 default: doExt = false; break;
5423 case ISD::EXTLOAD: OS << " <anyext "; break;
5424 case ISD::SEXTLOAD: OS << " <sext "; break;
5425 case ISD::ZEXTLOAD: OS << " <zext "; break;
5428 OS << LD->getMemoryVT().getMVTString() << ">";
5430 const char *AM = getIndexedModeName(LD->getAddressingMode());
5433 if (LD->isVolatile())
5434 OS << " <volatile>";
5435 OS << " alignment=" << LD->getAlignment();
5436 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
5437 const Value *SrcValue = ST->getSrcValue();
5438 int SrcOffset = ST->getSrcValueOffset();
5444 OS << ":" << SrcOffset << ">";
5446 if (ST->isTruncatingStore())
5447 OS << " <trunc " << ST->getMemoryVT().getMVTString() << ">";
5449 const char *AM = getIndexedModeName(ST->getAddressingMode());
5452 if (ST->isVolatile())
5453 OS << " <volatile>";
5454 OS << " alignment=" << ST->getAlignment();
5455 } else if (const AtomicSDNode* AT = dyn_cast<AtomicSDNode>(this)) {
5456 const Value *SrcValue = AT->getSrcValue();
5457 int SrcOffset = AT->getSrcValueOffset();
5463 OS << ":" << SrcOffset << ">";
5464 if (AT->isVolatile())
5465 OS << " <volatile>";
5466 OS << " alignment=" << AT->getAlignment();
5470 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
5473 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
5475 OS << (void*)getOperand(i).getNode();
5476 if (unsigned RN = getOperand(i).getResNo())
5479 print_details(OS, G);
5482 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
5483 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5484 if (N->getOperand(i).getNode()->hasOneUse())
5485 DumpNodes(N->getOperand(i).getNode(), indent+2, G);
5487 cerr << "\n" << std::string(indent+2, ' ')
5488 << (void*)N->getOperand(i).getNode() << ": <multiple use>";
5491 cerr << "\n" << std::string(indent, ' ');
5495 void SelectionDAG::dump() const {
5496 cerr << "SelectionDAG has " << AllNodes.size() << " nodes:";
5498 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end();
5500 const SDNode *N = I;
5501 if (!N->hasOneUse() && N != getRoot().getNode())
5502 DumpNodes(N, 2, this);
5505 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
5510 void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
5512 print_details(OS, G);
5515 typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet;
5516 static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
5517 const SelectionDAG *G, VisitedSDNodeSet &once) {
5518 if (!once.insert(N)) // If we've been here before, return now.
5520 // Dump the current SDNode, but don't end the line yet.
5521 OS << std::string(indent, ' ');
5523 // Having printed this SDNode, walk the children:
5524 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
5525 const SDNode *child = N->getOperand(i).getNode();
5528 if (child->getNumOperands() == 0) {
5529 // This child has no grandchildren; print it inline right here.
5530 child->printr(OS, G);
5532 } else { // Just the address. FIXME: also print the child's opcode
5534 if (unsigned RN = N->getOperand(i).getResNo())
5539 // Dump children that have grandchildren on their own line(s).
5540 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
5541 const SDNode *child = N->getOperand(i).getNode();
5542 DumpNodesr(OS, child, indent+2, G, once);
5546 void SDNode::dumpr() const {
5547 VisitedSDNodeSet once;
5548 DumpNodesr(errs(), this, 0, 0, once);
5551 const Type *ConstantPoolSDNode::getType() const {
5552 if (isMachineConstantPoolEntry())
5553 return Val.MachineCPVal->getType();
5554 return Val.ConstVal->getType();
5557 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
5559 unsigned &SplatBitSize,
5561 unsigned MinSplatBits) {
5562 MVT VT = getValueType(0);
5563 assert(VT.isVector() && "Expected a vector type");
5564 unsigned sz = VT.getSizeInBits();
5565 if (MinSplatBits > sz)
5568 SplatValue = APInt(sz, 0);
5569 SplatUndef = APInt(sz, 0);
5571 // Get the bits. Bits with undefined values (when the corresponding element
5572 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
5573 // in SplatValue. If any of the values are not constant, give up and return
5575 unsigned int nOps = getNumOperands();
5576 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
5577 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
5578 for (unsigned i = 0; i < nOps; ++i) {
5579 SDValue OpVal = getOperand(i);
5580 unsigned BitPos = i * EltBitSize;
5582 if (OpVal.getOpcode() == ISD::UNDEF)
5583 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos +EltBitSize);
5584 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
5585 SplatValue |= (APInt(CN->getAPIntValue()).zextOrTrunc(EltBitSize).
5586 zextOrTrunc(sz) << BitPos);
5587 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
5588 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
5593 // The build_vector is all constants or undefs. Find the smallest element
5594 // size that splats the vector.
5596 HasAnyUndefs = (SplatUndef != 0);
5599 unsigned HalfSize = sz / 2;
5600 APInt HighValue = APInt(SplatValue).lshr(HalfSize).trunc(HalfSize);
5601 APInt LowValue = APInt(SplatValue).trunc(HalfSize);
5602 APInt HighUndef = APInt(SplatUndef).lshr(HalfSize).trunc(HalfSize);
5603 APInt LowUndef = APInt(SplatUndef).trunc(HalfSize);
5605 // If the two halves do not match (ignoring undef bits), stop here.
5606 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
5607 MinSplatBits > HalfSize)
5610 SplatValue = HighValue | LowValue;
5611 SplatUndef = HighUndef & LowUndef;