1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
13 #include "llvm/CodeGen/SelectionDAG.h"
14 #include "llvm/Constants.h"
15 #include "llvm/Analysis/ValueTracking.h"
16 #include "llvm/GlobalAlias.h"
17 #include "llvm/GlobalVariable.h"
18 #include "llvm/Intrinsics.h"
19 #include "llvm/DerivedTypes.h"
20 #include "llvm/Assembly/Writer.h"
21 #include "llvm/CallingConv.h"
22 #include "llvm/CodeGen/MachineBasicBlock.h"
23 #include "llvm/CodeGen/MachineConstantPool.h"
24 #include "llvm/CodeGen/MachineFrameInfo.h"
25 #include "llvm/CodeGen/MachineModuleInfo.h"
26 #include "llvm/CodeGen/PseudoSourceValue.h"
27 #include "llvm/Target/TargetRegisterInfo.h"
28 #include "llvm/Target/TargetData.h"
29 #include "llvm/Target/TargetLowering.h"
30 #include "llvm/Target/TargetOptions.h"
31 #include "llvm/Target/TargetInstrInfo.h"
32 #include "llvm/Target/TargetMachine.h"
33 #include "llvm/Support/CommandLine.h"
34 #include "llvm/Support/MathExtras.h"
35 #include "llvm/Support/raw_ostream.h"
36 #include "llvm/ADT/SetVector.h"
37 #include "llvm/ADT/SmallPtrSet.h"
38 #include "llvm/ADT/SmallSet.h"
39 #include "llvm/ADT/SmallVector.h"
40 #include "llvm/ADT/StringExtras.h"
45 /// makeVTList - Return an instance of the SDVTList struct initialized with the
46 /// specified members.
47 static SDVTList makeVTList(const MVT *VTs, unsigned NumVTs) {
48 SDVTList Res = {VTs, NumVTs};
52 static const fltSemantics *MVTToAPFloatSemantics(MVT VT) {
53 switch (VT.getSimpleVT()) {
54 default: assert(0 && "Unknown FP format");
55 case MVT::f32: return &APFloat::IEEEsingle;
56 case MVT::f64: return &APFloat::IEEEdouble;
57 case MVT::f80: return &APFloat::x87DoubleExtended;
58 case MVT::f128: return &APFloat::IEEEquad;
59 case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
63 SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {}
65 //===----------------------------------------------------------------------===//
66 // ConstantFPSDNode Class
67 //===----------------------------------------------------------------------===//
69 /// isExactlyValue - We don't rely on operator== working on double values, as
70 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
71 /// As such, this method can be used to do an exact bit-for-bit comparison of
72 /// two floating point values.
73 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
74 return getValueAPF().bitwiseIsEqual(V);
77 bool ConstantFPSDNode::isValueValidForType(MVT VT,
79 assert(VT.isFloatingPoint() && "Can only convert between FP types");
81 // PPC long double cannot be converted to any other type.
82 if (VT == MVT::ppcf128 ||
83 &Val.getSemantics() == &APFloat::PPCDoubleDouble)
86 // convert modifies in place, so make a copy.
87 APFloat Val2 = APFloat(Val);
89 (void) Val2.convert(*MVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
94 //===----------------------------------------------------------------------===//
96 //===----------------------------------------------------------------------===//
98 /// isBuildVectorAllOnes - Return true if the specified node is a
99 /// BUILD_VECTOR where all of the elements are ~0 or undef.
100 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
101 // Look through a bit convert.
102 if (N->getOpcode() == ISD::BIT_CONVERT)
103 N = N->getOperand(0).getNode();
105 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
107 unsigned i = 0, e = N->getNumOperands();
109 // Skip over all of the undef values.
110 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
113 // Do not accept an all-undef vector.
114 if (i == e) return false;
116 // Do not accept build_vectors that aren't all constants or which have non-~0
118 SDValue NotZero = N->getOperand(i);
119 if (isa<ConstantSDNode>(NotZero)) {
120 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue())
122 } else if (isa<ConstantFPSDNode>(NotZero)) {
123 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF().
124 bitcastToAPInt().isAllOnesValue())
129 // Okay, we have at least one ~0 value, check to see if the rest match or are
131 for (++i; i != e; ++i)
132 if (N->getOperand(i) != NotZero &&
133 N->getOperand(i).getOpcode() != ISD::UNDEF)
139 /// isBuildVectorAllZeros - Return true if the specified node is a
140 /// BUILD_VECTOR where all of the elements are 0 or undef.
141 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
142 // Look through a bit convert.
143 if (N->getOpcode() == ISD::BIT_CONVERT)
144 N = N->getOperand(0).getNode();
146 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
148 unsigned i = 0, e = N->getNumOperands();
150 // Skip over all of the undef values.
151 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
154 // Do not accept an all-undef vector.
155 if (i == e) return false;
157 // Do not accept build_vectors that aren't all constants or which have non-~0
159 SDValue Zero = N->getOperand(i);
160 if (isa<ConstantSDNode>(Zero)) {
161 if (!cast<ConstantSDNode>(Zero)->isNullValue())
163 } else if (isa<ConstantFPSDNode>(Zero)) {
164 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero())
169 // Okay, we have at least one ~0 value, check to see if the rest match or are
171 for (++i; i != e; ++i)
172 if (N->getOperand(i) != Zero &&
173 N->getOperand(i).getOpcode() != ISD::UNDEF)
178 /// isScalarToVector - Return true if the specified node is a
179 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
180 /// element is not an undef.
181 bool ISD::isScalarToVector(const SDNode *N) {
182 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
185 if (N->getOpcode() != ISD::BUILD_VECTOR)
187 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
189 unsigned NumElems = N->getNumOperands();
190 for (unsigned i = 1; i < NumElems; ++i) {
191 SDValue V = N->getOperand(i);
192 if (V.getOpcode() != ISD::UNDEF)
199 /// isDebugLabel - Return true if the specified node represents a debug
200 /// label (i.e. ISD::DBG_LABEL or TargetInstrInfo::DBG_LABEL node).
201 bool ISD::isDebugLabel(const SDNode *N) {
203 if (N->getOpcode() == ISD::DBG_LABEL)
205 if (N->isMachineOpcode() &&
206 N->getMachineOpcode() == TargetInstrInfo::DBG_LABEL)
211 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
212 /// when given the operation for (X op Y).
213 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
214 // To perform this operation, we just need to swap the L and G bits of the
216 unsigned OldL = (Operation >> 2) & 1;
217 unsigned OldG = (Operation >> 1) & 1;
218 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
219 (OldL << 1) | // New G bit
220 (OldG << 2)); // New L bit.
223 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
224 /// 'op' is a valid SetCC operation.
225 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
226 unsigned Operation = Op;
228 Operation ^= 7; // Flip L, G, E bits, but not U.
230 Operation ^= 15; // Flip all of the condition bits.
232 if (Operation > ISD::SETTRUE2)
233 Operation &= ~8; // Don't let N and U bits get set.
235 return ISD::CondCode(Operation);
239 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
240 /// signed operation and 2 if the result is an unsigned comparison. Return zero
241 /// if the operation does not depend on the sign of the input (setne and seteq).
242 static int isSignedOp(ISD::CondCode Opcode) {
244 default: assert(0 && "Illegal integer setcc operation!");
246 case ISD::SETNE: return 0;
250 case ISD::SETGE: return 1;
254 case ISD::SETUGE: return 2;
258 /// getSetCCOrOperation - Return the result of a logical OR between different
259 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
260 /// returns SETCC_INVALID if it is not possible to represent the resultant
262 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
264 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
265 // Cannot fold a signed integer setcc with an unsigned integer setcc.
266 return ISD::SETCC_INVALID;
268 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
270 // If the N and U bits get set then the resultant comparison DOES suddenly
271 // care about orderedness, and is true when ordered.
272 if (Op > ISD::SETTRUE2)
273 Op &= ~16; // Clear the U bit if the N bit is set.
275 // Canonicalize illegal integer setcc's.
276 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
279 return ISD::CondCode(Op);
282 /// getSetCCAndOperation - Return the result of a logical AND between different
283 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
284 /// function returns zero if it is not possible to represent the resultant
286 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
288 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
289 // Cannot fold a signed setcc with an unsigned setcc.
290 return ISD::SETCC_INVALID;
292 // Combine all of the condition bits.
293 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
295 // Canonicalize illegal integer setcc's.
299 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
300 case ISD::SETOEQ: // SETEQ & SETU[LG]E
301 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
302 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
303 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
310 const TargetMachine &SelectionDAG::getTarget() const {
311 return MF->getTarget();
314 //===----------------------------------------------------------------------===//
315 // SDNode Profile Support
316 //===----------------------------------------------------------------------===//
318 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
320 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
324 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
325 /// solely with their pointer.
326 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
327 ID.AddPointer(VTList.VTs);
330 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
332 static void AddNodeIDOperands(FoldingSetNodeID &ID,
333 const SDValue *Ops, unsigned NumOps) {
334 for (; NumOps; --NumOps, ++Ops) {
335 ID.AddPointer(Ops->getNode());
336 ID.AddInteger(Ops->getResNo());
340 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
342 static void AddNodeIDOperands(FoldingSetNodeID &ID,
343 const SDUse *Ops, unsigned NumOps) {
344 for (; NumOps; --NumOps, ++Ops) {
345 ID.AddPointer(Ops->getNode());
346 ID.AddInteger(Ops->getResNo());
350 static void AddNodeIDNode(FoldingSetNodeID &ID,
351 unsigned short OpC, SDVTList VTList,
352 const SDValue *OpList, unsigned N) {
353 AddNodeIDOpcode(ID, OpC);
354 AddNodeIDValueTypes(ID, VTList);
355 AddNodeIDOperands(ID, OpList, N);
358 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
360 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
361 switch (N->getOpcode()) {
362 default: break; // Normal nodes don't need extra info.
364 ID.AddInteger(cast<ARG_FLAGSSDNode>(N)->getArgFlags().getRawBits());
366 case ISD::TargetConstant:
368 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
370 case ISD::TargetConstantFP:
371 case ISD::ConstantFP: {
372 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
375 case ISD::TargetGlobalAddress:
376 case ISD::GlobalAddress:
377 case ISD::TargetGlobalTLSAddress:
378 case ISD::GlobalTLSAddress: {
379 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
380 ID.AddPointer(GA->getGlobal());
381 ID.AddInteger(GA->getOffset());
384 case ISD::BasicBlock:
385 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
388 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
390 case ISD::DBG_STOPPOINT: {
391 const DbgStopPointSDNode *DSP = cast<DbgStopPointSDNode>(N);
392 ID.AddInteger(DSP->getLine());
393 ID.AddInteger(DSP->getColumn());
394 ID.AddPointer(DSP->getCompileUnit());
398 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
400 case ISD::MEMOPERAND: {
401 const MachineMemOperand &MO = cast<MemOperandSDNode>(N)->MO;
405 case ISD::FrameIndex:
406 case ISD::TargetFrameIndex:
407 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
410 case ISD::TargetJumpTable:
411 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
413 case ISD::ConstantPool:
414 case ISD::TargetConstantPool: {
415 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
416 ID.AddInteger(CP->getAlignment());
417 ID.AddInteger(CP->getOffset());
418 if (CP->isMachineConstantPoolEntry())
419 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID);
421 ID.AddPointer(CP->getConstVal());
425 const CallSDNode *Call = cast<CallSDNode>(N);
426 ID.AddInteger(Call->getCallingConv());
427 ID.AddInteger(Call->isVarArg());
431 const LoadSDNode *LD = cast<LoadSDNode>(N);
432 ID.AddInteger(LD->getMemoryVT().getRawBits());
433 ID.AddInteger(LD->getRawSubclassData());
437 const StoreSDNode *ST = cast<StoreSDNode>(N);
438 ID.AddInteger(ST->getMemoryVT().getRawBits());
439 ID.AddInteger(ST->getRawSubclassData());
442 case ISD::ATOMIC_CMP_SWAP:
443 case ISD::ATOMIC_SWAP:
444 case ISD::ATOMIC_LOAD_ADD:
445 case ISD::ATOMIC_LOAD_SUB:
446 case ISD::ATOMIC_LOAD_AND:
447 case ISD::ATOMIC_LOAD_OR:
448 case ISD::ATOMIC_LOAD_XOR:
449 case ISD::ATOMIC_LOAD_NAND:
450 case ISD::ATOMIC_LOAD_MIN:
451 case ISD::ATOMIC_LOAD_MAX:
452 case ISD::ATOMIC_LOAD_UMIN:
453 case ISD::ATOMIC_LOAD_UMAX: {
454 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
455 ID.AddInteger(AT->getMemoryVT().getRawBits());
456 ID.AddInteger(AT->getRawSubclassData());
459 } // end switch (N->getOpcode())
462 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
464 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
465 AddNodeIDOpcode(ID, N->getOpcode());
466 // Add the return value info.
467 AddNodeIDValueTypes(ID, N->getVTList());
468 // Add the operand info.
469 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
471 // Handle SDNode leafs with special info.
472 AddNodeIDCustom(ID, N);
475 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
476 /// the CSE map that carries alignment, volatility, indexing mode, and
477 /// extension/truncation information.
479 static inline unsigned
480 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM,
481 bool isVolatile, unsigned Alignment) {
482 assert((ConvType & 3) == ConvType &&
483 "ConvType may not require more than 2 bits!");
484 assert((AM & 7) == AM &&
485 "AM may not require more than 3 bits!");
489 ((Log2_32(Alignment) + 1) << 6);
492 //===----------------------------------------------------------------------===//
493 // SelectionDAG Class
494 //===----------------------------------------------------------------------===//
496 /// doNotCSE - Return true if CSE should not be performed for this node.
497 static bool doNotCSE(SDNode *N) {
498 if (N->getValueType(0) == MVT::Flag)
499 return true; // Never CSE anything that produces a flag.
501 switch (N->getOpcode()) {
503 case ISD::HANDLENODE:
505 case ISD::DBG_STOPPOINT:
508 return true; // Never CSE these nodes.
511 // Check that remaining values produced are not flags.
512 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
513 if (N->getValueType(i) == MVT::Flag)
514 return true; // Never CSE anything that produces a flag.
519 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
521 void SelectionDAG::RemoveDeadNodes() {
522 // Create a dummy node (which is not added to allnodes), that adds a reference
523 // to the root node, preventing it from being deleted.
524 HandleSDNode Dummy(getRoot());
526 SmallVector<SDNode*, 128> DeadNodes;
528 // Add all obviously-dead nodes to the DeadNodes worklist.
529 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
531 DeadNodes.push_back(I);
533 RemoveDeadNodes(DeadNodes);
535 // If the root changed (e.g. it was a dead load, update the root).
536 setRoot(Dummy.getValue());
539 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
540 /// given list, and any nodes that become unreachable as a result.
541 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes,
542 DAGUpdateListener *UpdateListener) {
544 // Process the worklist, deleting the nodes and adding their uses to the
546 while (!DeadNodes.empty()) {
547 SDNode *N = DeadNodes.pop_back_val();
550 UpdateListener->NodeDeleted(N, 0);
552 // Take the node out of the appropriate CSE map.
553 RemoveNodeFromCSEMaps(N);
555 // Next, brutally remove the operand list. This is safe to do, as there are
556 // no cycles in the graph.
557 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
559 SDNode *Operand = Use.getNode();
562 // Now that we removed this operand, see if there are no uses of it left.
563 if (Operand->use_empty())
564 DeadNodes.push_back(Operand);
571 void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){
572 SmallVector<SDNode*, 16> DeadNodes(1, N);
573 RemoveDeadNodes(DeadNodes, UpdateListener);
576 void SelectionDAG::DeleteNode(SDNode *N) {
577 // First take this out of the appropriate CSE map.
578 RemoveNodeFromCSEMaps(N);
580 // Finally, remove uses due to operands of this node, remove from the
581 // AllNodes list, and delete the node.
582 DeleteNodeNotInCSEMaps(N);
585 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
586 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
587 assert(N->use_empty() && "Cannot delete a node that is not dead!");
589 // Drop all of the operands and decrement used node's use counts.
595 void SelectionDAG::DeallocateNode(SDNode *N) {
596 if (N->OperandsNeedDelete)
597 delete[] N->OperandList;
599 // Set the opcode to DELETED_NODE to help catch bugs when node
600 // memory is reallocated.
601 N->NodeType = ISD::DELETED_NODE;
603 NodeAllocator.Deallocate(AllNodes.remove(N));
606 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
607 /// correspond to it. This is useful when we're about to delete or repurpose
608 /// the node. We don't want future request for structurally identical nodes
609 /// to return N anymore.
610 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
612 switch (N->getOpcode()) {
613 case ISD::EntryToken:
614 assert(0 && "EntryToken should not be in CSEMaps!");
616 case ISD::HANDLENODE: return false; // noop.
618 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
619 "Cond code doesn't exist!");
620 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
621 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
623 case ISD::ExternalSymbol:
624 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
626 case ISD::TargetExternalSymbol:
628 TargetExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
630 case ISD::VALUETYPE: {
631 MVT VT = cast<VTSDNode>(N)->getVT();
632 if (VT.isExtended()) {
633 Erased = ExtendedValueTypeNodes.erase(VT);
635 Erased = ValueTypeNodes[VT.getSimpleVT()] != 0;
636 ValueTypeNodes[VT.getSimpleVT()] = 0;
641 // Remove it from the CSE Map.
642 Erased = CSEMap.RemoveNode(N);
646 // Verify that the node was actually in one of the CSE maps, unless it has a
647 // flag result (which cannot be CSE'd) or is one of the special cases that are
648 // not subject to CSE.
649 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag &&
650 !N->isMachineOpcode() && !doNotCSE(N)) {
653 assert(0 && "Node is not in map!");
659 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
660 /// maps and modified in place. Add it back to the CSE maps, unless an identical
661 /// node already exists, in which case transfer all its users to the existing
662 /// node. This transfer can potentially trigger recursive merging.
665 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N,
666 DAGUpdateListener *UpdateListener) {
667 // For node types that aren't CSE'd, just act as if no identical node
670 SDNode *Existing = CSEMap.GetOrInsertNode(N);
672 // If there was already an existing matching node, use ReplaceAllUsesWith
673 // to replace the dead one with the existing one. This can cause
674 // recursive merging of other unrelated nodes down the line.
675 ReplaceAllUsesWith(N, Existing, UpdateListener);
677 // N is now dead. Inform the listener if it exists and delete it.
679 UpdateListener->NodeDeleted(N, Existing);
680 DeleteNodeNotInCSEMaps(N);
685 // If the node doesn't already exist, we updated it. Inform a listener if
688 UpdateListener->NodeUpdated(N);
691 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
692 /// were replaced with those specified. If this node is never memoized,
693 /// return null, otherwise return a pointer to the slot it would take. If a
694 /// node already exists with these operands, the slot will be non-null.
695 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
700 SDValue Ops[] = { Op };
702 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
703 AddNodeIDCustom(ID, N);
704 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
707 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
708 /// were replaced with those specified. If this node is never memoized,
709 /// return null, otherwise return a pointer to the slot it would take. If a
710 /// node already exists with these operands, the slot will be non-null.
711 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
712 SDValue Op1, SDValue Op2,
717 SDValue Ops[] = { Op1, Op2 };
719 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
720 AddNodeIDCustom(ID, N);
721 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
725 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
726 /// were replaced with those specified. If this node is never memoized,
727 /// return null, otherwise return a pointer to the slot it would take. If a
728 /// node already exists with these operands, the slot will be non-null.
729 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
730 const SDValue *Ops,unsigned NumOps,
736 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
737 AddNodeIDCustom(ID, N);
738 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
741 /// VerifyNode - Sanity check the given node. Aborts if it is invalid.
742 void SelectionDAG::VerifyNode(SDNode *N) {
743 switch (N->getOpcode()) {
746 case ISD::BUILD_PAIR: {
747 MVT VT = N->getValueType(0);
748 assert(N->getNumValues() == 1 && "Too many results!");
749 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
750 "Wrong return type!");
751 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
752 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
753 "Mismatched operand types!");
754 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
755 "Wrong operand type!");
756 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
757 "Wrong return type size");
760 case ISD::BUILD_VECTOR: {
761 assert(N->getNumValues() == 1 && "Too many results!");
762 assert(N->getValueType(0).isVector() && "Wrong return type!");
763 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
764 "Wrong number of operands!");
765 // FIXME: Change vector_shuffle to a variadic node with mask elements being
766 // operands of the node. Currently the mask is a BUILD_VECTOR passed as an
767 // operand, and it is not always possible to legalize it. Turning off the
768 // following checks at least makes it possible to legalize most of the time.
769 // MVT EltVT = N->getValueType(0).getVectorElementType();
770 // for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I)
771 // assert(I->getValueType() == EltVT &&
772 // "Wrong operand type!");
778 /// getMVTAlignment - Compute the default alignment value for the
781 unsigned SelectionDAG::getMVTAlignment(MVT VT) const {
782 const Type *Ty = VT == MVT::iPTR ?
783 PointerType::get(Type::Int8Ty, 0) :
786 return TLI.getTargetData()->getABITypeAlignment(Ty);
789 SelectionDAG::SelectionDAG(TargetLowering &tli, FunctionLoweringInfo &fli)
790 : TLI(tli), FLI(fli), DW(0),
791 EntryNode(ISD::EntryToken, getVTList(MVT::Other)),
792 Root(getEntryNode()) {
793 AllNodes.push_back(&EntryNode);
796 void SelectionDAG::init(MachineFunction &mf, MachineModuleInfo *mmi,
803 SelectionDAG::~SelectionDAG() {
807 void SelectionDAG::allnodes_clear() {
808 assert(&*AllNodes.begin() == &EntryNode);
809 AllNodes.remove(AllNodes.begin());
810 while (!AllNodes.empty())
811 DeallocateNode(AllNodes.begin());
814 void SelectionDAG::clear() {
816 OperandAllocator.Reset();
819 ExtendedValueTypeNodes.clear();
820 ExternalSymbols.clear();
821 TargetExternalSymbols.clear();
822 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
823 static_cast<CondCodeSDNode*>(0));
824 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
825 static_cast<SDNode*>(0));
827 EntryNode.UseList = 0;
828 AllNodes.push_back(&EntryNode);
829 Root = getEntryNode();
832 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, MVT VT) {
833 if (Op.getValueType() == VT) return Op;
834 APInt Imm = APInt::getLowBitsSet(Op.getValueSizeInBits(),
836 return getNode(ISD::AND, DL, Op.getValueType(), Op,
837 getConstant(Imm, Op.getValueType()));
840 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
842 SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, MVT VT) {
845 MVT EltVT = VT.getVectorElementType();
847 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), EltVT);
848 std::vector<SDValue> NegOnes(VT.getVectorNumElements(), NegOneElt);
849 NegOne = getNode(ISD::BUILD_VECTOR, DL, VT, &NegOnes[0], NegOnes.size());
851 NegOne = getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
853 return getNode(ISD::XOR, DL, VT, Val, NegOne);
856 SDValue SelectionDAG::getConstant(uint64_t Val, MVT VT, bool isT) {
857 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
858 assert((EltVT.getSizeInBits() >= 64 ||
859 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
860 "getConstant with a uint64_t value that doesn't fit in the type!");
861 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
864 SDValue SelectionDAG::getConstant(const APInt &Val, MVT VT, bool isT) {
865 return getConstant(*ConstantInt::get(Val), VT, isT);
868 SDValue SelectionDAG::getConstant(const ConstantInt &Val, MVT VT, bool isT) {
869 assert(VT.isInteger() && "Cannot create FP integer constant!");
871 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
872 assert(Val.getBitWidth() == EltVT.getSizeInBits() &&
873 "APInt size does not match type size!");
875 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
877 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
881 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
883 return SDValue(N, 0);
885 N = NodeAllocator.Allocate<ConstantSDNode>();
886 new (N) ConstantSDNode(isT, &Val, EltVT);
887 CSEMap.InsertNode(N, IP);
888 AllNodes.push_back(N);
891 SDValue Result(N, 0);
893 SmallVector<SDValue, 8> Ops;
894 Ops.assign(VT.getVectorNumElements(), Result);
895 Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size());
900 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
901 return getConstant(Val, TLI.getPointerTy(), isTarget);
905 SDValue SelectionDAG::getConstantFP(const APFloat& V, MVT VT, bool isTarget) {
906 return getConstantFP(*ConstantFP::get(V), VT, isTarget);
909 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, MVT VT, bool isTarget){
910 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
913 VT.isVector() ? VT.getVectorElementType() : VT;
915 // Do the map lookup using the actual bit pattern for the floating point
916 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
917 // we don't have issues with SNANs.
918 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
920 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
924 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
926 return SDValue(N, 0);
928 N = NodeAllocator.Allocate<ConstantFPSDNode>();
929 new (N) ConstantFPSDNode(isTarget, &V, EltVT);
930 CSEMap.InsertNode(N, IP);
931 AllNodes.push_back(N);
934 SDValue Result(N, 0);
936 SmallVector<SDValue, 8> Ops;
937 Ops.assign(VT.getVectorNumElements(), Result);
938 Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size());
943 SDValue SelectionDAG::getConstantFP(double Val, MVT VT, bool isTarget) {
945 VT.isVector() ? VT.getVectorElementType() : VT;
947 return getConstantFP(APFloat((float)Val), VT, isTarget);
949 return getConstantFP(APFloat(Val), VT, isTarget);
952 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV,
953 MVT VT, int64_t Offset,
957 // Truncate (with sign-extension) the offset value to the pointer size.
958 unsigned BitWidth = TLI.getPointerTy().getSizeInBits();
960 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth));
962 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
964 // If GV is an alias then use the aliasee for determining thread-localness.
965 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
966 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
969 if (GVar && GVar->isThreadLocal())
970 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
972 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
975 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
977 ID.AddInteger(Offset);
979 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
980 return SDValue(E, 0);
981 SDNode *N = NodeAllocator.Allocate<GlobalAddressSDNode>();
982 new (N) GlobalAddressSDNode(isTargetGA, GV, VT, Offset);
983 CSEMap.InsertNode(N, IP);
984 AllNodes.push_back(N);
985 return SDValue(N, 0);
988 SDValue SelectionDAG::getFrameIndex(int FI, MVT VT, bool isTarget) {
989 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
991 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
994 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
995 return SDValue(E, 0);
996 SDNode *N = NodeAllocator.Allocate<FrameIndexSDNode>();
997 new (N) FrameIndexSDNode(FI, VT, isTarget);
998 CSEMap.InsertNode(N, IP);
999 AllNodes.push_back(N);
1000 return SDValue(N, 0);
1003 SDValue SelectionDAG::getJumpTable(int JTI, MVT VT, bool isTarget){
1004 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1005 FoldingSetNodeID ID;
1006 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1009 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1010 return SDValue(E, 0);
1011 SDNode *N = NodeAllocator.Allocate<JumpTableSDNode>();
1012 new (N) JumpTableSDNode(JTI, VT, isTarget);
1013 CSEMap.InsertNode(N, IP);
1014 AllNodes.push_back(N);
1015 return SDValue(N, 0);
1018 SDValue SelectionDAG::getConstantPool(Constant *C, MVT VT,
1019 unsigned Alignment, int Offset,
1023 TLI.getTargetData()->getPreferredTypeAlignmentShift(C->getType());
1024 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1025 FoldingSetNodeID ID;
1026 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1027 ID.AddInteger(Alignment);
1028 ID.AddInteger(Offset);
1031 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1032 return SDValue(E, 0);
1033 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>();
1034 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment);
1035 CSEMap.InsertNode(N, IP);
1036 AllNodes.push_back(N);
1037 return SDValue(N, 0);
1041 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, MVT VT,
1042 unsigned Alignment, int Offset,
1046 TLI.getTargetData()->getPreferredTypeAlignmentShift(C->getType());
1047 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1048 FoldingSetNodeID ID;
1049 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1050 ID.AddInteger(Alignment);
1051 ID.AddInteger(Offset);
1052 C->AddSelectionDAGCSEId(ID);
1054 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1055 return SDValue(E, 0);
1056 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>();
1057 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment);
1058 CSEMap.InsertNode(N, IP);
1059 AllNodes.push_back(N);
1060 return SDValue(N, 0);
1063 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1064 FoldingSetNodeID ID;
1065 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1068 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1069 return SDValue(E, 0);
1070 SDNode *N = NodeAllocator.Allocate<BasicBlockSDNode>();
1071 new (N) BasicBlockSDNode(MBB);
1072 CSEMap.InsertNode(N, IP);
1073 AllNodes.push_back(N);
1074 return SDValue(N, 0);
1077 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB, DebugLoc dl) {
1078 FoldingSetNodeID ID;
1079 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1082 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1083 return SDValue(E, 0);
1084 SDNode *N = NodeAllocator.Allocate<BasicBlockSDNode>();
1085 new (N) BasicBlockSDNode(MBB, dl);
1086 CSEMap.InsertNode(N, IP);
1087 AllNodes.push_back(N);
1088 return SDValue(N, 0);
1091 SDValue SelectionDAG::getArgFlags(ISD::ArgFlagsTy Flags) {
1092 FoldingSetNodeID ID;
1093 AddNodeIDNode(ID, ISD::ARG_FLAGS, getVTList(MVT::Other), 0, 0);
1094 ID.AddInteger(Flags.getRawBits());
1096 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1097 return SDValue(E, 0);
1098 SDNode *N = NodeAllocator.Allocate<ARG_FLAGSSDNode>();
1099 new (N) ARG_FLAGSSDNode(Flags);
1100 CSEMap.InsertNode(N, IP);
1101 AllNodes.push_back(N);
1102 return SDValue(N, 0);
1105 SDValue SelectionDAG::getValueType(MVT VT) {
1106 if (VT.isSimple() && (unsigned)VT.getSimpleVT() >= ValueTypeNodes.size())
1107 ValueTypeNodes.resize(VT.getSimpleVT()+1);
1109 SDNode *&N = VT.isExtended() ?
1110 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT()];
1112 if (N) return SDValue(N, 0);
1113 N = NodeAllocator.Allocate<VTSDNode>();
1114 new (N) VTSDNode(VT);
1115 AllNodes.push_back(N);
1116 return SDValue(N, 0);
1119 SDValue SelectionDAG::getExternalSymbol(const char *Sym, MVT VT) {
1120 SDNode *&N = ExternalSymbols[Sym];
1121 if (N) return SDValue(N, 0);
1122 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1123 new (N) ExternalSymbolSDNode(false, Sym, VT);
1124 AllNodes.push_back(N);
1125 return SDValue(N, 0);
1128 SDValue SelectionDAG::getExternalSymbol(const char *Sym, DebugLoc dl, MVT VT) {
1129 SDNode *&N = ExternalSymbols[Sym];
1130 if (N) return SDValue(N, 0);
1131 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1132 new (N) ExternalSymbolSDNode(false, dl, Sym, VT);
1133 AllNodes.push_back(N);
1134 return SDValue(N, 0);
1137 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, MVT VT) {
1138 SDNode *&N = TargetExternalSymbols[Sym];
1139 if (N) return SDValue(N, 0);
1140 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1141 new (N) ExternalSymbolSDNode(true, Sym, VT);
1142 AllNodes.push_back(N);
1143 return SDValue(N, 0);
1146 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, DebugLoc dl,
1148 SDNode *&N = TargetExternalSymbols[Sym];
1149 if (N) return SDValue(N, 0);
1150 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1151 new (N) ExternalSymbolSDNode(true, dl, Sym, VT);
1152 AllNodes.push_back(N);
1153 return SDValue(N, 0);
1156 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1157 if ((unsigned)Cond >= CondCodeNodes.size())
1158 CondCodeNodes.resize(Cond+1);
1160 if (CondCodeNodes[Cond] == 0) {
1161 CondCodeSDNode *N = NodeAllocator.Allocate<CondCodeSDNode>();
1162 new (N) CondCodeSDNode(Cond);
1163 CondCodeNodes[Cond] = N;
1164 AllNodes.push_back(N);
1166 return SDValue(CondCodeNodes[Cond], 0);
1169 SDValue SelectionDAG::getConvertRndSat(MVT VT, DebugLoc dl,
1170 SDValue Val, SDValue DTy,
1171 SDValue STy, SDValue Rnd, SDValue Sat,
1172 ISD::CvtCode Code) {
1173 // If the src and dest types are the same and the conversion is between
1174 // integer types of the same sign or two floats, no conversion is necessary.
1176 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1179 FoldingSetNodeID ID;
1181 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1182 return SDValue(E, 0);
1183 CvtRndSatSDNode *N = NodeAllocator.Allocate<CvtRndSatSDNode>();
1184 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1185 new (N) CvtRndSatSDNode(VT, dl, Ops, 5, Code);
1186 CSEMap.InsertNode(N, IP);
1187 AllNodes.push_back(N);
1188 return SDValue(N, 0);
1191 SDValue SelectionDAG::getRegister(unsigned RegNo, MVT VT) {
1192 FoldingSetNodeID ID;
1193 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1194 ID.AddInteger(RegNo);
1196 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1197 return SDValue(E, 0);
1198 SDNode *N = NodeAllocator.Allocate<RegisterSDNode>();
1199 new (N) RegisterSDNode(RegNo, VT);
1200 CSEMap.InsertNode(N, IP);
1201 AllNodes.push_back(N);
1202 return SDValue(N, 0);
1205 SDValue SelectionDAG::getDbgStopPoint(SDValue Root,
1206 unsigned Line, unsigned Col,
1208 SDNode *N = NodeAllocator.Allocate<DbgStopPointSDNode>();
1209 new (N) DbgStopPointSDNode(Root, Line, Col, CU);
1210 AllNodes.push_back(N);
1211 return SDValue(N, 0);
1214 SDValue SelectionDAG::getLabel(unsigned Opcode, DebugLoc dl,
1217 FoldingSetNodeID ID;
1218 SDValue Ops[] = { Root };
1219 AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), &Ops[0], 1);
1220 ID.AddInteger(LabelID);
1222 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1223 return SDValue(E, 0);
1224 SDNode *N = NodeAllocator.Allocate<LabelSDNode>();
1225 new (N) LabelSDNode(Opcode, dl, Root, LabelID);
1226 CSEMap.InsertNode(N, IP);
1227 AllNodes.push_back(N);
1228 return SDValue(N, 0);
1231 SDValue SelectionDAG::getSrcValue(const Value *V) {
1232 assert((!V || isa<PointerType>(V->getType())) &&
1233 "SrcValue is not a pointer?");
1235 FoldingSetNodeID ID;
1236 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1240 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1241 return SDValue(E, 0);
1243 SDNode *N = NodeAllocator.Allocate<SrcValueSDNode>();
1244 new (N) SrcValueSDNode(V);
1245 CSEMap.InsertNode(N, IP);
1246 AllNodes.push_back(N);
1247 return SDValue(N, 0);
1250 SDValue SelectionDAG::getMemOperand(const MachineMemOperand &MO) {
1252 const Value *v = MO.getValue();
1253 assert((!v || isa<PointerType>(v->getType())) &&
1254 "SrcValue is not a pointer?");
1257 FoldingSetNodeID ID;
1258 AddNodeIDNode(ID, ISD::MEMOPERAND, getVTList(MVT::Other), 0, 0);
1262 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1263 return SDValue(E, 0);
1265 SDNode *N = NodeAllocator.Allocate<MemOperandSDNode>();
1266 new (N) MemOperandSDNode(MO);
1267 CSEMap.InsertNode(N, IP);
1268 AllNodes.push_back(N);
1269 return SDValue(N, 0);
1272 /// getShiftAmountOperand - Return the specified value casted to
1273 /// the target's desired shift amount type.
1274 SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) {
1275 MVT OpTy = Op.getValueType();
1276 MVT ShTy = TLI.getShiftAmountTy();
1277 if (OpTy == ShTy || OpTy.isVector()) return Op;
1279 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1280 return getNode(Opcode, ShTy, Op);
1283 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1284 /// specified value type.
1285 SDValue SelectionDAG::CreateStackTemporary(MVT VT, unsigned minAlign) {
1286 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1287 unsigned ByteSize = VT.getStoreSizeInBits()/8;
1288 const Type *Ty = VT.getTypeForMVT();
1289 unsigned StackAlign =
1290 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign);
1292 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign);
1293 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1296 /// CreateStackTemporary - Create a stack temporary suitable for holding
1297 /// either of the specified value types.
1298 SDValue SelectionDAG::CreateStackTemporary(MVT VT1, MVT VT2) {
1299 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1300 VT2.getStoreSizeInBits())/8;
1301 const Type *Ty1 = VT1.getTypeForMVT();
1302 const Type *Ty2 = VT2.getTypeForMVT();
1303 const TargetData *TD = TLI.getTargetData();
1304 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1305 TD->getPrefTypeAlignment(Ty2));
1307 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1308 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align);
1309 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1312 SDValue SelectionDAG::FoldSetCC(MVT VT, SDValue N1,
1313 SDValue N2, ISD::CondCode Cond, DebugLoc dl) {
1314 // These setcc operations always fold.
1318 case ISD::SETFALSE2: return getConstant(0, VT);
1320 case ISD::SETTRUE2: return getConstant(1, VT);
1332 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1336 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1337 const APInt &C2 = N2C->getAPIntValue();
1338 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1339 const APInt &C1 = N1C->getAPIntValue();
1342 default: assert(0 && "Unknown integer setcc!");
1343 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1344 case ISD::SETNE: return getConstant(C1 != C2, VT);
1345 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1346 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1347 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1348 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1349 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1350 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1351 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1352 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1356 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1357 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1358 // No compile time operations on this type yet.
1359 if (N1C->getValueType(0) == MVT::ppcf128)
1362 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1365 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1366 return getNode(ISD::UNDEF, dl, VT);
1368 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1369 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1370 return getNode(ISD::UNDEF, dl, VT);
1372 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1373 R==APFloat::cmpLessThan, VT);
1374 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1375 return getNode(ISD::UNDEF, dl, VT);
1377 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1378 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1379 return getNode(ISD::UNDEF, dl, VT);
1381 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1382 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1383 return getNode(ISD::UNDEF, dl, VT);
1385 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1386 R==APFloat::cmpEqual, VT);
1387 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1388 return getNode(ISD::UNDEF, dl, VT);
1390 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1391 R==APFloat::cmpEqual, VT);
1392 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1393 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1394 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1395 R==APFloat::cmpEqual, VT);
1396 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1397 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1398 R==APFloat::cmpLessThan, VT);
1399 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1400 R==APFloat::cmpUnordered, VT);
1401 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1402 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1405 // Ensure that the constant occurs on the RHS.
1406 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1410 // Could not fold it.
1414 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1415 /// use this predicate to simplify operations downstream.
1416 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1417 unsigned BitWidth = Op.getValueSizeInBits();
1418 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1421 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1422 /// this predicate to simplify operations downstream. Mask is known to be zero
1423 /// for bits that V cannot have.
1424 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1425 unsigned Depth) const {
1426 APInt KnownZero, KnownOne;
1427 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
1428 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1429 return (KnownZero & Mask) == Mask;
1432 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1433 /// known to be either zero or one and return them in the KnownZero/KnownOne
1434 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1436 void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask,
1437 APInt &KnownZero, APInt &KnownOne,
1438 unsigned Depth) const {
1439 unsigned BitWidth = Mask.getBitWidth();
1440 assert(BitWidth == Op.getValueType().getSizeInBits() &&
1441 "Mask size mismatches value type size!");
1443 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1444 if (Depth == 6 || Mask == 0)
1445 return; // Limit search depth.
1447 APInt KnownZero2, KnownOne2;
1449 switch (Op.getOpcode()) {
1451 // We know all of the bits for a constant!
1452 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask;
1453 KnownZero = ~KnownOne & Mask;
1456 // If either the LHS or the RHS are Zero, the result is zero.
1457 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1458 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero,
1459 KnownZero2, KnownOne2, Depth+1);
1460 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1461 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1463 // Output known-1 bits are only known if set in both the LHS & RHS.
1464 KnownOne &= KnownOne2;
1465 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1466 KnownZero |= KnownZero2;
1469 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1470 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne,
1471 KnownZero2, KnownOne2, Depth+1);
1472 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1473 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1475 // Output known-0 bits are only known if clear in both the LHS & RHS.
1476 KnownZero &= KnownZero2;
1477 // Output known-1 are known to be set if set in either the LHS | RHS.
1478 KnownOne |= KnownOne2;
1481 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1482 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
1483 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1484 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1486 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1487 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1488 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1489 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1490 KnownZero = KnownZeroOut;
1494 APInt Mask2 = APInt::getAllOnesValue(BitWidth);
1495 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1);
1496 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1497 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1498 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1500 // If low bits are zero in either operand, output low known-0 bits.
1501 // Also compute a conserative estimate for high known-0 bits.
1502 // More trickiness is possible, but this is sufficient for the
1503 // interesting case of alignment computation.
1505 unsigned TrailZ = KnownZero.countTrailingOnes() +
1506 KnownZero2.countTrailingOnes();
1507 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1508 KnownZero2.countLeadingOnes(),
1509 BitWidth) - BitWidth;
1511 TrailZ = std::min(TrailZ, BitWidth);
1512 LeadZ = std::min(LeadZ, BitWidth);
1513 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1514 APInt::getHighBitsSet(BitWidth, LeadZ);
1519 // For the purposes of computing leading zeros we can conservatively
1520 // treat a udiv as a logical right shift by the power of 2 known to
1521 // be less than the denominator.
1522 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1523 ComputeMaskedBits(Op.getOperand(0),
1524 AllOnes, KnownZero2, KnownOne2, Depth+1);
1525 unsigned LeadZ = KnownZero2.countLeadingOnes();
1529 ComputeMaskedBits(Op.getOperand(1),
1530 AllOnes, KnownZero2, KnownOne2, Depth+1);
1531 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1532 if (RHSUnknownLeadingOnes != BitWidth)
1533 LeadZ = std::min(BitWidth,
1534 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1536 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask;
1540 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1);
1541 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1);
1542 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1543 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1545 // Only known if known in both the LHS and RHS.
1546 KnownOne &= KnownOne2;
1547 KnownZero &= KnownZero2;
1549 case ISD::SELECT_CC:
1550 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1);
1551 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1);
1552 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1553 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1555 // Only known if known in both the LHS and RHS.
1556 KnownOne &= KnownOne2;
1557 KnownZero &= KnownZero2;
1565 if (Op.getResNo() != 1)
1567 // The boolean result conforms to getBooleanContents. Fall through.
1569 // If we know the result of a setcc has the top bits zero, use this info.
1570 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent &&
1572 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1575 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1576 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1577 unsigned ShAmt = SA->getZExtValue();
1579 // If the shift count is an invalid immediate, don't do anything.
1580 if (ShAmt >= BitWidth)
1583 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt),
1584 KnownZero, KnownOne, Depth+1);
1585 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1586 KnownZero <<= ShAmt;
1588 // low bits known zero.
1589 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1593 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1594 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1595 unsigned ShAmt = SA->getZExtValue();
1597 // If the shift count is an invalid immediate, don't do anything.
1598 if (ShAmt >= BitWidth)
1601 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt),
1602 KnownZero, KnownOne, Depth+1);
1603 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1604 KnownZero = KnownZero.lshr(ShAmt);
1605 KnownOne = KnownOne.lshr(ShAmt);
1607 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1608 KnownZero |= HighBits; // High bits known zero.
1612 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1613 unsigned ShAmt = SA->getZExtValue();
1615 // If the shift count is an invalid immediate, don't do anything.
1616 if (ShAmt >= BitWidth)
1619 APInt InDemandedMask = (Mask << ShAmt);
1620 // If any of the demanded bits are produced by the sign extension, we also
1621 // demand the input sign bit.
1622 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1623 if (HighBits.getBoolValue())
1624 InDemandedMask |= APInt::getSignBit(BitWidth);
1626 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne,
1628 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1629 KnownZero = KnownZero.lshr(ShAmt);
1630 KnownOne = KnownOne.lshr(ShAmt);
1632 // Handle the sign bits.
1633 APInt SignBit = APInt::getSignBit(BitWidth);
1634 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1636 if (KnownZero.intersects(SignBit)) {
1637 KnownZero |= HighBits; // New bits are known zero.
1638 } else if (KnownOne.intersects(SignBit)) {
1639 KnownOne |= HighBits; // New bits are known one.
1643 case ISD::SIGN_EXTEND_INREG: {
1644 MVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1645 unsigned EBits = EVT.getSizeInBits();
1647 // Sign extension. Compute the demanded bits in the result that are not
1648 // present in the input.
1649 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask;
1651 APInt InSignBit = APInt::getSignBit(EBits);
1652 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits);
1654 // If the sign extended bits are demanded, we know that the sign
1656 InSignBit.zext(BitWidth);
1657 if (NewBits.getBoolValue())
1658 InputDemandedBits |= InSignBit;
1660 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits,
1661 KnownZero, KnownOne, Depth+1);
1662 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1664 // If the sign bit of the input is known set or clear, then we know the
1665 // top bits of the result.
1666 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1667 KnownZero |= NewBits;
1668 KnownOne &= ~NewBits;
1669 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1670 KnownOne |= NewBits;
1671 KnownZero &= ~NewBits;
1672 } else { // Input sign bit unknown
1673 KnownZero &= ~NewBits;
1674 KnownOne &= ~NewBits;
1681 unsigned LowBits = Log2_32(BitWidth)+1;
1682 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1687 if (ISD::isZEXTLoad(Op.getNode())) {
1688 LoadSDNode *LD = cast<LoadSDNode>(Op);
1689 MVT VT = LD->getMemoryVT();
1690 unsigned MemBits = VT.getSizeInBits();
1691 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask;
1695 case ISD::ZERO_EXTEND: {
1696 MVT InVT = Op.getOperand(0).getValueType();
1697 unsigned InBits = InVT.getSizeInBits();
1698 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1699 APInt InMask = Mask;
1700 InMask.trunc(InBits);
1701 KnownZero.trunc(InBits);
1702 KnownOne.trunc(InBits);
1703 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1704 KnownZero.zext(BitWidth);
1705 KnownOne.zext(BitWidth);
1706 KnownZero |= NewBits;
1709 case ISD::SIGN_EXTEND: {
1710 MVT InVT = Op.getOperand(0).getValueType();
1711 unsigned InBits = InVT.getSizeInBits();
1712 APInt InSignBit = APInt::getSignBit(InBits);
1713 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1714 APInt InMask = Mask;
1715 InMask.trunc(InBits);
1717 // If any of the sign extended bits are demanded, we know that the sign
1718 // bit is demanded. Temporarily set this bit in the mask for our callee.
1719 if (NewBits.getBoolValue())
1720 InMask |= InSignBit;
1722 KnownZero.trunc(InBits);
1723 KnownOne.trunc(InBits);
1724 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1726 // Note if the sign bit is known to be zero or one.
1727 bool SignBitKnownZero = KnownZero.isNegative();
1728 bool SignBitKnownOne = KnownOne.isNegative();
1729 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1730 "Sign bit can't be known to be both zero and one!");
1732 // If the sign bit wasn't actually demanded by our caller, we don't
1733 // want it set in the KnownZero and KnownOne result values. Reset the
1734 // mask and reapply it to the result values.
1736 InMask.trunc(InBits);
1737 KnownZero &= InMask;
1740 KnownZero.zext(BitWidth);
1741 KnownOne.zext(BitWidth);
1743 // If the sign bit is known zero or one, the top bits match.
1744 if (SignBitKnownZero)
1745 KnownZero |= NewBits;
1746 else if (SignBitKnownOne)
1747 KnownOne |= NewBits;
1750 case ISD::ANY_EXTEND: {
1751 MVT InVT = Op.getOperand(0).getValueType();
1752 unsigned InBits = InVT.getSizeInBits();
1753 APInt InMask = Mask;
1754 InMask.trunc(InBits);
1755 KnownZero.trunc(InBits);
1756 KnownOne.trunc(InBits);
1757 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1758 KnownZero.zext(BitWidth);
1759 KnownOne.zext(BitWidth);
1762 case ISD::TRUNCATE: {
1763 MVT InVT = Op.getOperand(0).getValueType();
1764 unsigned InBits = InVT.getSizeInBits();
1765 APInt InMask = Mask;
1766 InMask.zext(InBits);
1767 KnownZero.zext(InBits);
1768 KnownOne.zext(InBits);
1769 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1770 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1771 KnownZero.trunc(BitWidth);
1772 KnownOne.trunc(BitWidth);
1775 case ISD::AssertZext: {
1776 MVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1777 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1778 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
1780 KnownZero |= (~InMask) & Mask;
1784 // All bits are zero except the low bit.
1785 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1789 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
1790 // We know that the top bits of C-X are clear if X contains less bits
1791 // than C (i.e. no wrap-around can happen). For example, 20-X is
1792 // positive if we can prove that X is >= 0 and < 16.
1793 if (CLHS->getAPIntValue().isNonNegative()) {
1794 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
1795 // NLZ can't be BitWidth with no sign bit
1796 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
1797 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2,
1800 // If all of the MaskV bits are known to be zero, then we know the
1801 // output top bits are zero, because we now know that the output is
1803 if ((KnownZero2 & MaskV) == MaskV) {
1804 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
1805 // Top bits known zero.
1806 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask;
1813 // Output known-0 bits are known if clear or set in both the low clear bits
1814 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
1815 // low 3 bits clear.
1816 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes());
1817 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1818 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1819 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
1821 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1);
1822 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1823 KnownZeroOut = std::min(KnownZeroOut,
1824 KnownZero2.countTrailingOnes());
1826 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
1830 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1831 const APInt &RA = Rem->getAPIntValue();
1832 if (RA.isPowerOf2() || (-RA).isPowerOf2()) {
1833 APInt LowBits = RA.isStrictlyPositive() ? (RA - 1) : ~RA;
1834 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
1835 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1);
1837 // If the sign bit of the first operand is zero, the sign bit of
1838 // the result is zero. If the first operand has no one bits below
1839 // the second operand's single 1 bit, its sign will be zero.
1840 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
1841 KnownZero2 |= ~LowBits;
1843 KnownZero |= KnownZero2 & Mask;
1845 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1850 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1851 const APInt &RA = Rem->getAPIntValue();
1852 if (RA.isPowerOf2()) {
1853 APInt LowBits = (RA - 1);
1854 APInt Mask2 = LowBits & Mask;
1855 KnownZero |= ~LowBits & Mask;
1856 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1);
1857 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1862 // Since the result is less than or equal to either operand, any leading
1863 // zero bits in either operand must also exist in the result.
1864 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1865 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne,
1867 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2,
1870 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
1871 KnownZero2.countLeadingOnes());
1873 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
1877 // Allow the target to implement this method for its nodes.
1878 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) {
1879 case ISD::INTRINSIC_WO_CHAIN:
1880 case ISD::INTRINSIC_W_CHAIN:
1881 case ISD::INTRINSIC_VOID:
1882 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this);
1888 /// ComputeNumSignBits - Return the number of times the sign bit of the
1889 /// register is replicated into the other bits. We know that at least 1 bit
1890 /// is always equal to the sign bit (itself), but other cases can give us
1891 /// information. For example, immediately after an "SRA X, 2", we know that
1892 /// the top 3 bits are all equal to each other, so we return 3.
1893 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
1894 MVT VT = Op.getValueType();
1895 assert(VT.isInteger() && "Invalid VT!");
1896 unsigned VTBits = VT.getSizeInBits();
1898 unsigned FirstAnswer = 1;
1901 return 1; // Limit search depth.
1903 switch (Op.getOpcode()) {
1905 case ISD::AssertSext:
1906 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1907 return VTBits-Tmp+1;
1908 case ISD::AssertZext:
1909 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1912 case ISD::Constant: {
1913 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
1914 // If negative, return # leading ones.
1915 if (Val.isNegative())
1916 return Val.countLeadingOnes();
1918 // Return # leading zeros.
1919 return Val.countLeadingZeros();
1922 case ISD::SIGN_EXTEND:
1923 Tmp = VTBits-Op.getOperand(0).getValueType().getSizeInBits();
1924 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
1926 case ISD::SIGN_EXTEND_INREG:
1927 // Max of the input and what this extends.
1928 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1931 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1932 return std::max(Tmp, Tmp2);
1935 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1936 // SRA X, C -> adds C sign bits.
1937 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1938 Tmp += C->getZExtValue();
1939 if (Tmp > VTBits) Tmp = VTBits;
1943 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1944 // shl destroys sign bits.
1945 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1946 if (C->getZExtValue() >= VTBits || // Bad shift.
1947 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
1948 return Tmp - C->getZExtValue();
1953 case ISD::XOR: // NOT is handled here.
1954 // Logical binary ops preserve the number of sign bits at the worst.
1955 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1957 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
1958 FirstAnswer = std::min(Tmp, Tmp2);
1959 // We computed what we know about the sign bits as our first
1960 // answer. Now proceed to the generic code that uses
1961 // ComputeMaskedBits, and pick whichever answer is better.
1966 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
1967 if (Tmp == 1) return 1; // Early out.
1968 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
1969 return std::min(Tmp, Tmp2);
1977 if (Op.getResNo() != 1)
1979 // The boolean result conforms to getBooleanContents. Fall through.
1981 // If setcc returns 0/-1, all bits are sign bits.
1982 if (TLI.getBooleanContents() ==
1983 TargetLowering::ZeroOrNegativeOneBooleanContent)
1988 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1989 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
1991 // Handle rotate right by N like a rotate left by 32-N.
1992 if (Op.getOpcode() == ISD::ROTR)
1993 RotAmt = (VTBits-RotAmt) & (VTBits-1);
1995 // If we aren't rotating out all of the known-in sign bits, return the
1996 // number that are left. This handles rotl(sext(x), 1) for example.
1997 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1998 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2002 // Add can have at most one carry bit. Thus we know that the output
2003 // is, at worst, one more bit than the inputs.
2004 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2005 if (Tmp == 1) return 1; // Early out.
2007 // Special case decrementing a value (ADD X, -1):
2008 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2009 if (CRHS->isAllOnesValue()) {
2010 APInt KnownZero, KnownOne;
2011 APInt Mask = APInt::getAllOnesValue(VTBits);
2012 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
2014 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2016 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2019 // If we are subtracting one from a positive number, there is no carry
2020 // out of the result.
2021 if (KnownZero.isNegative())
2025 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2026 if (Tmp2 == 1) return 1;
2027 return std::min(Tmp, Tmp2)-1;
2031 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2032 if (Tmp2 == 1) return 1;
2035 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2036 if (CLHS->isNullValue()) {
2037 APInt KnownZero, KnownOne;
2038 APInt Mask = APInt::getAllOnesValue(VTBits);
2039 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
2040 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2042 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2045 // If the input is known to be positive (the sign bit is known clear),
2046 // the output of the NEG has the same number of sign bits as the input.
2047 if (KnownZero.isNegative())
2050 // Otherwise, we treat this like a SUB.
2053 // Sub can have at most one carry bit. Thus we know that the output
2054 // is, at worst, one more bit than the inputs.
2055 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2056 if (Tmp == 1) return 1; // Early out.
2057 return std::min(Tmp, Tmp2)-1;
2060 // FIXME: it's tricky to do anything useful for this, but it is an important
2061 // case for targets like X86.
2065 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2066 if (Op.getOpcode() == ISD::LOAD) {
2067 LoadSDNode *LD = cast<LoadSDNode>(Op);
2068 unsigned ExtType = LD->getExtensionType();
2071 case ISD::SEXTLOAD: // '17' bits known
2072 Tmp = LD->getMemoryVT().getSizeInBits();
2073 return VTBits-Tmp+1;
2074 case ISD::ZEXTLOAD: // '16' bits known
2075 Tmp = LD->getMemoryVT().getSizeInBits();
2080 // Allow the target to implement this method for its nodes.
2081 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2082 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2083 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2084 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2085 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2086 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2089 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2090 // use this information.
2091 APInt KnownZero, KnownOne;
2092 APInt Mask = APInt::getAllOnesValue(VTBits);
2093 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
2095 if (KnownZero.isNegative()) { // sign bit is 0
2097 } else if (KnownOne.isNegative()) { // sign bit is 1;
2104 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2105 // the number of identical bits in the top of the input value.
2107 Mask <<= Mask.getBitWidth()-VTBits;
2108 // Return # leading zeros. We use 'min' here in case Val was zero before
2109 // shifting. We don't want to return '64' as for an i32 "0".
2110 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2114 bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const {
2115 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op);
2116 if (!GA) return false;
2117 if (GA->getOffset() != 0) return false;
2118 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal());
2119 if (!GV) return false;
2120 MachineModuleInfo *MMI = getMachineModuleInfo();
2121 return MMI && MMI->hasDebugInfo();
2125 /// getShuffleScalarElt - Returns the scalar element that will make up the ith
2126 /// element of the result of the vector shuffle.
2127 SDValue SelectionDAG::getShuffleScalarElt(const SDNode *N, unsigned i) {
2128 MVT VT = N->getValueType(0);
2129 DebugLoc dl = N->getDebugLoc();
2130 SDValue PermMask = N->getOperand(2);
2131 SDValue Idx = PermMask.getOperand(i);
2132 if (Idx.getOpcode() == ISD::UNDEF)
2133 return getNode(ISD::UNDEF, dl, VT.getVectorElementType());
2134 unsigned Index = cast<ConstantSDNode>(Idx)->getZExtValue();
2135 unsigned NumElems = PermMask.getNumOperands();
2136 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1);
2139 if (V.getOpcode() == ISD::BIT_CONVERT) {
2140 V = V.getOperand(0);
2141 MVT VVT = V.getValueType();
2142 if (!VVT.isVector() || VVT.getVectorNumElements() != NumElems)
2145 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR)
2146 return (Index == 0) ? V.getOperand(0)
2147 : getNode(ISD::UNDEF, dl, VT.getVectorElementType());
2148 if (V.getOpcode() == ISD::BUILD_VECTOR)
2149 return V.getOperand(Index);
2150 if (V.getOpcode() == ISD::VECTOR_SHUFFLE)
2151 return getShuffleScalarElt(V.getNode(), Index);
2156 /// getNode - Gets or creates the specified node.
2158 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT) {
2159 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT);
2162 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT) {
2163 FoldingSetNodeID ID;
2164 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2166 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2167 return SDValue(E, 0);
2168 SDNode *N = NodeAllocator.Allocate<SDNode>();
2169 new (N) SDNode(Opcode, DL, SDNode::getSDVTList(VT));
2170 CSEMap.InsertNode(N, IP);
2172 AllNodes.push_back(N);
2176 return SDValue(N, 0);
2179 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, SDValue Operand) {
2180 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, Operand);
2183 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
2184 MVT VT, SDValue Operand) {
2185 // Constant fold unary operations with an integer constant operand.
2186 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2187 const APInt &Val = C->getAPIntValue();
2188 unsigned BitWidth = VT.getSizeInBits();
2191 case ISD::SIGN_EXTEND:
2192 return getConstant(APInt(Val).sextOrTrunc(BitWidth), VT);
2193 case ISD::ANY_EXTEND:
2194 case ISD::ZERO_EXTEND:
2196 return getConstant(APInt(Val).zextOrTrunc(BitWidth), VT);
2197 case ISD::UINT_TO_FP:
2198 case ISD::SINT_TO_FP: {
2199 const uint64_t zero[] = {0, 0};
2200 // No compile time operations on this type.
2201 if (VT==MVT::ppcf128)
2203 APFloat apf = APFloat(APInt(BitWidth, 2, zero));
2204 (void)apf.convertFromAPInt(Val,
2205 Opcode==ISD::SINT_TO_FP,
2206 APFloat::rmNearestTiesToEven);
2207 return getConstantFP(apf, VT);
2209 case ISD::BIT_CONVERT:
2210 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2211 return getConstantFP(Val.bitsToFloat(), VT);
2212 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2213 return getConstantFP(Val.bitsToDouble(), VT);
2216 return getConstant(Val.byteSwap(), VT);
2218 return getConstant(Val.countPopulation(), VT);
2220 return getConstant(Val.countLeadingZeros(), VT);
2222 return getConstant(Val.countTrailingZeros(), VT);
2226 // Constant fold unary operations with a floating point constant operand.
2227 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2228 APFloat V = C->getValueAPF(); // make copy
2229 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) {
2233 return getConstantFP(V, VT);
2236 return getConstantFP(V, VT);
2238 case ISD::FP_EXTEND: {
2240 // This can return overflow, underflow, or inexact; we don't care.
2241 // FIXME need to be more flexible about rounding mode.
2242 (void)V.convert(*MVTToAPFloatSemantics(VT),
2243 APFloat::rmNearestTiesToEven, &ignored);
2244 return getConstantFP(V, VT);
2246 case ISD::FP_TO_SINT:
2247 case ISD::FP_TO_UINT: {
2250 assert(integerPartWidth >= 64);
2251 // FIXME need to be more flexible about rounding mode.
2252 APFloat::opStatus s = V.convertToInteger(&x, 64U,
2253 Opcode==ISD::FP_TO_SINT,
2254 APFloat::rmTowardZero, &ignored);
2255 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2257 return getConstant(x, VT);
2259 case ISD::BIT_CONVERT:
2260 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2261 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2262 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2263 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2269 unsigned OpOpcode = Operand.getNode()->getOpcode();
2271 case ISD::TokenFactor:
2272 case ISD::MERGE_VALUES:
2273 case ISD::CONCAT_VECTORS:
2274 return Operand; // Factor, merge or concat of one node? No need.
2275 case ISD::FP_ROUND: assert(0 && "Invalid method to make FP_ROUND node");
2276 case ISD::FP_EXTEND:
2277 assert(VT.isFloatingPoint() &&
2278 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2279 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2280 if (Operand.getOpcode() == ISD::UNDEF)
2281 return getNode(ISD::UNDEF, DL, VT);
2283 case ISD::SIGN_EXTEND:
2284 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2285 "Invalid SIGN_EXTEND!");
2286 if (Operand.getValueType() == VT) return Operand; // noop extension
2287 assert(Operand.getValueType().bitsLT(VT)
2288 && "Invalid sext node, dst < src!");
2289 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2290 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2292 case ISD::ZERO_EXTEND:
2293 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2294 "Invalid ZERO_EXTEND!");
2295 if (Operand.getValueType() == VT) return Operand; // noop extension
2296 assert(Operand.getValueType().bitsLT(VT)
2297 && "Invalid zext node, dst < src!");
2298 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2299 return getNode(ISD::ZERO_EXTEND, DL, VT,
2300 Operand.getNode()->getOperand(0));
2302 case ISD::ANY_EXTEND:
2303 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2304 "Invalid ANY_EXTEND!");
2305 if (Operand.getValueType() == VT) return Operand; // noop extension
2306 assert(Operand.getValueType().bitsLT(VT)
2307 && "Invalid anyext node, dst < src!");
2308 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND)
2309 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2310 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2313 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2314 "Invalid TRUNCATE!");
2315 if (Operand.getValueType() == VT) return Operand; // noop truncate
2316 assert(Operand.getValueType().bitsGT(VT)
2317 && "Invalid truncate node, src < dst!");
2318 if (OpOpcode == ISD::TRUNCATE)
2319 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2320 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2321 OpOpcode == ISD::ANY_EXTEND) {
2322 // If the source is smaller than the dest, we still need an extend.
2323 if (Operand.getNode()->getOperand(0).getValueType().bitsLT(VT))
2324 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2325 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2326 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2328 return Operand.getNode()->getOperand(0);
2331 case ISD::BIT_CONVERT:
2332 // Basic sanity checking.
2333 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2334 && "Cannot BIT_CONVERT between types of different sizes!");
2335 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2336 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x)
2337 return getNode(ISD::BIT_CONVERT, DL, VT, Operand.getOperand(0));
2338 if (OpOpcode == ISD::UNDEF)
2339 return getNode(ISD::UNDEF, DL, VT);
2341 case ISD::SCALAR_TO_VECTOR:
2342 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2343 VT.getVectorElementType() == Operand.getValueType() &&
2344 "Illegal SCALAR_TO_VECTOR node!");
2345 if (OpOpcode == ISD::UNDEF)
2346 return getNode(ISD::UNDEF, DL, VT);
2347 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2348 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2349 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2350 Operand.getConstantOperandVal(1) == 0 &&
2351 Operand.getOperand(0).getValueType() == VT)
2352 return Operand.getOperand(0);
2355 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
2356 if (UnsafeFPMath && OpOpcode == ISD::FSUB)
2357 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
2358 Operand.getNode()->getOperand(0));
2359 if (OpOpcode == ISD::FNEG) // --X -> X
2360 return Operand.getNode()->getOperand(0);
2363 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2364 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
2369 SDVTList VTs = getVTList(VT);
2370 if (VT != MVT::Flag) { // Don't CSE flag producing nodes
2371 FoldingSetNodeID ID;
2372 SDValue Ops[1] = { Operand };
2373 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2375 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2376 return SDValue(E, 0);
2377 N = NodeAllocator.Allocate<UnarySDNode>();
2378 new (N) UnarySDNode(Opcode, DL, VTs, Operand);
2379 CSEMap.InsertNode(N, IP);
2381 N = NodeAllocator.Allocate<UnarySDNode>();
2382 new (N) UnarySDNode(Opcode, DL, VTs, Operand);
2385 AllNodes.push_back(N);
2389 return SDValue(N, 0);
2392 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2394 ConstantSDNode *Cst1,
2395 ConstantSDNode *Cst2) {
2396 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
2399 case ISD::ADD: return getConstant(C1 + C2, VT);
2400 case ISD::SUB: return getConstant(C1 - C2, VT);
2401 case ISD::MUL: return getConstant(C1 * C2, VT);
2403 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2406 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2409 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2412 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2414 case ISD::AND: return getConstant(C1 & C2, VT);
2415 case ISD::OR: return getConstant(C1 | C2, VT);
2416 case ISD::XOR: return getConstant(C1 ^ C2, VT);
2417 case ISD::SHL: return getConstant(C1 << C2, VT);
2418 case ISD::SRL: return getConstant(C1.lshr(C2), VT);
2419 case ISD::SRA: return getConstant(C1.ashr(C2), VT);
2420 case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2421 case ISD::ROTR: return getConstant(C1.rotr(C2), VT);
2428 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
2429 SDValue N1, SDValue N2) {
2430 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, N1, N2);
2433 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
2434 SDValue N1, SDValue N2) {
2435 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2436 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2439 case ISD::TokenFactor:
2440 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2441 N2.getValueType() == MVT::Other && "Invalid token factor!");
2442 // Fold trivial token factors.
2443 if (N1.getOpcode() == ISD::EntryToken) return N2;
2444 if (N2.getOpcode() == ISD::EntryToken) return N1;
2445 if (N1 == N2) return N1;
2447 case ISD::CONCAT_VECTORS:
2448 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2449 // one big BUILD_VECTOR.
2450 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2451 N2.getOpcode() == ISD::BUILD_VECTOR) {
2452 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2453 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2454 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2458 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2459 N1.getValueType() == VT && "Binary operator types must match!");
2460 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2461 // worth handling here.
2462 if (N2C && N2C->isNullValue())
2464 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2471 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2472 N1.getValueType() == VT && "Binary operator types must match!");
2473 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2474 // it's worth handling here.
2475 if (N2C && N2C->isNullValue())
2485 assert(VT.isInteger() && "This operator does not apply to FP types!");
2493 if (Opcode == ISD::FADD) {
2495 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
2496 if (CFP->getValueAPF().isZero())
2499 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2500 if (CFP->getValueAPF().isZero())
2502 } else if (Opcode == ISD::FSUB) {
2504 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2505 if (CFP->getValueAPF().isZero())
2509 assert(N1.getValueType() == N2.getValueType() &&
2510 N1.getValueType() == VT && "Binary operator types must match!");
2512 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2513 assert(N1.getValueType() == VT &&
2514 N1.getValueType().isFloatingPoint() &&
2515 N2.getValueType().isFloatingPoint() &&
2516 "Invalid FCOPYSIGN!");
2523 assert(VT == N1.getValueType() &&
2524 "Shift operators return type must be the same as their first arg");
2525 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2526 "Shifts only work on integers");
2528 // Always fold shifts of i1 values so the code generator doesn't need to
2529 // handle them. Since we know the size of the shift has to be less than the
2530 // size of the value, the shift/rotate count is guaranteed to be zero.
2534 case ISD::FP_ROUND_INREG: {
2535 MVT EVT = cast<VTSDNode>(N2)->getVT();
2536 assert(VT == N1.getValueType() && "Not an inreg round!");
2537 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2538 "Cannot FP_ROUND_INREG integer types");
2539 assert(EVT.bitsLE(VT) && "Not rounding down!");
2540 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2544 assert(VT.isFloatingPoint() &&
2545 N1.getValueType().isFloatingPoint() &&
2546 VT.bitsLE(N1.getValueType()) &&
2547 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2548 if (N1.getValueType() == VT) return N1; // noop conversion.
2550 case ISD::AssertSext:
2551 case ISD::AssertZext: {
2552 MVT EVT = cast<VTSDNode>(N2)->getVT();
2553 assert(VT == N1.getValueType() && "Not an inreg extend!");
2554 assert(VT.isInteger() && EVT.isInteger() &&
2555 "Cannot *_EXTEND_INREG FP types");
2556 assert(EVT.bitsLE(VT) && "Not extending!");
2557 if (VT == EVT) return N1; // noop assertion.
2560 case ISD::SIGN_EXTEND_INREG: {
2561 MVT EVT = cast<VTSDNode>(N2)->getVT();
2562 assert(VT == N1.getValueType() && "Not an inreg extend!");
2563 assert(VT.isInteger() && EVT.isInteger() &&
2564 "Cannot *_EXTEND_INREG FP types");
2565 assert(EVT.bitsLE(VT) && "Not extending!");
2566 if (EVT == VT) return N1; // Not actually extending
2569 APInt Val = N1C->getAPIntValue();
2570 unsigned FromBits = cast<VTSDNode>(N2)->getVT().getSizeInBits();
2571 Val <<= Val.getBitWidth()-FromBits;
2572 Val = Val.ashr(Val.getBitWidth()-FromBits);
2573 return getConstant(Val, VT);
2577 case ISD::EXTRACT_VECTOR_ELT:
2578 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2579 if (N1.getOpcode() == ISD::UNDEF)
2580 return getNode(ISD::UNDEF, DL, VT);
2582 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2583 // expanding copies of large vectors from registers.
2585 N1.getOpcode() == ISD::CONCAT_VECTORS &&
2586 N1.getNumOperands() > 0) {
2588 N1.getOperand(0).getValueType().getVectorNumElements();
2589 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
2590 N1.getOperand(N2C->getZExtValue() / Factor),
2591 getConstant(N2C->getZExtValue() % Factor,
2592 N2.getValueType()));
2595 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2596 // expanding large vector constants.
2597 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR)
2598 return N1.getOperand(N2C->getZExtValue());
2600 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2601 // operations are lowered to scalars.
2602 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2603 // If the indices are the same, return the inserted element.
2604 if (N1.getOperand(2) == N2)
2605 return N1.getOperand(1);
2606 // If the indices are known different, extract the element from
2607 // the original vector.
2608 else if (isa<ConstantSDNode>(N1.getOperand(2)) &&
2609 isa<ConstantSDNode>(N2))
2610 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
2613 case ISD::EXTRACT_ELEMENT:
2614 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
2615 assert(!N1.getValueType().isVector() && !VT.isVector() &&
2616 (N1.getValueType().isInteger() == VT.isInteger()) &&
2617 "Wrong types for EXTRACT_ELEMENT!");
2619 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2620 // 64-bit integers into 32-bit parts. Instead of building the extract of
2621 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2622 if (N1.getOpcode() == ISD::BUILD_PAIR)
2623 return N1.getOperand(N2C->getZExtValue());
2625 // EXTRACT_ELEMENT of a constant int is also very common.
2626 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2627 unsigned ElementSize = VT.getSizeInBits();
2628 unsigned Shift = ElementSize * N2C->getZExtValue();
2629 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2630 return getConstant(ShiftedVal.trunc(ElementSize), VT);
2633 case ISD::EXTRACT_SUBVECTOR:
2634 if (N1.getValueType() == VT) // Trivial extraction.
2641 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
2642 if (SV.getNode()) return SV;
2643 } else { // Cannonicalize constant to RHS if commutative
2644 if (isCommutativeBinOp(Opcode)) {
2645 std::swap(N1C, N2C);
2651 // Constant fold FP operations.
2652 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
2653 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
2655 if (!N2CFP && isCommutativeBinOp(Opcode)) {
2656 // Cannonicalize constant to RHS if commutative
2657 std::swap(N1CFP, N2CFP);
2659 } else if (N2CFP && VT != MVT::ppcf128) {
2660 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
2661 APFloat::opStatus s;
2664 s = V1.add(V2, APFloat::rmNearestTiesToEven);
2665 if (s != APFloat::opInvalidOp)
2666 return getConstantFP(V1, VT);
2669 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
2670 if (s!=APFloat::opInvalidOp)
2671 return getConstantFP(V1, VT);
2674 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
2675 if (s!=APFloat::opInvalidOp)
2676 return getConstantFP(V1, VT);
2679 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
2680 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2681 return getConstantFP(V1, VT);
2684 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
2685 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2686 return getConstantFP(V1, VT);
2688 case ISD::FCOPYSIGN:
2690 return getConstantFP(V1, VT);
2696 // Canonicalize an UNDEF to the RHS, even over a constant.
2697 if (N1.getOpcode() == ISD::UNDEF) {
2698 if (isCommutativeBinOp(Opcode)) {
2702 case ISD::FP_ROUND_INREG:
2703 case ISD::SIGN_EXTEND_INREG:
2709 return N1; // fold op(undef, arg2) -> undef
2717 return getConstant(0, VT); // fold op(undef, arg2) -> 0
2718 // For vectors, we can't easily build an all zero vector, just return
2725 // Fold a bunch of operators when the RHS is undef.
2726 if (N2.getOpcode() == ISD::UNDEF) {
2729 if (N1.getOpcode() == ISD::UNDEF)
2730 // Handle undef ^ undef -> 0 special case. This is a common
2732 return getConstant(0, VT);
2747 return N2; // fold op(arg1, undef) -> undef
2753 return getConstant(0, VT); // fold op(arg1, undef) -> 0
2754 // For vectors, we can't easily build an all zero vector, just return
2759 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
2760 // For vectors, we can't easily build an all one vector, just return
2768 // Memoize this node if possible.
2770 SDVTList VTs = getVTList(VT);
2771 if (VT != MVT::Flag) {
2772 SDValue Ops[] = { N1, N2 };
2773 FoldingSetNodeID ID;
2774 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
2776 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2777 return SDValue(E, 0);
2778 N = NodeAllocator.Allocate<BinarySDNode>();
2779 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2);
2780 CSEMap.InsertNode(N, IP);
2782 N = NodeAllocator.Allocate<BinarySDNode>();
2783 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2);
2786 AllNodes.push_back(N);
2790 return SDValue(N, 0);
2793 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
2794 SDValue N1, SDValue N2, SDValue N3) {
2795 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, N1, N2, N3);
2798 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
2799 SDValue N1, SDValue N2, SDValue N3) {
2800 // Perform various simplifications.
2801 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2802 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2804 case ISD::CONCAT_VECTORS:
2805 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2806 // one big BUILD_VECTOR.
2807 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2808 N2.getOpcode() == ISD::BUILD_VECTOR &&
2809 N3.getOpcode() == ISD::BUILD_VECTOR) {
2810 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2811 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2812 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end());
2813 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2817 // Use FoldSetCC to simplify SETCC's.
2818 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
2819 if (Simp.getNode()) return Simp;
2824 if (N1C->getZExtValue())
2825 return N2; // select true, X, Y -> X
2827 return N3; // select false, X, Y -> Y
2830 if (N2 == N3) return N2; // select C, X, X -> X
2834 if (N2C->getZExtValue()) // Unconditional branch
2835 return getNode(ISD::BR, DL, MVT::Other, N1, N3);
2837 return N1; // Never-taken branch
2840 case ISD::VECTOR_SHUFFLE:
2841 assert(N1.getValueType() == N2.getValueType() &&
2842 N1.getValueType().isVector() &&
2843 VT.isVector() && N3.getValueType().isVector() &&
2844 N3.getOpcode() == ISD::BUILD_VECTOR &&
2845 VT.getVectorNumElements() == N3.getNumOperands() &&
2846 "Illegal VECTOR_SHUFFLE node!");
2848 case ISD::BIT_CONVERT:
2849 // Fold bit_convert nodes from a type to themselves.
2850 if (N1.getValueType() == VT)
2855 // Memoize node if it doesn't produce a flag.
2857 SDVTList VTs = getVTList(VT);
2858 if (VT != MVT::Flag) {
2859 SDValue Ops[] = { N1, N2, N3 };
2860 FoldingSetNodeID ID;
2861 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
2863 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2864 return SDValue(E, 0);
2865 N = NodeAllocator.Allocate<TernarySDNode>();
2866 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
2867 CSEMap.InsertNode(N, IP);
2869 N = NodeAllocator.Allocate<TernarySDNode>();
2870 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
2872 AllNodes.push_back(N);
2876 return SDValue(N, 0);
2879 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
2880 SDValue N1, SDValue N2, SDValue N3,
2882 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, N1, N2, N3, N4);
2885 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
2886 SDValue N1, SDValue N2, SDValue N3,
2888 SDValue Ops[] = { N1, N2, N3, N4 };
2889 return getNode(Opcode, DL, VT, Ops, 4);
2892 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
2893 SDValue N1, SDValue N2, SDValue N3,
2894 SDValue N4, SDValue N5) {
2895 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, N1, N2, N3, N4, N5);
2898 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
2899 SDValue N1, SDValue N2, SDValue N3,
2900 SDValue N4, SDValue N5) {
2901 SDValue Ops[] = { N1, N2, N3, N4, N5 };
2902 return getNode(Opcode, DL, VT, Ops, 5);
2905 /// getMemsetValue - Vectorized representation of the memset value
2907 static SDValue getMemsetValue(SDValue Value, MVT VT, SelectionDAG &DAG,
2909 unsigned NumBits = VT.isVector() ?
2910 VT.getVectorElementType().getSizeInBits() : VT.getSizeInBits();
2911 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
2912 APInt Val = APInt(NumBits, C->getZExtValue() & 255);
2914 for (unsigned i = NumBits; i > 8; i >>= 1) {
2915 Val = (Val << Shift) | Val;
2919 return DAG.getConstant(Val, VT);
2920 return DAG.getConstantFP(APFloat(Val), VT);
2923 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
2924 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value);
2926 for (unsigned i = NumBits; i > 8; i >>= 1) {
2927 Value = DAG.getNode(ISD::OR, dl, VT,
2928 DAG.getNode(ISD::SHL, dl, VT, Value,
2929 DAG.getConstant(Shift,
2930 TLI.getShiftAmountTy())),
2938 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
2939 /// used when a memcpy is turned into a memset when the source is a constant
2941 static SDValue getMemsetStringVal(MVT VT, DebugLoc dl, SelectionDAG &DAG,
2942 const TargetLowering &TLI,
2943 std::string &Str, unsigned Offset) {
2944 // Handle vector with all elements zero.
2947 return DAG.getConstant(0, VT);
2948 unsigned NumElts = VT.getVectorNumElements();
2949 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
2950 return DAG.getNode(ISD::BIT_CONVERT, dl, VT,
2951 DAG.getConstant(0, MVT::getVectorVT(EltVT, NumElts)));
2954 assert(!VT.isVector() && "Can't handle vector type here!");
2955 unsigned NumBits = VT.getSizeInBits();
2956 unsigned MSB = NumBits / 8;
2958 if (TLI.isLittleEndian())
2959 Offset = Offset + MSB - 1;
2960 for (unsigned i = 0; i != MSB; ++i) {
2961 Val = (Val << 8) | (unsigned char)Str[Offset];
2962 Offset += TLI.isLittleEndian() ? -1 : 1;
2964 return DAG.getConstant(Val, VT);
2967 /// getMemBasePlusOffset - Returns base and offset node for the
2969 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
2970 SelectionDAG &DAG) {
2971 MVT VT = Base.getValueType();
2972 return DAG.getNode(ISD::ADD, Base.getNode()->getDebugLoc(),
2973 VT, Base, DAG.getConstant(Offset, VT));
2976 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
2978 static bool isMemSrcFromString(SDValue Src, std::string &Str) {
2979 unsigned SrcDelta = 0;
2980 GlobalAddressSDNode *G = NULL;
2981 if (Src.getOpcode() == ISD::GlobalAddress)
2982 G = cast<GlobalAddressSDNode>(Src);
2983 else if (Src.getOpcode() == ISD::ADD &&
2984 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
2985 Src.getOperand(1).getOpcode() == ISD::Constant) {
2986 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
2987 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
2992 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal());
2993 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false))
2999 /// MeetsMaxMemopRequirement - Determines if the number of memory ops required
3000 /// to replace the memset / memcpy is below the threshold. It also returns the
3001 /// types of the sequence of memory ops to perform memset / memcpy.
3003 bool MeetsMaxMemopRequirement(std::vector<MVT> &MemOps,
3004 SDValue Dst, SDValue Src,
3005 unsigned Limit, uint64_t Size, unsigned &Align,
3006 std::string &Str, bool &isSrcStr,
3008 const TargetLowering &TLI) {
3009 isSrcStr = isMemSrcFromString(Src, Str);
3010 bool isSrcConst = isa<ConstantSDNode>(Src);
3011 bool AllowUnalign = TLI.allowsUnalignedMemoryAccesses();
3012 MVT VT = TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr);
3013 if (VT != MVT::iAny) {
3014 unsigned NewAlign = (unsigned)
3015 TLI.getTargetData()->getABITypeAlignment(VT.getTypeForMVT());
3016 // If source is a string constant, this will require an unaligned load.
3017 if (NewAlign > Align && (isSrcConst || AllowUnalign)) {
3018 if (Dst.getOpcode() != ISD::FrameIndex) {
3019 // Can't change destination alignment. It requires a unaligned store.
3023 int FI = cast<FrameIndexSDNode>(Dst)->getIndex();
3024 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
3025 if (MFI->isFixedObjectIndex(FI)) {
3026 // Can't change destination alignment. It requires a unaligned store.
3030 // Give the stack frame object a larger alignment if needed.
3031 if (MFI->getObjectAlignment(FI) < NewAlign)
3032 MFI->setObjectAlignment(FI, NewAlign);
3039 if (VT == MVT::iAny) {
3043 switch (Align & 7) {
3044 case 0: VT = MVT::i64; break;
3045 case 4: VT = MVT::i32; break;
3046 case 2: VT = MVT::i16; break;
3047 default: VT = MVT::i8; break;
3052 while (!TLI.isTypeLegal(LVT))
3053 LVT = (MVT::SimpleValueType)(LVT.getSimpleVT() - 1);
3054 assert(LVT.isInteger());
3060 unsigned NumMemOps = 0;
3062 unsigned VTSize = VT.getSizeInBits() / 8;
3063 while (VTSize > Size) {
3064 // For now, only use non-vector load / store's for the left-over pieces.
3065 if (VT.isVector()) {
3067 while (!TLI.isTypeLegal(VT))
3068 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1);
3069 VTSize = VT.getSizeInBits() / 8;
3071 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1);
3076 if (++NumMemOps > Limit)
3078 MemOps.push_back(VT);
3085 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3086 SDValue Chain, SDValue Dst,
3087 SDValue Src, uint64_t Size,
3088 unsigned Align, bool AlwaysInline,
3089 const Value *DstSV, uint64_t DstSVOff,
3090 const Value *SrcSV, uint64_t SrcSVOff){
3091 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3093 // Expand memcpy to a series of load and store ops if the size operand falls
3094 // below a certain threshold.
3095 std::vector<MVT> MemOps;
3096 uint64_t Limit = -1ULL;
3098 Limit = TLI.getMaxStoresPerMemcpy();
3099 unsigned DstAlign = Align; // Destination alignment can change.
3102 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
3103 Str, CopyFromStr, DAG, TLI))
3107 bool isZeroStr = CopyFromStr && Str.empty();
3108 SmallVector<SDValue, 8> OutChains;
3109 unsigned NumMemOps = MemOps.size();
3110 uint64_t SrcOff = 0, DstOff = 0;
3111 for (unsigned i = 0; i < NumMemOps; i++) {
3113 unsigned VTSize = VT.getSizeInBits() / 8;
3114 SDValue Value, Store;
3116 if (CopyFromStr && (isZeroStr || !VT.isVector())) {
3117 // It's unlikely a store of a vector immediate can be done in a single
3118 // instruction. It would require a load from a constantpool first.
3119 // We also handle store a vector with all zero's.
3120 // FIXME: Handle other cases where store of vector immediate is done in
3121 // a single instruction.
3122 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff);
3123 Store = DAG.getStore(Chain, dl, Value,
3124 getMemBasePlusOffset(Dst, DstOff, DAG),
3125 DstSV, DstSVOff + DstOff, false, DstAlign);
3127 Value = DAG.getLoad(VT, dl, Chain,
3128 getMemBasePlusOffset(Src, SrcOff, DAG),
3129 SrcSV, SrcSVOff + SrcOff, false, Align);
3130 Store = DAG.getStore(Chain, dl, Value,
3131 getMemBasePlusOffset(Dst, DstOff, DAG),
3132 DstSV, DstSVOff + DstOff, false, DstAlign);
3134 OutChains.push_back(Store);
3139 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3140 &OutChains[0], OutChains.size());
3143 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3144 SDValue Chain, SDValue Dst,
3145 SDValue Src, uint64_t Size,
3146 unsigned Align, bool AlwaysInline,
3147 const Value *DstSV, uint64_t DstSVOff,
3148 const Value *SrcSV, uint64_t SrcSVOff){
3149 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3151 // Expand memmove to a series of load and store ops if the size operand falls
3152 // below a certain threshold.
3153 std::vector<MVT> MemOps;
3154 uint64_t Limit = -1ULL;
3156 Limit = TLI.getMaxStoresPerMemmove();
3157 unsigned DstAlign = Align; // Destination alignment can change.
3160 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
3161 Str, CopyFromStr, DAG, TLI))
3164 uint64_t SrcOff = 0, DstOff = 0;
3166 SmallVector<SDValue, 8> LoadValues;
3167 SmallVector<SDValue, 8> LoadChains;
3168 SmallVector<SDValue, 8> OutChains;
3169 unsigned NumMemOps = MemOps.size();
3170 for (unsigned i = 0; i < NumMemOps; i++) {
3172 unsigned VTSize = VT.getSizeInBits() / 8;
3173 SDValue Value, Store;
3175 Value = DAG.getLoad(VT, dl, Chain,
3176 getMemBasePlusOffset(Src, SrcOff, DAG),
3177 SrcSV, SrcSVOff + SrcOff, false, Align);
3178 LoadValues.push_back(Value);
3179 LoadChains.push_back(Value.getValue(1));
3182 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3183 &LoadChains[0], LoadChains.size());
3185 for (unsigned i = 0; i < NumMemOps; i++) {
3187 unsigned VTSize = VT.getSizeInBits() / 8;
3188 SDValue Value, Store;
3190 Store = DAG.getStore(Chain, dl, LoadValues[i],
3191 getMemBasePlusOffset(Dst, DstOff, DAG),
3192 DstSV, DstSVOff + DstOff, false, DstAlign);
3193 OutChains.push_back(Store);
3197 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3198 &OutChains[0], OutChains.size());
3201 static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl,
3202 SDValue Chain, SDValue Dst,
3203 SDValue Src, uint64_t Size,
3205 const Value *DstSV, uint64_t DstSVOff) {
3206 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3208 // Expand memset to a series of load/store ops if the size operand
3209 // falls below a certain threshold.
3210 std::vector<MVT> MemOps;
3213 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, TLI.getMaxStoresPerMemset(),
3214 Size, Align, Str, CopyFromStr, DAG, TLI))
3217 SmallVector<SDValue, 8> OutChains;
3218 uint64_t DstOff = 0;
3220 unsigned NumMemOps = MemOps.size();
3221 for (unsigned i = 0; i < NumMemOps; i++) {
3223 unsigned VTSize = VT.getSizeInBits() / 8;
3224 SDValue Value = getMemsetValue(Src, VT, DAG, dl);
3225 SDValue Store = DAG.getStore(Chain, dl, Value,
3226 getMemBasePlusOffset(Dst, DstOff, DAG),
3227 DstSV, DstSVOff + DstOff);
3228 OutChains.push_back(Store);
3232 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3233 &OutChains[0], OutChains.size());
3236 SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst,
3237 SDValue Src, SDValue Size,
3238 unsigned Align, bool AlwaysInline,
3239 const Value *DstSV, uint64_t DstSVOff,
3240 const Value *SrcSV, uint64_t SrcSVOff) {
3242 // Check to see if we should lower the memcpy to loads and stores first.
3243 // For cases within the target-specified limits, this is the best choice.
3244 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3246 // Memcpy with size zero? Just return the original chain.
3247 if (ConstantSize->isNullValue())
3251 getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3252 ConstantSize->getZExtValue(),
3253 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3254 if (Result.getNode())
3258 // Then check to see if we should lower the memcpy with target-specific
3259 // code. If the target chooses to do this, this is the next best.
3261 TLI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align,
3263 DstSV, DstSVOff, SrcSV, SrcSVOff);
3264 if (Result.getNode())
3267 // If we really need inline code and the target declined to provide it,
3268 // use a (potentially long) sequence of loads and stores.
3270 assert(ConstantSize && "AlwaysInline requires a constant size!");
3271 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3272 ConstantSize->getZExtValue(), Align, true,
3273 DstSV, DstSVOff, SrcSV, SrcSVOff);
3276 // Emit a library call.
3277 TargetLowering::ArgListTy Args;
3278 TargetLowering::ArgListEntry Entry;
3279 Entry.Ty = TLI.getTargetData()->getIntPtrType();
3280 Entry.Node = Dst; Args.push_back(Entry);
3281 Entry.Node = Src; Args.push_back(Entry);
3282 Entry.Node = Size; Args.push_back(Entry);
3283 // FIXME: pass in DebugLoc
3284 std::pair<SDValue,SDValue> CallResult =
3285 TLI.LowerCallTo(Chain, Type::VoidTy,
3286 false, false, false, false, CallingConv::C, false,
3287 getExternalSymbol("memcpy", TLI.getPointerTy()),
3289 return CallResult.second;
3292 SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst,
3293 SDValue Src, SDValue Size,
3295 const Value *DstSV, uint64_t DstSVOff,
3296 const Value *SrcSV, uint64_t SrcSVOff) {
3298 // Check to see if we should lower the memmove to loads and stores first.
3299 // For cases within the target-specified limits, this is the best choice.
3300 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3302 // Memmove with size zero? Just return the original chain.
3303 if (ConstantSize->isNullValue())
3307 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
3308 ConstantSize->getZExtValue(),
3309 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3310 if (Result.getNode())
3314 // Then check to see if we should lower the memmove with target-specific
3315 // code. If the target chooses to do this, this is the next best.
3317 TLI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align,
3318 DstSV, DstSVOff, SrcSV, SrcSVOff);
3319 if (Result.getNode())
3322 // Emit a library call.
3323 TargetLowering::ArgListTy Args;
3324 TargetLowering::ArgListEntry Entry;
3325 Entry.Ty = TLI.getTargetData()->getIntPtrType();
3326 Entry.Node = Dst; Args.push_back(Entry);
3327 Entry.Node = Src; Args.push_back(Entry);
3328 Entry.Node = Size; Args.push_back(Entry);
3329 // FIXME: pass in DebugLoc
3330 std::pair<SDValue,SDValue> CallResult =
3331 TLI.LowerCallTo(Chain, Type::VoidTy,
3332 false, false, false, false, CallingConv::C, false,
3333 getExternalSymbol("memmove", TLI.getPointerTy()),
3335 return CallResult.second;
3338 SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst,
3339 SDValue Src, SDValue Size,
3341 const Value *DstSV, uint64_t DstSVOff) {
3343 // Check to see if we should lower the memset to stores first.
3344 // For cases within the target-specified limits, this is the best choice.
3345 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3347 // Memset with size zero? Just return the original chain.
3348 if (ConstantSize->isNullValue())
3352 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
3353 Align, DstSV, DstSVOff);
3354 if (Result.getNode())
3358 // Then check to see if we should lower the memset with target-specific
3359 // code. If the target chooses to do this, this is the next best.
3361 TLI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align,
3363 if (Result.getNode())
3366 // Emit a library call.
3367 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType();
3368 TargetLowering::ArgListTy Args;
3369 TargetLowering::ArgListEntry Entry;
3370 Entry.Node = Dst; Entry.Ty = IntPtrTy;
3371 Args.push_back(Entry);
3372 // Extend or truncate the argument to be an i32 value for the call.
3373 if (Src.getValueType().bitsGT(MVT::i32))
3374 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
3376 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
3377 Entry.Node = Src; Entry.Ty = Type::Int32Ty; Entry.isSExt = true;
3378 Args.push_back(Entry);
3379 Entry.Node = Size; Entry.Ty = IntPtrTy; Entry.isSExt = false;
3380 Args.push_back(Entry);
3381 // FIXME: pass in DebugLoc
3382 std::pair<SDValue,SDValue> CallResult =
3383 TLI.LowerCallTo(Chain, Type::VoidTy,
3384 false, false, false, false, CallingConv::C, false,
3385 getExternalSymbol("memset", TLI.getPointerTy()),
3387 return CallResult.second;
3390 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, MVT MemVT,
3392 SDValue Ptr, SDValue Cmp,
3393 SDValue Swp, const Value* PtrVal,
3394 unsigned Alignment) {
3395 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
3396 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3398 MVT VT = Cmp.getValueType();
3400 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3401 Alignment = getMVTAlignment(MemVT);
3403 SDVTList VTs = getVTList(VT, MVT::Other);
3404 FoldingSetNodeID ID;
3405 ID.AddInteger(MemVT.getRawBits());
3406 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3407 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3409 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3410 return SDValue(E, 0);
3411 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3412 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT,
3413 Chain, Ptr, Cmp, Swp, PtrVal, Alignment);
3414 CSEMap.InsertNode(N, IP);
3415 AllNodes.push_back(N);
3416 return SDValue(N, 0);
3419 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, MVT MemVT,
3421 SDValue Ptr, SDValue Val,
3422 const Value* PtrVal,
3423 unsigned Alignment) {
3424 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
3425 Opcode == ISD::ATOMIC_LOAD_SUB ||
3426 Opcode == ISD::ATOMIC_LOAD_AND ||
3427 Opcode == ISD::ATOMIC_LOAD_OR ||
3428 Opcode == ISD::ATOMIC_LOAD_XOR ||
3429 Opcode == ISD::ATOMIC_LOAD_NAND ||
3430 Opcode == ISD::ATOMIC_LOAD_MIN ||
3431 Opcode == ISD::ATOMIC_LOAD_MAX ||
3432 Opcode == ISD::ATOMIC_LOAD_UMIN ||
3433 Opcode == ISD::ATOMIC_LOAD_UMAX ||
3434 Opcode == ISD::ATOMIC_SWAP) &&
3435 "Invalid Atomic Op");
3437 MVT VT = Val.getValueType();
3439 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3440 Alignment = getMVTAlignment(MemVT);
3442 SDVTList VTs = getVTList(VT, MVT::Other);
3443 FoldingSetNodeID ID;
3444 ID.AddInteger(MemVT.getRawBits());
3445 SDValue Ops[] = {Chain, Ptr, Val};
3446 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3448 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3449 return SDValue(E, 0);
3450 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3451 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT,
3452 Chain, Ptr, Val, PtrVal, Alignment);
3453 CSEMap.InsertNode(N, IP);
3454 AllNodes.push_back(N);
3455 return SDValue(N, 0);
3458 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
3459 /// Allowed to return something different (and simpler) if Simplify is true.
3460 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps,
3465 SmallVector<MVT, 4> VTs;
3466 VTs.reserve(NumOps);
3467 for (unsigned i = 0; i < NumOps; ++i)
3468 VTs.push_back(Ops[i].getValueType());
3469 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps),
3474 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl,
3475 const MVT *VTs, unsigned NumVTs,
3476 const SDValue *Ops, unsigned NumOps,
3477 MVT MemVT, const Value *srcValue, int SVOff,
3478 unsigned Align, bool Vol,
3479 bool ReadMem, bool WriteMem) {
3480 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps,
3481 MemVT, srcValue, SVOff, Align, Vol,
3486 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
3487 const SDValue *Ops, unsigned NumOps,
3488 MVT MemVT, const Value *srcValue, int SVOff,
3489 unsigned Align, bool Vol,
3490 bool ReadMem, bool WriteMem) {
3491 // Memoize the node unless it returns a flag.
3492 MemIntrinsicSDNode *N;
3493 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3494 FoldingSetNodeID ID;
3495 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3497 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3498 return SDValue(E, 0);
3500 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3501 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT,
3502 srcValue, SVOff, Align, Vol, ReadMem, WriteMem);
3503 CSEMap.InsertNode(N, IP);
3505 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3506 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT,
3507 srcValue, SVOff, Align, Vol, ReadMem, WriteMem);
3509 AllNodes.push_back(N);
3510 return SDValue(N, 0);
3514 SelectionDAG::getCall(unsigned CallingConv, DebugLoc dl, bool IsVarArgs,
3515 bool IsTailCall, bool IsInreg, SDVTList VTs,
3516 const SDValue *Operands, unsigned NumOperands) {
3517 // Do not include isTailCall in the folding set profile.
3518 FoldingSetNodeID ID;
3519 AddNodeIDNode(ID, ISD::CALL, VTs, Operands, NumOperands);
3520 ID.AddInteger(CallingConv);
3521 ID.AddInteger(IsVarArgs);
3523 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3524 // Instead of including isTailCall in the folding set, we just
3525 // set the flag of the existing node.
3527 cast<CallSDNode>(E)->setNotTailCall();
3528 return SDValue(E, 0);
3530 SDNode *N = NodeAllocator.Allocate<CallSDNode>();
3531 new (N) CallSDNode(CallingConv, dl, IsVarArgs, IsTailCall, IsInreg,
3532 VTs, Operands, NumOperands);
3533 CSEMap.InsertNode(N, IP);
3534 AllNodes.push_back(N);
3535 return SDValue(N, 0);
3539 SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl,
3540 ISD::LoadExtType ExtType, MVT VT, SDValue Chain,
3541 SDValue Ptr, SDValue Offset,
3542 const Value *SV, int SVOffset, MVT EVT,
3543 bool isVolatile, unsigned Alignment) {
3544 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3545 Alignment = getMVTAlignment(VT);
3548 ExtType = ISD::NON_EXTLOAD;
3549 } else if (ExtType == ISD::NON_EXTLOAD) {
3550 assert(VT == EVT && "Non-extending load from different memory type!");
3554 assert(EVT.getVectorNumElements() == VT.getVectorNumElements() &&
3555 "Invalid vector extload!");
3557 assert(EVT.bitsLT(VT) &&
3558 "Should only be an extending load, not truncating!");
3559 assert((ExtType == ISD::EXTLOAD || VT.isInteger()) &&
3560 "Cannot sign/zero extend a FP/Vector load!");
3561 assert(VT.isInteger() == EVT.isInteger() &&
3562 "Cannot convert from FP to Int or Int -> FP!");
3565 bool Indexed = AM != ISD::UNINDEXED;
3566 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
3567 "Unindexed load with an offset!");
3569 SDVTList VTs = Indexed ?
3570 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
3571 SDValue Ops[] = { Chain, Ptr, Offset };
3572 FoldingSetNodeID ID;
3573 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
3574 ID.AddInteger(EVT.getRawBits());
3575 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, isVolatile, Alignment));
3577 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3578 return SDValue(E, 0);
3579 SDNode *N = NodeAllocator.Allocate<LoadSDNode>();
3580 new (N) LoadSDNode(Ops, dl, VTs, AM, ExtType, EVT, SV, SVOffset,
3581 Alignment, isVolatile);
3582 CSEMap.InsertNode(N, IP);
3583 AllNodes.push_back(N);
3584 return SDValue(N, 0);
3587 SDValue SelectionDAG::getLoad(MVT VT, DebugLoc dl,
3588 SDValue Chain, SDValue Ptr,
3589 const Value *SV, int SVOffset,
3590 bool isVolatile, unsigned Alignment) {
3591 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3592 return getLoad(ISD::UNINDEXED, dl, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef,
3593 SV, SVOffset, VT, isVolatile, Alignment);
3596 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, MVT VT,
3597 SDValue Chain, SDValue Ptr,
3599 int SVOffset, MVT EVT,
3600 bool isVolatile, unsigned Alignment) {
3601 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3602 return getLoad(ISD::UNINDEXED, dl, ExtType, VT, Chain, Ptr, Undef,
3603 SV, SVOffset, EVT, isVolatile, Alignment);
3607 SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base,
3608 SDValue Offset, ISD::MemIndexedMode AM) {
3609 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
3610 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
3611 "Load is already a indexed load!");
3612 return getLoad(AM, dl, LD->getExtensionType(), OrigLoad.getValueType(),
3613 LD->getChain(), Base, Offset, LD->getSrcValue(),
3614 LD->getSrcValueOffset(), LD->getMemoryVT(),
3615 LD->isVolatile(), LD->getAlignment());
3618 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
3619 SDValue Ptr, const Value *SV, int SVOffset,
3620 bool isVolatile, unsigned Alignment) {
3621 MVT VT = Val.getValueType();
3623 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3624 Alignment = getMVTAlignment(VT);
3626 SDVTList VTs = getVTList(MVT::Other);
3627 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3628 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3629 FoldingSetNodeID ID;
3630 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3631 ID.AddInteger(VT.getRawBits());
3632 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED,
3633 isVolatile, Alignment));
3635 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3636 return SDValue(E, 0);
3637 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3638 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, false,
3639 VT, SV, SVOffset, Alignment, isVolatile);
3640 CSEMap.InsertNode(N, IP);
3641 AllNodes.push_back(N);
3642 return SDValue(N, 0);
3645 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
3646 SDValue Ptr, const Value *SV,
3647 int SVOffset, MVT SVT,
3648 bool isVolatile, unsigned Alignment) {
3649 MVT VT = Val.getValueType();
3652 return getStore(Chain, dl, Val, Ptr, SV, SVOffset, isVolatile, Alignment);
3654 assert(VT.bitsGT(SVT) && "Not a truncation?");
3655 assert(VT.isInteger() == SVT.isInteger() &&
3656 "Can't do FP-INT conversion!");
3658 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3659 Alignment = getMVTAlignment(VT);
3661 SDVTList VTs = getVTList(MVT::Other);
3662 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3663 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3664 FoldingSetNodeID ID;
3665 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3666 ID.AddInteger(SVT.getRawBits());
3667 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED,
3668 isVolatile, Alignment));
3670 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3671 return SDValue(E, 0);
3672 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3673 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, true,
3674 SVT, SV, SVOffset, Alignment, isVolatile);
3675 CSEMap.InsertNode(N, IP);
3676 AllNodes.push_back(N);
3677 return SDValue(N, 0);
3681 SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base,
3682 SDValue Offset, ISD::MemIndexedMode AM) {
3683 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
3684 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
3685 "Store is already a indexed store!");
3686 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
3687 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
3688 FoldingSetNodeID ID;
3689 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3690 ID.AddInteger(ST->getMemoryVT().getRawBits());
3691 ID.AddInteger(ST->getRawSubclassData());
3693 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3694 return SDValue(E, 0);
3695 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3696 new (N) StoreSDNode(Ops, dl, VTs, AM,
3697 ST->isTruncatingStore(), ST->getMemoryVT(),
3698 ST->getSrcValue(), ST->getSrcValueOffset(),
3699 ST->getAlignment(), ST->isVolatile());
3700 CSEMap.InsertNode(N, IP);
3701 AllNodes.push_back(N);
3702 return SDValue(N, 0);
3705 SDValue SelectionDAG::getVAArg(MVT VT, DebugLoc dl,
3706 SDValue Chain, SDValue Ptr,
3708 SDValue Ops[] = { Chain, Ptr, SV };
3709 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 3);
3712 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
3713 const SDUse *Ops, unsigned NumOps) {
3714 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, Ops, NumOps);
3717 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
3718 const SDUse *Ops, unsigned NumOps) {
3720 case 0: return getNode(Opcode, DL, VT);
3721 case 1: return getNode(Opcode, DL, VT, Ops[0]);
3722 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
3723 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
3727 // Copy from an SDUse array into an SDValue array for use with
3728 // the regular getNode logic.
3729 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
3730 return getNode(Opcode, DL, VT, &NewOps[0], NumOps);
3733 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
3734 const SDValue *Ops, unsigned NumOps) {
3735 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, Ops, NumOps);
3738 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
3739 const SDValue *Ops, unsigned NumOps) {
3741 case 0: return getNode(Opcode, DL, VT);
3742 case 1: return getNode(Opcode, DL, VT, Ops[0]);
3743 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
3744 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
3750 case ISD::SELECT_CC: {
3751 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
3752 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
3753 "LHS and RHS of condition must have same type!");
3754 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
3755 "True and False arms of SelectCC must have same type!");
3756 assert(Ops[2].getValueType() == VT &&
3757 "select_cc node must be of same type as true and false value!");
3761 assert(NumOps == 5 && "BR_CC takes 5 operands!");
3762 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
3763 "LHS/RHS of comparison should match types!");
3770 SDVTList VTs = getVTList(VT);
3772 if (VT != MVT::Flag) {
3773 FoldingSetNodeID ID;
3774 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
3777 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3778 return SDValue(E, 0);
3780 N = NodeAllocator.Allocate<SDNode>();
3781 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps);
3782 CSEMap.InsertNode(N, IP);
3784 N = NodeAllocator.Allocate<SDNode>();
3785 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps);
3788 AllNodes.push_back(N);
3792 return SDValue(N, 0);
3795 SDValue SelectionDAG::getNode(unsigned Opcode,
3796 const std::vector<MVT> &ResultTys,
3797 const SDValue *Ops, unsigned NumOps) {
3798 return getNode(Opcode, DebugLoc::getUnknownLoc(), ResultTys, Ops, NumOps);
3801 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
3802 const std::vector<MVT> &ResultTys,
3803 const SDValue *Ops, unsigned NumOps) {
3804 return getNode(Opcode, DL, getNodeValueTypes(ResultTys), ResultTys.size(),
3808 SDValue SelectionDAG::getNode(unsigned Opcode,
3809 const MVT *VTs, unsigned NumVTs,
3810 const SDValue *Ops, unsigned NumOps) {
3811 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTs, NumVTs, Ops, NumOps);
3814 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
3815 const MVT *VTs, unsigned NumVTs,
3816 const SDValue *Ops, unsigned NumOps) {
3818 return getNode(Opcode, DL, VTs[0], Ops, NumOps);
3819 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps);
3822 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3823 const SDValue *Ops, unsigned NumOps) {
3824 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList, Ops, NumOps);
3827 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
3828 const SDValue *Ops, unsigned NumOps) {
3829 if (VTList.NumVTs == 1)
3830 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps);
3833 // FIXME: figure out how to safely handle things like
3834 // int foo(int x) { return 1 << (x & 255); }
3835 // int bar() { return foo(256); }
3837 case ISD::SRA_PARTS:
3838 case ISD::SRL_PARTS:
3839 case ISD::SHL_PARTS:
3840 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
3841 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
3842 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
3843 else if (N3.getOpcode() == ISD::AND)
3844 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
3845 // If the and is only masking out bits that cannot effect the shift,
3846 // eliminate the and.
3847 unsigned NumBits = VT.getSizeInBits()*2;
3848 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
3849 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
3855 // Memoize the node unless it returns a flag.
3857 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3858 FoldingSetNodeID ID;
3859 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3861 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3862 return SDValue(E, 0);
3864 N = NodeAllocator.Allocate<UnarySDNode>();
3865 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]);
3866 } else if (NumOps == 2) {
3867 N = NodeAllocator.Allocate<BinarySDNode>();
3868 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
3869 } else if (NumOps == 3) {
3870 N = NodeAllocator.Allocate<TernarySDNode>();
3871 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]);
3873 N = NodeAllocator.Allocate<SDNode>();
3874 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps);
3876 CSEMap.InsertNode(N, IP);
3879 N = NodeAllocator.Allocate<UnarySDNode>();
3880 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]);
3881 } else if (NumOps == 2) {
3882 N = NodeAllocator.Allocate<BinarySDNode>();
3883 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
3884 } else if (NumOps == 3) {
3885 N = NodeAllocator.Allocate<TernarySDNode>();
3886 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]);
3888 N = NodeAllocator.Allocate<SDNode>();
3889 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps);
3892 AllNodes.push_back(N);
3896 return SDValue(N, 0);
3899 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) {
3900 return getNode(Opcode, DL, VTList, 0, 0);
3903 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
3905 SDValue Ops[] = { N1 };
3906 return getNode(Opcode, DL, VTList, Ops, 1);
3909 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
3910 SDValue N1, SDValue N2) {
3911 SDValue Ops[] = { N1, N2 };
3912 return getNode(Opcode, DL, VTList, Ops, 2);
3915 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
3916 SDValue N1, SDValue N2, SDValue N3) {
3917 SDValue Ops[] = { N1, N2, N3 };
3918 return getNode(Opcode, DL, VTList, Ops, 3);
3921 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
3922 SDValue N1, SDValue N2, SDValue N3,
3924 SDValue Ops[] = { N1, N2, N3, N4 };
3925 return getNode(Opcode, DL, VTList, Ops, 4);
3928 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
3929 SDValue N1, SDValue N2, SDValue N3,
3930 SDValue N4, SDValue N5) {
3931 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3932 return getNode(Opcode, DL, VTList, Ops, 5);
3935 SDVTList SelectionDAG::getVTList(MVT VT) {
3936 return makeVTList(SDNode::getValueTypeList(VT), 1);
3939 SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2) {
3940 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
3941 E = VTList.rend(); I != E; ++I)
3942 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
3945 MVT *Array = Allocator.Allocate<MVT>(2);
3948 SDVTList Result = makeVTList(Array, 2);
3949 VTList.push_back(Result);
3953 SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2, MVT VT3) {
3954 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
3955 E = VTList.rend(); I != E; ++I)
3956 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
3960 MVT *Array = Allocator.Allocate<MVT>(3);
3964 SDVTList Result = makeVTList(Array, 3);
3965 VTList.push_back(Result);
3969 SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2, MVT VT3, MVT VT4) {
3970 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
3971 E = VTList.rend(); I != E; ++I)
3972 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
3973 I->VTs[2] == VT3 && I->VTs[3] == VT4)
3976 MVT *Array = Allocator.Allocate<MVT>(3);
3981 SDVTList Result = makeVTList(Array, 4);
3982 VTList.push_back(Result);
3986 SDVTList SelectionDAG::getVTList(const MVT *VTs, unsigned NumVTs) {
3988 case 0: assert(0 && "Cannot have nodes without results!");
3989 case 1: return getVTList(VTs[0]);
3990 case 2: return getVTList(VTs[0], VTs[1]);
3991 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
3995 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
3996 E = VTList.rend(); I != E; ++I) {
3997 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
4000 bool NoMatch = false;
4001 for (unsigned i = 2; i != NumVTs; ++i)
4002 if (VTs[i] != I->VTs[i]) {
4010 MVT *Array = Allocator.Allocate<MVT>(NumVTs);
4011 std::copy(VTs, VTs+NumVTs, Array);
4012 SDVTList Result = makeVTList(Array, NumVTs);
4013 VTList.push_back(Result);
4018 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
4019 /// specified operands. If the resultant node already exists in the DAG,
4020 /// this does not modify the specified node, instead it returns the node that
4021 /// already exists. If the resultant node does not exist in the DAG, the
4022 /// input node is returned. As a degenerate case, if you specify the same
4023 /// input operands as the node already has, the input node is returned.
4024 SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) {
4025 SDNode *N = InN.getNode();
4026 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
4028 // Check to see if there is no change.
4029 if (Op == N->getOperand(0)) return InN;
4031 // See if the modified node already exists.
4032 void *InsertPos = 0;
4033 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
4034 return SDValue(Existing, InN.getResNo());
4036 // Nope it doesn't. Remove the node from its current place in the maps.
4038 if (!RemoveNodeFromCSEMaps(N))
4041 // Now we update the operands.
4042 N->OperandList[0].set(Op);
4044 // If this gets put into a CSE map, add it.
4045 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4049 SDValue SelectionDAG::
4050 UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) {
4051 SDNode *N = InN.getNode();
4052 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
4054 // Check to see if there is no change.
4055 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
4056 return InN; // No operands changed, just return the input node.
4058 // See if the modified node already exists.
4059 void *InsertPos = 0;
4060 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
4061 return SDValue(Existing, InN.getResNo());
4063 // Nope it doesn't. Remove the node from its current place in the maps.
4065 if (!RemoveNodeFromCSEMaps(N))
4068 // Now we update the operands.
4069 if (N->OperandList[0] != Op1)
4070 N->OperandList[0].set(Op1);
4071 if (N->OperandList[1] != Op2)
4072 N->OperandList[1].set(Op2);
4074 // If this gets put into a CSE map, add it.
4075 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4079 SDValue SelectionDAG::
4080 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) {
4081 SDValue Ops[] = { Op1, Op2, Op3 };
4082 return UpdateNodeOperands(N, Ops, 3);
4085 SDValue SelectionDAG::
4086 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
4087 SDValue Op3, SDValue Op4) {
4088 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
4089 return UpdateNodeOperands(N, Ops, 4);
4092 SDValue SelectionDAG::
4093 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
4094 SDValue Op3, SDValue Op4, SDValue Op5) {
4095 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
4096 return UpdateNodeOperands(N, Ops, 5);
4099 SDValue SelectionDAG::
4100 UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) {
4101 SDNode *N = InN.getNode();
4102 assert(N->getNumOperands() == NumOps &&
4103 "Update with wrong number of operands");
4105 // Check to see if there is no change.
4106 bool AnyChange = false;
4107 for (unsigned i = 0; i != NumOps; ++i) {
4108 if (Ops[i] != N->getOperand(i)) {
4114 // No operands changed, just return the input node.
4115 if (!AnyChange) return InN;
4117 // See if the modified node already exists.
4118 void *InsertPos = 0;
4119 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
4120 return SDValue(Existing, InN.getResNo());
4122 // Nope it doesn't. Remove the node from its current place in the maps.
4124 if (!RemoveNodeFromCSEMaps(N))
4127 // Now we update the operands.
4128 for (unsigned i = 0; i != NumOps; ++i)
4129 if (N->OperandList[i] != Ops[i])
4130 N->OperandList[i].set(Ops[i]);
4132 // If this gets put into a CSE map, add it.
4133 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4137 /// DropOperands - Release the operands and set this node to have
4139 void SDNode::DropOperands() {
4140 // Unlike the code in MorphNodeTo that does this, we don't need to
4141 // watch for dead nodes here.
4142 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
4148 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
4151 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4153 SDVTList VTs = getVTList(VT);
4154 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
4157 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4158 MVT VT, SDValue Op1) {
4159 SDVTList VTs = getVTList(VT);
4160 SDValue Ops[] = { Op1 };
4161 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4164 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4165 MVT VT, SDValue Op1,
4167 SDVTList VTs = getVTList(VT);
4168 SDValue Ops[] = { Op1, Op2 };
4169 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4172 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4173 MVT VT, SDValue Op1,
4174 SDValue Op2, SDValue Op3) {
4175 SDVTList VTs = getVTList(VT);
4176 SDValue Ops[] = { Op1, Op2, Op3 };
4177 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4180 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4181 MVT VT, const SDValue *Ops,
4183 SDVTList VTs = getVTList(VT);
4184 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4187 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4188 MVT VT1, MVT VT2, const SDValue *Ops,
4190 SDVTList VTs = getVTList(VT1, VT2);
4191 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4194 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4196 SDVTList VTs = getVTList(VT1, VT2);
4197 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
4200 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4201 MVT VT1, MVT VT2, MVT VT3,
4202 const SDValue *Ops, unsigned NumOps) {
4203 SDVTList VTs = getVTList(VT1, VT2, VT3);
4204 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4207 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4208 MVT VT1, MVT VT2, MVT VT3, MVT VT4,
4209 const SDValue *Ops, unsigned NumOps) {
4210 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4211 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4214 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4217 SDVTList VTs = getVTList(VT1, VT2);
4218 SDValue Ops[] = { Op1 };
4219 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4222 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4224 SDValue Op1, SDValue Op2) {
4225 SDVTList VTs = getVTList(VT1, VT2);
4226 SDValue Ops[] = { Op1, Op2 };
4227 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4230 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4232 SDValue Op1, SDValue Op2,
4234 SDVTList VTs = getVTList(VT1, VT2);
4235 SDValue Ops[] = { Op1, Op2, Op3 };
4236 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4239 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4240 MVT VT1, MVT VT2, MVT VT3,
4241 SDValue Op1, SDValue Op2,
4243 SDVTList VTs = getVTList(VT1, VT2, VT3);
4244 SDValue Ops[] = { Op1, Op2, Op3 };
4245 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4248 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4249 SDVTList VTs, const SDValue *Ops,
4251 return MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
4254 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4256 SDVTList VTs = getVTList(VT);
4257 return MorphNodeTo(N, Opc, VTs, 0, 0);
4260 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4261 MVT VT, SDValue Op1) {
4262 SDVTList VTs = getVTList(VT);
4263 SDValue Ops[] = { Op1 };
4264 return MorphNodeTo(N, Opc, VTs, Ops, 1);
4267 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4268 MVT VT, SDValue Op1,
4270 SDVTList VTs = getVTList(VT);
4271 SDValue Ops[] = { Op1, Op2 };
4272 return MorphNodeTo(N, Opc, VTs, Ops, 2);
4275 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4276 MVT VT, SDValue Op1,
4277 SDValue Op2, SDValue Op3) {
4278 SDVTList VTs = getVTList(VT);
4279 SDValue Ops[] = { Op1, Op2, Op3 };
4280 return MorphNodeTo(N, Opc, VTs, Ops, 3);
4283 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4284 MVT VT, const SDValue *Ops,
4286 SDVTList VTs = getVTList(VT);
4287 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4290 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4291 MVT VT1, MVT VT2, const SDValue *Ops,
4293 SDVTList VTs = getVTList(VT1, VT2);
4294 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4297 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4299 SDVTList VTs = getVTList(VT1, VT2);
4300 return MorphNodeTo(N, Opc, VTs, (SDValue *)0, 0);
4303 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4304 MVT VT1, MVT VT2, MVT VT3,
4305 const SDValue *Ops, unsigned NumOps) {
4306 SDVTList VTs = getVTList(VT1, VT2, VT3);
4307 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4310 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4313 SDVTList VTs = getVTList(VT1, VT2);
4314 SDValue Ops[] = { Op1 };
4315 return MorphNodeTo(N, Opc, VTs, Ops, 1);
4318 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4320 SDValue Op1, SDValue Op2) {
4321 SDVTList VTs = getVTList(VT1, VT2);
4322 SDValue Ops[] = { Op1, Op2 };
4323 return MorphNodeTo(N, Opc, VTs, Ops, 2);
4326 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4328 SDValue Op1, SDValue Op2,
4330 SDVTList VTs = getVTList(VT1, VT2);
4331 SDValue Ops[] = { Op1, Op2, Op3 };
4332 return MorphNodeTo(N, Opc, VTs, Ops, 3);
4335 /// MorphNodeTo - These *mutate* the specified node to have the specified
4336 /// return type, opcode, and operands.
4338 /// Note that MorphNodeTo returns the resultant node. If there is already a
4339 /// node of the specified opcode and operands, it returns that node instead of
4340 /// the current one. Note that the DebugLoc need not be the same.
4342 /// Using MorphNodeTo is faster than creating a new node and swapping it in
4343 /// with ReplaceAllUsesWith both because it often avoids allocating a new
4344 /// node, and because it doesn't require CSE recalculation for any of
4345 /// the node's users.
4347 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4348 SDVTList VTs, const SDValue *Ops,
4350 // If an identical node already exists, use it.
4352 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) {
4353 FoldingSetNodeID ID;
4354 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
4355 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
4359 if (!RemoveNodeFromCSEMaps(N))
4362 // Start the morphing.
4364 N->ValueList = VTs.VTs;
4365 N->NumValues = VTs.NumVTs;
4367 // Clear the operands list, updating used nodes to remove this from their
4368 // use list. Keep track of any operands that become dead as a result.
4369 SmallPtrSet<SDNode*, 16> DeadNodeSet;
4370 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
4372 SDNode *Used = Use.getNode();
4374 if (Used->use_empty())
4375 DeadNodeSet.insert(Used);
4378 // If NumOps is larger than the # of operands we currently have, reallocate
4379 // the operand list.
4380 if (NumOps > N->NumOperands) {
4381 if (N->OperandsNeedDelete)
4382 delete[] N->OperandList;
4384 if (N->isMachineOpcode()) {
4385 // We're creating a final node that will live unmorphed for the
4386 // remainder of the current SelectionDAG iteration, so we can allocate
4387 // the operands directly out of a pool with no recycling metadata.
4388 N->OperandList = OperandAllocator.Allocate<SDUse>(NumOps);
4389 N->OperandsNeedDelete = false;
4391 N->OperandList = new SDUse[NumOps];
4392 N->OperandsNeedDelete = true;
4396 // Assign the new operands.
4397 N->NumOperands = NumOps;
4398 for (unsigned i = 0, e = NumOps; i != e; ++i) {
4399 N->OperandList[i].setUser(N);
4400 N->OperandList[i].setInitial(Ops[i]);
4403 // Delete any nodes that are still dead after adding the uses for the
4405 SmallVector<SDNode *, 16> DeadNodes;
4406 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
4407 E = DeadNodeSet.end(); I != E; ++I)
4408 if ((*I)->use_empty())
4409 DeadNodes.push_back(*I);
4410 RemoveDeadNodes(DeadNodes);
4413 CSEMap.InsertNode(N, IP); // Memoize the new node.
4418 /// getTargetNode - These are used for target selectors to create a new node
4419 /// with specified return type(s), target opcode, and operands.
4421 /// Note that getTargetNode returns the resultant node. If there is already a
4422 /// node of the specified opcode and operands, it returns that node instead of
4423 /// the current one.
4424 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT) {
4425 return getNode(~Opcode, VT).getNode();
4427 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT) {
4428 return getNode(~Opcode, dl, VT).getNode();
4431 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, SDValue Op1) {
4432 return getNode(~Opcode, VT, Op1).getNode();
4434 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT,
4436 return getNode(~Opcode, dl, VT, Op1).getNode();
4439 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT,
4440 SDValue Op1, SDValue Op2) {
4441 return getNode(~Opcode, VT, Op1, Op2).getNode();
4443 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT,
4444 SDValue Op1, SDValue Op2) {
4445 return getNode(~Opcode, dl, VT, Op1, Op2).getNode();
4448 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT,
4449 SDValue Op1, SDValue Op2,
4451 return getNode(~Opcode, VT, Op1, Op2, Op3).getNode();
4453 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT,
4454 SDValue Op1, SDValue Op2,
4456 return getNode(~Opcode, dl, VT, Op1, Op2, Op3).getNode();
4459 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT,
4460 const SDValue *Ops, unsigned NumOps) {
4461 return getNode(~Opcode, VT, Ops, NumOps).getNode();
4463 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT,
4464 const SDValue *Ops, unsigned NumOps) {
4465 return getNode(~Opcode, dl, VT, Ops, NumOps).getNode();
4468 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2) {
4469 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4471 return getNode(~Opcode, VTs, 2, &Op, 0).getNode();
4473 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4475 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4477 return getNode(~Opcode, dl, VTs, 2, &Op, 0).getNode();
4480 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
4481 MVT VT2, SDValue Op1) {
4482 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4483 return getNode(~Opcode, VTs, 2, &Op1, 1).getNode();
4485 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1,
4486 MVT VT2, SDValue Op1) {
4487 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4488 return getNode(~Opcode, dl, VTs, 2, &Op1, 1).getNode();
4491 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
4492 MVT VT2, SDValue Op1,
4494 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4495 SDValue Ops[] = { Op1, Op2 };
4496 return getNode(~Opcode, VTs, 2, Ops, 2).getNode();
4498 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1,
4499 MVT VT2, SDValue Op1,
4501 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4502 SDValue Ops[] = { Op1, Op2 };
4503 return getNode(~Opcode, dl, VTs, 2, Ops, 2).getNode();
4506 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
4507 MVT VT2, SDValue Op1,
4508 SDValue Op2, SDValue Op3) {
4509 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4510 SDValue Ops[] = { Op1, Op2, Op3 };
4511 return getNode(~Opcode, VTs, 2, Ops, 3).getNode();
4513 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1,
4514 MVT VT2, SDValue Op1,
4515 SDValue Op2, SDValue Op3) {
4516 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4517 SDValue Ops[] = { Op1, Op2, Op3 };
4518 return getNode(~Opcode, dl, VTs, 2, Ops, 3).getNode();
4521 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2,
4522 const SDValue *Ops, unsigned NumOps) {
4523 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4524 return getNode(~Opcode, VTs, 2, Ops, NumOps).getNode();
4526 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4528 const SDValue *Ops, unsigned NumOps) {
4529 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4530 return getNode(~Opcode, dl, VTs, 2, Ops, NumOps).getNode();
4533 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
4534 SDValue Op1, SDValue Op2) {
4535 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4536 SDValue Ops[] = { Op1, Op2 };
4537 return getNode(~Opcode, VTs, 3, Ops, 2).getNode();
4539 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4540 MVT VT1, MVT VT2, MVT VT3,
4541 SDValue Op1, SDValue Op2) {
4542 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4543 SDValue Ops[] = { Op1, Op2 };
4544 return getNode(~Opcode, dl, VTs, 3, Ops, 2).getNode();
4547 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
4548 SDValue Op1, SDValue Op2,
4550 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4551 SDValue Ops[] = { Op1, Op2, Op3 };
4552 return getNode(~Opcode, VTs, 3, Ops, 3).getNode();
4554 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4555 MVT VT1, MVT VT2, MVT VT3,
4556 SDValue Op1, SDValue Op2,
4558 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4559 SDValue Ops[] = { Op1, Op2, Op3 };
4560 return getNode(~Opcode, dl, VTs, 3, Ops, 3).getNode();
4563 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
4564 const SDValue *Ops, unsigned NumOps) {
4565 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4566 return getNode(~Opcode, VTs, 3, Ops, NumOps).getNode();
4568 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4569 MVT VT1, MVT VT2, MVT VT3,
4570 const SDValue *Ops, unsigned NumOps) {
4571 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4572 return getNode(~Opcode, dl, VTs, 3, Ops, NumOps).getNode();
4575 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
4576 MVT VT2, MVT VT3, MVT VT4,
4577 const SDValue *Ops, unsigned NumOps) {
4578 std::vector<MVT> VTList;
4579 VTList.push_back(VT1);
4580 VTList.push_back(VT2);
4581 VTList.push_back(VT3);
4582 VTList.push_back(VT4);
4583 const MVT *VTs = getNodeValueTypes(VTList);
4584 return getNode(~Opcode, VTs, 4, Ops, NumOps).getNode();
4586 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1,
4587 MVT VT2, MVT VT3, MVT VT4,
4588 const SDValue *Ops, unsigned NumOps) {
4589 std::vector<MVT> VTList;
4590 VTList.push_back(VT1);
4591 VTList.push_back(VT2);
4592 VTList.push_back(VT3);
4593 VTList.push_back(VT4);
4594 const MVT *VTs = getNodeValueTypes(VTList);
4595 return getNode(~Opcode, dl, VTs, 4, Ops, NumOps).getNode();
4598 SDNode *SelectionDAG::getTargetNode(unsigned Opcode,
4599 const std::vector<MVT> &ResultTys,
4600 const SDValue *Ops, unsigned NumOps) {
4601 const MVT *VTs = getNodeValueTypes(ResultTys);
4602 return getNode(~Opcode, VTs, ResultTys.size(),
4603 Ops, NumOps).getNode();
4605 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4606 const std::vector<MVT> &ResultTys,
4607 const SDValue *Ops, unsigned NumOps) {
4608 const MVT *VTs = getNodeValueTypes(ResultTys);
4609 return getNode(~Opcode, dl, VTs, ResultTys.size(),
4610 Ops, NumOps).getNode();
4613 /// getNodeIfExists - Get the specified node if it's already available, or
4614 /// else return NULL.
4615 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
4616 const SDValue *Ops, unsigned NumOps) {
4617 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4618 FoldingSetNodeID ID;
4619 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4621 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4627 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4628 /// This can cause recursive merging of nodes in the DAG.
4630 /// This version assumes From has a single result value.
4632 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To,
4633 DAGUpdateListener *UpdateListener) {
4634 SDNode *From = FromN.getNode();
4635 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
4636 "Cannot replace with this method!");
4637 assert(From != To.getNode() && "Cannot replace uses of with self");
4639 // Iterate over all the existing uses of From. New uses will be added
4640 // to the beginning of the use list, which we avoid visiting.
4641 // This specifically avoids visiting uses of From that arise while the
4642 // replacement is happening, because any such uses would be the result
4643 // of CSE: If an existing node looks like From after one of its operands
4644 // is replaced by To, we don't want to replace of all its users with To
4645 // too. See PR3018 for more info.
4646 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
4650 // This node is about to morph, remove its old self from the CSE maps.
4651 RemoveNodeFromCSEMaps(User);
4653 // A user can appear in a use list multiple times, and when this
4654 // happens the uses are usually next to each other in the list.
4655 // To help reduce the number of CSE recomputations, process all
4656 // the uses of this user that we can find this way.
4658 SDUse &Use = UI.getUse();
4661 } while (UI != UE && *UI == User);
4663 // Now that we have modified User, add it back to the CSE maps. If it
4664 // already exists there, recursively merge the results together.
4665 AddModifiedNodeToCSEMaps(User, UpdateListener);
4669 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4670 /// This can cause recursive merging of nodes in the DAG.
4672 /// This version assumes From/To have matching types and numbers of result
4675 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To,
4676 DAGUpdateListener *UpdateListener) {
4677 assert(From->getVTList().VTs == To->getVTList().VTs &&
4678 From->getNumValues() == To->getNumValues() &&
4679 "Cannot use this version of ReplaceAllUsesWith!");
4681 // Handle the trivial case.
4685 // Iterate over just the existing users of From. See the comments in
4686 // the ReplaceAllUsesWith above.
4687 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
4691 // This node is about to morph, remove its old self from the CSE maps.
4692 RemoveNodeFromCSEMaps(User);
4694 // A user can appear in a use list multiple times, and when this
4695 // happens the uses are usually next to each other in the list.
4696 // To help reduce the number of CSE recomputations, process all
4697 // the uses of this user that we can find this way.
4699 SDUse &Use = UI.getUse();
4702 } while (UI != UE && *UI == User);
4704 // Now that we have modified User, add it back to the CSE maps. If it
4705 // already exists there, recursively merge the results together.
4706 AddModifiedNodeToCSEMaps(User, UpdateListener);
4710 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4711 /// This can cause recursive merging of nodes in the DAG.
4713 /// This version can replace From with any result values. To must match the
4714 /// number and types of values returned by From.
4715 void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
4717 DAGUpdateListener *UpdateListener) {
4718 if (From->getNumValues() == 1) // Handle the simple case efficiently.
4719 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener);
4721 // Iterate over just the existing users of From. See the comments in
4722 // the ReplaceAllUsesWith above.
4723 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
4727 // This node is about to morph, remove its old self from the CSE maps.
4728 RemoveNodeFromCSEMaps(User);
4730 // A user can appear in a use list multiple times, and when this
4731 // happens the uses are usually next to each other in the list.
4732 // To help reduce the number of CSE recomputations, process all
4733 // the uses of this user that we can find this way.
4735 SDUse &Use = UI.getUse();
4736 const SDValue &ToOp = To[Use.getResNo()];
4739 } while (UI != UE && *UI == User);
4741 // Now that we have modified User, add it back to the CSE maps. If it
4742 // already exists there, recursively merge the results together.
4743 AddModifiedNodeToCSEMaps(User, UpdateListener);
4747 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
4748 /// uses of other values produced by From.getNode() alone. The Deleted
4749 /// vector is handled the same way as for ReplaceAllUsesWith.
4750 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To,
4751 DAGUpdateListener *UpdateListener){
4752 // Handle the really simple, really trivial case efficiently.
4753 if (From == To) return;
4755 // Handle the simple, trivial, case efficiently.
4756 if (From.getNode()->getNumValues() == 1) {
4757 ReplaceAllUsesWith(From, To, UpdateListener);
4761 // Iterate over just the existing users of From. See the comments in
4762 // the ReplaceAllUsesWith above.
4763 SDNode::use_iterator UI = From.getNode()->use_begin(),
4764 UE = From.getNode()->use_end();
4767 bool UserRemovedFromCSEMaps = false;
4769 // A user can appear in a use list multiple times, and when this
4770 // happens the uses are usually next to each other in the list.
4771 // To help reduce the number of CSE recomputations, process all
4772 // the uses of this user that we can find this way.
4774 SDUse &Use = UI.getUse();
4776 // Skip uses of different values from the same node.
4777 if (Use.getResNo() != From.getResNo()) {
4782 // If this node hasn't been modified yet, it's still in the CSE maps,
4783 // so remove its old self from the CSE maps.
4784 if (!UserRemovedFromCSEMaps) {
4785 RemoveNodeFromCSEMaps(User);
4786 UserRemovedFromCSEMaps = true;
4791 } while (UI != UE && *UI == User);
4793 // We are iterating over all uses of the From node, so if a use
4794 // doesn't use the specific value, no changes are made.
4795 if (!UserRemovedFromCSEMaps)
4798 // Now that we have modified User, add it back to the CSE maps. If it
4799 // already exists there, recursively merge the results together.
4800 AddModifiedNodeToCSEMaps(User, UpdateListener);
4805 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
4806 /// to record information about a use.
4813 /// operator< - Sort Memos by User.
4814 bool operator<(const UseMemo &L, const UseMemo &R) {
4815 return (intptr_t)L.User < (intptr_t)R.User;
4819 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
4820 /// uses of other values produced by From.getNode() alone. The same value
4821 /// may appear in both the From and To list. The Deleted vector is
4822 /// handled the same way as for ReplaceAllUsesWith.
4823 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
4826 DAGUpdateListener *UpdateListener){
4827 // Handle the simple, trivial case efficiently.
4829 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener);
4831 // Read up all the uses and make records of them. This helps
4832 // processing new uses that are introduced during the
4833 // replacement process.
4834 SmallVector<UseMemo, 4> Uses;
4835 for (unsigned i = 0; i != Num; ++i) {
4836 unsigned FromResNo = From[i].getResNo();
4837 SDNode *FromNode = From[i].getNode();
4838 for (SDNode::use_iterator UI = FromNode->use_begin(),
4839 E = FromNode->use_end(); UI != E; ++UI) {
4840 SDUse &Use = UI.getUse();
4841 if (Use.getResNo() == FromResNo) {
4842 UseMemo Memo = { *UI, i, &Use };
4843 Uses.push_back(Memo);
4848 // Sort the uses, so that all the uses from a given User are together.
4849 std::sort(Uses.begin(), Uses.end());
4851 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
4852 UseIndex != UseIndexEnd; ) {
4853 // We know that this user uses some value of From. If it is the right
4854 // value, update it.
4855 SDNode *User = Uses[UseIndex].User;
4857 // This node is about to morph, remove its old self from the CSE maps.
4858 RemoveNodeFromCSEMaps(User);
4860 // The Uses array is sorted, so all the uses for a given User
4861 // are next to each other in the list.
4862 // To help reduce the number of CSE recomputations, process all
4863 // the uses of this user that we can find this way.
4865 unsigned i = Uses[UseIndex].Index;
4866 SDUse &Use = *Uses[UseIndex].Use;
4870 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
4872 // Now that we have modified User, add it back to the CSE maps. If it
4873 // already exists there, recursively merge the results together.
4874 AddModifiedNodeToCSEMaps(User, UpdateListener);
4878 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
4879 /// based on their topological order. It returns the maximum id and a vector
4880 /// of the SDNodes* in assigned order by reference.
4881 unsigned SelectionDAG::AssignTopologicalOrder() {
4883 unsigned DAGSize = 0;
4885 // SortedPos tracks the progress of the algorithm. Nodes before it are
4886 // sorted, nodes after it are unsorted. When the algorithm completes
4887 // it is at the end of the list.
4888 allnodes_iterator SortedPos = allnodes_begin();
4890 // Visit all the nodes. Move nodes with no operands to the front of
4891 // the list immediately. Annotate nodes that do have operands with their
4892 // operand count. Before we do this, the Node Id fields of the nodes
4893 // may contain arbitrary values. After, the Node Id fields for nodes
4894 // before SortedPos will contain the topological sort index, and the
4895 // Node Id fields for nodes At SortedPos and after will contain the
4896 // count of outstanding operands.
4897 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
4899 unsigned Degree = N->getNumOperands();
4901 // A node with no uses, add it to the result array immediately.
4902 N->setNodeId(DAGSize++);
4903 allnodes_iterator Q = N;
4905 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
4908 // Temporarily use the Node Id as scratch space for the degree count.
4909 N->setNodeId(Degree);
4913 // Visit all the nodes. As we iterate, moves nodes into sorted order,
4914 // such that by the time the end is reached all nodes will be sorted.
4915 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
4917 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
4920 unsigned Degree = P->getNodeId();
4923 // All of P's operands are sorted, so P may sorted now.
4924 P->setNodeId(DAGSize++);
4926 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
4929 // Update P's outstanding operand count.
4930 P->setNodeId(Degree);
4935 assert(SortedPos == AllNodes.end() &&
4936 "Topological sort incomplete!");
4937 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
4938 "First node in topological sort is not the entry token!");
4939 assert(AllNodes.front().getNodeId() == 0 &&
4940 "First node in topological sort has non-zero id!");
4941 assert(AllNodes.front().getNumOperands() == 0 &&
4942 "First node in topological sort has operands!");
4943 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
4944 "Last node in topologic sort has unexpected id!");
4945 assert(AllNodes.back().use_empty() &&
4946 "Last node in topologic sort has users!");
4947 assert(DAGSize == allnodes_size() && "Node count mismatch!");
4953 //===----------------------------------------------------------------------===//
4955 //===----------------------------------------------------------------------===//
4957 HandleSDNode::~HandleSDNode() {
4961 GlobalAddressSDNode::GlobalAddressSDNode(bool isTarget, const GlobalValue *GA,
4963 : SDNode(isa<GlobalVariable>(GA) &&
4964 cast<GlobalVariable>(GA)->isThreadLocal() ?
4966 (isTarget ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress) :
4968 (isTarget ? ISD::TargetGlobalAddress : ISD::GlobalAddress),
4969 getSDVTList(VT)), Offset(o) {
4970 TheGlobal = const_cast<GlobalValue*>(GA);
4973 MemSDNode::MemSDNode(unsigned Opc, SDVTList VTs, MVT memvt,
4974 const Value *srcValue, int SVO,
4975 unsigned alignment, bool vol)
4976 : SDNode(Opc, VTs), MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO) {
4977 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, vol, alignment);
4978 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
4979 assert(getAlignment() == alignment && "Alignment representation error!");
4980 assert(isVolatile() == vol && "Volatile representation error!");
4983 MemSDNode::MemSDNode(unsigned Opc, SDVTList VTs, const SDValue *Ops,
4984 unsigned NumOps, MVT memvt, const Value *srcValue,
4985 int SVO, unsigned alignment, bool vol)
4986 : SDNode(Opc, VTs, Ops, NumOps),
4987 MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO) {
4988 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, vol, alignment);
4989 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
4990 assert(getAlignment() == alignment && "Alignment representation error!");
4991 assert(isVolatile() == vol && "Volatile representation error!");
4994 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, MVT memvt,
4995 const Value *srcValue, int SVO,
4996 unsigned alignment, bool vol)
4997 : SDNode(Opc, dl, VTs), MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO) {
4998 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, vol, alignment);
4999 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
5000 assert(getAlignment() == alignment && "Alignment representation error!");
5001 assert(isVolatile() == vol && "Volatile representation error!");
5004 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs,
5006 unsigned NumOps, MVT memvt, const Value *srcValue,
5007 int SVO, unsigned alignment, bool vol)
5008 : SDNode(Opc, dl, VTs, Ops, NumOps),
5009 MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO) {
5010 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, vol, alignment);
5011 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
5012 assert(getAlignment() == alignment && "Alignment representation error!");
5013 assert(isVolatile() == vol && "Volatile representation error!");
5016 /// getMemOperand - Return a MachineMemOperand object describing the memory
5017 /// reference performed by this memory reference.
5018 MachineMemOperand MemSDNode::getMemOperand() const {
5020 if (isa<LoadSDNode>(this))
5021 Flags = MachineMemOperand::MOLoad;
5022 else if (isa<StoreSDNode>(this))
5023 Flags = MachineMemOperand::MOStore;
5024 else if (isa<AtomicSDNode>(this)) {
5025 Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
5028 const MemIntrinsicSDNode* MemIntrinNode = dyn_cast<MemIntrinsicSDNode>(this);
5029 assert(MemIntrinNode && "Unknown MemSDNode opcode!");
5030 if (MemIntrinNode->readMem()) Flags |= MachineMemOperand::MOLoad;
5031 if (MemIntrinNode->writeMem()) Flags |= MachineMemOperand::MOStore;
5034 int Size = (getMemoryVT().getSizeInBits() + 7) >> 3;
5035 if (isVolatile()) Flags |= MachineMemOperand::MOVolatile;
5037 // Check if the memory reference references a frame index
5038 const FrameIndexSDNode *FI =
5039 dyn_cast<const FrameIndexSDNode>(getBasePtr().getNode());
5040 if (!getSrcValue() && FI)
5041 return MachineMemOperand(PseudoSourceValue::getFixedStack(FI->getIndex()),
5042 Flags, 0, Size, getAlignment());
5044 return MachineMemOperand(getSrcValue(), Flags, getSrcValueOffset(),
5045 Size, getAlignment());
5048 /// Profile - Gather unique data for the node.
5050 void SDNode::Profile(FoldingSetNodeID &ID) const {
5051 AddNodeIDNode(ID, this);
5054 /// getValueTypeList - Return a pointer to the specified value type.
5056 const MVT *SDNode::getValueTypeList(MVT VT) {
5057 if (VT.isExtended()) {
5058 static std::set<MVT, MVT::compareRawBits> EVTs;
5059 return &(*EVTs.insert(VT).first);
5061 static MVT VTs[MVT::LAST_VALUETYPE];
5062 VTs[VT.getSimpleVT()] = VT;
5063 return &VTs[VT.getSimpleVT()];
5067 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
5068 /// indicated value. This method ignores uses of other values defined by this
5070 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
5071 assert(Value < getNumValues() && "Bad value!");
5073 // TODO: Only iterate over uses of a given value of the node
5074 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
5075 if (UI.getUse().getResNo() == Value) {
5082 // Found exactly the right number of uses?
5087 /// hasAnyUseOfValue - Return true if there are any use of the indicated
5088 /// value. This method ignores uses of other values defined by this operation.
5089 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
5090 assert(Value < getNumValues() && "Bad value!");
5092 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
5093 if (UI.getUse().getResNo() == Value)
5100 /// isOnlyUserOf - Return true if this node is the only use of N.
5102 bool SDNode::isOnlyUserOf(SDNode *N) const {
5104 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
5115 /// isOperand - Return true if this node is an operand of N.
5117 bool SDValue::isOperandOf(SDNode *N) const {
5118 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5119 if (*this == N->getOperand(i))
5124 bool SDNode::isOperandOf(SDNode *N) const {
5125 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
5126 if (this == N->OperandList[i].getNode())
5131 /// reachesChainWithoutSideEffects - Return true if this operand (which must
5132 /// be a chain) reaches the specified operand without crossing any
5133 /// side-effecting instructions. In practice, this looks through token
5134 /// factors and non-volatile loads. In order to remain efficient, this only
5135 /// looks a couple of nodes in, it does not do an exhaustive search.
5136 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
5137 unsigned Depth) const {
5138 if (*this == Dest) return true;
5140 // Don't search too deeply, we just want to be able to see through
5141 // TokenFactor's etc.
5142 if (Depth == 0) return false;
5144 // If this is a token factor, all inputs to the TF happen in parallel. If any
5145 // of the operands of the TF reach dest, then we can do the xform.
5146 if (getOpcode() == ISD::TokenFactor) {
5147 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
5148 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
5153 // Loads don't have side effects, look through them.
5154 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
5155 if (!Ld->isVolatile())
5156 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
5162 static void findPredecessor(SDNode *N, const SDNode *P, bool &found,
5163 SmallPtrSet<SDNode *, 32> &Visited) {
5164 if (found || !Visited.insert(N))
5167 for (unsigned i = 0, e = N->getNumOperands(); !found && i != e; ++i) {
5168 SDNode *Op = N->getOperand(i).getNode();
5173 findPredecessor(Op, P, found, Visited);
5177 /// isPredecessorOf - Return true if this node is a predecessor of N. This node
5178 /// is either an operand of N or it can be reached by recursively traversing
5179 /// up the operands.
5180 /// NOTE: this is an expensive method. Use it carefully.
5181 bool SDNode::isPredecessorOf(SDNode *N) const {
5182 SmallPtrSet<SDNode *, 32> Visited;
5184 findPredecessor(N, this, found, Visited);
5188 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
5189 assert(Num < NumOperands && "Invalid child # of SDNode!");
5190 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
5193 std::string SDNode::getOperationName(const SelectionDAG *G) const {
5194 switch (getOpcode()) {
5196 if (getOpcode() < ISD::BUILTIN_OP_END)
5197 return "<<Unknown DAG Node>>";
5198 if (isMachineOpcode()) {
5200 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo())
5201 if (getMachineOpcode() < TII->getNumOpcodes())
5202 return TII->get(getMachineOpcode()).getName();
5203 return "<<Unknown Machine Node>>";
5206 const TargetLowering &TLI = G->getTargetLoweringInfo();
5207 const char *Name = TLI.getTargetNodeName(getOpcode());
5208 if (Name) return Name;
5209 return "<<Unknown Target Node>>";
5211 return "<<Unknown Node>>";
5214 case ISD::DELETED_NODE:
5215 return "<<Deleted Node!>>";
5217 case ISD::PREFETCH: return "Prefetch";
5218 case ISD::MEMBARRIER: return "MemBarrier";
5219 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
5220 case ISD::ATOMIC_SWAP: return "AtomicSwap";
5221 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
5222 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
5223 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
5224 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
5225 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
5226 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
5227 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
5228 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
5229 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
5230 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
5231 case ISD::PCMARKER: return "PCMarker";
5232 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
5233 case ISD::SRCVALUE: return "SrcValue";
5234 case ISD::MEMOPERAND: return "MemOperand";
5235 case ISD::EntryToken: return "EntryToken";
5236 case ISD::TokenFactor: return "TokenFactor";
5237 case ISD::AssertSext: return "AssertSext";
5238 case ISD::AssertZext: return "AssertZext";
5240 case ISD::BasicBlock: return "BasicBlock";
5241 case ISD::ARG_FLAGS: return "ArgFlags";
5242 case ISD::VALUETYPE: return "ValueType";
5243 case ISD::Register: return "Register";
5245 case ISD::Constant: return "Constant";
5246 case ISD::ConstantFP: return "ConstantFP";
5247 case ISD::GlobalAddress: return "GlobalAddress";
5248 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
5249 case ISD::FrameIndex: return "FrameIndex";
5250 case ISD::JumpTable: return "JumpTable";
5251 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
5252 case ISD::RETURNADDR: return "RETURNADDR";
5253 case ISD::FRAMEADDR: return "FRAMEADDR";
5254 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
5255 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR";
5256 case ISD::EHSELECTION: return "EHSELECTION";
5257 case ISD::EH_RETURN: return "EH_RETURN";
5258 case ISD::ConstantPool: return "ConstantPool";
5259 case ISD::ExternalSymbol: return "ExternalSymbol";
5260 case ISD::INTRINSIC_WO_CHAIN: {
5261 unsigned IID = cast<ConstantSDNode>(getOperand(0))->getZExtValue();
5262 return Intrinsic::getName((Intrinsic::ID)IID);
5264 case ISD::INTRINSIC_VOID:
5265 case ISD::INTRINSIC_W_CHAIN: {
5266 unsigned IID = cast<ConstantSDNode>(getOperand(1))->getZExtValue();
5267 return Intrinsic::getName((Intrinsic::ID)IID);
5270 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
5271 case ISD::TargetConstant: return "TargetConstant";
5272 case ISD::TargetConstantFP:return "TargetConstantFP";
5273 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
5274 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
5275 case ISD::TargetFrameIndex: return "TargetFrameIndex";
5276 case ISD::TargetJumpTable: return "TargetJumpTable";
5277 case ISD::TargetConstantPool: return "TargetConstantPool";
5278 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
5280 case ISD::CopyToReg: return "CopyToReg";
5281 case ISD::CopyFromReg: return "CopyFromReg";
5282 case ISD::UNDEF: return "undef";
5283 case ISD::MERGE_VALUES: return "merge_values";
5284 case ISD::INLINEASM: return "inlineasm";
5285 case ISD::DBG_LABEL: return "dbg_label";
5286 case ISD::EH_LABEL: return "eh_label";
5287 case ISD::DECLARE: return "declare";
5288 case ISD::HANDLENODE: return "handlenode";
5289 case ISD::FORMAL_ARGUMENTS: return "formal_arguments";
5290 case ISD::CALL: return "call";
5293 case ISD::FABS: return "fabs";
5294 case ISD::FNEG: return "fneg";
5295 case ISD::FSQRT: return "fsqrt";
5296 case ISD::FSIN: return "fsin";
5297 case ISD::FCOS: return "fcos";
5298 case ISD::FPOWI: return "fpowi";
5299 case ISD::FPOW: return "fpow";
5300 case ISD::FTRUNC: return "ftrunc";
5301 case ISD::FFLOOR: return "ffloor";
5302 case ISD::FCEIL: return "fceil";
5303 case ISD::FRINT: return "frint";
5304 case ISD::FNEARBYINT: return "fnearbyint";
5307 case ISD::ADD: return "add";
5308 case ISD::SUB: return "sub";
5309 case ISD::MUL: return "mul";
5310 case ISD::MULHU: return "mulhu";
5311 case ISD::MULHS: return "mulhs";
5312 case ISD::SDIV: return "sdiv";
5313 case ISD::UDIV: return "udiv";
5314 case ISD::SREM: return "srem";
5315 case ISD::UREM: return "urem";
5316 case ISD::SMUL_LOHI: return "smul_lohi";
5317 case ISD::UMUL_LOHI: return "umul_lohi";
5318 case ISD::SDIVREM: return "sdivrem";
5319 case ISD::UDIVREM: return "udivrem";
5320 case ISD::AND: return "and";
5321 case ISD::OR: return "or";
5322 case ISD::XOR: return "xor";
5323 case ISD::SHL: return "shl";
5324 case ISD::SRA: return "sra";
5325 case ISD::SRL: return "srl";
5326 case ISD::ROTL: return "rotl";
5327 case ISD::ROTR: return "rotr";
5328 case ISD::FADD: return "fadd";
5329 case ISD::FSUB: return "fsub";
5330 case ISD::FMUL: return "fmul";
5331 case ISD::FDIV: return "fdiv";
5332 case ISD::FREM: return "frem";
5333 case ISD::FCOPYSIGN: return "fcopysign";
5334 case ISD::FGETSIGN: return "fgetsign";
5336 case ISD::SETCC: return "setcc";
5337 case ISD::VSETCC: return "vsetcc";
5338 case ISD::SELECT: return "select";
5339 case ISD::SELECT_CC: return "select_cc";
5340 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
5341 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
5342 case ISD::CONCAT_VECTORS: return "concat_vectors";
5343 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
5344 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
5345 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
5346 case ISD::CARRY_FALSE: return "carry_false";
5347 case ISD::ADDC: return "addc";
5348 case ISD::ADDE: return "adde";
5349 case ISD::SADDO: return "saddo";
5350 case ISD::UADDO: return "uaddo";
5351 case ISD::SSUBO: return "ssubo";
5352 case ISD::USUBO: return "usubo";
5353 case ISD::SMULO: return "smulo";
5354 case ISD::UMULO: return "umulo";
5355 case ISD::SUBC: return "subc";
5356 case ISD::SUBE: return "sube";
5357 case ISD::SHL_PARTS: return "shl_parts";
5358 case ISD::SRA_PARTS: return "sra_parts";
5359 case ISD::SRL_PARTS: return "srl_parts";
5361 case ISD::EXTRACT_SUBREG: return "extract_subreg";
5362 case ISD::INSERT_SUBREG: return "insert_subreg";
5364 // Conversion operators.
5365 case ISD::SIGN_EXTEND: return "sign_extend";
5366 case ISD::ZERO_EXTEND: return "zero_extend";
5367 case ISD::ANY_EXTEND: return "any_extend";
5368 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
5369 case ISD::TRUNCATE: return "truncate";
5370 case ISD::FP_ROUND: return "fp_round";
5371 case ISD::FLT_ROUNDS_: return "flt_rounds";
5372 case ISD::FP_ROUND_INREG: return "fp_round_inreg";
5373 case ISD::FP_EXTEND: return "fp_extend";
5375 case ISD::SINT_TO_FP: return "sint_to_fp";
5376 case ISD::UINT_TO_FP: return "uint_to_fp";
5377 case ISD::FP_TO_SINT: return "fp_to_sint";
5378 case ISD::FP_TO_UINT: return "fp_to_uint";
5379 case ISD::BIT_CONVERT: return "bit_convert";
5381 case ISD::CONVERT_RNDSAT: {
5382 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) {
5383 default: assert(0 && "Unknown cvt code!");
5384 case ISD::CVT_FF: return "cvt_ff";
5385 case ISD::CVT_FS: return "cvt_fs";
5386 case ISD::CVT_FU: return "cvt_fu";
5387 case ISD::CVT_SF: return "cvt_sf";
5388 case ISD::CVT_UF: return "cvt_uf";
5389 case ISD::CVT_SS: return "cvt_ss";
5390 case ISD::CVT_SU: return "cvt_su";
5391 case ISD::CVT_US: return "cvt_us";
5392 case ISD::CVT_UU: return "cvt_uu";
5396 // Control flow instructions
5397 case ISD::BR: return "br";
5398 case ISD::BRIND: return "brind";
5399 case ISD::BR_JT: return "br_jt";
5400 case ISD::BRCOND: return "brcond";
5401 case ISD::BR_CC: return "br_cc";
5402 case ISD::RET: return "ret";
5403 case ISD::CALLSEQ_START: return "callseq_start";
5404 case ISD::CALLSEQ_END: return "callseq_end";
5407 case ISD::LOAD: return "load";
5408 case ISD::STORE: return "store";
5409 case ISD::VAARG: return "vaarg";
5410 case ISD::VACOPY: return "vacopy";
5411 case ISD::VAEND: return "vaend";
5412 case ISD::VASTART: return "vastart";
5413 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
5414 case ISD::EXTRACT_ELEMENT: return "extract_element";
5415 case ISD::BUILD_PAIR: return "build_pair";
5416 case ISD::STACKSAVE: return "stacksave";
5417 case ISD::STACKRESTORE: return "stackrestore";
5418 case ISD::TRAP: return "trap";
5421 case ISD::BSWAP: return "bswap";
5422 case ISD::CTPOP: return "ctpop";
5423 case ISD::CTTZ: return "cttz";
5424 case ISD::CTLZ: return "ctlz";
5427 case ISD::DBG_STOPPOINT: return "dbg_stoppoint";
5428 case ISD::DEBUG_LOC: return "debug_loc";
5431 case ISD::TRAMPOLINE: return "trampoline";
5434 switch (cast<CondCodeSDNode>(this)->get()) {
5435 default: assert(0 && "Unknown setcc condition!");
5436 case ISD::SETOEQ: return "setoeq";
5437 case ISD::SETOGT: return "setogt";
5438 case ISD::SETOGE: return "setoge";
5439 case ISD::SETOLT: return "setolt";
5440 case ISD::SETOLE: return "setole";
5441 case ISD::SETONE: return "setone";
5443 case ISD::SETO: return "seto";
5444 case ISD::SETUO: return "setuo";
5445 case ISD::SETUEQ: return "setue";
5446 case ISD::SETUGT: return "setugt";
5447 case ISD::SETUGE: return "setuge";
5448 case ISD::SETULT: return "setult";
5449 case ISD::SETULE: return "setule";
5450 case ISD::SETUNE: return "setune";
5452 case ISD::SETEQ: return "seteq";
5453 case ISD::SETGT: return "setgt";
5454 case ISD::SETGE: return "setge";
5455 case ISD::SETLT: return "setlt";
5456 case ISD::SETLE: return "setle";
5457 case ISD::SETNE: return "setne";
5462 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
5471 return "<post-inc>";
5473 return "<post-dec>";
5477 std::string ISD::ArgFlagsTy::getArgFlagsString() {
5478 std::string S = "< ";
5492 if (getByValAlign())
5493 S += "byval-align:" + utostr(getByValAlign()) + " ";
5495 S += "orig-align:" + utostr(getOrigAlign()) + " ";
5497 S += "byval-size:" + utostr(getByValSize()) + " ";
5501 void SDNode::dump() const { dump(0); }
5502 void SDNode::dump(const SelectionDAG *G) const {
5507 void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const {
5508 OS << (void*)this << ": ";
5510 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
5512 if (getValueType(i) == MVT::Other)
5515 OS << getValueType(i).getMVTString();
5517 OS << " = " << getOperationName(G);
5520 void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const {
5521 if (!isTargetOpcode() && getOpcode() == ISD::VECTOR_SHUFFLE) {
5522 SDNode *Mask = getOperand(2).getNode();
5524 for (unsigned i = 0, e = Mask->getNumOperands(); i != e; ++i) {
5526 if (Mask->getOperand(i).getOpcode() == ISD::UNDEF)
5529 OS << cast<ConstantSDNode>(Mask->getOperand(i))->getZExtValue();
5534 if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
5535 OS << '<' << CSDN->getAPIntValue() << '>';
5536 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
5537 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle)
5538 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
5539 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble)
5540 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
5543 CSDN->getValueAPF().bitcastToAPInt().dump();
5546 } else if (const GlobalAddressSDNode *GADN =
5547 dyn_cast<GlobalAddressSDNode>(this)) {
5548 int64_t offset = GADN->getOffset();
5550 WriteAsOperand(OS, GADN->getGlobal());
5553 OS << " + " << offset;
5555 OS << " " << offset;
5556 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
5557 OS << "<" << FIDN->getIndex() << ">";
5558 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
5559 OS << "<" << JTDN->getIndex() << ">";
5560 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
5561 int offset = CP->getOffset();
5562 if (CP->isMachineConstantPoolEntry())
5563 OS << "<" << *CP->getMachineCPVal() << ">";
5565 OS << "<" << *CP->getConstVal() << ">";
5567 OS << " + " << offset;
5569 OS << " " << offset;
5570 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
5572 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
5574 OS << LBB->getName() << " ";
5575 OS << (const void*)BBDN->getBasicBlock() << ">";
5576 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
5577 if (G && R->getReg() &&
5578 TargetRegisterInfo::isPhysicalRegister(R->getReg())) {
5579 OS << " " << G->getTarget().getRegisterInfo()->getName(R->getReg());
5581 OS << " #" << R->getReg();
5583 } else if (const ExternalSymbolSDNode *ES =
5584 dyn_cast<ExternalSymbolSDNode>(this)) {
5585 OS << "'" << ES->getSymbol() << "'";
5586 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
5588 OS << "<" << M->getValue() << ">";
5591 } else if (const MemOperandSDNode *M = dyn_cast<MemOperandSDNode>(this)) {
5592 if (M->MO.getValue())
5593 OS << "<" << M->MO.getValue() << ":" << M->MO.getOffset() << ">";
5595 OS << "<null:" << M->MO.getOffset() << ">";
5596 } else if (const ARG_FLAGSSDNode *N = dyn_cast<ARG_FLAGSSDNode>(this)) {
5597 OS << N->getArgFlags().getArgFlagsString();
5598 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
5599 OS << ":" << N->getVT().getMVTString();
5601 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
5602 const Value *SrcValue = LD->getSrcValue();
5603 int SrcOffset = LD->getSrcValueOffset();
5609 OS << ":" << SrcOffset << ">";
5612 switch (LD->getExtensionType()) {
5613 default: doExt = false; break;
5614 case ISD::EXTLOAD: OS << " <anyext "; break;
5615 case ISD::SEXTLOAD: OS << " <sext "; break;
5616 case ISD::ZEXTLOAD: OS << " <zext "; break;
5619 OS << LD->getMemoryVT().getMVTString() << ">";
5621 const char *AM = getIndexedModeName(LD->getAddressingMode());
5624 if (LD->isVolatile())
5625 OS << " <volatile>";
5626 OS << " alignment=" << LD->getAlignment();
5627 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
5628 const Value *SrcValue = ST->getSrcValue();
5629 int SrcOffset = ST->getSrcValueOffset();
5635 OS << ":" << SrcOffset << ">";
5637 if (ST->isTruncatingStore())
5638 OS << " <trunc " << ST->getMemoryVT().getMVTString() << ">";
5640 const char *AM = getIndexedModeName(ST->getAddressingMode());
5643 if (ST->isVolatile())
5644 OS << " <volatile>";
5645 OS << " alignment=" << ST->getAlignment();
5646 } else if (const AtomicSDNode* AT = dyn_cast<AtomicSDNode>(this)) {
5647 const Value *SrcValue = AT->getSrcValue();
5648 int SrcOffset = AT->getSrcValueOffset();
5654 OS << ":" << SrcOffset << ">";
5655 if (AT->isVolatile())
5656 OS << " <volatile>";
5657 OS << " alignment=" << AT->getAlignment();
5661 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
5664 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
5666 OS << (void*)getOperand(i).getNode();
5667 if (unsigned RN = getOperand(i).getResNo())
5670 print_details(OS, G);
5673 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
5674 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5675 if (N->getOperand(i).getNode()->hasOneUse())
5676 DumpNodes(N->getOperand(i).getNode(), indent+2, G);
5678 cerr << "\n" << std::string(indent+2, ' ')
5679 << (void*)N->getOperand(i).getNode() << ": <multiple use>";
5682 cerr << "\n" << std::string(indent, ' ');
5686 void SelectionDAG::dump() const {
5687 cerr << "SelectionDAG has " << AllNodes.size() << " nodes:";
5689 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end();
5691 const SDNode *N = I;
5692 if (!N->hasOneUse() && N != getRoot().getNode())
5693 DumpNodes(N, 2, this);
5696 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
5701 void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
5703 print_details(OS, G);
5706 typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet;
5707 static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
5708 const SelectionDAG *G, VisitedSDNodeSet &once) {
5709 if (!once.insert(N)) // If we've been here before, return now.
5711 // Dump the current SDNode, but don't end the line yet.
5712 OS << std::string(indent, ' ');
5714 // Having printed this SDNode, walk the children:
5715 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
5716 const SDNode *child = N->getOperand(i).getNode();
5719 if (child->getNumOperands() == 0) {
5720 // This child has no grandchildren; print it inline right here.
5721 child->printr(OS, G);
5723 } else { // Just the address. FIXME: also print the child's opcode
5725 if (unsigned RN = N->getOperand(i).getResNo())
5730 // Dump children that have grandchildren on their own line(s).
5731 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
5732 const SDNode *child = N->getOperand(i).getNode();
5733 DumpNodesr(OS, child, indent+2, G, once);
5737 void SDNode::dumpr() const {
5738 VisitedSDNodeSet once;
5739 DumpNodesr(errs(), this, 0, 0, once);
5743 const Type *ConstantPoolSDNode::getType() const {
5744 if (isMachineConstantPoolEntry())
5745 return Val.MachineCPVal->getType();
5746 return Val.ConstVal->getType();