1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "SDNodeDbgValue.h"
16 #include "SDNodeOrdering.h"
17 #include "llvm/ADT/SetVector.h"
18 #include "llvm/ADT/SmallPtrSet.h"
19 #include "llvm/ADT/SmallSet.h"
20 #include "llvm/ADT/SmallVector.h"
21 #include "llvm/ADT/StringExtras.h"
22 #include "llvm/Analysis/ValueTracking.h"
23 #include "llvm/Assembly/Writer.h"
24 #include "llvm/CallingConv.h"
25 #include "llvm/CodeGen/MachineBasicBlock.h"
26 #include "llvm/CodeGen/MachineConstantPool.h"
27 #include "llvm/CodeGen/MachineFrameInfo.h"
28 #include "llvm/CodeGen/MachineModuleInfo.h"
29 #include "llvm/Constants.h"
30 #include "llvm/DataLayout.h"
31 #include "llvm/DebugInfo.h"
32 #include "llvm/DerivedTypes.h"
33 #include "llvm/Function.h"
34 #include "llvm/GlobalAlias.h"
35 #include "llvm/GlobalVariable.h"
36 #include "llvm/Intrinsics.h"
37 #include "llvm/Support/CommandLine.h"
38 #include "llvm/Support/Debug.h"
39 #include "llvm/Support/ErrorHandling.h"
40 #include "llvm/Support/ManagedStatic.h"
41 #include "llvm/Support/MathExtras.h"
42 #include "llvm/Support/Mutex.h"
43 #include "llvm/Support/raw_ostream.h"
44 #include "llvm/Target/TargetInstrInfo.h"
45 #include "llvm/Target/TargetIntrinsicInfo.h"
46 #include "llvm/Target/TargetLowering.h"
47 #include "llvm/Target/TargetMachine.h"
48 #include "llvm/Target/TargetOptions.h"
49 #include "llvm/Target/TargetRegisterInfo.h"
50 #include "llvm/Target/TargetSelectionDAGInfo.h"
55 /// makeVTList - Return an instance of the SDVTList struct initialized with the
56 /// specified members.
57 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
58 SDVTList Res = {VTs, NumVTs};
62 static const fltSemantics *EVTToAPFloatSemantics(EVT VT) {
63 switch (VT.getSimpleVT().SimpleTy) {
64 default: llvm_unreachable("Unknown FP format");
65 case MVT::f16: return &APFloat::IEEEhalf;
66 case MVT::f32: return &APFloat::IEEEsingle;
67 case MVT::f64: return &APFloat::IEEEdouble;
68 case MVT::f80: return &APFloat::x87DoubleExtended;
69 case MVT::f128: return &APFloat::IEEEquad;
70 case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
74 // Default null implementations of the callbacks.
75 void SelectionDAG::DAGUpdateListener::NodeDeleted(SDNode*, SDNode*) {}
76 void SelectionDAG::DAGUpdateListener::NodeUpdated(SDNode*) {}
78 //===----------------------------------------------------------------------===//
79 // ConstantFPSDNode Class
80 //===----------------------------------------------------------------------===//
82 /// isExactlyValue - We don't rely on operator== working on double values, as
83 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
84 /// As such, this method can be used to do an exact bit-for-bit comparison of
85 /// two floating point values.
86 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
87 return getValueAPF().bitwiseIsEqual(V);
90 bool ConstantFPSDNode::isValueValidForType(EVT VT,
92 assert(VT.isFloatingPoint() && "Can only convert between FP types");
94 // convert modifies in place, so make a copy.
95 APFloat Val2 = APFloat(Val);
97 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
102 //===----------------------------------------------------------------------===//
104 //===----------------------------------------------------------------------===//
106 /// isBuildVectorAllOnes - Return true if the specified node is a
107 /// BUILD_VECTOR where all of the elements are ~0 or undef.
108 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
109 // Look through a bit convert.
110 if (N->getOpcode() == ISD::BITCAST)
111 N = N->getOperand(0).getNode();
113 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
115 unsigned i = 0, e = N->getNumOperands();
117 // Skip over all of the undef values.
118 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
121 // Do not accept an all-undef vector.
122 if (i == e) return false;
124 // Do not accept build_vectors that aren't all constants or which have non-~0
125 // elements. We have to be a bit careful here, as the type of the constant
126 // may not be the same as the type of the vector elements due to type
127 // legalization (the elements are promoted to a legal type for the target and
128 // a vector of a type may be legal when the base element type is not).
129 // We only want to check enough bits to cover the vector elements, because
130 // we care if the resultant vector is all ones, not whether the individual
132 SDValue NotZero = N->getOperand(i);
133 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits();
134 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(NotZero)) {
135 if (CN->getAPIntValue().countTrailingOnes() < EltSize)
137 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(NotZero)) {
138 if (CFPN->getValueAPF().bitcastToAPInt().countTrailingOnes() < EltSize)
143 // Okay, we have at least one ~0 value, check to see if the rest match or are
144 // undefs. Even with the above element type twiddling, this should be OK, as
145 // the same type legalization should have applied to all the elements.
146 for (++i; i != e; ++i)
147 if (N->getOperand(i) != NotZero &&
148 N->getOperand(i).getOpcode() != ISD::UNDEF)
154 /// isBuildVectorAllZeros - Return true if the specified node is a
155 /// BUILD_VECTOR where all of the elements are 0 or undef.
156 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
157 // Look through a bit convert.
158 if (N->getOpcode() == ISD::BITCAST)
159 N = N->getOperand(0).getNode();
161 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
163 unsigned i = 0, e = N->getNumOperands();
165 // Skip over all of the undef values.
166 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
169 // Do not accept an all-undef vector.
170 if (i == e) return false;
172 // Do not accept build_vectors that aren't all constants or which have non-0
174 SDValue Zero = N->getOperand(i);
175 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Zero)) {
176 if (!CN->isNullValue())
178 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(Zero)) {
179 if (!CFPN->getValueAPF().isPosZero())
184 // Okay, we have at least one 0 value, check to see if the rest match or are
186 for (++i; i != e; ++i)
187 if (N->getOperand(i) != Zero &&
188 N->getOperand(i).getOpcode() != ISD::UNDEF)
193 /// isScalarToVector - Return true if the specified node is a
194 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
195 /// element is not an undef.
196 bool ISD::isScalarToVector(const SDNode *N) {
197 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
200 if (N->getOpcode() != ISD::BUILD_VECTOR)
202 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
204 unsigned NumElems = N->getNumOperands();
207 for (unsigned i = 1; i < NumElems; ++i) {
208 SDValue V = N->getOperand(i);
209 if (V.getOpcode() != ISD::UNDEF)
215 /// allOperandsUndef - Return true if the node has at least one operand
216 /// and all operands of the specified node are ISD::UNDEF.
217 bool ISD::allOperandsUndef(const SDNode *N) {
218 // Return false if the node has no operands.
219 // This is "logically inconsistent" with the definition of "all" but
220 // is probably the desired behavior.
221 if (N->getNumOperands() == 0)
224 for (unsigned i = 0, e = N->getNumOperands(); i != e ; ++i)
225 if (N->getOperand(i).getOpcode() != ISD::UNDEF)
231 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
232 /// when given the operation for (X op Y).
233 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
234 // To perform this operation, we just need to swap the L and G bits of the
236 unsigned OldL = (Operation >> 2) & 1;
237 unsigned OldG = (Operation >> 1) & 1;
238 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
239 (OldL << 1) | // New G bit
240 (OldG << 2)); // New L bit.
243 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
244 /// 'op' is a valid SetCC operation.
245 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
246 unsigned Operation = Op;
248 Operation ^= 7; // Flip L, G, E bits, but not U.
250 Operation ^= 15; // Flip all of the condition bits.
252 if (Operation > ISD::SETTRUE2)
253 Operation &= ~8; // Don't let N and U bits get set.
255 return ISD::CondCode(Operation);
259 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
260 /// signed operation and 2 if the result is an unsigned comparison. Return zero
261 /// if the operation does not depend on the sign of the input (setne and seteq).
262 static int isSignedOp(ISD::CondCode Opcode) {
264 default: llvm_unreachable("Illegal integer setcc operation!");
266 case ISD::SETNE: return 0;
270 case ISD::SETGE: return 1;
274 case ISD::SETUGE: return 2;
278 /// getSetCCOrOperation - Return the result of a logical OR between different
279 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
280 /// returns SETCC_INVALID if it is not possible to represent the resultant
282 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
284 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
285 // Cannot fold a signed integer setcc with an unsigned integer setcc.
286 return ISD::SETCC_INVALID;
288 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
290 // If the N and U bits get set then the resultant comparison DOES suddenly
291 // care about orderedness, and is true when ordered.
292 if (Op > ISD::SETTRUE2)
293 Op &= ~16; // Clear the U bit if the N bit is set.
295 // Canonicalize illegal integer setcc's.
296 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
299 return ISD::CondCode(Op);
302 /// getSetCCAndOperation - Return the result of a logical AND between different
303 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
304 /// function returns zero if it is not possible to represent the resultant
306 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
308 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
309 // Cannot fold a signed setcc with an unsigned setcc.
310 return ISD::SETCC_INVALID;
312 // Combine all of the condition bits.
313 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
315 // Canonicalize illegal integer setcc's.
319 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
320 case ISD::SETOEQ: // SETEQ & SETU[LG]E
321 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
322 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
323 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
330 //===----------------------------------------------------------------------===//
331 // SDNode Profile Support
332 //===----------------------------------------------------------------------===//
334 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
336 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
340 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
341 /// solely with their pointer.
342 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
343 ID.AddPointer(VTList.VTs);
346 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
348 static void AddNodeIDOperands(FoldingSetNodeID &ID,
349 const SDValue *Ops, unsigned NumOps) {
350 for (; NumOps; --NumOps, ++Ops) {
351 ID.AddPointer(Ops->getNode());
352 ID.AddInteger(Ops->getResNo());
356 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
358 static void AddNodeIDOperands(FoldingSetNodeID &ID,
359 const SDUse *Ops, unsigned NumOps) {
360 for (; NumOps; --NumOps, ++Ops) {
361 ID.AddPointer(Ops->getNode());
362 ID.AddInteger(Ops->getResNo());
366 static void AddNodeIDNode(FoldingSetNodeID &ID,
367 unsigned short OpC, SDVTList VTList,
368 const SDValue *OpList, unsigned N) {
369 AddNodeIDOpcode(ID, OpC);
370 AddNodeIDValueTypes(ID, VTList);
371 AddNodeIDOperands(ID, OpList, N);
374 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
376 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
377 switch (N->getOpcode()) {
378 case ISD::TargetExternalSymbol:
379 case ISD::ExternalSymbol:
380 llvm_unreachable("Should only be used on nodes with operands");
381 default: break; // Normal nodes don't need extra info.
382 case ISD::TargetConstant:
384 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
386 case ISD::TargetConstantFP:
387 case ISD::ConstantFP: {
388 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
391 case ISD::TargetGlobalAddress:
392 case ISD::GlobalAddress:
393 case ISD::TargetGlobalTLSAddress:
394 case ISD::GlobalTLSAddress: {
395 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
396 ID.AddPointer(GA->getGlobal());
397 ID.AddInteger(GA->getOffset());
398 ID.AddInteger(GA->getTargetFlags());
399 ID.AddInteger(GA->getAddressSpace());
402 case ISD::BasicBlock:
403 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
406 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
408 case ISD::RegisterMask:
409 ID.AddPointer(cast<RegisterMaskSDNode>(N)->getRegMask());
412 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
414 case ISD::FrameIndex:
415 case ISD::TargetFrameIndex:
416 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
419 case ISD::TargetJumpTable:
420 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
421 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
423 case ISD::ConstantPool:
424 case ISD::TargetConstantPool: {
425 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
426 ID.AddInteger(CP->getAlignment());
427 ID.AddInteger(CP->getOffset());
428 if (CP->isMachineConstantPoolEntry())
429 CP->getMachineCPVal()->addSelectionDAGCSEId(ID);
431 ID.AddPointer(CP->getConstVal());
432 ID.AddInteger(CP->getTargetFlags());
435 case ISD::TargetIndex: {
436 const TargetIndexSDNode *TI = cast<TargetIndexSDNode>(N);
437 ID.AddInteger(TI->getIndex());
438 ID.AddInteger(TI->getOffset());
439 ID.AddInteger(TI->getTargetFlags());
443 const LoadSDNode *LD = cast<LoadSDNode>(N);
444 ID.AddInteger(LD->getMemoryVT().getRawBits());
445 ID.AddInteger(LD->getRawSubclassData());
446 ID.AddInteger(LD->getPointerInfo().getAddrSpace());
450 const StoreSDNode *ST = cast<StoreSDNode>(N);
451 ID.AddInteger(ST->getMemoryVT().getRawBits());
452 ID.AddInteger(ST->getRawSubclassData());
453 ID.AddInteger(ST->getPointerInfo().getAddrSpace());
456 case ISD::ATOMIC_CMP_SWAP:
457 case ISD::ATOMIC_SWAP:
458 case ISD::ATOMIC_LOAD_ADD:
459 case ISD::ATOMIC_LOAD_SUB:
460 case ISD::ATOMIC_LOAD_AND:
461 case ISD::ATOMIC_LOAD_OR:
462 case ISD::ATOMIC_LOAD_XOR:
463 case ISD::ATOMIC_LOAD_NAND:
464 case ISD::ATOMIC_LOAD_MIN:
465 case ISD::ATOMIC_LOAD_MAX:
466 case ISD::ATOMIC_LOAD_UMIN:
467 case ISD::ATOMIC_LOAD_UMAX:
468 case ISD::ATOMIC_LOAD:
469 case ISD::ATOMIC_STORE: {
470 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
471 ID.AddInteger(AT->getMemoryVT().getRawBits());
472 ID.AddInteger(AT->getRawSubclassData());
473 ID.AddInteger(AT->getPointerInfo().getAddrSpace());
476 case ISD::PREFETCH: {
477 const MemSDNode *PF = cast<MemSDNode>(N);
478 ID.AddInteger(PF->getPointerInfo().getAddrSpace());
481 case ISD::VECTOR_SHUFFLE: {
482 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
483 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
485 ID.AddInteger(SVN->getMaskElt(i));
488 case ISD::TargetBlockAddress:
489 case ISD::BlockAddress: {
490 const BlockAddressSDNode *BA = cast<BlockAddressSDNode>(N);
491 ID.AddPointer(BA->getBlockAddress());
492 ID.AddInteger(BA->getOffset());
493 ID.AddInteger(BA->getTargetFlags());
496 } // end switch (N->getOpcode())
498 // Target specific memory nodes could also have address spaces to check.
499 if (N->isTargetMemoryOpcode())
500 ID.AddInteger(cast<MemSDNode>(N)->getPointerInfo().getAddrSpace());
503 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
505 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
506 AddNodeIDOpcode(ID, N->getOpcode());
507 // Add the return value info.
508 AddNodeIDValueTypes(ID, N->getVTList());
509 // Add the operand info.
510 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
512 // Handle SDNode leafs with special info.
513 AddNodeIDCustom(ID, N);
516 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
517 /// the CSE map that carries volatility, temporalness, indexing mode, and
518 /// extension/truncation information.
520 static inline unsigned
521 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile,
522 bool isNonTemporal, bool isInvariant) {
523 assert((ConvType & 3) == ConvType &&
524 "ConvType may not require more than 2 bits!");
525 assert((AM & 7) == AM &&
526 "AM may not require more than 3 bits!");
530 (isNonTemporal << 6) |
534 //===----------------------------------------------------------------------===//
535 // SelectionDAG Class
536 //===----------------------------------------------------------------------===//
538 /// doNotCSE - Return true if CSE should not be performed for this node.
539 static bool doNotCSE(SDNode *N) {
540 if (N->getValueType(0) == MVT::Glue)
541 return true; // Never CSE anything that produces a flag.
543 switch (N->getOpcode()) {
545 case ISD::HANDLENODE:
547 return true; // Never CSE these nodes.
550 // Check that remaining values produced are not flags.
551 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
552 if (N->getValueType(i) == MVT::Glue)
553 return true; // Never CSE anything that produces a flag.
558 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
560 void SelectionDAG::RemoveDeadNodes() {
561 // Create a dummy node (which is not added to allnodes), that adds a reference
562 // to the root node, preventing it from being deleted.
563 HandleSDNode Dummy(getRoot());
565 SmallVector<SDNode*, 128> DeadNodes;
567 // Add all obviously-dead nodes to the DeadNodes worklist.
568 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
570 DeadNodes.push_back(I);
572 RemoveDeadNodes(DeadNodes);
574 // If the root changed (e.g. it was a dead load, update the root).
575 setRoot(Dummy.getValue());
578 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
579 /// given list, and any nodes that become unreachable as a result.
580 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes) {
582 // Process the worklist, deleting the nodes and adding their uses to the
584 while (!DeadNodes.empty()) {
585 SDNode *N = DeadNodes.pop_back_val();
587 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
588 DUL->NodeDeleted(N, 0);
590 // Take the node out of the appropriate CSE map.
591 RemoveNodeFromCSEMaps(N);
593 // Next, brutally remove the operand list. This is safe to do, as there are
594 // no cycles in the graph.
595 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
597 SDNode *Operand = Use.getNode();
600 // Now that we removed this operand, see if there are no uses of it left.
601 if (Operand->use_empty())
602 DeadNodes.push_back(Operand);
609 void SelectionDAG::RemoveDeadNode(SDNode *N){
610 SmallVector<SDNode*, 16> DeadNodes(1, N);
612 // Create a dummy node that adds a reference to the root node, preventing
613 // it from being deleted. (This matters if the root is an operand of the
615 HandleSDNode Dummy(getRoot());
617 RemoveDeadNodes(DeadNodes);
620 void SelectionDAG::DeleteNode(SDNode *N) {
621 // First take this out of the appropriate CSE map.
622 RemoveNodeFromCSEMaps(N);
624 // Finally, remove uses due to operands of this node, remove from the
625 // AllNodes list, and delete the node.
626 DeleteNodeNotInCSEMaps(N);
629 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
630 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
631 assert(N->use_empty() && "Cannot delete a node that is not dead!");
633 // Drop all of the operands and decrement used node's use counts.
639 void SelectionDAG::DeallocateNode(SDNode *N) {
640 if (N->OperandsNeedDelete)
641 delete[] N->OperandList;
643 // Set the opcode to DELETED_NODE to help catch bugs when node
644 // memory is reallocated.
645 N->NodeType = ISD::DELETED_NODE;
647 NodeAllocator.Deallocate(AllNodes.remove(N));
649 // Remove the ordering of this node.
652 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them.
653 ArrayRef<SDDbgValue*> DbgVals = DbgInfo->getSDDbgValues(N);
654 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i)
655 DbgVals[i]->setIsInvalidated();
658 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
659 /// correspond to it. This is useful when we're about to delete or repurpose
660 /// the node. We don't want future request for structurally identical nodes
661 /// to return N anymore.
662 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
664 switch (N->getOpcode()) {
665 case ISD::HANDLENODE: return false; // noop.
667 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
668 "Cond code doesn't exist!");
669 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
670 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
672 case ISD::ExternalSymbol:
673 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
675 case ISD::TargetExternalSymbol: {
676 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
677 Erased = TargetExternalSymbols.erase(
678 std::pair<std::string,unsigned char>(ESN->getSymbol(),
679 ESN->getTargetFlags()));
682 case ISD::VALUETYPE: {
683 EVT VT = cast<VTSDNode>(N)->getVT();
684 if (VT.isExtended()) {
685 Erased = ExtendedValueTypeNodes.erase(VT);
687 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0;
688 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0;
693 // Remove it from the CSE Map.
694 assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!");
695 assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!");
696 Erased = CSEMap.RemoveNode(N);
700 // Verify that the node was actually in one of the CSE maps, unless it has a
701 // flag result (which cannot be CSE'd) or is one of the special cases that are
702 // not subject to CSE.
703 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue &&
704 !N->isMachineOpcode() && !doNotCSE(N)) {
707 llvm_unreachable("Node is not in map!");
713 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
714 /// maps and modified in place. Add it back to the CSE maps, unless an identical
715 /// node already exists, in which case transfer all its users to the existing
716 /// node. This transfer can potentially trigger recursive merging.
719 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N) {
720 // For node types that aren't CSE'd, just act as if no identical node
723 SDNode *Existing = CSEMap.GetOrInsertNode(N);
725 // If there was already an existing matching node, use ReplaceAllUsesWith
726 // to replace the dead one with the existing one. This can cause
727 // recursive merging of other unrelated nodes down the line.
728 ReplaceAllUsesWith(N, Existing);
730 // N is now dead. Inform the listeners and delete it.
731 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
732 DUL->NodeDeleted(N, Existing);
733 DeleteNodeNotInCSEMaps(N);
738 // If the node doesn't already exist, we updated it. Inform listeners.
739 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
743 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
744 /// were replaced with those specified. If this node is never memoized,
745 /// return null, otherwise return a pointer to the slot it would take. If a
746 /// node already exists with these operands, the slot will be non-null.
747 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
752 SDValue Ops[] = { Op };
754 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
755 AddNodeIDCustom(ID, N);
756 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
760 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
761 /// were replaced with those specified. If this node is never memoized,
762 /// return null, otherwise return a pointer to the slot it would take. If a
763 /// node already exists with these operands, the slot will be non-null.
764 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
765 SDValue Op1, SDValue Op2,
770 SDValue Ops[] = { Op1, Op2 };
772 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
773 AddNodeIDCustom(ID, N);
774 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
779 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
780 /// were replaced with those specified. If this node is never memoized,
781 /// return null, otherwise return a pointer to the slot it would take. If a
782 /// node already exists with these operands, the slot will be non-null.
783 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
784 const SDValue *Ops,unsigned NumOps,
790 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
791 AddNodeIDCustom(ID, N);
792 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
797 /// VerifyNodeCommon - Sanity check the given node. Aborts if it is invalid.
798 static void VerifyNodeCommon(SDNode *N) {
799 switch (N->getOpcode()) {
802 case ISD::BUILD_PAIR: {
803 EVT VT = N->getValueType(0);
804 assert(N->getNumValues() == 1 && "Too many results!");
805 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
806 "Wrong return type!");
807 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
808 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
809 "Mismatched operand types!");
810 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
811 "Wrong operand type!");
812 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
813 "Wrong return type size");
816 case ISD::BUILD_VECTOR: {
817 assert(N->getNumValues() == 1 && "Too many results!");
818 assert(N->getValueType(0).isVector() && "Wrong return type!");
819 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
820 "Wrong number of operands!");
821 EVT EltVT = N->getValueType(0).getVectorElementType();
822 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) {
823 assert((I->getValueType() == EltVT ||
824 (EltVT.isInteger() && I->getValueType().isInteger() &&
825 EltVT.bitsLE(I->getValueType()))) &&
826 "Wrong operand type!");
827 assert(I->getValueType() == N->getOperand(0).getValueType() &&
828 "Operands must all have the same type");
835 /// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid.
836 static void VerifySDNode(SDNode *N) {
837 // The SDNode allocators cannot be used to allocate nodes with fields that are
838 // not present in an SDNode!
839 assert(!isa<MemSDNode>(N) && "Bad MemSDNode!");
840 assert(!isa<ShuffleVectorSDNode>(N) && "Bad ShuffleVectorSDNode!");
841 assert(!isa<ConstantSDNode>(N) && "Bad ConstantSDNode!");
842 assert(!isa<ConstantFPSDNode>(N) && "Bad ConstantFPSDNode!");
843 assert(!isa<GlobalAddressSDNode>(N) && "Bad GlobalAddressSDNode!");
844 assert(!isa<FrameIndexSDNode>(N) && "Bad FrameIndexSDNode!");
845 assert(!isa<JumpTableSDNode>(N) && "Bad JumpTableSDNode!");
846 assert(!isa<ConstantPoolSDNode>(N) && "Bad ConstantPoolSDNode!");
847 assert(!isa<BasicBlockSDNode>(N) && "Bad BasicBlockSDNode!");
848 assert(!isa<SrcValueSDNode>(N) && "Bad SrcValueSDNode!");
849 assert(!isa<MDNodeSDNode>(N) && "Bad MDNodeSDNode!");
850 assert(!isa<RegisterSDNode>(N) && "Bad RegisterSDNode!");
851 assert(!isa<BlockAddressSDNode>(N) && "Bad BlockAddressSDNode!");
852 assert(!isa<EHLabelSDNode>(N) && "Bad EHLabelSDNode!");
853 assert(!isa<ExternalSymbolSDNode>(N) && "Bad ExternalSymbolSDNode!");
854 assert(!isa<CondCodeSDNode>(N) && "Bad CondCodeSDNode!");
855 assert(!isa<CvtRndSatSDNode>(N) && "Bad CvtRndSatSDNode!");
856 assert(!isa<VTSDNode>(N) && "Bad VTSDNode!");
857 assert(!isa<MachineSDNode>(N) && "Bad MachineSDNode!");
862 /// VerifyMachineNode - Sanity check the given MachineNode. Aborts if it is
864 static void VerifyMachineNode(SDNode *N) {
865 // The MachineNode allocators cannot be used to allocate nodes with fields
866 // that are not present in a MachineNode!
867 // Currently there are no such nodes.
873 /// getEVTAlignment - Compute the default alignment value for the
876 unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
877 Type *Ty = VT == MVT::iPTR ?
878 PointerType::get(Type::getInt8Ty(*getContext()), 0) :
879 VT.getTypeForEVT(*getContext());
881 return TLI.getDataLayout()->getABITypeAlignment(Ty);
884 // EntryNode could meaningfully have debug info if we can find it...
885 SelectionDAG::SelectionDAG(const TargetMachine &tm, CodeGenOpt::Level OL)
886 : TM(tm), TLI(*tm.getTargetLowering()), TSI(*tm.getSelectionDAGInfo()),
887 OptLevel(OL), EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Other)),
888 Root(getEntryNode()), Ordering(0), UpdateListeners(0) {
889 AllNodes.push_back(&EntryNode);
890 Ordering = new SDNodeOrdering();
891 DbgInfo = new SDDbgInfo();
894 void SelectionDAG::init(MachineFunction &mf) {
896 Context = &mf.getFunction()->getContext();
899 SelectionDAG::~SelectionDAG() {
900 assert(!UpdateListeners && "Dangling registered DAGUpdateListeners");
906 void SelectionDAG::allnodes_clear() {
907 assert(&*AllNodes.begin() == &EntryNode);
908 AllNodes.remove(AllNodes.begin());
909 while (!AllNodes.empty())
910 DeallocateNode(AllNodes.begin());
913 void SelectionDAG::clear() {
915 OperandAllocator.Reset();
918 ExtendedValueTypeNodes.clear();
919 ExternalSymbols.clear();
920 TargetExternalSymbols.clear();
921 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
922 static_cast<CondCodeSDNode*>(0));
923 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
924 static_cast<SDNode*>(0));
926 EntryNode.UseList = 0;
927 AllNodes.push_back(&EntryNode);
928 Root = getEntryNode();
933 SDValue SelectionDAG::getAnyExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
934 return VT.bitsGT(Op.getValueType()) ?
935 getNode(ISD::ANY_EXTEND, DL, VT, Op) :
936 getNode(ISD::TRUNCATE, DL, VT, Op);
939 SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
940 return VT.bitsGT(Op.getValueType()) ?
941 getNode(ISD::SIGN_EXTEND, DL, VT, Op) :
942 getNode(ISD::TRUNCATE, DL, VT, Op);
945 SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
946 return VT.bitsGT(Op.getValueType()) ?
947 getNode(ISD::ZERO_EXTEND, DL, VT, Op) :
948 getNode(ISD::TRUNCATE, DL, VT, Op);
951 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) {
952 assert(!VT.isVector() &&
953 "getZeroExtendInReg should use the vector element type instead of "
955 if (Op.getValueType() == VT) return Op;
956 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
957 APInt Imm = APInt::getLowBitsSet(BitWidth,
959 return getNode(ISD::AND, DL, Op.getValueType(), Op,
960 getConstant(Imm, Op.getValueType()));
963 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
965 SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) {
966 EVT EltVT = VT.getScalarType();
968 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT);
969 return getNode(ISD::XOR, DL, VT, Val, NegOne);
972 SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) {
973 EVT EltVT = VT.getScalarType();
974 assert((EltVT.getSizeInBits() >= 64 ||
975 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
976 "getConstant with a uint64_t value that doesn't fit in the type!");
977 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
980 SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) {
981 return getConstant(*ConstantInt::get(*Context, Val), VT, isT);
984 SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) {
985 assert(VT.isInteger() && "Cannot create FP integer constant!");
987 EVT EltVT = VT.getScalarType();
988 const ConstantInt *Elt = &Val;
990 // In some cases the vector type is legal but the element type is illegal and
991 // needs to be promoted, for example v8i8 on ARM. In this case, promote the
992 // inserted value (the type does not need to match the vector element type).
993 // Any extra bits introduced will be truncated away.
994 if (VT.isVector() && TLI.getTypeAction(*getContext(), EltVT) ==
995 TargetLowering::TypePromoteInteger) {
996 EltVT = TLI.getTypeToTransformTo(*getContext(), EltVT);
997 APInt NewVal = Elt->getValue().zext(EltVT.getSizeInBits());
998 Elt = ConstantInt::get(*getContext(), NewVal);
1001 assert(Elt->getBitWidth() == EltVT.getSizeInBits() &&
1002 "APInt size does not match type size!");
1003 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
1004 FoldingSetNodeID ID;
1005 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
1009 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
1011 return SDValue(N, 0);
1014 N = new (NodeAllocator) ConstantSDNode(isT, Elt, EltVT);
1015 CSEMap.InsertNode(N, IP);
1016 AllNodes.push_back(N);
1019 SDValue Result(N, 0);
1020 if (VT.isVector()) {
1021 SmallVector<SDValue, 8> Ops;
1022 Ops.assign(VT.getVectorNumElements(), Result);
1023 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
1028 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
1029 return getConstant(Val, TLI.getPointerTy(), isTarget);
1033 SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) {
1034 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget);
1037 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){
1038 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
1040 EVT EltVT = VT.getScalarType();
1042 // Do the map lookup using the actual bit pattern for the floating point
1043 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
1044 // we don't have issues with SNANs.
1045 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
1046 FoldingSetNodeID ID;
1047 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
1051 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
1053 return SDValue(N, 0);
1056 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT);
1057 CSEMap.InsertNode(N, IP);
1058 AllNodes.push_back(N);
1061 SDValue Result(N, 0);
1062 if (VT.isVector()) {
1063 SmallVector<SDValue, 8> Ops;
1064 Ops.assign(VT.getVectorNumElements(), Result);
1065 // FIXME DebugLoc info might be appropriate here
1066 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
1071 SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) {
1072 EVT EltVT = VT.getScalarType();
1073 if (EltVT==MVT::f32)
1074 return getConstantFP(APFloat((float)Val), VT, isTarget);
1075 else if (EltVT==MVT::f64)
1076 return getConstantFP(APFloat(Val), VT, isTarget);
1077 else if (EltVT==MVT::f80 || EltVT==MVT::f128 || EltVT==MVT::f16) {
1079 APFloat apf = APFloat(Val);
1080 apf.convert(*EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven,
1082 return getConstantFP(apf, VT, isTarget);
1084 llvm_unreachable("Unsupported type in getConstantFP");
1087 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, DebugLoc DL,
1088 EVT VT, int64_t Offset,
1090 unsigned char TargetFlags) {
1091 assert((TargetFlags == 0 || isTargetGA) &&
1092 "Cannot set target flags on target-independent globals");
1094 // Truncate (with sign-extension) the offset value to the pointer size.
1095 unsigned BitWidth = TLI.getPointerTy().getSizeInBits();
1097 Offset = SignExtend64(Offset, BitWidth);
1099 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
1101 // If GV is an alias then use the aliasee for determining thread-localness.
1102 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
1103 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
1107 if (GVar && GVar->isThreadLocal())
1108 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
1110 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
1112 FoldingSetNodeID ID;
1113 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1115 ID.AddInteger(Offset);
1116 ID.AddInteger(TargetFlags);
1117 ID.AddInteger(GV->getType()->getAddressSpace());
1119 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1120 return SDValue(E, 0);
1122 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL, GV, VT,
1123 Offset, TargetFlags);
1124 CSEMap.InsertNode(N, IP);
1125 AllNodes.push_back(N);
1126 return SDValue(N, 0);
1129 SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
1130 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1131 FoldingSetNodeID ID;
1132 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1135 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1136 return SDValue(E, 0);
1138 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget);
1139 CSEMap.InsertNode(N, IP);
1140 AllNodes.push_back(N);
1141 return SDValue(N, 0);
1144 SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
1145 unsigned char TargetFlags) {
1146 assert((TargetFlags == 0 || isTarget) &&
1147 "Cannot set target flags on target-independent jump tables");
1148 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1149 FoldingSetNodeID ID;
1150 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1152 ID.AddInteger(TargetFlags);
1154 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1155 return SDValue(E, 0);
1157 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget,
1159 CSEMap.InsertNode(N, IP);
1160 AllNodes.push_back(N);
1161 return SDValue(N, 0);
1164 SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT,
1165 unsigned Alignment, int Offset,
1167 unsigned char TargetFlags) {
1168 assert((TargetFlags == 0 || isTarget) &&
1169 "Cannot set target flags on target-independent globals");
1171 Alignment = TLI.getDataLayout()->getPrefTypeAlignment(C->getType());
1172 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1173 FoldingSetNodeID ID;
1174 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1175 ID.AddInteger(Alignment);
1176 ID.AddInteger(Offset);
1178 ID.AddInteger(TargetFlags);
1180 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1181 return SDValue(E, 0);
1183 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1184 Alignment, TargetFlags);
1185 CSEMap.InsertNode(N, IP);
1186 AllNodes.push_back(N);
1187 return SDValue(N, 0);
1191 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
1192 unsigned Alignment, int Offset,
1194 unsigned char TargetFlags) {
1195 assert((TargetFlags == 0 || isTarget) &&
1196 "Cannot set target flags on target-independent globals");
1198 Alignment = TLI.getDataLayout()->getPrefTypeAlignment(C->getType());
1199 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1200 FoldingSetNodeID ID;
1201 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1202 ID.AddInteger(Alignment);
1203 ID.AddInteger(Offset);
1204 C->addSelectionDAGCSEId(ID);
1205 ID.AddInteger(TargetFlags);
1207 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1208 return SDValue(E, 0);
1210 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1211 Alignment, TargetFlags);
1212 CSEMap.InsertNode(N, IP);
1213 AllNodes.push_back(N);
1214 return SDValue(N, 0);
1217 SDValue SelectionDAG::getTargetIndex(int Index, EVT VT, int64_t Offset,
1218 unsigned char TargetFlags) {
1219 FoldingSetNodeID ID;
1220 AddNodeIDNode(ID, ISD::TargetIndex, getVTList(VT), 0, 0);
1221 ID.AddInteger(Index);
1222 ID.AddInteger(Offset);
1223 ID.AddInteger(TargetFlags);
1225 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1226 return SDValue(E, 0);
1228 SDNode *N = new (NodeAllocator) TargetIndexSDNode(Index, VT, Offset,
1230 CSEMap.InsertNode(N, IP);
1231 AllNodes.push_back(N);
1232 return SDValue(N, 0);
1235 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1236 FoldingSetNodeID ID;
1237 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1240 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1241 return SDValue(E, 0);
1243 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB);
1244 CSEMap.InsertNode(N, IP);
1245 AllNodes.push_back(N);
1246 return SDValue(N, 0);
1249 SDValue SelectionDAG::getValueType(EVT VT) {
1250 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
1251 ValueTypeNodes.size())
1252 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
1254 SDNode *&N = VT.isExtended() ?
1255 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
1257 if (N) return SDValue(N, 0);
1258 N = new (NodeAllocator) VTSDNode(VT);
1259 AllNodes.push_back(N);
1260 return SDValue(N, 0);
1263 SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
1264 SDNode *&N = ExternalSymbols[Sym];
1265 if (N) return SDValue(N, 0);
1266 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT);
1267 AllNodes.push_back(N);
1268 return SDValue(N, 0);
1271 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
1272 unsigned char TargetFlags) {
1274 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1276 if (N) return SDValue(N, 0);
1277 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1278 AllNodes.push_back(N);
1279 return SDValue(N, 0);
1282 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1283 if ((unsigned)Cond >= CondCodeNodes.size())
1284 CondCodeNodes.resize(Cond+1);
1286 if (CondCodeNodes[Cond] == 0) {
1287 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond);
1288 CondCodeNodes[Cond] = N;
1289 AllNodes.push_back(N);
1292 return SDValue(CondCodeNodes[Cond], 0);
1295 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1296 // the shuffle mask M that point at N1 to point at N2, and indices that point
1297 // N2 to point at N1.
1298 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1300 int NElts = M.size();
1301 for (int i = 0; i != NElts; ++i) {
1309 SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1,
1310 SDValue N2, const int *Mask) {
1311 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE");
1312 assert(VT.isVector() && N1.getValueType().isVector() &&
1313 "Vector Shuffle VTs must be a vectors");
1314 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType()
1315 && "Vector Shuffle VTs must have same element type");
1317 // Canonicalize shuffle undef, undef -> undef
1318 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1319 return getUNDEF(VT);
1321 // Validate that all indices in Mask are within the range of the elements
1322 // input to the shuffle.
1323 unsigned NElts = VT.getVectorNumElements();
1324 SmallVector<int, 8> MaskVec;
1325 for (unsigned i = 0; i != NElts; ++i) {
1326 assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1327 MaskVec.push_back(Mask[i]);
1330 // Canonicalize shuffle v, v -> v, undef
1333 for (unsigned i = 0; i != NElts; ++i)
1334 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1337 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1338 if (N1.getOpcode() == ISD::UNDEF)
1339 commuteShuffle(N1, N2, MaskVec);
1341 // Canonicalize all index into lhs, -> shuffle lhs, undef
1342 // Canonicalize all index into rhs, -> shuffle rhs, undef
1343 bool AllLHS = true, AllRHS = true;
1344 bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1345 for (unsigned i = 0; i != NElts; ++i) {
1346 if (MaskVec[i] >= (int)NElts) {
1351 } else if (MaskVec[i] >= 0) {
1355 if (AllLHS && AllRHS)
1356 return getUNDEF(VT);
1357 if (AllLHS && !N2Undef)
1361 commuteShuffle(N1, N2, MaskVec);
1364 // If Identity shuffle, or all shuffle in to undef, return that node.
1365 bool AllUndef = true;
1366 bool Identity = true;
1367 for (unsigned i = 0; i != NElts; ++i) {
1368 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1369 if (MaskVec[i] >= 0) AllUndef = false;
1371 if (Identity && NElts == N1.getValueType().getVectorNumElements())
1374 return getUNDEF(VT);
1376 FoldingSetNodeID ID;
1377 SDValue Ops[2] = { N1, N2 };
1378 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2);
1379 for (unsigned i = 0; i != NElts; ++i)
1380 ID.AddInteger(MaskVec[i]);
1383 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1384 return SDValue(E, 0);
1386 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1387 // SDNode doesn't have access to it. This memory will be "leaked" when
1388 // the node is deallocated, but recovered when the NodeAllocator is released.
1389 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1390 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1392 ShuffleVectorSDNode *N =
1393 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc);
1394 CSEMap.InsertNode(N, IP);
1395 AllNodes.push_back(N);
1396 return SDValue(N, 0);
1399 SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl,
1400 SDValue Val, SDValue DTy,
1401 SDValue STy, SDValue Rnd, SDValue Sat,
1402 ISD::CvtCode Code) {
1403 // If the src and dest types are the same and the conversion is between
1404 // integer types of the same sign or two floats, no conversion is necessary.
1406 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1409 FoldingSetNodeID ID;
1410 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1411 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5);
1413 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1414 return SDValue(E, 0);
1416 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5,
1418 CSEMap.InsertNode(N, IP);
1419 AllNodes.push_back(N);
1420 return SDValue(N, 0);
1423 SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
1424 FoldingSetNodeID ID;
1425 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1426 ID.AddInteger(RegNo);
1428 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1429 return SDValue(E, 0);
1431 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT);
1432 CSEMap.InsertNode(N, IP);
1433 AllNodes.push_back(N);
1434 return SDValue(N, 0);
1437 SDValue SelectionDAG::getRegisterMask(const uint32_t *RegMask) {
1438 FoldingSetNodeID ID;
1439 AddNodeIDNode(ID, ISD::RegisterMask, getVTList(MVT::Untyped), 0, 0);
1440 ID.AddPointer(RegMask);
1442 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1443 return SDValue(E, 0);
1445 SDNode *N = new (NodeAllocator) RegisterMaskSDNode(RegMask);
1446 CSEMap.InsertNode(N, IP);
1447 AllNodes.push_back(N);
1448 return SDValue(N, 0);
1451 SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) {
1452 FoldingSetNodeID ID;
1453 SDValue Ops[] = { Root };
1454 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1);
1455 ID.AddPointer(Label);
1457 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1458 return SDValue(E, 0);
1460 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label);
1461 CSEMap.InsertNode(N, IP);
1462 AllNodes.push_back(N);
1463 return SDValue(N, 0);
1467 SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT,
1470 unsigned char TargetFlags) {
1471 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress;
1473 FoldingSetNodeID ID;
1474 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1476 ID.AddInteger(Offset);
1477 ID.AddInteger(TargetFlags);
1479 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1480 return SDValue(E, 0);
1482 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, Offset,
1484 CSEMap.InsertNode(N, IP);
1485 AllNodes.push_back(N);
1486 return SDValue(N, 0);
1489 SDValue SelectionDAG::getSrcValue(const Value *V) {
1490 assert((!V || V->getType()->isPointerTy()) &&
1491 "SrcValue is not a pointer?");
1493 FoldingSetNodeID ID;
1494 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1498 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1499 return SDValue(E, 0);
1501 SDNode *N = new (NodeAllocator) SrcValueSDNode(V);
1502 CSEMap.InsertNode(N, IP);
1503 AllNodes.push_back(N);
1504 return SDValue(N, 0);
1507 /// getMDNode - Return an MDNodeSDNode which holds an MDNode.
1508 SDValue SelectionDAG::getMDNode(const MDNode *MD) {
1509 FoldingSetNodeID ID;
1510 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0);
1514 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1515 return SDValue(E, 0);
1517 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD);
1518 CSEMap.InsertNode(N, IP);
1519 AllNodes.push_back(N);
1520 return SDValue(N, 0);
1524 /// getShiftAmountOperand - Return the specified value casted to
1525 /// the target's desired shift amount type.
1526 SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) {
1527 EVT OpTy = Op.getValueType();
1528 MVT ShTy = TLI.getShiftAmountTy(LHSTy);
1529 if (OpTy == ShTy || OpTy.isVector()) return Op;
1531 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1532 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op);
1535 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1536 /// specified value type.
1537 SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
1538 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1539 unsigned ByteSize = VT.getStoreSize();
1540 Type *Ty = VT.getTypeForEVT(*getContext());
1541 unsigned StackAlign =
1542 std::max((unsigned)TLI.getDataLayout()->getPrefTypeAlignment(Ty), minAlign);
1544 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false);
1545 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1548 /// CreateStackTemporary - Create a stack temporary suitable for holding
1549 /// either of the specified value types.
1550 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
1551 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1552 VT2.getStoreSizeInBits())/8;
1553 Type *Ty1 = VT1.getTypeForEVT(*getContext());
1554 Type *Ty2 = VT2.getTypeForEVT(*getContext());
1555 const DataLayout *TD = TLI.getDataLayout();
1556 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1557 TD->getPrefTypeAlignment(Ty2));
1559 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1560 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false);
1561 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1564 SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
1565 SDValue N2, ISD::CondCode Cond, DebugLoc dl) {
1566 // These setcc operations always fold.
1570 case ISD::SETFALSE2: return getConstant(0, VT);
1572 case ISD::SETTRUE2: return getConstant(1, VT);
1584 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1588 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1589 const APInt &C2 = N2C->getAPIntValue();
1590 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1591 const APInt &C1 = N1C->getAPIntValue();
1594 default: llvm_unreachable("Unknown integer setcc!");
1595 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1596 case ISD::SETNE: return getConstant(C1 != C2, VT);
1597 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1598 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1599 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1600 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1601 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1602 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1603 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1604 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1608 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1609 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1610 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1613 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1614 return getUNDEF(VT);
1616 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1617 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1618 return getUNDEF(VT);
1620 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1621 R==APFloat::cmpLessThan, VT);
1622 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1623 return getUNDEF(VT);
1625 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1626 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1627 return getUNDEF(VT);
1629 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1630 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1631 return getUNDEF(VT);
1633 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1634 R==APFloat::cmpEqual, VT);
1635 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1636 return getUNDEF(VT);
1638 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1639 R==APFloat::cmpEqual, VT);
1640 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1641 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1642 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1643 R==APFloat::cmpEqual, VT);
1644 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1645 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1646 R==APFloat::cmpLessThan, VT);
1647 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1648 R==APFloat::cmpUnordered, VT);
1649 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1650 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1653 // Ensure that the constant occurs on the RHS.
1654 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1658 // Could not fold it.
1662 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1663 /// use this predicate to simplify operations downstream.
1664 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1665 // This predicate is not safe for vector operations.
1666 if (Op.getValueType().isVector())
1669 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1670 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1673 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1674 /// this predicate to simplify operations downstream. Mask is known to be zero
1675 /// for bits that V cannot have.
1676 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1677 unsigned Depth) const {
1678 APInt KnownZero, KnownOne;
1679 ComputeMaskedBits(Op, KnownZero, KnownOne, Depth);
1680 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1681 return (KnownZero & Mask) == Mask;
1684 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1685 /// known to be either zero or one and return them in the KnownZero/KnownOne
1686 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1688 void SelectionDAG::ComputeMaskedBits(SDValue Op, APInt &KnownZero,
1689 APInt &KnownOne, unsigned Depth) const {
1690 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1692 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1694 return; // Limit search depth.
1696 APInt KnownZero2, KnownOne2;
1698 switch (Op.getOpcode()) {
1700 // We know all of the bits for a constant!
1701 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue();
1702 KnownZero = ~KnownOne;
1705 // If either the LHS or the RHS are Zero, the result is zero.
1706 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1707 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1708 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1709 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1711 // Output known-1 bits are only known if set in both the LHS & RHS.
1712 KnownOne &= KnownOne2;
1713 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1714 KnownZero |= KnownZero2;
1717 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1718 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1719 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1720 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1722 // Output known-0 bits are only known if clear in both the LHS & RHS.
1723 KnownZero &= KnownZero2;
1724 // Output known-1 are known to be set if set in either the LHS | RHS.
1725 KnownOne |= KnownOne2;
1728 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1729 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1730 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1731 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1733 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1734 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1735 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1736 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1737 KnownZero = KnownZeroOut;
1741 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1742 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1743 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1744 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1746 // If low bits are zero in either operand, output low known-0 bits.
1747 // Also compute a conserative estimate for high known-0 bits.
1748 // More trickiness is possible, but this is sufficient for the
1749 // interesting case of alignment computation.
1750 KnownOne.clearAllBits();
1751 unsigned TrailZ = KnownZero.countTrailingOnes() +
1752 KnownZero2.countTrailingOnes();
1753 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1754 KnownZero2.countLeadingOnes(),
1755 BitWidth) - BitWidth;
1757 TrailZ = std::min(TrailZ, BitWidth);
1758 LeadZ = std::min(LeadZ, BitWidth);
1759 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1760 APInt::getHighBitsSet(BitWidth, LeadZ);
1764 // For the purposes of computing leading zeros we can conservatively
1765 // treat a udiv as a logical right shift by the power of 2 known to
1766 // be less than the denominator.
1767 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1768 unsigned LeadZ = KnownZero2.countLeadingOnes();
1770 KnownOne2.clearAllBits();
1771 KnownZero2.clearAllBits();
1772 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
1773 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1774 if (RHSUnknownLeadingOnes != BitWidth)
1775 LeadZ = std::min(BitWidth,
1776 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1778 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ);
1782 ComputeMaskedBits(Op.getOperand(2), KnownZero, KnownOne, Depth+1);
1783 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
1784 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1785 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1787 // Only known if known in both the LHS and RHS.
1788 KnownOne &= KnownOne2;
1789 KnownZero &= KnownZero2;
1791 case ISD::SELECT_CC:
1792 ComputeMaskedBits(Op.getOperand(3), KnownZero, KnownOne, Depth+1);
1793 ComputeMaskedBits(Op.getOperand(2), KnownZero2, KnownOne2, Depth+1);
1794 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1795 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1797 // Only known if known in both the LHS and RHS.
1798 KnownOne &= KnownOne2;
1799 KnownZero &= KnownZero2;
1807 if (Op.getResNo() != 1)
1809 // The boolean result conforms to getBooleanContents. Fall through.
1811 // If we know the result of a setcc has the top bits zero, use this info.
1812 if (TLI.getBooleanContents(Op.getValueType().isVector()) ==
1813 TargetLowering::ZeroOrOneBooleanContent && BitWidth > 1)
1814 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1817 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1818 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1819 unsigned ShAmt = SA->getZExtValue();
1821 // If the shift count is an invalid immediate, don't do anything.
1822 if (ShAmt >= BitWidth)
1825 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1826 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1827 KnownZero <<= ShAmt;
1829 // low bits known zero.
1830 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1834 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1835 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1836 unsigned ShAmt = SA->getZExtValue();
1838 // If the shift count is an invalid immediate, don't do anything.
1839 if (ShAmt >= BitWidth)
1842 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1843 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1844 KnownZero = KnownZero.lshr(ShAmt);
1845 KnownOne = KnownOne.lshr(ShAmt);
1847 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
1848 KnownZero |= HighBits; // High bits known zero.
1852 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1853 unsigned ShAmt = SA->getZExtValue();
1855 // If the shift count is an invalid immediate, don't do anything.
1856 if (ShAmt >= BitWidth)
1859 // If any of the demanded bits are produced by the sign extension, we also
1860 // demand the input sign bit.
1861 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
1863 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1864 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1865 KnownZero = KnownZero.lshr(ShAmt);
1866 KnownOne = KnownOne.lshr(ShAmt);
1868 // Handle the sign bits.
1869 APInt SignBit = APInt::getSignBit(BitWidth);
1870 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1872 if (KnownZero.intersects(SignBit)) {
1873 KnownZero |= HighBits; // New bits are known zero.
1874 } else if (KnownOne.intersects(SignBit)) {
1875 KnownOne |= HighBits; // New bits are known one.
1879 case ISD::SIGN_EXTEND_INREG: {
1880 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1881 unsigned EBits = EVT.getScalarType().getSizeInBits();
1883 // Sign extension. Compute the demanded bits in the result that are not
1884 // present in the input.
1885 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits);
1887 APInt InSignBit = APInt::getSignBit(EBits);
1888 APInt InputDemandedBits = APInt::getLowBitsSet(BitWidth, EBits);
1890 // If the sign extended bits are demanded, we know that the sign
1892 InSignBit = InSignBit.zext(BitWidth);
1893 if (NewBits.getBoolValue())
1894 InputDemandedBits |= InSignBit;
1896 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1897 KnownOne &= InputDemandedBits;
1898 KnownZero &= InputDemandedBits;
1899 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1901 // If the sign bit of the input is known set or clear, then we know the
1902 // top bits of the result.
1903 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1904 KnownZero |= NewBits;
1905 KnownOne &= ~NewBits;
1906 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1907 KnownOne |= NewBits;
1908 KnownZero &= ~NewBits;
1909 } else { // Input sign bit unknown
1910 KnownZero &= ~NewBits;
1911 KnownOne &= ~NewBits;
1916 case ISD::CTTZ_ZERO_UNDEF:
1918 case ISD::CTLZ_ZERO_UNDEF:
1920 unsigned LowBits = Log2_32(BitWidth)+1;
1921 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1922 KnownOne.clearAllBits();
1926 LoadSDNode *LD = cast<LoadSDNode>(Op);
1927 if (ISD::isZEXTLoad(Op.getNode())) {
1928 EVT VT = LD->getMemoryVT();
1929 unsigned MemBits = VT.getScalarType().getSizeInBits();
1930 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits);
1931 } else if (const MDNode *Ranges = LD->getRanges()) {
1932 computeMaskedBitsLoad(*Ranges, KnownZero);
1933 } else if (ISD::isEXTLoad(Op.getNode())) {
1934 TLI.computeMaskedBitsForAnyExtend(Op, KnownZero, KnownOne, *this, Depth);
1938 case ISD::ZERO_EXTEND: {
1939 EVT InVT = Op.getOperand(0).getValueType();
1940 unsigned InBits = InVT.getScalarType().getSizeInBits();
1941 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
1942 KnownZero = KnownZero.trunc(InBits);
1943 KnownOne = KnownOne.trunc(InBits);
1944 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1945 KnownZero = KnownZero.zext(BitWidth);
1946 KnownOne = KnownOne.zext(BitWidth);
1947 KnownZero |= NewBits;
1950 case ISD::SIGN_EXTEND: {
1951 EVT InVT = Op.getOperand(0).getValueType();
1952 unsigned InBits = InVT.getScalarType().getSizeInBits();
1953 APInt InSignBit = APInt::getSignBit(InBits);
1954 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
1956 KnownZero = KnownZero.trunc(InBits);
1957 KnownOne = KnownOne.trunc(InBits);
1958 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1960 // Note if the sign bit is known to be zero or one.
1961 bool SignBitKnownZero = KnownZero.isNegative();
1962 bool SignBitKnownOne = KnownOne.isNegative();
1963 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1964 "Sign bit can't be known to be both zero and one!");
1966 KnownZero = KnownZero.zext(BitWidth);
1967 KnownOne = KnownOne.zext(BitWidth);
1969 // If the sign bit is known zero or one, the top bits match.
1970 if (SignBitKnownZero)
1971 KnownZero |= NewBits;
1972 else if (SignBitKnownOne)
1973 KnownOne |= NewBits;
1976 case ISD::ANY_EXTEND: {
1977 TLI.computeMaskedBitsForAnyExtend(Op, KnownZero, KnownOne, *this, Depth);
1980 case ISD::TRUNCATE: {
1981 EVT InVT = Op.getOperand(0).getValueType();
1982 unsigned InBits = InVT.getScalarType().getSizeInBits();
1983 KnownZero = KnownZero.zext(InBits);
1984 KnownOne = KnownOne.zext(InBits);
1985 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1986 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1987 KnownZero = KnownZero.trunc(BitWidth);
1988 KnownOne = KnownOne.trunc(BitWidth);
1991 case ISD::AssertZext: {
1992 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1993 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1994 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1995 KnownZero |= (~InMask);
1996 KnownOne &= (~KnownZero);
2000 // All bits are zero except the low bit.
2001 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
2005 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
2006 // We know that the top bits of C-X are clear if X contains less bits
2007 // than C (i.e. no wrap-around can happen). For example, 20-X is
2008 // positive if we can prove that X is >= 0 and < 16.
2009 if (CLHS->getAPIntValue().isNonNegative()) {
2010 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
2011 // NLZ can't be BitWidth with no sign bit
2012 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
2013 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2015 // If all of the MaskV bits are known to be zero, then we know the
2016 // output top bits are zero, because we now know that the output is
2018 if ((KnownZero2 & MaskV) == MaskV) {
2019 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
2020 // Top bits known zero.
2021 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2);
2029 // Output known-0 bits are known if clear or set in both the low clear bits
2030 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
2031 // low 3 bits clear.
2032 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2033 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
2034 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
2036 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2037 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
2038 KnownZeroOut = std::min(KnownZeroOut,
2039 KnownZero2.countTrailingOnes());
2041 if (Op.getOpcode() == ISD::ADD) {
2042 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
2046 // With ADDE, a carry bit may be added in, so we can only use this
2047 // information if we know (at least) that the low two bits are clear. We
2048 // then return to the caller that the low bit is unknown but that other bits
2050 if (KnownZeroOut >= 2) // ADDE
2051 KnownZero |= APInt::getBitsSet(BitWidth, 1, KnownZeroOut);
2055 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2056 const APInt &RA = Rem->getAPIntValue().abs();
2057 if (RA.isPowerOf2()) {
2058 APInt LowBits = RA - 1;
2059 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
2060 ComputeMaskedBits(Op.getOperand(0), KnownZero2,KnownOne2,Depth+1);
2062 // The low bits of the first operand are unchanged by the srem.
2063 KnownZero = KnownZero2 & LowBits;
2064 KnownOne = KnownOne2 & LowBits;
2066 // If the first operand is non-negative or has all low bits zero, then
2067 // the upper bits are all zero.
2068 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
2069 KnownZero |= ~LowBits;
2071 // If the first operand is negative and not all low bits are zero, then
2072 // the upper bits are all one.
2073 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0))
2074 KnownOne |= ~LowBits;
2075 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2080 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2081 const APInt &RA = Rem->getAPIntValue();
2082 if (RA.isPowerOf2()) {
2083 APInt LowBits = (RA - 1);
2084 KnownZero |= ~LowBits;
2085 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne,Depth+1);
2086 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2091 // Since the result is less than or equal to either operand, any leading
2092 // zero bits in either operand must also exist in the result.
2093 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2094 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2096 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
2097 KnownZero2.countLeadingOnes());
2098 KnownOne.clearAllBits();
2099 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders);
2102 case ISD::FrameIndex:
2103 case ISD::TargetFrameIndex:
2104 if (unsigned Align = InferPtrAlignment(Op)) {
2105 // The low bits are known zero if the pointer is aligned.
2106 KnownZero = APInt::getLowBitsSet(BitWidth, Log2_32(Align));
2112 if (Op.getOpcode() < ISD::BUILTIN_OP_END)
2115 case ISD::INTRINSIC_WO_CHAIN:
2116 case ISD::INTRINSIC_W_CHAIN:
2117 case ISD::INTRINSIC_VOID:
2118 // Allow the target to implement this method for its nodes.
2119 TLI.computeMaskedBitsForTargetNode(Op, KnownZero, KnownOne, *this, Depth);
2124 /// ComputeNumSignBits - Return the number of times the sign bit of the
2125 /// register is replicated into the other bits. We know that at least 1 bit
2126 /// is always equal to the sign bit (itself), but other cases can give us
2127 /// information. For example, immediately after an "SRA X, 2", we know that
2128 /// the top 3 bits are all equal to each other, so we return 3.
2129 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
2130 EVT VT = Op.getValueType();
2131 assert(VT.isInteger() && "Invalid VT!");
2132 unsigned VTBits = VT.getScalarType().getSizeInBits();
2134 unsigned FirstAnswer = 1;
2137 return 1; // Limit search depth.
2139 switch (Op.getOpcode()) {
2141 case ISD::AssertSext:
2142 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2143 return VTBits-Tmp+1;
2144 case ISD::AssertZext:
2145 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2148 case ISD::Constant: {
2149 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2150 return Val.getNumSignBits();
2153 case ISD::SIGN_EXTEND:
2154 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
2155 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2157 case ISD::SIGN_EXTEND_INREG:
2158 // Max of the input and what this extends.
2160 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits();
2163 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2164 return std::max(Tmp, Tmp2);
2167 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2168 // SRA X, C -> adds C sign bits.
2169 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2170 Tmp += C->getZExtValue();
2171 if (Tmp > VTBits) Tmp = VTBits;
2175 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2176 // shl destroys sign bits.
2177 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2178 if (C->getZExtValue() >= VTBits || // Bad shift.
2179 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
2180 return Tmp - C->getZExtValue();
2185 case ISD::XOR: // NOT is handled here.
2186 // Logical binary ops preserve the number of sign bits at the worst.
2187 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2189 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2190 FirstAnswer = std::min(Tmp, Tmp2);
2191 // We computed what we know about the sign bits as our first
2192 // answer. Now proceed to the generic code that uses
2193 // ComputeMaskedBits, and pick whichever answer is better.
2198 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2199 if (Tmp == 1) return 1; // Early out.
2200 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2201 return std::min(Tmp, Tmp2);
2209 if (Op.getResNo() != 1)
2211 // The boolean result conforms to getBooleanContents. Fall through.
2213 // If setcc returns 0/-1, all bits are sign bits.
2214 if (TLI.getBooleanContents(Op.getValueType().isVector()) ==
2215 TargetLowering::ZeroOrNegativeOneBooleanContent)
2220 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2221 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2223 // Handle rotate right by N like a rotate left by 32-N.
2224 if (Op.getOpcode() == ISD::ROTR)
2225 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2227 // If we aren't rotating out all of the known-in sign bits, return the
2228 // number that are left. This handles rotl(sext(x), 1) for example.
2229 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2230 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2234 // Add can have at most one carry bit. Thus we know that the output
2235 // is, at worst, one more bit than the inputs.
2236 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2237 if (Tmp == 1) return 1; // Early out.
2239 // Special case decrementing a value (ADD X, -1):
2240 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2241 if (CRHS->isAllOnesValue()) {
2242 APInt KnownZero, KnownOne;
2243 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2245 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2247 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue())
2250 // If we are subtracting one from a positive number, there is no carry
2251 // out of the result.
2252 if (KnownZero.isNegative())
2256 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2257 if (Tmp2 == 1) return 1;
2258 return std::min(Tmp, Tmp2)-1;
2261 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2262 if (Tmp2 == 1) return 1;
2265 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2266 if (CLHS->isNullValue()) {
2267 APInt KnownZero, KnownOne;
2268 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
2269 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2271 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue())
2274 // If the input is known to be positive (the sign bit is known clear),
2275 // the output of the NEG has the same number of sign bits as the input.
2276 if (KnownZero.isNegative())
2279 // Otherwise, we treat this like a SUB.
2282 // Sub can have at most one carry bit. Thus we know that the output
2283 // is, at worst, one more bit than the inputs.
2284 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2285 if (Tmp == 1) return 1; // Early out.
2286 return std::min(Tmp, Tmp2)-1;
2288 // FIXME: it's tricky to do anything useful for this, but it is an important
2289 // case for targets like X86.
2293 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2294 if (LoadSDNode *LD = dyn_cast<LoadSDNode>(Op)) {
2295 unsigned ExtType = LD->getExtensionType();
2298 case ISD::SEXTLOAD: // '17' bits known
2299 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2300 return VTBits-Tmp+1;
2301 case ISD::ZEXTLOAD: // '16' bits known
2302 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2307 // Allow the target to implement this method for its nodes.
2308 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2309 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2310 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2311 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2312 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2313 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2316 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2317 // use this information.
2318 APInt KnownZero, KnownOne;
2319 ComputeMaskedBits(Op, KnownZero, KnownOne, Depth);
2322 if (KnownZero.isNegative()) { // sign bit is 0
2324 } else if (KnownOne.isNegative()) { // sign bit is 1;
2331 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2332 // the number of identical bits in the top of the input value.
2334 Mask <<= Mask.getBitWidth()-VTBits;
2335 // Return # leading zeros. We use 'min' here in case Val was zero before
2336 // shifting. We don't want to return '64' as for an i32 "0".
2337 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2340 /// isBaseWithConstantOffset - Return true if the specified operand is an
2341 /// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an
2342 /// ISD::OR with a ConstantSDNode that is guaranteed to have the same
2343 /// semantics as an ADD. This handles the equivalence:
2344 /// X|Cst == X+Cst iff X&Cst = 0.
2345 bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const {
2346 if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) ||
2347 !isa<ConstantSDNode>(Op.getOperand(1)))
2350 if (Op.getOpcode() == ISD::OR &&
2351 !MaskedValueIsZero(Op.getOperand(0),
2352 cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue()))
2359 bool SelectionDAG::isKnownNeverNaN(SDValue Op) const {
2360 // If we're told that NaNs won't happen, assume they won't.
2361 if (getTarget().Options.NoNaNsFPMath)
2364 // If the value is a constant, we can obviously see if it is a NaN or not.
2365 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2366 return !C->getValueAPF().isNaN();
2368 // TODO: Recognize more cases here.
2373 bool SelectionDAG::isKnownNeverZero(SDValue Op) const {
2374 // If the value is a constant, we can obviously see if it is a zero or not.
2375 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2376 return !C->isZero();
2378 // TODO: Recognize more cases here.
2379 switch (Op.getOpcode()) {
2382 if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2383 return !C->isNullValue();
2390 bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const {
2391 // Check the obvious case.
2392 if (A == B) return true;
2394 // For for negative and positive zero.
2395 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A))
2396 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B))
2397 if (CA->isZero() && CB->isZero()) return true;
2399 // Otherwise they may not be equal.
2403 /// getNode - Gets or creates the specified node.
2405 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) {
2406 FoldingSetNodeID ID;
2407 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2409 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2410 return SDValue(E, 0);
2412 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT));
2413 CSEMap.InsertNode(N, IP);
2415 AllNodes.push_back(N);
2419 return SDValue(N, 0);
2422 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
2423 EVT VT, SDValue Operand) {
2424 // Constant fold unary operations with an integer constant operand.
2425 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2426 const APInt &Val = C->getAPIntValue();
2429 case ISD::SIGN_EXTEND:
2430 return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), VT);
2431 case ISD::ANY_EXTEND:
2432 case ISD::ZERO_EXTEND:
2434 return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), VT);
2435 case ISD::UINT_TO_FP:
2436 case ISD::SINT_TO_FP: {
2437 APFloat apf(APInt::getNullValue(VT.getSizeInBits()));
2438 (void)apf.convertFromAPInt(Val,
2439 Opcode==ISD::SINT_TO_FP,
2440 APFloat::rmNearestTiesToEven);
2441 return getConstantFP(apf, VT);
2444 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2445 return getConstantFP(APFloat(Val), VT);
2446 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2447 return getConstantFP(APFloat(Val), VT);
2450 return getConstant(Val.byteSwap(), VT);
2452 return getConstant(Val.countPopulation(), VT);
2454 case ISD::CTLZ_ZERO_UNDEF:
2455 return getConstant(Val.countLeadingZeros(), VT);
2457 case ISD::CTTZ_ZERO_UNDEF:
2458 return getConstant(Val.countTrailingZeros(), VT);
2462 // Constant fold unary operations with a floating point constant operand.
2463 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2464 APFloat V = C->getValueAPF(); // make copy
2468 return getConstantFP(V, VT);
2471 return getConstantFP(V, VT);
2473 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardPositive);
2474 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2475 return getConstantFP(V, VT);
2479 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardZero);
2480 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2481 return getConstantFP(V, VT);
2485 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardNegative);
2486 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2487 return getConstantFP(V, VT);
2490 case ISD::FP_EXTEND: {
2492 // This can return overflow, underflow, or inexact; we don't care.
2493 // FIXME need to be more flexible about rounding mode.
2494 (void)V.convert(*EVTToAPFloatSemantics(VT),
2495 APFloat::rmNearestTiesToEven, &ignored);
2496 return getConstantFP(V, VT);
2498 case ISD::FP_TO_SINT:
2499 case ISD::FP_TO_UINT: {
2502 assert(integerPartWidth >= 64);
2503 // FIXME need to be more flexible about rounding mode.
2504 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2505 Opcode==ISD::FP_TO_SINT,
2506 APFloat::rmTowardZero, &ignored);
2507 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2509 APInt api(VT.getSizeInBits(), x);
2510 return getConstant(api, VT);
2513 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2514 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2515 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2516 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2521 unsigned OpOpcode = Operand.getNode()->getOpcode();
2523 case ISD::TokenFactor:
2524 case ISD::MERGE_VALUES:
2525 case ISD::CONCAT_VECTORS:
2526 return Operand; // Factor, merge or concat of one node? No need.
2527 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
2528 case ISD::FP_EXTEND:
2529 assert(VT.isFloatingPoint() &&
2530 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2531 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2532 assert((!VT.isVector() ||
2533 VT.getVectorNumElements() ==
2534 Operand.getValueType().getVectorNumElements()) &&
2535 "Vector element count mismatch!");
2536 if (Operand.getOpcode() == ISD::UNDEF)
2537 return getUNDEF(VT);
2539 case ISD::SIGN_EXTEND:
2540 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2541 "Invalid SIGN_EXTEND!");
2542 if (Operand.getValueType() == VT) return Operand; // noop extension
2543 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2544 "Invalid sext node, dst < src!");
2545 assert((!VT.isVector() ||
2546 VT.getVectorNumElements() ==
2547 Operand.getValueType().getVectorNumElements()) &&
2548 "Vector element count mismatch!");
2549 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2550 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2551 else if (OpOpcode == ISD::UNDEF)
2552 // sext(undef) = 0, because the top bits will all be the same.
2553 return getConstant(0, VT);
2555 case ISD::ZERO_EXTEND:
2556 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2557 "Invalid ZERO_EXTEND!");
2558 if (Operand.getValueType() == VT) return Operand; // noop extension
2559 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2560 "Invalid zext node, dst < src!");
2561 assert((!VT.isVector() ||
2562 VT.getVectorNumElements() ==
2563 Operand.getValueType().getVectorNumElements()) &&
2564 "Vector element count mismatch!");
2565 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2566 return getNode(ISD::ZERO_EXTEND, DL, VT,
2567 Operand.getNode()->getOperand(0));
2568 else if (OpOpcode == ISD::UNDEF)
2569 // zext(undef) = 0, because the top bits will be zero.
2570 return getConstant(0, VT);
2572 case ISD::ANY_EXTEND:
2573 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2574 "Invalid ANY_EXTEND!");
2575 if (Operand.getValueType() == VT) return Operand; // noop extension
2576 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2577 "Invalid anyext node, dst < src!");
2578 assert((!VT.isVector() ||
2579 VT.getVectorNumElements() ==
2580 Operand.getValueType().getVectorNumElements()) &&
2581 "Vector element count mismatch!");
2583 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2584 OpOpcode == ISD::ANY_EXTEND)
2585 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2586 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2587 else if (OpOpcode == ISD::UNDEF)
2588 return getUNDEF(VT);
2590 // (ext (trunx x)) -> x
2591 if (OpOpcode == ISD::TRUNCATE) {
2592 SDValue OpOp = Operand.getNode()->getOperand(0);
2593 if (OpOp.getValueType() == VT)
2598 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2599 "Invalid TRUNCATE!");
2600 if (Operand.getValueType() == VT) return Operand; // noop truncate
2601 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) &&
2602 "Invalid truncate node, src < dst!");
2603 assert((!VT.isVector() ||
2604 VT.getVectorNumElements() ==
2605 Operand.getValueType().getVectorNumElements()) &&
2606 "Vector element count mismatch!");
2607 if (OpOpcode == ISD::TRUNCATE)
2608 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2609 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2610 OpOpcode == ISD::ANY_EXTEND) {
2611 // If the source is smaller than the dest, we still need an extend.
2612 if (Operand.getNode()->getOperand(0).getValueType().getScalarType()
2613 .bitsLT(VT.getScalarType()))
2614 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2615 if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2616 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2617 return Operand.getNode()->getOperand(0);
2619 if (OpOpcode == ISD::UNDEF)
2620 return getUNDEF(VT);
2623 // Basic sanity checking.
2624 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2625 && "Cannot BITCAST between types of different sizes!");
2626 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2627 if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x)
2628 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0));
2629 if (OpOpcode == ISD::UNDEF)
2630 return getUNDEF(VT);
2632 case ISD::SCALAR_TO_VECTOR:
2633 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2634 (VT.getVectorElementType() == Operand.getValueType() ||
2635 (VT.getVectorElementType().isInteger() &&
2636 Operand.getValueType().isInteger() &&
2637 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
2638 "Illegal SCALAR_TO_VECTOR node!");
2639 if (OpOpcode == ISD::UNDEF)
2640 return getUNDEF(VT);
2641 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2642 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2643 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2644 Operand.getConstantOperandVal(1) == 0 &&
2645 Operand.getOperand(0).getValueType() == VT)
2646 return Operand.getOperand(0);
2649 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
2650 if (getTarget().Options.UnsafeFPMath && OpOpcode == ISD::FSUB)
2651 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
2652 Operand.getNode()->getOperand(0));
2653 if (OpOpcode == ISD::FNEG) // --X -> X
2654 return Operand.getNode()->getOperand(0);
2657 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2658 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
2663 SDVTList VTs = getVTList(VT);
2664 if (VT != MVT::Glue) { // Don't CSE flag producing nodes
2665 FoldingSetNodeID ID;
2666 SDValue Ops[1] = { Operand };
2667 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2669 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2670 return SDValue(E, 0);
2672 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2673 CSEMap.InsertNode(N, IP);
2675 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2678 AllNodes.push_back(N);
2682 return SDValue(N, 0);
2685 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2687 ConstantSDNode *Cst1,
2688 ConstantSDNode *Cst2) {
2689 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
2692 case ISD::ADD: return getConstant(C1 + C2, VT);
2693 case ISD::SUB: return getConstant(C1 - C2, VT);
2694 case ISD::MUL: return getConstant(C1 * C2, VT);
2696 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2699 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2702 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2705 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2707 case ISD::AND: return getConstant(C1 & C2, VT);
2708 case ISD::OR: return getConstant(C1 | C2, VT);
2709 case ISD::XOR: return getConstant(C1 ^ C2, VT);
2710 case ISD::SHL: return getConstant(C1 << C2, VT);
2711 case ISD::SRL: return getConstant(C1.lshr(C2), VT);
2712 case ISD::SRA: return getConstant(C1.ashr(C2), VT);
2713 case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2714 case ISD::ROTR: return getConstant(C1.rotr(C2), VT);
2721 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2722 SDValue N1, SDValue N2) {
2723 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2724 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2727 case ISD::TokenFactor:
2728 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2729 N2.getValueType() == MVT::Other && "Invalid token factor!");
2730 // Fold trivial token factors.
2731 if (N1.getOpcode() == ISD::EntryToken) return N2;
2732 if (N2.getOpcode() == ISD::EntryToken) return N1;
2733 if (N1 == N2) return N1;
2735 case ISD::CONCAT_VECTORS:
2736 // Concat of UNDEFs is UNDEF.
2737 if (N1.getOpcode() == ISD::UNDEF &&
2738 N2.getOpcode() == ISD::UNDEF)
2739 return getUNDEF(VT);
2741 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2742 // one big BUILD_VECTOR.
2743 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2744 N2.getOpcode() == ISD::BUILD_VECTOR) {
2745 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
2746 N1.getNode()->op_end());
2747 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
2748 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2752 assert(VT.isInteger() && "This operator does not apply to FP types!");
2753 assert(N1.getValueType() == N2.getValueType() &&
2754 N1.getValueType() == VT && "Binary operator types must match!");
2755 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2756 // worth handling here.
2757 if (N2C && N2C->isNullValue())
2759 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2766 assert(VT.isInteger() && "This operator does not apply to FP types!");
2767 assert(N1.getValueType() == N2.getValueType() &&
2768 N1.getValueType() == VT && "Binary operator types must match!");
2769 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2770 // it's worth handling here.
2771 if (N2C && N2C->isNullValue())
2781 assert(VT.isInteger() && "This operator does not apply to FP types!");
2782 assert(N1.getValueType() == N2.getValueType() &&
2783 N1.getValueType() == VT && "Binary operator types must match!");
2790 if (getTarget().Options.UnsafeFPMath) {
2791 if (Opcode == ISD::FADD) {
2793 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
2794 if (CFP->getValueAPF().isZero())
2797 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2798 if (CFP->getValueAPF().isZero())
2800 } else if (Opcode == ISD::FSUB) {
2802 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2803 if (CFP->getValueAPF().isZero())
2805 } else if (Opcode == ISD::FMUL) {
2806 ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1);
2809 // If the first operand isn't the constant, try the second
2811 CFP = dyn_cast<ConstantFPSDNode>(N2);
2818 return SDValue(CFP,0);
2820 if (CFP->isExactlyValue(1.0))
2825 assert(VT.isFloatingPoint() && "This operator only applies to FP types!");
2826 assert(N1.getValueType() == N2.getValueType() &&
2827 N1.getValueType() == VT && "Binary operator types must match!");
2829 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2830 assert(N1.getValueType() == VT &&
2831 N1.getValueType().isFloatingPoint() &&
2832 N2.getValueType().isFloatingPoint() &&
2833 "Invalid FCOPYSIGN!");
2840 assert(VT == N1.getValueType() &&
2841 "Shift operators return type must be the same as their first arg");
2842 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2843 "Shifts only work on integers");
2844 // Verify that the shift amount VT is bit enough to hold valid shift
2845 // amounts. This catches things like trying to shift an i1024 value by an
2846 // i8, which is easy to fall into in generic code that uses
2847 // TLI.getShiftAmount().
2848 assert(N2.getValueType().getSizeInBits() >=
2849 Log2_32_Ceil(N1.getValueType().getSizeInBits()) &&
2850 "Invalid use of small shift amount with oversized value!");
2852 // Always fold shifts of i1 values so the code generator doesn't need to
2853 // handle them. Since we know the size of the shift has to be less than the
2854 // size of the value, the shift/rotate count is guaranteed to be zero.
2857 if (N2C && N2C->isNullValue())
2860 case ISD::FP_ROUND_INREG: {
2861 EVT EVT = cast<VTSDNode>(N2)->getVT();
2862 assert(VT == N1.getValueType() && "Not an inreg round!");
2863 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2864 "Cannot FP_ROUND_INREG integer types");
2865 assert(EVT.isVector() == VT.isVector() &&
2866 "FP_ROUND_INREG type should be vector iff the operand "
2868 assert((!EVT.isVector() ||
2869 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2870 "Vector element counts must match in FP_ROUND_INREG");
2871 assert(EVT.bitsLE(VT) && "Not rounding down!");
2873 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2877 assert(VT.isFloatingPoint() &&
2878 N1.getValueType().isFloatingPoint() &&
2879 VT.bitsLE(N1.getValueType()) &&
2880 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2881 if (N1.getValueType() == VT) return N1; // noop conversion.
2883 case ISD::AssertSext:
2884 case ISD::AssertZext: {
2885 EVT EVT = cast<VTSDNode>(N2)->getVT();
2886 assert(VT == N1.getValueType() && "Not an inreg extend!");
2887 assert(VT.isInteger() && EVT.isInteger() &&
2888 "Cannot *_EXTEND_INREG FP types");
2889 assert(!EVT.isVector() &&
2890 "AssertSExt/AssertZExt type should be the vector element type "
2891 "rather than the vector type!");
2892 assert(EVT.bitsLE(VT) && "Not extending!");
2893 if (VT == EVT) return N1; // noop assertion.
2896 case ISD::SIGN_EXTEND_INREG: {
2897 EVT EVT = cast<VTSDNode>(N2)->getVT();
2898 assert(VT == N1.getValueType() && "Not an inreg extend!");
2899 assert(VT.isInteger() && EVT.isInteger() &&
2900 "Cannot *_EXTEND_INREG FP types");
2901 assert(EVT.isVector() == VT.isVector() &&
2902 "SIGN_EXTEND_INREG type should be vector iff the operand "
2904 assert((!EVT.isVector() ||
2905 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2906 "Vector element counts must match in SIGN_EXTEND_INREG");
2907 assert(EVT.bitsLE(VT) && "Not extending!");
2908 if (EVT == VT) return N1; // Not actually extending
2911 APInt Val = N1C->getAPIntValue();
2912 unsigned FromBits = EVT.getScalarType().getSizeInBits();
2913 Val <<= Val.getBitWidth()-FromBits;
2914 Val = Val.ashr(Val.getBitWidth()-FromBits);
2915 return getConstant(Val, VT);
2919 case ISD::EXTRACT_VECTOR_ELT:
2920 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2921 if (N1.getOpcode() == ISD::UNDEF)
2922 return getUNDEF(VT);
2924 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2925 // expanding copies of large vectors from registers.
2927 N1.getOpcode() == ISD::CONCAT_VECTORS &&
2928 N1.getNumOperands() > 0) {
2930 N1.getOperand(0).getValueType().getVectorNumElements();
2931 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
2932 N1.getOperand(N2C->getZExtValue() / Factor),
2933 getConstant(N2C->getZExtValue() % Factor,
2934 N2.getValueType()));
2937 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2938 // expanding large vector constants.
2939 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
2940 SDValue Elt = N1.getOperand(N2C->getZExtValue());
2942 if (VT != Elt.getValueType())
2943 // If the vector element type is not legal, the BUILD_VECTOR operands
2944 // are promoted and implicitly truncated, and the result implicitly
2945 // extended. Make that explicit here.
2946 Elt = getAnyExtOrTrunc(Elt, DL, VT);
2951 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2952 // operations are lowered to scalars.
2953 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2954 // If the indices are the same, return the inserted element else
2955 // if the indices are known different, extract the element from
2956 // the original vector.
2957 SDValue N1Op2 = N1.getOperand(2);
2958 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode());
2960 if (N1Op2C && N2C) {
2961 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) {
2962 if (VT == N1.getOperand(1).getValueType())
2963 return N1.getOperand(1);
2965 return getSExtOrTrunc(N1.getOperand(1), DL, VT);
2968 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
2972 case ISD::EXTRACT_ELEMENT:
2973 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
2974 assert(!N1.getValueType().isVector() && !VT.isVector() &&
2975 (N1.getValueType().isInteger() == VT.isInteger()) &&
2976 N1.getValueType() != VT &&
2977 "Wrong types for EXTRACT_ELEMENT!");
2979 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2980 // 64-bit integers into 32-bit parts. Instead of building the extract of
2981 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2982 if (N1.getOpcode() == ISD::BUILD_PAIR)
2983 return N1.getOperand(N2C->getZExtValue());
2985 // EXTRACT_ELEMENT of a constant int is also very common.
2986 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2987 unsigned ElementSize = VT.getSizeInBits();
2988 unsigned Shift = ElementSize * N2C->getZExtValue();
2989 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2990 return getConstant(ShiftedVal.trunc(ElementSize), VT);
2993 case ISD::EXTRACT_SUBVECTOR: {
2995 if (VT.isSimple() && N1.getValueType().isSimple()) {
2996 assert(VT.isVector() && N1.getValueType().isVector() &&
2997 "Extract subvector VTs must be a vectors!");
2998 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() &&
2999 "Extract subvector VTs must have the same element type!");
3000 assert(VT.getSimpleVT() <= N1.getValueType().getSimpleVT() &&
3001 "Extract subvector must be from larger vector to smaller vector!");
3003 if (isa<ConstantSDNode>(Index.getNode())) {
3004 assert((VT.getVectorNumElements() +
3005 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
3006 <= N1.getValueType().getVectorNumElements())
3007 && "Extract subvector overflow!");
3010 // Trivial extraction.
3011 if (VT.getSimpleVT() == N1.getValueType().getSimpleVT())
3020 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
3021 if (SV.getNode()) return SV;
3022 } else { // Cannonicalize constant to RHS if commutative
3023 if (isCommutativeBinOp(Opcode)) {
3024 std::swap(N1C, N2C);
3030 // Constant fold FP operations.
3031 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
3032 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
3034 if (!N2CFP && isCommutativeBinOp(Opcode)) {
3035 // Cannonicalize constant to RHS if commutative
3036 std::swap(N1CFP, N2CFP);
3039 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
3040 APFloat::opStatus s;
3043 s = V1.add(V2, APFloat::rmNearestTiesToEven);
3044 if (s != APFloat::opInvalidOp)
3045 return getConstantFP(V1, VT);
3048 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
3049 if (s!=APFloat::opInvalidOp)
3050 return getConstantFP(V1, VT);
3053 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
3054 if (s!=APFloat::opInvalidOp)
3055 return getConstantFP(V1, VT);
3058 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
3059 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
3060 return getConstantFP(V1, VT);
3063 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
3064 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
3065 return getConstantFP(V1, VT);
3067 case ISD::FCOPYSIGN:
3069 return getConstantFP(V1, VT);
3074 if (Opcode == ISD::FP_ROUND) {
3075 APFloat V = N1CFP->getValueAPF(); // make copy
3077 // This can return overflow, underflow, or inexact; we don't care.
3078 // FIXME need to be more flexible about rounding mode.
3079 (void)V.convert(*EVTToAPFloatSemantics(VT),
3080 APFloat::rmNearestTiesToEven, &ignored);
3081 return getConstantFP(V, VT);
3085 // Canonicalize an UNDEF to the RHS, even over a constant.
3086 if (N1.getOpcode() == ISD::UNDEF) {
3087 if (isCommutativeBinOp(Opcode)) {
3091 case ISD::FP_ROUND_INREG:
3092 case ISD::SIGN_EXTEND_INREG:
3098 return N1; // fold op(undef, arg2) -> undef
3106 return getConstant(0, VT); // fold op(undef, arg2) -> 0
3107 // For vectors, we can't easily build an all zero vector, just return
3114 // Fold a bunch of operators when the RHS is undef.
3115 if (N2.getOpcode() == ISD::UNDEF) {
3118 if (N1.getOpcode() == ISD::UNDEF)
3119 // Handle undef ^ undef -> 0 special case. This is a common
3121 return getConstant(0, VT);
3131 return N2; // fold op(arg1, undef) -> undef
3137 if (getTarget().Options.UnsafeFPMath)
3145 return getConstant(0, VT); // fold op(arg1, undef) -> 0
3146 // For vectors, we can't easily build an all zero vector, just return
3151 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
3152 // For vectors, we can't easily build an all one vector, just return
3160 // Memoize this node if possible.
3162 SDVTList VTs = getVTList(VT);
3163 if (VT != MVT::Glue) {
3164 SDValue Ops[] = { N1, N2 };
3165 FoldingSetNodeID ID;
3166 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
3168 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3169 return SDValue(E, 0);
3171 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
3172 CSEMap.InsertNode(N, IP);
3174 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
3177 AllNodes.push_back(N);
3181 return SDValue(N, 0);
3184 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3185 SDValue N1, SDValue N2, SDValue N3) {
3186 // Perform various simplifications.
3187 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
3189 case ISD::CONCAT_VECTORS:
3190 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
3191 // one big BUILD_VECTOR.
3192 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
3193 N2.getOpcode() == ISD::BUILD_VECTOR &&
3194 N3.getOpcode() == ISD::BUILD_VECTOR) {
3195 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
3196 N1.getNode()->op_end());
3197 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
3198 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end());
3199 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
3203 // Use FoldSetCC to simplify SETCC's.
3204 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
3205 if (Simp.getNode()) return Simp;
3210 if (N1C->getZExtValue())
3211 return N2; // select true, X, Y -> X
3212 return N3; // select false, X, Y -> Y
3215 if (N2 == N3) return N2; // select C, X, X -> X
3217 case ISD::VECTOR_SHUFFLE:
3218 llvm_unreachable("should use getVectorShuffle constructor!");
3219 case ISD::INSERT_SUBVECTOR: {
3221 if (VT.isSimple() && N1.getValueType().isSimple()
3222 && N2.getValueType().isSimple()) {
3223 assert(VT.isVector() && N1.getValueType().isVector() &&
3224 N2.getValueType().isVector() &&
3225 "Insert subvector VTs must be a vectors");
3226 assert(VT == N1.getValueType() &&
3227 "Dest and insert subvector source types must match!");
3228 assert(N2.getValueType().getSimpleVT() <= N1.getValueType().getSimpleVT() &&
3229 "Insert subvector must be from smaller vector to larger vector!");
3230 if (isa<ConstantSDNode>(Index.getNode())) {
3231 assert((N2.getValueType().getVectorNumElements() +
3232 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
3233 <= VT.getVectorNumElements())
3234 && "Insert subvector overflow!");
3237 // Trivial insertion.
3238 if (VT.getSimpleVT() == N2.getValueType().getSimpleVT())
3244 // Fold bit_convert nodes from a type to themselves.
3245 if (N1.getValueType() == VT)
3250 // Memoize node if it doesn't produce a flag.
3252 SDVTList VTs = getVTList(VT);
3253 if (VT != MVT::Glue) {
3254 SDValue Ops[] = { N1, N2, N3 };
3255 FoldingSetNodeID ID;
3256 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3258 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3259 return SDValue(E, 0);
3261 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3262 CSEMap.InsertNode(N, IP);
3264 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3267 AllNodes.push_back(N);
3271 return SDValue(N, 0);
3274 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3275 SDValue N1, SDValue N2, SDValue N3,
3277 SDValue Ops[] = { N1, N2, N3, N4 };
3278 return getNode(Opcode, DL, VT, Ops, 4);
3281 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3282 SDValue N1, SDValue N2, SDValue N3,
3283 SDValue N4, SDValue N5) {
3284 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3285 return getNode(Opcode, DL, VT, Ops, 5);
3288 /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
3289 /// the incoming stack arguments to be loaded from the stack.
3290 SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) {
3291 SmallVector<SDValue, 8> ArgChains;
3293 // Include the original chain at the beginning of the list. When this is
3294 // used by target LowerCall hooks, this helps legalize find the
3295 // CALLSEQ_BEGIN node.
3296 ArgChains.push_back(Chain);
3298 // Add a chain value for each stack argument.
3299 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
3300 UE = getEntryNode().getNode()->use_end(); U != UE; ++U)
3301 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
3302 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
3303 if (FI->getIndex() < 0)
3304 ArgChains.push_back(SDValue(L, 1));
3306 // Build a tokenfactor for all the chains.
3307 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other,
3308 &ArgChains[0], ArgChains.size());
3311 /// SplatByte - Distribute ByteVal over NumBits bits.
3312 static APInt SplatByte(unsigned NumBits, uint8_t ByteVal) {
3313 APInt Val = APInt(NumBits, ByteVal);
3315 for (unsigned i = NumBits; i > 8; i >>= 1) {
3316 Val = (Val << Shift) | Val;
3322 /// getMemsetValue - Vectorized representation of the memset value
3324 static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
3326 assert(Value.getOpcode() != ISD::UNDEF);
3328 unsigned NumBits = VT.getScalarType().getSizeInBits();
3329 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
3330 APInt Val = SplatByte(NumBits, C->getZExtValue() & 255);
3332 return DAG.getConstant(Val, VT);
3333 return DAG.getConstantFP(APFloat(Val), VT);
3336 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value);
3338 // Use a multiplication with 0x010101... to extend the input to the
3340 APInt Magic = SplatByte(NumBits, 0x01);
3341 Value = DAG.getNode(ISD::MUL, dl, VT, Value, DAG.getConstant(Magic, VT));
3347 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
3348 /// used when a memcpy is turned into a memset when the source is a constant
3350 static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG,
3351 const TargetLowering &TLI, StringRef Str) {
3352 // Handle vector with all elements zero.
3355 return DAG.getConstant(0, VT);
3356 else if (VT == MVT::f32 || VT == MVT::f64)
3357 return DAG.getConstantFP(0.0, VT);
3358 else if (VT.isVector()) {
3359 unsigned NumElts = VT.getVectorNumElements();
3360 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
3361 return DAG.getNode(ISD::BITCAST, dl, VT,
3362 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(),
3365 llvm_unreachable("Expected type!");
3368 assert(!VT.isVector() && "Can't handle vector type here!");
3369 unsigned NumVTBytes = VT.getSizeInBits() / 8;
3370 unsigned NumBytes = std::min(NumVTBytes, unsigned(Str.size()));
3373 if (TLI.isLittleEndian()) {
3374 for (unsigned i = 0; i != NumBytes; ++i)
3375 Val |= (uint64_t)(unsigned char)Str[i] << i*8;
3377 for (unsigned i = 0; i != NumBytes; ++i)
3378 Val |= (uint64_t)(unsigned char)Str[i] << (NumVTBytes-i-1)*8;
3381 return DAG.getConstant(Val, VT);
3384 /// getMemBasePlusOffset - Returns base and offset node for the
3386 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
3387 SelectionDAG &DAG) {
3388 EVT VT = Base.getValueType();
3389 return DAG.getNode(ISD::ADD, Base.getDebugLoc(),
3390 VT, Base, DAG.getConstant(Offset, VT));
3393 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
3395 static bool isMemSrcFromString(SDValue Src, StringRef &Str) {
3396 unsigned SrcDelta = 0;
3397 GlobalAddressSDNode *G = NULL;
3398 if (Src.getOpcode() == ISD::GlobalAddress)
3399 G = cast<GlobalAddressSDNode>(Src);
3400 else if (Src.getOpcode() == ISD::ADD &&
3401 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
3402 Src.getOperand(1).getOpcode() == ISD::Constant) {
3403 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
3404 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
3409 return getConstantStringInfo(G->getGlobal(), Str, SrcDelta, false);
3412 /// FindOptimalMemOpLowering - Determines the optimial series memory ops
3413 /// to replace the memset / memcpy. Return true if the number of memory ops
3414 /// is below the threshold. It returns the types of the sequence of
3415 /// memory ops to perform memset / memcpy by reference.
3416 static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps,
3417 unsigned Limit, uint64_t Size,
3418 unsigned DstAlign, unsigned SrcAlign,
3422 const TargetLowering &TLI) {
3423 assert((SrcAlign == 0 || SrcAlign >= DstAlign) &&
3424 "Expecting memcpy / memset source to meet alignment requirement!");
3425 // If 'SrcAlign' is zero, that means the memory operation does not need to
3426 // load the value, i.e. memset or memcpy from constant string. Otherwise,
3427 // it's the inferred alignment of the source. 'DstAlign', on the other hand,
3428 // is the specified alignment of the memory operation. If it is zero, that
3429 // means it's possible to change the alignment of the destination.
3430 // 'MemcpyStrSrc' indicates whether the memcpy source is constant so it does
3431 // not need to be loaded.
3432 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign,
3433 IsZeroVal, MemcpyStrSrc,
3434 DAG.getMachineFunction());
3436 if (VT == MVT::Other) {
3437 if (DstAlign >= TLI.getDataLayout()->getPointerPrefAlignment() ||
3438 TLI.allowsUnalignedMemoryAccesses(VT)) {
3439 VT = TLI.getPointerTy();
3441 switch (DstAlign & 7) {
3442 case 0: VT = MVT::i64; break;
3443 case 4: VT = MVT::i32; break;
3444 case 2: VT = MVT::i16; break;
3445 default: VT = MVT::i8; break;
3450 while (!TLI.isTypeLegal(LVT))
3451 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1);
3452 assert(LVT.isInteger());
3458 unsigned NumMemOps = 0;
3460 unsigned VTSize = VT.getSizeInBits() / 8;
3461 while (VTSize > Size) {
3462 // For now, only use non-vector load / store's for the left-over pieces.
3463 if (VT.isVector() || VT.isFloatingPoint()) {
3465 while (!TLI.isTypeLegal(VT))
3466 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3467 VTSize = VT.getSizeInBits() / 8;
3469 // This can result in a type that is not legal on the target, e.g.
3470 // 1 or 2 bytes on PPC.
3471 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3476 if (++NumMemOps > Limit)
3478 MemOps.push_back(VT);
3485 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3486 SDValue Chain, SDValue Dst,
3487 SDValue Src, uint64_t Size,
3488 unsigned Align, bool isVol,
3490 MachinePointerInfo DstPtrInfo,
3491 MachinePointerInfo SrcPtrInfo) {
3492 // Turn a memcpy of undef to nop.
3493 if (Src.getOpcode() == ISD::UNDEF)
3496 // Expand memcpy to a series of load and store ops if the size operand falls
3497 // below a certain threshold.
3498 // TODO: In the AlwaysInline case, if the size is big then generate a loop
3499 // rather than maybe a humongous number of loads and stores.
3500 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3501 std::vector<EVT> MemOps;
3502 bool DstAlignCanChange = false;
3503 MachineFunction &MF = DAG.getMachineFunction();
3504 MachineFrameInfo *MFI = MF.getFrameInfo();
3506 MF.getFunction()->getFnAttributes().
3507 hasAttribute(Attributes::OptimizeForSize);
3508 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3509 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3510 DstAlignCanChange = true;
3511 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3512 if (Align > SrcAlign)
3515 bool CopyFromStr = isMemSrcFromString(Src, Str);
3516 bool isZeroStr = CopyFromStr && Str.empty();
3517 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(OptSize);
3519 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3520 (DstAlignCanChange ? 0 : Align),
3521 (isZeroStr ? 0 : SrcAlign),
3522 true, CopyFromStr, DAG, TLI))
3525 if (DstAlignCanChange) {
3526 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3527 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
3528 if (NewAlign > Align) {
3529 // Give the stack frame object a larger alignment if needed.
3530 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3531 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3536 SmallVector<SDValue, 8> OutChains;
3537 unsigned NumMemOps = MemOps.size();
3538 uint64_t SrcOff = 0, DstOff = 0;
3539 for (unsigned i = 0; i != NumMemOps; ++i) {
3541 unsigned VTSize = VT.getSizeInBits() / 8;
3542 SDValue Value, Store;
3545 (isZeroStr || (VT.isInteger() && !VT.isVector()))) {
3546 // It's unlikely a store of a vector immediate can be done in a single
3547 // instruction. It would require a load from a constantpool first.
3548 // We only handle zero vectors here.
3549 // FIXME: Handle other cases where store of vector immediate is done in
3550 // a single instruction.
3551 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str.substr(SrcOff));
3552 Store = DAG.getStore(Chain, dl, Value,
3553 getMemBasePlusOffset(Dst, DstOff, DAG),
3554 DstPtrInfo.getWithOffset(DstOff), isVol,
3557 // The type might not be legal for the target. This should only happen
3558 // if the type is smaller than a legal type, as on PPC, so the right
3559 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify
3560 // to Load/Store if NVT==VT.
3561 // FIXME does the case above also need this?
3562 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
3563 assert(NVT.bitsGE(VT));
3564 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain,
3565 getMemBasePlusOffset(Src, SrcOff, DAG),
3566 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false,
3567 MinAlign(SrcAlign, SrcOff));
3568 Store = DAG.getTruncStore(Chain, dl, Value,
3569 getMemBasePlusOffset(Dst, DstOff, DAG),
3570 DstPtrInfo.getWithOffset(DstOff), VT, isVol,
3573 OutChains.push_back(Store);
3578 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3579 &OutChains[0], OutChains.size());
3582 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3583 SDValue Chain, SDValue Dst,
3584 SDValue Src, uint64_t Size,
3585 unsigned Align, bool isVol,
3587 MachinePointerInfo DstPtrInfo,
3588 MachinePointerInfo SrcPtrInfo) {
3589 // Turn a memmove of undef to nop.
3590 if (Src.getOpcode() == ISD::UNDEF)
3593 // Expand memmove to a series of load and store ops if the size operand falls
3594 // below a certain threshold.
3595 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3596 std::vector<EVT> MemOps;
3597 bool DstAlignCanChange = false;
3598 MachineFunction &MF = DAG.getMachineFunction();
3599 MachineFrameInfo *MFI = MF.getFrameInfo();
3600 bool OptSize = MF.getFunction()->getFnAttributes().
3601 hasAttribute(Attributes::OptimizeForSize);
3602 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3603 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3604 DstAlignCanChange = true;
3605 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3606 if (Align > SrcAlign)
3608 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(OptSize);
3610 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3611 (DstAlignCanChange ? 0 : Align),
3612 SrcAlign, true, false, DAG, TLI))
3615 if (DstAlignCanChange) {
3616 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3617 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
3618 if (NewAlign > Align) {
3619 // Give the stack frame object a larger alignment if needed.
3620 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3621 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3626 uint64_t SrcOff = 0, DstOff = 0;
3627 SmallVector<SDValue, 8> LoadValues;
3628 SmallVector<SDValue, 8> LoadChains;
3629 SmallVector<SDValue, 8> OutChains;
3630 unsigned NumMemOps = MemOps.size();
3631 for (unsigned i = 0; i < NumMemOps; i++) {
3633 unsigned VTSize = VT.getSizeInBits() / 8;
3634 SDValue Value, Store;
3636 Value = DAG.getLoad(VT, dl, Chain,
3637 getMemBasePlusOffset(Src, SrcOff, DAG),
3638 SrcPtrInfo.getWithOffset(SrcOff), isVol,
3639 false, false, SrcAlign);
3640 LoadValues.push_back(Value);
3641 LoadChains.push_back(Value.getValue(1));
3644 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3645 &LoadChains[0], LoadChains.size());
3647 for (unsigned i = 0; i < NumMemOps; i++) {
3649 unsigned VTSize = VT.getSizeInBits() / 8;
3650 SDValue Value, Store;
3652 Store = DAG.getStore(Chain, dl, LoadValues[i],
3653 getMemBasePlusOffset(Dst, DstOff, DAG),
3654 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align);
3655 OutChains.push_back(Store);
3659 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3660 &OutChains[0], OutChains.size());
3663 static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl,
3664 SDValue Chain, SDValue Dst,
3665 SDValue Src, uint64_t Size,
3666 unsigned Align, bool isVol,
3667 MachinePointerInfo DstPtrInfo) {
3668 // Turn a memset of undef to nop.
3669 if (Src.getOpcode() == ISD::UNDEF)
3672 // Expand memset to a series of load/store ops if the size operand
3673 // falls below a certain threshold.
3674 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3675 std::vector<EVT> MemOps;
3676 bool DstAlignCanChange = false;
3677 MachineFunction &MF = DAG.getMachineFunction();
3678 MachineFrameInfo *MFI = MF.getFrameInfo();
3679 bool OptSize = MF.getFunction()->getFnAttributes().
3680 hasAttribute(Attributes::OptimizeForSize);
3681 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3682 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3683 DstAlignCanChange = true;
3685 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue();
3686 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(OptSize),
3687 Size, (DstAlignCanChange ? 0 : Align), 0,
3688 IsZeroVal, false, DAG, TLI))
3691 if (DstAlignCanChange) {
3692 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3693 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
3694 if (NewAlign > Align) {
3695 // Give the stack frame object a larger alignment if needed.
3696 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3697 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3702 SmallVector<SDValue, 8> OutChains;
3703 uint64_t DstOff = 0;
3704 unsigned NumMemOps = MemOps.size();
3706 // Find the largest store and generate the bit pattern for it.
3707 EVT LargestVT = MemOps[0];
3708 for (unsigned i = 1; i < NumMemOps; i++)
3709 if (MemOps[i].bitsGT(LargestVT))
3710 LargestVT = MemOps[i];
3711 SDValue MemSetValue = getMemsetValue(Src, LargestVT, DAG, dl);
3713 for (unsigned i = 0; i < NumMemOps; i++) {
3716 // If this store is smaller than the largest store see whether we can get
3717 // the smaller value for free with a truncate.
3718 SDValue Value = MemSetValue;
3719 if (VT.bitsLT(LargestVT)) {
3720 if (!LargestVT.isVector() && !VT.isVector() &&
3721 TLI.isTruncateFree(LargestVT, VT))
3722 Value = DAG.getNode(ISD::TRUNCATE, dl, VT, MemSetValue);
3724 Value = getMemsetValue(Src, VT, DAG, dl);
3726 assert(Value.getValueType() == VT && "Value with wrong type.");
3727 SDValue Store = DAG.getStore(Chain, dl, Value,
3728 getMemBasePlusOffset(Dst, DstOff, DAG),
3729 DstPtrInfo.getWithOffset(DstOff),
3730 isVol, false, Align);
3731 OutChains.push_back(Store);
3732 DstOff += VT.getSizeInBits() / 8;
3735 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3736 &OutChains[0], OutChains.size());
3739 SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst,
3740 SDValue Src, SDValue Size,
3741 unsigned Align, bool isVol, bool AlwaysInline,
3742 MachinePointerInfo DstPtrInfo,
3743 MachinePointerInfo SrcPtrInfo) {
3745 // Check to see if we should lower the memcpy to loads and stores first.
3746 // For cases within the target-specified limits, this is the best choice.
3747 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3749 // Memcpy with size zero? Just return the original chain.
3750 if (ConstantSize->isNullValue())
3753 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3754 ConstantSize->getZExtValue(),Align,
3755 isVol, false, DstPtrInfo, SrcPtrInfo);
3756 if (Result.getNode())
3760 // Then check to see if we should lower the memcpy with target-specific
3761 // code. If the target chooses to do this, this is the next best.
3763 TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align,
3764 isVol, AlwaysInline,
3765 DstPtrInfo, SrcPtrInfo);
3766 if (Result.getNode())
3769 // If we really need inline code and the target declined to provide it,
3770 // use a (potentially long) sequence of loads and stores.
3772 assert(ConstantSize && "AlwaysInline requires a constant size!");
3773 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3774 ConstantSize->getZExtValue(), Align, isVol,
3775 true, DstPtrInfo, SrcPtrInfo);
3778 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc
3779 // memcpy is not guaranteed to be safe. libc memcpys aren't required to
3780 // respect volatile, so they may do things like read or write memory
3781 // beyond the given memory regions. But fixing this isn't easy, and most
3782 // people don't care.
3784 // Emit a library call.
3785 TargetLowering::ArgListTy Args;
3786 TargetLowering::ArgListEntry Entry;
3787 Entry.Ty = TLI.getDataLayout()->getIntPtrType(*getContext());
3788 Entry.Node = Dst; Args.push_back(Entry);
3789 Entry.Node = Src; Args.push_back(Entry);
3790 Entry.Node = Size; Args.push_back(Entry);
3791 // FIXME: pass in DebugLoc
3793 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()),
3794 false, false, false, false, 0,
3795 TLI.getLibcallCallingConv(RTLIB::MEMCPY),
3796 /*isTailCall=*/false,
3797 /*doesNotReturn=*/false, /*isReturnValueUsed=*/false,
3798 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY),
3799 TLI.getPointerTy()),
3801 std::pair<SDValue,SDValue> CallResult = TLI.LowerCallTo(CLI);
3803 return CallResult.second;
3806 SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst,
3807 SDValue Src, SDValue Size,
3808 unsigned Align, bool isVol,
3809 MachinePointerInfo DstPtrInfo,
3810 MachinePointerInfo SrcPtrInfo) {
3812 // Check to see if we should lower the memmove to loads and stores first.
3813 // For cases within the target-specified limits, this is the best choice.
3814 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3816 // Memmove with size zero? Just return the original chain.
3817 if (ConstantSize->isNullValue())
3821 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
3822 ConstantSize->getZExtValue(), Align, isVol,
3823 false, DstPtrInfo, SrcPtrInfo);
3824 if (Result.getNode())
3828 // Then check to see if we should lower the memmove with target-specific
3829 // code. If the target chooses to do this, this is the next best.
3831 TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3832 DstPtrInfo, SrcPtrInfo);
3833 if (Result.getNode())
3836 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may
3837 // not be safe. See memcpy above for more details.
3839 // Emit a library call.
3840 TargetLowering::ArgListTy Args;
3841 TargetLowering::ArgListEntry Entry;
3842 Entry.Ty = TLI.getDataLayout()->getIntPtrType(*getContext());
3843 Entry.Node = Dst; Args.push_back(Entry);
3844 Entry.Node = Src; Args.push_back(Entry);
3845 Entry.Node = Size; Args.push_back(Entry);
3846 // FIXME: pass in DebugLoc
3848 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()),
3849 false, false, false, false, 0,
3850 TLI.getLibcallCallingConv(RTLIB::MEMMOVE),
3851 /*isTailCall=*/false,
3852 /*doesNotReturn=*/false, /*isReturnValueUsed=*/false,
3853 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE),
3854 TLI.getPointerTy()),
3856 std::pair<SDValue,SDValue> CallResult = TLI.LowerCallTo(CLI);
3858 return CallResult.second;
3861 SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst,
3862 SDValue Src, SDValue Size,
3863 unsigned Align, bool isVol,
3864 MachinePointerInfo DstPtrInfo) {
3866 // Check to see if we should lower the memset to stores first.
3867 // For cases within the target-specified limits, this is the best choice.
3868 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3870 // Memset with size zero? Just return the original chain.
3871 if (ConstantSize->isNullValue())
3875 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
3876 Align, isVol, DstPtrInfo);
3878 if (Result.getNode())
3882 // Then check to see if we should lower the memset with target-specific
3883 // code. If the target chooses to do this, this is the next best.
3885 TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3887 if (Result.getNode())
3890 // Emit a library call.
3891 Type *IntPtrTy = TLI.getDataLayout()->getIntPtrType(*getContext());
3892 TargetLowering::ArgListTy Args;
3893 TargetLowering::ArgListEntry Entry;
3894 Entry.Node = Dst; Entry.Ty = IntPtrTy;
3895 Args.push_back(Entry);
3896 // Extend or truncate the argument to be an i32 value for the call.
3897 if (Src.getValueType().bitsGT(MVT::i32))
3898 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
3900 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
3902 Entry.Ty = Type::getInt32Ty(*getContext());
3903 Entry.isSExt = true;
3904 Args.push_back(Entry);
3906 Entry.Ty = IntPtrTy;
3907 Entry.isSExt = false;
3908 Args.push_back(Entry);
3909 // FIXME: pass in DebugLoc
3911 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()),
3912 false, false, false, false, 0,
3913 TLI.getLibcallCallingConv(RTLIB::MEMSET),
3914 /*isTailCall=*/false,
3915 /*doesNotReturn*/false, /*isReturnValueUsed=*/false,
3916 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET),
3917 TLI.getPointerTy()),
3919 std::pair<SDValue,SDValue> CallResult = TLI.LowerCallTo(CLI);
3921 return CallResult.second;
3924 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3925 SDValue Chain, SDValue Ptr, SDValue Cmp,
3926 SDValue Swp, MachinePointerInfo PtrInfo,
3928 AtomicOrdering Ordering,
3929 SynchronizationScope SynchScope) {
3930 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3931 Alignment = getEVTAlignment(MemVT);
3933 MachineFunction &MF = getMachineFunction();
3935 // All atomics are load and store, except for ATMOIC_LOAD and ATOMIC_STORE.
3936 // For now, atomics are considered to be volatile always.
3937 // FIXME: Volatile isn't really correct; we should keep track of atomic
3938 // orderings in the memoperand.
3939 unsigned Flags = MachineMemOperand::MOVolatile;
3940 if (Opcode != ISD::ATOMIC_STORE)
3941 Flags |= MachineMemOperand::MOLoad;
3942 if (Opcode != ISD::ATOMIC_LOAD)
3943 Flags |= MachineMemOperand::MOStore;
3945 MachineMemOperand *MMO =
3946 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment);
3948 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO,
3949 Ordering, SynchScope);
3952 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3954 SDValue Ptr, SDValue Cmp,
3955 SDValue Swp, MachineMemOperand *MMO,
3956 AtomicOrdering Ordering,
3957 SynchronizationScope SynchScope) {
3958 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
3959 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3961 EVT VT = Cmp.getValueType();
3963 SDVTList VTs = getVTList(VT, MVT::Other);
3964 FoldingSetNodeID ID;
3965 ID.AddInteger(MemVT.getRawBits());
3966 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3967 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3968 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
3970 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3971 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3972 return SDValue(E, 0);
3974 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
3975 Ptr, Cmp, Swp, MMO, Ordering,
3977 CSEMap.InsertNode(N, IP);
3978 AllNodes.push_back(N);
3979 return SDValue(N, 0);
3982 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3984 SDValue Ptr, SDValue Val,
3985 const Value* PtrVal,
3987 AtomicOrdering Ordering,
3988 SynchronizationScope SynchScope) {
3989 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3990 Alignment = getEVTAlignment(MemVT);
3992 MachineFunction &MF = getMachineFunction();
3993 // An atomic store does not load. An atomic load does not store.
3994 // (An atomicrmw obviously both loads and stores.)
3995 // For now, atomics are considered to be volatile always, and they are
3997 // FIXME: Volatile isn't really correct; we should keep track of atomic
3998 // orderings in the memoperand.
3999 unsigned Flags = MachineMemOperand::MOVolatile;
4000 if (Opcode != ISD::ATOMIC_STORE)
4001 Flags |= MachineMemOperand::MOLoad;
4002 if (Opcode != ISD::ATOMIC_LOAD)
4003 Flags |= MachineMemOperand::MOStore;
4005 MachineMemOperand *MMO =
4006 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
4007 MemVT.getStoreSize(), Alignment);
4009 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO,
4010 Ordering, SynchScope);
4013 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
4015 SDValue Ptr, SDValue Val,
4016 MachineMemOperand *MMO,
4017 AtomicOrdering Ordering,
4018 SynchronizationScope SynchScope) {
4019 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
4020 Opcode == ISD::ATOMIC_LOAD_SUB ||
4021 Opcode == ISD::ATOMIC_LOAD_AND ||
4022 Opcode == ISD::ATOMIC_LOAD_OR ||
4023 Opcode == ISD::ATOMIC_LOAD_XOR ||
4024 Opcode == ISD::ATOMIC_LOAD_NAND ||
4025 Opcode == ISD::ATOMIC_LOAD_MIN ||
4026 Opcode == ISD::ATOMIC_LOAD_MAX ||
4027 Opcode == ISD::ATOMIC_LOAD_UMIN ||
4028 Opcode == ISD::ATOMIC_LOAD_UMAX ||
4029 Opcode == ISD::ATOMIC_SWAP ||
4030 Opcode == ISD::ATOMIC_STORE) &&
4031 "Invalid Atomic Op");
4033 EVT VT = Val.getValueType();
4035 SDVTList VTs = Opcode == ISD::ATOMIC_STORE ? getVTList(MVT::Other) :
4036 getVTList(VT, MVT::Other);
4037 FoldingSetNodeID ID;
4038 ID.AddInteger(MemVT.getRawBits());
4039 SDValue Ops[] = {Chain, Ptr, Val};
4040 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
4041 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4043 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4044 cast<AtomicSDNode>(E)->refineAlignment(MMO);
4045 return SDValue(E, 0);
4047 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
4049 Ordering, SynchScope);
4050 CSEMap.InsertNode(N, IP);
4051 AllNodes.push_back(N);
4052 return SDValue(N, 0);
4055 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
4056 EVT VT, SDValue Chain,
4058 const Value* PtrVal,
4060 AtomicOrdering Ordering,
4061 SynchronizationScope SynchScope) {
4062 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4063 Alignment = getEVTAlignment(MemVT);
4065 MachineFunction &MF = getMachineFunction();
4066 // An atomic store does not load. An atomic load does not store.
4067 // (An atomicrmw obviously both loads and stores.)
4068 // For now, atomics are considered to be volatile always, and they are
4070 // FIXME: Volatile isn't really correct; we should keep track of atomic
4071 // orderings in the memoperand.
4072 unsigned Flags = MachineMemOperand::MOVolatile;
4073 if (Opcode != ISD::ATOMIC_STORE)
4074 Flags |= MachineMemOperand::MOLoad;
4075 if (Opcode != ISD::ATOMIC_LOAD)
4076 Flags |= MachineMemOperand::MOStore;
4078 MachineMemOperand *MMO =
4079 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
4080 MemVT.getStoreSize(), Alignment);
4082 return getAtomic(Opcode, dl, MemVT, VT, Chain, Ptr, MMO,
4083 Ordering, SynchScope);
4086 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
4087 EVT VT, SDValue Chain,
4089 MachineMemOperand *MMO,
4090 AtomicOrdering Ordering,
4091 SynchronizationScope SynchScope) {
4092 assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op");
4094 SDVTList VTs = getVTList(VT, MVT::Other);
4095 FoldingSetNodeID ID;
4096 ID.AddInteger(MemVT.getRawBits());
4097 SDValue Ops[] = {Chain, Ptr};
4098 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
4099 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4101 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4102 cast<AtomicSDNode>(E)->refineAlignment(MMO);
4103 return SDValue(E, 0);
4105 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
4106 Ptr, MMO, Ordering, SynchScope);
4107 CSEMap.InsertNode(N, IP);
4108 AllNodes.push_back(N);
4109 return SDValue(N, 0);
4112 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
4113 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps,
4118 SmallVector<EVT, 4> VTs;
4119 VTs.reserve(NumOps);
4120 for (unsigned i = 0; i < NumOps; ++i)
4121 VTs.push_back(Ops[i].getValueType());
4122 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps),
4127 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl,
4128 const EVT *VTs, unsigned NumVTs,
4129 const SDValue *Ops, unsigned NumOps,
4130 EVT MemVT, MachinePointerInfo PtrInfo,
4131 unsigned Align, bool Vol,
4132 bool ReadMem, bool WriteMem) {
4133 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps,
4134 MemVT, PtrInfo, Align, Vol,
4139 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
4140 const SDValue *Ops, unsigned NumOps,
4141 EVT MemVT, MachinePointerInfo PtrInfo,
4142 unsigned Align, bool Vol,
4143 bool ReadMem, bool WriteMem) {
4144 if (Align == 0) // Ensure that codegen never sees alignment 0
4145 Align = getEVTAlignment(MemVT);
4147 MachineFunction &MF = getMachineFunction();
4150 Flags |= MachineMemOperand::MOStore;
4152 Flags |= MachineMemOperand::MOLoad;
4154 Flags |= MachineMemOperand::MOVolatile;
4155 MachineMemOperand *MMO =
4156 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Align);
4158 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO);
4162 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
4163 const SDValue *Ops, unsigned NumOps,
4164 EVT MemVT, MachineMemOperand *MMO) {
4165 assert((Opcode == ISD::INTRINSIC_VOID ||
4166 Opcode == ISD::INTRINSIC_W_CHAIN ||
4167 Opcode == ISD::PREFETCH ||
4168 Opcode == ISD::LIFETIME_START ||
4169 Opcode == ISD::LIFETIME_END ||
4170 (Opcode <= INT_MAX &&
4171 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) &&
4172 "Opcode is not a memory-accessing opcode!");
4174 // Memoize the node unless it returns a flag.
4175 MemIntrinsicSDNode *N;
4176 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
4177 FoldingSetNodeID ID;
4178 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4179 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4181 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4182 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO);
4183 return SDValue(E, 0);
4186 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
4188 CSEMap.InsertNode(N, IP);
4190 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
4193 AllNodes.push_back(N);
4194 return SDValue(N, 0);
4197 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4198 /// MachinePointerInfo record from it. This is particularly useful because the
4199 /// code generator has many cases where it doesn't bother passing in a
4200 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4201 static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) {
4202 // If this is FI+Offset, we can model it.
4203 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr))
4204 return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset);
4206 // If this is (FI+Offset1)+Offset2, we can model it.
4207 if (Ptr.getOpcode() != ISD::ADD ||
4208 !isa<ConstantSDNode>(Ptr.getOperand(1)) ||
4209 !isa<FrameIndexSDNode>(Ptr.getOperand(0)))
4210 return MachinePointerInfo();
4212 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
4213 return MachinePointerInfo::getFixedStack(FI, Offset+
4214 cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue());
4217 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4218 /// MachinePointerInfo record from it. This is particularly useful because the
4219 /// code generator has many cases where it doesn't bother passing in a
4220 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4221 static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) {
4222 // If the 'Offset' value isn't a constant, we can't handle this.
4223 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp))
4224 return InferPointerInfo(Ptr, OffsetNode->getSExtValue());
4225 if (OffsetOp.getOpcode() == ISD::UNDEF)
4226 return InferPointerInfo(Ptr);
4227 return MachinePointerInfo();
4232 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4233 EVT VT, DebugLoc dl, SDValue Chain,
4234 SDValue Ptr, SDValue Offset,
4235 MachinePointerInfo PtrInfo, EVT MemVT,
4236 bool isVolatile, bool isNonTemporal, bool isInvariant,
4237 unsigned Alignment, const MDNode *TBAAInfo,
4238 const MDNode *Ranges) {
4239 assert(Chain.getValueType() == MVT::Other &&
4240 "Invalid chain type");
4241 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4242 Alignment = getEVTAlignment(VT);
4244 unsigned Flags = MachineMemOperand::MOLoad;
4246 Flags |= MachineMemOperand::MOVolatile;
4248 Flags |= MachineMemOperand::MONonTemporal;
4250 Flags |= MachineMemOperand::MOInvariant;
4252 // If we don't have a PtrInfo, infer the trivial frame index case to simplify
4255 PtrInfo = InferPointerInfo(Ptr, Offset);
4257 MachineFunction &MF = getMachineFunction();
4258 MachineMemOperand *MMO =
4259 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment,
4261 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO);
4265 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4266 EVT VT, DebugLoc dl, SDValue Chain,
4267 SDValue Ptr, SDValue Offset, EVT MemVT,
4268 MachineMemOperand *MMO) {
4270 ExtType = ISD::NON_EXTLOAD;
4271 } else if (ExtType == ISD::NON_EXTLOAD) {
4272 assert(VT == MemVT && "Non-extending load from different memory type!");
4275 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) &&
4276 "Should only be an extending load, not truncating!");
4277 assert(VT.isInteger() == MemVT.isInteger() &&
4278 "Cannot convert from FP to Int or Int -> FP!");
4279 assert(VT.isVector() == MemVT.isVector() &&
4280 "Cannot use trunc store to convert to or from a vector!");
4281 assert((!VT.isVector() ||
4282 VT.getVectorNumElements() == MemVT.getVectorNumElements()) &&
4283 "Cannot use trunc store to change the number of vector elements!");
4286 bool Indexed = AM != ISD::UNINDEXED;
4287 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
4288 "Unindexed load with an offset!");
4290 SDVTList VTs = Indexed ?
4291 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
4292 SDValue Ops[] = { Chain, Ptr, Offset };
4293 FoldingSetNodeID ID;
4294 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
4295 ID.AddInteger(MemVT.getRawBits());
4296 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(),
4297 MMO->isNonTemporal(),
4298 MMO->isInvariant()));
4299 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4301 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4302 cast<LoadSDNode>(E)->refineAlignment(MMO);
4303 return SDValue(E, 0);
4305 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType,
4307 CSEMap.InsertNode(N, IP);
4308 AllNodes.push_back(N);
4309 return SDValue(N, 0);
4312 SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl,
4313 SDValue Chain, SDValue Ptr,
4314 MachinePointerInfo PtrInfo,
4315 bool isVolatile, bool isNonTemporal,
4316 bool isInvariant, unsigned Alignment,
4317 const MDNode *TBAAInfo,
4318 const MDNode *Ranges) {
4319 SDValue Undef = getUNDEF(Ptr.getValueType());
4320 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
4321 PtrInfo, VT, isVolatile, isNonTemporal, isInvariant, Alignment,
4325 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT,
4326 SDValue Chain, SDValue Ptr,
4327 MachinePointerInfo PtrInfo, EVT MemVT,
4328 bool isVolatile, bool isNonTemporal,
4329 unsigned Alignment, const MDNode *TBAAInfo) {
4330 SDValue Undef = getUNDEF(Ptr.getValueType());
4331 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
4332 PtrInfo, MemVT, isVolatile, isNonTemporal, false, Alignment,
4338 SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base,
4339 SDValue Offset, ISD::MemIndexedMode AM) {
4340 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
4341 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
4342 "Load is already a indexed load!");
4343 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl,
4344 LD->getChain(), Base, Offset, LD->getPointerInfo(),
4345 LD->getMemoryVT(), LD->isVolatile(), LD->isNonTemporal(),
4346 false, LD->getAlignment());
4349 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4350 SDValue Ptr, MachinePointerInfo PtrInfo,
4351 bool isVolatile, bool isNonTemporal,
4352 unsigned Alignment, const MDNode *TBAAInfo) {
4353 assert(Chain.getValueType() == MVT::Other &&
4354 "Invalid chain type");
4355 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4356 Alignment = getEVTAlignment(Val.getValueType());
4358 unsigned Flags = MachineMemOperand::MOStore;
4360 Flags |= MachineMemOperand::MOVolatile;
4362 Flags |= MachineMemOperand::MONonTemporal;
4365 PtrInfo = InferPointerInfo(Ptr);
4367 MachineFunction &MF = getMachineFunction();
4368 MachineMemOperand *MMO =
4369 MF.getMachineMemOperand(PtrInfo, Flags,
4370 Val.getValueType().getStoreSize(), Alignment,
4373 return getStore(Chain, dl, Val, Ptr, MMO);
4376 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4377 SDValue Ptr, MachineMemOperand *MMO) {
4378 assert(Chain.getValueType() == MVT::Other &&
4379 "Invalid chain type");
4380 EVT VT = Val.getValueType();
4381 SDVTList VTs = getVTList(MVT::Other);
4382 SDValue Undef = getUNDEF(Ptr.getValueType());
4383 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4384 FoldingSetNodeID ID;
4385 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4386 ID.AddInteger(VT.getRawBits());
4387 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
4388 MMO->isNonTemporal(), MMO->isInvariant()));
4389 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4391 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4392 cast<StoreSDNode>(E)->refineAlignment(MMO);
4393 return SDValue(E, 0);
4395 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4397 CSEMap.InsertNode(N, IP);
4398 AllNodes.push_back(N);
4399 return SDValue(N, 0);
4402 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4403 SDValue Ptr, MachinePointerInfo PtrInfo,
4404 EVT SVT,bool isVolatile, bool isNonTemporal,
4406 const MDNode *TBAAInfo) {
4407 assert(Chain.getValueType() == MVT::Other &&
4408 "Invalid chain type");
4409 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4410 Alignment = getEVTAlignment(SVT);
4412 unsigned Flags = MachineMemOperand::MOStore;
4414 Flags |= MachineMemOperand::MOVolatile;
4416 Flags |= MachineMemOperand::MONonTemporal;
4419 PtrInfo = InferPointerInfo(Ptr);
4421 MachineFunction &MF = getMachineFunction();
4422 MachineMemOperand *MMO =
4423 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment,
4426 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO);
4429 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4430 SDValue Ptr, EVT SVT,
4431 MachineMemOperand *MMO) {
4432 EVT VT = Val.getValueType();
4434 assert(Chain.getValueType() == MVT::Other &&
4435 "Invalid chain type");
4437 return getStore(Chain, dl, Val, Ptr, MMO);
4439 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) &&
4440 "Should only be a truncating store, not extending!");
4441 assert(VT.isInteger() == SVT.isInteger() &&
4442 "Can't do FP-INT conversion!");
4443 assert(VT.isVector() == SVT.isVector() &&
4444 "Cannot use trunc store to convert to or from a vector!");
4445 assert((!VT.isVector() ||
4446 VT.getVectorNumElements() == SVT.getVectorNumElements()) &&
4447 "Cannot use trunc store to change the number of vector elements!");
4449 SDVTList VTs = getVTList(MVT::Other);
4450 SDValue Undef = getUNDEF(Ptr.getValueType());
4451 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4452 FoldingSetNodeID ID;
4453 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4454 ID.AddInteger(SVT.getRawBits());
4455 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(),
4456 MMO->isNonTemporal(), MMO->isInvariant()));
4457 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4459 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4460 cast<StoreSDNode>(E)->refineAlignment(MMO);
4461 return SDValue(E, 0);
4463 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4465 CSEMap.InsertNode(N, IP);
4466 AllNodes.push_back(N);
4467 return SDValue(N, 0);
4471 SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base,
4472 SDValue Offset, ISD::MemIndexedMode AM) {
4473 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
4474 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
4475 "Store is already a indexed store!");
4476 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
4477 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
4478 FoldingSetNodeID ID;
4479 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4480 ID.AddInteger(ST->getMemoryVT().getRawBits());
4481 ID.AddInteger(ST->getRawSubclassData());
4482 ID.AddInteger(ST->getPointerInfo().getAddrSpace());
4484 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4485 return SDValue(E, 0);
4487 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM,
4488 ST->isTruncatingStore(),
4490 ST->getMemOperand());
4491 CSEMap.InsertNode(N, IP);
4492 AllNodes.push_back(N);
4493 return SDValue(N, 0);
4496 SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl,
4497 SDValue Chain, SDValue Ptr,
4500 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) };
4501 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 4);
4504 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4505 const SDUse *Ops, unsigned NumOps) {
4507 case 0: return getNode(Opcode, DL, VT);
4508 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4509 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4510 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4514 // Copy from an SDUse array into an SDValue array for use with
4515 // the regular getNode logic.
4516 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
4517 return getNode(Opcode, DL, VT, &NewOps[0], NumOps);
4520 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4521 const SDValue *Ops, unsigned NumOps) {
4523 case 0: return getNode(Opcode, DL, VT);
4524 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4525 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4526 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4532 case ISD::SELECT_CC: {
4533 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
4534 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
4535 "LHS and RHS of condition must have same type!");
4536 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4537 "True and False arms of SelectCC must have same type!");
4538 assert(Ops[2].getValueType() == VT &&
4539 "select_cc node must be of same type as true and false value!");
4543 assert(NumOps == 5 && "BR_CC takes 5 operands!");
4544 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4545 "LHS/RHS of comparison should match types!");
4552 SDVTList VTs = getVTList(VT);
4554 if (VT != MVT::Glue) {
4555 FoldingSetNodeID ID;
4556 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
4559 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4560 return SDValue(E, 0);
4562 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4563 CSEMap.InsertNode(N, IP);
4565 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4568 AllNodes.push_back(N);
4572 return SDValue(N, 0);
4575 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4576 const std::vector<EVT> &ResultTys,
4577 const SDValue *Ops, unsigned NumOps) {
4578 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()),
4582 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4583 const EVT *VTs, unsigned NumVTs,
4584 const SDValue *Ops, unsigned NumOps) {
4586 return getNode(Opcode, DL, VTs[0], Ops, NumOps);
4587 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps);
4590 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4591 const SDValue *Ops, unsigned NumOps) {
4592 if (VTList.NumVTs == 1)
4593 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps);
4597 // FIXME: figure out how to safely handle things like
4598 // int foo(int x) { return 1 << (x & 255); }
4599 // int bar() { return foo(256); }
4600 case ISD::SRA_PARTS:
4601 case ISD::SRL_PARTS:
4602 case ISD::SHL_PARTS:
4603 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
4604 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
4605 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4606 else if (N3.getOpcode() == ISD::AND)
4607 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
4608 // If the and is only masking out bits that cannot effect the shift,
4609 // eliminate the and.
4610 unsigned NumBits = VT.getScalarType().getSizeInBits()*2;
4611 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
4612 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4618 // Memoize the node unless it returns a flag.
4620 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
4621 FoldingSetNodeID ID;
4622 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4624 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4625 return SDValue(E, 0);
4628 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4629 } else if (NumOps == 2) {
4630 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4631 } else if (NumOps == 3) {
4632 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4635 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4637 CSEMap.InsertNode(N, IP);
4640 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4641 } else if (NumOps == 2) {
4642 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4643 } else if (NumOps == 3) {
4644 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4647 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4650 AllNodes.push_back(N);
4654 return SDValue(N, 0);
4657 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) {
4658 return getNode(Opcode, DL, VTList, 0, 0);
4661 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4663 SDValue Ops[] = { N1 };
4664 return getNode(Opcode, DL, VTList, Ops, 1);
4667 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4668 SDValue N1, SDValue N2) {
4669 SDValue Ops[] = { N1, N2 };
4670 return getNode(Opcode, DL, VTList, Ops, 2);
4673 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4674 SDValue N1, SDValue N2, SDValue N3) {
4675 SDValue Ops[] = { N1, N2, N3 };
4676 return getNode(Opcode, DL, VTList, Ops, 3);
4679 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4680 SDValue N1, SDValue N2, SDValue N3,
4682 SDValue Ops[] = { N1, N2, N3, N4 };
4683 return getNode(Opcode, DL, VTList, Ops, 4);
4686 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4687 SDValue N1, SDValue N2, SDValue N3,
4688 SDValue N4, SDValue N5) {
4689 SDValue Ops[] = { N1, N2, N3, N4, N5 };
4690 return getNode(Opcode, DL, VTList, Ops, 5);
4693 SDVTList SelectionDAG::getVTList(EVT VT) {
4694 return makeVTList(SDNode::getValueTypeList(VT), 1);
4697 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
4698 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4699 E = VTList.rend(); I != E; ++I)
4700 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
4703 EVT *Array = Allocator.Allocate<EVT>(2);
4706 SDVTList Result = makeVTList(Array, 2);
4707 VTList.push_back(Result);
4711 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
4712 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4713 E = VTList.rend(); I != E; ++I)
4714 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4718 EVT *Array = Allocator.Allocate<EVT>(3);
4722 SDVTList Result = makeVTList(Array, 3);
4723 VTList.push_back(Result);
4727 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
4728 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4729 E = VTList.rend(); I != E; ++I)
4730 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4731 I->VTs[2] == VT3 && I->VTs[3] == VT4)
4734 EVT *Array = Allocator.Allocate<EVT>(4);
4739 SDVTList Result = makeVTList(Array, 4);
4740 VTList.push_back(Result);
4744 SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) {
4746 case 0: llvm_unreachable("Cannot have nodes without results!");
4747 case 1: return getVTList(VTs[0]);
4748 case 2: return getVTList(VTs[0], VTs[1]);
4749 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
4750 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]);
4754 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4755 E = VTList.rend(); I != E; ++I) {
4756 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
4759 if (std::equal(&VTs[2], &VTs[NumVTs], &I->VTs[2]))
4763 EVT *Array = Allocator.Allocate<EVT>(NumVTs);
4764 std::copy(VTs, VTs+NumVTs, Array);
4765 SDVTList Result = makeVTList(Array, NumVTs);
4766 VTList.push_back(Result);
4771 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
4772 /// specified operands. If the resultant node already exists in the DAG,
4773 /// this does not modify the specified node, instead it returns the node that
4774 /// already exists. If the resultant node does not exist in the DAG, the
4775 /// input node is returned. As a degenerate case, if you specify the same
4776 /// input operands as the node already has, the input node is returned.
4777 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) {
4778 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
4780 // Check to see if there is no change.
4781 if (Op == N->getOperand(0)) return N;
4783 // See if the modified node already exists.
4784 void *InsertPos = 0;
4785 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
4788 // Nope it doesn't. Remove the node from its current place in the maps.
4790 if (!RemoveNodeFromCSEMaps(N))
4793 // Now we update the operands.
4794 N->OperandList[0].set(Op);
4796 // If this gets put into a CSE map, add it.
4797 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4801 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) {
4802 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
4804 // Check to see if there is no change.
4805 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
4806 return N; // No operands changed, just return the input node.
4808 // See if the modified node already exists.
4809 void *InsertPos = 0;
4810 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
4813 // Nope it doesn't. Remove the node from its current place in the maps.
4815 if (!RemoveNodeFromCSEMaps(N))
4818 // Now we update the operands.
4819 if (N->OperandList[0] != Op1)
4820 N->OperandList[0].set(Op1);
4821 if (N->OperandList[1] != Op2)
4822 N->OperandList[1].set(Op2);
4824 // If this gets put into a CSE map, add it.
4825 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4829 SDNode *SelectionDAG::
4830 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) {
4831 SDValue Ops[] = { Op1, Op2, Op3 };
4832 return UpdateNodeOperands(N, Ops, 3);
4835 SDNode *SelectionDAG::
4836 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
4837 SDValue Op3, SDValue Op4) {
4838 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
4839 return UpdateNodeOperands(N, Ops, 4);
4842 SDNode *SelectionDAG::
4843 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
4844 SDValue Op3, SDValue Op4, SDValue Op5) {
4845 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
4846 return UpdateNodeOperands(N, Ops, 5);
4849 SDNode *SelectionDAG::
4850 UpdateNodeOperands(SDNode *N, const SDValue *Ops, unsigned NumOps) {
4851 assert(N->getNumOperands() == NumOps &&
4852 "Update with wrong number of operands");
4854 // Check to see if there is no change.
4855 bool AnyChange = false;
4856 for (unsigned i = 0; i != NumOps; ++i) {
4857 if (Ops[i] != N->getOperand(i)) {
4863 // No operands changed, just return the input node.
4864 if (!AnyChange) return N;
4866 // See if the modified node already exists.
4867 void *InsertPos = 0;
4868 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
4871 // Nope it doesn't. Remove the node from its current place in the maps.
4873 if (!RemoveNodeFromCSEMaps(N))
4876 // Now we update the operands.
4877 for (unsigned i = 0; i != NumOps; ++i)
4878 if (N->OperandList[i] != Ops[i])
4879 N->OperandList[i].set(Ops[i]);
4881 // If this gets put into a CSE map, add it.
4882 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4886 /// DropOperands - Release the operands and set this node to have
4888 void SDNode::DropOperands() {
4889 // Unlike the code in MorphNodeTo that does this, we don't need to
4890 // watch for dead nodes here.
4891 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
4897 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
4900 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4902 SDVTList VTs = getVTList(VT);
4903 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
4906 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4907 EVT VT, SDValue Op1) {
4908 SDVTList VTs = getVTList(VT);
4909 SDValue Ops[] = { Op1 };
4910 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4913 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4914 EVT VT, SDValue Op1,
4916 SDVTList VTs = getVTList(VT);
4917 SDValue Ops[] = { Op1, Op2 };
4918 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4921 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4922 EVT VT, SDValue Op1,
4923 SDValue Op2, SDValue Op3) {
4924 SDVTList VTs = getVTList(VT);
4925 SDValue Ops[] = { Op1, Op2, Op3 };
4926 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4929 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4930 EVT VT, const SDValue *Ops,
4932 SDVTList VTs = getVTList(VT);
4933 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4936 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4937 EVT VT1, EVT VT2, const SDValue *Ops,
4939 SDVTList VTs = getVTList(VT1, VT2);
4940 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4943 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4945 SDVTList VTs = getVTList(VT1, VT2);
4946 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
4949 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4950 EVT VT1, EVT VT2, EVT VT3,
4951 const SDValue *Ops, unsigned NumOps) {
4952 SDVTList VTs = getVTList(VT1, VT2, VT3);
4953 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4956 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4957 EVT VT1, EVT VT2, EVT VT3, EVT VT4,
4958 const SDValue *Ops, unsigned NumOps) {
4959 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4960 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4963 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4966 SDVTList VTs = getVTList(VT1, VT2);
4967 SDValue Ops[] = { Op1 };
4968 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4971 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4973 SDValue Op1, SDValue Op2) {
4974 SDVTList VTs = getVTList(VT1, VT2);
4975 SDValue Ops[] = { Op1, Op2 };
4976 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4979 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4981 SDValue Op1, SDValue Op2,
4983 SDVTList VTs = getVTList(VT1, VT2);
4984 SDValue Ops[] = { Op1, Op2, Op3 };
4985 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4988 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4989 EVT VT1, EVT VT2, EVT VT3,
4990 SDValue Op1, SDValue Op2,
4992 SDVTList VTs = getVTList(VT1, VT2, VT3);
4993 SDValue Ops[] = { Op1, Op2, Op3 };
4994 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4997 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4998 SDVTList VTs, const SDValue *Ops,
5000 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
5001 // Reset the NodeID to -1.
5006 /// UpdadeDebugLocOnMergedSDNode - If the opt level is -O0 then it throws away
5007 /// the line number information on the merged node since it is not possible to
5008 /// preserve the information that operation is associated with multiple lines.
5009 /// This will make the debugger working better at -O0, were there is a higher
5010 /// probability having other instructions associated with that line.
5012 SDNode *SelectionDAG::UpdadeDebugLocOnMergedSDNode(SDNode *N, DebugLoc OLoc) {
5013 DebugLoc NLoc = N->getDebugLoc();
5014 if (!(NLoc.isUnknown()) && (OptLevel == CodeGenOpt::None) && (OLoc != NLoc)) {
5015 N->setDebugLoc(DebugLoc());
5020 /// MorphNodeTo - This *mutates* the specified node to have the specified
5021 /// return type, opcode, and operands.
5023 /// Note that MorphNodeTo returns the resultant node. If there is already a
5024 /// node of the specified opcode and operands, it returns that node instead of
5025 /// the current one. Note that the DebugLoc need not be the same.
5027 /// Using MorphNodeTo is faster than creating a new node and swapping it in
5028 /// with ReplaceAllUsesWith both because it often avoids allocating a new
5029 /// node, and because it doesn't require CSE recalculation for any of
5030 /// the node's users.
5032 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
5033 SDVTList VTs, const SDValue *Ops,
5035 // If an identical node already exists, use it.
5037 if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) {
5038 FoldingSetNodeID ID;
5039 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
5040 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
5041 return UpdadeDebugLocOnMergedSDNode(ON, N->getDebugLoc());
5044 if (!RemoveNodeFromCSEMaps(N))
5047 // Start the morphing.
5049 N->ValueList = VTs.VTs;
5050 N->NumValues = VTs.NumVTs;
5052 // Clear the operands list, updating used nodes to remove this from their
5053 // use list. Keep track of any operands that become dead as a result.
5054 SmallPtrSet<SDNode*, 16> DeadNodeSet;
5055 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
5057 SDNode *Used = Use.getNode();
5059 if (Used->use_empty())
5060 DeadNodeSet.insert(Used);
5063 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) {
5064 // Initialize the memory references information.
5065 MN->setMemRefs(0, 0);
5066 // If NumOps is larger than the # of operands we can have in a
5067 // MachineSDNode, reallocate the operand list.
5068 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) {
5069 if (MN->OperandsNeedDelete)
5070 delete[] MN->OperandList;
5071 if (NumOps > array_lengthof(MN->LocalOperands))
5072 // We're creating a final node that will live unmorphed for the
5073 // remainder of the current SelectionDAG iteration, so we can allocate
5074 // the operands directly out of a pool with no recycling metadata.
5075 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
5078 MN->InitOperands(MN->LocalOperands, Ops, NumOps);
5079 MN->OperandsNeedDelete = false;
5081 MN->InitOperands(MN->OperandList, Ops, NumOps);
5083 // If NumOps is larger than the # of operands we currently have, reallocate
5084 // the operand list.
5085 if (NumOps > N->NumOperands) {
5086 if (N->OperandsNeedDelete)
5087 delete[] N->OperandList;
5088 N->InitOperands(new SDUse[NumOps], Ops, NumOps);
5089 N->OperandsNeedDelete = true;
5091 N->InitOperands(N->OperandList, Ops, NumOps);
5094 // Delete any nodes that are still dead after adding the uses for the
5096 if (!DeadNodeSet.empty()) {
5097 SmallVector<SDNode *, 16> DeadNodes;
5098 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
5099 E = DeadNodeSet.end(); I != E; ++I)
5100 if ((*I)->use_empty())
5101 DeadNodes.push_back(*I);
5102 RemoveDeadNodes(DeadNodes);
5106 CSEMap.InsertNode(N, IP); // Memoize the new node.
5111 /// getMachineNode - These are used for target selectors to create a new node
5112 /// with specified return type(s), MachineInstr opcode, and operands.
5114 /// Note that getMachineNode returns the resultant node. If there is already a
5115 /// node of the specified opcode and operands, it returns that node instead of
5116 /// the current one.
5118 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) {
5119 SDVTList VTs = getVTList(VT);
5120 return getMachineNode(Opcode, dl, VTs, 0, 0);
5124 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) {
5125 SDVTList VTs = getVTList(VT);
5126 SDValue Ops[] = { Op1 };
5127 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5131 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
5132 SDValue Op1, SDValue Op2) {
5133 SDVTList VTs = getVTList(VT);
5134 SDValue Ops[] = { Op1, Op2 };
5135 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5139 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
5140 SDValue Op1, SDValue Op2, SDValue Op3) {
5141 SDVTList VTs = getVTList(VT);
5142 SDValue Ops[] = { Op1, Op2, Op3 };
5143 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5147 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
5148 const SDValue *Ops, unsigned NumOps) {
5149 SDVTList VTs = getVTList(VT);
5150 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5154 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) {
5155 SDVTList VTs = getVTList(VT1, VT2);
5156 return getMachineNode(Opcode, dl, VTs, 0, 0);
5160 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5161 EVT VT1, EVT VT2, SDValue Op1) {
5162 SDVTList VTs = getVTList(VT1, VT2);
5163 SDValue Ops[] = { Op1 };
5164 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5168 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5169 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) {
5170 SDVTList VTs = getVTList(VT1, VT2);
5171 SDValue Ops[] = { Op1, Op2 };
5172 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5176 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5177 EVT VT1, EVT VT2, SDValue Op1,
5178 SDValue Op2, SDValue Op3) {
5179 SDVTList VTs = getVTList(VT1, VT2);
5180 SDValue Ops[] = { Op1, Op2, Op3 };
5181 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5185 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5187 const SDValue *Ops, unsigned NumOps) {
5188 SDVTList VTs = getVTList(VT1, VT2);
5189 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5193 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5194 EVT VT1, EVT VT2, EVT VT3,
5195 SDValue Op1, SDValue Op2) {
5196 SDVTList VTs = getVTList(VT1, VT2, VT3);
5197 SDValue Ops[] = { Op1, Op2 };
5198 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5202 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5203 EVT VT1, EVT VT2, EVT VT3,
5204 SDValue Op1, SDValue Op2, SDValue Op3) {
5205 SDVTList VTs = getVTList(VT1, VT2, VT3);
5206 SDValue Ops[] = { Op1, Op2, Op3 };
5207 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5211 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5212 EVT VT1, EVT VT2, EVT VT3,
5213 const SDValue *Ops, unsigned NumOps) {
5214 SDVTList VTs = getVTList(VT1, VT2, VT3);
5215 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5219 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1,
5220 EVT VT2, EVT VT3, EVT VT4,
5221 const SDValue *Ops, unsigned NumOps) {
5222 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
5223 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5227 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5228 const std::vector<EVT> &ResultTys,
5229 const SDValue *Ops, unsigned NumOps) {
5230 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size());
5231 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5235 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs,
5236 const SDValue *Ops, unsigned NumOps) {
5237 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue;
5242 FoldingSetNodeID ID;
5243 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps);
5245 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
5246 return cast<MachineSDNode>(UpdadeDebugLocOnMergedSDNode(E, DL));
5250 // Allocate a new MachineSDNode.
5251 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs);
5253 // Initialize the operands list.
5254 if (NumOps > array_lengthof(N->LocalOperands))
5255 // We're creating a final node that will live unmorphed for the
5256 // remainder of the current SelectionDAG iteration, so we can allocate
5257 // the operands directly out of a pool with no recycling metadata.
5258 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
5261 N->InitOperands(N->LocalOperands, Ops, NumOps);
5262 N->OperandsNeedDelete = false;
5265 CSEMap.InsertNode(N, IP);
5267 AllNodes.push_back(N);
5269 VerifyMachineNode(N);
5274 /// getTargetExtractSubreg - A convenience function for creating
5275 /// TargetOpcode::EXTRACT_SUBREG nodes.
5277 SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT,
5279 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
5280 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL,
5281 VT, Operand, SRIdxVal);
5282 return SDValue(Subreg, 0);
5285 /// getTargetInsertSubreg - A convenience function for creating
5286 /// TargetOpcode::INSERT_SUBREG nodes.
5288 SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT,
5289 SDValue Operand, SDValue Subreg) {
5290 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
5291 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL,
5292 VT, Operand, Subreg, SRIdxVal);
5293 return SDValue(Result, 0);
5296 /// getNodeIfExists - Get the specified node if it's already available, or
5297 /// else return NULL.
5298 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
5299 const SDValue *Ops, unsigned NumOps) {
5300 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
5301 FoldingSetNodeID ID;
5302 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
5304 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
5310 /// getDbgValue - Creates a SDDbgValue node.
5313 SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off,
5314 DebugLoc DL, unsigned O) {
5315 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O);
5319 SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off,
5320 DebugLoc DL, unsigned O) {
5321 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O);
5325 SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off,
5326 DebugLoc DL, unsigned O) {
5327 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O);
5332 /// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node
5333 /// pointed to by a use iterator is deleted, increment the use iterator
5334 /// so that it doesn't dangle.
5336 class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener {
5337 SDNode::use_iterator &UI;
5338 SDNode::use_iterator &UE;
5340 virtual void NodeDeleted(SDNode *N, SDNode *E) {
5341 // Increment the iterator as needed.
5342 while (UI != UE && N == *UI)
5347 RAUWUpdateListener(SelectionDAG &d,
5348 SDNode::use_iterator &ui,
5349 SDNode::use_iterator &ue)
5350 : SelectionDAG::DAGUpdateListener(d), UI(ui), UE(ue) {}
5355 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5356 /// This can cause recursive merging of nodes in the DAG.
5358 /// This version assumes From has a single result value.
5360 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To) {
5361 SDNode *From = FromN.getNode();
5362 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
5363 "Cannot replace with this method!");
5364 assert(From != To.getNode() && "Cannot replace uses of with self");
5366 // Iterate over all the existing uses of From. New uses will be added
5367 // to the beginning of the use list, which we avoid visiting.
5368 // This specifically avoids visiting uses of From that arise while the
5369 // replacement is happening, because any such uses would be the result
5370 // of CSE: If an existing node looks like From after one of its operands
5371 // is replaced by To, we don't want to replace of all its users with To
5372 // too. See PR3018 for more info.
5373 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5374 RAUWUpdateListener Listener(*this, UI, UE);
5378 // This node is about to morph, remove its old self from the CSE maps.
5379 RemoveNodeFromCSEMaps(User);
5381 // A user can appear in a use list multiple times, and when this
5382 // happens the uses are usually next to each other in the list.
5383 // To help reduce the number of CSE recomputations, process all
5384 // the uses of this user that we can find this way.
5386 SDUse &Use = UI.getUse();
5389 } while (UI != UE && *UI == User);
5391 // Now that we have modified User, add it back to the CSE maps. If it
5392 // already exists there, recursively merge the results together.
5393 AddModifiedNodeToCSEMaps(User);
5396 // If we just RAUW'd the root, take note.
5397 if (FromN == getRoot())
5401 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5402 /// This can cause recursive merging of nodes in the DAG.
5404 /// This version assumes that for each value of From, there is a
5405 /// corresponding value in To in the same position with the same type.
5407 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To) {
5409 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
5410 assert((!From->hasAnyUseOfValue(i) ||
5411 From->getValueType(i) == To->getValueType(i)) &&
5412 "Cannot use this version of ReplaceAllUsesWith!");
5415 // Handle the trivial case.
5419 // Iterate over just the existing users of From. See the comments in
5420 // the ReplaceAllUsesWith above.
5421 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5422 RAUWUpdateListener Listener(*this, UI, UE);
5426 // This node is about to morph, remove its old self from the CSE maps.
5427 RemoveNodeFromCSEMaps(User);
5429 // A user can appear in a use list multiple times, and when this
5430 // happens the uses are usually next to each other in the list.
5431 // To help reduce the number of CSE recomputations, process all
5432 // the uses of this user that we can find this way.
5434 SDUse &Use = UI.getUse();
5437 } while (UI != UE && *UI == User);
5439 // Now that we have modified User, add it back to the CSE maps. If it
5440 // already exists there, recursively merge the results together.
5441 AddModifiedNodeToCSEMaps(User);
5444 // If we just RAUW'd the root, take note.
5445 if (From == getRoot().getNode())
5446 setRoot(SDValue(To, getRoot().getResNo()));
5449 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5450 /// This can cause recursive merging of nodes in the DAG.
5452 /// This version can replace From with any result values. To must match the
5453 /// number and types of values returned by From.
5454 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, const SDValue *To) {
5455 if (From->getNumValues() == 1) // Handle the simple case efficiently.
5456 return ReplaceAllUsesWith(SDValue(From, 0), To[0]);
5458 // Iterate over just the existing users of From. See the comments in
5459 // the ReplaceAllUsesWith above.
5460 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5461 RAUWUpdateListener Listener(*this, UI, UE);
5465 // This node is about to morph, remove its old self from the CSE maps.
5466 RemoveNodeFromCSEMaps(User);
5468 // A user can appear in a use list multiple times, and when this
5469 // happens the uses are usually next to each other in the list.
5470 // To help reduce the number of CSE recomputations, process all
5471 // the uses of this user that we can find this way.
5473 SDUse &Use = UI.getUse();
5474 const SDValue &ToOp = To[Use.getResNo()];
5477 } while (UI != UE && *UI == User);
5479 // Now that we have modified User, add it back to the CSE maps. If it
5480 // already exists there, recursively merge the results together.
5481 AddModifiedNodeToCSEMaps(User);
5484 // If we just RAUW'd the root, take note.
5485 if (From == getRoot().getNode())
5486 setRoot(SDValue(To[getRoot().getResNo()]));
5489 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
5490 /// uses of other values produced by From.getNode() alone. The Deleted
5491 /// vector is handled the same way as for ReplaceAllUsesWith.
5492 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To){
5493 // Handle the really simple, really trivial case efficiently.
5494 if (From == To) return;
5496 // Handle the simple, trivial, case efficiently.
5497 if (From.getNode()->getNumValues() == 1) {
5498 ReplaceAllUsesWith(From, To);
5502 // Iterate over just the existing users of From. See the comments in
5503 // the ReplaceAllUsesWith above.
5504 SDNode::use_iterator UI = From.getNode()->use_begin(),
5505 UE = From.getNode()->use_end();
5506 RAUWUpdateListener Listener(*this, UI, UE);
5509 bool UserRemovedFromCSEMaps = false;
5511 // A user can appear in a use list multiple times, and when this
5512 // happens the uses are usually next to each other in the list.
5513 // To help reduce the number of CSE recomputations, process all
5514 // the uses of this user that we can find this way.
5516 SDUse &Use = UI.getUse();
5518 // Skip uses of different values from the same node.
5519 if (Use.getResNo() != From.getResNo()) {
5524 // If this node hasn't been modified yet, it's still in the CSE maps,
5525 // so remove its old self from the CSE maps.
5526 if (!UserRemovedFromCSEMaps) {
5527 RemoveNodeFromCSEMaps(User);
5528 UserRemovedFromCSEMaps = true;
5533 } while (UI != UE && *UI == User);
5535 // We are iterating over all uses of the From node, so if a use
5536 // doesn't use the specific value, no changes are made.
5537 if (!UserRemovedFromCSEMaps)
5540 // Now that we have modified User, add it back to the CSE maps. If it
5541 // already exists there, recursively merge the results together.
5542 AddModifiedNodeToCSEMaps(User);
5545 // If we just RAUW'd the root, take note.
5546 if (From == getRoot())
5551 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
5552 /// to record information about a use.
5559 /// operator< - Sort Memos by User.
5560 bool operator<(const UseMemo &L, const UseMemo &R) {
5561 return (intptr_t)L.User < (intptr_t)R.User;
5565 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
5566 /// uses of other values produced by From.getNode() alone. The same value
5567 /// may appear in both the From and To list. The Deleted vector is
5568 /// handled the same way as for ReplaceAllUsesWith.
5569 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
5572 // Handle the simple, trivial case efficiently.
5574 return ReplaceAllUsesOfValueWith(*From, *To);
5576 // Read up all the uses and make records of them. This helps
5577 // processing new uses that are introduced during the
5578 // replacement process.
5579 SmallVector<UseMemo, 4> Uses;
5580 for (unsigned i = 0; i != Num; ++i) {
5581 unsigned FromResNo = From[i].getResNo();
5582 SDNode *FromNode = From[i].getNode();
5583 for (SDNode::use_iterator UI = FromNode->use_begin(),
5584 E = FromNode->use_end(); UI != E; ++UI) {
5585 SDUse &Use = UI.getUse();
5586 if (Use.getResNo() == FromResNo) {
5587 UseMemo Memo = { *UI, i, &Use };
5588 Uses.push_back(Memo);
5593 // Sort the uses, so that all the uses from a given User are together.
5594 std::sort(Uses.begin(), Uses.end());
5596 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
5597 UseIndex != UseIndexEnd; ) {
5598 // We know that this user uses some value of From. If it is the right
5599 // value, update it.
5600 SDNode *User = Uses[UseIndex].User;
5602 // This node is about to morph, remove its old self from the CSE maps.
5603 RemoveNodeFromCSEMaps(User);
5605 // The Uses array is sorted, so all the uses for a given User
5606 // are next to each other in the list.
5607 // To help reduce the number of CSE recomputations, process all
5608 // the uses of this user that we can find this way.
5610 unsigned i = Uses[UseIndex].Index;
5611 SDUse &Use = *Uses[UseIndex].Use;
5615 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
5617 // Now that we have modified User, add it back to the CSE maps. If it
5618 // already exists there, recursively merge the results together.
5619 AddModifiedNodeToCSEMaps(User);
5623 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
5624 /// based on their topological order. It returns the maximum id and a vector
5625 /// of the SDNodes* in assigned order by reference.
5626 unsigned SelectionDAG::AssignTopologicalOrder() {
5628 unsigned DAGSize = 0;
5630 // SortedPos tracks the progress of the algorithm. Nodes before it are
5631 // sorted, nodes after it are unsorted. When the algorithm completes
5632 // it is at the end of the list.
5633 allnodes_iterator SortedPos = allnodes_begin();
5635 // Visit all the nodes. Move nodes with no operands to the front of
5636 // the list immediately. Annotate nodes that do have operands with their
5637 // operand count. Before we do this, the Node Id fields of the nodes
5638 // may contain arbitrary values. After, the Node Id fields for nodes
5639 // before SortedPos will contain the topological sort index, and the
5640 // Node Id fields for nodes At SortedPos and after will contain the
5641 // count of outstanding operands.
5642 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
5645 unsigned Degree = N->getNumOperands();
5647 // A node with no uses, add it to the result array immediately.
5648 N->setNodeId(DAGSize++);
5649 allnodes_iterator Q = N;
5651 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
5652 assert(SortedPos != AllNodes.end() && "Overran node list");
5655 // Temporarily use the Node Id as scratch space for the degree count.
5656 N->setNodeId(Degree);
5660 // Visit all the nodes. As we iterate, move nodes into sorted order,
5661 // such that by the time the end is reached all nodes will be sorted.
5662 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
5665 // N is in sorted position, so all its uses have one less operand
5666 // that needs to be sorted.
5667 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
5670 unsigned Degree = P->getNodeId();
5671 assert(Degree != 0 && "Invalid node degree");
5674 // All of P's operands are sorted, so P may sorted now.
5675 P->setNodeId(DAGSize++);
5677 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
5678 assert(SortedPos != AllNodes.end() && "Overran node list");
5681 // Update P's outstanding operand count.
5682 P->setNodeId(Degree);
5685 if (I == SortedPos) {
5688 dbgs() << "Overran sorted position:\n";
5691 llvm_unreachable(0);
5695 assert(SortedPos == AllNodes.end() &&
5696 "Topological sort incomplete!");
5697 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
5698 "First node in topological sort is not the entry token!");
5699 assert(AllNodes.front().getNodeId() == 0 &&
5700 "First node in topological sort has non-zero id!");
5701 assert(AllNodes.front().getNumOperands() == 0 &&
5702 "First node in topological sort has operands!");
5703 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
5704 "Last node in topologic sort has unexpected id!");
5705 assert(AllNodes.back().use_empty() &&
5706 "Last node in topologic sort has users!");
5707 assert(DAGSize == allnodes_size() && "Node count mismatch!");
5711 /// AssignOrdering - Assign an order to the SDNode.
5712 void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) {
5713 assert(SD && "Trying to assign an order to a null node!");
5714 Ordering->add(SD, Order);
5717 /// GetOrdering - Get the order for the SDNode.
5718 unsigned SelectionDAG::GetOrdering(const SDNode *SD) const {
5719 assert(SD && "Trying to get the order of a null node!");
5720 return Ordering->getOrder(SD);
5723 /// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the
5724 /// value is produced by SD.
5725 void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) {
5726 DbgInfo->add(DB, SD, isParameter);
5728 SD->setHasDebugValue(true);
5731 /// TransferDbgValues - Transfer SDDbgValues.
5732 void SelectionDAG::TransferDbgValues(SDValue From, SDValue To) {
5733 if (From == To || !From.getNode()->getHasDebugValue())
5735 SDNode *FromNode = From.getNode();
5736 SDNode *ToNode = To.getNode();
5737 ArrayRef<SDDbgValue *> DVs = GetDbgValues(FromNode);
5738 SmallVector<SDDbgValue *, 2> ClonedDVs;
5739 for (ArrayRef<SDDbgValue *>::iterator I = DVs.begin(), E = DVs.end();
5741 SDDbgValue *Dbg = *I;
5742 if (Dbg->getKind() == SDDbgValue::SDNODE) {
5743 SDDbgValue *Clone = getDbgValue(Dbg->getMDPtr(), ToNode, To.getResNo(),
5744 Dbg->getOffset(), Dbg->getDebugLoc(),
5746 ClonedDVs.push_back(Clone);
5749 for (SmallVector<SDDbgValue *, 2>::iterator I = ClonedDVs.begin(),
5750 E = ClonedDVs.end(); I != E; ++I)
5751 AddDbgValue(*I, ToNode, false);
5754 //===----------------------------------------------------------------------===//
5756 //===----------------------------------------------------------------------===//
5758 HandleSDNode::~HandleSDNode() {
5762 GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, DebugLoc DL,
5763 const GlobalValue *GA,
5764 EVT VT, int64_t o, unsigned char TF)
5765 : SDNode(Opc, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) {
5769 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt,
5770 MachineMemOperand *mmo)
5771 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) {
5772 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5773 MMO->isNonTemporal(), MMO->isInvariant());
5774 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5775 assert(isNonTemporal() == MMO->isNonTemporal() &&
5776 "Non-temporal encoding error!");
5777 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5780 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs,
5781 const SDValue *Ops, unsigned NumOps, EVT memvt,
5782 MachineMemOperand *mmo)
5783 : SDNode(Opc, dl, VTs, Ops, NumOps),
5784 MemoryVT(memvt), MMO(mmo) {
5785 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5786 MMO->isNonTemporal(), MMO->isInvariant());
5787 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5788 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5791 /// Profile - Gather unique data for the node.
5793 void SDNode::Profile(FoldingSetNodeID &ID) const {
5794 AddNodeIDNode(ID, this);
5799 std::vector<EVT> VTs;
5802 VTs.reserve(MVT::LAST_VALUETYPE);
5803 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i)
5804 VTs.push_back(MVT((MVT::SimpleValueType)i));
5809 static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs;
5810 static ManagedStatic<EVTArray> SimpleVTArray;
5811 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
5813 /// getValueTypeList - Return a pointer to the specified value type.
5815 const EVT *SDNode::getValueTypeList(EVT VT) {
5816 if (VT.isExtended()) {
5817 sys::SmartScopedLock<true> Lock(*VTMutex);
5818 return &(*EVTs->insert(VT).first);
5820 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE &&
5821 "Value type out of range!");
5822 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy];
5826 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
5827 /// indicated value. This method ignores uses of other values defined by this
5829 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
5830 assert(Value < getNumValues() && "Bad value!");
5832 // TODO: Only iterate over uses of a given value of the node
5833 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
5834 if (UI.getUse().getResNo() == Value) {
5841 // Found exactly the right number of uses?
5846 /// hasAnyUseOfValue - Return true if there are any use of the indicated
5847 /// value. This method ignores uses of other values defined by this operation.
5848 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
5849 assert(Value < getNumValues() && "Bad value!");
5851 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
5852 if (UI.getUse().getResNo() == Value)
5859 /// isOnlyUserOf - Return true if this node is the only use of N.
5861 bool SDNode::isOnlyUserOf(SDNode *N) const {
5863 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
5874 /// isOperand - Return true if this node is an operand of N.
5876 bool SDValue::isOperandOf(SDNode *N) const {
5877 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5878 if (*this == N->getOperand(i))
5883 bool SDNode::isOperandOf(SDNode *N) const {
5884 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
5885 if (this == N->OperandList[i].getNode())
5890 /// reachesChainWithoutSideEffects - Return true if this operand (which must
5891 /// be a chain) reaches the specified operand without crossing any
5892 /// side-effecting instructions on any chain path. In practice, this looks
5893 /// through token factors and non-volatile loads. In order to remain efficient,
5894 /// this only looks a couple of nodes in, it does not do an exhaustive search.
5895 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
5896 unsigned Depth) const {
5897 if (*this == Dest) return true;
5899 // Don't search too deeply, we just want to be able to see through
5900 // TokenFactor's etc.
5901 if (Depth == 0) return false;
5903 // If this is a token factor, all inputs to the TF happen in parallel. If any
5904 // of the operands of the TF does not reach dest, then we cannot do the xform.
5905 if (getOpcode() == ISD::TokenFactor) {
5906 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
5907 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
5912 // Loads don't have side effects, look through them.
5913 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
5914 if (!Ld->isVolatile())
5915 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
5920 /// hasPredecessor - Return true if N is a predecessor of this node.
5921 /// N is either an operand of this node, or can be reached by recursively
5922 /// traversing up the operands.
5923 /// NOTE: This is an expensive method. Use it carefully.
5924 bool SDNode::hasPredecessor(const SDNode *N) const {
5925 SmallPtrSet<const SDNode *, 32> Visited;
5926 SmallVector<const SDNode *, 16> Worklist;
5927 return hasPredecessorHelper(N, Visited, Worklist);
5930 bool SDNode::hasPredecessorHelper(const SDNode *N,
5931 SmallPtrSet<const SDNode *, 32> &Visited,
5932 SmallVector<const SDNode *, 16> &Worklist) const {
5933 if (Visited.empty()) {
5934 Worklist.push_back(this);
5936 // Take a look in the visited set. If we've already encountered this node
5937 // we needn't search further.
5938 if (Visited.count(N))
5942 // Haven't visited N yet. Continue the search.
5943 while (!Worklist.empty()) {
5944 const SDNode *M = Worklist.pop_back_val();
5945 for (unsigned i = 0, e = M->getNumOperands(); i != e; ++i) {
5946 SDNode *Op = M->getOperand(i).getNode();
5947 if (Visited.insert(Op))
5948 Worklist.push_back(Op);
5957 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
5958 assert(Num < NumOperands && "Invalid child # of SDNode!");
5959 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
5962 SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
5963 assert(N->getNumValues() == 1 &&
5964 "Can't unroll a vector with multiple results!");
5966 EVT VT = N->getValueType(0);
5967 unsigned NE = VT.getVectorNumElements();
5968 EVT EltVT = VT.getVectorElementType();
5969 DebugLoc dl = N->getDebugLoc();
5971 SmallVector<SDValue, 8> Scalars;
5972 SmallVector<SDValue, 4> Operands(N->getNumOperands());
5974 // If ResNE is 0, fully unroll the vector op.
5977 else if (NE > ResNE)
5981 for (i= 0; i != NE; ++i) {
5982 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) {
5983 SDValue Operand = N->getOperand(j);
5984 EVT OperandVT = Operand.getValueType();
5985 if (OperandVT.isVector()) {
5986 // A vector operand; extract a single element.
5987 EVT OperandEltVT = OperandVT.getVectorElementType();
5988 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl,
5991 getConstant(i, TLI.getPointerTy()));
5993 // A scalar operand; just use it as is.
5994 Operands[j] = Operand;
5998 switch (N->getOpcode()) {
6000 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6001 &Operands[0], Operands.size()));
6004 Scalars.push_back(getNode(ISD::SELECT, dl, EltVT,
6005 &Operands[0], Operands.size()));
6012 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0],
6013 getShiftAmountOperand(Operands[0].getValueType(),
6016 case ISD::SIGN_EXTEND_INREG:
6017 case ISD::FP_ROUND_INREG: {
6018 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType();
6019 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6021 getValueType(ExtVT)));
6026 for (; i < ResNE; ++i)
6027 Scalars.push_back(getUNDEF(EltVT));
6029 return getNode(ISD::BUILD_VECTOR, dl,
6030 EVT::getVectorVT(*getContext(), EltVT, ResNE),
6031 &Scalars[0], Scalars.size());
6035 /// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a
6036 /// location that is 'Dist' units away from the location that the 'Base' load
6037 /// is loading from.
6038 bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base,
6039 unsigned Bytes, int Dist) const {
6040 if (LD->getChain() != Base->getChain())
6042 EVT VT = LD->getValueType(0);
6043 if (VT.getSizeInBits() / 8 != Bytes)
6046 SDValue Loc = LD->getOperand(1);
6047 SDValue BaseLoc = Base->getOperand(1);
6048 if (Loc.getOpcode() == ISD::FrameIndex) {
6049 if (BaseLoc.getOpcode() != ISD::FrameIndex)
6051 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo();
6052 int FI = cast<FrameIndexSDNode>(Loc)->getIndex();
6053 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex();
6054 int FS = MFI->getObjectSize(FI);
6055 int BFS = MFI->getObjectSize(BFI);
6056 if (FS != BFS || FS != (int)Bytes) return false;
6057 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes);
6061 if (isBaseWithConstantOffset(Loc) && Loc.getOperand(0) == BaseLoc &&
6062 cast<ConstantSDNode>(Loc.getOperand(1))->getSExtValue() == Dist*Bytes)
6065 const GlobalValue *GV1 = NULL;
6066 const GlobalValue *GV2 = NULL;
6067 int64_t Offset1 = 0;
6068 int64_t Offset2 = 0;
6069 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1);
6070 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2);
6071 if (isGA1 && isGA2 && GV1 == GV2)
6072 return Offset1 == (Offset2 + Dist*Bytes);
6077 /// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if
6078 /// it cannot be inferred.
6079 unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const {
6080 // If this is a GlobalAddress + cst, return the alignment.
6081 const GlobalValue *GV;
6082 int64_t GVOffset = 0;
6083 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) {
6084 unsigned PtrWidth = TLI.getPointerTy().getSizeInBits();
6085 APInt KnownZero(PtrWidth, 0), KnownOne(PtrWidth, 0);
6086 llvm::ComputeMaskedBits(const_cast<GlobalValue*>(GV), KnownZero, KnownOne,
6087 TLI.getDataLayout());
6088 unsigned AlignBits = KnownZero.countTrailingOnes();
6089 unsigned Align = AlignBits ? 1 << std::min(31U, AlignBits) : 0;
6091 return MinAlign(Align, GVOffset);
6094 // If this is a direct reference to a stack slot, use information about the
6095 // stack slot's alignment.
6096 int FrameIdx = 1 << 31;
6097 int64_t FrameOffset = 0;
6098 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) {
6099 FrameIdx = FI->getIndex();
6100 } else if (isBaseWithConstantOffset(Ptr) &&
6101 isa<FrameIndexSDNode>(Ptr.getOperand(0))) {
6103 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
6104 FrameOffset = Ptr.getConstantOperandVal(1);
6107 if (FrameIdx != (1 << 31)) {
6108 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo();
6109 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx),
6117 // getAddressSpace - Return the address space this GlobalAddress belongs to.
6118 unsigned GlobalAddressSDNode::getAddressSpace() const {
6119 return getGlobal()->getType()->getAddressSpace();
6123 Type *ConstantPoolSDNode::getType() const {
6124 if (isMachineConstantPoolEntry())
6125 return Val.MachineCPVal->getType();
6126 return Val.ConstVal->getType();
6129 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
6131 unsigned &SplatBitSize,
6133 unsigned MinSplatBits,
6135 EVT VT = getValueType(0);
6136 assert(VT.isVector() && "Expected a vector type");
6137 unsigned sz = VT.getSizeInBits();
6138 if (MinSplatBits > sz)
6141 SplatValue = APInt(sz, 0);
6142 SplatUndef = APInt(sz, 0);
6144 // Get the bits. Bits with undefined values (when the corresponding element
6145 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
6146 // in SplatValue. If any of the values are not constant, give up and return
6148 unsigned int nOps = getNumOperands();
6149 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
6150 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
6152 for (unsigned j = 0; j < nOps; ++j) {
6153 unsigned i = isBigEndian ? nOps-1-j : j;
6154 SDValue OpVal = getOperand(i);
6155 unsigned BitPos = j * EltBitSize;
6157 if (OpVal.getOpcode() == ISD::UNDEF)
6158 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize);
6159 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
6160 SplatValue |= CN->getAPIntValue().zextOrTrunc(EltBitSize).
6161 zextOrTrunc(sz) << BitPos;
6162 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
6163 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
6168 // The build_vector is all constants or undefs. Find the smallest element
6169 // size that splats the vector.
6171 HasAnyUndefs = (SplatUndef != 0);
6174 unsigned HalfSize = sz / 2;
6175 APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize);
6176 APInt LowValue = SplatValue.trunc(HalfSize);
6177 APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize);
6178 APInt LowUndef = SplatUndef.trunc(HalfSize);
6180 // If the two halves do not match (ignoring undef bits), stop here.
6181 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
6182 MinSplatBits > HalfSize)
6185 SplatValue = HighValue | LowValue;
6186 SplatUndef = HighUndef & LowUndef;
6195 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
6196 // Find the first non-undef value in the shuffle mask.
6198 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
6201 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
6203 // Make sure all remaining elements are either undef or the same as the first
6205 for (int Idx = Mask[i]; i != e; ++i)
6206 if (Mask[i] >= 0 && Mask[i] != Idx)
6212 static void checkForCyclesHelper(const SDNode *N,
6213 SmallPtrSet<const SDNode*, 32> &Visited,
6214 SmallPtrSet<const SDNode*, 32> &Checked) {
6215 // If this node has already been checked, don't check it again.
6216 if (Checked.count(N))
6219 // If a node has already been visited on this depth-first walk, reject it as
6221 if (!Visited.insert(N)) {
6222 dbgs() << "Offending node:\n";
6224 errs() << "Detected cycle in SelectionDAG\n";
6228 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6229 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked);
6236 void llvm::checkForCycles(const llvm::SDNode *N) {
6238 assert(N && "Checking nonexistant SDNode");
6239 SmallPtrSet<const SDNode*, 32> visited;
6240 SmallPtrSet<const SDNode*, 32> checked;
6241 checkForCyclesHelper(N, visited, checked);
6245 void llvm::checkForCycles(const llvm::SelectionDAG *DAG) {
6246 checkForCycles(DAG->getRoot().getNode());