1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
13 #include "llvm/CodeGen/SelectionDAG.h"
14 #include "llvm/Constants.h"
15 #include "llvm/Analysis/ValueTracking.h"
16 #include "llvm/GlobalAlias.h"
17 #include "llvm/GlobalVariable.h"
18 #include "llvm/Intrinsics.h"
19 #include "llvm/DerivedTypes.h"
20 #include "llvm/Assembly/Writer.h"
21 #include "llvm/CallingConv.h"
22 #include "llvm/CodeGen/MachineBasicBlock.h"
23 #include "llvm/CodeGen/MachineConstantPool.h"
24 #include "llvm/CodeGen/MachineFrameInfo.h"
25 #include "llvm/CodeGen/MachineModuleInfo.h"
26 #include "llvm/CodeGen/PseudoSourceValue.h"
27 #include "llvm/Target/TargetRegisterInfo.h"
28 #include "llvm/Target/TargetData.h"
29 #include "llvm/Target/TargetLowering.h"
30 #include "llvm/Target/TargetOptions.h"
31 #include "llvm/Target/TargetInstrInfo.h"
32 #include "llvm/Target/TargetMachine.h"
33 #include "llvm/Support/CommandLine.h"
34 #include "llvm/Support/ManagedStatic.h"
35 #include "llvm/Support/MathExtras.h"
36 #include "llvm/Support/raw_ostream.h"
37 #include "llvm/System/Mutex.h"
38 #include "llvm/ADT/SetVector.h"
39 #include "llvm/ADT/SmallPtrSet.h"
40 #include "llvm/ADT/SmallSet.h"
41 #include "llvm/ADT/SmallVector.h"
42 #include "llvm/ADT/StringExtras.h"
47 /// makeVTList - Return an instance of the SDVTList struct initialized with the
48 /// specified members.
49 static SDVTList makeVTList(const MVT *VTs, unsigned NumVTs) {
50 SDVTList Res = {VTs, NumVTs};
54 static const fltSemantics *MVTToAPFloatSemantics(MVT VT) {
55 switch (VT.getSimpleVT()) {
56 default: assert(0 && "Unknown FP format");
57 case MVT::f32: return &APFloat::IEEEsingle;
58 case MVT::f64: return &APFloat::IEEEdouble;
59 case MVT::f80: return &APFloat::x87DoubleExtended;
60 case MVT::f128: return &APFloat::IEEEquad;
61 case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
65 SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {}
67 //===----------------------------------------------------------------------===//
68 // ConstantFPSDNode Class
69 //===----------------------------------------------------------------------===//
71 /// isExactlyValue - We don't rely on operator== working on double values, as
72 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
73 /// As such, this method can be used to do an exact bit-for-bit comparison of
74 /// two floating point values.
75 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
76 return getValueAPF().bitwiseIsEqual(V);
79 bool ConstantFPSDNode::isValueValidForType(MVT VT,
81 assert(VT.isFloatingPoint() && "Can only convert between FP types");
83 // PPC long double cannot be converted to any other type.
84 if (VT == MVT::ppcf128 ||
85 &Val.getSemantics() == &APFloat::PPCDoubleDouble)
88 // convert modifies in place, so make a copy.
89 APFloat Val2 = APFloat(Val);
91 (void) Val2.convert(*MVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
96 //===----------------------------------------------------------------------===//
98 //===----------------------------------------------------------------------===//
100 /// isBuildVectorAllOnes - Return true if the specified node is a
101 /// BUILD_VECTOR where all of the elements are ~0 or undef.
102 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
103 // Look through a bit convert.
104 if (N->getOpcode() == ISD::BIT_CONVERT)
105 N = N->getOperand(0).getNode();
107 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
109 unsigned i = 0, e = N->getNumOperands();
111 // Skip over all of the undef values.
112 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
115 // Do not accept an all-undef vector.
116 if (i == e) return false;
118 // Do not accept build_vectors that aren't all constants or which have non-~0
120 SDValue NotZero = N->getOperand(i);
121 if (isa<ConstantSDNode>(NotZero)) {
122 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue())
124 } else if (isa<ConstantFPSDNode>(NotZero)) {
125 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF().
126 bitcastToAPInt().isAllOnesValue())
131 // Okay, we have at least one ~0 value, check to see if the rest match or are
133 for (++i; i != e; ++i)
134 if (N->getOperand(i) != NotZero &&
135 N->getOperand(i).getOpcode() != ISD::UNDEF)
141 /// isBuildVectorAllZeros - Return true if the specified node is a
142 /// BUILD_VECTOR where all of the elements are 0 or undef.
143 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
144 // Look through a bit convert.
145 if (N->getOpcode() == ISD::BIT_CONVERT)
146 N = N->getOperand(0).getNode();
148 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
150 unsigned i = 0, e = N->getNumOperands();
152 // Skip over all of the undef values.
153 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
156 // Do not accept an all-undef vector.
157 if (i == e) return false;
159 // Do not accept build_vectors that aren't all constants or which have non-0
161 SDValue Zero = N->getOperand(i);
162 if (isa<ConstantSDNode>(Zero)) {
163 if (!cast<ConstantSDNode>(Zero)->isNullValue())
165 } else if (isa<ConstantFPSDNode>(Zero)) {
166 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero())
171 // Okay, we have at least one 0 value, check to see if the rest match or are
173 for (++i; i != e; ++i)
174 if (N->getOperand(i) != Zero &&
175 N->getOperand(i).getOpcode() != ISD::UNDEF)
180 /// isScalarToVector - Return true if the specified node is a
181 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
182 /// element is not an undef.
183 bool ISD::isScalarToVector(const SDNode *N) {
184 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
187 if (N->getOpcode() != ISD::BUILD_VECTOR)
189 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
191 unsigned NumElems = N->getNumOperands();
192 for (unsigned i = 1; i < NumElems; ++i) {
193 SDValue V = N->getOperand(i);
194 if (V.getOpcode() != ISD::UNDEF)
201 /// isDebugLabel - Return true if the specified node represents a debug
202 /// label (i.e. ISD::DBG_LABEL or TargetInstrInfo::DBG_LABEL node).
203 bool ISD::isDebugLabel(const SDNode *N) {
205 if (N->getOpcode() == ISD::DBG_LABEL)
207 if (N->isMachineOpcode() &&
208 N->getMachineOpcode() == TargetInstrInfo::DBG_LABEL)
213 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
214 /// when given the operation for (X op Y).
215 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
216 // To perform this operation, we just need to swap the L and G bits of the
218 unsigned OldL = (Operation >> 2) & 1;
219 unsigned OldG = (Operation >> 1) & 1;
220 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
221 (OldL << 1) | // New G bit
222 (OldG << 2)); // New L bit.
225 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
226 /// 'op' is a valid SetCC operation.
227 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
228 unsigned Operation = Op;
230 Operation ^= 7; // Flip L, G, E bits, but not U.
232 Operation ^= 15; // Flip all of the condition bits.
234 if (Operation > ISD::SETTRUE2)
235 Operation &= ~8; // Don't let N and U bits get set.
237 return ISD::CondCode(Operation);
241 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
242 /// signed operation and 2 if the result is an unsigned comparison. Return zero
243 /// if the operation does not depend on the sign of the input (setne and seteq).
244 static int isSignedOp(ISD::CondCode Opcode) {
246 default: assert(0 && "Illegal integer setcc operation!");
248 case ISD::SETNE: return 0;
252 case ISD::SETGE: return 1;
256 case ISD::SETUGE: return 2;
260 /// getSetCCOrOperation - Return the result of a logical OR between different
261 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
262 /// returns SETCC_INVALID if it is not possible to represent the resultant
264 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
266 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
267 // Cannot fold a signed integer setcc with an unsigned integer setcc.
268 return ISD::SETCC_INVALID;
270 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
272 // If the N and U bits get set then the resultant comparison DOES suddenly
273 // care about orderedness, and is true when ordered.
274 if (Op > ISD::SETTRUE2)
275 Op &= ~16; // Clear the U bit if the N bit is set.
277 // Canonicalize illegal integer setcc's.
278 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
281 return ISD::CondCode(Op);
284 /// getSetCCAndOperation - Return the result of a logical AND between different
285 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
286 /// function returns zero if it is not possible to represent the resultant
288 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
290 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
291 // Cannot fold a signed setcc with an unsigned setcc.
292 return ISD::SETCC_INVALID;
294 // Combine all of the condition bits.
295 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
297 // Canonicalize illegal integer setcc's.
301 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
302 case ISD::SETOEQ: // SETEQ & SETU[LG]E
303 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
304 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
305 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
312 const TargetMachine &SelectionDAG::getTarget() const {
313 return MF->getTarget();
316 //===----------------------------------------------------------------------===//
317 // SDNode Profile Support
318 //===----------------------------------------------------------------------===//
320 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
322 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
326 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
327 /// solely with their pointer.
328 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
329 ID.AddPointer(VTList.VTs);
332 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
334 static void AddNodeIDOperands(FoldingSetNodeID &ID,
335 const SDValue *Ops, unsigned NumOps) {
336 for (; NumOps; --NumOps, ++Ops) {
337 ID.AddPointer(Ops->getNode());
338 ID.AddInteger(Ops->getResNo());
342 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
344 static void AddNodeIDOperands(FoldingSetNodeID &ID,
345 const SDUse *Ops, unsigned NumOps) {
346 for (; NumOps; --NumOps, ++Ops) {
347 ID.AddPointer(Ops->getNode());
348 ID.AddInteger(Ops->getResNo());
352 static void AddNodeIDNode(FoldingSetNodeID &ID,
353 unsigned short OpC, SDVTList VTList,
354 const SDValue *OpList, unsigned N) {
355 AddNodeIDOpcode(ID, OpC);
356 AddNodeIDValueTypes(ID, VTList);
357 AddNodeIDOperands(ID, OpList, N);
360 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
362 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
363 switch (N->getOpcode()) {
364 default: break; // Normal nodes don't need extra info.
366 ID.AddInteger(cast<ARG_FLAGSSDNode>(N)->getArgFlags().getRawBits());
368 case ISD::TargetConstant:
370 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
372 case ISD::TargetConstantFP:
373 case ISD::ConstantFP: {
374 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
377 case ISD::TargetGlobalAddress:
378 case ISD::GlobalAddress:
379 case ISD::TargetGlobalTLSAddress:
380 case ISD::GlobalTLSAddress: {
381 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
382 ID.AddPointer(GA->getGlobal());
383 ID.AddInteger(GA->getOffset());
386 case ISD::BasicBlock:
387 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
390 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
392 case ISD::DBG_STOPPOINT: {
393 const DbgStopPointSDNode *DSP = cast<DbgStopPointSDNode>(N);
394 ID.AddInteger(DSP->getLine());
395 ID.AddInteger(DSP->getColumn());
396 ID.AddPointer(DSP->getCompileUnit());
400 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
402 case ISD::MEMOPERAND: {
403 const MachineMemOperand &MO = cast<MemOperandSDNode>(N)->MO;
407 case ISD::FrameIndex:
408 case ISD::TargetFrameIndex:
409 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
412 case ISD::TargetJumpTable:
413 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
415 case ISD::ConstantPool:
416 case ISD::TargetConstantPool: {
417 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
418 ID.AddInteger(CP->getAlignment());
419 ID.AddInteger(CP->getOffset());
420 if (CP->isMachineConstantPoolEntry())
421 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID);
423 ID.AddPointer(CP->getConstVal());
427 const CallSDNode *Call = cast<CallSDNode>(N);
428 ID.AddInteger(Call->getCallingConv());
429 ID.AddInteger(Call->isVarArg());
433 const LoadSDNode *LD = cast<LoadSDNode>(N);
434 ID.AddInteger(LD->getMemoryVT().getRawBits());
435 ID.AddInteger(LD->getRawSubclassData());
439 const StoreSDNode *ST = cast<StoreSDNode>(N);
440 ID.AddInteger(ST->getMemoryVT().getRawBits());
441 ID.AddInteger(ST->getRawSubclassData());
444 case ISD::ATOMIC_CMP_SWAP:
445 case ISD::ATOMIC_SWAP:
446 case ISD::ATOMIC_LOAD_ADD:
447 case ISD::ATOMIC_LOAD_SUB:
448 case ISD::ATOMIC_LOAD_AND:
449 case ISD::ATOMIC_LOAD_OR:
450 case ISD::ATOMIC_LOAD_XOR:
451 case ISD::ATOMIC_LOAD_NAND:
452 case ISD::ATOMIC_LOAD_MIN:
453 case ISD::ATOMIC_LOAD_MAX:
454 case ISD::ATOMIC_LOAD_UMIN:
455 case ISD::ATOMIC_LOAD_UMAX: {
456 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
457 ID.AddInteger(AT->getMemoryVT().getRawBits());
458 ID.AddInteger(AT->getRawSubclassData());
461 case ISD::VECTOR_SHUFFLE: {
462 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
463 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
465 ID.AddInteger(SVN->getMaskElt(i));
468 } // end switch (N->getOpcode())
471 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
473 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
474 AddNodeIDOpcode(ID, N->getOpcode());
475 // Add the return value info.
476 AddNodeIDValueTypes(ID, N->getVTList());
477 // Add the operand info.
478 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
480 // Handle SDNode leafs with special info.
481 AddNodeIDCustom(ID, N);
484 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
485 /// the CSE map that carries alignment, volatility, indexing mode, and
486 /// extension/truncation information.
488 static inline unsigned
489 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM,
490 bool isVolatile, unsigned Alignment) {
491 assert((ConvType & 3) == ConvType &&
492 "ConvType may not require more than 2 bits!");
493 assert((AM & 7) == AM &&
494 "AM may not require more than 3 bits!");
498 ((Log2_32(Alignment) + 1) << 6);
501 //===----------------------------------------------------------------------===//
502 // SelectionDAG Class
503 //===----------------------------------------------------------------------===//
505 /// doNotCSE - Return true if CSE should not be performed for this node.
506 static bool doNotCSE(SDNode *N) {
507 if (N->getValueType(0) == MVT::Flag)
508 return true; // Never CSE anything that produces a flag.
510 switch (N->getOpcode()) {
512 case ISD::HANDLENODE:
514 case ISD::DBG_STOPPOINT:
517 return true; // Never CSE these nodes.
520 // Check that remaining values produced are not flags.
521 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
522 if (N->getValueType(i) == MVT::Flag)
523 return true; // Never CSE anything that produces a flag.
528 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
530 void SelectionDAG::RemoveDeadNodes() {
531 // Create a dummy node (which is not added to allnodes), that adds a reference
532 // to the root node, preventing it from being deleted.
533 HandleSDNode Dummy(getRoot());
535 SmallVector<SDNode*, 128> DeadNodes;
537 // Add all obviously-dead nodes to the DeadNodes worklist.
538 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
540 DeadNodes.push_back(I);
542 RemoveDeadNodes(DeadNodes);
544 // If the root changed (e.g. it was a dead load, update the root).
545 setRoot(Dummy.getValue());
548 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
549 /// given list, and any nodes that become unreachable as a result.
550 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes,
551 DAGUpdateListener *UpdateListener) {
553 // Process the worklist, deleting the nodes and adding their uses to the
555 while (!DeadNodes.empty()) {
556 SDNode *N = DeadNodes.pop_back_val();
559 UpdateListener->NodeDeleted(N, 0);
561 // Take the node out of the appropriate CSE map.
562 RemoveNodeFromCSEMaps(N);
564 // Next, brutally remove the operand list. This is safe to do, as there are
565 // no cycles in the graph.
566 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
568 SDNode *Operand = Use.getNode();
571 // Now that we removed this operand, see if there are no uses of it left.
572 if (Operand->use_empty())
573 DeadNodes.push_back(Operand);
580 void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){
581 SmallVector<SDNode*, 16> DeadNodes(1, N);
582 RemoveDeadNodes(DeadNodes, UpdateListener);
585 void SelectionDAG::DeleteNode(SDNode *N) {
586 // First take this out of the appropriate CSE map.
587 RemoveNodeFromCSEMaps(N);
589 // Finally, remove uses due to operands of this node, remove from the
590 // AllNodes list, and delete the node.
591 DeleteNodeNotInCSEMaps(N);
594 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
595 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
596 assert(N->use_empty() && "Cannot delete a node that is not dead!");
598 // Drop all of the operands and decrement used node's use counts.
604 void SelectionDAG::DeallocateNode(SDNode *N) {
605 if (N->OperandsNeedDelete)
606 delete[] N->OperandList;
608 // Set the opcode to DELETED_NODE to help catch bugs when node
609 // memory is reallocated.
610 N->NodeType = ISD::DELETED_NODE;
612 NodeAllocator.Deallocate(AllNodes.remove(N));
615 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
616 /// correspond to it. This is useful when we're about to delete or repurpose
617 /// the node. We don't want future request for structurally identical nodes
618 /// to return N anymore.
619 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
621 switch (N->getOpcode()) {
622 case ISD::EntryToken:
623 assert(0 && "EntryToken should not be in CSEMaps!");
625 case ISD::HANDLENODE: return false; // noop.
627 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
628 "Cond code doesn't exist!");
629 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
630 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
632 case ISD::ExternalSymbol:
633 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
635 case ISD::TargetExternalSymbol: {
636 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
637 Erased = TargetExternalSymbols.erase(
638 std::pair<std::string,unsigned char>(ESN->getSymbol(),
639 ESN->getTargetFlags()));
642 case ISD::VALUETYPE: {
643 MVT VT = cast<VTSDNode>(N)->getVT();
644 if (VT.isExtended()) {
645 Erased = ExtendedValueTypeNodes.erase(VT);
647 Erased = ValueTypeNodes[VT.getSimpleVT()] != 0;
648 ValueTypeNodes[VT.getSimpleVT()] = 0;
653 // Remove it from the CSE Map.
654 Erased = CSEMap.RemoveNode(N);
658 // Verify that the node was actually in one of the CSE maps, unless it has a
659 // flag result (which cannot be CSE'd) or is one of the special cases that are
660 // not subject to CSE.
661 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag &&
662 !N->isMachineOpcode() && !doNotCSE(N)) {
665 assert(0 && "Node is not in map!");
671 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
672 /// maps and modified in place. Add it back to the CSE maps, unless an identical
673 /// node already exists, in which case transfer all its users to the existing
674 /// node. This transfer can potentially trigger recursive merging.
677 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N,
678 DAGUpdateListener *UpdateListener) {
679 // For node types that aren't CSE'd, just act as if no identical node
682 SDNode *Existing = CSEMap.GetOrInsertNode(N);
684 // If there was already an existing matching node, use ReplaceAllUsesWith
685 // to replace the dead one with the existing one. This can cause
686 // recursive merging of other unrelated nodes down the line.
687 ReplaceAllUsesWith(N, Existing, UpdateListener);
689 // N is now dead. Inform the listener if it exists and delete it.
691 UpdateListener->NodeDeleted(N, Existing);
692 DeleteNodeNotInCSEMaps(N);
697 // If the node doesn't already exist, we updated it. Inform a listener if
700 UpdateListener->NodeUpdated(N);
703 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
704 /// were replaced with those specified. If this node is never memoized,
705 /// return null, otherwise return a pointer to the slot it would take. If a
706 /// node already exists with these operands, the slot will be non-null.
707 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
712 SDValue Ops[] = { Op };
714 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
715 AddNodeIDCustom(ID, N);
716 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
719 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
720 /// were replaced with those specified. If this node is never memoized,
721 /// return null, otherwise return a pointer to the slot it would take. If a
722 /// node already exists with these operands, the slot will be non-null.
723 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
724 SDValue Op1, SDValue Op2,
729 SDValue Ops[] = { Op1, Op2 };
731 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
732 AddNodeIDCustom(ID, N);
733 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
737 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
738 /// were replaced with those specified. If this node is never memoized,
739 /// return null, otherwise return a pointer to the slot it would take. If a
740 /// node already exists with these operands, the slot will be non-null.
741 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
742 const SDValue *Ops,unsigned NumOps,
748 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
749 AddNodeIDCustom(ID, N);
750 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
753 /// VerifyNode - Sanity check the given node. Aborts if it is invalid.
754 void SelectionDAG::VerifyNode(SDNode *N) {
755 switch (N->getOpcode()) {
758 case ISD::BUILD_PAIR: {
759 MVT VT = N->getValueType(0);
760 assert(N->getNumValues() == 1 && "Too many results!");
761 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
762 "Wrong return type!");
763 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
764 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
765 "Mismatched operand types!");
766 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
767 "Wrong operand type!");
768 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
769 "Wrong return type size");
772 case ISD::BUILD_VECTOR: {
773 assert(N->getNumValues() == 1 && "Too many results!");
774 assert(N->getValueType(0).isVector() && "Wrong return type!");
775 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
776 "Wrong number of operands!");
777 MVT EltVT = N->getValueType(0).getVectorElementType();
778 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I)
779 assert((I->getValueType() == EltVT ||
780 (EltVT.isInteger() && I->getValueType().isInteger() &&
781 EltVT.bitsLE(I->getValueType()))) &&
782 "Wrong operand type!");
788 /// getMVTAlignment - Compute the default alignment value for the
791 unsigned SelectionDAG::getMVTAlignment(MVT VT) const {
792 const Type *Ty = VT == MVT::iPTR ?
793 PointerType::get(Type::Int8Ty, 0) :
796 return TLI.getTargetData()->getABITypeAlignment(Ty);
799 // EntryNode could meaningfully have debug info if we can find it...
800 SelectionDAG::SelectionDAG(TargetLowering &tli, FunctionLoweringInfo &fli)
801 : TLI(tli), FLI(fli), DW(0),
802 EntryNode(ISD::EntryToken, DebugLoc::getUnknownLoc(),
803 getVTList(MVT::Other)), Root(getEntryNode()) {
804 AllNodes.push_back(&EntryNode);
807 void SelectionDAG::init(MachineFunction &mf, MachineModuleInfo *mmi,
814 SelectionDAG::~SelectionDAG() {
818 void SelectionDAG::allnodes_clear() {
819 assert(&*AllNodes.begin() == &EntryNode);
820 AllNodes.remove(AllNodes.begin());
821 while (!AllNodes.empty())
822 DeallocateNode(AllNodes.begin());
825 void SelectionDAG::clear() {
827 OperandAllocator.Reset();
830 ExtendedValueTypeNodes.clear();
831 ExternalSymbols.clear();
832 TargetExternalSymbols.clear();
833 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
834 static_cast<CondCodeSDNode*>(0));
835 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
836 static_cast<SDNode*>(0));
838 EntryNode.UseList = 0;
839 AllNodes.push_back(&EntryNode);
840 Root = getEntryNode();
843 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, MVT VT) {
844 if (Op.getValueType() == VT) return Op;
845 APInt Imm = APInt::getLowBitsSet(Op.getValueSizeInBits(),
847 return getNode(ISD::AND, DL, Op.getValueType(), Op,
848 getConstant(Imm, Op.getValueType()));
851 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
853 SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, MVT VT) {
854 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
856 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT);
857 return getNode(ISD::XOR, DL, VT, Val, NegOne);
860 SDValue SelectionDAG::getConstant(uint64_t Val, MVT VT, bool isT) {
861 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
862 assert((EltVT.getSizeInBits() >= 64 ||
863 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
864 "getConstant with a uint64_t value that doesn't fit in the type!");
865 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
868 SDValue SelectionDAG::getConstant(const APInt &Val, MVT VT, bool isT) {
869 return getConstant(*ConstantInt::get(Val), VT, isT);
872 SDValue SelectionDAG::getConstant(const ConstantInt &Val, MVT VT, bool isT) {
873 assert(VT.isInteger() && "Cannot create FP integer constant!");
875 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
876 assert(Val.getBitWidth() == EltVT.getSizeInBits() &&
877 "APInt size does not match type size!");
879 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
881 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
885 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
887 return SDValue(N, 0);
889 N = NodeAllocator.Allocate<ConstantSDNode>();
890 new (N) ConstantSDNode(isT, &Val, EltVT);
891 CSEMap.InsertNode(N, IP);
892 AllNodes.push_back(N);
895 SDValue Result(N, 0);
897 SmallVector<SDValue, 8> Ops;
898 Ops.assign(VT.getVectorNumElements(), Result);
899 Result = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(),
900 VT, &Ops[0], Ops.size());
905 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
906 return getConstant(Val, TLI.getPointerTy(), isTarget);
910 SDValue SelectionDAG::getConstantFP(const APFloat& V, MVT VT, bool isTarget) {
911 return getConstantFP(*ConstantFP::get(V), VT, isTarget);
914 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, MVT VT, bool isTarget){
915 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
918 VT.isVector() ? VT.getVectorElementType() : VT;
920 // Do the map lookup using the actual bit pattern for the floating point
921 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
922 // we don't have issues with SNANs.
923 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
925 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
929 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
931 return SDValue(N, 0);
933 N = NodeAllocator.Allocate<ConstantFPSDNode>();
934 new (N) ConstantFPSDNode(isTarget, &V, EltVT);
935 CSEMap.InsertNode(N, IP);
936 AllNodes.push_back(N);
939 SDValue Result(N, 0);
941 SmallVector<SDValue, 8> Ops;
942 Ops.assign(VT.getVectorNumElements(), Result);
943 // FIXME DebugLoc info might be appropriate here
944 Result = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(),
945 VT, &Ops[0], Ops.size());
950 SDValue SelectionDAG::getConstantFP(double Val, MVT VT, bool isTarget) {
952 VT.isVector() ? VT.getVectorElementType() : VT;
954 return getConstantFP(APFloat((float)Val), VT, isTarget);
956 return getConstantFP(APFloat(Val), VT, isTarget);
959 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV,
960 MVT VT, int64_t Offset,
964 // Truncate (with sign-extension) the offset value to the pointer size.
965 unsigned BitWidth = TLI.getPointerTy().getSizeInBits();
967 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth));
969 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
971 // If GV is an alias then use the aliasee for determining thread-localness.
972 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
973 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
976 if (GVar && GVar->isThreadLocal())
977 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
979 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
982 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
984 ID.AddInteger(Offset);
986 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
987 return SDValue(E, 0);
988 SDNode *N = NodeAllocator.Allocate<GlobalAddressSDNode>();
989 new (N) GlobalAddressSDNode(isTargetGA, GV, VT, Offset);
990 CSEMap.InsertNode(N, IP);
991 AllNodes.push_back(N);
992 return SDValue(N, 0);
995 SDValue SelectionDAG::getFrameIndex(int FI, MVT VT, bool isTarget) {
996 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
998 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1001 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1002 return SDValue(E, 0);
1003 SDNode *N = NodeAllocator.Allocate<FrameIndexSDNode>();
1004 new (N) FrameIndexSDNode(FI, VT, isTarget);
1005 CSEMap.InsertNode(N, IP);
1006 AllNodes.push_back(N);
1007 return SDValue(N, 0);
1010 SDValue SelectionDAG::getJumpTable(int JTI, MVT VT, bool isTarget){
1011 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1012 FoldingSetNodeID ID;
1013 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1016 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1017 return SDValue(E, 0);
1018 SDNode *N = NodeAllocator.Allocate<JumpTableSDNode>();
1019 new (N) JumpTableSDNode(JTI, VT, isTarget);
1020 CSEMap.InsertNode(N, IP);
1021 AllNodes.push_back(N);
1022 return SDValue(N, 0);
1025 SDValue SelectionDAG::getConstantPool(Constant *C, MVT VT,
1026 unsigned Alignment, int Offset,
1029 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1030 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1031 FoldingSetNodeID ID;
1032 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1033 ID.AddInteger(Alignment);
1034 ID.AddInteger(Offset);
1037 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1038 return SDValue(E, 0);
1039 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>();
1040 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment);
1041 CSEMap.InsertNode(N, IP);
1042 AllNodes.push_back(N);
1043 return SDValue(N, 0);
1047 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, MVT VT,
1048 unsigned Alignment, int Offset,
1051 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1052 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1053 FoldingSetNodeID ID;
1054 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1055 ID.AddInteger(Alignment);
1056 ID.AddInteger(Offset);
1057 C->AddSelectionDAGCSEId(ID);
1059 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1060 return SDValue(E, 0);
1061 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>();
1062 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment);
1063 CSEMap.InsertNode(N, IP);
1064 AllNodes.push_back(N);
1065 return SDValue(N, 0);
1068 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1069 FoldingSetNodeID ID;
1070 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1073 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1074 return SDValue(E, 0);
1075 SDNode *N = NodeAllocator.Allocate<BasicBlockSDNode>();
1076 new (N) BasicBlockSDNode(MBB);
1077 CSEMap.InsertNode(N, IP);
1078 AllNodes.push_back(N);
1079 return SDValue(N, 0);
1082 SDValue SelectionDAG::getArgFlags(ISD::ArgFlagsTy Flags) {
1083 FoldingSetNodeID ID;
1084 AddNodeIDNode(ID, ISD::ARG_FLAGS, getVTList(MVT::Other), 0, 0);
1085 ID.AddInteger(Flags.getRawBits());
1087 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1088 return SDValue(E, 0);
1089 SDNode *N = NodeAllocator.Allocate<ARG_FLAGSSDNode>();
1090 new (N) ARG_FLAGSSDNode(Flags);
1091 CSEMap.InsertNode(N, IP);
1092 AllNodes.push_back(N);
1093 return SDValue(N, 0);
1096 SDValue SelectionDAG::getValueType(MVT VT) {
1097 if (VT.isSimple() && (unsigned)VT.getSimpleVT() >= ValueTypeNodes.size())
1098 ValueTypeNodes.resize(VT.getSimpleVT()+1);
1100 SDNode *&N = VT.isExtended() ?
1101 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT()];
1103 if (N) return SDValue(N, 0);
1104 N = NodeAllocator.Allocate<VTSDNode>();
1105 new (N) VTSDNode(VT);
1106 AllNodes.push_back(N);
1107 return SDValue(N, 0);
1110 SDValue SelectionDAG::getExternalSymbol(const char *Sym, MVT VT) {
1111 SDNode *&N = ExternalSymbols[Sym];
1112 if (N) return SDValue(N, 0);
1113 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1114 new (N) ExternalSymbolSDNode(false, Sym, 0, VT);
1115 AllNodes.push_back(N);
1116 return SDValue(N, 0);
1119 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, MVT VT,
1120 unsigned char TargetFlags) {
1122 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1124 if (N) return SDValue(N, 0);
1125 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1126 new (N) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1127 AllNodes.push_back(N);
1128 return SDValue(N, 0);
1131 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1132 if ((unsigned)Cond >= CondCodeNodes.size())
1133 CondCodeNodes.resize(Cond+1);
1135 if (CondCodeNodes[Cond] == 0) {
1136 CondCodeSDNode *N = NodeAllocator.Allocate<CondCodeSDNode>();
1137 new (N) CondCodeSDNode(Cond);
1138 CondCodeNodes[Cond] = N;
1139 AllNodes.push_back(N);
1141 return SDValue(CondCodeNodes[Cond], 0);
1144 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1145 // the shuffle mask M that point at N1 to point at N2, and indices that point
1146 // N2 to point at N1.
1147 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1149 int NElts = M.size();
1150 for (int i = 0; i != NElts; ++i) {
1158 SDValue SelectionDAG::getVectorShuffle(MVT VT, DebugLoc dl, SDValue N1,
1159 SDValue N2, const int *Mask) {
1160 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE");
1161 assert(VT.isVector() && N1.getValueType().isVector() &&
1162 "Vector Shuffle VTs must be a vectors");
1163 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType()
1164 && "Vector Shuffle VTs must have same element type");
1166 // Canonicalize shuffle undef, undef -> undef
1167 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1170 // Validate that all indices in Mask are within the range of the elements
1171 // input to the shuffle.
1172 unsigned NElts = VT.getVectorNumElements();
1173 SmallVector<int, 8> MaskVec;
1174 for (unsigned i = 0; i != NElts; ++i) {
1175 assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1176 MaskVec.push_back(Mask[i]);
1179 // Canonicalize shuffle v, v -> v, undef
1182 for (unsigned i = 0; i != NElts; ++i)
1183 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1186 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1187 if (N1.getOpcode() == ISD::UNDEF)
1188 commuteShuffle(N1, N2, MaskVec);
1190 // Canonicalize all index into lhs, -> shuffle lhs, undef
1191 // Canonicalize all index into rhs, -> shuffle rhs, undef
1192 bool AllLHS = true, AllRHS = true;
1193 bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1194 for (unsigned i = 0; i != NElts; ++i) {
1195 if (MaskVec[i] >= (int)NElts) {
1200 } else if (MaskVec[i] >= 0) {
1204 if (AllLHS && AllRHS)
1205 return getUNDEF(VT);
1206 if (AllLHS && !N2Undef)
1210 commuteShuffle(N1, N2, MaskVec);
1213 // If Identity shuffle, or all shuffle in to undef, return that node.
1214 bool AllUndef = true;
1215 bool Identity = true;
1216 for (unsigned i = 0; i != NElts; ++i) {
1217 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1218 if (MaskVec[i] >= 0) AllUndef = false;
1223 return getUNDEF(VT);
1225 FoldingSetNodeID ID;
1226 SDValue Ops[2] = { N1, N2 };
1227 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2);
1228 for (unsigned i = 0; i != NElts; ++i)
1229 ID.AddInteger(MaskVec[i]);
1232 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1233 return SDValue(E, 0);
1235 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1236 // SDNode doesn't have access to it. This memory will be "leaked" when
1237 // the node is deallocated, but recovered when the NodeAllocator is released.
1238 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1239 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1241 ShuffleVectorSDNode *N = NodeAllocator.Allocate<ShuffleVectorSDNode>();
1242 new (N) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc);
1243 CSEMap.InsertNode(N, IP);
1244 AllNodes.push_back(N);
1245 return SDValue(N, 0);
1248 SDValue SelectionDAG::getConvertRndSat(MVT VT, DebugLoc dl,
1249 SDValue Val, SDValue DTy,
1250 SDValue STy, SDValue Rnd, SDValue Sat,
1251 ISD::CvtCode Code) {
1252 // If the src and dest types are the same and the conversion is between
1253 // integer types of the same sign or two floats, no conversion is necessary.
1255 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1258 FoldingSetNodeID ID;
1260 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1261 return SDValue(E, 0);
1262 CvtRndSatSDNode *N = NodeAllocator.Allocate<CvtRndSatSDNode>();
1263 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1264 new (N) CvtRndSatSDNode(VT, dl, Ops, 5, Code);
1265 CSEMap.InsertNode(N, IP);
1266 AllNodes.push_back(N);
1267 return SDValue(N, 0);
1270 SDValue SelectionDAG::getRegister(unsigned RegNo, MVT VT) {
1271 FoldingSetNodeID ID;
1272 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1273 ID.AddInteger(RegNo);
1275 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1276 return SDValue(E, 0);
1277 SDNode *N = NodeAllocator.Allocate<RegisterSDNode>();
1278 new (N) RegisterSDNode(RegNo, VT);
1279 CSEMap.InsertNode(N, IP);
1280 AllNodes.push_back(N);
1281 return SDValue(N, 0);
1284 SDValue SelectionDAG::getDbgStopPoint(DebugLoc DL, SDValue Root,
1285 unsigned Line, unsigned Col,
1287 SDNode *N = NodeAllocator.Allocate<DbgStopPointSDNode>();
1288 new (N) DbgStopPointSDNode(Root, Line, Col, CU);
1290 AllNodes.push_back(N);
1291 return SDValue(N, 0);
1294 SDValue SelectionDAG::getLabel(unsigned Opcode, DebugLoc dl,
1297 FoldingSetNodeID ID;
1298 SDValue Ops[] = { Root };
1299 AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), &Ops[0], 1);
1300 ID.AddInteger(LabelID);
1302 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1303 return SDValue(E, 0);
1304 SDNode *N = NodeAllocator.Allocate<LabelSDNode>();
1305 new (N) LabelSDNode(Opcode, dl, Root, LabelID);
1306 CSEMap.InsertNode(N, IP);
1307 AllNodes.push_back(N);
1308 return SDValue(N, 0);
1311 SDValue SelectionDAG::getSrcValue(const Value *V) {
1312 assert((!V || isa<PointerType>(V->getType())) &&
1313 "SrcValue is not a pointer?");
1315 FoldingSetNodeID ID;
1316 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1320 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1321 return SDValue(E, 0);
1323 SDNode *N = NodeAllocator.Allocate<SrcValueSDNode>();
1324 new (N) SrcValueSDNode(V);
1325 CSEMap.InsertNode(N, IP);
1326 AllNodes.push_back(N);
1327 return SDValue(N, 0);
1330 SDValue SelectionDAG::getMemOperand(const MachineMemOperand &MO) {
1332 const Value *v = MO.getValue();
1333 assert((!v || isa<PointerType>(v->getType())) &&
1334 "SrcValue is not a pointer?");
1337 FoldingSetNodeID ID;
1338 AddNodeIDNode(ID, ISD::MEMOPERAND, getVTList(MVT::Other), 0, 0);
1342 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1343 return SDValue(E, 0);
1345 SDNode *N = NodeAllocator.Allocate<MemOperandSDNode>();
1346 new (N) MemOperandSDNode(MO);
1347 CSEMap.InsertNode(N, IP);
1348 AllNodes.push_back(N);
1349 return SDValue(N, 0);
1352 /// getShiftAmountOperand - Return the specified value casted to
1353 /// the target's desired shift amount type.
1354 SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) {
1355 MVT OpTy = Op.getValueType();
1356 MVT ShTy = TLI.getShiftAmountTy();
1357 if (OpTy == ShTy || OpTy.isVector()) return Op;
1359 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1360 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op);
1363 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1364 /// specified value type.
1365 SDValue SelectionDAG::CreateStackTemporary(MVT VT, unsigned minAlign) {
1366 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1367 unsigned ByteSize = VT.getStoreSizeInBits()/8;
1368 const Type *Ty = VT.getTypeForMVT();
1369 unsigned StackAlign =
1370 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign);
1372 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign);
1373 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1376 /// CreateStackTemporary - Create a stack temporary suitable for holding
1377 /// either of the specified value types.
1378 SDValue SelectionDAG::CreateStackTemporary(MVT VT1, MVT VT2) {
1379 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1380 VT2.getStoreSizeInBits())/8;
1381 const Type *Ty1 = VT1.getTypeForMVT();
1382 const Type *Ty2 = VT2.getTypeForMVT();
1383 const TargetData *TD = TLI.getTargetData();
1384 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1385 TD->getPrefTypeAlignment(Ty2));
1387 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1388 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align);
1389 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1392 SDValue SelectionDAG::FoldSetCC(MVT VT, SDValue N1,
1393 SDValue N2, ISD::CondCode Cond, DebugLoc dl) {
1394 // These setcc operations always fold.
1398 case ISD::SETFALSE2: return getConstant(0, VT);
1400 case ISD::SETTRUE2: return getConstant(1, VT);
1412 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1416 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1417 const APInt &C2 = N2C->getAPIntValue();
1418 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1419 const APInt &C1 = N1C->getAPIntValue();
1422 default: assert(0 && "Unknown integer setcc!");
1423 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1424 case ISD::SETNE: return getConstant(C1 != C2, VT);
1425 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1426 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1427 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1428 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1429 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1430 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1431 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1432 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1436 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1437 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1438 // No compile time operations on this type yet.
1439 if (N1C->getValueType(0) == MVT::ppcf128)
1442 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1445 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1446 return getUNDEF(VT);
1448 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1449 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1450 return getUNDEF(VT);
1452 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1453 R==APFloat::cmpLessThan, VT);
1454 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1455 return getUNDEF(VT);
1457 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1458 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1459 return getUNDEF(VT);
1461 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1462 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1463 return getUNDEF(VT);
1465 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1466 R==APFloat::cmpEqual, VT);
1467 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1468 return getUNDEF(VT);
1470 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1471 R==APFloat::cmpEqual, VT);
1472 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1473 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1474 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1475 R==APFloat::cmpEqual, VT);
1476 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1477 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1478 R==APFloat::cmpLessThan, VT);
1479 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1480 R==APFloat::cmpUnordered, VT);
1481 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1482 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1485 // Ensure that the constant occurs on the RHS.
1486 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1490 // Could not fold it.
1494 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1495 /// use this predicate to simplify operations downstream.
1496 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1497 unsigned BitWidth = Op.getValueSizeInBits();
1498 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1501 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1502 /// this predicate to simplify operations downstream. Mask is known to be zero
1503 /// for bits that V cannot have.
1504 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1505 unsigned Depth) const {
1506 APInt KnownZero, KnownOne;
1507 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
1508 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1509 return (KnownZero & Mask) == Mask;
1512 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1513 /// known to be either zero or one and return them in the KnownZero/KnownOne
1514 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1516 void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask,
1517 APInt &KnownZero, APInt &KnownOne,
1518 unsigned Depth) const {
1519 unsigned BitWidth = Mask.getBitWidth();
1520 assert(BitWidth == Op.getValueType().getSizeInBits() &&
1521 "Mask size mismatches value type size!");
1523 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1524 if (Depth == 6 || Mask == 0)
1525 return; // Limit search depth.
1527 APInt KnownZero2, KnownOne2;
1529 switch (Op.getOpcode()) {
1531 // We know all of the bits for a constant!
1532 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask;
1533 KnownZero = ~KnownOne & Mask;
1536 // If either the LHS or the RHS are Zero, the result is zero.
1537 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1538 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero,
1539 KnownZero2, KnownOne2, Depth+1);
1540 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1541 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1543 // Output known-1 bits are only known if set in both the LHS & RHS.
1544 KnownOne &= KnownOne2;
1545 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1546 KnownZero |= KnownZero2;
1549 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1550 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne,
1551 KnownZero2, KnownOne2, Depth+1);
1552 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1553 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1555 // Output known-0 bits are only known if clear in both the LHS & RHS.
1556 KnownZero &= KnownZero2;
1557 // Output known-1 are known to be set if set in either the LHS | RHS.
1558 KnownOne |= KnownOne2;
1561 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1562 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
1563 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1564 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1566 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1567 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1568 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1569 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1570 KnownZero = KnownZeroOut;
1574 APInt Mask2 = APInt::getAllOnesValue(BitWidth);
1575 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1);
1576 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1577 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1578 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1580 // If low bits are zero in either operand, output low known-0 bits.
1581 // Also compute a conserative estimate for high known-0 bits.
1582 // More trickiness is possible, but this is sufficient for the
1583 // interesting case of alignment computation.
1585 unsigned TrailZ = KnownZero.countTrailingOnes() +
1586 KnownZero2.countTrailingOnes();
1587 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1588 KnownZero2.countLeadingOnes(),
1589 BitWidth) - BitWidth;
1591 TrailZ = std::min(TrailZ, BitWidth);
1592 LeadZ = std::min(LeadZ, BitWidth);
1593 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1594 APInt::getHighBitsSet(BitWidth, LeadZ);
1599 // For the purposes of computing leading zeros we can conservatively
1600 // treat a udiv as a logical right shift by the power of 2 known to
1601 // be less than the denominator.
1602 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1603 ComputeMaskedBits(Op.getOperand(0),
1604 AllOnes, KnownZero2, KnownOne2, Depth+1);
1605 unsigned LeadZ = KnownZero2.countLeadingOnes();
1609 ComputeMaskedBits(Op.getOperand(1),
1610 AllOnes, KnownZero2, KnownOne2, Depth+1);
1611 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1612 if (RHSUnknownLeadingOnes != BitWidth)
1613 LeadZ = std::min(BitWidth,
1614 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1616 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask;
1620 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1);
1621 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1);
1622 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1623 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1625 // Only known if known in both the LHS and RHS.
1626 KnownOne &= KnownOne2;
1627 KnownZero &= KnownZero2;
1629 case ISD::SELECT_CC:
1630 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1);
1631 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1);
1632 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1633 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1635 // Only known if known in both the LHS and RHS.
1636 KnownOne &= KnownOne2;
1637 KnownZero &= KnownZero2;
1645 if (Op.getResNo() != 1)
1647 // The boolean result conforms to getBooleanContents. Fall through.
1649 // If we know the result of a setcc has the top bits zero, use this info.
1650 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent &&
1652 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1655 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1656 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1657 unsigned ShAmt = SA->getZExtValue();
1659 // If the shift count is an invalid immediate, don't do anything.
1660 if (ShAmt >= BitWidth)
1663 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt),
1664 KnownZero, KnownOne, Depth+1);
1665 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1666 KnownZero <<= ShAmt;
1668 // low bits known zero.
1669 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1673 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1674 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1675 unsigned ShAmt = SA->getZExtValue();
1677 // If the shift count is an invalid immediate, don't do anything.
1678 if (ShAmt >= BitWidth)
1681 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt),
1682 KnownZero, KnownOne, Depth+1);
1683 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1684 KnownZero = KnownZero.lshr(ShAmt);
1685 KnownOne = KnownOne.lshr(ShAmt);
1687 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1688 KnownZero |= HighBits; // High bits known zero.
1692 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1693 unsigned ShAmt = SA->getZExtValue();
1695 // If the shift count is an invalid immediate, don't do anything.
1696 if (ShAmt >= BitWidth)
1699 APInt InDemandedMask = (Mask << ShAmt);
1700 // If any of the demanded bits are produced by the sign extension, we also
1701 // demand the input sign bit.
1702 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1703 if (HighBits.getBoolValue())
1704 InDemandedMask |= APInt::getSignBit(BitWidth);
1706 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne,
1708 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1709 KnownZero = KnownZero.lshr(ShAmt);
1710 KnownOne = KnownOne.lshr(ShAmt);
1712 // Handle the sign bits.
1713 APInt SignBit = APInt::getSignBit(BitWidth);
1714 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1716 if (KnownZero.intersects(SignBit)) {
1717 KnownZero |= HighBits; // New bits are known zero.
1718 } else if (KnownOne.intersects(SignBit)) {
1719 KnownOne |= HighBits; // New bits are known one.
1723 case ISD::SIGN_EXTEND_INREG: {
1724 MVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1725 unsigned EBits = EVT.getSizeInBits();
1727 // Sign extension. Compute the demanded bits in the result that are not
1728 // present in the input.
1729 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask;
1731 APInt InSignBit = APInt::getSignBit(EBits);
1732 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits);
1734 // If the sign extended bits are demanded, we know that the sign
1736 InSignBit.zext(BitWidth);
1737 if (NewBits.getBoolValue())
1738 InputDemandedBits |= InSignBit;
1740 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits,
1741 KnownZero, KnownOne, Depth+1);
1742 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1744 // If the sign bit of the input is known set or clear, then we know the
1745 // top bits of the result.
1746 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1747 KnownZero |= NewBits;
1748 KnownOne &= ~NewBits;
1749 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1750 KnownOne |= NewBits;
1751 KnownZero &= ~NewBits;
1752 } else { // Input sign bit unknown
1753 KnownZero &= ~NewBits;
1754 KnownOne &= ~NewBits;
1761 unsigned LowBits = Log2_32(BitWidth)+1;
1762 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1767 if (ISD::isZEXTLoad(Op.getNode())) {
1768 LoadSDNode *LD = cast<LoadSDNode>(Op);
1769 MVT VT = LD->getMemoryVT();
1770 unsigned MemBits = VT.getSizeInBits();
1771 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask;
1775 case ISD::ZERO_EXTEND: {
1776 MVT InVT = Op.getOperand(0).getValueType();
1777 unsigned InBits = InVT.getSizeInBits();
1778 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1779 APInt InMask = Mask;
1780 InMask.trunc(InBits);
1781 KnownZero.trunc(InBits);
1782 KnownOne.trunc(InBits);
1783 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1784 KnownZero.zext(BitWidth);
1785 KnownOne.zext(BitWidth);
1786 KnownZero |= NewBits;
1789 case ISD::SIGN_EXTEND: {
1790 MVT InVT = Op.getOperand(0).getValueType();
1791 unsigned InBits = InVT.getSizeInBits();
1792 APInt InSignBit = APInt::getSignBit(InBits);
1793 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1794 APInt InMask = Mask;
1795 InMask.trunc(InBits);
1797 // If any of the sign extended bits are demanded, we know that the sign
1798 // bit is demanded. Temporarily set this bit in the mask for our callee.
1799 if (NewBits.getBoolValue())
1800 InMask |= InSignBit;
1802 KnownZero.trunc(InBits);
1803 KnownOne.trunc(InBits);
1804 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1806 // Note if the sign bit is known to be zero or one.
1807 bool SignBitKnownZero = KnownZero.isNegative();
1808 bool SignBitKnownOne = KnownOne.isNegative();
1809 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1810 "Sign bit can't be known to be both zero and one!");
1812 // If the sign bit wasn't actually demanded by our caller, we don't
1813 // want it set in the KnownZero and KnownOne result values. Reset the
1814 // mask and reapply it to the result values.
1816 InMask.trunc(InBits);
1817 KnownZero &= InMask;
1820 KnownZero.zext(BitWidth);
1821 KnownOne.zext(BitWidth);
1823 // If the sign bit is known zero or one, the top bits match.
1824 if (SignBitKnownZero)
1825 KnownZero |= NewBits;
1826 else if (SignBitKnownOne)
1827 KnownOne |= NewBits;
1830 case ISD::ANY_EXTEND: {
1831 MVT InVT = Op.getOperand(0).getValueType();
1832 unsigned InBits = InVT.getSizeInBits();
1833 APInt InMask = Mask;
1834 InMask.trunc(InBits);
1835 KnownZero.trunc(InBits);
1836 KnownOne.trunc(InBits);
1837 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1838 KnownZero.zext(BitWidth);
1839 KnownOne.zext(BitWidth);
1842 case ISD::TRUNCATE: {
1843 MVT InVT = Op.getOperand(0).getValueType();
1844 unsigned InBits = InVT.getSizeInBits();
1845 APInt InMask = Mask;
1846 InMask.zext(InBits);
1847 KnownZero.zext(InBits);
1848 KnownOne.zext(InBits);
1849 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1850 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1851 KnownZero.trunc(BitWidth);
1852 KnownOne.trunc(BitWidth);
1855 case ISD::AssertZext: {
1856 MVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1857 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1858 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
1860 KnownZero |= (~InMask) & Mask;
1864 // All bits are zero except the low bit.
1865 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1869 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
1870 // We know that the top bits of C-X are clear if X contains less bits
1871 // than C (i.e. no wrap-around can happen). For example, 20-X is
1872 // positive if we can prove that X is >= 0 and < 16.
1873 if (CLHS->getAPIntValue().isNonNegative()) {
1874 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
1875 // NLZ can't be BitWidth with no sign bit
1876 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
1877 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2,
1880 // If all of the MaskV bits are known to be zero, then we know the
1881 // output top bits are zero, because we now know that the output is
1883 if ((KnownZero2 & MaskV) == MaskV) {
1884 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
1885 // Top bits known zero.
1886 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask;
1893 // Output known-0 bits are known if clear or set in both the low clear bits
1894 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
1895 // low 3 bits clear.
1896 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes());
1897 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1898 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1899 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
1901 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1);
1902 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1903 KnownZeroOut = std::min(KnownZeroOut,
1904 KnownZero2.countTrailingOnes());
1906 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
1910 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1911 const APInt &RA = Rem->getAPIntValue();
1912 if (RA.isPowerOf2() || (-RA).isPowerOf2()) {
1913 APInt LowBits = RA.isStrictlyPositive() ? (RA - 1) : ~RA;
1914 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
1915 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1);
1917 // If the sign bit of the first operand is zero, the sign bit of
1918 // the result is zero. If the first operand has no one bits below
1919 // the second operand's single 1 bit, its sign will be zero.
1920 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
1921 KnownZero2 |= ~LowBits;
1923 KnownZero |= KnownZero2 & Mask;
1925 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1930 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1931 const APInt &RA = Rem->getAPIntValue();
1932 if (RA.isPowerOf2()) {
1933 APInt LowBits = (RA - 1);
1934 APInt Mask2 = LowBits & Mask;
1935 KnownZero |= ~LowBits & Mask;
1936 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1);
1937 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1942 // Since the result is less than or equal to either operand, any leading
1943 // zero bits in either operand must also exist in the result.
1944 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1945 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne,
1947 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2,
1950 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
1951 KnownZero2.countLeadingOnes());
1953 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
1957 // Allow the target to implement this method for its nodes.
1958 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) {
1959 case ISD::INTRINSIC_WO_CHAIN:
1960 case ISD::INTRINSIC_W_CHAIN:
1961 case ISD::INTRINSIC_VOID:
1962 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this);
1968 /// ComputeNumSignBits - Return the number of times the sign bit of the
1969 /// register is replicated into the other bits. We know that at least 1 bit
1970 /// is always equal to the sign bit (itself), but other cases can give us
1971 /// information. For example, immediately after an "SRA X, 2", we know that
1972 /// the top 3 bits are all equal to each other, so we return 3.
1973 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
1974 MVT VT = Op.getValueType();
1975 assert(VT.isInteger() && "Invalid VT!");
1976 unsigned VTBits = VT.getSizeInBits();
1978 unsigned FirstAnswer = 1;
1981 return 1; // Limit search depth.
1983 switch (Op.getOpcode()) {
1985 case ISD::AssertSext:
1986 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1987 return VTBits-Tmp+1;
1988 case ISD::AssertZext:
1989 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1992 case ISD::Constant: {
1993 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
1994 // If negative, return # leading ones.
1995 if (Val.isNegative())
1996 return Val.countLeadingOnes();
1998 // Return # leading zeros.
1999 return Val.countLeadingZeros();
2002 case ISD::SIGN_EXTEND:
2003 Tmp = VTBits-Op.getOperand(0).getValueType().getSizeInBits();
2004 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2006 case ISD::SIGN_EXTEND_INREG:
2007 // Max of the input and what this extends.
2008 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2011 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2012 return std::max(Tmp, Tmp2);
2015 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2016 // SRA X, C -> adds C sign bits.
2017 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2018 Tmp += C->getZExtValue();
2019 if (Tmp > VTBits) Tmp = VTBits;
2023 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2024 // shl destroys sign bits.
2025 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2026 if (C->getZExtValue() >= VTBits || // Bad shift.
2027 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
2028 return Tmp - C->getZExtValue();
2033 case ISD::XOR: // NOT is handled here.
2034 // Logical binary ops preserve the number of sign bits at the worst.
2035 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2037 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2038 FirstAnswer = std::min(Tmp, Tmp2);
2039 // We computed what we know about the sign bits as our first
2040 // answer. Now proceed to the generic code that uses
2041 // ComputeMaskedBits, and pick whichever answer is better.
2046 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2047 if (Tmp == 1) return 1; // Early out.
2048 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2049 return std::min(Tmp, Tmp2);
2057 if (Op.getResNo() != 1)
2059 // The boolean result conforms to getBooleanContents. Fall through.
2061 // If setcc returns 0/-1, all bits are sign bits.
2062 if (TLI.getBooleanContents() ==
2063 TargetLowering::ZeroOrNegativeOneBooleanContent)
2068 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2069 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2071 // Handle rotate right by N like a rotate left by 32-N.
2072 if (Op.getOpcode() == ISD::ROTR)
2073 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2075 // If we aren't rotating out all of the known-in sign bits, return the
2076 // number that are left. This handles rotl(sext(x), 1) for example.
2077 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2078 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2082 // Add can have at most one carry bit. Thus we know that the output
2083 // is, at worst, one more bit than the inputs.
2084 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2085 if (Tmp == 1) return 1; // Early out.
2087 // Special case decrementing a value (ADD X, -1):
2088 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2089 if (CRHS->isAllOnesValue()) {
2090 APInt KnownZero, KnownOne;
2091 APInt Mask = APInt::getAllOnesValue(VTBits);
2092 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
2094 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2096 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2099 // If we are subtracting one from a positive number, there is no carry
2100 // out of the result.
2101 if (KnownZero.isNegative())
2105 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2106 if (Tmp2 == 1) return 1;
2107 return std::min(Tmp, Tmp2)-1;
2111 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2112 if (Tmp2 == 1) return 1;
2115 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2116 if (CLHS->isNullValue()) {
2117 APInt KnownZero, KnownOne;
2118 APInt Mask = APInt::getAllOnesValue(VTBits);
2119 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
2120 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2122 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2125 // If the input is known to be positive (the sign bit is known clear),
2126 // the output of the NEG has the same number of sign bits as the input.
2127 if (KnownZero.isNegative())
2130 // Otherwise, we treat this like a SUB.
2133 // Sub can have at most one carry bit. Thus we know that the output
2134 // is, at worst, one more bit than the inputs.
2135 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2136 if (Tmp == 1) return 1; // Early out.
2137 return std::min(Tmp, Tmp2)-1;
2140 // FIXME: it's tricky to do anything useful for this, but it is an important
2141 // case for targets like X86.
2145 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2146 if (Op.getOpcode() == ISD::LOAD) {
2147 LoadSDNode *LD = cast<LoadSDNode>(Op);
2148 unsigned ExtType = LD->getExtensionType();
2151 case ISD::SEXTLOAD: // '17' bits known
2152 Tmp = LD->getMemoryVT().getSizeInBits();
2153 return VTBits-Tmp+1;
2154 case ISD::ZEXTLOAD: // '16' bits known
2155 Tmp = LD->getMemoryVT().getSizeInBits();
2160 // Allow the target to implement this method for its nodes.
2161 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2162 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2163 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2164 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2165 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2166 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2169 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2170 // use this information.
2171 APInt KnownZero, KnownOne;
2172 APInt Mask = APInt::getAllOnesValue(VTBits);
2173 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
2175 if (KnownZero.isNegative()) { // sign bit is 0
2177 } else if (KnownOne.isNegative()) { // sign bit is 1;
2184 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2185 // the number of identical bits in the top of the input value.
2187 Mask <<= Mask.getBitWidth()-VTBits;
2188 // Return # leading zeros. We use 'min' here in case Val was zero before
2189 // shifting. We don't want to return '64' as for an i32 "0".
2190 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2194 bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const {
2195 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op);
2196 if (!GA) return false;
2197 if (GA->getOffset() != 0) return false;
2198 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal());
2199 if (!GV) return false;
2200 MachineModuleInfo *MMI = getMachineModuleInfo();
2201 return MMI && MMI->hasDebugInfo();
2205 /// getShuffleScalarElt - Returns the scalar element that will make up the ith
2206 /// element of the result of the vector shuffle.
2207 SDValue SelectionDAG::getShuffleScalarElt(const ShuffleVectorSDNode *N,
2209 MVT VT = N->getValueType(0);
2210 DebugLoc dl = N->getDebugLoc();
2211 if (N->getMaskElt(i) < 0)
2212 return getUNDEF(VT.getVectorElementType());
2213 unsigned Index = N->getMaskElt(i);
2214 unsigned NumElems = VT.getVectorNumElements();
2215 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1);
2218 if (V.getOpcode() == ISD::BIT_CONVERT) {
2219 V = V.getOperand(0);
2220 MVT VVT = V.getValueType();
2221 if (!VVT.isVector() || VVT.getVectorNumElements() != (unsigned)NumElems)
2224 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR)
2225 return (Index == 0) ? V.getOperand(0)
2226 : getUNDEF(VT.getVectorElementType());
2227 if (V.getOpcode() == ISD::BUILD_VECTOR)
2228 return V.getOperand(Index);
2229 if (const ShuffleVectorSDNode *SVN = dyn_cast<ShuffleVectorSDNode>(V))
2230 return getShuffleScalarElt(SVN, Index);
2235 /// getNode - Gets or creates the specified node.
2237 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT) {
2238 FoldingSetNodeID ID;
2239 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2241 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2242 return SDValue(E, 0);
2243 SDNode *N = NodeAllocator.Allocate<SDNode>();
2244 new (N) SDNode(Opcode, DL, getVTList(VT));
2245 CSEMap.InsertNode(N, IP);
2247 AllNodes.push_back(N);
2251 return SDValue(N, 0);
2254 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
2255 MVT VT, SDValue Operand) {
2256 // Constant fold unary operations with an integer constant operand.
2257 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2258 const APInt &Val = C->getAPIntValue();
2259 unsigned BitWidth = VT.getSizeInBits();
2262 case ISD::SIGN_EXTEND:
2263 return getConstant(APInt(Val).sextOrTrunc(BitWidth), VT);
2264 case ISD::ANY_EXTEND:
2265 case ISD::ZERO_EXTEND:
2267 return getConstant(APInt(Val).zextOrTrunc(BitWidth), VT);
2268 case ISD::UINT_TO_FP:
2269 case ISD::SINT_TO_FP: {
2270 const uint64_t zero[] = {0, 0};
2271 // No compile time operations on this type.
2272 if (VT==MVT::ppcf128)
2274 APFloat apf = APFloat(APInt(BitWidth, 2, zero));
2275 (void)apf.convertFromAPInt(Val,
2276 Opcode==ISD::SINT_TO_FP,
2277 APFloat::rmNearestTiesToEven);
2278 return getConstantFP(apf, VT);
2280 case ISD::BIT_CONVERT:
2281 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2282 return getConstantFP(Val.bitsToFloat(), VT);
2283 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2284 return getConstantFP(Val.bitsToDouble(), VT);
2287 return getConstant(Val.byteSwap(), VT);
2289 return getConstant(Val.countPopulation(), VT);
2291 return getConstant(Val.countLeadingZeros(), VT);
2293 return getConstant(Val.countTrailingZeros(), VT);
2297 // Constant fold unary operations with a floating point constant operand.
2298 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2299 APFloat V = C->getValueAPF(); // make copy
2300 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) {
2304 return getConstantFP(V, VT);
2307 return getConstantFP(V, VT);
2309 case ISD::FP_EXTEND: {
2311 // This can return overflow, underflow, or inexact; we don't care.
2312 // FIXME need to be more flexible about rounding mode.
2313 (void)V.convert(*MVTToAPFloatSemantics(VT),
2314 APFloat::rmNearestTiesToEven, &ignored);
2315 return getConstantFP(V, VT);
2317 case ISD::FP_TO_SINT:
2318 case ISD::FP_TO_UINT: {
2321 assert(integerPartWidth >= 64);
2322 // FIXME need to be more flexible about rounding mode.
2323 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2324 Opcode==ISD::FP_TO_SINT,
2325 APFloat::rmTowardZero, &ignored);
2326 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2328 APInt api(VT.getSizeInBits(), 2, x);
2329 return getConstant(api, VT);
2331 case ISD::BIT_CONVERT:
2332 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2333 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2334 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2335 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2341 unsigned OpOpcode = Operand.getNode()->getOpcode();
2343 case ISD::TokenFactor:
2344 case ISD::MERGE_VALUES:
2345 case ISD::CONCAT_VECTORS:
2346 return Operand; // Factor, merge or concat of one node? No need.
2347 case ISD::FP_ROUND: assert(0 && "Invalid method to make FP_ROUND node");
2348 case ISD::FP_EXTEND:
2349 assert(VT.isFloatingPoint() &&
2350 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2351 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2352 if (Operand.getOpcode() == ISD::UNDEF)
2353 return getUNDEF(VT);
2355 case ISD::SIGN_EXTEND:
2356 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2357 "Invalid SIGN_EXTEND!");
2358 if (Operand.getValueType() == VT) return Operand; // noop extension
2359 assert(Operand.getValueType().bitsLT(VT)
2360 && "Invalid sext node, dst < src!");
2361 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2362 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2364 case ISD::ZERO_EXTEND:
2365 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2366 "Invalid ZERO_EXTEND!");
2367 if (Operand.getValueType() == VT) return Operand; // noop extension
2368 assert(Operand.getValueType().bitsLT(VT)
2369 && "Invalid zext node, dst < src!");
2370 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2371 return getNode(ISD::ZERO_EXTEND, DL, VT,
2372 Operand.getNode()->getOperand(0));
2374 case ISD::ANY_EXTEND:
2375 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2376 "Invalid ANY_EXTEND!");
2377 if (Operand.getValueType() == VT) return Operand; // noop extension
2378 assert(Operand.getValueType().bitsLT(VT)
2379 && "Invalid anyext node, dst < src!");
2380 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND)
2381 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2382 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2385 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2386 "Invalid TRUNCATE!");
2387 if (Operand.getValueType() == VT) return Operand; // noop truncate
2388 assert(Operand.getValueType().bitsGT(VT)
2389 && "Invalid truncate node, src < dst!");
2390 if (OpOpcode == ISD::TRUNCATE)
2391 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2392 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2393 OpOpcode == ISD::ANY_EXTEND) {
2394 // If the source is smaller than the dest, we still need an extend.
2395 if (Operand.getNode()->getOperand(0).getValueType().bitsLT(VT))
2396 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2397 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2398 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2400 return Operand.getNode()->getOperand(0);
2403 case ISD::BIT_CONVERT:
2404 // Basic sanity checking.
2405 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2406 && "Cannot BIT_CONVERT between types of different sizes!");
2407 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2408 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x)
2409 return getNode(ISD::BIT_CONVERT, DL, VT, Operand.getOperand(0));
2410 if (OpOpcode == ISD::UNDEF)
2411 return getUNDEF(VT);
2413 case ISD::SCALAR_TO_VECTOR:
2414 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2415 (VT.getVectorElementType() == Operand.getValueType() ||
2416 (VT.getVectorElementType().isInteger() &&
2417 Operand.getValueType().isInteger() &&
2418 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
2419 "Illegal SCALAR_TO_VECTOR node!");
2420 if (OpOpcode == ISD::UNDEF)
2421 return getUNDEF(VT);
2422 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2423 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2424 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2425 Operand.getConstantOperandVal(1) == 0 &&
2426 Operand.getOperand(0).getValueType() == VT)
2427 return Operand.getOperand(0);
2430 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
2431 if (UnsafeFPMath && OpOpcode == ISD::FSUB)
2432 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
2433 Operand.getNode()->getOperand(0));
2434 if (OpOpcode == ISD::FNEG) // --X -> X
2435 return Operand.getNode()->getOperand(0);
2438 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2439 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
2444 SDVTList VTs = getVTList(VT);
2445 if (VT != MVT::Flag) { // Don't CSE flag producing nodes
2446 FoldingSetNodeID ID;
2447 SDValue Ops[1] = { Operand };
2448 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2450 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2451 return SDValue(E, 0);
2452 N = NodeAllocator.Allocate<UnarySDNode>();
2453 new (N) UnarySDNode(Opcode, DL, VTs, Operand);
2454 CSEMap.InsertNode(N, IP);
2456 N = NodeAllocator.Allocate<UnarySDNode>();
2457 new (N) UnarySDNode(Opcode, DL, VTs, Operand);
2460 AllNodes.push_back(N);
2464 return SDValue(N, 0);
2467 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2469 ConstantSDNode *Cst1,
2470 ConstantSDNode *Cst2) {
2471 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
2474 case ISD::ADD: return getConstant(C1 + C2, VT);
2475 case ISD::SUB: return getConstant(C1 - C2, VT);
2476 case ISD::MUL: return getConstant(C1 * C2, VT);
2478 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2481 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2484 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2487 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2489 case ISD::AND: return getConstant(C1 & C2, VT);
2490 case ISD::OR: return getConstant(C1 | C2, VT);
2491 case ISD::XOR: return getConstant(C1 ^ C2, VT);
2492 case ISD::SHL: return getConstant(C1 << C2, VT);
2493 case ISD::SRL: return getConstant(C1.lshr(C2), VT);
2494 case ISD::SRA: return getConstant(C1.ashr(C2), VT);
2495 case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2496 case ISD::ROTR: return getConstant(C1.rotr(C2), VT);
2503 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
2504 SDValue N1, SDValue N2) {
2505 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2506 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2509 case ISD::TokenFactor:
2510 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2511 N2.getValueType() == MVT::Other && "Invalid token factor!");
2512 // Fold trivial token factors.
2513 if (N1.getOpcode() == ISD::EntryToken) return N2;
2514 if (N2.getOpcode() == ISD::EntryToken) return N1;
2515 if (N1 == N2) return N1;
2517 case ISD::CONCAT_VECTORS:
2518 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2519 // one big BUILD_VECTOR.
2520 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2521 N2.getOpcode() == ISD::BUILD_VECTOR) {
2522 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2523 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2524 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2528 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2529 N1.getValueType() == VT && "Binary operator types must match!");
2530 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2531 // worth handling here.
2532 if (N2C && N2C->isNullValue())
2534 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2541 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2542 N1.getValueType() == VT && "Binary operator types must match!");
2543 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2544 // it's worth handling here.
2545 if (N2C && N2C->isNullValue())
2555 assert(VT.isInteger() && "This operator does not apply to FP types!");
2563 if (Opcode == ISD::FADD) {
2565 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
2566 if (CFP->getValueAPF().isZero())
2569 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2570 if (CFP->getValueAPF().isZero())
2572 } else if (Opcode == ISD::FSUB) {
2574 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2575 if (CFP->getValueAPF().isZero())
2579 assert(N1.getValueType() == N2.getValueType() &&
2580 N1.getValueType() == VT && "Binary operator types must match!");
2582 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2583 assert(N1.getValueType() == VT &&
2584 N1.getValueType().isFloatingPoint() &&
2585 N2.getValueType().isFloatingPoint() &&
2586 "Invalid FCOPYSIGN!");
2593 assert(VT == N1.getValueType() &&
2594 "Shift operators return type must be the same as their first arg");
2595 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2596 "Shifts only work on integers");
2598 // Always fold shifts of i1 values so the code generator doesn't need to
2599 // handle them. Since we know the size of the shift has to be less than the
2600 // size of the value, the shift/rotate count is guaranteed to be zero.
2604 case ISD::FP_ROUND_INREG: {
2605 MVT EVT = cast<VTSDNode>(N2)->getVT();
2606 assert(VT == N1.getValueType() && "Not an inreg round!");
2607 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2608 "Cannot FP_ROUND_INREG integer types");
2609 assert(EVT.bitsLE(VT) && "Not rounding down!");
2610 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2614 assert(VT.isFloatingPoint() &&
2615 N1.getValueType().isFloatingPoint() &&
2616 VT.bitsLE(N1.getValueType()) &&
2617 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2618 if (N1.getValueType() == VT) return N1; // noop conversion.
2620 case ISD::AssertSext:
2621 case ISD::AssertZext: {
2622 MVT EVT = cast<VTSDNode>(N2)->getVT();
2623 assert(VT == N1.getValueType() && "Not an inreg extend!");
2624 assert(VT.isInteger() && EVT.isInteger() &&
2625 "Cannot *_EXTEND_INREG FP types");
2626 assert(EVT.bitsLE(VT) && "Not extending!");
2627 if (VT == EVT) return N1; // noop assertion.
2630 case ISD::SIGN_EXTEND_INREG: {
2631 MVT EVT = cast<VTSDNode>(N2)->getVT();
2632 assert(VT == N1.getValueType() && "Not an inreg extend!");
2633 assert(VT.isInteger() && EVT.isInteger() &&
2634 "Cannot *_EXTEND_INREG FP types");
2635 assert(EVT.bitsLE(VT) && "Not extending!");
2636 if (EVT == VT) return N1; // Not actually extending
2639 APInt Val = N1C->getAPIntValue();
2640 unsigned FromBits = cast<VTSDNode>(N2)->getVT().getSizeInBits();
2641 Val <<= Val.getBitWidth()-FromBits;
2642 Val = Val.ashr(Val.getBitWidth()-FromBits);
2643 return getConstant(Val, VT);
2647 case ISD::EXTRACT_VECTOR_ELT:
2648 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2649 if (N1.getOpcode() == ISD::UNDEF)
2650 return getUNDEF(VT);
2652 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2653 // expanding copies of large vectors from registers.
2655 N1.getOpcode() == ISD::CONCAT_VECTORS &&
2656 N1.getNumOperands() > 0) {
2658 N1.getOperand(0).getValueType().getVectorNumElements();
2659 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
2660 N1.getOperand(N2C->getZExtValue() / Factor),
2661 getConstant(N2C->getZExtValue() % Factor,
2662 N2.getValueType()));
2665 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2666 // expanding large vector constants.
2667 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
2668 SDValue Elt = N1.getOperand(N2C->getZExtValue());
2669 if (Elt.getValueType() != VT) {
2670 // If the vector element type is not legal, the BUILD_VECTOR operands
2671 // are promoted and implicitly truncated. Make that explicit here.
2672 assert(VT.isInteger() && Elt.getValueType().isInteger() &&
2673 VT.bitsLE(Elt.getValueType()) &&
2674 "Bad type for BUILD_VECTOR operand");
2675 Elt = getNode(ISD::TRUNCATE, DL, VT, Elt);
2680 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2681 // operations are lowered to scalars.
2682 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2683 // If the indices are the same, return the inserted element.
2684 if (N1.getOperand(2) == N2)
2685 return N1.getOperand(1);
2686 // If the indices are known different, extract the element from
2687 // the original vector.
2688 else if (isa<ConstantSDNode>(N1.getOperand(2)) &&
2689 isa<ConstantSDNode>(N2))
2690 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
2693 case ISD::EXTRACT_ELEMENT:
2694 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
2695 assert(!N1.getValueType().isVector() && !VT.isVector() &&
2696 (N1.getValueType().isInteger() == VT.isInteger()) &&
2697 "Wrong types for EXTRACT_ELEMENT!");
2699 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2700 // 64-bit integers into 32-bit parts. Instead of building the extract of
2701 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2702 if (N1.getOpcode() == ISD::BUILD_PAIR)
2703 return N1.getOperand(N2C->getZExtValue());
2705 // EXTRACT_ELEMENT of a constant int is also very common.
2706 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2707 unsigned ElementSize = VT.getSizeInBits();
2708 unsigned Shift = ElementSize * N2C->getZExtValue();
2709 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2710 return getConstant(ShiftedVal.trunc(ElementSize), VT);
2713 case ISD::EXTRACT_SUBVECTOR:
2714 if (N1.getValueType() == VT) // Trivial extraction.
2721 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
2722 if (SV.getNode()) return SV;
2723 } else { // Cannonicalize constant to RHS if commutative
2724 if (isCommutativeBinOp(Opcode)) {
2725 std::swap(N1C, N2C);
2731 // Constant fold FP operations.
2732 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
2733 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
2735 if (!N2CFP && isCommutativeBinOp(Opcode)) {
2736 // Cannonicalize constant to RHS if commutative
2737 std::swap(N1CFP, N2CFP);
2739 } else if (N2CFP && VT != MVT::ppcf128) {
2740 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
2741 APFloat::opStatus s;
2744 s = V1.add(V2, APFloat::rmNearestTiesToEven);
2745 if (s != APFloat::opInvalidOp)
2746 return getConstantFP(V1, VT);
2749 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
2750 if (s!=APFloat::opInvalidOp)
2751 return getConstantFP(V1, VT);
2754 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
2755 if (s!=APFloat::opInvalidOp)
2756 return getConstantFP(V1, VT);
2759 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
2760 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2761 return getConstantFP(V1, VT);
2764 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
2765 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2766 return getConstantFP(V1, VT);
2768 case ISD::FCOPYSIGN:
2770 return getConstantFP(V1, VT);
2776 // Canonicalize an UNDEF to the RHS, even over a constant.
2777 if (N1.getOpcode() == ISD::UNDEF) {
2778 if (isCommutativeBinOp(Opcode)) {
2782 case ISD::FP_ROUND_INREG:
2783 case ISD::SIGN_EXTEND_INREG:
2789 return N1; // fold op(undef, arg2) -> undef
2797 return getConstant(0, VT); // fold op(undef, arg2) -> 0
2798 // For vectors, we can't easily build an all zero vector, just return
2805 // Fold a bunch of operators when the RHS is undef.
2806 if (N2.getOpcode() == ISD::UNDEF) {
2809 if (N1.getOpcode() == ISD::UNDEF)
2810 // Handle undef ^ undef -> 0 special case. This is a common
2812 return getConstant(0, VT);
2822 return N2; // fold op(arg1, undef) -> undef
2836 return getConstant(0, VT); // fold op(arg1, undef) -> 0
2837 // For vectors, we can't easily build an all zero vector, just return
2842 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
2843 // For vectors, we can't easily build an all one vector, just return
2851 // Memoize this node if possible.
2853 SDVTList VTs = getVTList(VT);
2854 if (VT != MVT::Flag) {
2855 SDValue Ops[] = { N1, N2 };
2856 FoldingSetNodeID ID;
2857 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
2859 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2860 return SDValue(E, 0);
2861 N = NodeAllocator.Allocate<BinarySDNode>();
2862 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2);
2863 CSEMap.InsertNode(N, IP);
2865 N = NodeAllocator.Allocate<BinarySDNode>();
2866 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2);
2869 AllNodes.push_back(N);
2873 return SDValue(N, 0);
2876 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
2877 SDValue N1, SDValue N2, SDValue N3) {
2878 // Perform various simplifications.
2879 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2880 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2882 case ISD::CONCAT_VECTORS:
2883 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2884 // one big BUILD_VECTOR.
2885 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2886 N2.getOpcode() == ISD::BUILD_VECTOR &&
2887 N3.getOpcode() == ISD::BUILD_VECTOR) {
2888 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2889 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2890 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end());
2891 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2895 // Use FoldSetCC to simplify SETCC's.
2896 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
2897 if (Simp.getNode()) return Simp;
2902 if (N1C->getZExtValue())
2903 return N2; // select true, X, Y -> X
2905 return N3; // select false, X, Y -> Y
2908 if (N2 == N3) return N2; // select C, X, X -> X
2912 if (N2C->getZExtValue()) // Unconditional branch
2913 return getNode(ISD::BR, DL, MVT::Other, N1, N3);
2915 return N1; // Never-taken branch
2918 case ISD::VECTOR_SHUFFLE:
2919 assert(0 && "should use getVectorShuffle constructor!");
2921 case ISD::BIT_CONVERT:
2922 // Fold bit_convert nodes from a type to themselves.
2923 if (N1.getValueType() == VT)
2928 // Memoize node if it doesn't produce a flag.
2930 SDVTList VTs = getVTList(VT);
2931 if (VT != MVT::Flag) {
2932 SDValue Ops[] = { N1, N2, N3 };
2933 FoldingSetNodeID ID;
2934 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
2936 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2937 return SDValue(E, 0);
2938 N = NodeAllocator.Allocate<TernarySDNode>();
2939 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
2940 CSEMap.InsertNode(N, IP);
2942 N = NodeAllocator.Allocate<TernarySDNode>();
2943 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
2945 AllNodes.push_back(N);
2949 return SDValue(N, 0);
2952 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
2953 SDValue N1, SDValue N2, SDValue N3,
2955 SDValue Ops[] = { N1, N2, N3, N4 };
2956 return getNode(Opcode, DL, VT, Ops, 4);
2959 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
2960 SDValue N1, SDValue N2, SDValue N3,
2961 SDValue N4, SDValue N5) {
2962 SDValue Ops[] = { N1, N2, N3, N4, N5 };
2963 return getNode(Opcode, DL, VT, Ops, 5);
2966 /// getMemsetValue - Vectorized representation of the memset value
2968 static SDValue getMemsetValue(SDValue Value, MVT VT, SelectionDAG &DAG,
2970 unsigned NumBits = VT.isVector() ?
2971 VT.getVectorElementType().getSizeInBits() : VT.getSizeInBits();
2972 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
2973 APInt Val = APInt(NumBits, C->getZExtValue() & 255);
2975 for (unsigned i = NumBits; i > 8; i >>= 1) {
2976 Val = (Val << Shift) | Val;
2980 return DAG.getConstant(Val, VT);
2981 return DAG.getConstantFP(APFloat(Val), VT);
2984 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
2985 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value);
2987 for (unsigned i = NumBits; i > 8; i >>= 1) {
2988 Value = DAG.getNode(ISD::OR, dl, VT,
2989 DAG.getNode(ISD::SHL, dl, VT, Value,
2990 DAG.getConstant(Shift,
2991 TLI.getShiftAmountTy())),
2999 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
3000 /// used when a memcpy is turned into a memset when the source is a constant
3002 static SDValue getMemsetStringVal(MVT VT, DebugLoc dl, SelectionDAG &DAG,
3003 const TargetLowering &TLI,
3004 std::string &Str, unsigned Offset) {
3005 // Handle vector with all elements zero.
3008 return DAG.getConstant(0, VT);
3009 unsigned NumElts = VT.getVectorNumElements();
3010 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
3011 return DAG.getNode(ISD::BIT_CONVERT, dl, VT,
3012 DAG.getConstant(0, MVT::getVectorVT(EltVT, NumElts)));
3015 assert(!VT.isVector() && "Can't handle vector type here!");
3016 unsigned NumBits = VT.getSizeInBits();
3017 unsigned MSB = NumBits / 8;
3019 if (TLI.isLittleEndian())
3020 Offset = Offset + MSB - 1;
3021 for (unsigned i = 0; i != MSB; ++i) {
3022 Val = (Val << 8) | (unsigned char)Str[Offset];
3023 Offset += TLI.isLittleEndian() ? -1 : 1;
3025 return DAG.getConstant(Val, VT);
3028 /// getMemBasePlusOffset - Returns base and offset node for the
3030 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
3031 SelectionDAG &DAG) {
3032 MVT VT = Base.getValueType();
3033 return DAG.getNode(ISD::ADD, Base.getDebugLoc(),
3034 VT, Base, DAG.getConstant(Offset, VT));
3037 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
3039 static bool isMemSrcFromString(SDValue Src, std::string &Str) {
3040 unsigned SrcDelta = 0;
3041 GlobalAddressSDNode *G = NULL;
3042 if (Src.getOpcode() == ISD::GlobalAddress)
3043 G = cast<GlobalAddressSDNode>(Src);
3044 else if (Src.getOpcode() == ISD::ADD &&
3045 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
3046 Src.getOperand(1).getOpcode() == ISD::Constant) {
3047 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
3048 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
3053 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal());
3054 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false))
3060 /// MeetsMaxMemopRequirement - Determines if the number of memory ops required
3061 /// to replace the memset / memcpy is below the threshold. It also returns the
3062 /// types of the sequence of memory ops to perform memset / memcpy.
3064 bool MeetsMaxMemopRequirement(std::vector<MVT> &MemOps,
3065 SDValue Dst, SDValue Src,
3066 unsigned Limit, uint64_t Size, unsigned &Align,
3067 std::string &Str, bool &isSrcStr,
3069 const TargetLowering &TLI) {
3070 isSrcStr = isMemSrcFromString(Src, Str);
3071 bool isSrcConst = isa<ConstantSDNode>(Src);
3072 bool AllowUnalign = TLI.allowsUnalignedMemoryAccesses();
3073 MVT VT = TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr, DAG);
3074 if (VT != MVT::iAny) {
3075 unsigned NewAlign = (unsigned)
3076 TLI.getTargetData()->getABITypeAlignment(VT.getTypeForMVT());
3077 // If source is a string constant, this will require an unaligned load.
3078 if (NewAlign > Align && (isSrcConst || AllowUnalign)) {
3079 if (Dst.getOpcode() != ISD::FrameIndex) {
3080 // Can't change destination alignment. It requires a unaligned store.
3084 int FI = cast<FrameIndexSDNode>(Dst)->getIndex();
3085 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
3086 if (MFI->isFixedObjectIndex(FI)) {
3087 // Can't change destination alignment. It requires a unaligned store.
3091 // Give the stack frame object a larger alignment if needed.
3092 if (MFI->getObjectAlignment(FI) < NewAlign)
3093 MFI->setObjectAlignment(FI, NewAlign);
3100 if (VT == MVT::iAny) {
3104 switch (Align & 7) {
3105 case 0: VT = MVT::i64; break;
3106 case 4: VT = MVT::i32; break;
3107 case 2: VT = MVT::i16; break;
3108 default: VT = MVT::i8; break;
3113 while (!TLI.isTypeLegal(LVT))
3114 LVT = (MVT::SimpleValueType)(LVT.getSimpleVT() - 1);
3115 assert(LVT.isInteger());
3121 unsigned NumMemOps = 0;
3123 unsigned VTSize = VT.getSizeInBits() / 8;
3124 while (VTSize > Size) {
3125 // For now, only use non-vector load / store's for the left-over pieces.
3126 if (VT.isVector()) {
3128 while (!TLI.isTypeLegal(VT))
3129 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1);
3130 VTSize = VT.getSizeInBits() / 8;
3132 // This can result in a type that is not legal on the target, e.g.
3133 // 1 or 2 bytes on PPC.
3134 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1);
3139 if (++NumMemOps > Limit)
3141 MemOps.push_back(VT);
3148 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3149 SDValue Chain, SDValue Dst,
3150 SDValue Src, uint64_t Size,
3151 unsigned Align, bool AlwaysInline,
3152 const Value *DstSV, uint64_t DstSVOff,
3153 const Value *SrcSV, uint64_t SrcSVOff){
3154 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3156 // Expand memcpy to a series of load and store ops if the size operand falls
3157 // below a certain threshold.
3158 std::vector<MVT> MemOps;
3159 uint64_t Limit = -1ULL;
3161 Limit = TLI.getMaxStoresPerMemcpy();
3162 unsigned DstAlign = Align; // Destination alignment can change.
3165 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
3166 Str, CopyFromStr, DAG, TLI))
3170 bool isZeroStr = CopyFromStr && Str.empty();
3171 SmallVector<SDValue, 8> OutChains;
3172 unsigned NumMemOps = MemOps.size();
3173 uint64_t SrcOff = 0, DstOff = 0;
3174 for (unsigned i = 0; i < NumMemOps; i++) {
3176 unsigned VTSize = VT.getSizeInBits() / 8;
3177 SDValue Value, Store;
3179 if (CopyFromStr && (isZeroStr || !VT.isVector())) {
3180 // It's unlikely a store of a vector immediate can be done in a single
3181 // instruction. It would require a load from a constantpool first.
3182 // We also handle store a vector with all zero's.
3183 // FIXME: Handle other cases where store of vector immediate is done in
3184 // a single instruction.
3185 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff);
3186 Store = DAG.getStore(Chain, dl, Value,
3187 getMemBasePlusOffset(Dst, DstOff, DAG),
3188 DstSV, DstSVOff + DstOff, false, DstAlign);
3190 // The type might not be legal for the target. This should only happen
3191 // if the type is smaller than a legal type, as on PPC, so the right
3192 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify
3193 // to Load/Store if NVT==VT.
3194 // FIXME does the case above also need this?
3195 MVT NVT = TLI.getTypeToTransformTo(VT);
3196 assert(NVT.bitsGE(VT));
3197 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain,
3198 getMemBasePlusOffset(Src, SrcOff, DAG),
3199 SrcSV, SrcSVOff + SrcOff, VT, false, Align);
3200 Store = DAG.getTruncStore(Chain, dl, Value,
3201 getMemBasePlusOffset(Dst, DstOff, DAG),
3202 DstSV, DstSVOff + DstOff, VT, false, DstAlign);
3204 OutChains.push_back(Store);
3209 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3210 &OutChains[0], OutChains.size());
3213 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3214 SDValue Chain, SDValue Dst,
3215 SDValue Src, uint64_t Size,
3216 unsigned Align, bool AlwaysInline,
3217 const Value *DstSV, uint64_t DstSVOff,
3218 const Value *SrcSV, uint64_t SrcSVOff){
3219 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3221 // Expand memmove to a series of load and store ops if the size operand falls
3222 // below a certain threshold.
3223 std::vector<MVT> MemOps;
3224 uint64_t Limit = -1ULL;
3226 Limit = TLI.getMaxStoresPerMemmove();
3227 unsigned DstAlign = Align; // Destination alignment can change.
3230 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
3231 Str, CopyFromStr, DAG, TLI))
3234 uint64_t SrcOff = 0, DstOff = 0;
3236 SmallVector<SDValue, 8> LoadValues;
3237 SmallVector<SDValue, 8> LoadChains;
3238 SmallVector<SDValue, 8> OutChains;
3239 unsigned NumMemOps = MemOps.size();
3240 for (unsigned i = 0; i < NumMemOps; i++) {
3242 unsigned VTSize = VT.getSizeInBits() / 8;
3243 SDValue Value, Store;
3245 Value = DAG.getLoad(VT, dl, Chain,
3246 getMemBasePlusOffset(Src, SrcOff, DAG),
3247 SrcSV, SrcSVOff + SrcOff, false, Align);
3248 LoadValues.push_back(Value);
3249 LoadChains.push_back(Value.getValue(1));
3252 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3253 &LoadChains[0], LoadChains.size());
3255 for (unsigned i = 0; i < NumMemOps; i++) {
3257 unsigned VTSize = VT.getSizeInBits() / 8;
3258 SDValue Value, Store;
3260 Store = DAG.getStore(Chain, dl, LoadValues[i],
3261 getMemBasePlusOffset(Dst, DstOff, DAG),
3262 DstSV, DstSVOff + DstOff, false, DstAlign);
3263 OutChains.push_back(Store);
3267 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3268 &OutChains[0], OutChains.size());
3271 static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl,
3272 SDValue Chain, SDValue Dst,
3273 SDValue Src, uint64_t Size,
3275 const Value *DstSV, uint64_t DstSVOff) {
3276 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3278 // Expand memset to a series of load/store ops if the size operand
3279 // falls below a certain threshold.
3280 std::vector<MVT> MemOps;
3283 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, TLI.getMaxStoresPerMemset(),
3284 Size, Align, Str, CopyFromStr, DAG, TLI))
3287 SmallVector<SDValue, 8> OutChains;
3288 uint64_t DstOff = 0;
3290 unsigned NumMemOps = MemOps.size();
3291 for (unsigned i = 0; i < NumMemOps; i++) {
3293 unsigned VTSize = VT.getSizeInBits() / 8;
3294 SDValue Value = getMemsetValue(Src, VT, DAG, dl);
3295 SDValue Store = DAG.getStore(Chain, dl, Value,
3296 getMemBasePlusOffset(Dst, DstOff, DAG),
3297 DstSV, DstSVOff + DstOff);
3298 OutChains.push_back(Store);
3302 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3303 &OutChains[0], OutChains.size());
3306 SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst,
3307 SDValue Src, SDValue Size,
3308 unsigned Align, bool AlwaysInline,
3309 const Value *DstSV, uint64_t DstSVOff,
3310 const Value *SrcSV, uint64_t SrcSVOff) {
3312 // Check to see if we should lower the memcpy to loads and stores first.
3313 // For cases within the target-specified limits, this is the best choice.
3314 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3316 // Memcpy with size zero? Just return the original chain.
3317 if (ConstantSize->isNullValue())
3321 getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3322 ConstantSize->getZExtValue(),
3323 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3324 if (Result.getNode())
3328 // Then check to see if we should lower the memcpy with target-specific
3329 // code. If the target chooses to do this, this is the next best.
3331 TLI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align,
3333 DstSV, DstSVOff, SrcSV, SrcSVOff);
3334 if (Result.getNode())
3337 // If we really need inline code and the target declined to provide it,
3338 // use a (potentially long) sequence of loads and stores.
3340 assert(ConstantSize && "AlwaysInline requires a constant size!");
3341 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3342 ConstantSize->getZExtValue(), Align, true,
3343 DstSV, DstSVOff, SrcSV, SrcSVOff);
3346 // Emit a library call.
3347 TargetLowering::ArgListTy Args;
3348 TargetLowering::ArgListEntry Entry;
3349 Entry.Ty = TLI.getTargetData()->getIntPtrType();
3350 Entry.Node = Dst; Args.push_back(Entry);
3351 Entry.Node = Src; Args.push_back(Entry);
3352 Entry.Node = Size; Args.push_back(Entry);
3353 // FIXME: pass in DebugLoc
3354 std::pair<SDValue,SDValue> CallResult =
3355 TLI.LowerCallTo(Chain, Type::VoidTy,
3356 false, false, false, false, CallingConv::C, false,
3357 getExternalSymbol("memcpy", TLI.getPointerTy()),
3359 return CallResult.second;
3362 SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst,
3363 SDValue Src, SDValue Size,
3365 const Value *DstSV, uint64_t DstSVOff,
3366 const Value *SrcSV, uint64_t SrcSVOff) {
3368 // Check to see if we should lower the memmove to loads and stores first.
3369 // For cases within the target-specified limits, this is the best choice.
3370 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3372 // Memmove with size zero? Just return the original chain.
3373 if (ConstantSize->isNullValue())
3377 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
3378 ConstantSize->getZExtValue(),
3379 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3380 if (Result.getNode())
3384 // Then check to see if we should lower the memmove with target-specific
3385 // code. If the target chooses to do this, this is the next best.
3387 TLI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align,
3388 DstSV, DstSVOff, SrcSV, SrcSVOff);
3389 if (Result.getNode())
3392 // Emit a library call.
3393 TargetLowering::ArgListTy Args;
3394 TargetLowering::ArgListEntry Entry;
3395 Entry.Ty = TLI.getTargetData()->getIntPtrType();
3396 Entry.Node = Dst; Args.push_back(Entry);
3397 Entry.Node = Src; Args.push_back(Entry);
3398 Entry.Node = Size; Args.push_back(Entry);
3399 // FIXME: pass in DebugLoc
3400 std::pair<SDValue,SDValue> CallResult =
3401 TLI.LowerCallTo(Chain, Type::VoidTy,
3402 false, false, false, false, CallingConv::C, false,
3403 getExternalSymbol("memmove", TLI.getPointerTy()),
3405 return CallResult.second;
3408 SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst,
3409 SDValue Src, SDValue Size,
3411 const Value *DstSV, uint64_t DstSVOff) {
3413 // Check to see if we should lower the memset to stores first.
3414 // For cases within the target-specified limits, this is the best choice.
3415 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3417 // Memset with size zero? Just return the original chain.
3418 if (ConstantSize->isNullValue())
3422 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
3423 Align, DstSV, DstSVOff);
3424 if (Result.getNode())
3428 // Then check to see if we should lower the memset with target-specific
3429 // code. If the target chooses to do this, this is the next best.
3431 TLI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align,
3433 if (Result.getNode())
3436 // Emit a library call.
3437 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType();
3438 TargetLowering::ArgListTy Args;
3439 TargetLowering::ArgListEntry Entry;
3440 Entry.Node = Dst; Entry.Ty = IntPtrTy;
3441 Args.push_back(Entry);
3442 // Extend or truncate the argument to be an i32 value for the call.
3443 if (Src.getValueType().bitsGT(MVT::i32))
3444 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
3446 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
3447 Entry.Node = Src; Entry.Ty = Type::Int32Ty; Entry.isSExt = true;
3448 Args.push_back(Entry);
3449 Entry.Node = Size; Entry.Ty = IntPtrTy; Entry.isSExt = false;
3450 Args.push_back(Entry);
3451 // FIXME: pass in DebugLoc
3452 std::pair<SDValue,SDValue> CallResult =
3453 TLI.LowerCallTo(Chain, Type::VoidTy,
3454 false, false, false, false, CallingConv::C, false,
3455 getExternalSymbol("memset", TLI.getPointerTy()),
3457 return CallResult.second;
3460 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, MVT MemVT,
3462 SDValue Ptr, SDValue Cmp,
3463 SDValue Swp, const Value* PtrVal,
3464 unsigned Alignment) {
3465 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
3466 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3468 MVT VT = Cmp.getValueType();
3470 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3471 Alignment = getMVTAlignment(MemVT);
3473 SDVTList VTs = getVTList(VT, MVT::Other);
3474 FoldingSetNodeID ID;
3475 ID.AddInteger(MemVT.getRawBits());
3476 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3477 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3479 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3480 return SDValue(E, 0);
3481 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3482 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT,
3483 Chain, Ptr, Cmp, Swp, PtrVal, Alignment);
3484 CSEMap.InsertNode(N, IP);
3485 AllNodes.push_back(N);
3486 return SDValue(N, 0);
3489 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, MVT MemVT,
3491 SDValue Ptr, SDValue Val,
3492 const Value* PtrVal,
3493 unsigned Alignment) {
3494 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
3495 Opcode == ISD::ATOMIC_LOAD_SUB ||
3496 Opcode == ISD::ATOMIC_LOAD_AND ||
3497 Opcode == ISD::ATOMIC_LOAD_OR ||
3498 Opcode == ISD::ATOMIC_LOAD_XOR ||
3499 Opcode == ISD::ATOMIC_LOAD_NAND ||
3500 Opcode == ISD::ATOMIC_LOAD_MIN ||
3501 Opcode == ISD::ATOMIC_LOAD_MAX ||
3502 Opcode == ISD::ATOMIC_LOAD_UMIN ||
3503 Opcode == ISD::ATOMIC_LOAD_UMAX ||
3504 Opcode == ISD::ATOMIC_SWAP) &&
3505 "Invalid Atomic Op");
3507 MVT VT = Val.getValueType();
3509 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3510 Alignment = getMVTAlignment(MemVT);
3512 SDVTList VTs = getVTList(VT, MVT::Other);
3513 FoldingSetNodeID ID;
3514 ID.AddInteger(MemVT.getRawBits());
3515 SDValue Ops[] = {Chain, Ptr, Val};
3516 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3518 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3519 return SDValue(E, 0);
3520 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3521 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT,
3522 Chain, Ptr, Val, PtrVal, Alignment);
3523 CSEMap.InsertNode(N, IP);
3524 AllNodes.push_back(N);
3525 return SDValue(N, 0);
3528 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
3529 /// Allowed to return something different (and simpler) if Simplify is true.
3530 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps,
3535 SmallVector<MVT, 4> VTs;
3536 VTs.reserve(NumOps);
3537 for (unsigned i = 0; i < NumOps; ++i)
3538 VTs.push_back(Ops[i].getValueType());
3539 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps),
3544 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl,
3545 const MVT *VTs, unsigned NumVTs,
3546 const SDValue *Ops, unsigned NumOps,
3547 MVT MemVT, const Value *srcValue, int SVOff,
3548 unsigned Align, bool Vol,
3549 bool ReadMem, bool WriteMem) {
3550 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps,
3551 MemVT, srcValue, SVOff, Align, Vol,
3556 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
3557 const SDValue *Ops, unsigned NumOps,
3558 MVT MemVT, const Value *srcValue, int SVOff,
3559 unsigned Align, bool Vol,
3560 bool ReadMem, bool WriteMem) {
3561 // Memoize the node unless it returns a flag.
3562 MemIntrinsicSDNode *N;
3563 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3564 FoldingSetNodeID ID;
3565 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3567 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3568 return SDValue(E, 0);
3570 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3571 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT,
3572 srcValue, SVOff, Align, Vol, ReadMem, WriteMem);
3573 CSEMap.InsertNode(N, IP);
3575 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3576 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT,
3577 srcValue, SVOff, Align, Vol, ReadMem, WriteMem);
3579 AllNodes.push_back(N);
3580 return SDValue(N, 0);
3584 SelectionDAG::getCall(unsigned CallingConv, DebugLoc dl, bool IsVarArgs,
3585 bool IsTailCall, bool IsInreg, SDVTList VTs,
3586 const SDValue *Operands, unsigned NumOperands) {
3587 // Do not include isTailCall in the folding set profile.
3588 FoldingSetNodeID ID;
3589 AddNodeIDNode(ID, ISD::CALL, VTs, Operands, NumOperands);
3590 ID.AddInteger(CallingConv);
3591 ID.AddInteger(IsVarArgs);
3593 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3594 // Instead of including isTailCall in the folding set, we just
3595 // set the flag of the existing node.
3597 cast<CallSDNode>(E)->setNotTailCall();
3598 return SDValue(E, 0);
3600 SDNode *N = NodeAllocator.Allocate<CallSDNode>();
3601 new (N) CallSDNode(CallingConv, dl, IsVarArgs, IsTailCall, IsInreg,
3602 VTs, Operands, NumOperands);
3603 CSEMap.InsertNode(N, IP);
3604 AllNodes.push_back(N);
3605 return SDValue(N, 0);
3609 SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl,
3610 ISD::LoadExtType ExtType, MVT VT, SDValue Chain,
3611 SDValue Ptr, SDValue Offset,
3612 const Value *SV, int SVOffset, MVT EVT,
3613 bool isVolatile, unsigned Alignment) {
3614 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3615 Alignment = getMVTAlignment(VT);
3618 ExtType = ISD::NON_EXTLOAD;
3619 } else if (ExtType == ISD::NON_EXTLOAD) {
3620 assert(VT == EVT && "Non-extending load from different memory type!");
3624 assert(EVT.getVectorNumElements() == VT.getVectorNumElements() &&
3625 "Invalid vector extload!");
3627 assert(EVT.bitsLT(VT) &&
3628 "Should only be an extending load, not truncating!");
3629 assert((ExtType == ISD::EXTLOAD || VT.isInteger()) &&
3630 "Cannot sign/zero extend a FP/Vector load!");
3631 assert(VT.isInteger() == EVT.isInteger() &&
3632 "Cannot convert from FP to Int or Int -> FP!");
3635 bool Indexed = AM != ISD::UNINDEXED;
3636 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
3637 "Unindexed load with an offset!");
3639 SDVTList VTs = Indexed ?
3640 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
3641 SDValue Ops[] = { Chain, Ptr, Offset };
3642 FoldingSetNodeID ID;
3643 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
3644 ID.AddInteger(EVT.getRawBits());
3645 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, isVolatile, Alignment));
3647 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3648 return SDValue(E, 0);
3649 SDNode *N = NodeAllocator.Allocate<LoadSDNode>();
3650 new (N) LoadSDNode(Ops, dl, VTs, AM, ExtType, EVT, SV, SVOffset,
3651 Alignment, isVolatile);
3652 CSEMap.InsertNode(N, IP);
3653 AllNodes.push_back(N);
3654 return SDValue(N, 0);
3657 SDValue SelectionDAG::getLoad(MVT VT, DebugLoc dl,
3658 SDValue Chain, SDValue Ptr,
3659 const Value *SV, int SVOffset,
3660 bool isVolatile, unsigned Alignment) {
3661 SDValue Undef = getUNDEF(Ptr.getValueType());
3662 return getLoad(ISD::UNINDEXED, dl, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef,
3663 SV, SVOffset, VT, isVolatile, Alignment);
3666 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, MVT VT,
3667 SDValue Chain, SDValue Ptr,
3669 int SVOffset, MVT EVT,
3670 bool isVolatile, unsigned Alignment) {
3671 SDValue Undef = getUNDEF(Ptr.getValueType());
3672 return getLoad(ISD::UNINDEXED, dl, ExtType, VT, Chain, Ptr, Undef,
3673 SV, SVOffset, EVT, isVolatile, Alignment);
3677 SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base,
3678 SDValue Offset, ISD::MemIndexedMode AM) {
3679 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
3680 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
3681 "Load is already a indexed load!");
3682 return getLoad(AM, dl, LD->getExtensionType(), OrigLoad.getValueType(),
3683 LD->getChain(), Base, Offset, LD->getSrcValue(),
3684 LD->getSrcValueOffset(), LD->getMemoryVT(),
3685 LD->isVolatile(), LD->getAlignment());
3688 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
3689 SDValue Ptr, const Value *SV, int SVOffset,
3690 bool isVolatile, unsigned Alignment) {
3691 MVT VT = Val.getValueType();
3693 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3694 Alignment = getMVTAlignment(VT);
3696 SDVTList VTs = getVTList(MVT::Other);
3697 SDValue Undef = getUNDEF(Ptr.getValueType());
3698 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3699 FoldingSetNodeID ID;
3700 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3701 ID.AddInteger(VT.getRawBits());
3702 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED,
3703 isVolatile, Alignment));
3705 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3706 return SDValue(E, 0);
3707 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3708 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, false,
3709 VT, SV, SVOffset, Alignment, isVolatile);
3710 CSEMap.InsertNode(N, IP);
3711 AllNodes.push_back(N);
3712 return SDValue(N, 0);
3715 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
3716 SDValue Ptr, const Value *SV,
3717 int SVOffset, MVT SVT,
3718 bool isVolatile, unsigned Alignment) {
3719 MVT VT = Val.getValueType();
3722 return getStore(Chain, dl, Val, Ptr, SV, SVOffset, isVolatile, Alignment);
3724 assert(VT.bitsGT(SVT) && "Not a truncation?");
3725 assert(VT.isInteger() == SVT.isInteger() &&
3726 "Can't do FP-INT conversion!");
3728 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3729 Alignment = getMVTAlignment(VT);
3731 SDVTList VTs = getVTList(MVT::Other);
3732 SDValue Undef = getUNDEF(Ptr.getValueType());
3733 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3734 FoldingSetNodeID ID;
3735 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3736 ID.AddInteger(SVT.getRawBits());
3737 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED,
3738 isVolatile, Alignment));
3740 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3741 return SDValue(E, 0);
3742 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3743 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, true,
3744 SVT, SV, SVOffset, Alignment, isVolatile);
3745 CSEMap.InsertNode(N, IP);
3746 AllNodes.push_back(N);
3747 return SDValue(N, 0);
3751 SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base,
3752 SDValue Offset, ISD::MemIndexedMode AM) {
3753 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
3754 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
3755 "Store is already a indexed store!");
3756 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
3757 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
3758 FoldingSetNodeID ID;
3759 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3760 ID.AddInteger(ST->getMemoryVT().getRawBits());
3761 ID.AddInteger(ST->getRawSubclassData());
3763 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3764 return SDValue(E, 0);
3765 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3766 new (N) StoreSDNode(Ops, dl, VTs, AM,
3767 ST->isTruncatingStore(), ST->getMemoryVT(),
3768 ST->getSrcValue(), ST->getSrcValueOffset(),
3769 ST->getAlignment(), ST->isVolatile());
3770 CSEMap.InsertNode(N, IP);
3771 AllNodes.push_back(N);
3772 return SDValue(N, 0);
3775 SDValue SelectionDAG::getVAArg(MVT VT, DebugLoc dl,
3776 SDValue Chain, SDValue Ptr,
3778 SDValue Ops[] = { Chain, Ptr, SV };
3779 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 3);
3782 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
3783 const SDUse *Ops, unsigned NumOps) {
3785 case 0: return getNode(Opcode, DL, VT);
3786 case 1: return getNode(Opcode, DL, VT, Ops[0]);
3787 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
3788 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
3792 // Copy from an SDUse array into an SDValue array for use with
3793 // the regular getNode logic.
3794 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
3795 return getNode(Opcode, DL, VT, &NewOps[0], NumOps);
3798 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
3799 const SDValue *Ops, unsigned NumOps) {
3801 case 0: return getNode(Opcode, DL, VT);
3802 case 1: return getNode(Opcode, DL, VT, Ops[0]);
3803 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
3804 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
3810 case ISD::SELECT_CC: {
3811 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
3812 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
3813 "LHS and RHS of condition must have same type!");
3814 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
3815 "True and False arms of SelectCC must have same type!");
3816 assert(Ops[2].getValueType() == VT &&
3817 "select_cc node must be of same type as true and false value!");
3821 assert(NumOps == 5 && "BR_CC takes 5 operands!");
3822 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
3823 "LHS/RHS of comparison should match types!");
3830 SDVTList VTs = getVTList(VT);
3832 if (VT != MVT::Flag) {
3833 FoldingSetNodeID ID;
3834 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
3837 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3838 return SDValue(E, 0);
3840 N = NodeAllocator.Allocate<SDNode>();
3841 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps);
3842 CSEMap.InsertNode(N, IP);
3844 N = NodeAllocator.Allocate<SDNode>();
3845 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps);
3848 AllNodes.push_back(N);
3852 return SDValue(N, 0);
3855 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
3856 const std::vector<MVT> &ResultTys,
3857 const SDValue *Ops, unsigned NumOps) {
3858 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()),
3862 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
3863 const MVT *VTs, unsigned NumVTs,
3864 const SDValue *Ops, unsigned NumOps) {
3866 return getNode(Opcode, DL, VTs[0], Ops, NumOps);
3867 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps);
3870 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
3871 const SDValue *Ops, unsigned NumOps) {
3872 if (VTList.NumVTs == 1)
3873 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps);
3876 // FIXME: figure out how to safely handle things like
3877 // int foo(int x) { return 1 << (x & 255); }
3878 // int bar() { return foo(256); }
3880 case ISD::SRA_PARTS:
3881 case ISD::SRL_PARTS:
3882 case ISD::SHL_PARTS:
3883 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
3884 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
3885 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
3886 else if (N3.getOpcode() == ISD::AND)
3887 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
3888 // If the and is only masking out bits that cannot effect the shift,
3889 // eliminate the and.
3890 unsigned NumBits = VT.getSizeInBits()*2;
3891 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
3892 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
3898 // Memoize the node unless it returns a flag.
3900 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3901 FoldingSetNodeID ID;
3902 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3904 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3905 return SDValue(E, 0);
3907 N = NodeAllocator.Allocate<UnarySDNode>();
3908 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]);
3909 } else if (NumOps == 2) {
3910 N = NodeAllocator.Allocate<BinarySDNode>();
3911 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
3912 } else if (NumOps == 3) {
3913 N = NodeAllocator.Allocate<TernarySDNode>();
3914 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]);
3916 N = NodeAllocator.Allocate<SDNode>();
3917 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps);
3919 CSEMap.InsertNode(N, IP);
3922 N = NodeAllocator.Allocate<UnarySDNode>();
3923 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]);
3924 } else if (NumOps == 2) {
3925 N = NodeAllocator.Allocate<BinarySDNode>();
3926 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
3927 } else if (NumOps == 3) {
3928 N = NodeAllocator.Allocate<TernarySDNode>();
3929 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]);
3931 N = NodeAllocator.Allocate<SDNode>();
3932 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps);
3935 AllNodes.push_back(N);
3939 return SDValue(N, 0);
3942 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) {
3943 return getNode(Opcode, DL, VTList, 0, 0);
3946 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
3948 SDValue Ops[] = { N1 };
3949 return getNode(Opcode, DL, VTList, Ops, 1);
3952 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
3953 SDValue N1, SDValue N2) {
3954 SDValue Ops[] = { N1, N2 };
3955 return getNode(Opcode, DL, VTList, Ops, 2);
3958 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
3959 SDValue N1, SDValue N2, SDValue N3) {
3960 SDValue Ops[] = { N1, N2, N3 };
3961 return getNode(Opcode, DL, VTList, Ops, 3);
3964 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
3965 SDValue N1, SDValue N2, SDValue N3,
3967 SDValue Ops[] = { N1, N2, N3, N4 };
3968 return getNode(Opcode, DL, VTList, Ops, 4);
3971 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
3972 SDValue N1, SDValue N2, SDValue N3,
3973 SDValue N4, SDValue N5) {
3974 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3975 return getNode(Opcode, DL, VTList, Ops, 5);
3978 SDVTList SelectionDAG::getVTList(MVT VT) {
3979 return makeVTList(SDNode::getValueTypeList(VT), 1);
3982 SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2) {
3983 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
3984 E = VTList.rend(); I != E; ++I)
3985 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
3988 MVT *Array = Allocator.Allocate<MVT>(2);
3991 SDVTList Result = makeVTList(Array, 2);
3992 VTList.push_back(Result);
3996 SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2, MVT VT3) {
3997 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
3998 E = VTList.rend(); I != E; ++I)
3999 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4003 MVT *Array = Allocator.Allocate<MVT>(3);
4007 SDVTList Result = makeVTList(Array, 3);
4008 VTList.push_back(Result);
4012 SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2, MVT VT3, MVT VT4) {
4013 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4014 E = VTList.rend(); I != E; ++I)
4015 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4016 I->VTs[2] == VT3 && I->VTs[3] == VT4)
4019 MVT *Array = Allocator.Allocate<MVT>(3);
4024 SDVTList Result = makeVTList(Array, 4);
4025 VTList.push_back(Result);
4029 SDVTList SelectionDAG::getVTList(const MVT *VTs, unsigned NumVTs) {
4031 case 0: assert(0 && "Cannot have nodes without results!");
4032 case 1: return getVTList(VTs[0]);
4033 case 2: return getVTList(VTs[0], VTs[1]);
4034 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
4038 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4039 E = VTList.rend(); I != E; ++I) {
4040 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
4043 bool NoMatch = false;
4044 for (unsigned i = 2; i != NumVTs; ++i)
4045 if (VTs[i] != I->VTs[i]) {
4053 MVT *Array = Allocator.Allocate<MVT>(NumVTs);
4054 std::copy(VTs, VTs+NumVTs, Array);
4055 SDVTList Result = makeVTList(Array, NumVTs);
4056 VTList.push_back(Result);
4061 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
4062 /// specified operands. If the resultant node already exists in the DAG,
4063 /// this does not modify the specified node, instead it returns the node that
4064 /// already exists. If the resultant node does not exist in the DAG, the
4065 /// input node is returned. As a degenerate case, if you specify the same
4066 /// input operands as the node already has, the input node is returned.
4067 SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) {
4068 SDNode *N = InN.getNode();
4069 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
4071 // Check to see if there is no change.
4072 if (Op == N->getOperand(0)) return InN;
4074 // See if the modified node already exists.
4075 void *InsertPos = 0;
4076 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
4077 return SDValue(Existing, InN.getResNo());
4079 // Nope it doesn't. Remove the node from its current place in the maps.
4081 if (!RemoveNodeFromCSEMaps(N))
4084 // Now we update the operands.
4085 N->OperandList[0].set(Op);
4087 // If this gets put into a CSE map, add it.
4088 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4092 SDValue SelectionDAG::
4093 UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) {
4094 SDNode *N = InN.getNode();
4095 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
4097 // Check to see if there is no change.
4098 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
4099 return InN; // No operands changed, just return the input node.
4101 // See if the modified node already exists.
4102 void *InsertPos = 0;
4103 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
4104 return SDValue(Existing, InN.getResNo());
4106 // Nope it doesn't. Remove the node from its current place in the maps.
4108 if (!RemoveNodeFromCSEMaps(N))
4111 // Now we update the operands.
4112 if (N->OperandList[0] != Op1)
4113 N->OperandList[0].set(Op1);
4114 if (N->OperandList[1] != Op2)
4115 N->OperandList[1].set(Op2);
4117 // If this gets put into a CSE map, add it.
4118 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4122 SDValue SelectionDAG::
4123 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) {
4124 SDValue Ops[] = { Op1, Op2, Op3 };
4125 return UpdateNodeOperands(N, Ops, 3);
4128 SDValue SelectionDAG::
4129 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
4130 SDValue Op3, SDValue Op4) {
4131 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
4132 return UpdateNodeOperands(N, Ops, 4);
4135 SDValue SelectionDAG::
4136 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
4137 SDValue Op3, SDValue Op4, SDValue Op5) {
4138 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
4139 return UpdateNodeOperands(N, Ops, 5);
4142 SDValue SelectionDAG::
4143 UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) {
4144 SDNode *N = InN.getNode();
4145 assert(N->getNumOperands() == NumOps &&
4146 "Update with wrong number of operands");
4148 // Check to see if there is no change.
4149 bool AnyChange = false;
4150 for (unsigned i = 0; i != NumOps; ++i) {
4151 if (Ops[i] != N->getOperand(i)) {
4157 // No operands changed, just return the input node.
4158 if (!AnyChange) return InN;
4160 // See if the modified node already exists.
4161 void *InsertPos = 0;
4162 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
4163 return SDValue(Existing, InN.getResNo());
4165 // Nope it doesn't. Remove the node from its current place in the maps.
4167 if (!RemoveNodeFromCSEMaps(N))
4170 // Now we update the operands.
4171 for (unsigned i = 0; i != NumOps; ++i)
4172 if (N->OperandList[i] != Ops[i])
4173 N->OperandList[i].set(Ops[i]);
4175 // If this gets put into a CSE map, add it.
4176 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4180 /// DropOperands - Release the operands and set this node to have
4182 void SDNode::DropOperands() {
4183 // Unlike the code in MorphNodeTo that does this, we don't need to
4184 // watch for dead nodes here.
4185 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
4191 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
4194 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4196 SDVTList VTs = getVTList(VT);
4197 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
4200 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4201 MVT VT, SDValue Op1) {
4202 SDVTList VTs = getVTList(VT);
4203 SDValue Ops[] = { Op1 };
4204 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4207 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4208 MVT VT, SDValue Op1,
4210 SDVTList VTs = getVTList(VT);
4211 SDValue Ops[] = { Op1, Op2 };
4212 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4215 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4216 MVT VT, SDValue Op1,
4217 SDValue Op2, SDValue Op3) {
4218 SDVTList VTs = getVTList(VT);
4219 SDValue Ops[] = { Op1, Op2, Op3 };
4220 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4223 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4224 MVT VT, const SDValue *Ops,
4226 SDVTList VTs = getVTList(VT);
4227 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4230 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4231 MVT VT1, MVT VT2, const SDValue *Ops,
4233 SDVTList VTs = getVTList(VT1, VT2);
4234 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4237 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4239 SDVTList VTs = getVTList(VT1, VT2);
4240 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
4243 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4244 MVT VT1, MVT VT2, MVT VT3,
4245 const SDValue *Ops, unsigned NumOps) {
4246 SDVTList VTs = getVTList(VT1, VT2, VT3);
4247 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4250 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4251 MVT VT1, MVT VT2, MVT VT3, MVT VT4,
4252 const SDValue *Ops, unsigned NumOps) {
4253 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4254 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4257 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4260 SDVTList VTs = getVTList(VT1, VT2);
4261 SDValue Ops[] = { Op1 };
4262 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4265 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4267 SDValue Op1, SDValue Op2) {
4268 SDVTList VTs = getVTList(VT1, VT2);
4269 SDValue Ops[] = { Op1, Op2 };
4270 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4273 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4275 SDValue Op1, SDValue Op2,
4277 SDVTList VTs = getVTList(VT1, VT2);
4278 SDValue Ops[] = { Op1, Op2, Op3 };
4279 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4282 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4283 MVT VT1, MVT VT2, MVT VT3,
4284 SDValue Op1, SDValue Op2,
4286 SDVTList VTs = getVTList(VT1, VT2, VT3);
4287 SDValue Ops[] = { Op1, Op2, Op3 };
4288 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4291 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4292 SDVTList VTs, const SDValue *Ops,
4294 return MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
4297 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4299 SDVTList VTs = getVTList(VT);
4300 return MorphNodeTo(N, Opc, VTs, 0, 0);
4303 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4304 MVT VT, SDValue Op1) {
4305 SDVTList VTs = getVTList(VT);
4306 SDValue Ops[] = { Op1 };
4307 return MorphNodeTo(N, Opc, VTs, Ops, 1);
4310 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4311 MVT VT, SDValue Op1,
4313 SDVTList VTs = getVTList(VT);
4314 SDValue Ops[] = { Op1, Op2 };
4315 return MorphNodeTo(N, Opc, VTs, Ops, 2);
4318 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4319 MVT VT, SDValue Op1,
4320 SDValue Op2, SDValue Op3) {
4321 SDVTList VTs = getVTList(VT);
4322 SDValue Ops[] = { Op1, Op2, Op3 };
4323 return MorphNodeTo(N, Opc, VTs, Ops, 3);
4326 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4327 MVT VT, const SDValue *Ops,
4329 SDVTList VTs = getVTList(VT);
4330 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4333 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4334 MVT VT1, MVT VT2, const SDValue *Ops,
4336 SDVTList VTs = getVTList(VT1, VT2);
4337 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4340 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4342 SDVTList VTs = getVTList(VT1, VT2);
4343 return MorphNodeTo(N, Opc, VTs, (SDValue *)0, 0);
4346 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4347 MVT VT1, MVT VT2, MVT VT3,
4348 const SDValue *Ops, unsigned NumOps) {
4349 SDVTList VTs = getVTList(VT1, VT2, VT3);
4350 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4353 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4356 SDVTList VTs = getVTList(VT1, VT2);
4357 SDValue Ops[] = { Op1 };
4358 return MorphNodeTo(N, Opc, VTs, Ops, 1);
4361 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4363 SDValue Op1, SDValue Op2) {
4364 SDVTList VTs = getVTList(VT1, VT2);
4365 SDValue Ops[] = { Op1, Op2 };
4366 return MorphNodeTo(N, Opc, VTs, Ops, 2);
4369 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4371 SDValue Op1, SDValue Op2,
4373 SDVTList VTs = getVTList(VT1, VT2);
4374 SDValue Ops[] = { Op1, Op2, Op3 };
4375 return MorphNodeTo(N, Opc, VTs, Ops, 3);
4378 /// MorphNodeTo - These *mutate* the specified node to have the specified
4379 /// return type, opcode, and operands.
4381 /// Note that MorphNodeTo returns the resultant node. If there is already a
4382 /// node of the specified opcode and operands, it returns that node instead of
4383 /// the current one. Note that the DebugLoc need not be the same.
4385 /// Using MorphNodeTo is faster than creating a new node and swapping it in
4386 /// with ReplaceAllUsesWith both because it often avoids allocating a new
4387 /// node, and because it doesn't require CSE recalculation for any of
4388 /// the node's users.
4390 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4391 SDVTList VTs, const SDValue *Ops,
4393 // If an identical node already exists, use it.
4395 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) {
4396 FoldingSetNodeID ID;
4397 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
4398 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
4402 if (!RemoveNodeFromCSEMaps(N))
4405 // Start the morphing.
4407 N->ValueList = VTs.VTs;
4408 N->NumValues = VTs.NumVTs;
4410 // Clear the operands list, updating used nodes to remove this from their
4411 // use list. Keep track of any operands that become dead as a result.
4412 SmallPtrSet<SDNode*, 16> DeadNodeSet;
4413 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
4415 SDNode *Used = Use.getNode();
4417 if (Used->use_empty())
4418 DeadNodeSet.insert(Used);
4421 // If NumOps is larger than the # of operands we currently have, reallocate
4422 // the operand list.
4423 if (NumOps > N->NumOperands) {
4424 if (N->OperandsNeedDelete)
4425 delete[] N->OperandList;
4427 if (N->isMachineOpcode()) {
4428 // We're creating a final node that will live unmorphed for the
4429 // remainder of the current SelectionDAG iteration, so we can allocate
4430 // the operands directly out of a pool with no recycling metadata.
4431 N->OperandList = OperandAllocator.Allocate<SDUse>(NumOps);
4432 N->OperandsNeedDelete = false;
4434 N->OperandList = new SDUse[NumOps];
4435 N->OperandsNeedDelete = true;
4439 // Assign the new operands.
4440 N->NumOperands = NumOps;
4441 for (unsigned i = 0, e = NumOps; i != e; ++i) {
4442 N->OperandList[i].setUser(N);
4443 N->OperandList[i].setInitial(Ops[i]);
4446 // Delete any nodes that are still dead after adding the uses for the
4448 SmallVector<SDNode *, 16> DeadNodes;
4449 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
4450 E = DeadNodeSet.end(); I != E; ++I)
4451 if ((*I)->use_empty())
4452 DeadNodes.push_back(*I);
4453 RemoveDeadNodes(DeadNodes);
4456 CSEMap.InsertNode(N, IP); // Memoize the new node.
4461 /// getTargetNode - These are used for target selectors to create a new node
4462 /// with specified return type(s), target opcode, and operands.
4464 /// Note that getTargetNode returns the resultant node. If there is already a
4465 /// node of the specified opcode and operands, it returns that node instead of
4466 /// the current one.
4467 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT) {
4468 return getNode(~Opcode, dl, VT).getNode();
4471 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT,
4473 return getNode(~Opcode, dl, VT, Op1).getNode();
4476 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT,
4477 SDValue Op1, SDValue Op2) {
4478 return getNode(~Opcode, dl, VT, Op1, Op2).getNode();
4481 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT,
4482 SDValue Op1, SDValue Op2,
4484 return getNode(~Opcode, dl, VT, Op1, Op2, Op3).getNode();
4487 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT,
4488 const SDValue *Ops, unsigned NumOps) {
4489 return getNode(~Opcode, dl, VT, Ops, NumOps).getNode();
4492 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4494 SDVTList VTs = getVTList(VT1, VT2);
4496 return getNode(~Opcode, dl, VTs, &Op, 0).getNode();
4499 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1,
4500 MVT VT2, SDValue Op1) {
4501 SDVTList VTs = getVTList(VT1, VT2);
4502 return getNode(~Opcode, dl, VTs, &Op1, 1).getNode();
4505 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1,
4506 MVT VT2, SDValue Op1,
4508 SDVTList VTs = getVTList(VT1, VT2);
4509 SDValue Ops[] = { Op1, Op2 };
4510 return getNode(~Opcode, dl, VTs, Ops, 2).getNode();
4513 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1,
4514 MVT VT2, SDValue Op1,
4515 SDValue Op2, SDValue Op3) {
4516 SDVTList VTs = getVTList(VT1, VT2);
4517 SDValue Ops[] = { Op1, Op2, Op3 };
4518 return getNode(~Opcode, dl, VTs, Ops, 3).getNode();
4521 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4523 const SDValue *Ops, unsigned NumOps) {
4524 SDVTList VTs = getVTList(VT1, VT2);
4525 return getNode(~Opcode, dl, VTs, Ops, NumOps).getNode();
4528 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4529 MVT VT1, MVT VT2, MVT VT3,
4530 SDValue Op1, SDValue Op2) {
4531 SDVTList VTs = getVTList(VT1, VT2, VT3);
4532 SDValue Ops[] = { Op1, Op2 };
4533 return getNode(~Opcode, dl, VTs, Ops, 2).getNode();
4536 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4537 MVT VT1, MVT VT2, MVT VT3,
4538 SDValue Op1, SDValue Op2,
4540 SDVTList VTs = getVTList(VT1, VT2, VT3);
4541 SDValue Ops[] = { Op1, Op2, Op3 };
4542 return getNode(~Opcode, dl, VTs, Ops, 3).getNode();
4545 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4546 MVT VT1, MVT VT2, MVT VT3,
4547 const SDValue *Ops, unsigned NumOps) {
4548 SDVTList VTs = getVTList(VT1, VT2, VT3);
4549 return getNode(~Opcode, dl, VTs, Ops, NumOps).getNode();
4552 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1,
4553 MVT VT2, MVT VT3, MVT VT4,
4554 const SDValue *Ops, unsigned NumOps) {
4555 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4556 return getNode(~Opcode, dl, VTs, Ops, NumOps).getNode();
4559 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4560 const std::vector<MVT> &ResultTys,
4561 const SDValue *Ops, unsigned NumOps) {
4562 return getNode(~Opcode, dl, ResultTys, Ops, NumOps).getNode();
4565 /// getNodeIfExists - Get the specified node if it's already available, or
4566 /// else return NULL.
4567 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
4568 const SDValue *Ops, unsigned NumOps) {
4569 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4570 FoldingSetNodeID ID;
4571 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4573 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4579 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4580 /// This can cause recursive merging of nodes in the DAG.
4582 /// This version assumes From has a single result value.
4584 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To,
4585 DAGUpdateListener *UpdateListener) {
4586 SDNode *From = FromN.getNode();
4587 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
4588 "Cannot replace with this method!");
4589 assert(From != To.getNode() && "Cannot replace uses of with self");
4591 // Iterate over all the existing uses of From. New uses will be added
4592 // to the beginning of the use list, which we avoid visiting.
4593 // This specifically avoids visiting uses of From that arise while the
4594 // replacement is happening, because any such uses would be the result
4595 // of CSE: If an existing node looks like From after one of its operands
4596 // is replaced by To, we don't want to replace of all its users with To
4597 // too. See PR3018 for more info.
4598 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
4602 // This node is about to morph, remove its old self from the CSE maps.
4603 RemoveNodeFromCSEMaps(User);
4605 // A user can appear in a use list multiple times, and when this
4606 // happens the uses are usually next to each other in the list.
4607 // To help reduce the number of CSE recomputations, process all
4608 // the uses of this user that we can find this way.
4610 SDUse &Use = UI.getUse();
4613 } while (UI != UE && *UI == User);
4615 // Now that we have modified User, add it back to the CSE maps. If it
4616 // already exists there, recursively merge the results together.
4617 AddModifiedNodeToCSEMaps(User, UpdateListener);
4621 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4622 /// This can cause recursive merging of nodes in the DAG.
4624 /// This version assumes that for each value of From, there is a
4625 /// corresponding value in To in the same position with the same type.
4627 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To,
4628 DAGUpdateListener *UpdateListener) {
4630 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
4631 assert((!From->hasAnyUseOfValue(i) ||
4632 From->getValueType(i) == To->getValueType(i)) &&
4633 "Cannot use this version of ReplaceAllUsesWith!");
4636 // Handle the trivial case.
4640 // Iterate over just the existing users of From. See the comments in
4641 // the ReplaceAllUsesWith above.
4642 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
4646 // This node is about to morph, remove its old self from the CSE maps.
4647 RemoveNodeFromCSEMaps(User);
4649 // A user can appear in a use list multiple times, and when this
4650 // happens the uses are usually next to each other in the list.
4651 // To help reduce the number of CSE recomputations, process all
4652 // the uses of this user that we can find this way.
4654 SDUse &Use = UI.getUse();
4657 } while (UI != UE && *UI == User);
4659 // Now that we have modified User, add it back to the CSE maps. If it
4660 // already exists there, recursively merge the results together.
4661 AddModifiedNodeToCSEMaps(User, UpdateListener);
4665 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4666 /// This can cause recursive merging of nodes in the DAG.
4668 /// This version can replace From with any result values. To must match the
4669 /// number and types of values returned by From.
4670 void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
4672 DAGUpdateListener *UpdateListener) {
4673 if (From->getNumValues() == 1) // Handle the simple case efficiently.
4674 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener);
4676 // Iterate over just the existing users of From. See the comments in
4677 // the ReplaceAllUsesWith above.
4678 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
4682 // This node is about to morph, remove its old self from the CSE maps.
4683 RemoveNodeFromCSEMaps(User);
4685 // A user can appear in a use list multiple times, and when this
4686 // happens the uses are usually next to each other in the list.
4687 // To help reduce the number of CSE recomputations, process all
4688 // the uses of this user that we can find this way.
4690 SDUse &Use = UI.getUse();
4691 const SDValue &ToOp = To[Use.getResNo()];
4694 } while (UI != UE && *UI == User);
4696 // Now that we have modified User, add it back to the CSE maps. If it
4697 // already exists there, recursively merge the results together.
4698 AddModifiedNodeToCSEMaps(User, UpdateListener);
4702 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
4703 /// uses of other values produced by From.getNode() alone. The Deleted
4704 /// vector is handled the same way as for ReplaceAllUsesWith.
4705 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To,
4706 DAGUpdateListener *UpdateListener){
4707 // Handle the really simple, really trivial case efficiently.
4708 if (From == To) return;
4710 // Handle the simple, trivial, case efficiently.
4711 if (From.getNode()->getNumValues() == 1) {
4712 ReplaceAllUsesWith(From, To, UpdateListener);
4716 // Iterate over just the existing users of From. See the comments in
4717 // the ReplaceAllUsesWith above.
4718 SDNode::use_iterator UI = From.getNode()->use_begin(),
4719 UE = From.getNode()->use_end();
4722 bool UserRemovedFromCSEMaps = false;
4724 // A user can appear in a use list multiple times, and when this
4725 // happens the uses are usually next to each other in the list.
4726 // To help reduce the number of CSE recomputations, process all
4727 // the uses of this user that we can find this way.
4729 SDUse &Use = UI.getUse();
4731 // Skip uses of different values from the same node.
4732 if (Use.getResNo() != From.getResNo()) {
4737 // If this node hasn't been modified yet, it's still in the CSE maps,
4738 // so remove its old self from the CSE maps.
4739 if (!UserRemovedFromCSEMaps) {
4740 RemoveNodeFromCSEMaps(User);
4741 UserRemovedFromCSEMaps = true;
4746 } while (UI != UE && *UI == User);
4748 // We are iterating over all uses of the From node, so if a use
4749 // doesn't use the specific value, no changes are made.
4750 if (!UserRemovedFromCSEMaps)
4753 // Now that we have modified User, add it back to the CSE maps. If it
4754 // already exists there, recursively merge the results together.
4755 AddModifiedNodeToCSEMaps(User, UpdateListener);
4760 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
4761 /// to record information about a use.
4768 /// operator< - Sort Memos by User.
4769 bool operator<(const UseMemo &L, const UseMemo &R) {
4770 return (intptr_t)L.User < (intptr_t)R.User;
4774 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
4775 /// uses of other values produced by From.getNode() alone. The same value
4776 /// may appear in both the From and To list. The Deleted vector is
4777 /// handled the same way as for ReplaceAllUsesWith.
4778 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
4781 DAGUpdateListener *UpdateListener){
4782 // Handle the simple, trivial case efficiently.
4784 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener);
4786 // Read up all the uses and make records of them. This helps
4787 // processing new uses that are introduced during the
4788 // replacement process.
4789 SmallVector<UseMemo, 4> Uses;
4790 for (unsigned i = 0; i != Num; ++i) {
4791 unsigned FromResNo = From[i].getResNo();
4792 SDNode *FromNode = From[i].getNode();
4793 for (SDNode::use_iterator UI = FromNode->use_begin(),
4794 E = FromNode->use_end(); UI != E; ++UI) {
4795 SDUse &Use = UI.getUse();
4796 if (Use.getResNo() == FromResNo) {
4797 UseMemo Memo = { *UI, i, &Use };
4798 Uses.push_back(Memo);
4803 // Sort the uses, so that all the uses from a given User are together.
4804 std::sort(Uses.begin(), Uses.end());
4806 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
4807 UseIndex != UseIndexEnd; ) {
4808 // We know that this user uses some value of From. If it is the right
4809 // value, update it.
4810 SDNode *User = Uses[UseIndex].User;
4812 // This node is about to morph, remove its old self from the CSE maps.
4813 RemoveNodeFromCSEMaps(User);
4815 // The Uses array is sorted, so all the uses for a given User
4816 // are next to each other in the list.
4817 // To help reduce the number of CSE recomputations, process all
4818 // the uses of this user that we can find this way.
4820 unsigned i = Uses[UseIndex].Index;
4821 SDUse &Use = *Uses[UseIndex].Use;
4825 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
4827 // Now that we have modified User, add it back to the CSE maps. If it
4828 // already exists there, recursively merge the results together.
4829 AddModifiedNodeToCSEMaps(User, UpdateListener);
4833 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
4834 /// based on their topological order. It returns the maximum id and a vector
4835 /// of the SDNodes* in assigned order by reference.
4836 unsigned SelectionDAG::AssignTopologicalOrder() {
4838 unsigned DAGSize = 0;
4840 // SortedPos tracks the progress of the algorithm. Nodes before it are
4841 // sorted, nodes after it are unsorted. When the algorithm completes
4842 // it is at the end of the list.
4843 allnodes_iterator SortedPos = allnodes_begin();
4845 // Visit all the nodes. Move nodes with no operands to the front of
4846 // the list immediately. Annotate nodes that do have operands with their
4847 // operand count. Before we do this, the Node Id fields of the nodes
4848 // may contain arbitrary values. After, the Node Id fields for nodes
4849 // before SortedPos will contain the topological sort index, and the
4850 // Node Id fields for nodes At SortedPos and after will contain the
4851 // count of outstanding operands.
4852 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
4854 unsigned Degree = N->getNumOperands();
4856 // A node with no uses, add it to the result array immediately.
4857 N->setNodeId(DAGSize++);
4858 allnodes_iterator Q = N;
4860 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
4863 // Temporarily use the Node Id as scratch space for the degree count.
4864 N->setNodeId(Degree);
4868 // Visit all the nodes. As we iterate, moves nodes into sorted order,
4869 // such that by the time the end is reached all nodes will be sorted.
4870 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
4872 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
4875 unsigned Degree = P->getNodeId();
4878 // All of P's operands are sorted, so P may sorted now.
4879 P->setNodeId(DAGSize++);
4881 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
4884 // Update P's outstanding operand count.
4885 P->setNodeId(Degree);
4890 assert(SortedPos == AllNodes.end() &&
4891 "Topological sort incomplete!");
4892 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
4893 "First node in topological sort is not the entry token!");
4894 assert(AllNodes.front().getNodeId() == 0 &&
4895 "First node in topological sort has non-zero id!");
4896 assert(AllNodes.front().getNumOperands() == 0 &&
4897 "First node in topological sort has operands!");
4898 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
4899 "Last node in topologic sort has unexpected id!");
4900 assert(AllNodes.back().use_empty() &&
4901 "Last node in topologic sort has users!");
4902 assert(DAGSize == allnodes_size() && "Node count mismatch!");
4908 //===----------------------------------------------------------------------===//
4910 //===----------------------------------------------------------------------===//
4912 HandleSDNode::~HandleSDNode() {
4916 GlobalAddressSDNode::GlobalAddressSDNode(bool isTarget, const GlobalValue *GA,
4918 : SDNode(isa<GlobalVariable>(GA) &&
4919 cast<GlobalVariable>(GA)->isThreadLocal() ?
4921 (isTarget ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress) :
4923 (isTarget ? ISD::TargetGlobalAddress : ISD::GlobalAddress),
4924 DebugLoc::getUnknownLoc(), getSDVTList(VT)), Offset(o) {
4925 TheGlobal = const_cast<GlobalValue*>(GA);
4928 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, MVT memvt,
4929 const Value *srcValue, int SVO,
4930 unsigned alignment, bool vol)
4931 : SDNode(Opc, dl, VTs), MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO) {
4932 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, vol, alignment);
4933 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
4934 assert(getAlignment() == alignment && "Alignment representation error!");
4935 assert(isVolatile() == vol && "Volatile representation error!");
4938 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs,
4940 unsigned NumOps, MVT memvt, const Value *srcValue,
4941 int SVO, unsigned alignment, bool vol)
4942 : SDNode(Opc, dl, VTs, Ops, NumOps),
4943 MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO) {
4944 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, vol, alignment);
4945 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
4946 assert(getAlignment() == alignment && "Alignment representation error!");
4947 assert(isVolatile() == vol && "Volatile representation error!");
4950 /// getMemOperand - Return a MachineMemOperand object describing the memory
4951 /// reference performed by this memory reference.
4952 MachineMemOperand MemSDNode::getMemOperand() const {
4954 if (isa<LoadSDNode>(this))
4955 Flags = MachineMemOperand::MOLoad;
4956 else if (isa<StoreSDNode>(this))
4957 Flags = MachineMemOperand::MOStore;
4958 else if (isa<AtomicSDNode>(this)) {
4959 Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
4962 const MemIntrinsicSDNode* MemIntrinNode = dyn_cast<MemIntrinsicSDNode>(this);
4963 assert(MemIntrinNode && "Unknown MemSDNode opcode!");
4964 if (MemIntrinNode->readMem()) Flags |= MachineMemOperand::MOLoad;
4965 if (MemIntrinNode->writeMem()) Flags |= MachineMemOperand::MOStore;
4968 int Size = (getMemoryVT().getSizeInBits() + 7) >> 3;
4969 if (isVolatile()) Flags |= MachineMemOperand::MOVolatile;
4971 // Check if the memory reference references a frame index
4972 const FrameIndexSDNode *FI =
4973 dyn_cast<const FrameIndexSDNode>(getBasePtr().getNode());
4974 if (!getSrcValue() && FI)
4975 return MachineMemOperand(PseudoSourceValue::getFixedStack(FI->getIndex()),
4976 Flags, 0, Size, getAlignment());
4978 return MachineMemOperand(getSrcValue(), Flags, getSrcValueOffset(),
4979 Size, getAlignment());
4982 /// Profile - Gather unique data for the node.
4984 void SDNode::Profile(FoldingSetNodeID &ID) const {
4985 AddNodeIDNode(ID, this);
4988 static ManagedStatic<std::set<MVT, MVT::compareRawBits> > EVTs;
4989 static MVT VTs[MVT::LAST_VALUETYPE];
4990 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
4992 /// getValueTypeList - Return a pointer to the specified value type.
4994 const MVT *SDNode::getValueTypeList(MVT VT) {
4995 sys::SmartScopedLock<true> Lock(&*VTMutex);
4996 if (VT.isExtended()) {
4997 return &(*EVTs->insert(VT).first);
4999 VTs[VT.getSimpleVT()] = VT;
5000 return &VTs[VT.getSimpleVT()];
5004 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
5005 /// indicated value. This method ignores uses of other values defined by this
5007 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
5008 assert(Value < getNumValues() && "Bad value!");
5010 // TODO: Only iterate over uses of a given value of the node
5011 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
5012 if (UI.getUse().getResNo() == Value) {
5019 // Found exactly the right number of uses?
5024 /// hasAnyUseOfValue - Return true if there are any use of the indicated
5025 /// value. This method ignores uses of other values defined by this operation.
5026 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
5027 assert(Value < getNumValues() && "Bad value!");
5029 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
5030 if (UI.getUse().getResNo() == Value)
5037 /// isOnlyUserOf - Return true if this node is the only use of N.
5039 bool SDNode::isOnlyUserOf(SDNode *N) const {
5041 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
5052 /// isOperand - Return true if this node is an operand of N.
5054 bool SDValue::isOperandOf(SDNode *N) const {
5055 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5056 if (*this == N->getOperand(i))
5061 bool SDNode::isOperandOf(SDNode *N) const {
5062 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
5063 if (this == N->OperandList[i].getNode())
5068 /// reachesChainWithoutSideEffects - Return true if this operand (which must
5069 /// be a chain) reaches the specified operand without crossing any
5070 /// side-effecting instructions. In practice, this looks through token
5071 /// factors and non-volatile loads. In order to remain efficient, this only
5072 /// looks a couple of nodes in, it does not do an exhaustive search.
5073 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
5074 unsigned Depth) const {
5075 if (*this == Dest) return true;
5077 // Don't search too deeply, we just want to be able to see through
5078 // TokenFactor's etc.
5079 if (Depth == 0) return false;
5081 // If this is a token factor, all inputs to the TF happen in parallel. If any
5082 // of the operands of the TF reach dest, then we can do the xform.
5083 if (getOpcode() == ISD::TokenFactor) {
5084 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
5085 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
5090 // Loads don't have side effects, look through them.
5091 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
5092 if (!Ld->isVolatile())
5093 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
5099 static void findPredecessor(SDNode *N, const SDNode *P, bool &found,
5100 SmallPtrSet<SDNode *, 32> &Visited) {
5101 if (found || !Visited.insert(N))
5104 for (unsigned i = 0, e = N->getNumOperands(); !found && i != e; ++i) {
5105 SDNode *Op = N->getOperand(i).getNode();
5110 findPredecessor(Op, P, found, Visited);
5114 /// isPredecessorOf - Return true if this node is a predecessor of N. This node
5115 /// is either an operand of N or it can be reached by recursively traversing
5116 /// up the operands.
5117 /// NOTE: this is an expensive method. Use it carefully.
5118 bool SDNode::isPredecessorOf(SDNode *N) const {
5119 SmallPtrSet<SDNode *, 32> Visited;
5121 findPredecessor(N, this, found, Visited);
5125 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
5126 assert(Num < NumOperands && "Invalid child # of SDNode!");
5127 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
5130 std::string SDNode::getOperationName(const SelectionDAG *G) const {
5131 switch (getOpcode()) {
5133 if (getOpcode() < ISD::BUILTIN_OP_END)
5134 return "<<Unknown DAG Node>>";
5135 if (isMachineOpcode()) {
5137 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo())
5138 if (getMachineOpcode() < TII->getNumOpcodes())
5139 return TII->get(getMachineOpcode()).getName();
5140 return "<<Unknown Machine Node>>";
5143 const TargetLowering &TLI = G->getTargetLoweringInfo();
5144 const char *Name = TLI.getTargetNodeName(getOpcode());
5145 if (Name) return Name;
5146 return "<<Unknown Target Node>>";
5148 return "<<Unknown Node>>";
5151 case ISD::DELETED_NODE:
5152 return "<<Deleted Node!>>";
5154 case ISD::PREFETCH: return "Prefetch";
5155 case ISD::MEMBARRIER: return "MemBarrier";
5156 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
5157 case ISD::ATOMIC_SWAP: return "AtomicSwap";
5158 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
5159 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
5160 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
5161 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
5162 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
5163 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
5164 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
5165 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
5166 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
5167 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
5168 case ISD::PCMARKER: return "PCMarker";
5169 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
5170 case ISD::SRCVALUE: return "SrcValue";
5171 case ISD::MEMOPERAND: return "MemOperand";
5172 case ISD::EntryToken: return "EntryToken";
5173 case ISD::TokenFactor: return "TokenFactor";
5174 case ISD::AssertSext: return "AssertSext";
5175 case ISD::AssertZext: return "AssertZext";
5177 case ISD::BasicBlock: return "BasicBlock";
5178 case ISD::ARG_FLAGS: return "ArgFlags";
5179 case ISD::VALUETYPE: return "ValueType";
5180 case ISD::Register: return "Register";
5182 case ISD::Constant: return "Constant";
5183 case ISD::ConstantFP: return "ConstantFP";
5184 case ISD::GlobalAddress: return "GlobalAddress";
5185 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
5186 case ISD::FrameIndex: return "FrameIndex";
5187 case ISD::JumpTable: return "JumpTable";
5188 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
5189 case ISD::RETURNADDR: return "RETURNADDR";
5190 case ISD::FRAMEADDR: return "FRAMEADDR";
5191 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
5192 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR";
5193 case ISD::EHSELECTION: return "EHSELECTION";
5194 case ISD::EH_RETURN: return "EH_RETURN";
5195 case ISD::ConstantPool: return "ConstantPool";
5196 case ISD::ExternalSymbol: return "ExternalSymbol";
5197 case ISD::INTRINSIC_WO_CHAIN: {
5198 unsigned IID = cast<ConstantSDNode>(getOperand(0))->getZExtValue();
5199 return Intrinsic::getName((Intrinsic::ID)IID);
5201 case ISD::INTRINSIC_VOID:
5202 case ISD::INTRINSIC_W_CHAIN: {
5203 unsigned IID = cast<ConstantSDNode>(getOperand(1))->getZExtValue();
5204 return Intrinsic::getName((Intrinsic::ID)IID);
5207 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
5208 case ISD::TargetConstant: return "TargetConstant";
5209 case ISD::TargetConstantFP:return "TargetConstantFP";
5210 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
5211 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
5212 case ISD::TargetFrameIndex: return "TargetFrameIndex";
5213 case ISD::TargetJumpTable: return "TargetJumpTable";
5214 case ISD::TargetConstantPool: return "TargetConstantPool";
5215 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
5217 case ISD::CopyToReg: return "CopyToReg";
5218 case ISD::CopyFromReg: return "CopyFromReg";
5219 case ISD::UNDEF: return "undef";
5220 case ISD::MERGE_VALUES: return "merge_values";
5221 case ISD::INLINEASM: return "inlineasm";
5222 case ISD::DBG_LABEL: return "dbg_label";
5223 case ISD::EH_LABEL: return "eh_label";
5224 case ISD::DECLARE: return "declare";
5225 case ISD::HANDLENODE: return "handlenode";
5226 case ISD::FORMAL_ARGUMENTS: return "formal_arguments";
5227 case ISD::CALL: return "call";
5230 case ISD::FABS: return "fabs";
5231 case ISD::FNEG: return "fneg";
5232 case ISD::FSQRT: return "fsqrt";
5233 case ISD::FSIN: return "fsin";
5234 case ISD::FCOS: return "fcos";
5235 case ISD::FPOWI: return "fpowi";
5236 case ISD::FPOW: return "fpow";
5237 case ISD::FTRUNC: return "ftrunc";
5238 case ISD::FFLOOR: return "ffloor";
5239 case ISD::FCEIL: return "fceil";
5240 case ISD::FRINT: return "frint";
5241 case ISD::FNEARBYINT: return "fnearbyint";
5244 case ISD::ADD: return "add";
5245 case ISD::SUB: return "sub";
5246 case ISD::MUL: return "mul";
5247 case ISD::MULHU: return "mulhu";
5248 case ISD::MULHS: return "mulhs";
5249 case ISD::SDIV: return "sdiv";
5250 case ISD::UDIV: return "udiv";
5251 case ISD::SREM: return "srem";
5252 case ISD::UREM: return "urem";
5253 case ISD::SMUL_LOHI: return "smul_lohi";
5254 case ISD::UMUL_LOHI: return "umul_lohi";
5255 case ISD::SDIVREM: return "sdivrem";
5256 case ISD::UDIVREM: return "udivrem";
5257 case ISD::AND: return "and";
5258 case ISD::OR: return "or";
5259 case ISD::XOR: return "xor";
5260 case ISD::SHL: return "shl";
5261 case ISD::SRA: return "sra";
5262 case ISD::SRL: return "srl";
5263 case ISD::ROTL: return "rotl";
5264 case ISD::ROTR: return "rotr";
5265 case ISD::FADD: return "fadd";
5266 case ISD::FSUB: return "fsub";
5267 case ISD::FMUL: return "fmul";
5268 case ISD::FDIV: return "fdiv";
5269 case ISD::FREM: return "frem";
5270 case ISD::FCOPYSIGN: return "fcopysign";
5271 case ISD::FGETSIGN: return "fgetsign";
5273 case ISD::SETCC: return "setcc";
5274 case ISD::VSETCC: return "vsetcc";
5275 case ISD::SELECT: return "select";
5276 case ISD::SELECT_CC: return "select_cc";
5277 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
5278 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
5279 case ISD::CONCAT_VECTORS: return "concat_vectors";
5280 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
5281 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
5282 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
5283 case ISD::CARRY_FALSE: return "carry_false";
5284 case ISD::ADDC: return "addc";
5285 case ISD::ADDE: return "adde";
5286 case ISD::SADDO: return "saddo";
5287 case ISD::UADDO: return "uaddo";
5288 case ISD::SSUBO: return "ssubo";
5289 case ISD::USUBO: return "usubo";
5290 case ISD::SMULO: return "smulo";
5291 case ISD::UMULO: return "umulo";
5292 case ISD::SUBC: return "subc";
5293 case ISD::SUBE: return "sube";
5294 case ISD::SHL_PARTS: return "shl_parts";
5295 case ISD::SRA_PARTS: return "sra_parts";
5296 case ISD::SRL_PARTS: return "srl_parts";
5298 // Conversion operators.
5299 case ISD::SIGN_EXTEND: return "sign_extend";
5300 case ISD::ZERO_EXTEND: return "zero_extend";
5301 case ISD::ANY_EXTEND: return "any_extend";
5302 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
5303 case ISD::TRUNCATE: return "truncate";
5304 case ISD::FP_ROUND: return "fp_round";
5305 case ISD::FLT_ROUNDS_: return "flt_rounds";
5306 case ISD::FP_ROUND_INREG: return "fp_round_inreg";
5307 case ISD::FP_EXTEND: return "fp_extend";
5309 case ISD::SINT_TO_FP: return "sint_to_fp";
5310 case ISD::UINT_TO_FP: return "uint_to_fp";
5311 case ISD::FP_TO_SINT: return "fp_to_sint";
5312 case ISD::FP_TO_UINT: return "fp_to_uint";
5313 case ISD::BIT_CONVERT: return "bit_convert";
5315 case ISD::CONVERT_RNDSAT: {
5316 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) {
5317 default: assert(0 && "Unknown cvt code!");
5318 case ISD::CVT_FF: return "cvt_ff";
5319 case ISD::CVT_FS: return "cvt_fs";
5320 case ISD::CVT_FU: return "cvt_fu";
5321 case ISD::CVT_SF: return "cvt_sf";
5322 case ISD::CVT_UF: return "cvt_uf";
5323 case ISD::CVT_SS: return "cvt_ss";
5324 case ISD::CVT_SU: return "cvt_su";
5325 case ISD::CVT_US: return "cvt_us";
5326 case ISD::CVT_UU: return "cvt_uu";
5330 // Control flow instructions
5331 case ISD::BR: return "br";
5332 case ISD::BRIND: return "brind";
5333 case ISD::BR_JT: return "br_jt";
5334 case ISD::BRCOND: return "brcond";
5335 case ISD::BR_CC: return "br_cc";
5336 case ISD::RET: return "ret";
5337 case ISD::CALLSEQ_START: return "callseq_start";
5338 case ISD::CALLSEQ_END: return "callseq_end";
5341 case ISD::LOAD: return "load";
5342 case ISD::STORE: return "store";
5343 case ISD::VAARG: return "vaarg";
5344 case ISD::VACOPY: return "vacopy";
5345 case ISD::VAEND: return "vaend";
5346 case ISD::VASTART: return "vastart";
5347 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
5348 case ISD::EXTRACT_ELEMENT: return "extract_element";
5349 case ISD::BUILD_PAIR: return "build_pair";
5350 case ISD::STACKSAVE: return "stacksave";
5351 case ISD::STACKRESTORE: return "stackrestore";
5352 case ISD::TRAP: return "trap";
5355 case ISD::BSWAP: return "bswap";
5356 case ISD::CTPOP: return "ctpop";
5357 case ISD::CTTZ: return "cttz";
5358 case ISD::CTLZ: return "ctlz";
5361 case ISD::DBG_STOPPOINT: return "dbg_stoppoint";
5362 case ISD::DEBUG_LOC: return "debug_loc";
5365 case ISD::TRAMPOLINE: return "trampoline";
5368 switch (cast<CondCodeSDNode>(this)->get()) {
5369 default: assert(0 && "Unknown setcc condition!");
5370 case ISD::SETOEQ: return "setoeq";
5371 case ISD::SETOGT: return "setogt";
5372 case ISD::SETOGE: return "setoge";
5373 case ISD::SETOLT: return "setolt";
5374 case ISD::SETOLE: return "setole";
5375 case ISD::SETONE: return "setone";
5377 case ISD::SETO: return "seto";
5378 case ISD::SETUO: return "setuo";
5379 case ISD::SETUEQ: return "setue";
5380 case ISD::SETUGT: return "setugt";
5381 case ISD::SETUGE: return "setuge";
5382 case ISD::SETULT: return "setult";
5383 case ISD::SETULE: return "setule";
5384 case ISD::SETUNE: return "setune";
5386 case ISD::SETEQ: return "seteq";
5387 case ISD::SETGT: return "setgt";
5388 case ISD::SETGE: return "setge";
5389 case ISD::SETLT: return "setlt";
5390 case ISD::SETLE: return "setle";
5391 case ISD::SETNE: return "setne";
5396 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
5405 return "<post-inc>";
5407 return "<post-dec>";
5411 std::string ISD::ArgFlagsTy::getArgFlagsString() {
5412 std::string S = "< ";
5426 if (getByValAlign())
5427 S += "byval-align:" + utostr(getByValAlign()) + " ";
5429 S += "orig-align:" + utostr(getOrigAlign()) + " ";
5431 S += "byval-size:" + utostr(getByValSize()) + " ";
5435 void SDNode::dump() const { dump(0); }
5436 void SDNode::dump(const SelectionDAG *G) const {
5440 void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const {
5441 OS << (void*)this << ": ";
5443 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
5445 if (getValueType(i) == MVT::Other)
5448 OS << getValueType(i).getMVTString();
5450 OS << " = " << getOperationName(G);
5453 void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const {
5454 if (!isTargetOpcode() && getOpcode() == ISD::VECTOR_SHUFFLE) {
5455 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(this);
5457 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
5458 int Idx = SVN->getMaskElt(i);
5468 if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
5469 OS << '<' << CSDN->getAPIntValue() << '>';
5470 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
5471 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle)
5472 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
5473 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble)
5474 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
5477 CSDN->getValueAPF().bitcastToAPInt().dump();
5480 } else if (const GlobalAddressSDNode *GADN =
5481 dyn_cast<GlobalAddressSDNode>(this)) {
5482 int64_t offset = GADN->getOffset();
5484 WriteAsOperand(OS, GADN->getGlobal());
5487 OS << " + " << offset;
5489 OS << " " << offset;
5490 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
5491 OS << "<" << FIDN->getIndex() << ">";
5492 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
5493 OS << "<" << JTDN->getIndex() << ">";
5494 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
5495 int offset = CP->getOffset();
5496 if (CP->isMachineConstantPoolEntry())
5497 OS << "<" << *CP->getMachineCPVal() << ">";
5499 OS << "<" << *CP->getConstVal() << ">";
5501 OS << " + " << offset;
5503 OS << " " << offset;
5504 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
5506 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
5508 OS << LBB->getName() << " ";
5509 OS << (const void*)BBDN->getBasicBlock() << ">";
5510 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
5511 if (G && R->getReg() &&
5512 TargetRegisterInfo::isPhysicalRegister(R->getReg())) {
5513 OS << " " << G->getTarget().getRegisterInfo()->getName(R->getReg());
5515 OS << " #" << R->getReg();
5517 } else if (const ExternalSymbolSDNode *ES =
5518 dyn_cast<ExternalSymbolSDNode>(this)) {
5519 OS << "'" << ES->getSymbol() << "'";
5520 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
5522 OS << "<" << M->getValue() << ">";
5525 } else if (const MemOperandSDNode *M = dyn_cast<MemOperandSDNode>(this)) {
5526 if (M->MO.getValue())
5527 OS << "<" << M->MO.getValue() << ":" << M->MO.getOffset() << ">";
5529 OS << "<null:" << M->MO.getOffset() << ">";
5530 } else if (const ARG_FLAGSSDNode *N = dyn_cast<ARG_FLAGSSDNode>(this)) {
5531 OS << N->getArgFlags().getArgFlagsString();
5532 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
5533 OS << ":" << N->getVT().getMVTString();
5535 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
5536 const Value *SrcValue = LD->getSrcValue();
5537 int SrcOffset = LD->getSrcValueOffset();
5543 OS << ":" << SrcOffset << ">";
5546 switch (LD->getExtensionType()) {
5547 default: doExt = false; break;
5548 case ISD::EXTLOAD: OS << " <anyext "; break;
5549 case ISD::SEXTLOAD: OS << " <sext "; break;
5550 case ISD::ZEXTLOAD: OS << " <zext "; break;
5553 OS << LD->getMemoryVT().getMVTString() << ">";
5555 const char *AM = getIndexedModeName(LD->getAddressingMode());
5558 if (LD->isVolatile())
5559 OS << " <volatile>";
5560 OS << " alignment=" << LD->getAlignment();
5561 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
5562 const Value *SrcValue = ST->getSrcValue();
5563 int SrcOffset = ST->getSrcValueOffset();
5569 OS << ":" << SrcOffset << ">";
5571 if (ST->isTruncatingStore())
5572 OS << " <trunc " << ST->getMemoryVT().getMVTString() << ">";
5574 const char *AM = getIndexedModeName(ST->getAddressingMode());
5577 if (ST->isVolatile())
5578 OS << " <volatile>";
5579 OS << " alignment=" << ST->getAlignment();
5580 } else if (const AtomicSDNode* AT = dyn_cast<AtomicSDNode>(this)) {
5581 const Value *SrcValue = AT->getSrcValue();
5582 int SrcOffset = AT->getSrcValueOffset();
5588 OS << ":" << SrcOffset << ">";
5589 if (AT->isVolatile())
5590 OS << " <volatile>";
5591 OS << " alignment=" << AT->getAlignment();
5595 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
5598 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
5600 OS << (void*)getOperand(i).getNode();
5601 if (unsigned RN = getOperand(i).getResNo())
5604 print_details(OS, G);
5607 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
5608 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5609 if (N->getOperand(i).getNode()->hasOneUse())
5610 DumpNodes(N->getOperand(i).getNode(), indent+2, G);
5612 cerr << "\n" << std::string(indent+2, ' ')
5613 << (void*)N->getOperand(i).getNode() << ": <multiple use>";
5616 cerr << "\n" << std::string(indent, ' ');
5620 void SelectionDAG::dump() const {
5621 cerr << "SelectionDAG has " << AllNodes.size() << " nodes:";
5623 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end();
5625 const SDNode *N = I;
5626 if (!N->hasOneUse() && N != getRoot().getNode())
5627 DumpNodes(N, 2, this);
5630 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
5635 void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
5637 print_details(OS, G);
5640 typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet;
5641 static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
5642 const SelectionDAG *G, VisitedSDNodeSet &once) {
5643 if (!once.insert(N)) // If we've been here before, return now.
5645 // Dump the current SDNode, but don't end the line yet.
5646 OS << std::string(indent, ' ');
5648 // Having printed this SDNode, walk the children:
5649 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
5650 const SDNode *child = N->getOperand(i).getNode();
5653 if (child->getNumOperands() == 0) {
5654 // This child has no grandchildren; print it inline right here.
5655 child->printr(OS, G);
5657 } else { // Just the address. FIXME: also print the child's opcode
5659 if (unsigned RN = N->getOperand(i).getResNo())
5664 // Dump children that have grandchildren on their own line(s).
5665 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
5666 const SDNode *child = N->getOperand(i).getNode();
5667 DumpNodesr(OS, child, indent+2, G, once);
5671 void SDNode::dumpr() const {
5672 VisitedSDNodeSet once;
5673 DumpNodesr(errs(), this, 0, 0, once);
5677 // getAddressSpace - Return the address space this GlobalAddress belongs to.
5678 unsigned GlobalAddressSDNode::getAddressSpace() const {
5679 return getGlobal()->getType()->getAddressSpace();
5683 const Type *ConstantPoolSDNode::getType() const {
5684 if (isMachineConstantPoolEntry())
5685 return Val.MachineCPVal->getType();
5686 return Val.ConstVal->getType();
5689 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
5691 unsigned &SplatBitSize,
5693 unsigned MinSplatBits) {
5694 MVT VT = getValueType(0);
5695 assert(VT.isVector() && "Expected a vector type");
5696 unsigned sz = VT.getSizeInBits();
5697 if (MinSplatBits > sz)
5700 SplatValue = APInt(sz, 0);
5701 SplatUndef = APInt(sz, 0);
5703 // Get the bits. Bits with undefined values (when the corresponding element
5704 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
5705 // in SplatValue. If any of the values are not constant, give up and return
5707 unsigned int nOps = getNumOperands();
5708 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
5709 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
5710 for (unsigned i = 0; i < nOps; ++i) {
5711 SDValue OpVal = getOperand(i);
5712 unsigned BitPos = i * EltBitSize;
5714 if (OpVal.getOpcode() == ISD::UNDEF)
5715 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos +EltBitSize);
5716 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
5717 SplatValue |= (APInt(CN->getAPIntValue()).zextOrTrunc(EltBitSize).
5718 zextOrTrunc(sz) << BitPos);
5719 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
5720 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
5725 // The build_vector is all constants or undefs. Find the smallest element
5726 // size that splats the vector.
5728 HasAnyUndefs = (SplatUndef != 0);
5731 unsigned HalfSize = sz / 2;
5732 APInt HighValue = APInt(SplatValue).lshr(HalfSize).trunc(HalfSize);
5733 APInt LowValue = APInt(SplatValue).trunc(HalfSize);
5734 APInt HighUndef = APInt(SplatUndef).lshr(HalfSize).trunc(HalfSize);
5735 APInt LowUndef = APInt(SplatUndef).trunc(HalfSize);
5737 // If the two halves do not match (ignoring undef bits), stop here.
5738 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
5739 MinSplatBits > HalfSize)
5742 SplatValue = HighValue | LowValue;
5743 SplatUndef = HighUndef & LowUndef;
5752 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, MVT VT) {
5753 // Find the first non-undef value in the shuffle mask.
5755 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
5758 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
5760 // Make sure all remaining elements are either undef or the same as the first
5762 for (int Idx = Mask[i]; i != e; ++i)
5763 if (Mask[i] >= 0 && Mask[i] != Idx)