1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "SDNodeOrdering.h"
16 #include "SDNodeDbgValue.h"
17 #include "llvm/Constants.h"
18 #include "llvm/Analysis/DebugInfo.h"
19 #include "llvm/Analysis/ValueTracking.h"
20 #include "llvm/Function.h"
21 #include "llvm/GlobalAlias.h"
22 #include "llvm/GlobalVariable.h"
23 #include "llvm/Intrinsics.h"
24 #include "llvm/DerivedTypes.h"
25 #include "llvm/Assembly/Writer.h"
26 #include "llvm/CallingConv.h"
27 #include "llvm/CodeGen/MachineBasicBlock.h"
28 #include "llvm/CodeGen/MachineConstantPool.h"
29 #include "llvm/CodeGen/MachineFrameInfo.h"
30 #include "llvm/CodeGen/MachineModuleInfo.h"
31 #include "llvm/Target/TargetRegisterInfo.h"
32 #include "llvm/Target/TargetData.h"
33 #include "llvm/Target/TargetLowering.h"
34 #include "llvm/Target/TargetSelectionDAGInfo.h"
35 #include "llvm/Target/TargetOptions.h"
36 #include "llvm/Target/TargetInstrInfo.h"
37 #include "llvm/Target/TargetIntrinsicInfo.h"
38 #include "llvm/Target/TargetMachine.h"
39 #include "llvm/Support/CommandLine.h"
40 #include "llvm/Support/Debug.h"
41 #include "llvm/Support/ErrorHandling.h"
42 #include "llvm/Support/ManagedStatic.h"
43 #include "llvm/Support/MathExtras.h"
44 #include "llvm/Support/raw_ostream.h"
45 #include "llvm/Support/Mutex.h"
46 #include "llvm/ADT/SetVector.h"
47 #include "llvm/ADT/SmallPtrSet.h"
48 #include "llvm/ADT/SmallSet.h"
49 #include "llvm/ADT/SmallVector.h"
50 #include "llvm/ADT/StringExtras.h"
55 /// makeVTList - Return an instance of the SDVTList struct initialized with the
56 /// specified members.
57 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
58 SDVTList Res = {VTs, NumVTs};
62 static const fltSemantics *EVTToAPFloatSemantics(EVT VT) {
63 switch (VT.getSimpleVT().SimpleTy) {
64 default: llvm_unreachable("Unknown FP format");
65 case MVT::f32: return &APFloat::IEEEsingle;
66 case MVT::f64: return &APFloat::IEEEdouble;
67 case MVT::f80: return &APFloat::x87DoubleExtended;
68 case MVT::f128: return &APFloat::IEEEquad;
69 case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
73 SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {}
75 //===----------------------------------------------------------------------===//
76 // ConstantFPSDNode Class
77 //===----------------------------------------------------------------------===//
79 /// isExactlyValue - We don't rely on operator== working on double values, as
80 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
81 /// As such, this method can be used to do an exact bit-for-bit comparison of
82 /// two floating point values.
83 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
84 return getValueAPF().bitwiseIsEqual(V);
87 bool ConstantFPSDNode::isValueValidForType(EVT VT,
89 assert(VT.isFloatingPoint() && "Can only convert between FP types");
91 // PPC long double cannot be converted to any other type.
92 if (VT == MVT::ppcf128 ||
93 &Val.getSemantics() == &APFloat::PPCDoubleDouble)
96 // convert modifies in place, so make a copy.
97 APFloat Val2 = APFloat(Val);
99 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
104 //===----------------------------------------------------------------------===//
106 //===----------------------------------------------------------------------===//
108 /// isBuildVectorAllOnes - Return true if the specified node is a
109 /// BUILD_VECTOR where all of the elements are ~0 or undef.
110 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
111 // Look through a bit convert.
112 if (N->getOpcode() == ISD::BITCAST)
113 N = N->getOperand(0).getNode();
115 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
117 unsigned i = 0, e = N->getNumOperands();
119 // Skip over all of the undef values.
120 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
123 // Do not accept an all-undef vector.
124 if (i == e) return false;
126 // Do not accept build_vectors that aren't all constants or which have non-~0
128 SDValue NotZero = N->getOperand(i);
129 if (isa<ConstantSDNode>(NotZero)) {
130 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue())
132 } else if (isa<ConstantFPSDNode>(NotZero)) {
133 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF().
134 bitcastToAPInt().isAllOnesValue())
139 // Okay, we have at least one ~0 value, check to see if the rest match or are
141 for (++i; i != e; ++i)
142 if (N->getOperand(i) != NotZero &&
143 N->getOperand(i).getOpcode() != ISD::UNDEF)
149 /// isBuildVectorAllZeros - Return true if the specified node is a
150 /// BUILD_VECTOR where all of the elements are 0 or undef.
151 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
152 // Look through a bit convert.
153 if (N->getOpcode() == ISD::BITCAST)
154 N = N->getOperand(0).getNode();
156 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
158 unsigned i = 0, e = N->getNumOperands();
160 // Skip over all of the undef values.
161 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
164 // Do not accept an all-undef vector.
165 if (i == e) return false;
167 // Do not accept build_vectors that aren't all constants or which have non-0
169 SDValue Zero = N->getOperand(i);
170 if (isa<ConstantSDNode>(Zero)) {
171 if (!cast<ConstantSDNode>(Zero)->isNullValue())
173 } else if (isa<ConstantFPSDNode>(Zero)) {
174 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero())
179 // Okay, we have at least one 0 value, check to see if the rest match or are
181 for (++i; i != e; ++i)
182 if (N->getOperand(i) != Zero &&
183 N->getOperand(i).getOpcode() != ISD::UNDEF)
188 /// isScalarToVector - Return true if the specified node is a
189 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
190 /// element is not an undef.
191 bool ISD::isScalarToVector(const SDNode *N) {
192 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
195 if (N->getOpcode() != ISD::BUILD_VECTOR)
197 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
199 unsigned NumElems = N->getNumOperands();
202 for (unsigned i = 1; i < NumElems; ++i) {
203 SDValue V = N->getOperand(i);
204 if (V.getOpcode() != ISD::UNDEF)
210 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
211 /// when given the operation for (X op Y).
212 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
213 // To perform this operation, we just need to swap the L and G bits of the
215 unsigned OldL = (Operation >> 2) & 1;
216 unsigned OldG = (Operation >> 1) & 1;
217 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
218 (OldL << 1) | // New G bit
219 (OldG << 2)); // New L bit.
222 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
223 /// 'op' is a valid SetCC operation.
224 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
225 unsigned Operation = Op;
227 Operation ^= 7; // Flip L, G, E bits, but not U.
229 Operation ^= 15; // Flip all of the condition bits.
231 if (Operation > ISD::SETTRUE2)
232 Operation &= ~8; // Don't let N and U bits get set.
234 return ISD::CondCode(Operation);
238 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
239 /// signed operation and 2 if the result is an unsigned comparison. Return zero
240 /// if the operation does not depend on the sign of the input (setne and seteq).
241 static int isSignedOp(ISD::CondCode Opcode) {
243 default: llvm_unreachable("Illegal integer setcc operation!");
245 case ISD::SETNE: return 0;
249 case ISD::SETGE: return 1;
253 case ISD::SETUGE: return 2;
257 /// getSetCCOrOperation - Return the result of a logical OR between different
258 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
259 /// returns SETCC_INVALID if it is not possible to represent the resultant
261 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
263 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
264 // Cannot fold a signed integer setcc with an unsigned integer setcc.
265 return ISD::SETCC_INVALID;
267 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
269 // If the N and U bits get set then the resultant comparison DOES suddenly
270 // care about orderedness, and is true when ordered.
271 if (Op > ISD::SETTRUE2)
272 Op &= ~16; // Clear the U bit if the N bit is set.
274 // Canonicalize illegal integer setcc's.
275 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
278 return ISD::CondCode(Op);
281 /// getSetCCAndOperation - Return the result of a logical AND between different
282 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
283 /// function returns zero if it is not possible to represent the resultant
285 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
287 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
288 // Cannot fold a signed setcc with an unsigned setcc.
289 return ISD::SETCC_INVALID;
291 // Combine all of the condition bits.
292 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
294 // Canonicalize illegal integer setcc's.
298 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
299 case ISD::SETOEQ: // SETEQ & SETU[LG]E
300 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
301 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
302 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
309 //===----------------------------------------------------------------------===//
310 // SDNode Profile Support
311 //===----------------------------------------------------------------------===//
313 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
315 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
319 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
320 /// solely with their pointer.
321 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
322 ID.AddPointer(VTList.VTs);
325 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
327 static void AddNodeIDOperands(FoldingSetNodeID &ID,
328 const SDValue *Ops, unsigned NumOps) {
329 for (; NumOps; --NumOps, ++Ops) {
330 ID.AddPointer(Ops->getNode());
331 ID.AddInteger(Ops->getResNo());
335 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
337 static void AddNodeIDOperands(FoldingSetNodeID &ID,
338 const SDUse *Ops, unsigned NumOps) {
339 for (; NumOps; --NumOps, ++Ops) {
340 ID.AddPointer(Ops->getNode());
341 ID.AddInteger(Ops->getResNo());
345 static void AddNodeIDNode(FoldingSetNodeID &ID,
346 unsigned short OpC, SDVTList VTList,
347 const SDValue *OpList, unsigned N) {
348 AddNodeIDOpcode(ID, OpC);
349 AddNodeIDValueTypes(ID, VTList);
350 AddNodeIDOperands(ID, OpList, N);
353 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
355 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
356 switch (N->getOpcode()) {
357 case ISD::TargetExternalSymbol:
358 case ISD::ExternalSymbol:
359 llvm_unreachable("Should only be used on nodes with operands");
360 default: break; // Normal nodes don't need extra info.
361 case ISD::TargetConstant:
363 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
365 case ISD::TargetConstantFP:
366 case ISD::ConstantFP: {
367 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
370 case ISD::TargetGlobalAddress:
371 case ISD::GlobalAddress:
372 case ISD::TargetGlobalTLSAddress:
373 case ISD::GlobalTLSAddress: {
374 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
375 ID.AddPointer(GA->getGlobal());
376 ID.AddInteger(GA->getOffset());
377 ID.AddInteger(GA->getTargetFlags());
380 case ISD::BasicBlock:
381 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
384 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
386 case ISD::RegisterMask:
387 ID.AddPointer(cast<RegisterMaskSDNode>(N)->getRegMask());
390 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
392 case ISD::FrameIndex:
393 case ISD::TargetFrameIndex:
394 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
397 case ISD::TargetJumpTable:
398 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
399 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
401 case ISD::ConstantPool:
402 case ISD::TargetConstantPool: {
403 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
404 ID.AddInteger(CP->getAlignment());
405 ID.AddInteger(CP->getOffset());
406 if (CP->isMachineConstantPoolEntry())
407 CP->getMachineCPVal()->addSelectionDAGCSEId(ID);
409 ID.AddPointer(CP->getConstVal());
410 ID.AddInteger(CP->getTargetFlags());
414 const LoadSDNode *LD = cast<LoadSDNode>(N);
415 ID.AddInteger(LD->getMemoryVT().getRawBits());
416 ID.AddInteger(LD->getRawSubclassData());
420 const StoreSDNode *ST = cast<StoreSDNode>(N);
421 ID.AddInteger(ST->getMemoryVT().getRawBits());
422 ID.AddInteger(ST->getRawSubclassData());
425 case ISD::ATOMIC_CMP_SWAP:
426 case ISD::ATOMIC_SWAP:
427 case ISD::ATOMIC_LOAD_ADD:
428 case ISD::ATOMIC_LOAD_SUB:
429 case ISD::ATOMIC_LOAD_AND:
430 case ISD::ATOMIC_LOAD_OR:
431 case ISD::ATOMIC_LOAD_XOR:
432 case ISD::ATOMIC_LOAD_NAND:
433 case ISD::ATOMIC_LOAD_MIN:
434 case ISD::ATOMIC_LOAD_MAX:
435 case ISD::ATOMIC_LOAD_UMIN:
436 case ISD::ATOMIC_LOAD_UMAX:
437 case ISD::ATOMIC_LOAD:
438 case ISD::ATOMIC_STORE: {
439 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
440 ID.AddInteger(AT->getMemoryVT().getRawBits());
441 ID.AddInteger(AT->getRawSubclassData());
444 case ISD::VECTOR_SHUFFLE: {
445 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
446 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
448 ID.AddInteger(SVN->getMaskElt(i));
451 case ISD::TargetBlockAddress:
452 case ISD::BlockAddress: {
453 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress());
454 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags());
457 } // end switch (N->getOpcode())
460 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
462 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
463 AddNodeIDOpcode(ID, N->getOpcode());
464 // Add the return value info.
465 AddNodeIDValueTypes(ID, N->getVTList());
466 // Add the operand info.
467 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
469 // Handle SDNode leafs with special info.
470 AddNodeIDCustom(ID, N);
473 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
474 /// the CSE map that carries volatility, temporalness, indexing mode, and
475 /// extension/truncation information.
477 static inline unsigned
478 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile,
479 bool isNonTemporal, bool isInvariant) {
480 assert((ConvType & 3) == ConvType &&
481 "ConvType may not require more than 2 bits!");
482 assert((AM & 7) == AM &&
483 "AM may not require more than 3 bits!");
487 (isNonTemporal << 6) |
491 //===----------------------------------------------------------------------===//
492 // SelectionDAG Class
493 //===----------------------------------------------------------------------===//
495 /// doNotCSE - Return true if CSE should not be performed for this node.
496 static bool doNotCSE(SDNode *N) {
497 if (N->getValueType(0) == MVT::Glue)
498 return true; // Never CSE anything that produces a flag.
500 switch (N->getOpcode()) {
502 case ISD::HANDLENODE:
504 return true; // Never CSE these nodes.
507 // Check that remaining values produced are not flags.
508 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
509 if (N->getValueType(i) == MVT::Glue)
510 return true; // Never CSE anything that produces a flag.
515 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
517 void SelectionDAG::RemoveDeadNodes() {
518 // Create a dummy node (which is not added to allnodes), that adds a reference
519 // to the root node, preventing it from being deleted.
520 HandleSDNode Dummy(getRoot());
522 SmallVector<SDNode*, 128> DeadNodes;
524 // Add all obviously-dead nodes to the DeadNodes worklist.
525 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
527 DeadNodes.push_back(I);
529 RemoveDeadNodes(DeadNodes);
531 // If the root changed (e.g. it was a dead load, update the root).
532 setRoot(Dummy.getValue());
535 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
536 /// given list, and any nodes that become unreachable as a result.
537 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes,
538 DAGUpdateListener *UpdateListener) {
540 // Process the worklist, deleting the nodes and adding their uses to the
542 while (!DeadNodes.empty()) {
543 SDNode *N = DeadNodes.pop_back_val();
546 UpdateListener->NodeDeleted(N, 0);
548 // Take the node out of the appropriate CSE map.
549 RemoveNodeFromCSEMaps(N);
551 // Next, brutally remove the operand list. This is safe to do, as there are
552 // no cycles in the graph.
553 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
555 SDNode *Operand = Use.getNode();
558 // Now that we removed this operand, see if there are no uses of it left.
559 if (Operand->use_empty())
560 DeadNodes.push_back(Operand);
567 void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){
568 SmallVector<SDNode*, 16> DeadNodes(1, N);
570 // Create a dummy node that adds a reference to the root node, preventing
571 // it from being deleted. (This matters if the root is an operand of the
573 HandleSDNode Dummy(getRoot());
575 RemoveDeadNodes(DeadNodes, UpdateListener);
578 void SelectionDAG::DeleteNode(SDNode *N) {
579 // First take this out of the appropriate CSE map.
580 RemoveNodeFromCSEMaps(N);
582 // Finally, remove uses due to operands of this node, remove from the
583 // AllNodes list, and delete the node.
584 DeleteNodeNotInCSEMaps(N);
587 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
588 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
589 assert(N->use_empty() && "Cannot delete a node that is not dead!");
591 // Drop all of the operands and decrement used node's use counts.
597 void SelectionDAG::DeallocateNode(SDNode *N) {
598 if (N->OperandsNeedDelete)
599 delete[] N->OperandList;
601 // Set the opcode to DELETED_NODE to help catch bugs when node
602 // memory is reallocated.
603 N->NodeType = ISD::DELETED_NODE;
605 NodeAllocator.Deallocate(AllNodes.remove(N));
607 // Remove the ordering of this node.
610 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them.
611 ArrayRef<SDDbgValue*> DbgVals = DbgInfo->getSDDbgValues(N);
612 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i)
613 DbgVals[i]->setIsInvalidated();
616 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
617 /// correspond to it. This is useful when we're about to delete or repurpose
618 /// the node. We don't want future request for structurally identical nodes
619 /// to return N anymore.
620 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
622 switch (N->getOpcode()) {
623 case ISD::HANDLENODE: return false; // noop.
625 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
626 "Cond code doesn't exist!");
627 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
628 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
630 case ISD::ExternalSymbol:
631 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
633 case ISD::TargetExternalSymbol: {
634 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
635 Erased = TargetExternalSymbols.erase(
636 std::pair<std::string,unsigned char>(ESN->getSymbol(),
637 ESN->getTargetFlags()));
640 case ISD::VALUETYPE: {
641 EVT VT = cast<VTSDNode>(N)->getVT();
642 if (VT.isExtended()) {
643 Erased = ExtendedValueTypeNodes.erase(VT);
645 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0;
646 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0;
651 // Remove it from the CSE Map.
652 assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!");
653 assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!");
654 Erased = CSEMap.RemoveNode(N);
658 // Verify that the node was actually in one of the CSE maps, unless it has a
659 // flag result (which cannot be CSE'd) or is one of the special cases that are
660 // not subject to CSE.
661 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue &&
662 !N->isMachineOpcode() && !doNotCSE(N)) {
665 llvm_unreachable("Node is not in map!");
671 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
672 /// maps and modified in place. Add it back to the CSE maps, unless an identical
673 /// node already exists, in which case transfer all its users to the existing
674 /// node. This transfer can potentially trigger recursive merging.
677 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N,
678 DAGUpdateListener *UpdateListener) {
679 // For node types that aren't CSE'd, just act as if no identical node
682 SDNode *Existing = CSEMap.GetOrInsertNode(N);
684 // If there was already an existing matching node, use ReplaceAllUsesWith
685 // to replace the dead one with the existing one. This can cause
686 // recursive merging of other unrelated nodes down the line.
687 ReplaceAllUsesWith(N, Existing, UpdateListener);
689 // N is now dead. Inform the listener if it exists and delete it.
691 UpdateListener->NodeDeleted(N, Existing);
692 DeleteNodeNotInCSEMaps(N);
697 // If the node doesn't already exist, we updated it. Inform a listener if
700 UpdateListener->NodeUpdated(N);
703 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
704 /// were replaced with those specified. If this node is never memoized,
705 /// return null, otherwise return a pointer to the slot it would take. If a
706 /// node already exists with these operands, the slot will be non-null.
707 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
712 SDValue Ops[] = { Op };
714 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
715 AddNodeIDCustom(ID, N);
716 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
720 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
721 /// were replaced with those specified. If this node is never memoized,
722 /// return null, otherwise return a pointer to the slot it would take. If a
723 /// node already exists with these operands, the slot will be non-null.
724 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
725 SDValue Op1, SDValue Op2,
730 SDValue Ops[] = { Op1, Op2 };
732 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
733 AddNodeIDCustom(ID, N);
734 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
739 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
740 /// were replaced with those specified. If this node is never memoized,
741 /// return null, otherwise return a pointer to the slot it would take. If a
742 /// node already exists with these operands, the slot will be non-null.
743 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
744 const SDValue *Ops,unsigned NumOps,
750 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
751 AddNodeIDCustom(ID, N);
752 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
757 /// VerifyNodeCommon - Sanity check the given node. Aborts if it is invalid.
758 static void VerifyNodeCommon(SDNode *N) {
759 switch (N->getOpcode()) {
762 case ISD::BUILD_PAIR: {
763 EVT VT = N->getValueType(0);
764 assert(N->getNumValues() == 1 && "Too many results!");
765 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
766 "Wrong return type!");
767 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
768 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
769 "Mismatched operand types!");
770 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
771 "Wrong operand type!");
772 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
773 "Wrong return type size");
776 case ISD::BUILD_VECTOR: {
777 assert(N->getNumValues() == 1 && "Too many results!");
778 assert(N->getValueType(0).isVector() && "Wrong return type!");
779 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
780 "Wrong number of operands!");
781 EVT EltVT = N->getValueType(0).getVectorElementType();
782 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) {
783 assert((I->getValueType() == EltVT ||
784 (EltVT.isInteger() && I->getValueType().isInteger() &&
785 EltVT.bitsLE(I->getValueType()))) &&
786 "Wrong operand type!");
787 assert(I->getValueType() == N->getOperand(0).getValueType() &&
788 "Operands must all have the same type");
795 /// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid.
796 static void VerifySDNode(SDNode *N) {
797 // The SDNode allocators cannot be used to allocate nodes with fields that are
798 // not present in an SDNode!
799 assert(!isa<MemSDNode>(N) && "Bad MemSDNode!");
800 assert(!isa<ShuffleVectorSDNode>(N) && "Bad ShuffleVectorSDNode!");
801 assert(!isa<ConstantSDNode>(N) && "Bad ConstantSDNode!");
802 assert(!isa<ConstantFPSDNode>(N) && "Bad ConstantFPSDNode!");
803 assert(!isa<GlobalAddressSDNode>(N) && "Bad GlobalAddressSDNode!");
804 assert(!isa<FrameIndexSDNode>(N) && "Bad FrameIndexSDNode!");
805 assert(!isa<JumpTableSDNode>(N) && "Bad JumpTableSDNode!");
806 assert(!isa<ConstantPoolSDNode>(N) && "Bad ConstantPoolSDNode!");
807 assert(!isa<BasicBlockSDNode>(N) && "Bad BasicBlockSDNode!");
808 assert(!isa<SrcValueSDNode>(N) && "Bad SrcValueSDNode!");
809 assert(!isa<MDNodeSDNode>(N) && "Bad MDNodeSDNode!");
810 assert(!isa<RegisterSDNode>(N) && "Bad RegisterSDNode!");
811 assert(!isa<BlockAddressSDNode>(N) && "Bad BlockAddressSDNode!");
812 assert(!isa<EHLabelSDNode>(N) && "Bad EHLabelSDNode!");
813 assert(!isa<ExternalSymbolSDNode>(N) && "Bad ExternalSymbolSDNode!");
814 assert(!isa<CondCodeSDNode>(N) && "Bad CondCodeSDNode!");
815 assert(!isa<CvtRndSatSDNode>(N) && "Bad CvtRndSatSDNode!");
816 assert(!isa<VTSDNode>(N) && "Bad VTSDNode!");
817 assert(!isa<MachineSDNode>(N) && "Bad MachineSDNode!");
822 /// VerifyMachineNode - Sanity check the given MachineNode. Aborts if it is
824 static void VerifyMachineNode(SDNode *N) {
825 // The MachineNode allocators cannot be used to allocate nodes with fields
826 // that are not present in a MachineNode!
827 // Currently there are no such nodes.
833 /// getEVTAlignment - Compute the default alignment value for the
836 unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
837 Type *Ty = VT == MVT::iPTR ?
838 PointerType::get(Type::getInt8Ty(*getContext()), 0) :
839 VT.getTypeForEVT(*getContext());
841 return TLI.getTargetData()->getABITypeAlignment(Ty);
844 // EntryNode could meaningfully have debug info if we can find it...
845 SelectionDAG::SelectionDAG(const TargetMachine &tm, CodeGenOpt::Level OL)
846 : TM(tm), TLI(*tm.getTargetLowering()), TSI(*tm.getSelectionDAGInfo()),
847 OptLevel(OL), EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Other)),
848 Root(getEntryNode()), Ordering(0) {
849 AllNodes.push_back(&EntryNode);
850 Ordering = new SDNodeOrdering();
851 DbgInfo = new SDDbgInfo();
854 void SelectionDAG::init(MachineFunction &mf) {
856 Context = &mf.getFunction()->getContext();
859 SelectionDAG::~SelectionDAG() {
865 void SelectionDAG::allnodes_clear() {
866 assert(&*AllNodes.begin() == &EntryNode);
867 AllNodes.remove(AllNodes.begin());
868 while (!AllNodes.empty())
869 DeallocateNode(AllNodes.begin());
872 void SelectionDAG::clear() {
874 OperandAllocator.Reset();
877 ExtendedValueTypeNodes.clear();
878 ExternalSymbols.clear();
879 TargetExternalSymbols.clear();
880 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
881 static_cast<CondCodeSDNode*>(0));
882 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
883 static_cast<SDNode*>(0));
885 EntryNode.UseList = 0;
886 AllNodes.push_back(&EntryNode);
887 Root = getEntryNode();
892 SDValue SelectionDAG::getAnyExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
893 return VT.bitsGT(Op.getValueType()) ?
894 getNode(ISD::ANY_EXTEND, DL, VT, Op) :
895 getNode(ISD::TRUNCATE, DL, VT, Op);
898 SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
899 return VT.bitsGT(Op.getValueType()) ?
900 getNode(ISD::SIGN_EXTEND, DL, VT, Op) :
901 getNode(ISD::TRUNCATE, DL, VT, Op);
904 SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
905 return VT.bitsGT(Op.getValueType()) ?
906 getNode(ISD::ZERO_EXTEND, DL, VT, Op) :
907 getNode(ISD::TRUNCATE, DL, VT, Op);
910 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) {
911 assert(!VT.isVector() &&
912 "getZeroExtendInReg should use the vector element type instead of "
914 if (Op.getValueType() == VT) return Op;
915 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
916 APInt Imm = APInt::getLowBitsSet(BitWidth,
918 return getNode(ISD::AND, DL, Op.getValueType(), Op,
919 getConstant(Imm, Op.getValueType()));
922 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
924 SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) {
925 EVT EltVT = VT.getScalarType();
927 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT);
928 return getNode(ISD::XOR, DL, VT, Val, NegOne);
931 SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) {
932 EVT EltVT = VT.getScalarType();
933 assert((EltVT.getSizeInBits() >= 64 ||
934 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
935 "getConstant with a uint64_t value that doesn't fit in the type!");
936 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
939 SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) {
940 return getConstant(*ConstantInt::get(*Context, Val), VT, isT);
943 SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) {
944 assert(VT.isInteger() && "Cannot create FP integer constant!");
946 EVT EltVT = VT.getScalarType();
947 const ConstantInt *Elt = &Val;
949 // In some cases the vector type is legal but the element type is illegal and
950 // needs to be promoted, for example v8i8 on ARM. In this case, promote the
951 // inserted value (the type does not need to match the vector element type).
952 // Any extra bits introduced will be truncated away.
953 if (VT.isVector() && TLI.getTypeAction(*getContext(), EltVT) ==
954 TargetLowering::TypePromoteInteger) {
955 EltVT = TLI.getTypeToTransformTo(*getContext(), EltVT);
956 APInt NewVal = Elt->getValue().zext(EltVT.getSizeInBits());
957 Elt = ConstantInt::get(*getContext(), NewVal);
960 assert(Elt->getBitWidth() == EltVT.getSizeInBits() &&
961 "APInt size does not match type size!");
962 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
964 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
968 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
970 return SDValue(N, 0);
973 N = new (NodeAllocator) ConstantSDNode(isT, Elt, EltVT);
974 CSEMap.InsertNode(N, IP);
975 AllNodes.push_back(N);
978 SDValue Result(N, 0);
980 SmallVector<SDValue, 8> Ops;
981 Ops.assign(VT.getVectorNumElements(), Result);
982 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
987 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
988 return getConstant(Val, TLI.getPointerTy(), isTarget);
992 SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) {
993 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget);
996 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){
997 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
999 EVT EltVT = VT.getScalarType();
1001 // Do the map lookup using the actual bit pattern for the floating point
1002 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
1003 // we don't have issues with SNANs.
1004 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
1005 FoldingSetNodeID ID;
1006 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
1010 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
1012 return SDValue(N, 0);
1015 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT);
1016 CSEMap.InsertNode(N, IP);
1017 AllNodes.push_back(N);
1020 SDValue Result(N, 0);
1021 if (VT.isVector()) {
1022 SmallVector<SDValue, 8> Ops;
1023 Ops.assign(VT.getVectorNumElements(), Result);
1024 // FIXME DebugLoc info might be appropriate here
1025 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
1030 SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) {
1031 EVT EltVT = VT.getScalarType();
1032 if (EltVT==MVT::f32)
1033 return getConstantFP(APFloat((float)Val), VT, isTarget);
1034 else if (EltVT==MVT::f64)
1035 return getConstantFP(APFloat(Val), VT, isTarget);
1036 else if (EltVT==MVT::f80 || EltVT==MVT::f128) {
1038 APFloat apf = APFloat(Val);
1039 apf.convert(*EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven,
1041 return getConstantFP(apf, VT, isTarget);
1043 assert(0 && "Unsupported type in getConstantFP");
1048 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, DebugLoc DL,
1049 EVT VT, int64_t Offset,
1051 unsigned char TargetFlags) {
1052 assert((TargetFlags == 0 || isTargetGA) &&
1053 "Cannot set target flags on target-independent globals");
1055 // Truncate (with sign-extension) the offset value to the pointer size.
1056 EVT PTy = TLI.getPointerTy();
1057 unsigned BitWidth = PTy.getSizeInBits();
1059 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth));
1061 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
1063 // If GV is an alias then use the aliasee for determining thread-localness.
1064 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
1065 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
1069 if (GVar && GVar->isThreadLocal())
1070 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
1072 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
1074 FoldingSetNodeID ID;
1075 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1077 ID.AddInteger(Offset);
1078 ID.AddInteger(TargetFlags);
1080 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1081 return SDValue(E, 0);
1083 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL, GV, VT,
1084 Offset, TargetFlags);
1085 CSEMap.InsertNode(N, IP);
1086 AllNodes.push_back(N);
1087 return SDValue(N, 0);
1090 SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
1091 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1092 FoldingSetNodeID ID;
1093 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1096 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1097 return SDValue(E, 0);
1099 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget);
1100 CSEMap.InsertNode(N, IP);
1101 AllNodes.push_back(N);
1102 return SDValue(N, 0);
1105 SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
1106 unsigned char TargetFlags) {
1107 assert((TargetFlags == 0 || isTarget) &&
1108 "Cannot set target flags on target-independent jump tables");
1109 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1110 FoldingSetNodeID ID;
1111 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1113 ID.AddInteger(TargetFlags);
1115 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1116 return SDValue(E, 0);
1118 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget,
1120 CSEMap.InsertNode(N, IP);
1121 AllNodes.push_back(N);
1122 return SDValue(N, 0);
1125 SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT,
1126 unsigned Alignment, int Offset,
1128 unsigned char TargetFlags) {
1129 assert((TargetFlags == 0 || isTarget) &&
1130 "Cannot set target flags on target-independent globals");
1132 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1133 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1134 FoldingSetNodeID ID;
1135 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1136 ID.AddInteger(Alignment);
1137 ID.AddInteger(Offset);
1139 ID.AddInteger(TargetFlags);
1141 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1142 return SDValue(E, 0);
1144 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1145 Alignment, TargetFlags);
1146 CSEMap.InsertNode(N, IP);
1147 AllNodes.push_back(N);
1148 return SDValue(N, 0);
1152 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
1153 unsigned Alignment, int Offset,
1155 unsigned char TargetFlags) {
1156 assert((TargetFlags == 0 || isTarget) &&
1157 "Cannot set target flags on target-independent globals");
1159 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1160 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1161 FoldingSetNodeID ID;
1162 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1163 ID.AddInteger(Alignment);
1164 ID.AddInteger(Offset);
1165 C->addSelectionDAGCSEId(ID);
1166 ID.AddInteger(TargetFlags);
1168 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1169 return SDValue(E, 0);
1171 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1172 Alignment, TargetFlags);
1173 CSEMap.InsertNode(N, IP);
1174 AllNodes.push_back(N);
1175 return SDValue(N, 0);
1178 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1179 FoldingSetNodeID ID;
1180 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1183 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1184 return SDValue(E, 0);
1186 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB);
1187 CSEMap.InsertNode(N, IP);
1188 AllNodes.push_back(N);
1189 return SDValue(N, 0);
1192 SDValue SelectionDAG::getValueType(EVT VT) {
1193 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
1194 ValueTypeNodes.size())
1195 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
1197 SDNode *&N = VT.isExtended() ?
1198 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
1200 if (N) return SDValue(N, 0);
1201 N = new (NodeAllocator) VTSDNode(VT);
1202 AllNodes.push_back(N);
1203 return SDValue(N, 0);
1206 SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
1207 SDNode *&N = ExternalSymbols[Sym];
1208 if (N) return SDValue(N, 0);
1209 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT);
1210 AllNodes.push_back(N);
1211 return SDValue(N, 0);
1214 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
1215 unsigned char TargetFlags) {
1217 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1219 if (N) return SDValue(N, 0);
1220 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1221 AllNodes.push_back(N);
1222 return SDValue(N, 0);
1225 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1226 if ((unsigned)Cond >= CondCodeNodes.size())
1227 CondCodeNodes.resize(Cond+1);
1229 if (CondCodeNodes[Cond] == 0) {
1230 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond);
1231 CondCodeNodes[Cond] = N;
1232 AllNodes.push_back(N);
1235 return SDValue(CondCodeNodes[Cond], 0);
1238 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1239 // the shuffle mask M that point at N1 to point at N2, and indices that point
1240 // N2 to point at N1.
1241 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1243 int NElts = M.size();
1244 for (int i = 0; i != NElts; ++i) {
1252 SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1,
1253 SDValue N2, const int *Mask) {
1254 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE");
1255 assert(VT.isVector() && N1.getValueType().isVector() &&
1256 "Vector Shuffle VTs must be a vectors");
1257 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType()
1258 && "Vector Shuffle VTs must have same element type");
1260 // Canonicalize shuffle undef, undef -> undef
1261 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1262 return getUNDEF(VT);
1264 // Validate that all indices in Mask are within the range of the elements
1265 // input to the shuffle.
1266 unsigned NElts = VT.getVectorNumElements();
1267 SmallVector<int, 8> MaskVec;
1268 for (unsigned i = 0; i != NElts; ++i) {
1269 assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1270 MaskVec.push_back(Mask[i]);
1273 // Canonicalize shuffle v, v -> v, undef
1276 for (unsigned i = 0; i != NElts; ++i)
1277 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1280 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1281 if (N1.getOpcode() == ISD::UNDEF)
1282 commuteShuffle(N1, N2, MaskVec);
1284 // Canonicalize all index into lhs, -> shuffle lhs, undef
1285 // Canonicalize all index into rhs, -> shuffle rhs, undef
1286 bool AllLHS = true, AllRHS = true;
1287 bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1288 for (unsigned i = 0; i != NElts; ++i) {
1289 if (MaskVec[i] >= (int)NElts) {
1294 } else if (MaskVec[i] >= 0) {
1298 if (AllLHS && AllRHS)
1299 return getUNDEF(VT);
1300 if (AllLHS && !N2Undef)
1304 commuteShuffle(N1, N2, MaskVec);
1307 // If Identity shuffle, or all shuffle in to undef, return that node.
1308 bool AllUndef = true;
1309 bool Identity = true;
1310 for (unsigned i = 0; i != NElts; ++i) {
1311 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1312 if (MaskVec[i] >= 0) AllUndef = false;
1314 if (Identity && NElts == N1.getValueType().getVectorNumElements())
1317 return getUNDEF(VT);
1319 FoldingSetNodeID ID;
1320 SDValue Ops[2] = { N1, N2 };
1321 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2);
1322 for (unsigned i = 0; i != NElts; ++i)
1323 ID.AddInteger(MaskVec[i]);
1326 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1327 return SDValue(E, 0);
1329 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1330 // SDNode doesn't have access to it. This memory will be "leaked" when
1331 // the node is deallocated, but recovered when the NodeAllocator is released.
1332 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1333 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1335 ShuffleVectorSDNode *N =
1336 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc);
1337 CSEMap.InsertNode(N, IP);
1338 AllNodes.push_back(N);
1339 return SDValue(N, 0);
1342 SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl,
1343 SDValue Val, SDValue DTy,
1344 SDValue STy, SDValue Rnd, SDValue Sat,
1345 ISD::CvtCode Code) {
1346 // If the src and dest types are the same and the conversion is between
1347 // integer types of the same sign or two floats, no conversion is necessary.
1349 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1352 FoldingSetNodeID ID;
1353 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1354 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5);
1356 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1357 return SDValue(E, 0);
1359 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5,
1361 CSEMap.InsertNode(N, IP);
1362 AllNodes.push_back(N);
1363 return SDValue(N, 0);
1366 SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
1367 FoldingSetNodeID ID;
1368 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1369 ID.AddInteger(RegNo);
1371 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1372 return SDValue(E, 0);
1374 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT);
1375 CSEMap.InsertNode(N, IP);
1376 AllNodes.push_back(N);
1377 return SDValue(N, 0);
1380 SDValue SelectionDAG::getRegisterMask(const uint32_t *RegMask) {
1381 FoldingSetNodeID ID;
1382 AddNodeIDNode(ID, ISD::RegisterMask, getVTList(MVT::Untyped), 0, 0);
1383 ID.AddPointer(RegMask);
1385 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1386 return SDValue(E, 0);
1388 SDNode *N = new (NodeAllocator) RegisterMaskSDNode(RegMask);
1389 CSEMap.InsertNode(N, IP);
1390 AllNodes.push_back(N);
1391 return SDValue(N, 0);
1394 SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) {
1395 FoldingSetNodeID ID;
1396 SDValue Ops[] = { Root };
1397 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1);
1398 ID.AddPointer(Label);
1400 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1401 return SDValue(E, 0);
1403 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label);
1404 CSEMap.InsertNode(N, IP);
1405 AllNodes.push_back(N);
1406 return SDValue(N, 0);
1410 SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT,
1412 unsigned char TargetFlags) {
1413 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress;
1415 FoldingSetNodeID ID;
1416 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1418 ID.AddInteger(TargetFlags);
1420 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1421 return SDValue(E, 0);
1423 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, TargetFlags);
1424 CSEMap.InsertNode(N, IP);
1425 AllNodes.push_back(N);
1426 return SDValue(N, 0);
1429 SDValue SelectionDAG::getSrcValue(const Value *V) {
1430 assert((!V || V->getType()->isPointerTy()) &&
1431 "SrcValue is not a pointer?");
1433 FoldingSetNodeID ID;
1434 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1438 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1439 return SDValue(E, 0);
1441 SDNode *N = new (NodeAllocator) SrcValueSDNode(V);
1442 CSEMap.InsertNode(N, IP);
1443 AllNodes.push_back(N);
1444 return SDValue(N, 0);
1447 /// getMDNode - Return an MDNodeSDNode which holds an MDNode.
1448 SDValue SelectionDAG::getMDNode(const MDNode *MD) {
1449 FoldingSetNodeID ID;
1450 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0);
1454 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1455 return SDValue(E, 0);
1457 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD);
1458 CSEMap.InsertNode(N, IP);
1459 AllNodes.push_back(N);
1460 return SDValue(N, 0);
1464 /// getShiftAmountOperand - Return the specified value casted to
1465 /// the target's desired shift amount type.
1466 SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) {
1467 EVT OpTy = Op.getValueType();
1468 MVT ShTy = TLI.getShiftAmountTy(LHSTy);
1469 if (OpTy == ShTy || OpTy.isVector()) return Op;
1471 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1472 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op);
1475 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1476 /// specified value type.
1477 SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
1478 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1479 unsigned ByteSize = VT.getStoreSize();
1480 Type *Ty = VT.getTypeForEVT(*getContext());
1481 unsigned StackAlign =
1482 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign);
1484 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false);
1485 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1488 /// CreateStackTemporary - Create a stack temporary suitable for holding
1489 /// either of the specified value types.
1490 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
1491 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1492 VT2.getStoreSizeInBits())/8;
1493 Type *Ty1 = VT1.getTypeForEVT(*getContext());
1494 Type *Ty2 = VT2.getTypeForEVT(*getContext());
1495 const TargetData *TD = TLI.getTargetData();
1496 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1497 TD->getPrefTypeAlignment(Ty2));
1499 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1500 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false);
1501 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1504 SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
1505 SDValue N2, ISD::CondCode Cond, DebugLoc dl) {
1506 // These setcc operations always fold.
1510 case ISD::SETFALSE2: return getConstant(0, VT);
1512 case ISD::SETTRUE2: return getConstant(1, VT);
1524 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1528 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1529 const APInt &C2 = N2C->getAPIntValue();
1530 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1531 const APInt &C1 = N1C->getAPIntValue();
1534 default: llvm_unreachable("Unknown integer setcc!");
1535 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1536 case ISD::SETNE: return getConstant(C1 != C2, VT);
1537 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1538 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1539 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1540 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1541 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1542 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1543 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1544 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1548 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1549 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1550 // No compile time operations on this type yet.
1551 if (N1C->getValueType(0) == MVT::ppcf128)
1554 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1557 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1558 return getUNDEF(VT);
1560 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1561 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1562 return getUNDEF(VT);
1564 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1565 R==APFloat::cmpLessThan, VT);
1566 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1567 return getUNDEF(VT);
1569 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1570 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1571 return getUNDEF(VT);
1573 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1574 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1575 return getUNDEF(VT);
1577 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1578 R==APFloat::cmpEqual, VT);
1579 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1580 return getUNDEF(VT);
1582 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1583 R==APFloat::cmpEqual, VT);
1584 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1585 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1586 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1587 R==APFloat::cmpEqual, VT);
1588 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1589 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1590 R==APFloat::cmpLessThan, VT);
1591 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1592 R==APFloat::cmpUnordered, VT);
1593 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1594 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1597 // Ensure that the constant occurs on the RHS.
1598 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1602 // Could not fold it.
1606 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1607 /// use this predicate to simplify operations downstream.
1608 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1609 // This predicate is not safe for vector operations.
1610 if (Op.getValueType().isVector())
1613 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1614 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1617 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1618 /// this predicate to simplify operations downstream. Mask is known to be zero
1619 /// for bits that V cannot have.
1620 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1621 unsigned Depth) const {
1622 APInt KnownZero, KnownOne;
1623 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
1624 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1625 return (KnownZero & Mask) == Mask;
1628 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1629 /// known to be either zero or one and return them in the KnownZero/KnownOne
1630 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1632 void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask,
1633 APInt &KnownZero, APInt &KnownOne,
1634 unsigned Depth) const {
1635 unsigned BitWidth = Mask.getBitWidth();
1636 assert(BitWidth == Op.getValueType().getScalarType().getSizeInBits() &&
1637 "Mask size mismatches value type size!");
1639 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1640 if (Depth == 6 || Mask == 0)
1641 return; // Limit search depth.
1643 APInt KnownZero2, KnownOne2;
1645 switch (Op.getOpcode()) {
1647 // We know all of the bits for a constant!
1648 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask;
1649 KnownZero = ~KnownOne & Mask;
1652 // If either the LHS or the RHS are Zero, the result is zero.
1653 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1654 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero,
1655 KnownZero2, KnownOne2, Depth+1);
1656 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1657 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1659 // Output known-1 bits are only known if set in both the LHS & RHS.
1660 KnownOne &= KnownOne2;
1661 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1662 KnownZero |= KnownZero2;
1665 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1666 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne,
1667 KnownZero2, KnownOne2, Depth+1);
1668 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1669 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1671 // Output known-0 bits are only known if clear in both the LHS & RHS.
1672 KnownZero &= KnownZero2;
1673 // Output known-1 are known to be set if set in either the LHS | RHS.
1674 KnownOne |= KnownOne2;
1677 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1678 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
1679 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1680 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1682 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1683 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1684 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1685 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1686 KnownZero = KnownZeroOut;
1690 APInt Mask2 = APInt::getAllOnesValue(BitWidth);
1691 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1);
1692 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1693 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1694 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1696 // If low bits are zero in either operand, output low known-0 bits.
1697 // Also compute a conserative estimate for high known-0 bits.
1698 // More trickiness is possible, but this is sufficient for the
1699 // interesting case of alignment computation.
1700 KnownOne.clearAllBits();
1701 unsigned TrailZ = KnownZero.countTrailingOnes() +
1702 KnownZero2.countTrailingOnes();
1703 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1704 KnownZero2.countLeadingOnes(),
1705 BitWidth) - BitWidth;
1707 TrailZ = std::min(TrailZ, BitWidth);
1708 LeadZ = std::min(LeadZ, BitWidth);
1709 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1710 APInt::getHighBitsSet(BitWidth, LeadZ);
1715 // For the purposes of computing leading zeros we can conservatively
1716 // treat a udiv as a logical right shift by the power of 2 known to
1717 // be less than the denominator.
1718 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1719 ComputeMaskedBits(Op.getOperand(0),
1720 AllOnes, KnownZero2, KnownOne2, Depth+1);
1721 unsigned LeadZ = KnownZero2.countLeadingOnes();
1723 KnownOne2.clearAllBits();
1724 KnownZero2.clearAllBits();
1725 ComputeMaskedBits(Op.getOperand(1),
1726 AllOnes, KnownZero2, KnownOne2, Depth+1);
1727 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1728 if (RHSUnknownLeadingOnes != BitWidth)
1729 LeadZ = std::min(BitWidth,
1730 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1732 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask;
1736 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1);
1737 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1);
1738 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1739 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1741 // Only known if known in both the LHS and RHS.
1742 KnownOne &= KnownOne2;
1743 KnownZero &= KnownZero2;
1745 case ISD::SELECT_CC:
1746 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1);
1747 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1);
1748 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1749 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1751 // Only known if known in both the LHS and RHS.
1752 KnownOne &= KnownOne2;
1753 KnownZero &= KnownZero2;
1761 if (Op.getResNo() != 1)
1763 // The boolean result conforms to getBooleanContents. Fall through.
1765 // If we know the result of a setcc has the top bits zero, use this info.
1766 if (TLI.getBooleanContents(Op.getValueType().isVector()) ==
1767 TargetLowering::ZeroOrOneBooleanContent && BitWidth > 1)
1768 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1771 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1772 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1773 unsigned ShAmt = SA->getZExtValue();
1775 // If the shift count is an invalid immediate, don't do anything.
1776 if (ShAmt >= BitWidth)
1779 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt),
1780 KnownZero, KnownOne, Depth+1);
1781 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1782 KnownZero <<= ShAmt;
1784 // low bits known zero.
1785 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1789 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1790 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1791 unsigned ShAmt = SA->getZExtValue();
1793 // If the shift count is an invalid immediate, don't do anything.
1794 if (ShAmt >= BitWidth)
1797 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt),
1798 KnownZero, KnownOne, Depth+1);
1799 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1800 KnownZero = KnownZero.lshr(ShAmt);
1801 KnownOne = KnownOne.lshr(ShAmt);
1803 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1804 KnownZero |= HighBits; // High bits known zero.
1808 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1809 unsigned ShAmt = SA->getZExtValue();
1811 // If the shift count is an invalid immediate, don't do anything.
1812 if (ShAmt >= BitWidth)
1815 APInt InDemandedMask = (Mask << ShAmt);
1816 // If any of the demanded bits are produced by the sign extension, we also
1817 // demand the input sign bit.
1818 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1819 if (HighBits.getBoolValue())
1820 InDemandedMask |= APInt::getSignBit(BitWidth);
1822 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne,
1824 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1825 KnownZero = KnownZero.lshr(ShAmt);
1826 KnownOne = KnownOne.lshr(ShAmt);
1828 // Handle the sign bits.
1829 APInt SignBit = APInt::getSignBit(BitWidth);
1830 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1832 if (KnownZero.intersects(SignBit)) {
1833 KnownZero |= HighBits; // New bits are known zero.
1834 } else if (KnownOne.intersects(SignBit)) {
1835 KnownOne |= HighBits; // New bits are known one.
1839 case ISD::SIGN_EXTEND_INREG: {
1840 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1841 unsigned EBits = EVT.getScalarType().getSizeInBits();
1843 // Sign extension. Compute the demanded bits in the result that are not
1844 // present in the input.
1845 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask;
1847 APInt InSignBit = APInt::getSignBit(EBits);
1848 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits);
1850 // If the sign extended bits are demanded, we know that the sign
1852 InSignBit = InSignBit.zext(BitWidth);
1853 if (NewBits.getBoolValue())
1854 InputDemandedBits |= InSignBit;
1856 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits,
1857 KnownZero, KnownOne, Depth+1);
1858 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1860 // If the sign bit of the input is known set or clear, then we know the
1861 // top bits of the result.
1862 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1863 KnownZero |= NewBits;
1864 KnownOne &= ~NewBits;
1865 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1866 KnownOne |= NewBits;
1867 KnownZero &= ~NewBits;
1868 } else { // Input sign bit unknown
1869 KnownZero &= ~NewBits;
1870 KnownOne &= ~NewBits;
1875 case ISD::CTTZ_ZERO_UNDEF:
1877 case ISD::CTLZ_ZERO_UNDEF:
1879 unsigned LowBits = Log2_32(BitWidth)+1;
1880 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1881 KnownOne.clearAllBits();
1885 if (ISD::isZEXTLoad(Op.getNode())) {
1886 LoadSDNode *LD = cast<LoadSDNode>(Op);
1887 EVT VT = LD->getMemoryVT();
1888 unsigned MemBits = VT.getScalarType().getSizeInBits();
1889 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask;
1893 case ISD::ZERO_EXTEND: {
1894 EVT InVT = Op.getOperand(0).getValueType();
1895 unsigned InBits = InVT.getScalarType().getSizeInBits();
1896 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1897 APInt InMask = Mask.trunc(InBits);
1898 KnownZero = KnownZero.trunc(InBits);
1899 KnownOne = KnownOne.trunc(InBits);
1900 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1901 KnownZero = KnownZero.zext(BitWidth);
1902 KnownOne = KnownOne.zext(BitWidth);
1903 KnownZero |= NewBits;
1906 case ISD::SIGN_EXTEND: {
1907 EVT InVT = Op.getOperand(0).getValueType();
1908 unsigned InBits = InVT.getScalarType().getSizeInBits();
1909 APInt InSignBit = APInt::getSignBit(InBits);
1910 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1911 APInt InMask = Mask.trunc(InBits);
1913 // If any of the sign extended bits are demanded, we know that the sign
1914 // bit is demanded. Temporarily set this bit in the mask for our callee.
1915 if (NewBits.getBoolValue())
1916 InMask |= InSignBit;
1918 KnownZero = KnownZero.trunc(InBits);
1919 KnownOne = KnownOne.trunc(InBits);
1920 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1922 // Note if the sign bit is known to be zero or one.
1923 bool SignBitKnownZero = KnownZero.isNegative();
1924 bool SignBitKnownOne = KnownOne.isNegative();
1925 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1926 "Sign bit can't be known to be both zero and one!");
1928 // If the sign bit wasn't actually demanded by our caller, we don't
1929 // want it set in the KnownZero and KnownOne result values. Reset the
1930 // mask and reapply it to the result values.
1931 InMask = Mask.trunc(InBits);
1932 KnownZero &= InMask;
1935 KnownZero = KnownZero.zext(BitWidth);
1936 KnownOne = KnownOne.zext(BitWidth);
1938 // If the sign bit is known zero or one, the top bits match.
1939 if (SignBitKnownZero)
1940 KnownZero |= NewBits;
1941 else if (SignBitKnownOne)
1942 KnownOne |= NewBits;
1945 case ISD::ANY_EXTEND: {
1946 EVT InVT = Op.getOperand(0).getValueType();
1947 unsigned InBits = InVT.getScalarType().getSizeInBits();
1948 APInt InMask = Mask.trunc(InBits);
1949 KnownZero = KnownZero.trunc(InBits);
1950 KnownOne = KnownOne.trunc(InBits);
1951 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1952 KnownZero = KnownZero.zext(BitWidth);
1953 KnownOne = KnownOne.zext(BitWidth);
1956 case ISD::TRUNCATE: {
1957 EVT InVT = Op.getOperand(0).getValueType();
1958 unsigned InBits = InVT.getScalarType().getSizeInBits();
1959 APInt InMask = Mask.zext(InBits);
1960 KnownZero = KnownZero.zext(InBits);
1961 KnownOne = KnownOne.zext(InBits);
1962 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1963 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1964 KnownZero = KnownZero.trunc(BitWidth);
1965 KnownOne = KnownOne.trunc(BitWidth);
1968 case ISD::AssertZext: {
1969 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1970 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1971 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
1973 KnownZero |= (~InMask) & Mask;
1977 // All bits are zero except the low bit.
1978 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1982 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
1983 // We know that the top bits of C-X are clear if X contains less bits
1984 // than C (i.e. no wrap-around can happen). For example, 20-X is
1985 // positive if we can prove that X is >= 0 and < 16.
1986 if (CLHS->getAPIntValue().isNonNegative()) {
1987 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
1988 // NLZ can't be BitWidth with no sign bit
1989 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
1990 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2,
1993 // If all of the MaskV bits are known to be zero, then we know the
1994 // output top bits are zero, because we now know that the output is
1996 if ((KnownZero2 & MaskV) == MaskV) {
1997 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
1998 // Top bits known zero.
1999 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask;
2007 // Output known-0 bits are known if clear or set in both the low clear bits
2008 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
2009 // low 3 bits clear.
2010 APInt Mask2 = APInt::getLowBitsSet(BitWidth,
2011 BitWidth - Mask.countLeadingZeros());
2012 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
2013 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
2014 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
2016 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1);
2017 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
2018 KnownZeroOut = std::min(KnownZeroOut,
2019 KnownZero2.countTrailingOnes());
2021 if (Op.getOpcode() == ISD::ADD) {
2022 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
2026 // With ADDE, a carry bit may be added in, so we can only use this
2027 // information if we know (at least) that the low two bits are clear. We
2028 // then return to the caller that the low bit is unknown but that other bits
2030 if (KnownZeroOut >= 2) // ADDE
2031 KnownZero |= APInt::getBitsSet(BitWidth, 1, KnownZeroOut);
2035 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2036 const APInt &RA = Rem->getAPIntValue().abs();
2037 if (RA.isPowerOf2()) {
2038 APInt LowBits = RA - 1;
2039 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
2040 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1);
2042 // The low bits of the first operand are unchanged by the srem.
2043 KnownZero = KnownZero2 & LowBits;
2044 KnownOne = KnownOne2 & LowBits;
2046 // If the first operand is non-negative or has all low bits zero, then
2047 // the upper bits are all zero.
2048 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
2049 KnownZero |= ~LowBits;
2051 // If the first operand is negative and not all low bits are zero, then
2052 // the upper bits are all one.
2053 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0))
2054 KnownOne |= ~LowBits;
2059 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2064 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2065 const APInt &RA = Rem->getAPIntValue();
2066 if (RA.isPowerOf2()) {
2067 APInt LowBits = (RA - 1);
2068 APInt Mask2 = LowBits & Mask;
2069 KnownZero |= ~LowBits & Mask;
2070 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1);
2071 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2076 // Since the result is less than or equal to either operand, any leading
2077 // zero bits in either operand must also exist in the result.
2078 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
2079 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne,
2081 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2,
2084 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
2085 KnownZero2.countLeadingOnes());
2086 KnownOne.clearAllBits();
2087 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
2090 case ISD::FrameIndex:
2091 case ISD::TargetFrameIndex:
2092 if (unsigned Align = InferPtrAlignment(Op)) {
2093 // The low bits are known zero if the pointer is aligned.
2094 KnownZero = APInt::getLowBitsSet(BitWidth, Log2_32(Align));
2100 if (Op.getOpcode() < ISD::BUILTIN_OP_END)
2103 case ISD::INTRINSIC_WO_CHAIN:
2104 case ISD::INTRINSIC_W_CHAIN:
2105 case ISD::INTRINSIC_VOID:
2106 // Allow the target to implement this method for its nodes.
2107 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this,
2113 /// ComputeNumSignBits - Return the number of times the sign bit of the
2114 /// register is replicated into the other bits. We know that at least 1 bit
2115 /// is always equal to the sign bit (itself), but other cases can give us
2116 /// information. For example, immediately after an "SRA X, 2", we know that
2117 /// the top 3 bits are all equal to each other, so we return 3.
2118 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
2119 EVT VT = Op.getValueType();
2120 assert(VT.isInteger() && "Invalid VT!");
2121 unsigned VTBits = VT.getScalarType().getSizeInBits();
2123 unsigned FirstAnswer = 1;
2126 return 1; // Limit search depth.
2128 switch (Op.getOpcode()) {
2130 case ISD::AssertSext:
2131 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2132 return VTBits-Tmp+1;
2133 case ISD::AssertZext:
2134 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2137 case ISD::Constant: {
2138 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2139 return Val.getNumSignBits();
2142 case ISD::SIGN_EXTEND:
2143 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
2144 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2146 case ISD::SIGN_EXTEND_INREG:
2147 // Max of the input and what this extends.
2149 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits();
2152 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2153 return std::max(Tmp, Tmp2);
2156 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2157 // SRA X, C -> adds C sign bits.
2158 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2159 Tmp += C->getZExtValue();
2160 if (Tmp > VTBits) Tmp = VTBits;
2164 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2165 // shl destroys sign bits.
2166 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2167 if (C->getZExtValue() >= VTBits || // Bad shift.
2168 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
2169 return Tmp - C->getZExtValue();
2174 case ISD::XOR: // NOT is handled here.
2175 // Logical binary ops preserve the number of sign bits at the worst.
2176 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2178 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2179 FirstAnswer = std::min(Tmp, Tmp2);
2180 // We computed what we know about the sign bits as our first
2181 // answer. Now proceed to the generic code that uses
2182 // ComputeMaskedBits, and pick whichever answer is better.
2187 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2188 if (Tmp == 1) return 1; // Early out.
2189 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2190 return std::min(Tmp, Tmp2);
2198 if (Op.getResNo() != 1)
2200 // The boolean result conforms to getBooleanContents. Fall through.
2202 // If setcc returns 0/-1, all bits are sign bits.
2203 if (TLI.getBooleanContents(Op.getValueType().isVector()) ==
2204 TargetLowering::ZeroOrNegativeOneBooleanContent)
2209 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2210 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2212 // Handle rotate right by N like a rotate left by 32-N.
2213 if (Op.getOpcode() == ISD::ROTR)
2214 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2216 // If we aren't rotating out all of the known-in sign bits, return the
2217 // number that are left. This handles rotl(sext(x), 1) for example.
2218 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2219 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2223 // Add can have at most one carry bit. Thus we know that the output
2224 // is, at worst, one more bit than the inputs.
2225 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2226 if (Tmp == 1) return 1; // Early out.
2228 // Special case decrementing a value (ADD X, -1):
2229 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2230 if (CRHS->isAllOnesValue()) {
2231 APInt KnownZero, KnownOne;
2232 APInt Mask = APInt::getAllOnesValue(VTBits);
2233 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
2235 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2237 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2240 // If we are subtracting one from a positive number, there is no carry
2241 // out of the result.
2242 if (KnownZero.isNegative())
2246 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2247 if (Tmp2 == 1) return 1;
2248 return std::min(Tmp, Tmp2)-1;
2251 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2252 if (Tmp2 == 1) return 1;
2255 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2256 if (CLHS->isNullValue()) {
2257 APInt KnownZero, KnownOne;
2258 APInt Mask = APInt::getAllOnesValue(VTBits);
2259 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
2260 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2262 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2265 // If the input is known to be positive (the sign bit is known clear),
2266 // the output of the NEG has the same number of sign bits as the input.
2267 if (KnownZero.isNegative())
2270 // Otherwise, we treat this like a SUB.
2273 // Sub can have at most one carry bit. Thus we know that the output
2274 // is, at worst, one more bit than the inputs.
2275 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2276 if (Tmp == 1) return 1; // Early out.
2277 return std::min(Tmp, Tmp2)-1;
2279 // FIXME: it's tricky to do anything useful for this, but it is an important
2280 // case for targets like X86.
2284 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2285 if (Op.getOpcode() == ISD::LOAD) {
2286 LoadSDNode *LD = cast<LoadSDNode>(Op);
2287 unsigned ExtType = LD->getExtensionType();
2290 case ISD::SEXTLOAD: // '17' bits known
2291 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2292 return VTBits-Tmp+1;
2293 case ISD::ZEXTLOAD: // '16' bits known
2294 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2299 // Allow the target to implement this method for its nodes.
2300 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2301 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2302 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2303 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2304 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2305 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2308 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2309 // use this information.
2310 APInt KnownZero, KnownOne;
2311 APInt Mask = APInt::getAllOnesValue(VTBits);
2312 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
2314 if (KnownZero.isNegative()) { // sign bit is 0
2316 } else if (KnownOne.isNegative()) { // sign bit is 1;
2323 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2324 // the number of identical bits in the top of the input value.
2326 Mask <<= Mask.getBitWidth()-VTBits;
2327 // Return # leading zeros. We use 'min' here in case Val was zero before
2328 // shifting. We don't want to return '64' as for an i32 "0".
2329 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2332 /// isBaseWithConstantOffset - Return true if the specified operand is an
2333 /// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an
2334 /// ISD::OR with a ConstantSDNode that is guaranteed to have the same
2335 /// semantics as an ADD. This handles the equivalence:
2336 /// X|Cst == X+Cst iff X&Cst = 0.
2337 bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const {
2338 if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) ||
2339 !isa<ConstantSDNode>(Op.getOperand(1)))
2342 if (Op.getOpcode() == ISD::OR &&
2343 !MaskedValueIsZero(Op.getOperand(0),
2344 cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue()))
2351 bool SelectionDAG::isKnownNeverNaN(SDValue Op) const {
2352 // If we're told that NaNs won't happen, assume they won't.
2353 if (getTarget().Options.NoNaNsFPMath)
2356 // If the value is a constant, we can obviously see if it is a NaN or not.
2357 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2358 return !C->getValueAPF().isNaN();
2360 // TODO: Recognize more cases here.
2365 bool SelectionDAG::isKnownNeverZero(SDValue Op) const {
2366 // If the value is a constant, we can obviously see if it is a zero or not.
2367 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2368 return !C->isZero();
2370 // TODO: Recognize more cases here.
2371 switch (Op.getOpcode()) {
2374 if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2375 return !C->isNullValue();
2382 bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const {
2383 // Check the obvious case.
2384 if (A == B) return true;
2386 // For for negative and positive zero.
2387 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A))
2388 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B))
2389 if (CA->isZero() && CB->isZero()) return true;
2391 // Otherwise they may not be equal.
2395 /// getNode - Gets or creates the specified node.
2397 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) {
2398 FoldingSetNodeID ID;
2399 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2401 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2402 return SDValue(E, 0);
2404 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT));
2405 CSEMap.InsertNode(N, IP);
2407 AllNodes.push_back(N);
2411 return SDValue(N, 0);
2414 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
2415 EVT VT, SDValue Operand) {
2416 // Constant fold unary operations with an integer constant operand.
2417 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2418 const APInt &Val = C->getAPIntValue();
2421 case ISD::SIGN_EXTEND:
2422 return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), VT);
2423 case ISD::ANY_EXTEND:
2424 case ISD::ZERO_EXTEND:
2426 return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), VT);
2427 case ISD::UINT_TO_FP:
2428 case ISD::SINT_TO_FP: {
2429 // No compile time operations on ppcf128.
2430 if (VT == MVT::ppcf128) break;
2431 APFloat apf(APInt::getNullValue(VT.getSizeInBits()));
2432 (void)apf.convertFromAPInt(Val,
2433 Opcode==ISD::SINT_TO_FP,
2434 APFloat::rmNearestTiesToEven);
2435 return getConstantFP(apf, VT);
2438 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2439 return getConstantFP(Val.bitsToFloat(), VT);
2440 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2441 return getConstantFP(Val.bitsToDouble(), VT);
2444 return getConstant(Val.byteSwap(), VT);
2446 return getConstant(Val.countPopulation(), VT);
2448 case ISD::CTLZ_ZERO_UNDEF:
2449 return getConstant(Val.countLeadingZeros(), VT);
2451 case ISD::CTTZ_ZERO_UNDEF:
2452 return getConstant(Val.countTrailingZeros(), VT);
2456 // Constant fold unary operations with a floating point constant operand.
2457 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2458 APFloat V = C->getValueAPF(); // make copy
2459 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) {
2463 return getConstantFP(V, VT);
2466 return getConstantFP(V, VT);
2468 case ISD::FP_EXTEND: {
2470 // This can return overflow, underflow, or inexact; we don't care.
2471 // FIXME need to be more flexible about rounding mode.
2472 (void)V.convert(*EVTToAPFloatSemantics(VT),
2473 APFloat::rmNearestTiesToEven, &ignored);
2474 return getConstantFP(V, VT);
2476 case ISD::FP_TO_SINT:
2477 case ISD::FP_TO_UINT: {
2480 assert(integerPartWidth >= 64);
2481 // FIXME need to be more flexible about rounding mode.
2482 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2483 Opcode==ISD::FP_TO_SINT,
2484 APFloat::rmTowardZero, &ignored);
2485 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2487 APInt api(VT.getSizeInBits(), x);
2488 return getConstant(api, VT);
2491 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2492 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2493 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2494 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2500 unsigned OpOpcode = Operand.getNode()->getOpcode();
2502 case ISD::TokenFactor:
2503 case ISD::MERGE_VALUES:
2504 case ISD::CONCAT_VECTORS:
2505 return Operand; // Factor, merge or concat of one node? No need.
2506 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
2507 case ISD::FP_EXTEND:
2508 assert(VT.isFloatingPoint() &&
2509 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2510 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2511 assert((!VT.isVector() ||
2512 VT.getVectorNumElements() ==
2513 Operand.getValueType().getVectorNumElements()) &&
2514 "Vector element count mismatch!");
2515 if (Operand.getOpcode() == ISD::UNDEF)
2516 return getUNDEF(VT);
2518 case ISD::SIGN_EXTEND:
2519 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2520 "Invalid SIGN_EXTEND!");
2521 if (Operand.getValueType() == VT) return Operand; // noop extension
2522 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2523 "Invalid sext node, dst < src!");
2524 assert((!VT.isVector() ||
2525 VT.getVectorNumElements() ==
2526 Operand.getValueType().getVectorNumElements()) &&
2527 "Vector element count mismatch!");
2528 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2529 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2530 else if (OpOpcode == ISD::UNDEF)
2531 // sext(undef) = 0, because the top bits will all be the same.
2532 return getConstant(0, VT);
2534 case ISD::ZERO_EXTEND:
2535 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2536 "Invalid ZERO_EXTEND!");
2537 if (Operand.getValueType() == VT) return Operand; // noop extension
2538 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2539 "Invalid zext node, dst < src!");
2540 assert((!VT.isVector() ||
2541 VT.getVectorNumElements() ==
2542 Operand.getValueType().getVectorNumElements()) &&
2543 "Vector element count mismatch!");
2544 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2545 return getNode(ISD::ZERO_EXTEND, DL, VT,
2546 Operand.getNode()->getOperand(0));
2547 else if (OpOpcode == ISD::UNDEF)
2548 // zext(undef) = 0, because the top bits will be zero.
2549 return getConstant(0, VT);
2551 case ISD::ANY_EXTEND:
2552 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2553 "Invalid ANY_EXTEND!");
2554 if (Operand.getValueType() == VT) return Operand; // noop extension
2555 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2556 "Invalid anyext node, dst < src!");
2557 assert((!VT.isVector() ||
2558 VT.getVectorNumElements() ==
2559 Operand.getValueType().getVectorNumElements()) &&
2560 "Vector element count mismatch!");
2562 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2563 OpOpcode == ISD::ANY_EXTEND)
2564 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2565 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2566 else if (OpOpcode == ISD::UNDEF)
2567 return getUNDEF(VT);
2569 // (ext (trunx x)) -> x
2570 if (OpOpcode == ISD::TRUNCATE) {
2571 SDValue OpOp = Operand.getNode()->getOperand(0);
2572 if (OpOp.getValueType() == VT)
2577 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2578 "Invalid TRUNCATE!");
2579 if (Operand.getValueType() == VT) return Operand; // noop truncate
2580 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) &&
2581 "Invalid truncate node, src < dst!");
2582 assert((!VT.isVector() ||
2583 VT.getVectorNumElements() ==
2584 Operand.getValueType().getVectorNumElements()) &&
2585 "Vector element count mismatch!");
2586 if (OpOpcode == ISD::TRUNCATE)
2587 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2588 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2589 OpOpcode == ISD::ANY_EXTEND) {
2590 // If the source is smaller than the dest, we still need an extend.
2591 if (Operand.getNode()->getOperand(0).getValueType().getScalarType()
2592 .bitsLT(VT.getScalarType()))
2593 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2594 if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2595 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2596 return Operand.getNode()->getOperand(0);
2598 if (OpOpcode == ISD::UNDEF)
2599 return getUNDEF(VT);
2602 // Basic sanity checking.
2603 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2604 && "Cannot BITCAST between types of different sizes!");
2605 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2606 if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x)
2607 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0));
2608 if (OpOpcode == ISD::UNDEF)
2609 return getUNDEF(VT);
2611 case ISD::SCALAR_TO_VECTOR:
2612 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2613 (VT.getVectorElementType() == Operand.getValueType() ||
2614 (VT.getVectorElementType().isInteger() &&
2615 Operand.getValueType().isInteger() &&
2616 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
2617 "Illegal SCALAR_TO_VECTOR node!");
2618 if (OpOpcode == ISD::UNDEF)
2619 return getUNDEF(VT);
2620 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2621 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2622 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2623 Operand.getConstantOperandVal(1) == 0 &&
2624 Operand.getOperand(0).getValueType() == VT)
2625 return Operand.getOperand(0);
2628 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
2629 if (getTarget().Options.UnsafeFPMath && OpOpcode == ISD::FSUB)
2630 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
2631 Operand.getNode()->getOperand(0));
2632 if (OpOpcode == ISD::FNEG) // --X -> X
2633 return Operand.getNode()->getOperand(0);
2636 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2637 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
2642 SDVTList VTs = getVTList(VT);
2643 if (VT != MVT::Glue) { // Don't CSE flag producing nodes
2644 FoldingSetNodeID ID;
2645 SDValue Ops[1] = { Operand };
2646 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2648 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2649 return SDValue(E, 0);
2651 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2652 CSEMap.InsertNode(N, IP);
2654 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2657 AllNodes.push_back(N);
2661 return SDValue(N, 0);
2664 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2666 ConstantSDNode *Cst1,
2667 ConstantSDNode *Cst2) {
2668 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
2671 case ISD::ADD: return getConstant(C1 + C2, VT);
2672 case ISD::SUB: return getConstant(C1 - C2, VT);
2673 case ISD::MUL: return getConstant(C1 * C2, VT);
2675 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2678 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2681 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2684 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2686 case ISD::AND: return getConstant(C1 & C2, VT);
2687 case ISD::OR: return getConstant(C1 | C2, VT);
2688 case ISD::XOR: return getConstant(C1 ^ C2, VT);
2689 case ISD::SHL: return getConstant(C1 << C2, VT);
2690 case ISD::SRL: return getConstant(C1.lshr(C2), VT);
2691 case ISD::SRA: return getConstant(C1.ashr(C2), VT);
2692 case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2693 case ISD::ROTR: return getConstant(C1.rotr(C2), VT);
2700 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2701 SDValue N1, SDValue N2) {
2702 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2703 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2706 case ISD::TokenFactor:
2707 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2708 N2.getValueType() == MVT::Other && "Invalid token factor!");
2709 // Fold trivial token factors.
2710 if (N1.getOpcode() == ISD::EntryToken) return N2;
2711 if (N2.getOpcode() == ISD::EntryToken) return N1;
2712 if (N1 == N2) return N1;
2714 case ISD::CONCAT_VECTORS:
2715 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2716 // one big BUILD_VECTOR.
2717 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2718 N2.getOpcode() == ISD::BUILD_VECTOR) {
2719 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
2720 N1.getNode()->op_end());
2721 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
2722 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2726 assert(VT.isInteger() && "This operator does not apply to FP types!");
2727 assert(N1.getValueType() == N2.getValueType() &&
2728 N1.getValueType() == VT && "Binary operator types must match!");
2729 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2730 // worth handling here.
2731 if (N2C && N2C->isNullValue())
2733 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2740 assert(VT.isInteger() && "This operator does not apply to FP types!");
2741 assert(N1.getValueType() == N2.getValueType() &&
2742 N1.getValueType() == VT && "Binary operator types must match!");
2743 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2744 // it's worth handling here.
2745 if (N2C && N2C->isNullValue())
2755 assert(VT.isInteger() && "This operator does not apply to FP types!");
2756 assert(N1.getValueType() == N2.getValueType() &&
2757 N1.getValueType() == VT && "Binary operator types must match!");
2764 if (getTarget().Options.UnsafeFPMath) {
2765 if (Opcode == ISD::FADD) {
2767 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
2768 if (CFP->getValueAPF().isZero())
2771 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2772 if (CFP->getValueAPF().isZero())
2774 } else if (Opcode == ISD::FSUB) {
2776 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2777 if (CFP->getValueAPF().isZero())
2781 assert(VT.isFloatingPoint() && "This operator only applies to FP types!");
2782 assert(N1.getValueType() == N2.getValueType() &&
2783 N1.getValueType() == VT && "Binary operator types must match!");
2785 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2786 assert(N1.getValueType() == VT &&
2787 N1.getValueType().isFloatingPoint() &&
2788 N2.getValueType().isFloatingPoint() &&
2789 "Invalid FCOPYSIGN!");
2796 assert(VT == N1.getValueType() &&
2797 "Shift operators return type must be the same as their first arg");
2798 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2799 "Shifts only work on integers");
2800 // Verify that the shift amount VT is bit enough to hold valid shift
2801 // amounts. This catches things like trying to shift an i1024 value by an
2802 // i8, which is easy to fall into in generic code that uses
2803 // TLI.getShiftAmount().
2804 assert(N2.getValueType().getSizeInBits() >=
2805 Log2_32_Ceil(N1.getValueType().getSizeInBits()) &&
2806 "Invalid use of small shift amount with oversized value!");
2808 // Always fold shifts of i1 values so the code generator doesn't need to
2809 // handle them. Since we know the size of the shift has to be less than the
2810 // size of the value, the shift/rotate count is guaranteed to be zero.
2813 if (N2C && N2C->isNullValue())
2816 case ISD::FP_ROUND_INREG: {
2817 EVT EVT = cast<VTSDNode>(N2)->getVT();
2818 assert(VT == N1.getValueType() && "Not an inreg round!");
2819 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2820 "Cannot FP_ROUND_INREG integer types");
2821 assert(EVT.isVector() == VT.isVector() &&
2822 "FP_ROUND_INREG type should be vector iff the operand "
2824 assert((!EVT.isVector() ||
2825 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2826 "Vector element counts must match in FP_ROUND_INREG");
2827 assert(EVT.bitsLE(VT) && "Not rounding down!");
2829 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2833 assert(VT.isFloatingPoint() &&
2834 N1.getValueType().isFloatingPoint() &&
2835 VT.bitsLE(N1.getValueType()) &&
2836 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2837 if (N1.getValueType() == VT) return N1; // noop conversion.
2839 case ISD::AssertSext:
2840 case ISD::AssertZext: {
2841 EVT EVT = cast<VTSDNode>(N2)->getVT();
2842 assert(VT == N1.getValueType() && "Not an inreg extend!");
2843 assert(VT.isInteger() && EVT.isInteger() &&
2844 "Cannot *_EXTEND_INREG FP types");
2845 assert(!EVT.isVector() &&
2846 "AssertSExt/AssertZExt type should be the vector element type "
2847 "rather than the vector type!");
2848 assert(EVT.bitsLE(VT) && "Not extending!");
2849 if (VT == EVT) return N1; // noop assertion.
2852 case ISD::SIGN_EXTEND_INREG: {
2853 EVT EVT = cast<VTSDNode>(N2)->getVT();
2854 assert(VT == N1.getValueType() && "Not an inreg extend!");
2855 assert(VT.isInteger() && EVT.isInteger() &&
2856 "Cannot *_EXTEND_INREG FP types");
2857 assert(EVT.isVector() == VT.isVector() &&
2858 "SIGN_EXTEND_INREG type should be vector iff the operand "
2860 assert((!EVT.isVector() ||
2861 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2862 "Vector element counts must match in SIGN_EXTEND_INREG");
2863 assert(EVT.bitsLE(VT) && "Not extending!");
2864 if (EVT == VT) return N1; // Not actually extending
2867 APInt Val = N1C->getAPIntValue();
2868 unsigned FromBits = EVT.getScalarType().getSizeInBits();
2869 Val <<= Val.getBitWidth()-FromBits;
2870 Val = Val.ashr(Val.getBitWidth()-FromBits);
2871 return getConstant(Val, VT);
2875 case ISD::EXTRACT_VECTOR_ELT:
2876 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2877 if (N1.getOpcode() == ISD::UNDEF)
2878 return getUNDEF(VT);
2880 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2881 // expanding copies of large vectors from registers.
2883 N1.getOpcode() == ISD::CONCAT_VECTORS &&
2884 N1.getNumOperands() > 0) {
2886 N1.getOperand(0).getValueType().getVectorNumElements();
2887 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
2888 N1.getOperand(N2C->getZExtValue() / Factor),
2889 getConstant(N2C->getZExtValue() % Factor,
2890 N2.getValueType()));
2893 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2894 // expanding large vector constants.
2895 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
2896 SDValue Elt = N1.getOperand(N2C->getZExtValue());
2897 EVT VEltTy = N1.getValueType().getVectorElementType();
2898 if (Elt.getValueType() != VEltTy) {
2899 // If the vector element type is not legal, the BUILD_VECTOR operands
2900 // are promoted and implicitly truncated. Make that explicit here.
2901 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt);
2904 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT
2905 // result is implicitly extended.
2906 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt);
2911 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2912 // operations are lowered to scalars.
2913 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2914 // If the indices are the same, return the inserted element else
2915 // if the indices are known different, extract the element from
2916 // the original vector.
2917 SDValue N1Op2 = N1.getOperand(2);
2918 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode());
2920 if (N1Op2C && N2C) {
2921 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) {
2922 if (VT == N1.getOperand(1).getValueType())
2923 return N1.getOperand(1);
2925 return getSExtOrTrunc(N1.getOperand(1), DL, VT);
2928 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
2932 case ISD::EXTRACT_ELEMENT:
2933 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
2934 assert(!N1.getValueType().isVector() && !VT.isVector() &&
2935 (N1.getValueType().isInteger() == VT.isInteger()) &&
2936 N1.getValueType() != VT &&
2937 "Wrong types for EXTRACT_ELEMENT!");
2939 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2940 // 64-bit integers into 32-bit parts. Instead of building the extract of
2941 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2942 if (N1.getOpcode() == ISD::BUILD_PAIR)
2943 return N1.getOperand(N2C->getZExtValue());
2945 // EXTRACT_ELEMENT of a constant int is also very common.
2946 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2947 unsigned ElementSize = VT.getSizeInBits();
2948 unsigned Shift = ElementSize * N2C->getZExtValue();
2949 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2950 return getConstant(ShiftedVal.trunc(ElementSize), VT);
2953 case ISD::EXTRACT_SUBVECTOR: {
2955 if (VT.isSimple() && N1.getValueType().isSimple()) {
2956 assert(VT.isVector() && N1.getValueType().isVector() &&
2957 "Extract subvector VTs must be a vectors!");
2958 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() &&
2959 "Extract subvector VTs must have the same element type!");
2960 assert(VT.getSimpleVT() <= N1.getValueType().getSimpleVT() &&
2961 "Extract subvector must be from larger vector to smaller vector!");
2963 if (isa<ConstantSDNode>(Index.getNode())) {
2964 assert((VT.getVectorNumElements() +
2965 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
2966 <= N1.getValueType().getVectorNumElements())
2967 && "Extract subvector overflow!");
2970 // Trivial extraction.
2971 if (VT.getSimpleVT() == N1.getValueType().getSimpleVT())
2980 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
2981 if (SV.getNode()) return SV;
2982 } else { // Cannonicalize constant to RHS if commutative
2983 if (isCommutativeBinOp(Opcode)) {
2984 std::swap(N1C, N2C);
2990 // Constant fold FP operations.
2991 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
2992 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
2994 if (!N2CFP && isCommutativeBinOp(Opcode)) {
2995 // Cannonicalize constant to RHS if commutative
2996 std::swap(N1CFP, N2CFP);
2998 } else if (N2CFP && VT != MVT::ppcf128) {
2999 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
3000 APFloat::opStatus s;
3003 s = V1.add(V2, APFloat::rmNearestTiesToEven);
3004 if (s != APFloat::opInvalidOp)
3005 return getConstantFP(V1, VT);
3008 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
3009 if (s!=APFloat::opInvalidOp)
3010 return getConstantFP(V1, VT);
3013 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
3014 if (s!=APFloat::opInvalidOp)
3015 return getConstantFP(V1, VT);
3018 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
3019 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
3020 return getConstantFP(V1, VT);
3023 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
3024 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
3025 return getConstantFP(V1, VT);
3027 case ISD::FCOPYSIGN:
3029 return getConstantFP(V1, VT);
3035 // Canonicalize an UNDEF to the RHS, even over a constant.
3036 if (N1.getOpcode() == ISD::UNDEF) {
3037 if (isCommutativeBinOp(Opcode)) {
3041 case ISD::FP_ROUND_INREG:
3042 case ISD::SIGN_EXTEND_INREG:
3048 return N1; // fold op(undef, arg2) -> undef
3056 return getConstant(0, VT); // fold op(undef, arg2) -> 0
3057 // For vectors, we can't easily build an all zero vector, just return
3064 // Fold a bunch of operators when the RHS is undef.
3065 if (N2.getOpcode() == ISD::UNDEF) {
3068 if (N1.getOpcode() == ISD::UNDEF)
3069 // Handle undef ^ undef -> 0 special case. This is a common
3071 return getConstant(0, VT);
3081 return N2; // fold op(arg1, undef) -> undef
3087 if (getTarget().Options.UnsafeFPMath)
3095 return getConstant(0, VT); // fold op(arg1, undef) -> 0
3096 // For vectors, we can't easily build an all zero vector, just return
3101 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
3102 // For vectors, we can't easily build an all one vector, just return
3110 // Memoize this node if possible.
3112 SDVTList VTs = getVTList(VT);
3113 if (VT != MVT::Glue) {
3114 SDValue Ops[] = { N1, N2 };
3115 FoldingSetNodeID ID;
3116 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
3118 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3119 return SDValue(E, 0);
3121 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
3122 CSEMap.InsertNode(N, IP);
3124 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
3127 AllNodes.push_back(N);
3131 return SDValue(N, 0);
3134 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3135 SDValue N1, SDValue N2, SDValue N3) {
3136 // Perform various simplifications.
3137 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
3139 case ISD::CONCAT_VECTORS:
3140 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
3141 // one big BUILD_VECTOR.
3142 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
3143 N2.getOpcode() == ISD::BUILD_VECTOR &&
3144 N3.getOpcode() == ISD::BUILD_VECTOR) {
3145 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
3146 N1.getNode()->op_end());
3147 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
3148 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end());
3149 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
3153 // Use FoldSetCC to simplify SETCC's.
3154 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
3155 if (Simp.getNode()) return Simp;
3160 if (N1C->getZExtValue())
3161 return N2; // select true, X, Y -> X
3162 return N3; // select false, X, Y -> Y
3165 if (N2 == N3) return N2; // select C, X, X -> X
3167 case ISD::VECTOR_SHUFFLE:
3168 llvm_unreachable("should use getVectorShuffle constructor!");
3169 case ISD::INSERT_SUBVECTOR: {
3171 if (VT.isSimple() && N1.getValueType().isSimple()
3172 && N2.getValueType().isSimple()) {
3173 assert(VT.isVector() && N1.getValueType().isVector() &&
3174 N2.getValueType().isVector() &&
3175 "Insert subvector VTs must be a vectors");
3176 assert(VT == N1.getValueType() &&
3177 "Dest and insert subvector source types must match!");
3178 assert(N2.getValueType().getSimpleVT() <= N1.getValueType().getSimpleVT() &&
3179 "Insert subvector must be from smaller vector to larger vector!");
3180 if (isa<ConstantSDNode>(Index.getNode())) {
3181 assert((N2.getValueType().getVectorNumElements() +
3182 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
3183 <= VT.getVectorNumElements())
3184 && "Insert subvector overflow!");
3187 // Trivial insertion.
3188 if (VT.getSimpleVT() == N2.getValueType().getSimpleVT())
3194 // Fold bit_convert nodes from a type to themselves.
3195 if (N1.getValueType() == VT)
3200 // Memoize node if it doesn't produce a flag.
3202 SDVTList VTs = getVTList(VT);
3203 if (VT != MVT::Glue) {
3204 SDValue Ops[] = { N1, N2, N3 };
3205 FoldingSetNodeID ID;
3206 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3208 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3209 return SDValue(E, 0);
3211 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3212 CSEMap.InsertNode(N, IP);
3214 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3217 AllNodes.push_back(N);
3221 return SDValue(N, 0);
3224 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3225 SDValue N1, SDValue N2, SDValue N3,
3227 SDValue Ops[] = { N1, N2, N3, N4 };
3228 return getNode(Opcode, DL, VT, Ops, 4);
3231 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3232 SDValue N1, SDValue N2, SDValue N3,
3233 SDValue N4, SDValue N5) {
3234 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3235 return getNode(Opcode, DL, VT, Ops, 5);
3238 /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
3239 /// the incoming stack arguments to be loaded from the stack.
3240 SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) {
3241 SmallVector<SDValue, 8> ArgChains;
3243 // Include the original chain at the beginning of the list. When this is
3244 // used by target LowerCall hooks, this helps legalize find the
3245 // CALLSEQ_BEGIN node.
3246 ArgChains.push_back(Chain);
3248 // Add a chain value for each stack argument.
3249 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
3250 UE = getEntryNode().getNode()->use_end(); U != UE; ++U)
3251 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
3252 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
3253 if (FI->getIndex() < 0)
3254 ArgChains.push_back(SDValue(L, 1));
3256 // Build a tokenfactor for all the chains.
3257 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other,
3258 &ArgChains[0], ArgChains.size());
3261 /// SplatByte - Distribute ByteVal over NumBits bits.
3262 static APInt SplatByte(unsigned NumBits, uint8_t ByteVal) {
3263 APInt Val = APInt(NumBits, ByteVal);
3265 for (unsigned i = NumBits; i > 8; i >>= 1) {
3266 Val = (Val << Shift) | Val;
3272 /// getMemsetValue - Vectorized representation of the memset value
3274 static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
3276 assert(Value.getOpcode() != ISD::UNDEF);
3278 unsigned NumBits = VT.getScalarType().getSizeInBits();
3279 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
3280 APInt Val = SplatByte(NumBits, C->getZExtValue() & 255);
3282 return DAG.getConstant(Val, VT);
3283 return DAG.getConstantFP(APFloat(Val), VT);
3286 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value);
3288 // Use a multiplication with 0x010101... to extend the input to the
3290 APInt Magic = SplatByte(NumBits, 0x01);
3291 Value = DAG.getNode(ISD::MUL, dl, VT, Value, DAG.getConstant(Magic, VT));
3297 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
3298 /// used when a memcpy is turned into a memset when the source is a constant
3300 static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG,
3301 const TargetLowering &TLI, StringRef Str) {
3302 // Handle vector with all elements zero.
3305 return DAG.getConstant(0, VT);
3306 else if (VT == MVT::f32 || VT == MVT::f64)
3307 return DAG.getConstantFP(0.0, VT);
3308 else if (VT.isVector()) {
3309 unsigned NumElts = VT.getVectorNumElements();
3310 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
3311 return DAG.getNode(ISD::BITCAST, dl, VT,
3312 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(),
3315 llvm_unreachable("Expected type!");
3318 assert(!VT.isVector() && "Can't handle vector type here!");
3319 unsigned NumVTBytes = VT.getSizeInBits() / 8;
3320 unsigned NumBytes = std::min(NumVTBytes, unsigned(Str.size()));
3323 if (TLI.isLittleEndian()) {
3324 for (unsigned i = 0; i != NumBytes; ++i)
3325 Val |= (uint64_t)(unsigned char)Str[i] << i*8;
3327 for (unsigned i = 0; i != NumBytes; ++i)
3328 Val |= (uint64_t)(unsigned char)Str[i] << (NumVTBytes-i-1)*8;
3331 return DAG.getConstant(Val, VT);
3334 /// getMemBasePlusOffset - Returns base and offset node for the
3336 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
3337 SelectionDAG &DAG) {
3338 EVT VT = Base.getValueType();
3339 return DAG.getNode(ISD::ADD, Base.getDebugLoc(),
3340 VT, Base, DAG.getConstant(Offset, VT));
3343 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
3345 static bool isMemSrcFromString(SDValue Src, StringRef &Str) {
3346 unsigned SrcDelta = 0;
3347 GlobalAddressSDNode *G = NULL;
3348 if (Src.getOpcode() == ISD::GlobalAddress)
3349 G = cast<GlobalAddressSDNode>(Src);
3350 else if (Src.getOpcode() == ISD::ADD &&
3351 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
3352 Src.getOperand(1).getOpcode() == ISD::Constant) {
3353 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
3354 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
3359 return getConstantStringInfo(G->getGlobal(), Str, SrcDelta, false);
3362 /// FindOptimalMemOpLowering - Determines the optimial series memory ops
3363 /// to replace the memset / memcpy. Return true if the number of memory ops
3364 /// is below the threshold. It returns the types of the sequence of
3365 /// memory ops to perform memset / memcpy by reference.
3366 static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps,
3367 unsigned Limit, uint64_t Size,
3368 unsigned DstAlign, unsigned SrcAlign,
3372 const TargetLowering &TLI) {
3373 assert((SrcAlign == 0 || SrcAlign >= DstAlign) &&
3374 "Expecting memcpy / memset source to meet alignment requirement!");
3375 // If 'SrcAlign' is zero, that means the memory operation does not need to
3376 // load the value, i.e. memset or memcpy from constant string. Otherwise,
3377 // it's the inferred alignment of the source. 'DstAlign', on the other hand,
3378 // is the specified alignment of the memory operation. If it is zero, that
3379 // means it's possible to change the alignment of the destination.
3380 // 'MemcpyStrSrc' indicates whether the memcpy source is constant so it does
3381 // not need to be loaded.
3382 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign,
3383 IsZeroVal, MemcpyStrSrc,
3384 DAG.getMachineFunction());
3386 if (VT == MVT::Other) {
3387 if (DstAlign >= TLI.getTargetData()->getPointerPrefAlignment() ||
3388 TLI.allowsUnalignedMemoryAccesses(VT)) {
3389 VT = TLI.getPointerTy();
3391 switch (DstAlign & 7) {
3392 case 0: VT = MVT::i64; break;
3393 case 4: VT = MVT::i32; break;
3394 case 2: VT = MVT::i16; break;
3395 default: VT = MVT::i8; break;
3400 while (!TLI.isTypeLegal(LVT))
3401 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1);
3402 assert(LVT.isInteger());
3408 unsigned NumMemOps = 0;
3410 unsigned VTSize = VT.getSizeInBits() / 8;
3411 while (VTSize > Size) {
3412 // For now, only use non-vector load / store's for the left-over pieces.
3413 if (VT.isVector() || VT.isFloatingPoint()) {
3415 while (!TLI.isTypeLegal(VT))
3416 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3417 VTSize = VT.getSizeInBits() / 8;
3419 // This can result in a type that is not legal on the target, e.g.
3420 // 1 or 2 bytes on PPC.
3421 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3426 if (++NumMemOps > Limit)
3428 MemOps.push_back(VT);
3435 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3436 SDValue Chain, SDValue Dst,
3437 SDValue Src, uint64_t Size,
3438 unsigned Align, bool isVol,
3440 MachinePointerInfo DstPtrInfo,
3441 MachinePointerInfo SrcPtrInfo) {
3442 // Turn a memcpy of undef to nop.
3443 if (Src.getOpcode() == ISD::UNDEF)
3446 // Expand memcpy to a series of load and store ops if the size operand falls
3447 // below a certain threshold.
3448 // TODO: In the AlwaysInline case, if the size is big then generate a loop
3449 // rather than maybe a humongous number of loads and stores.
3450 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3451 std::vector<EVT> MemOps;
3452 bool DstAlignCanChange = false;
3453 MachineFunction &MF = DAG.getMachineFunction();
3454 MachineFrameInfo *MFI = MF.getFrameInfo();
3455 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize);
3456 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3457 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3458 DstAlignCanChange = true;
3459 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3460 if (Align > SrcAlign)
3463 bool CopyFromStr = isMemSrcFromString(Src, Str);
3464 bool isZeroStr = CopyFromStr && Str.empty();
3465 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(OptSize);
3467 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3468 (DstAlignCanChange ? 0 : Align),
3469 (isZeroStr ? 0 : SrcAlign),
3470 true, CopyFromStr, DAG, TLI))
3473 if (DstAlignCanChange) {
3474 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3475 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3476 if (NewAlign > Align) {
3477 // Give the stack frame object a larger alignment if needed.
3478 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3479 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3484 SmallVector<SDValue, 8> OutChains;
3485 unsigned NumMemOps = MemOps.size();
3486 uint64_t SrcOff = 0, DstOff = 0;
3487 for (unsigned i = 0; i != NumMemOps; ++i) {
3489 unsigned VTSize = VT.getSizeInBits() / 8;
3490 SDValue Value, Store;
3493 (isZeroStr || (VT.isInteger() && !VT.isVector()))) {
3494 // It's unlikely a store of a vector immediate can be done in a single
3495 // instruction. It would require a load from a constantpool first.
3496 // We only handle zero vectors here.
3497 // FIXME: Handle other cases where store of vector immediate is done in
3498 // a single instruction.
3499 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str.substr(SrcOff));
3500 Store = DAG.getStore(Chain, dl, Value,
3501 getMemBasePlusOffset(Dst, DstOff, DAG),
3502 DstPtrInfo.getWithOffset(DstOff), isVol,
3505 // The type might not be legal for the target. This should only happen
3506 // if the type is smaller than a legal type, as on PPC, so the right
3507 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify
3508 // to Load/Store if NVT==VT.
3509 // FIXME does the case above also need this?
3510 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
3511 assert(NVT.bitsGE(VT));
3512 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain,
3513 getMemBasePlusOffset(Src, SrcOff, DAG),
3514 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false,
3515 MinAlign(SrcAlign, SrcOff));
3516 Store = DAG.getTruncStore(Chain, dl, Value,
3517 getMemBasePlusOffset(Dst, DstOff, DAG),
3518 DstPtrInfo.getWithOffset(DstOff), VT, isVol,
3521 OutChains.push_back(Store);
3526 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3527 &OutChains[0], OutChains.size());
3530 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3531 SDValue Chain, SDValue Dst,
3532 SDValue Src, uint64_t Size,
3533 unsigned Align, bool isVol,
3535 MachinePointerInfo DstPtrInfo,
3536 MachinePointerInfo SrcPtrInfo) {
3537 // Turn a memmove of undef to nop.
3538 if (Src.getOpcode() == ISD::UNDEF)
3541 // Expand memmove to a series of load and store ops if the size operand falls
3542 // below a certain threshold.
3543 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3544 std::vector<EVT> MemOps;
3545 bool DstAlignCanChange = false;
3546 MachineFunction &MF = DAG.getMachineFunction();
3547 MachineFrameInfo *MFI = MF.getFrameInfo();
3548 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize);
3549 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3550 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3551 DstAlignCanChange = true;
3552 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3553 if (Align > SrcAlign)
3555 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(OptSize);
3557 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3558 (DstAlignCanChange ? 0 : Align),
3559 SrcAlign, true, false, DAG, TLI))
3562 if (DstAlignCanChange) {
3563 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3564 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3565 if (NewAlign > Align) {
3566 // Give the stack frame object a larger alignment if needed.
3567 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3568 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3573 uint64_t SrcOff = 0, DstOff = 0;
3574 SmallVector<SDValue, 8> LoadValues;
3575 SmallVector<SDValue, 8> LoadChains;
3576 SmallVector<SDValue, 8> OutChains;
3577 unsigned NumMemOps = MemOps.size();
3578 for (unsigned i = 0; i < NumMemOps; i++) {
3580 unsigned VTSize = VT.getSizeInBits() / 8;
3581 SDValue Value, Store;
3583 Value = DAG.getLoad(VT, dl, Chain,
3584 getMemBasePlusOffset(Src, SrcOff, DAG),
3585 SrcPtrInfo.getWithOffset(SrcOff), isVol,
3586 false, false, SrcAlign);
3587 LoadValues.push_back(Value);
3588 LoadChains.push_back(Value.getValue(1));
3591 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3592 &LoadChains[0], LoadChains.size());
3594 for (unsigned i = 0; i < NumMemOps; i++) {
3596 unsigned VTSize = VT.getSizeInBits() / 8;
3597 SDValue Value, Store;
3599 Store = DAG.getStore(Chain, dl, LoadValues[i],
3600 getMemBasePlusOffset(Dst, DstOff, DAG),
3601 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align);
3602 OutChains.push_back(Store);
3606 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3607 &OutChains[0], OutChains.size());
3610 static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl,
3611 SDValue Chain, SDValue Dst,
3612 SDValue Src, uint64_t Size,
3613 unsigned Align, bool isVol,
3614 MachinePointerInfo DstPtrInfo) {
3615 // Turn a memset of undef to nop.
3616 if (Src.getOpcode() == ISD::UNDEF)
3619 // Expand memset to a series of load/store ops if the size operand
3620 // falls below a certain threshold.
3621 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3622 std::vector<EVT> MemOps;
3623 bool DstAlignCanChange = false;
3624 MachineFunction &MF = DAG.getMachineFunction();
3625 MachineFrameInfo *MFI = MF.getFrameInfo();
3626 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize);
3627 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3628 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3629 DstAlignCanChange = true;
3631 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue();
3632 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(OptSize),
3633 Size, (DstAlignCanChange ? 0 : Align), 0,
3634 IsZeroVal, false, DAG, TLI))
3637 if (DstAlignCanChange) {
3638 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3639 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3640 if (NewAlign > Align) {
3641 // Give the stack frame object a larger alignment if needed.
3642 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3643 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3648 SmallVector<SDValue, 8> OutChains;
3649 uint64_t DstOff = 0;
3650 unsigned NumMemOps = MemOps.size();
3652 // Find the largest store and generate the bit pattern for it.
3653 EVT LargestVT = MemOps[0];
3654 for (unsigned i = 1; i < NumMemOps; i++)
3655 if (MemOps[i].bitsGT(LargestVT))
3656 LargestVT = MemOps[i];
3657 SDValue MemSetValue = getMemsetValue(Src, LargestVT, DAG, dl);
3659 for (unsigned i = 0; i < NumMemOps; i++) {
3662 // If this store is smaller than the largest store see whether we can get
3663 // the smaller value for free with a truncate.
3664 SDValue Value = MemSetValue;
3665 if (VT.bitsLT(LargestVT)) {
3666 if (!LargestVT.isVector() && !VT.isVector() &&
3667 TLI.isTruncateFree(LargestVT, VT))
3668 Value = DAG.getNode(ISD::TRUNCATE, dl, VT, MemSetValue);
3670 Value = getMemsetValue(Src, VT, DAG, dl);
3672 assert(Value.getValueType() == VT && "Value with wrong type.");
3673 SDValue Store = DAG.getStore(Chain, dl, Value,
3674 getMemBasePlusOffset(Dst, DstOff, DAG),
3675 DstPtrInfo.getWithOffset(DstOff),
3676 isVol, false, Align);
3677 OutChains.push_back(Store);
3678 DstOff += VT.getSizeInBits() / 8;
3681 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3682 &OutChains[0], OutChains.size());
3685 SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst,
3686 SDValue Src, SDValue Size,
3687 unsigned Align, bool isVol, bool AlwaysInline,
3688 MachinePointerInfo DstPtrInfo,
3689 MachinePointerInfo SrcPtrInfo) {
3691 // Check to see if we should lower the memcpy to loads and stores first.
3692 // For cases within the target-specified limits, this is the best choice.
3693 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3695 // Memcpy with size zero? Just return the original chain.
3696 if (ConstantSize->isNullValue())
3699 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3700 ConstantSize->getZExtValue(),Align,
3701 isVol, false, DstPtrInfo, SrcPtrInfo);
3702 if (Result.getNode())
3706 // Then check to see if we should lower the memcpy with target-specific
3707 // code. If the target chooses to do this, this is the next best.
3709 TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align,
3710 isVol, AlwaysInline,
3711 DstPtrInfo, SrcPtrInfo);
3712 if (Result.getNode())
3715 // If we really need inline code and the target declined to provide it,
3716 // use a (potentially long) sequence of loads and stores.
3718 assert(ConstantSize && "AlwaysInline requires a constant size!");
3719 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3720 ConstantSize->getZExtValue(), Align, isVol,
3721 true, DstPtrInfo, SrcPtrInfo);
3724 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc
3725 // memcpy is not guaranteed to be safe. libc memcpys aren't required to
3726 // respect volatile, so they may do things like read or write memory
3727 // beyond the given memory regions. But fixing this isn't easy, and most
3728 // people don't care.
3730 // Emit a library call.
3731 TargetLowering::ArgListTy Args;
3732 TargetLowering::ArgListEntry Entry;
3733 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3734 Entry.Node = Dst; Args.push_back(Entry);
3735 Entry.Node = Src; Args.push_back(Entry);
3736 Entry.Node = Size; Args.push_back(Entry);
3737 // FIXME: pass in DebugLoc
3738 std::pair<SDValue,SDValue> CallResult =
3739 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3740 false, false, false, false, 0,
3741 TLI.getLibcallCallingConv(RTLIB::MEMCPY), false,
3742 /*isReturnValueUsed=*/false,
3743 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY),
3744 TLI.getPointerTy()),
3746 return CallResult.second;
3749 SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst,
3750 SDValue Src, SDValue Size,
3751 unsigned Align, bool isVol,
3752 MachinePointerInfo DstPtrInfo,
3753 MachinePointerInfo SrcPtrInfo) {
3755 // Check to see if we should lower the memmove to loads and stores first.
3756 // For cases within the target-specified limits, this is the best choice.
3757 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3759 // Memmove with size zero? Just return the original chain.
3760 if (ConstantSize->isNullValue())
3764 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
3765 ConstantSize->getZExtValue(), Align, isVol,
3766 false, DstPtrInfo, SrcPtrInfo);
3767 if (Result.getNode())
3771 // Then check to see if we should lower the memmove with target-specific
3772 // code. If the target chooses to do this, this is the next best.
3774 TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3775 DstPtrInfo, SrcPtrInfo);
3776 if (Result.getNode())
3779 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may
3780 // not be safe. See memcpy above for more details.
3782 // Emit a library call.
3783 TargetLowering::ArgListTy Args;
3784 TargetLowering::ArgListEntry Entry;
3785 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3786 Entry.Node = Dst; Args.push_back(Entry);
3787 Entry.Node = Src; Args.push_back(Entry);
3788 Entry.Node = Size; Args.push_back(Entry);
3789 // FIXME: pass in DebugLoc
3790 std::pair<SDValue,SDValue> CallResult =
3791 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3792 false, false, false, false, 0,
3793 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), false,
3794 /*isReturnValueUsed=*/false,
3795 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE),
3796 TLI.getPointerTy()),
3798 return CallResult.second;
3801 SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst,
3802 SDValue Src, SDValue Size,
3803 unsigned Align, bool isVol,
3804 MachinePointerInfo DstPtrInfo) {
3806 // Check to see if we should lower the memset to stores first.
3807 // For cases within the target-specified limits, this is the best choice.
3808 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3810 // Memset with size zero? Just return the original chain.
3811 if (ConstantSize->isNullValue())
3815 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
3816 Align, isVol, DstPtrInfo);
3818 if (Result.getNode())
3822 // Then check to see if we should lower the memset with target-specific
3823 // code. If the target chooses to do this, this is the next best.
3825 TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3827 if (Result.getNode())
3830 // Emit a library call.
3831 Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext());
3832 TargetLowering::ArgListTy Args;
3833 TargetLowering::ArgListEntry Entry;
3834 Entry.Node = Dst; Entry.Ty = IntPtrTy;
3835 Args.push_back(Entry);
3836 // Extend or truncate the argument to be an i32 value for the call.
3837 if (Src.getValueType().bitsGT(MVT::i32))
3838 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
3840 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
3842 Entry.Ty = Type::getInt32Ty(*getContext());
3843 Entry.isSExt = true;
3844 Args.push_back(Entry);
3846 Entry.Ty = IntPtrTy;
3847 Entry.isSExt = false;
3848 Args.push_back(Entry);
3849 // FIXME: pass in DebugLoc
3850 std::pair<SDValue,SDValue> CallResult =
3851 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3852 false, false, false, false, 0,
3853 TLI.getLibcallCallingConv(RTLIB::MEMSET), false,
3854 /*isReturnValueUsed=*/false,
3855 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET),
3856 TLI.getPointerTy()),
3858 return CallResult.second;
3861 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3862 SDValue Chain, SDValue Ptr, SDValue Cmp,
3863 SDValue Swp, MachinePointerInfo PtrInfo,
3865 AtomicOrdering Ordering,
3866 SynchronizationScope SynchScope) {
3867 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3868 Alignment = getEVTAlignment(MemVT);
3870 MachineFunction &MF = getMachineFunction();
3871 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
3873 // For now, atomics are considered to be volatile always.
3874 // FIXME: Volatile isn't really correct; we should keep track of atomic
3875 // orderings in the memoperand.
3876 Flags |= MachineMemOperand::MOVolatile;
3878 MachineMemOperand *MMO =
3879 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment);
3881 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO,
3882 Ordering, SynchScope);
3885 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3887 SDValue Ptr, SDValue Cmp,
3888 SDValue Swp, MachineMemOperand *MMO,
3889 AtomicOrdering Ordering,
3890 SynchronizationScope SynchScope) {
3891 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
3892 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3894 EVT VT = Cmp.getValueType();
3896 SDVTList VTs = getVTList(VT, MVT::Other);
3897 FoldingSetNodeID ID;
3898 ID.AddInteger(MemVT.getRawBits());
3899 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3900 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3902 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3903 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3904 return SDValue(E, 0);
3906 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
3907 Ptr, Cmp, Swp, MMO, Ordering,
3909 CSEMap.InsertNode(N, IP);
3910 AllNodes.push_back(N);
3911 return SDValue(N, 0);
3914 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3916 SDValue Ptr, SDValue Val,
3917 const Value* PtrVal,
3919 AtomicOrdering Ordering,
3920 SynchronizationScope SynchScope) {
3921 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3922 Alignment = getEVTAlignment(MemVT);
3924 MachineFunction &MF = getMachineFunction();
3925 // A monotonic store does not load; a release store "loads" in the sense
3926 // that other stores cannot be sunk past it.
3927 // (An atomicrmw obviously both loads and stores.)
3928 unsigned Flags = MachineMemOperand::MOStore;
3929 if (Opcode != ISD::ATOMIC_STORE || Ordering > Monotonic)
3930 Flags |= MachineMemOperand::MOLoad;
3932 // For now, atomics are considered to be volatile always.
3933 // FIXME: Volatile isn't really correct; we should keep track of atomic
3934 // orderings in the memoperand.
3935 Flags |= MachineMemOperand::MOVolatile;
3937 MachineMemOperand *MMO =
3938 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
3939 MemVT.getStoreSize(), Alignment);
3941 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO,
3942 Ordering, SynchScope);
3945 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3947 SDValue Ptr, SDValue Val,
3948 MachineMemOperand *MMO,
3949 AtomicOrdering Ordering,
3950 SynchronizationScope SynchScope) {
3951 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
3952 Opcode == ISD::ATOMIC_LOAD_SUB ||
3953 Opcode == ISD::ATOMIC_LOAD_AND ||
3954 Opcode == ISD::ATOMIC_LOAD_OR ||
3955 Opcode == ISD::ATOMIC_LOAD_XOR ||
3956 Opcode == ISD::ATOMIC_LOAD_NAND ||
3957 Opcode == ISD::ATOMIC_LOAD_MIN ||
3958 Opcode == ISD::ATOMIC_LOAD_MAX ||
3959 Opcode == ISD::ATOMIC_LOAD_UMIN ||
3960 Opcode == ISD::ATOMIC_LOAD_UMAX ||
3961 Opcode == ISD::ATOMIC_SWAP ||
3962 Opcode == ISD::ATOMIC_STORE) &&
3963 "Invalid Atomic Op");
3965 EVT VT = Val.getValueType();
3967 SDVTList VTs = Opcode == ISD::ATOMIC_STORE ? getVTList(MVT::Other) :
3968 getVTList(VT, MVT::Other);
3969 FoldingSetNodeID ID;
3970 ID.AddInteger(MemVT.getRawBits());
3971 SDValue Ops[] = {Chain, Ptr, Val};
3972 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3974 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3975 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3976 return SDValue(E, 0);
3978 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
3980 Ordering, SynchScope);
3981 CSEMap.InsertNode(N, IP);
3982 AllNodes.push_back(N);
3983 return SDValue(N, 0);
3986 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3987 EVT VT, SDValue Chain,
3989 const Value* PtrVal,
3991 AtomicOrdering Ordering,
3992 SynchronizationScope SynchScope) {
3993 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3994 Alignment = getEVTAlignment(MemVT);
3996 MachineFunction &MF = getMachineFunction();
3997 // A monotonic load does not store; an acquire load "stores" in the sense
3998 // that other loads cannot be hoisted past it.
3999 unsigned Flags = MachineMemOperand::MOLoad;
4000 if (Ordering > Monotonic)
4001 Flags |= MachineMemOperand::MOStore;
4003 // For now, atomics are considered to be volatile always.
4004 // FIXME: Volatile isn't really correct; we should keep track of atomic
4005 // orderings in the memoperand.
4006 Flags |= MachineMemOperand::MOVolatile;
4008 MachineMemOperand *MMO =
4009 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
4010 MemVT.getStoreSize(), Alignment);
4012 return getAtomic(Opcode, dl, MemVT, VT, Chain, Ptr, MMO,
4013 Ordering, SynchScope);
4016 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
4017 EVT VT, SDValue Chain,
4019 MachineMemOperand *MMO,
4020 AtomicOrdering Ordering,
4021 SynchronizationScope SynchScope) {
4022 assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op");
4024 SDVTList VTs = getVTList(VT, MVT::Other);
4025 FoldingSetNodeID ID;
4026 ID.AddInteger(MemVT.getRawBits());
4027 SDValue Ops[] = {Chain, Ptr};
4028 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
4030 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4031 cast<AtomicSDNode>(E)->refineAlignment(MMO);
4032 return SDValue(E, 0);
4034 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
4035 Ptr, MMO, Ordering, SynchScope);
4036 CSEMap.InsertNode(N, IP);
4037 AllNodes.push_back(N);
4038 return SDValue(N, 0);
4041 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
4042 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps,
4047 SmallVector<EVT, 4> VTs;
4048 VTs.reserve(NumOps);
4049 for (unsigned i = 0; i < NumOps; ++i)
4050 VTs.push_back(Ops[i].getValueType());
4051 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps),
4056 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl,
4057 const EVT *VTs, unsigned NumVTs,
4058 const SDValue *Ops, unsigned NumOps,
4059 EVT MemVT, MachinePointerInfo PtrInfo,
4060 unsigned Align, bool Vol,
4061 bool ReadMem, bool WriteMem) {
4062 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps,
4063 MemVT, PtrInfo, Align, Vol,
4068 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
4069 const SDValue *Ops, unsigned NumOps,
4070 EVT MemVT, MachinePointerInfo PtrInfo,
4071 unsigned Align, bool Vol,
4072 bool ReadMem, bool WriteMem) {
4073 if (Align == 0) // Ensure that codegen never sees alignment 0
4074 Align = getEVTAlignment(MemVT);
4076 MachineFunction &MF = getMachineFunction();
4079 Flags |= MachineMemOperand::MOStore;
4081 Flags |= MachineMemOperand::MOLoad;
4083 Flags |= MachineMemOperand::MOVolatile;
4084 MachineMemOperand *MMO =
4085 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Align);
4087 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO);
4091 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
4092 const SDValue *Ops, unsigned NumOps,
4093 EVT MemVT, MachineMemOperand *MMO) {
4094 assert((Opcode == ISD::INTRINSIC_VOID ||
4095 Opcode == ISD::INTRINSIC_W_CHAIN ||
4096 Opcode == ISD::PREFETCH ||
4097 (Opcode <= INT_MAX &&
4098 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) &&
4099 "Opcode is not a memory-accessing opcode!");
4101 // Memoize the node unless it returns a flag.
4102 MemIntrinsicSDNode *N;
4103 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
4104 FoldingSetNodeID ID;
4105 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4107 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4108 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO);
4109 return SDValue(E, 0);
4112 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
4114 CSEMap.InsertNode(N, IP);
4116 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
4119 AllNodes.push_back(N);
4120 return SDValue(N, 0);
4123 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4124 /// MachinePointerInfo record from it. This is particularly useful because the
4125 /// code generator has many cases where it doesn't bother passing in a
4126 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4127 static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) {
4128 // If this is FI+Offset, we can model it.
4129 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr))
4130 return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset);
4132 // If this is (FI+Offset1)+Offset2, we can model it.
4133 if (Ptr.getOpcode() != ISD::ADD ||
4134 !isa<ConstantSDNode>(Ptr.getOperand(1)) ||
4135 !isa<FrameIndexSDNode>(Ptr.getOperand(0)))
4136 return MachinePointerInfo();
4138 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
4139 return MachinePointerInfo::getFixedStack(FI, Offset+
4140 cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue());
4143 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4144 /// MachinePointerInfo record from it. This is particularly useful because the
4145 /// code generator has many cases where it doesn't bother passing in a
4146 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4147 static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) {
4148 // If the 'Offset' value isn't a constant, we can't handle this.
4149 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp))
4150 return InferPointerInfo(Ptr, OffsetNode->getSExtValue());
4151 if (OffsetOp.getOpcode() == ISD::UNDEF)
4152 return InferPointerInfo(Ptr);
4153 return MachinePointerInfo();
4158 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4159 EVT VT, DebugLoc dl, SDValue Chain,
4160 SDValue Ptr, SDValue Offset,
4161 MachinePointerInfo PtrInfo, EVT MemVT,
4162 bool isVolatile, bool isNonTemporal, bool isInvariant,
4163 unsigned Alignment, const MDNode *TBAAInfo) {
4164 assert(Chain.getValueType() == MVT::Other &&
4165 "Invalid chain type");
4166 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4167 Alignment = getEVTAlignment(VT);
4169 unsigned Flags = MachineMemOperand::MOLoad;
4171 Flags |= MachineMemOperand::MOVolatile;
4173 Flags |= MachineMemOperand::MONonTemporal;
4175 Flags |= MachineMemOperand::MOInvariant;
4177 // If we don't have a PtrInfo, infer the trivial frame index case to simplify
4180 PtrInfo = InferPointerInfo(Ptr, Offset);
4182 MachineFunction &MF = getMachineFunction();
4183 MachineMemOperand *MMO =
4184 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment,
4186 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO);
4190 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4191 EVT VT, DebugLoc dl, SDValue Chain,
4192 SDValue Ptr, SDValue Offset, EVT MemVT,
4193 MachineMemOperand *MMO) {
4195 ExtType = ISD::NON_EXTLOAD;
4196 } else if (ExtType == ISD::NON_EXTLOAD) {
4197 assert(VT == MemVT && "Non-extending load from different memory type!");
4200 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) &&
4201 "Should only be an extending load, not truncating!");
4202 assert(VT.isInteger() == MemVT.isInteger() &&
4203 "Cannot convert from FP to Int or Int -> FP!");
4204 assert(VT.isVector() == MemVT.isVector() &&
4205 "Cannot use trunc store to convert to or from a vector!");
4206 assert((!VT.isVector() ||
4207 VT.getVectorNumElements() == MemVT.getVectorNumElements()) &&
4208 "Cannot use trunc store to change the number of vector elements!");
4211 bool Indexed = AM != ISD::UNINDEXED;
4212 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
4213 "Unindexed load with an offset!");
4215 SDVTList VTs = Indexed ?
4216 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
4217 SDValue Ops[] = { Chain, Ptr, Offset };
4218 FoldingSetNodeID ID;
4219 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
4220 ID.AddInteger(MemVT.getRawBits());
4221 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(),
4222 MMO->isNonTemporal(),
4223 MMO->isInvariant()));
4225 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4226 cast<LoadSDNode>(E)->refineAlignment(MMO);
4227 return SDValue(E, 0);
4229 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType,
4231 CSEMap.InsertNode(N, IP);
4232 AllNodes.push_back(N);
4233 return SDValue(N, 0);
4236 SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl,
4237 SDValue Chain, SDValue Ptr,
4238 MachinePointerInfo PtrInfo,
4239 bool isVolatile, bool isNonTemporal,
4240 bool isInvariant, unsigned Alignment,
4241 const MDNode *TBAAInfo) {
4242 SDValue Undef = getUNDEF(Ptr.getValueType());
4243 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
4244 PtrInfo, VT, isVolatile, isNonTemporal, isInvariant, Alignment,
4248 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT,
4249 SDValue Chain, SDValue Ptr,
4250 MachinePointerInfo PtrInfo, EVT MemVT,
4251 bool isVolatile, bool isNonTemporal,
4252 unsigned Alignment, const MDNode *TBAAInfo) {
4253 SDValue Undef = getUNDEF(Ptr.getValueType());
4254 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
4255 PtrInfo, MemVT, isVolatile, isNonTemporal, false, Alignment,
4261 SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base,
4262 SDValue Offset, ISD::MemIndexedMode AM) {
4263 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
4264 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
4265 "Load is already a indexed load!");
4266 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl,
4267 LD->getChain(), Base, Offset, LD->getPointerInfo(),
4268 LD->getMemoryVT(), LD->isVolatile(), LD->isNonTemporal(),
4269 false, LD->getAlignment());
4272 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4273 SDValue Ptr, MachinePointerInfo PtrInfo,
4274 bool isVolatile, bool isNonTemporal,
4275 unsigned Alignment, const MDNode *TBAAInfo) {
4276 assert(Chain.getValueType() == MVT::Other &&
4277 "Invalid chain type");
4278 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4279 Alignment = getEVTAlignment(Val.getValueType());
4281 unsigned Flags = MachineMemOperand::MOStore;
4283 Flags |= MachineMemOperand::MOVolatile;
4285 Flags |= MachineMemOperand::MONonTemporal;
4288 PtrInfo = InferPointerInfo(Ptr);
4290 MachineFunction &MF = getMachineFunction();
4291 MachineMemOperand *MMO =
4292 MF.getMachineMemOperand(PtrInfo, Flags,
4293 Val.getValueType().getStoreSize(), Alignment,
4296 return getStore(Chain, dl, Val, Ptr, MMO);
4299 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4300 SDValue Ptr, MachineMemOperand *MMO) {
4301 assert(Chain.getValueType() == MVT::Other &&
4302 "Invalid chain type");
4303 EVT VT = Val.getValueType();
4304 SDVTList VTs = getVTList(MVT::Other);
4305 SDValue Undef = getUNDEF(Ptr.getValueType());
4306 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4307 FoldingSetNodeID ID;
4308 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4309 ID.AddInteger(VT.getRawBits());
4310 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
4311 MMO->isNonTemporal(), MMO->isInvariant()));
4313 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4314 cast<StoreSDNode>(E)->refineAlignment(MMO);
4315 return SDValue(E, 0);
4317 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4319 CSEMap.InsertNode(N, IP);
4320 AllNodes.push_back(N);
4321 return SDValue(N, 0);
4324 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4325 SDValue Ptr, MachinePointerInfo PtrInfo,
4326 EVT SVT,bool isVolatile, bool isNonTemporal,
4328 const MDNode *TBAAInfo) {
4329 assert(Chain.getValueType() == MVT::Other &&
4330 "Invalid chain type");
4331 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4332 Alignment = getEVTAlignment(SVT);
4334 unsigned Flags = MachineMemOperand::MOStore;
4336 Flags |= MachineMemOperand::MOVolatile;
4338 Flags |= MachineMemOperand::MONonTemporal;
4341 PtrInfo = InferPointerInfo(Ptr);
4343 MachineFunction &MF = getMachineFunction();
4344 MachineMemOperand *MMO =
4345 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment,
4348 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO);
4351 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4352 SDValue Ptr, EVT SVT,
4353 MachineMemOperand *MMO) {
4354 EVT VT = Val.getValueType();
4356 assert(Chain.getValueType() == MVT::Other &&
4357 "Invalid chain type");
4359 return getStore(Chain, dl, Val, Ptr, MMO);
4361 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) &&
4362 "Should only be a truncating store, not extending!");
4363 assert(VT.isInteger() == SVT.isInteger() &&
4364 "Can't do FP-INT conversion!");
4365 assert(VT.isVector() == SVT.isVector() &&
4366 "Cannot use trunc store to convert to or from a vector!");
4367 assert((!VT.isVector() ||
4368 VT.getVectorNumElements() == SVT.getVectorNumElements()) &&
4369 "Cannot use trunc store to change the number of vector elements!");
4371 SDVTList VTs = getVTList(MVT::Other);
4372 SDValue Undef = getUNDEF(Ptr.getValueType());
4373 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4374 FoldingSetNodeID ID;
4375 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4376 ID.AddInteger(SVT.getRawBits());
4377 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(),
4378 MMO->isNonTemporal(), MMO->isInvariant()));
4380 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4381 cast<StoreSDNode>(E)->refineAlignment(MMO);
4382 return SDValue(E, 0);
4384 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4386 CSEMap.InsertNode(N, IP);
4387 AllNodes.push_back(N);
4388 return SDValue(N, 0);
4392 SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base,
4393 SDValue Offset, ISD::MemIndexedMode AM) {
4394 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
4395 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
4396 "Store is already a indexed store!");
4397 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
4398 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
4399 FoldingSetNodeID ID;
4400 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4401 ID.AddInteger(ST->getMemoryVT().getRawBits());
4402 ID.AddInteger(ST->getRawSubclassData());
4404 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4405 return SDValue(E, 0);
4407 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM,
4408 ST->isTruncatingStore(),
4410 ST->getMemOperand());
4411 CSEMap.InsertNode(N, IP);
4412 AllNodes.push_back(N);
4413 return SDValue(N, 0);
4416 SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl,
4417 SDValue Chain, SDValue Ptr,
4420 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) };
4421 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 4);
4424 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4425 const SDUse *Ops, unsigned NumOps) {
4427 case 0: return getNode(Opcode, DL, VT);
4428 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4429 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4430 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4434 // Copy from an SDUse array into an SDValue array for use with
4435 // the regular getNode logic.
4436 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
4437 return getNode(Opcode, DL, VT, &NewOps[0], NumOps);
4440 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4441 const SDValue *Ops, unsigned NumOps) {
4443 case 0: return getNode(Opcode, DL, VT);
4444 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4445 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4446 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4452 case ISD::SELECT_CC: {
4453 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
4454 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
4455 "LHS and RHS of condition must have same type!");
4456 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4457 "True and False arms of SelectCC must have same type!");
4458 assert(Ops[2].getValueType() == VT &&
4459 "select_cc node must be of same type as true and false value!");
4463 assert(NumOps == 5 && "BR_CC takes 5 operands!");
4464 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4465 "LHS/RHS of comparison should match types!");
4472 SDVTList VTs = getVTList(VT);
4474 if (VT != MVT::Glue) {
4475 FoldingSetNodeID ID;
4476 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
4479 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4480 return SDValue(E, 0);
4482 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4483 CSEMap.InsertNode(N, IP);
4485 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4488 AllNodes.push_back(N);
4492 return SDValue(N, 0);
4495 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4496 const std::vector<EVT> &ResultTys,
4497 const SDValue *Ops, unsigned NumOps) {
4498 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()),
4502 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4503 const EVT *VTs, unsigned NumVTs,
4504 const SDValue *Ops, unsigned NumOps) {
4506 return getNode(Opcode, DL, VTs[0], Ops, NumOps);
4507 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps);
4510 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4511 const SDValue *Ops, unsigned NumOps) {
4512 if (VTList.NumVTs == 1)
4513 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps);
4517 // FIXME: figure out how to safely handle things like
4518 // int foo(int x) { return 1 << (x & 255); }
4519 // int bar() { return foo(256); }
4520 case ISD::SRA_PARTS:
4521 case ISD::SRL_PARTS:
4522 case ISD::SHL_PARTS:
4523 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
4524 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
4525 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4526 else if (N3.getOpcode() == ISD::AND)
4527 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
4528 // If the and is only masking out bits that cannot effect the shift,
4529 // eliminate the and.
4530 unsigned NumBits = VT.getScalarType().getSizeInBits()*2;
4531 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
4532 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4538 // Memoize the node unless it returns a flag.
4540 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
4541 FoldingSetNodeID ID;
4542 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4544 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4545 return SDValue(E, 0);
4548 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4549 } else if (NumOps == 2) {
4550 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4551 } else if (NumOps == 3) {
4552 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4555 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4557 CSEMap.InsertNode(N, IP);
4560 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4561 } else if (NumOps == 2) {
4562 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4563 } else if (NumOps == 3) {
4564 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4567 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4570 AllNodes.push_back(N);
4574 return SDValue(N, 0);
4577 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) {
4578 return getNode(Opcode, DL, VTList, 0, 0);
4581 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4583 SDValue Ops[] = { N1 };
4584 return getNode(Opcode, DL, VTList, Ops, 1);
4587 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4588 SDValue N1, SDValue N2) {
4589 SDValue Ops[] = { N1, N2 };
4590 return getNode(Opcode, DL, VTList, Ops, 2);
4593 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4594 SDValue N1, SDValue N2, SDValue N3) {
4595 SDValue Ops[] = { N1, N2, N3 };
4596 return getNode(Opcode, DL, VTList, Ops, 3);
4599 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4600 SDValue N1, SDValue N2, SDValue N3,
4602 SDValue Ops[] = { N1, N2, N3, N4 };
4603 return getNode(Opcode, DL, VTList, Ops, 4);
4606 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4607 SDValue N1, SDValue N2, SDValue N3,
4608 SDValue N4, SDValue N5) {
4609 SDValue Ops[] = { N1, N2, N3, N4, N5 };
4610 return getNode(Opcode, DL, VTList, Ops, 5);
4613 SDVTList SelectionDAG::getVTList(EVT VT) {
4614 return makeVTList(SDNode::getValueTypeList(VT), 1);
4617 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
4618 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4619 E = VTList.rend(); I != E; ++I)
4620 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
4623 EVT *Array = Allocator.Allocate<EVT>(2);
4626 SDVTList Result = makeVTList(Array, 2);
4627 VTList.push_back(Result);
4631 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
4632 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4633 E = VTList.rend(); I != E; ++I)
4634 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4638 EVT *Array = Allocator.Allocate<EVT>(3);
4642 SDVTList Result = makeVTList(Array, 3);
4643 VTList.push_back(Result);
4647 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
4648 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4649 E = VTList.rend(); I != E; ++I)
4650 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4651 I->VTs[2] == VT3 && I->VTs[3] == VT4)
4654 EVT *Array = Allocator.Allocate<EVT>(4);
4659 SDVTList Result = makeVTList(Array, 4);
4660 VTList.push_back(Result);
4664 SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) {
4666 case 0: llvm_unreachable("Cannot have nodes without results!");
4667 case 1: return getVTList(VTs[0]);
4668 case 2: return getVTList(VTs[0], VTs[1]);
4669 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
4670 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]);
4674 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4675 E = VTList.rend(); I != E; ++I) {
4676 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
4679 bool NoMatch = false;
4680 for (unsigned i = 2; i != NumVTs; ++i)
4681 if (VTs[i] != I->VTs[i]) {
4689 EVT *Array = Allocator.Allocate<EVT>(NumVTs);
4690 std::copy(VTs, VTs+NumVTs, Array);
4691 SDVTList Result = makeVTList(Array, NumVTs);
4692 VTList.push_back(Result);
4697 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
4698 /// specified operands. If the resultant node already exists in the DAG,
4699 /// this does not modify the specified node, instead it returns the node that
4700 /// already exists. If the resultant node does not exist in the DAG, the
4701 /// input node is returned. As a degenerate case, if you specify the same
4702 /// input operands as the node already has, the input node is returned.
4703 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) {
4704 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
4706 // Check to see if there is no change.
4707 if (Op == N->getOperand(0)) return N;
4709 // See if the modified node already exists.
4710 void *InsertPos = 0;
4711 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
4714 // Nope it doesn't. Remove the node from its current place in the maps.
4716 if (!RemoveNodeFromCSEMaps(N))
4719 // Now we update the operands.
4720 N->OperandList[0].set(Op);
4722 // If this gets put into a CSE map, add it.
4723 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4727 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) {
4728 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
4730 // Check to see if there is no change.
4731 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
4732 return N; // No operands changed, just return the input node.
4734 // See if the modified node already exists.
4735 void *InsertPos = 0;
4736 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
4739 // Nope it doesn't. Remove the node from its current place in the maps.
4741 if (!RemoveNodeFromCSEMaps(N))
4744 // Now we update the operands.
4745 if (N->OperandList[0] != Op1)
4746 N->OperandList[0].set(Op1);
4747 if (N->OperandList[1] != Op2)
4748 N->OperandList[1].set(Op2);
4750 // If this gets put into a CSE map, add it.
4751 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4755 SDNode *SelectionDAG::
4756 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) {
4757 SDValue Ops[] = { Op1, Op2, Op3 };
4758 return UpdateNodeOperands(N, Ops, 3);
4761 SDNode *SelectionDAG::
4762 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
4763 SDValue Op3, SDValue Op4) {
4764 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
4765 return UpdateNodeOperands(N, Ops, 4);
4768 SDNode *SelectionDAG::
4769 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
4770 SDValue Op3, SDValue Op4, SDValue Op5) {
4771 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
4772 return UpdateNodeOperands(N, Ops, 5);
4775 SDNode *SelectionDAG::
4776 UpdateNodeOperands(SDNode *N, const SDValue *Ops, unsigned NumOps) {
4777 assert(N->getNumOperands() == NumOps &&
4778 "Update with wrong number of operands");
4780 // Check to see if there is no change.
4781 bool AnyChange = false;
4782 for (unsigned i = 0; i != NumOps; ++i) {
4783 if (Ops[i] != N->getOperand(i)) {
4789 // No operands changed, just return the input node.
4790 if (!AnyChange) return N;
4792 // See if the modified node already exists.
4793 void *InsertPos = 0;
4794 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
4797 // Nope it doesn't. Remove the node from its current place in the maps.
4799 if (!RemoveNodeFromCSEMaps(N))
4802 // Now we update the operands.
4803 for (unsigned i = 0; i != NumOps; ++i)
4804 if (N->OperandList[i] != Ops[i])
4805 N->OperandList[i].set(Ops[i]);
4807 // If this gets put into a CSE map, add it.
4808 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4812 /// DropOperands - Release the operands and set this node to have
4814 void SDNode::DropOperands() {
4815 // Unlike the code in MorphNodeTo that does this, we don't need to
4816 // watch for dead nodes here.
4817 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
4823 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
4826 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4828 SDVTList VTs = getVTList(VT);
4829 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
4832 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4833 EVT VT, SDValue Op1) {
4834 SDVTList VTs = getVTList(VT);
4835 SDValue Ops[] = { Op1 };
4836 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4839 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4840 EVT VT, SDValue Op1,
4842 SDVTList VTs = getVTList(VT);
4843 SDValue Ops[] = { Op1, Op2 };
4844 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4847 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4848 EVT VT, SDValue Op1,
4849 SDValue Op2, SDValue Op3) {
4850 SDVTList VTs = getVTList(VT);
4851 SDValue Ops[] = { Op1, Op2, Op3 };
4852 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4855 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4856 EVT VT, const SDValue *Ops,
4858 SDVTList VTs = getVTList(VT);
4859 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4862 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4863 EVT VT1, EVT VT2, const SDValue *Ops,
4865 SDVTList VTs = getVTList(VT1, VT2);
4866 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4869 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4871 SDVTList VTs = getVTList(VT1, VT2);
4872 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
4875 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4876 EVT VT1, EVT VT2, EVT VT3,
4877 const SDValue *Ops, unsigned NumOps) {
4878 SDVTList VTs = getVTList(VT1, VT2, VT3);
4879 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4882 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4883 EVT VT1, EVT VT2, EVT VT3, EVT VT4,
4884 const SDValue *Ops, unsigned NumOps) {
4885 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4886 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4889 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4892 SDVTList VTs = getVTList(VT1, VT2);
4893 SDValue Ops[] = { Op1 };
4894 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4897 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4899 SDValue Op1, SDValue Op2) {
4900 SDVTList VTs = getVTList(VT1, VT2);
4901 SDValue Ops[] = { Op1, Op2 };
4902 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4905 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4907 SDValue Op1, SDValue Op2,
4909 SDVTList VTs = getVTList(VT1, VT2);
4910 SDValue Ops[] = { Op1, Op2, Op3 };
4911 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4914 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4915 EVT VT1, EVT VT2, EVT VT3,
4916 SDValue Op1, SDValue Op2,
4918 SDVTList VTs = getVTList(VT1, VT2, VT3);
4919 SDValue Ops[] = { Op1, Op2, Op3 };
4920 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4923 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4924 SDVTList VTs, const SDValue *Ops,
4926 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
4927 // Reset the NodeID to -1.
4932 /// UpdadeDebugLocOnMergedSDNode - If the opt level is -O0 then it throws away
4933 /// the line number information on the merged node since it is not possible to
4934 /// preserve the information that operation is associated with multiple lines.
4935 /// This will make the debugger working better at -O0, were there is a higher
4936 /// probability having other instructions associated with that line.
4938 SDNode *SelectionDAG::UpdadeDebugLocOnMergedSDNode(SDNode *N, DebugLoc OLoc) {
4939 DebugLoc NLoc = N->getDebugLoc();
4940 if (!(NLoc.isUnknown()) && (OptLevel == CodeGenOpt::None) && (OLoc != NLoc)) {
4941 N->setDebugLoc(DebugLoc());
4946 /// MorphNodeTo - This *mutates* the specified node to have the specified
4947 /// return type, opcode, and operands.
4949 /// Note that MorphNodeTo returns the resultant node. If there is already a
4950 /// node of the specified opcode and operands, it returns that node instead of
4951 /// the current one. Note that the DebugLoc need not be the same.
4953 /// Using MorphNodeTo is faster than creating a new node and swapping it in
4954 /// with ReplaceAllUsesWith both because it often avoids allocating a new
4955 /// node, and because it doesn't require CSE recalculation for any of
4956 /// the node's users.
4958 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4959 SDVTList VTs, const SDValue *Ops,
4961 // If an identical node already exists, use it.
4963 if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) {
4964 FoldingSetNodeID ID;
4965 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
4966 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
4967 return UpdadeDebugLocOnMergedSDNode(ON, N->getDebugLoc());
4970 if (!RemoveNodeFromCSEMaps(N))
4973 // Start the morphing.
4975 N->ValueList = VTs.VTs;
4976 N->NumValues = VTs.NumVTs;
4978 // Clear the operands list, updating used nodes to remove this from their
4979 // use list. Keep track of any operands that become dead as a result.
4980 SmallPtrSet<SDNode*, 16> DeadNodeSet;
4981 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
4983 SDNode *Used = Use.getNode();
4985 if (Used->use_empty())
4986 DeadNodeSet.insert(Used);
4989 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) {
4990 // Initialize the memory references information.
4991 MN->setMemRefs(0, 0);
4992 // If NumOps is larger than the # of operands we can have in a
4993 // MachineSDNode, reallocate the operand list.
4994 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) {
4995 if (MN->OperandsNeedDelete)
4996 delete[] MN->OperandList;
4997 if (NumOps > array_lengthof(MN->LocalOperands))
4998 // We're creating a final node that will live unmorphed for the
4999 // remainder of the current SelectionDAG iteration, so we can allocate
5000 // the operands directly out of a pool with no recycling metadata.
5001 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
5004 MN->InitOperands(MN->LocalOperands, Ops, NumOps);
5005 MN->OperandsNeedDelete = false;
5007 MN->InitOperands(MN->OperandList, Ops, NumOps);
5009 // If NumOps is larger than the # of operands we currently have, reallocate
5010 // the operand list.
5011 if (NumOps > N->NumOperands) {
5012 if (N->OperandsNeedDelete)
5013 delete[] N->OperandList;
5014 N->InitOperands(new SDUse[NumOps], Ops, NumOps);
5015 N->OperandsNeedDelete = true;
5017 N->InitOperands(N->OperandList, Ops, NumOps);
5020 // Delete any nodes that are still dead after adding the uses for the
5022 if (!DeadNodeSet.empty()) {
5023 SmallVector<SDNode *, 16> DeadNodes;
5024 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
5025 E = DeadNodeSet.end(); I != E; ++I)
5026 if ((*I)->use_empty())
5027 DeadNodes.push_back(*I);
5028 RemoveDeadNodes(DeadNodes);
5032 CSEMap.InsertNode(N, IP); // Memoize the new node.
5037 /// getMachineNode - These are used for target selectors to create a new node
5038 /// with specified return type(s), MachineInstr opcode, and operands.
5040 /// Note that getMachineNode returns the resultant node. If there is already a
5041 /// node of the specified opcode and operands, it returns that node instead of
5042 /// the current one.
5044 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) {
5045 SDVTList VTs = getVTList(VT);
5046 return getMachineNode(Opcode, dl, VTs, 0, 0);
5050 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) {
5051 SDVTList VTs = getVTList(VT);
5052 SDValue Ops[] = { Op1 };
5053 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5057 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
5058 SDValue Op1, SDValue Op2) {
5059 SDVTList VTs = getVTList(VT);
5060 SDValue Ops[] = { Op1, Op2 };
5061 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5065 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
5066 SDValue Op1, SDValue Op2, SDValue Op3) {
5067 SDVTList VTs = getVTList(VT);
5068 SDValue Ops[] = { Op1, Op2, Op3 };
5069 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5073 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
5074 const SDValue *Ops, unsigned NumOps) {
5075 SDVTList VTs = getVTList(VT);
5076 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5080 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) {
5081 SDVTList VTs = getVTList(VT1, VT2);
5082 return getMachineNode(Opcode, dl, VTs, 0, 0);
5086 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5087 EVT VT1, EVT VT2, SDValue Op1) {
5088 SDVTList VTs = getVTList(VT1, VT2);
5089 SDValue Ops[] = { Op1 };
5090 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5094 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5095 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) {
5096 SDVTList VTs = getVTList(VT1, VT2);
5097 SDValue Ops[] = { Op1, Op2 };
5098 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5102 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5103 EVT VT1, EVT VT2, SDValue Op1,
5104 SDValue Op2, SDValue Op3) {
5105 SDVTList VTs = getVTList(VT1, VT2);
5106 SDValue Ops[] = { Op1, Op2, Op3 };
5107 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5111 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5113 const SDValue *Ops, unsigned NumOps) {
5114 SDVTList VTs = getVTList(VT1, VT2);
5115 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5119 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5120 EVT VT1, EVT VT2, EVT VT3,
5121 SDValue Op1, SDValue Op2) {
5122 SDVTList VTs = getVTList(VT1, VT2, VT3);
5123 SDValue Ops[] = { Op1, Op2 };
5124 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5128 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5129 EVT VT1, EVT VT2, EVT VT3,
5130 SDValue Op1, SDValue Op2, SDValue Op3) {
5131 SDVTList VTs = getVTList(VT1, VT2, VT3);
5132 SDValue Ops[] = { Op1, Op2, Op3 };
5133 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5137 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5138 EVT VT1, EVT VT2, EVT VT3,
5139 const SDValue *Ops, unsigned NumOps) {
5140 SDVTList VTs = getVTList(VT1, VT2, VT3);
5141 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5145 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1,
5146 EVT VT2, EVT VT3, EVT VT4,
5147 const SDValue *Ops, unsigned NumOps) {
5148 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
5149 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5153 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5154 const std::vector<EVT> &ResultTys,
5155 const SDValue *Ops, unsigned NumOps) {
5156 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size());
5157 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5161 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs,
5162 const SDValue *Ops, unsigned NumOps) {
5163 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue;
5168 FoldingSetNodeID ID;
5169 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps);
5171 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
5172 return cast<MachineSDNode>(UpdadeDebugLocOnMergedSDNode(E, DL));
5176 // Allocate a new MachineSDNode.
5177 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs);
5179 // Initialize the operands list.
5180 if (NumOps > array_lengthof(N->LocalOperands))
5181 // We're creating a final node that will live unmorphed for the
5182 // remainder of the current SelectionDAG iteration, so we can allocate
5183 // the operands directly out of a pool with no recycling metadata.
5184 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
5187 N->InitOperands(N->LocalOperands, Ops, NumOps);
5188 N->OperandsNeedDelete = false;
5191 CSEMap.InsertNode(N, IP);
5193 AllNodes.push_back(N);
5195 VerifyMachineNode(N);
5200 /// getTargetExtractSubreg - A convenience function for creating
5201 /// TargetOpcode::EXTRACT_SUBREG nodes.
5203 SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT,
5205 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
5206 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL,
5207 VT, Operand, SRIdxVal);
5208 return SDValue(Subreg, 0);
5211 /// getTargetInsertSubreg - A convenience function for creating
5212 /// TargetOpcode::INSERT_SUBREG nodes.
5214 SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT,
5215 SDValue Operand, SDValue Subreg) {
5216 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
5217 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL,
5218 VT, Operand, Subreg, SRIdxVal);
5219 return SDValue(Result, 0);
5222 /// getNodeIfExists - Get the specified node if it's already available, or
5223 /// else return NULL.
5224 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
5225 const SDValue *Ops, unsigned NumOps) {
5226 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
5227 FoldingSetNodeID ID;
5228 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
5230 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
5236 /// getDbgValue - Creates a SDDbgValue node.
5239 SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off,
5240 DebugLoc DL, unsigned O) {
5241 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O);
5245 SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off,
5246 DebugLoc DL, unsigned O) {
5247 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O);
5251 SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off,
5252 DebugLoc DL, unsigned O) {
5253 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O);
5258 /// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node
5259 /// pointed to by a use iterator is deleted, increment the use iterator
5260 /// so that it doesn't dangle.
5262 /// This class also manages a "downlink" DAGUpdateListener, to forward
5263 /// messages to ReplaceAllUsesWith's callers.
5265 class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener {
5266 SelectionDAG::DAGUpdateListener *DownLink;
5267 SDNode::use_iterator &UI;
5268 SDNode::use_iterator &UE;
5270 virtual void NodeDeleted(SDNode *N, SDNode *E) {
5271 // Increment the iterator as needed.
5272 while (UI != UE && N == *UI)
5275 // Then forward the message.
5276 if (DownLink) DownLink->NodeDeleted(N, E);
5279 virtual void NodeUpdated(SDNode *N) {
5280 // Just forward the message.
5281 if (DownLink) DownLink->NodeUpdated(N);
5285 RAUWUpdateListener(SelectionDAG::DAGUpdateListener *dl,
5286 SDNode::use_iterator &ui,
5287 SDNode::use_iterator &ue)
5288 : DownLink(dl), UI(ui), UE(ue) {}
5293 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5294 /// This can cause recursive merging of nodes in the DAG.
5296 /// This version assumes From has a single result value.
5298 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To,
5299 DAGUpdateListener *UpdateListener) {
5300 SDNode *From = FromN.getNode();
5301 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
5302 "Cannot replace with this method!");
5303 assert(From != To.getNode() && "Cannot replace uses of with self");
5305 // Iterate over all the existing uses of From. New uses will be added
5306 // to the beginning of the use list, which we avoid visiting.
5307 // This specifically avoids visiting uses of From that arise while the
5308 // replacement is happening, because any such uses would be the result
5309 // of CSE: If an existing node looks like From after one of its operands
5310 // is replaced by To, we don't want to replace of all its users with To
5311 // too. See PR3018 for more info.
5312 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5313 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5317 // This node is about to morph, remove its old self from the CSE maps.
5318 RemoveNodeFromCSEMaps(User);
5320 // A user can appear in a use list multiple times, and when this
5321 // happens the uses are usually next to each other in the list.
5322 // To help reduce the number of CSE recomputations, process all
5323 // the uses of this user that we can find this way.
5325 SDUse &Use = UI.getUse();
5328 } while (UI != UE && *UI == User);
5330 // Now that we have modified User, add it back to the CSE maps. If it
5331 // already exists there, recursively merge the results together.
5332 AddModifiedNodeToCSEMaps(User, &Listener);
5335 // If we just RAUW'd the root, take note.
5336 if (FromN == getRoot())
5340 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5341 /// This can cause recursive merging of nodes in the DAG.
5343 /// This version assumes that for each value of From, there is a
5344 /// corresponding value in To in the same position with the same type.
5346 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To,
5347 DAGUpdateListener *UpdateListener) {
5349 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
5350 assert((!From->hasAnyUseOfValue(i) ||
5351 From->getValueType(i) == To->getValueType(i)) &&
5352 "Cannot use this version of ReplaceAllUsesWith!");
5355 // Handle the trivial case.
5359 // Iterate over just the existing users of From. See the comments in
5360 // the ReplaceAllUsesWith above.
5361 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5362 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5366 // This node is about to morph, remove its old self from the CSE maps.
5367 RemoveNodeFromCSEMaps(User);
5369 // A user can appear in a use list multiple times, and when this
5370 // happens the uses are usually next to each other in the list.
5371 // To help reduce the number of CSE recomputations, process all
5372 // the uses of this user that we can find this way.
5374 SDUse &Use = UI.getUse();
5377 } while (UI != UE && *UI == User);
5379 // Now that we have modified User, add it back to the CSE maps. If it
5380 // already exists there, recursively merge the results together.
5381 AddModifiedNodeToCSEMaps(User, &Listener);
5384 // If we just RAUW'd the root, take note.
5385 if (From == getRoot().getNode())
5386 setRoot(SDValue(To, getRoot().getResNo()));
5389 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5390 /// This can cause recursive merging of nodes in the DAG.
5392 /// This version can replace From with any result values. To must match the
5393 /// number and types of values returned by From.
5394 void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
5396 DAGUpdateListener *UpdateListener) {
5397 if (From->getNumValues() == 1) // Handle the simple case efficiently.
5398 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener);
5400 // Iterate over just the existing users of From. See the comments in
5401 // the ReplaceAllUsesWith above.
5402 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5403 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5407 // This node is about to morph, remove its old self from the CSE maps.
5408 RemoveNodeFromCSEMaps(User);
5410 // A user can appear in a use list multiple times, and when this
5411 // happens the uses are usually next to each other in the list.
5412 // To help reduce the number of CSE recomputations, process all
5413 // the uses of this user that we can find this way.
5415 SDUse &Use = UI.getUse();
5416 const SDValue &ToOp = To[Use.getResNo()];
5419 } while (UI != UE && *UI == User);
5421 // Now that we have modified User, add it back to the CSE maps. If it
5422 // already exists there, recursively merge the results together.
5423 AddModifiedNodeToCSEMaps(User, &Listener);
5426 // If we just RAUW'd the root, take note.
5427 if (From == getRoot().getNode())
5428 setRoot(SDValue(To[getRoot().getResNo()]));
5431 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
5432 /// uses of other values produced by From.getNode() alone. The Deleted
5433 /// vector is handled the same way as for ReplaceAllUsesWith.
5434 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To,
5435 DAGUpdateListener *UpdateListener){
5436 // Handle the really simple, really trivial case efficiently.
5437 if (From == To) return;
5439 // Handle the simple, trivial, case efficiently.
5440 if (From.getNode()->getNumValues() == 1) {
5441 ReplaceAllUsesWith(From, To, UpdateListener);
5445 // Iterate over just the existing users of From. See the comments in
5446 // the ReplaceAllUsesWith above.
5447 SDNode::use_iterator UI = From.getNode()->use_begin(),
5448 UE = From.getNode()->use_end();
5449 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5452 bool UserRemovedFromCSEMaps = false;
5454 // A user can appear in a use list multiple times, and when this
5455 // happens the uses are usually next to each other in the list.
5456 // To help reduce the number of CSE recomputations, process all
5457 // the uses of this user that we can find this way.
5459 SDUse &Use = UI.getUse();
5461 // Skip uses of different values from the same node.
5462 if (Use.getResNo() != From.getResNo()) {
5467 // If this node hasn't been modified yet, it's still in the CSE maps,
5468 // so remove its old self from the CSE maps.
5469 if (!UserRemovedFromCSEMaps) {
5470 RemoveNodeFromCSEMaps(User);
5471 UserRemovedFromCSEMaps = true;
5476 } while (UI != UE && *UI == User);
5478 // We are iterating over all uses of the From node, so if a use
5479 // doesn't use the specific value, no changes are made.
5480 if (!UserRemovedFromCSEMaps)
5483 // Now that we have modified User, add it back to the CSE maps. If it
5484 // already exists there, recursively merge the results together.
5485 AddModifiedNodeToCSEMaps(User, &Listener);
5488 // If we just RAUW'd the root, take note.
5489 if (From == getRoot())
5494 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
5495 /// to record information about a use.
5502 /// operator< - Sort Memos by User.
5503 bool operator<(const UseMemo &L, const UseMemo &R) {
5504 return (intptr_t)L.User < (intptr_t)R.User;
5508 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
5509 /// uses of other values produced by From.getNode() alone. The same value
5510 /// may appear in both the From and To list. The Deleted vector is
5511 /// handled the same way as for ReplaceAllUsesWith.
5512 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
5515 DAGUpdateListener *UpdateListener){
5516 // Handle the simple, trivial case efficiently.
5518 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener);
5520 // Read up all the uses and make records of them. This helps
5521 // processing new uses that are introduced during the
5522 // replacement process.
5523 SmallVector<UseMemo, 4> Uses;
5524 for (unsigned i = 0; i != Num; ++i) {
5525 unsigned FromResNo = From[i].getResNo();
5526 SDNode *FromNode = From[i].getNode();
5527 for (SDNode::use_iterator UI = FromNode->use_begin(),
5528 E = FromNode->use_end(); UI != E; ++UI) {
5529 SDUse &Use = UI.getUse();
5530 if (Use.getResNo() == FromResNo) {
5531 UseMemo Memo = { *UI, i, &Use };
5532 Uses.push_back(Memo);
5537 // Sort the uses, so that all the uses from a given User are together.
5538 std::sort(Uses.begin(), Uses.end());
5540 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
5541 UseIndex != UseIndexEnd; ) {
5542 // We know that this user uses some value of From. If it is the right
5543 // value, update it.
5544 SDNode *User = Uses[UseIndex].User;
5546 // This node is about to morph, remove its old self from the CSE maps.
5547 RemoveNodeFromCSEMaps(User);
5549 // The Uses array is sorted, so all the uses for a given User
5550 // are next to each other in the list.
5551 // To help reduce the number of CSE recomputations, process all
5552 // the uses of this user that we can find this way.
5554 unsigned i = Uses[UseIndex].Index;
5555 SDUse &Use = *Uses[UseIndex].Use;
5559 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
5561 // Now that we have modified User, add it back to the CSE maps. If it
5562 // already exists there, recursively merge the results together.
5563 AddModifiedNodeToCSEMaps(User, UpdateListener);
5567 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
5568 /// based on their topological order. It returns the maximum id and a vector
5569 /// of the SDNodes* in assigned order by reference.
5570 unsigned SelectionDAG::AssignTopologicalOrder() {
5572 unsigned DAGSize = 0;
5574 // SortedPos tracks the progress of the algorithm. Nodes before it are
5575 // sorted, nodes after it are unsorted. When the algorithm completes
5576 // it is at the end of the list.
5577 allnodes_iterator SortedPos = allnodes_begin();
5579 // Visit all the nodes. Move nodes with no operands to the front of
5580 // the list immediately. Annotate nodes that do have operands with their
5581 // operand count. Before we do this, the Node Id fields of the nodes
5582 // may contain arbitrary values. After, the Node Id fields for nodes
5583 // before SortedPos will contain the topological sort index, and the
5584 // Node Id fields for nodes At SortedPos and after will contain the
5585 // count of outstanding operands.
5586 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
5589 unsigned Degree = N->getNumOperands();
5591 // A node with no uses, add it to the result array immediately.
5592 N->setNodeId(DAGSize++);
5593 allnodes_iterator Q = N;
5595 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
5596 assert(SortedPos != AllNodes.end() && "Overran node list");
5599 // Temporarily use the Node Id as scratch space for the degree count.
5600 N->setNodeId(Degree);
5604 // Visit all the nodes. As we iterate, moves nodes into sorted order,
5605 // such that by the time the end is reached all nodes will be sorted.
5606 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
5609 // N is in sorted position, so all its uses have one less operand
5610 // that needs to be sorted.
5611 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
5614 unsigned Degree = P->getNodeId();
5615 assert(Degree != 0 && "Invalid node degree");
5618 // All of P's operands are sorted, so P may sorted now.
5619 P->setNodeId(DAGSize++);
5621 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
5622 assert(SortedPos != AllNodes.end() && "Overran node list");
5625 // Update P's outstanding operand count.
5626 P->setNodeId(Degree);
5629 if (I == SortedPos) {
5632 dbgs() << "Overran sorted position:\n";
5635 llvm_unreachable(0);
5639 assert(SortedPos == AllNodes.end() &&
5640 "Topological sort incomplete!");
5641 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
5642 "First node in topological sort is not the entry token!");
5643 assert(AllNodes.front().getNodeId() == 0 &&
5644 "First node in topological sort has non-zero id!");
5645 assert(AllNodes.front().getNumOperands() == 0 &&
5646 "First node in topological sort has operands!");
5647 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
5648 "Last node in topologic sort has unexpected id!");
5649 assert(AllNodes.back().use_empty() &&
5650 "Last node in topologic sort has users!");
5651 assert(DAGSize == allnodes_size() && "Node count mismatch!");
5655 /// AssignOrdering - Assign an order to the SDNode.
5656 void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) {
5657 assert(SD && "Trying to assign an order to a null node!");
5658 Ordering->add(SD, Order);
5661 /// GetOrdering - Get the order for the SDNode.
5662 unsigned SelectionDAG::GetOrdering(const SDNode *SD) const {
5663 assert(SD && "Trying to get the order of a null node!");
5664 return Ordering->getOrder(SD);
5667 /// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the
5668 /// value is produced by SD.
5669 void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) {
5670 DbgInfo->add(DB, SD, isParameter);
5672 SD->setHasDebugValue(true);
5675 /// TransferDbgValues - Transfer SDDbgValues.
5676 void SelectionDAG::TransferDbgValues(SDValue From, SDValue To) {
5677 if (From == To || !From.getNode()->getHasDebugValue())
5679 SDNode *FromNode = From.getNode();
5680 SDNode *ToNode = To.getNode();
5681 ArrayRef<SDDbgValue *> DVs = GetDbgValues(FromNode);
5682 SmallVector<SDDbgValue *, 2> ClonedDVs;
5683 for (ArrayRef<SDDbgValue *>::iterator I = DVs.begin(), E = DVs.end();
5685 SDDbgValue *Dbg = *I;
5686 if (Dbg->getKind() == SDDbgValue::SDNODE) {
5687 SDDbgValue *Clone = getDbgValue(Dbg->getMDPtr(), ToNode, To.getResNo(),
5688 Dbg->getOffset(), Dbg->getDebugLoc(),
5690 ClonedDVs.push_back(Clone);
5693 for (SmallVector<SDDbgValue *, 2>::iterator I = ClonedDVs.begin(),
5694 E = ClonedDVs.end(); I != E; ++I)
5695 AddDbgValue(*I, ToNode, false);
5698 //===----------------------------------------------------------------------===//
5700 //===----------------------------------------------------------------------===//
5702 HandleSDNode::~HandleSDNode() {
5706 GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, DebugLoc DL,
5707 const GlobalValue *GA,
5708 EVT VT, int64_t o, unsigned char TF)
5709 : SDNode(Opc, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) {
5713 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt,
5714 MachineMemOperand *mmo)
5715 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) {
5716 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5717 MMO->isNonTemporal(), MMO->isInvariant());
5718 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5719 assert(isNonTemporal() == MMO->isNonTemporal() &&
5720 "Non-temporal encoding error!");
5721 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5724 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs,
5725 const SDValue *Ops, unsigned NumOps, EVT memvt,
5726 MachineMemOperand *mmo)
5727 : SDNode(Opc, dl, VTs, Ops, NumOps),
5728 MemoryVT(memvt), MMO(mmo) {
5729 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5730 MMO->isNonTemporal(), MMO->isInvariant());
5731 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5732 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5735 /// Profile - Gather unique data for the node.
5737 void SDNode::Profile(FoldingSetNodeID &ID) const {
5738 AddNodeIDNode(ID, this);
5743 std::vector<EVT> VTs;
5746 VTs.reserve(MVT::LAST_VALUETYPE);
5747 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i)
5748 VTs.push_back(MVT((MVT::SimpleValueType)i));
5753 static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs;
5754 static ManagedStatic<EVTArray> SimpleVTArray;
5755 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
5757 /// getValueTypeList - Return a pointer to the specified value type.
5759 const EVT *SDNode::getValueTypeList(EVT VT) {
5760 if (VT.isExtended()) {
5761 sys::SmartScopedLock<true> Lock(*VTMutex);
5762 return &(*EVTs->insert(VT).first);
5764 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE &&
5765 "Value type out of range!");
5766 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy];
5770 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
5771 /// indicated value. This method ignores uses of other values defined by this
5773 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
5774 assert(Value < getNumValues() && "Bad value!");
5776 // TODO: Only iterate over uses of a given value of the node
5777 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
5778 if (UI.getUse().getResNo() == Value) {
5785 // Found exactly the right number of uses?
5790 /// hasAnyUseOfValue - Return true if there are any use of the indicated
5791 /// value. This method ignores uses of other values defined by this operation.
5792 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
5793 assert(Value < getNumValues() && "Bad value!");
5795 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
5796 if (UI.getUse().getResNo() == Value)
5803 /// isOnlyUserOf - Return true if this node is the only use of N.
5805 bool SDNode::isOnlyUserOf(SDNode *N) const {
5807 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
5818 /// isOperand - Return true if this node is an operand of N.
5820 bool SDValue::isOperandOf(SDNode *N) const {
5821 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5822 if (*this == N->getOperand(i))
5827 bool SDNode::isOperandOf(SDNode *N) const {
5828 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
5829 if (this == N->OperandList[i].getNode())
5834 /// reachesChainWithoutSideEffects - Return true if this operand (which must
5835 /// be a chain) reaches the specified operand without crossing any
5836 /// side-effecting instructions on any chain path. In practice, this looks
5837 /// through token factors and non-volatile loads. In order to remain efficient,
5838 /// this only looks a couple of nodes in, it does not do an exhaustive search.
5839 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
5840 unsigned Depth) const {
5841 if (*this == Dest) return true;
5843 // Don't search too deeply, we just want to be able to see through
5844 // TokenFactor's etc.
5845 if (Depth == 0) return false;
5847 // If this is a token factor, all inputs to the TF happen in parallel. If any
5848 // of the operands of the TF does not reach dest, then we cannot do the xform.
5849 if (getOpcode() == ISD::TokenFactor) {
5850 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
5851 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
5856 // Loads don't have side effects, look through them.
5857 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
5858 if (!Ld->isVolatile())
5859 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
5864 /// hasPredecessor - Return true if N is a predecessor of this node.
5865 /// N is either an operand of this node, or can be reached by recursively
5866 /// traversing up the operands.
5867 /// NOTE: This is an expensive method. Use it carefully.
5868 bool SDNode::hasPredecessor(const SDNode *N) const {
5869 SmallPtrSet<const SDNode *, 32> Visited;
5870 SmallVector<const SDNode *, 16> Worklist;
5871 return hasPredecessorHelper(N, Visited, Worklist);
5874 bool SDNode::hasPredecessorHelper(const SDNode *N,
5875 SmallPtrSet<const SDNode *, 32> &Visited,
5876 SmallVector<const SDNode *, 16> &Worklist) const {
5877 if (Visited.empty()) {
5878 Worklist.push_back(this);
5880 // Take a look in the visited set. If we've already encountered this node
5881 // we needn't search further.
5882 if (Visited.count(N))
5886 // Haven't visited N yet. Continue the search.
5887 while (!Worklist.empty()) {
5888 const SDNode *M = Worklist.pop_back_val();
5889 for (unsigned i = 0, e = M->getNumOperands(); i != e; ++i) {
5890 SDNode *Op = M->getOperand(i).getNode();
5891 if (Visited.insert(Op))
5892 Worklist.push_back(Op);
5901 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
5902 assert(Num < NumOperands && "Invalid child # of SDNode!");
5903 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
5906 std::string SDNode::getOperationName(const SelectionDAG *G) const {
5907 switch (getOpcode()) {
5909 if (getOpcode() < ISD::BUILTIN_OP_END)
5910 return "<<Unknown DAG Node>>";
5911 if (isMachineOpcode()) {
5913 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo())
5914 if (getMachineOpcode() < TII->getNumOpcodes())
5915 return TII->get(getMachineOpcode()).getName();
5916 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>";
5919 const TargetLowering &TLI = G->getTargetLoweringInfo();
5920 const char *Name = TLI.getTargetNodeName(getOpcode());
5921 if (Name) return Name;
5922 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>";
5924 return "<<Unknown Node #" + utostr(getOpcode()) + ">>";
5927 case ISD::DELETED_NODE:
5928 return "<<Deleted Node!>>";
5930 case ISD::PREFETCH: return "Prefetch";
5931 case ISD::MEMBARRIER: return "MemBarrier";
5932 case ISD::ATOMIC_FENCE: return "AtomicFence";
5933 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
5934 case ISD::ATOMIC_SWAP: return "AtomicSwap";
5935 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
5936 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
5937 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
5938 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
5939 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
5940 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
5941 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
5942 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
5943 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
5944 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
5945 case ISD::ATOMIC_LOAD: return "AtomicLoad";
5946 case ISD::ATOMIC_STORE: return "AtomicStore";
5947 case ISD::PCMARKER: return "PCMarker";
5948 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
5949 case ISD::SRCVALUE: return "SrcValue";
5950 case ISD::MDNODE_SDNODE: return "MDNode";
5951 case ISD::EntryToken: return "EntryToken";
5952 case ISD::TokenFactor: return "TokenFactor";
5953 case ISD::AssertSext: return "AssertSext";
5954 case ISD::AssertZext: return "AssertZext";
5956 case ISD::BasicBlock: return "BasicBlock";
5957 case ISD::VALUETYPE: return "ValueType";
5958 case ISD::Register: return "Register";
5959 case ISD::RegisterMask: return "RegisterMask";
5960 case ISD::Constant: return "Constant";
5961 case ISD::ConstantFP: return "ConstantFP";
5962 case ISD::GlobalAddress: return "GlobalAddress";
5963 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
5964 case ISD::FrameIndex: return "FrameIndex";
5965 case ISD::JumpTable: return "JumpTable";
5966 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
5967 case ISD::RETURNADDR: return "RETURNADDR";
5968 case ISD::FRAMEADDR: return "FRAMEADDR";
5969 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
5970 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR";
5971 case ISD::LSDAADDR: return "LSDAADDR";
5972 case ISD::EHSELECTION: return "EHSELECTION";
5973 case ISD::EH_RETURN: return "EH_RETURN";
5974 case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP";
5975 case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP";
5976 case ISD::ConstantPool: return "ConstantPool";
5977 case ISD::ExternalSymbol: return "ExternalSymbol";
5978 case ISD::BlockAddress: return "BlockAddress";
5979 case ISD::INTRINSIC_WO_CHAIN:
5980 case ISD::INTRINSIC_VOID:
5981 case ISD::INTRINSIC_W_CHAIN: {
5982 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1;
5983 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue();
5984 if (IID < Intrinsic::num_intrinsics)
5985 return Intrinsic::getName((Intrinsic::ID)IID);
5986 else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo())
5987 return TII->getName(IID);
5988 llvm_unreachable("Invalid intrinsic ID");
5991 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
5992 case ISD::TargetConstant: return "TargetConstant";
5993 case ISD::TargetConstantFP:return "TargetConstantFP";
5994 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
5995 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
5996 case ISD::TargetFrameIndex: return "TargetFrameIndex";
5997 case ISD::TargetJumpTable: return "TargetJumpTable";
5998 case ISD::TargetConstantPool: return "TargetConstantPool";
5999 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
6000 case ISD::TargetBlockAddress: return "TargetBlockAddress";
6002 case ISD::CopyToReg: return "CopyToReg";
6003 case ISD::CopyFromReg: return "CopyFromReg";
6004 case ISD::UNDEF: return "undef";
6005 case ISD::MERGE_VALUES: return "merge_values";
6006 case ISD::INLINEASM: return "inlineasm";
6007 case ISD::EH_LABEL: return "eh_label";
6008 case ISD::HANDLENODE: return "handlenode";
6011 case ISD::FABS: return "fabs";
6012 case ISD::FNEG: return "fneg";
6013 case ISD::FSQRT: return "fsqrt";
6014 case ISD::FSIN: return "fsin";
6015 case ISD::FCOS: return "fcos";
6016 case ISD::FTRUNC: return "ftrunc";
6017 case ISD::FFLOOR: return "ffloor";
6018 case ISD::FCEIL: return "fceil";
6019 case ISD::FRINT: return "frint";
6020 case ISD::FNEARBYINT: return "fnearbyint";
6021 case ISD::FEXP: return "fexp";
6022 case ISD::FEXP2: return "fexp2";
6023 case ISD::FLOG: return "flog";
6024 case ISD::FLOG2: return "flog2";
6025 case ISD::FLOG10: return "flog10";
6028 case ISD::ADD: return "add";
6029 case ISD::SUB: return "sub";
6030 case ISD::MUL: return "mul";
6031 case ISD::MULHU: return "mulhu";
6032 case ISD::MULHS: return "mulhs";
6033 case ISD::SDIV: return "sdiv";
6034 case ISD::UDIV: return "udiv";
6035 case ISD::SREM: return "srem";
6036 case ISD::UREM: return "urem";
6037 case ISD::SMUL_LOHI: return "smul_lohi";
6038 case ISD::UMUL_LOHI: return "umul_lohi";
6039 case ISD::SDIVREM: return "sdivrem";
6040 case ISD::UDIVREM: return "udivrem";
6041 case ISD::AND: return "and";
6042 case ISD::OR: return "or";
6043 case ISD::XOR: return "xor";
6044 case ISD::SHL: return "shl";
6045 case ISD::SRA: return "sra";
6046 case ISD::SRL: return "srl";
6047 case ISD::ROTL: return "rotl";
6048 case ISD::ROTR: return "rotr";
6049 case ISD::FADD: return "fadd";
6050 case ISD::FSUB: return "fsub";
6051 case ISD::FMUL: return "fmul";
6052 case ISD::FDIV: return "fdiv";
6053 case ISD::FMA: return "fma";
6054 case ISD::FREM: return "frem";
6055 case ISD::FCOPYSIGN: return "fcopysign";
6056 case ISD::FGETSIGN: return "fgetsign";
6057 case ISD::FPOW: return "fpow";
6059 case ISD::FPOWI: return "fpowi";
6060 case ISD::SETCC: return "setcc";
6061 case ISD::SELECT: return "select";
6062 case ISD::VSELECT: return "vselect";
6063 case ISD::SELECT_CC: return "select_cc";
6064 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
6065 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
6066 case ISD::CONCAT_VECTORS: return "concat_vectors";
6067 case ISD::INSERT_SUBVECTOR: return "insert_subvector";
6068 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
6069 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
6070 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
6071 case ISD::CARRY_FALSE: return "carry_false";
6072 case ISD::ADDC: return "addc";
6073 case ISD::ADDE: return "adde";
6074 case ISD::SADDO: return "saddo";
6075 case ISD::UADDO: return "uaddo";
6076 case ISD::SSUBO: return "ssubo";
6077 case ISD::USUBO: return "usubo";
6078 case ISD::SMULO: return "smulo";
6079 case ISD::UMULO: return "umulo";
6080 case ISD::SUBC: return "subc";
6081 case ISD::SUBE: return "sube";
6082 case ISD::SHL_PARTS: return "shl_parts";
6083 case ISD::SRA_PARTS: return "sra_parts";
6084 case ISD::SRL_PARTS: return "srl_parts";
6086 // Conversion operators.
6087 case ISD::SIGN_EXTEND: return "sign_extend";
6088 case ISD::ZERO_EXTEND: return "zero_extend";
6089 case ISD::ANY_EXTEND: return "any_extend";
6090 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
6091 case ISD::TRUNCATE: return "truncate";
6092 case ISD::FP_ROUND: return "fp_round";
6093 case ISD::FLT_ROUNDS_: return "flt_rounds";
6094 case ISD::FP_ROUND_INREG: return "fp_round_inreg";
6095 case ISD::FP_EXTEND: return "fp_extend";
6097 case ISD::SINT_TO_FP: return "sint_to_fp";
6098 case ISD::UINT_TO_FP: return "uint_to_fp";
6099 case ISD::FP_TO_SINT: return "fp_to_sint";
6100 case ISD::FP_TO_UINT: return "fp_to_uint";
6101 case ISD::BITCAST: return "bitcast";
6102 case ISD::FP16_TO_FP32: return "fp16_to_fp32";
6103 case ISD::FP32_TO_FP16: return "fp32_to_fp16";
6105 case ISD::CONVERT_RNDSAT: {
6106 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) {
6107 default: llvm_unreachable("Unknown cvt code!");
6108 case ISD::CVT_FF: return "cvt_ff";
6109 case ISD::CVT_FS: return "cvt_fs";
6110 case ISD::CVT_FU: return "cvt_fu";
6111 case ISD::CVT_SF: return "cvt_sf";
6112 case ISD::CVT_UF: return "cvt_uf";
6113 case ISD::CVT_SS: return "cvt_ss";
6114 case ISD::CVT_SU: return "cvt_su";
6115 case ISD::CVT_US: return "cvt_us";
6116 case ISD::CVT_UU: return "cvt_uu";
6120 // Control flow instructions
6121 case ISD::BR: return "br";
6122 case ISD::BRIND: return "brind";
6123 case ISD::BR_JT: return "br_jt";
6124 case ISD::BRCOND: return "brcond";
6125 case ISD::BR_CC: return "br_cc";
6126 case ISD::CALLSEQ_START: return "callseq_start";
6127 case ISD::CALLSEQ_END: return "callseq_end";
6130 case ISD::LOAD: return "load";
6131 case ISD::STORE: return "store";
6132 case ISD::VAARG: return "vaarg";
6133 case ISD::VACOPY: return "vacopy";
6134 case ISD::VAEND: return "vaend";
6135 case ISD::VASTART: return "vastart";
6136 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
6137 case ISD::EXTRACT_ELEMENT: return "extract_element";
6138 case ISD::BUILD_PAIR: return "build_pair";
6139 case ISD::STACKSAVE: return "stacksave";
6140 case ISD::STACKRESTORE: return "stackrestore";
6141 case ISD::TRAP: return "trap";
6144 case ISD::BSWAP: return "bswap";
6145 case ISD::CTPOP: return "ctpop";
6146 case ISD::CTTZ: return "cttz";
6147 case ISD::CTTZ_ZERO_UNDEF: return "cttz_zero_undef";
6148 case ISD::CTLZ: return "ctlz";
6149 case ISD::CTLZ_ZERO_UNDEF: return "ctlz_zero_undef";
6152 case ISD::INIT_TRAMPOLINE: return "init_trampoline";
6153 case ISD::ADJUST_TRAMPOLINE: return "adjust_trampoline";
6156 switch (cast<CondCodeSDNode>(this)->get()) {
6157 default: llvm_unreachable("Unknown setcc condition!");
6158 case ISD::SETOEQ: return "setoeq";
6159 case ISD::SETOGT: return "setogt";
6160 case ISD::SETOGE: return "setoge";
6161 case ISD::SETOLT: return "setolt";
6162 case ISD::SETOLE: return "setole";
6163 case ISD::SETONE: return "setone";
6165 case ISD::SETO: return "seto";
6166 case ISD::SETUO: return "setuo";
6167 case ISD::SETUEQ: return "setue";
6168 case ISD::SETUGT: return "setugt";
6169 case ISD::SETUGE: return "setuge";
6170 case ISD::SETULT: return "setult";
6171 case ISD::SETULE: return "setule";
6172 case ISD::SETUNE: return "setune";
6174 case ISD::SETEQ: return "seteq";
6175 case ISD::SETGT: return "setgt";
6176 case ISD::SETGE: return "setge";
6177 case ISD::SETLT: return "setlt";
6178 case ISD::SETLE: return "setle";
6179 case ISD::SETNE: return "setne";
6181 case ISD::SETTRUE: return "settrue";
6182 case ISD::SETTRUE2: return "settrue2";
6183 case ISD::SETFALSE: return "setfalse";
6184 case ISD::SETFALSE2: return "setfalse2";
6189 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
6198 return "<post-inc>";
6200 return "<post-dec>";
6204 std::string ISD::ArgFlagsTy::getArgFlagsString() {
6205 std::string S = "< ";
6219 if (getByValAlign())
6220 S += "byval-align:" + utostr(getByValAlign()) + " ";
6222 S += "orig-align:" + utostr(getOrigAlign()) + " ";
6224 S += "byval-size:" + utostr(getByValSize()) + " ";
6228 void SDNode::dump() const { dump(0); }
6229 void SDNode::dump(const SelectionDAG *G) const {
6234 void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const {
6235 OS << (void*)this << ": ";
6237 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
6239 if (getValueType(i) == MVT::Other)
6242 OS << getValueType(i).getEVTString();
6244 OS << " = " << getOperationName(G);
6247 void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const {
6248 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) {
6249 if (!MN->memoperands_empty()) {
6252 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(),
6253 e = MN->memoperands_end(); i != e; ++i) {
6255 if (llvm::next(i) != e)
6260 } else if (const ShuffleVectorSDNode *SVN =
6261 dyn_cast<ShuffleVectorSDNode>(this)) {
6263 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
6264 int Idx = SVN->getMaskElt(i);
6272 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
6273 OS << '<' << CSDN->getAPIntValue() << '>';
6274 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
6275 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle)
6276 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
6277 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble)
6278 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
6281 CSDN->getValueAPF().bitcastToAPInt().dump();
6284 } else if (const GlobalAddressSDNode *GADN =
6285 dyn_cast<GlobalAddressSDNode>(this)) {
6286 int64_t offset = GADN->getOffset();
6288 WriteAsOperand(OS, GADN->getGlobal());
6291 OS << " + " << offset;
6293 OS << " " << offset;
6294 if (unsigned int TF = GADN->getTargetFlags())
6295 OS << " [TF=" << TF << ']';
6296 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
6297 OS << "<" << FIDN->getIndex() << ">";
6298 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
6299 OS << "<" << JTDN->getIndex() << ">";
6300 if (unsigned int TF = JTDN->getTargetFlags())
6301 OS << " [TF=" << TF << ']';
6302 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
6303 int offset = CP->getOffset();
6304 if (CP->isMachineConstantPoolEntry())
6305 OS << "<" << *CP->getMachineCPVal() << ">";
6307 OS << "<" << *CP->getConstVal() << ">";
6309 OS << " + " << offset;
6311 OS << " " << offset;
6312 if (unsigned int TF = CP->getTargetFlags())
6313 OS << " [TF=" << TF << ']';
6314 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
6316 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
6318 OS << LBB->getName() << " ";
6319 OS << (const void*)BBDN->getBasicBlock() << ">";
6320 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
6321 OS << ' ' << PrintReg(R->getReg(), G ? G->getTarget().getRegisterInfo() :0);
6322 } else if (const ExternalSymbolSDNode *ES =
6323 dyn_cast<ExternalSymbolSDNode>(this)) {
6324 OS << "'" << ES->getSymbol() << "'";
6325 if (unsigned int TF = ES->getTargetFlags())
6326 OS << " [TF=" << TF << ']';
6327 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
6329 OS << "<" << M->getValue() << ">";
6332 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) {
6334 OS << "<" << MD->getMD() << ">";
6337 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
6338 OS << ":" << N->getVT().getEVTString();
6340 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
6341 OS << "<" << *LD->getMemOperand();
6344 switch (LD->getExtensionType()) {
6345 default: doExt = false; break;
6346 case ISD::EXTLOAD: OS << ", anyext"; break;
6347 case ISD::SEXTLOAD: OS << ", sext"; break;
6348 case ISD::ZEXTLOAD: OS << ", zext"; break;
6351 OS << " from " << LD->getMemoryVT().getEVTString();
6353 const char *AM = getIndexedModeName(LD->getAddressingMode());
6358 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
6359 OS << "<" << *ST->getMemOperand();
6361 if (ST->isTruncatingStore())
6362 OS << ", trunc to " << ST->getMemoryVT().getEVTString();
6364 const char *AM = getIndexedModeName(ST->getAddressingMode());
6369 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) {
6370 OS << "<" << *M->getMemOperand() << ">";
6371 } else if (const BlockAddressSDNode *BA =
6372 dyn_cast<BlockAddressSDNode>(this)) {
6374 WriteAsOperand(OS, BA->getBlockAddress()->getFunction(), false);
6376 WriteAsOperand(OS, BA->getBlockAddress()->getBasicBlock(), false);
6378 if (unsigned int TF = BA->getTargetFlags())
6379 OS << " [TF=" << TF << ']';
6383 if (unsigned Order = G->GetOrdering(this))
6384 OS << " [ORD=" << Order << ']';
6386 if (getNodeId() != -1)
6387 OS << " [ID=" << getNodeId() << ']';
6389 DebugLoc dl = getDebugLoc();
6390 if (G && !dl.isUnknown()) {
6392 Scope(dl.getScope(G->getMachineFunction().getFunction()->getContext()));
6394 // Omit the directory, since it's usually long and uninteresting.
6396 OS << Scope.getFilename();
6399 OS << ':' << dl.getLine();
6400 if (dl.getCol() != 0)
6401 OS << ':' << dl.getCol();
6405 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
6407 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
6408 if (i) OS << ", "; else OS << " ";
6409 OS << (void*)getOperand(i).getNode();
6410 if (unsigned RN = getOperand(i).getResNo())
6413 print_details(OS, G);
6416 static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N,
6417 const SelectionDAG *G, unsigned depth,
6429 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6430 // Don't follow chain operands.
6431 if (N->getOperand(i).getValueType() == MVT::Other)
6434 printrWithDepthHelper(OS, N->getOperand(i).getNode(), G, depth-1, indent+2);
6438 void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G,
6439 unsigned depth) const {
6440 printrWithDepthHelper(OS, this, G, depth, 0);
6443 void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const {
6444 // Don't print impossibly deep things.
6445 printrWithDepth(OS, G, 10);
6448 void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const {
6449 printrWithDepth(dbgs(), G, depth);
6452 void SDNode::dumprFull(const SelectionDAG *G) const {
6453 // Don't print impossibly deep things.
6454 dumprWithDepth(G, 10);
6457 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
6458 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6459 if (N->getOperand(i).getNode()->hasOneUse())
6460 DumpNodes(N->getOperand(i).getNode(), indent+2, G);
6462 dbgs() << "\n" << std::string(indent+2, ' ')
6463 << (void*)N->getOperand(i).getNode() << ": <multiple use>";
6467 dbgs().indent(indent);
6471 SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
6472 assert(N->getNumValues() == 1 &&
6473 "Can't unroll a vector with multiple results!");
6475 EVT VT = N->getValueType(0);
6476 unsigned NE = VT.getVectorNumElements();
6477 EVT EltVT = VT.getVectorElementType();
6478 DebugLoc dl = N->getDebugLoc();
6480 SmallVector<SDValue, 8> Scalars;
6481 SmallVector<SDValue, 4> Operands(N->getNumOperands());
6483 // If ResNE is 0, fully unroll the vector op.
6486 else if (NE > ResNE)
6490 for (i= 0; i != NE; ++i) {
6491 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) {
6492 SDValue Operand = N->getOperand(j);
6493 EVT OperandVT = Operand.getValueType();
6494 if (OperandVT.isVector()) {
6495 // A vector operand; extract a single element.
6496 EVT OperandEltVT = OperandVT.getVectorElementType();
6497 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl,
6500 getConstant(i, TLI.getPointerTy()));
6502 // A scalar operand; just use it as is.
6503 Operands[j] = Operand;
6507 switch (N->getOpcode()) {
6509 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6510 &Operands[0], Operands.size()));
6513 Scalars.push_back(getNode(ISD::SELECT, dl, EltVT,
6514 &Operands[0], Operands.size()));
6521 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0],
6522 getShiftAmountOperand(Operands[0].getValueType(),
6525 case ISD::SIGN_EXTEND_INREG:
6526 case ISD::FP_ROUND_INREG: {
6527 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType();
6528 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6530 getValueType(ExtVT)));
6535 for (; i < ResNE; ++i)
6536 Scalars.push_back(getUNDEF(EltVT));
6538 return getNode(ISD::BUILD_VECTOR, dl,
6539 EVT::getVectorVT(*getContext(), EltVT, ResNE),
6540 &Scalars[0], Scalars.size());
6544 /// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a
6545 /// location that is 'Dist' units away from the location that the 'Base' load
6546 /// is loading from.
6547 bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base,
6548 unsigned Bytes, int Dist) const {
6549 if (LD->getChain() != Base->getChain())
6551 EVT VT = LD->getValueType(0);
6552 if (VT.getSizeInBits() / 8 != Bytes)
6555 SDValue Loc = LD->getOperand(1);
6556 SDValue BaseLoc = Base->getOperand(1);
6557 if (Loc.getOpcode() == ISD::FrameIndex) {
6558 if (BaseLoc.getOpcode() != ISD::FrameIndex)
6560 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo();
6561 int FI = cast<FrameIndexSDNode>(Loc)->getIndex();
6562 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex();
6563 int FS = MFI->getObjectSize(FI);
6564 int BFS = MFI->getObjectSize(BFI);
6565 if (FS != BFS || FS != (int)Bytes) return false;
6566 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes);
6570 if (isBaseWithConstantOffset(Loc) && Loc.getOperand(0) == BaseLoc &&
6571 cast<ConstantSDNode>(Loc.getOperand(1))->getSExtValue() == Dist*Bytes)
6574 const GlobalValue *GV1 = NULL;
6575 const GlobalValue *GV2 = NULL;
6576 int64_t Offset1 = 0;
6577 int64_t Offset2 = 0;
6578 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1);
6579 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2);
6580 if (isGA1 && isGA2 && GV1 == GV2)
6581 return Offset1 == (Offset2 + Dist*Bytes);
6586 /// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if
6587 /// it cannot be inferred.
6588 unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const {
6589 // If this is a GlobalAddress + cst, return the alignment.
6590 const GlobalValue *GV;
6591 int64_t GVOffset = 0;
6592 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) {
6593 unsigned PtrWidth = TLI.getPointerTy().getSizeInBits();
6594 APInt AllOnes = APInt::getAllOnesValue(PtrWidth);
6595 APInt KnownZero(PtrWidth, 0), KnownOne(PtrWidth, 0);
6596 llvm::ComputeMaskedBits(const_cast<GlobalValue*>(GV), AllOnes,
6597 KnownZero, KnownOne, TLI.getTargetData());
6598 unsigned AlignBits = KnownZero.countTrailingOnes();
6599 unsigned Align = AlignBits ? 1 << std::min(31U, AlignBits) : 0;
6601 return MinAlign(Align, GVOffset);
6604 // If this is a direct reference to a stack slot, use information about the
6605 // stack slot's alignment.
6606 int FrameIdx = 1 << 31;
6607 int64_t FrameOffset = 0;
6608 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) {
6609 FrameIdx = FI->getIndex();
6610 } else if (isBaseWithConstantOffset(Ptr) &&
6611 isa<FrameIndexSDNode>(Ptr.getOperand(0))) {
6613 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
6614 FrameOffset = Ptr.getConstantOperandVal(1);
6617 if (FrameIdx != (1 << 31)) {
6618 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo();
6619 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx),
6627 void SelectionDAG::dump() const {
6628 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:";
6630 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end();
6632 const SDNode *N = I;
6633 if (!N->hasOneUse() && N != getRoot().getNode())
6634 DumpNodes(N, 2, this);
6637 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
6642 void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
6644 print_details(OS, G);
6647 typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet;
6648 static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
6649 const SelectionDAG *G, VisitedSDNodeSet &once) {
6650 if (!once.insert(N)) // If we've been here before, return now.
6653 // Dump the current SDNode, but don't end the line yet.
6657 // Having printed this SDNode, walk the children:
6658 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6659 const SDNode *child = N->getOperand(i).getNode();
6664 if (child->getNumOperands() == 0) {
6665 // This child has no grandchildren; print it inline right here.
6666 child->printr(OS, G);
6668 } else { // Just the address. FIXME: also print the child's opcode.
6670 if (unsigned RN = N->getOperand(i).getResNo())
6677 // Dump children that have grandchildren on their own line(s).
6678 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6679 const SDNode *child = N->getOperand(i).getNode();
6680 DumpNodesr(OS, child, indent+2, G, once);
6684 void SDNode::dumpr() const {
6685 VisitedSDNodeSet once;
6686 DumpNodesr(dbgs(), this, 0, 0, once);
6689 void SDNode::dumpr(const SelectionDAG *G) const {
6690 VisitedSDNodeSet once;
6691 DumpNodesr(dbgs(), this, 0, G, once);
6695 // getAddressSpace - Return the address space this GlobalAddress belongs to.
6696 unsigned GlobalAddressSDNode::getAddressSpace() const {
6697 return getGlobal()->getType()->getAddressSpace();
6701 Type *ConstantPoolSDNode::getType() const {
6702 if (isMachineConstantPoolEntry())
6703 return Val.MachineCPVal->getType();
6704 return Val.ConstVal->getType();
6707 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
6709 unsigned &SplatBitSize,
6711 unsigned MinSplatBits,
6713 EVT VT = getValueType(0);
6714 assert(VT.isVector() && "Expected a vector type");
6715 unsigned sz = VT.getSizeInBits();
6716 if (MinSplatBits > sz)
6719 SplatValue = APInt(sz, 0);
6720 SplatUndef = APInt(sz, 0);
6722 // Get the bits. Bits with undefined values (when the corresponding element
6723 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
6724 // in SplatValue. If any of the values are not constant, give up and return
6726 unsigned int nOps = getNumOperands();
6727 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
6728 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
6730 for (unsigned j = 0; j < nOps; ++j) {
6731 unsigned i = isBigEndian ? nOps-1-j : j;
6732 SDValue OpVal = getOperand(i);
6733 unsigned BitPos = j * EltBitSize;
6735 if (OpVal.getOpcode() == ISD::UNDEF)
6736 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize);
6737 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
6738 SplatValue |= CN->getAPIntValue().zextOrTrunc(EltBitSize).
6739 zextOrTrunc(sz) << BitPos;
6740 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
6741 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
6746 // The build_vector is all constants or undefs. Find the smallest element
6747 // size that splats the vector.
6749 HasAnyUndefs = (SplatUndef != 0);
6752 unsigned HalfSize = sz / 2;
6753 APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize);
6754 APInt LowValue = SplatValue.trunc(HalfSize);
6755 APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize);
6756 APInt LowUndef = SplatUndef.trunc(HalfSize);
6758 // If the two halves do not match (ignoring undef bits), stop here.
6759 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
6760 MinSplatBits > HalfSize)
6763 SplatValue = HighValue | LowValue;
6764 SplatUndef = HighUndef & LowUndef;
6773 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
6774 // Find the first non-undef value in the shuffle mask.
6776 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
6779 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
6781 // Make sure all remaining elements are either undef or the same as the first
6783 for (int Idx = Mask[i]; i != e; ++i)
6784 if (Mask[i] >= 0 && Mask[i] != Idx)
6790 static void checkForCyclesHelper(const SDNode *N,
6791 SmallPtrSet<const SDNode*, 32> &Visited,
6792 SmallPtrSet<const SDNode*, 32> &Checked) {
6793 // If this node has already been checked, don't check it again.
6794 if (Checked.count(N))
6797 // If a node has already been visited on this depth-first walk, reject it as
6799 if (!Visited.insert(N)) {
6800 dbgs() << "Offending node:\n";
6802 errs() << "Detected cycle in SelectionDAG\n";
6806 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6807 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked);
6814 void llvm::checkForCycles(const llvm::SDNode *N) {
6816 assert(N && "Checking nonexistant SDNode");
6817 SmallPtrSet<const SDNode*, 32> visited;
6818 SmallPtrSet<const SDNode*, 32> checked;
6819 checkForCyclesHelper(N, visited, checked);
6823 void llvm::checkForCycles(const llvm::SelectionDAG *DAG) {
6824 checkForCycles(DAG->getRoot().getNode());