1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "SDNodeOrdering.h"
16 #include "SDNodeDbgValue.h"
17 #include "llvm/Constants.h"
18 #include "llvm/Analysis/DebugInfo.h"
19 #include "llvm/Analysis/ValueTracking.h"
20 #include "llvm/Function.h"
21 #include "llvm/GlobalAlias.h"
22 #include "llvm/GlobalVariable.h"
23 #include "llvm/Intrinsics.h"
24 #include "llvm/DerivedTypes.h"
25 #include "llvm/Assembly/Writer.h"
26 #include "llvm/CallingConv.h"
27 #include "llvm/CodeGen/MachineBasicBlock.h"
28 #include "llvm/CodeGen/MachineConstantPool.h"
29 #include "llvm/CodeGen/MachineFrameInfo.h"
30 #include "llvm/CodeGen/MachineModuleInfo.h"
31 #include "llvm/CodeGen/PseudoSourceValue.h"
32 #include "llvm/Target/TargetRegisterInfo.h"
33 #include "llvm/Target/TargetData.h"
34 #include "llvm/Target/TargetFrameInfo.h"
35 #include "llvm/Target/TargetLowering.h"
36 #include "llvm/Target/TargetSelectionDAGInfo.h"
37 #include "llvm/Target/TargetOptions.h"
38 #include "llvm/Target/TargetInstrInfo.h"
39 #include "llvm/Target/TargetIntrinsicInfo.h"
40 #include "llvm/Target/TargetMachine.h"
41 #include "llvm/Support/CommandLine.h"
42 #include "llvm/Support/Debug.h"
43 #include "llvm/Support/ErrorHandling.h"
44 #include "llvm/Support/ManagedStatic.h"
45 #include "llvm/Support/MathExtras.h"
46 #include "llvm/Support/raw_ostream.h"
47 #include "llvm/System/Mutex.h"
48 #include "llvm/ADT/SetVector.h"
49 #include "llvm/ADT/SmallPtrSet.h"
50 #include "llvm/ADT/SmallSet.h"
51 #include "llvm/ADT/SmallVector.h"
52 #include "llvm/ADT/StringExtras.h"
57 /// makeVTList - Return an instance of the SDVTList struct initialized with the
58 /// specified members.
59 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
60 SDVTList Res = {VTs, NumVTs};
64 static const fltSemantics *EVTToAPFloatSemantics(EVT VT) {
65 switch (VT.getSimpleVT().SimpleTy) {
66 default: llvm_unreachable("Unknown FP format");
67 case MVT::f32: return &APFloat::IEEEsingle;
68 case MVT::f64: return &APFloat::IEEEdouble;
69 case MVT::f80: return &APFloat::x87DoubleExtended;
70 case MVT::f128: return &APFloat::IEEEquad;
71 case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
75 SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {}
77 //===----------------------------------------------------------------------===//
78 // ConstantFPSDNode Class
79 //===----------------------------------------------------------------------===//
81 /// isExactlyValue - We don't rely on operator== working on double values, as
82 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
83 /// As such, this method can be used to do an exact bit-for-bit comparison of
84 /// two floating point values.
85 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
86 return getValueAPF().bitwiseIsEqual(V);
89 bool ConstantFPSDNode::isValueValidForType(EVT VT,
91 assert(VT.isFloatingPoint() && "Can only convert between FP types");
93 // PPC long double cannot be converted to any other type.
94 if (VT == MVT::ppcf128 ||
95 &Val.getSemantics() == &APFloat::PPCDoubleDouble)
98 // convert modifies in place, so make a copy.
99 APFloat Val2 = APFloat(Val);
101 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
106 //===----------------------------------------------------------------------===//
108 //===----------------------------------------------------------------------===//
110 /// isBuildVectorAllOnes - Return true if the specified node is a
111 /// BUILD_VECTOR where all of the elements are ~0 or undef.
112 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
113 // Look through a bit convert.
114 if (N->getOpcode() == ISD::BIT_CONVERT)
115 N = N->getOperand(0).getNode();
117 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
119 unsigned i = 0, e = N->getNumOperands();
121 // Skip over all of the undef values.
122 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
125 // Do not accept an all-undef vector.
126 if (i == e) return false;
128 // Do not accept build_vectors that aren't all constants or which have non-~0
130 SDValue NotZero = N->getOperand(i);
131 if (isa<ConstantSDNode>(NotZero)) {
132 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue())
134 } else if (isa<ConstantFPSDNode>(NotZero)) {
135 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF().
136 bitcastToAPInt().isAllOnesValue())
141 // Okay, we have at least one ~0 value, check to see if the rest match or are
143 for (++i; i != e; ++i)
144 if (N->getOperand(i) != NotZero &&
145 N->getOperand(i).getOpcode() != ISD::UNDEF)
151 /// isBuildVectorAllZeros - Return true if the specified node is a
152 /// BUILD_VECTOR where all of the elements are 0 or undef.
153 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
154 // Look through a bit convert.
155 if (N->getOpcode() == ISD::BIT_CONVERT)
156 N = N->getOperand(0).getNode();
158 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
160 unsigned i = 0, e = N->getNumOperands();
162 // Skip over all of the undef values.
163 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
166 // Do not accept an all-undef vector.
167 if (i == e) return false;
169 // Do not accept build_vectors that aren't all constants or which have non-0
171 SDValue Zero = N->getOperand(i);
172 if (isa<ConstantSDNode>(Zero)) {
173 if (!cast<ConstantSDNode>(Zero)->isNullValue())
175 } else if (isa<ConstantFPSDNode>(Zero)) {
176 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero())
181 // Okay, we have at least one 0 value, check to see if the rest match or are
183 for (++i; i != e; ++i)
184 if (N->getOperand(i) != Zero &&
185 N->getOperand(i).getOpcode() != ISD::UNDEF)
190 /// isScalarToVector - Return true if the specified node is a
191 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
192 /// element is not an undef.
193 bool ISD::isScalarToVector(const SDNode *N) {
194 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
197 if (N->getOpcode() != ISD::BUILD_VECTOR)
199 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
201 unsigned NumElems = N->getNumOperands();
202 for (unsigned i = 1; i < NumElems; ++i) {
203 SDValue V = N->getOperand(i);
204 if (V.getOpcode() != ISD::UNDEF)
210 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
211 /// when given the operation for (X op Y).
212 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
213 // To perform this operation, we just need to swap the L and G bits of the
215 unsigned OldL = (Operation >> 2) & 1;
216 unsigned OldG = (Operation >> 1) & 1;
217 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
218 (OldL << 1) | // New G bit
219 (OldG << 2)); // New L bit.
222 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
223 /// 'op' is a valid SetCC operation.
224 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
225 unsigned Operation = Op;
227 Operation ^= 7; // Flip L, G, E bits, but not U.
229 Operation ^= 15; // Flip all of the condition bits.
231 if (Operation > ISD::SETTRUE2)
232 Operation &= ~8; // Don't let N and U bits get set.
234 return ISD::CondCode(Operation);
238 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
239 /// signed operation and 2 if the result is an unsigned comparison. Return zero
240 /// if the operation does not depend on the sign of the input (setne and seteq).
241 static int isSignedOp(ISD::CondCode Opcode) {
243 default: llvm_unreachable("Illegal integer setcc operation!");
245 case ISD::SETNE: return 0;
249 case ISD::SETGE: return 1;
253 case ISD::SETUGE: return 2;
257 /// getSetCCOrOperation - Return the result of a logical OR between different
258 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
259 /// returns SETCC_INVALID if it is not possible to represent the resultant
261 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
263 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
264 // Cannot fold a signed integer setcc with an unsigned integer setcc.
265 return ISD::SETCC_INVALID;
267 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
269 // If the N and U bits get set then the resultant comparison DOES suddenly
270 // care about orderedness, and is true when ordered.
271 if (Op > ISD::SETTRUE2)
272 Op &= ~16; // Clear the U bit if the N bit is set.
274 // Canonicalize illegal integer setcc's.
275 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
278 return ISD::CondCode(Op);
281 /// getSetCCAndOperation - Return the result of a logical AND between different
282 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
283 /// function returns zero if it is not possible to represent the resultant
285 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
287 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
288 // Cannot fold a signed setcc with an unsigned setcc.
289 return ISD::SETCC_INVALID;
291 // Combine all of the condition bits.
292 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
294 // Canonicalize illegal integer setcc's.
298 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
299 case ISD::SETOEQ: // SETEQ & SETU[LG]E
300 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
301 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
302 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
309 //===----------------------------------------------------------------------===//
310 // SDNode Profile Support
311 //===----------------------------------------------------------------------===//
313 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
315 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
319 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
320 /// solely with their pointer.
321 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
322 ID.AddPointer(VTList.VTs);
325 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
327 static void AddNodeIDOperands(FoldingSetNodeID &ID,
328 const SDValue *Ops, unsigned NumOps) {
329 for (; NumOps; --NumOps, ++Ops) {
330 ID.AddPointer(Ops->getNode());
331 ID.AddInteger(Ops->getResNo());
335 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
337 static void AddNodeIDOperands(FoldingSetNodeID &ID,
338 const SDUse *Ops, unsigned NumOps) {
339 for (; NumOps; --NumOps, ++Ops) {
340 ID.AddPointer(Ops->getNode());
341 ID.AddInteger(Ops->getResNo());
345 static void AddNodeIDNode(FoldingSetNodeID &ID,
346 unsigned short OpC, SDVTList VTList,
347 const SDValue *OpList, unsigned N) {
348 AddNodeIDOpcode(ID, OpC);
349 AddNodeIDValueTypes(ID, VTList);
350 AddNodeIDOperands(ID, OpList, N);
353 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
355 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
356 switch (N->getOpcode()) {
357 case ISD::TargetExternalSymbol:
358 case ISD::ExternalSymbol:
359 llvm_unreachable("Should only be used on nodes with operands");
360 default: break; // Normal nodes don't need extra info.
361 case ISD::TargetConstant:
363 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
365 case ISD::TargetConstantFP:
366 case ISD::ConstantFP: {
367 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
370 case ISD::TargetGlobalAddress:
371 case ISD::GlobalAddress:
372 case ISD::TargetGlobalTLSAddress:
373 case ISD::GlobalTLSAddress: {
374 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
375 ID.AddPointer(GA->getGlobal());
376 ID.AddInteger(GA->getOffset());
377 ID.AddInteger(GA->getTargetFlags());
380 case ISD::BasicBlock:
381 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
384 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
388 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
390 case ISD::FrameIndex:
391 case ISD::TargetFrameIndex:
392 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
395 case ISD::TargetJumpTable:
396 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
397 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
399 case ISD::ConstantPool:
400 case ISD::TargetConstantPool: {
401 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
402 ID.AddInteger(CP->getAlignment());
403 ID.AddInteger(CP->getOffset());
404 if (CP->isMachineConstantPoolEntry())
405 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID);
407 ID.AddPointer(CP->getConstVal());
408 ID.AddInteger(CP->getTargetFlags());
412 const LoadSDNode *LD = cast<LoadSDNode>(N);
413 ID.AddInteger(LD->getMemoryVT().getRawBits());
414 ID.AddInteger(LD->getRawSubclassData());
418 const StoreSDNode *ST = cast<StoreSDNode>(N);
419 ID.AddInteger(ST->getMemoryVT().getRawBits());
420 ID.AddInteger(ST->getRawSubclassData());
423 case ISD::ATOMIC_CMP_SWAP:
424 case ISD::ATOMIC_SWAP:
425 case ISD::ATOMIC_LOAD_ADD:
426 case ISD::ATOMIC_LOAD_SUB:
427 case ISD::ATOMIC_LOAD_AND:
428 case ISD::ATOMIC_LOAD_OR:
429 case ISD::ATOMIC_LOAD_XOR:
430 case ISD::ATOMIC_LOAD_NAND:
431 case ISD::ATOMIC_LOAD_MIN:
432 case ISD::ATOMIC_LOAD_MAX:
433 case ISD::ATOMIC_LOAD_UMIN:
434 case ISD::ATOMIC_LOAD_UMAX: {
435 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
436 ID.AddInteger(AT->getMemoryVT().getRawBits());
437 ID.AddInteger(AT->getRawSubclassData());
440 case ISD::VECTOR_SHUFFLE: {
441 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
442 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
444 ID.AddInteger(SVN->getMaskElt(i));
447 case ISD::TargetBlockAddress:
448 case ISD::BlockAddress: {
449 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress());
450 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags());
453 } // end switch (N->getOpcode())
456 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
458 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
459 AddNodeIDOpcode(ID, N->getOpcode());
460 // Add the return value info.
461 AddNodeIDValueTypes(ID, N->getVTList());
462 // Add the operand info.
463 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
465 // Handle SDNode leafs with special info.
466 AddNodeIDCustom(ID, N);
469 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
470 /// the CSE map that carries volatility, temporalness, indexing mode, and
471 /// extension/truncation information.
473 static inline unsigned
474 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile,
475 bool isNonTemporal) {
476 assert((ConvType & 3) == ConvType &&
477 "ConvType may not require more than 2 bits!");
478 assert((AM & 7) == AM &&
479 "AM may not require more than 3 bits!");
483 (isNonTemporal << 6);
486 //===----------------------------------------------------------------------===//
487 // SelectionDAG Class
488 //===----------------------------------------------------------------------===//
490 /// doNotCSE - Return true if CSE should not be performed for this node.
491 static bool doNotCSE(SDNode *N) {
492 if (N->getValueType(0) == MVT::Flag)
493 return true; // Never CSE anything that produces a flag.
495 switch (N->getOpcode()) {
497 case ISD::HANDLENODE:
499 return true; // Never CSE these nodes.
502 // Check that remaining values produced are not flags.
503 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
504 if (N->getValueType(i) == MVT::Flag)
505 return true; // Never CSE anything that produces a flag.
510 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
512 void SelectionDAG::RemoveDeadNodes() {
513 // Create a dummy node (which is not added to allnodes), that adds a reference
514 // to the root node, preventing it from being deleted.
515 HandleSDNode Dummy(getRoot());
517 SmallVector<SDNode*, 128> DeadNodes;
519 // Add all obviously-dead nodes to the DeadNodes worklist.
520 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
522 DeadNodes.push_back(I);
524 RemoveDeadNodes(DeadNodes);
526 // If the root changed (e.g. it was a dead load, update the root).
527 setRoot(Dummy.getValue());
530 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
531 /// given list, and any nodes that become unreachable as a result.
532 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes,
533 DAGUpdateListener *UpdateListener) {
535 // Process the worklist, deleting the nodes and adding their uses to the
537 while (!DeadNodes.empty()) {
538 SDNode *N = DeadNodes.pop_back_val();
541 UpdateListener->NodeDeleted(N, 0);
543 // Take the node out of the appropriate CSE map.
544 RemoveNodeFromCSEMaps(N);
546 // Next, brutally remove the operand list. This is safe to do, as there are
547 // no cycles in the graph.
548 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
550 SDNode *Operand = Use.getNode();
553 // Now that we removed this operand, see if there are no uses of it left.
554 if (Operand->use_empty())
555 DeadNodes.push_back(Operand);
562 void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){
563 SmallVector<SDNode*, 16> DeadNodes(1, N);
564 RemoveDeadNodes(DeadNodes, UpdateListener);
567 void SelectionDAG::DeleteNode(SDNode *N) {
568 // First take this out of the appropriate CSE map.
569 RemoveNodeFromCSEMaps(N);
571 // Finally, remove uses due to operands of this node, remove from the
572 // AllNodes list, and delete the node.
573 DeleteNodeNotInCSEMaps(N);
576 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
577 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
578 assert(N->use_empty() && "Cannot delete a node that is not dead!");
580 // Drop all of the operands and decrement used node's use counts.
586 void SelectionDAG::DeallocateNode(SDNode *N) {
587 if (N->OperandsNeedDelete)
588 delete[] N->OperandList;
590 // Set the opcode to DELETED_NODE to help catch bugs when node
591 // memory is reallocated.
592 N->NodeType = ISD::DELETED_NODE;
594 NodeAllocator.Deallocate(AllNodes.remove(N));
596 // Remove the ordering of this node.
599 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them.
600 SmallVector<SDDbgValue*, 2> &DbgVals = DbgInfo->getSDDbgValues(N);
601 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i)
602 DbgVals[i]->setIsInvalidated();
605 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
606 /// correspond to it. This is useful when we're about to delete or repurpose
607 /// the node. We don't want future request for structurally identical nodes
608 /// to return N anymore.
609 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
611 switch (N->getOpcode()) {
612 case ISD::EntryToken:
613 llvm_unreachable("EntryToken should not be in CSEMaps!");
615 case ISD::HANDLENODE: return false; // noop.
617 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
618 "Cond code doesn't exist!");
619 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
620 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
622 case ISD::ExternalSymbol:
623 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
625 case ISD::TargetExternalSymbol: {
626 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
627 Erased = TargetExternalSymbols.erase(
628 std::pair<std::string,unsigned char>(ESN->getSymbol(),
629 ESN->getTargetFlags()));
632 case ISD::VALUETYPE: {
633 EVT VT = cast<VTSDNode>(N)->getVT();
634 if (VT.isExtended()) {
635 Erased = ExtendedValueTypeNodes.erase(VT);
637 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0;
638 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0;
643 // Remove it from the CSE Map.
644 Erased = CSEMap.RemoveNode(N);
648 // Verify that the node was actually in one of the CSE maps, unless it has a
649 // flag result (which cannot be CSE'd) or is one of the special cases that are
650 // not subject to CSE.
651 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag &&
652 !N->isMachineOpcode() && !doNotCSE(N)) {
655 llvm_unreachable("Node is not in map!");
661 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
662 /// maps and modified in place. Add it back to the CSE maps, unless an identical
663 /// node already exists, in which case transfer all its users to the existing
664 /// node. This transfer can potentially trigger recursive merging.
667 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N,
668 DAGUpdateListener *UpdateListener) {
669 // For node types that aren't CSE'd, just act as if no identical node
672 SDNode *Existing = CSEMap.GetOrInsertNode(N);
674 // If there was already an existing matching node, use ReplaceAllUsesWith
675 // to replace the dead one with the existing one. This can cause
676 // recursive merging of other unrelated nodes down the line.
677 ReplaceAllUsesWith(N, Existing, UpdateListener);
679 // N is now dead. Inform the listener if it exists and delete it.
681 UpdateListener->NodeDeleted(N, Existing);
682 DeleteNodeNotInCSEMaps(N);
687 // If the node doesn't already exist, we updated it. Inform a listener if
690 UpdateListener->NodeUpdated(N);
693 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
694 /// were replaced with those specified. If this node is never memoized,
695 /// return null, otherwise return a pointer to the slot it would take. If a
696 /// node already exists with these operands, the slot will be non-null.
697 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
702 SDValue Ops[] = { Op };
704 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
705 AddNodeIDCustom(ID, N);
706 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
710 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
711 /// were replaced with those specified. If this node is never memoized,
712 /// return null, otherwise return a pointer to the slot it would take. If a
713 /// node already exists with these operands, the slot will be non-null.
714 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
715 SDValue Op1, SDValue Op2,
720 SDValue Ops[] = { Op1, Op2 };
722 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
723 AddNodeIDCustom(ID, N);
724 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
729 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
730 /// were replaced with those specified. If this node is never memoized,
731 /// return null, otherwise return a pointer to the slot it would take. If a
732 /// node already exists with these operands, the slot will be non-null.
733 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
734 const SDValue *Ops,unsigned NumOps,
740 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
741 AddNodeIDCustom(ID, N);
742 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
746 /// VerifyNode - Sanity check the given node. Aborts if it is invalid.
747 void SelectionDAG::VerifyNode(SDNode *N) {
748 switch (N->getOpcode()) {
751 case ISD::BUILD_PAIR: {
752 EVT VT = N->getValueType(0);
753 assert(N->getNumValues() == 1 && "Too many results!");
754 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
755 "Wrong return type!");
756 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
757 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
758 "Mismatched operand types!");
759 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
760 "Wrong operand type!");
761 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
762 "Wrong return type size");
765 case ISD::BUILD_VECTOR: {
766 assert(N->getNumValues() == 1 && "Too many results!");
767 assert(N->getValueType(0).isVector() && "Wrong return type!");
768 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
769 "Wrong number of operands!");
770 EVT EltVT = N->getValueType(0).getVectorElementType();
771 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I)
772 assert((I->getValueType() == EltVT ||
773 (EltVT.isInteger() && I->getValueType().isInteger() &&
774 EltVT.bitsLE(I->getValueType()))) &&
775 "Wrong operand type!");
781 /// getEVTAlignment - Compute the default alignment value for the
784 unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
785 const Type *Ty = VT == MVT::iPTR ?
786 PointerType::get(Type::getInt8Ty(*getContext()), 0) :
787 VT.getTypeForEVT(*getContext());
789 return TLI.getTargetData()->getABITypeAlignment(Ty);
792 // EntryNode could meaningfully have debug info if we can find it...
793 SelectionDAG::SelectionDAG(const TargetMachine &tm)
794 : TM(tm), TLI(*tm.getTargetLowering()), TSI(*tm.getSelectionDAGInfo()),
795 EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Other)),
796 Root(getEntryNode()), Ordering(0) {
797 AllNodes.push_back(&EntryNode);
798 Ordering = new SDNodeOrdering();
799 DbgInfo = new SDDbgInfo();
802 void SelectionDAG::init(MachineFunction &mf) {
804 Context = &mf.getFunction()->getContext();
807 SelectionDAG::~SelectionDAG() {
814 void SelectionDAG::allnodes_clear() {
815 assert(&*AllNodes.begin() == &EntryNode);
816 AllNodes.remove(AllNodes.begin());
817 while (!AllNodes.empty())
818 DeallocateNode(AllNodes.begin());
821 void SelectionDAG::clear() {
823 OperandAllocator.Reset();
826 ExtendedValueTypeNodes.clear();
827 ExternalSymbols.clear();
828 TargetExternalSymbols.clear();
829 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
830 static_cast<CondCodeSDNode*>(0));
831 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
832 static_cast<SDNode*>(0));
834 EntryNode.UseList = 0;
835 AllNodes.push_back(&EntryNode);
836 Root = getEntryNode();
838 Ordering = new SDNodeOrdering();
841 DbgInfo = new SDDbgInfo();
844 SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
845 return VT.bitsGT(Op.getValueType()) ?
846 getNode(ISD::SIGN_EXTEND, DL, VT, Op) :
847 getNode(ISD::TRUNCATE, DL, VT, Op);
850 SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
851 return VT.bitsGT(Op.getValueType()) ?
852 getNode(ISD::ZERO_EXTEND, DL, VT, Op) :
853 getNode(ISD::TRUNCATE, DL, VT, Op);
856 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) {
857 assert(!VT.isVector() &&
858 "getZeroExtendInReg should use the vector element type instead of "
860 if (Op.getValueType() == VT) return Op;
861 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
862 APInt Imm = APInt::getLowBitsSet(BitWidth,
864 return getNode(ISD::AND, DL, Op.getValueType(), Op,
865 getConstant(Imm, Op.getValueType()));
868 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
870 SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) {
871 EVT EltVT = VT.getScalarType();
873 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT);
874 return getNode(ISD::XOR, DL, VT, Val, NegOne);
877 SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) {
878 EVT EltVT = VT.getScalarType();
879 assert((EltVT.getSizeInBits() >= 64 ||
880 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
881 "getConstant with a uint64_t value that doesn't fit in the type!");
882 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
885 SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) {
886 return getConstant(*ConstantInt::get(*Context, Val), VT, isT);
889 SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) {
890 assert(VT.isInteger() && "Cannot create FP integer constant!");
892 EVT EltVT = VT.getScalarType();
893 assert(Val.getBitWidth() == EltVT.getSizeInBits() &&
894 "APInt size does not match type size!");
896 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
898 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
902 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
904 return SDValue(N, 0);
907 N = new (NodeAllocator) ConstantSDNode(isT, &Val, EltVT);
908 CSEMap.InsertNode(N, IP);
909 AllNodes.push_back(N);
912 SDValue Result(N, 0);
914 SmallVector<SDValue, 8> Ops;
915 Ops.assign(VT.getVectorNumElements(), Result);
916 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
921 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
922 return getConstant(Val, TLI.getPointerTy(), isTarget);
926 SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) {
927 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget);
930 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){
931 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
933 EVT EltVT = VT.getScalarType();
935 // Do the map lookup using the actual bit pattern for the floating point
936 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
937 // we don't have issues with SNANs.
938 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
940 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
944 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
946 return SDValue(N, 0);
949 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT);
950 CSEMap.InsertNode(N, IP);
951 AllNodes.push_back(N);
954 SDValue Result(N, 0);
956 SmallVector<SDValue, 8> Ops;
957 Ops.assign(VT.getVectorNumElements(), Result);
958 // FIXME DebugLoc info might be appropriate here
959 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
964 SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) {
965 EVT EltVT = VT.getScalarType();
967 return getConstantFP(APFloat((float)Val), VT, isTarget);
968 else if (EltVT==MVT::f64)
969 return getConstantFP(APFloat(Val), VT, isTarget);
970 else if (EltVT==MVT::f80 || EltVT==MVT::f128) {
972 APFloat apf = APFloat(Val);
973 apf.convert(*EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven,
975 return getConstantFP(apf, VT, isTarget);
977 assert(0 && "Unsupported type in getConstantFP");
982 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV,
983 EVT VT, int64_t Offset,
985 unsigned char TargetFlags) {
986 assert((TargetFlags == 0 || isTargetGA) &&
987 "Cannot set target flags on target-independent globals");
989 // Truncate (with sign-extension) the offset value to the pointer size.
990 EVT PTy = TLI.getPointerTy();
991 unsigned BitWidth = PTy.getSizeInBits();
993 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth));
995 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
997 // If GV is an alias then use the aliasee for determining thread-localness.
998 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
999 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
1003 if (GVar && GVar->isThreadLocal())
1004 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
1006 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
1008 FoldingSetNodeID ID;
1009 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1011 ID.AddInteger(Offset);
1012 ID.AddInteger(TargetFlags);
1014 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1015 return SDValue(E, 0);
1017 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, GV, VT,
1018 Offset, TargetFlags);
1019 CSEMap.InsertNode(N, IP);
1020 AllNodes.push_back(N);
1021 return SDValue(N, 0);
1024 SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
1025 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1026 FoldingSetNodeID ID;
1027 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1030 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1031 return SDValue(E, 0);
1033 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget);
1034 CSEMap.InsertNode(N, IP);
1035 AllNodes.push_back(N);
1036 return SDValue(N, 0);
1039 SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
1040 unsigned char TargetFlags) {
1041 assert((TargetFlags == 0 || isTarget) &&
1042 "Cannot set target flags on target-independent jump tables");
1043 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1044 FoldingSetNodeID ID;
1045 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1047 ID.AddInteger(TargetFlags);
1049 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1050 return SDValue(E, 0);
1052 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget,
1054 CSEMap.InsertNode(N, IP);
1055 AllNodes.push_back(N);
1056 return SDValue(N, 0);
1059 SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT,
1060 unsigned Alignment, int Offset,
1062 unsigned char TargetFlags) {
1063 assert((TargetFlags == 0 || isTarget) &&
1064 "Cannot set target flags on target-independent globals");
1066 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1067 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1068 FoldingSetNodeID ID;
1069 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1070 ID.AddInteger(Alignment);
1071 ID.AddInteger(Offset);
1073 ID.AddInteger(TargetFlags);
1075 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1076 return SDValue(E, 0);
1078 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1079 Alignment, TargetFlags);
1080 CSEMap.InsertNode(N, IP);
1081 AllNodes.push_back(N);
1082 return SDValue(N, 0);
1086 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
1087 unsigned Alignment, int Offset,
1089 unsigned char TargetFlags) {
1090 assert((TargetFlags == 0 || isTarget) &&
1091 "Cannot set target flags on target-independent globals");
1093 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1094 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1095 FoldingSetNodeID ID;
1096 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1097 ID.AddInteger(Alignment);
1098 ID.AddInteger(Offset);
1099 C->AddSelectionDAGCSEId(ID);
1100 ID.AddInteger(TargetFlags);
1102 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1103 return SDValue(E, 0);
1105 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1106 Alignment, TargetFlags);
1107 CSEMap.InsertNode(N, IP);
1108 AllNodes.push_back(N);
1109 return SDValue(N, 0);
1112 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1113 FoldingSetNodeID ID;
1114 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1117 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1118 return SDValue(E, 0);
1120 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB);
1121 CSEMap.InsertNode(N, IP);
1122 AllNodes.push_back(N);
1123 return SDValue(N, 0);
1126 SDValue SelectionDAG::getValueType(EVT VT) {
1127 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
1128 ValueTypeNodes.size())
1129 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
1131 SDNode *&N = VT.isExtended() ?
1132 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
1134 if (N) return SDValue(N, 0);
1135 N = new (NodeAllocator) VTSDNode(VT);
1136 AllNodes.push_back(N);
1137 return SDValue(N, 0);
1140 SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
1141 SDNode *&N = ExternalSymbols[Sym];
1142 if (N) return SDValue(N, 0);
1143 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT);
1144 AllNodes.push_back(N);
1145 return SDValue(N, 0);
1148 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
1149 unsigned char TargetFlags) {
1151 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1153 if (N) return SDValue(N, 0);
1154 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1155 AllNodes.push_back(N);
1156 return SDValue(N, 0);
1159 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1160 if ((unsigned)Cond >= CondCodeNodes.size())
1161 CondCodeNodes.resize(Cond+1);
1163 if (CondCodeNodes[Cond] == 0) {
1164 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond);
1165 CondCodeNodes[Cond] = N;
1166 AllNodes.push_back(N);
1169 return SDValue(CondCodeNodes[Cond], 0);
1172 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1173 // the shuffle mask M that point at N1 to point at N2, and indices that point
1174 // N2 to point at N1.
1175 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1177 int NElts = M.size();
1178 for (int i = 0; i != NElts; ++i) {
1186 SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1,
1187 SDValue N2, const int *Mask) {
1188 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE");
1189 assert(VT.isVector() && N1.getValueType().isVector() &&
1190 "Vector Shuffle VTs must be a vectors");
1191 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType()
1192 && "Vector Shuffle VTs must have same element type");
1194 // Canonicalize shuffle undef, undef -> undef
1195 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1196 return getUNDEF(VT);
1198 // Validate that all indices in Mask are within the range of the elements
1199 // input to the shuffle.
1200 unsigned NElts = VT.getVectorNumElements();
1201 SmallVector<int, 8> MaskVec;
1202 for (unsigned i = 0; i != NElts; ++i) {
1203 assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1204 MaskVec.push_back(Mask[i]);
1207 // Canonicalize shuffle v, v -> v, undef
1210 for (unsigned i = 0; i != NElts; ++i)
1211 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1214 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1215 if (N1.getOpcode() == ISD::UNDEF)
1216 commuteShuffle(N1, N2, MaskVec);
1218 // Canonicalize all index into lhs, -> shuffle lhs, undef
1219 // Canonicalize all index into rhs, -> shuffle rhs, undef
1220 bool AllLHS = true, AllRHS = true;
1221 bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1222 for (unsigned i = 0; i != NElts; ++i) {
1223 if (MaskVec[i] >= (int)NElts) {
1228 } else if (MaskVec[i] >= 0) {
1232 if (AllLHS && AllRHS)
1233 return getUNDEF(VT);
1234 if (AllLHS && !N2Undef)
1238 commuteShuffle(N1, N2, MaskVec);
1241 // If Identity shuffle, or all shuffle in to undef, return that node.
1242 bool AllUndef = true;
1243 bool Identity = true;
1244 for (unsigned i = 0; i != NElts; ++i) {
1245 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1246 if (MaskVec[i] >= 0) AllUndef = false;
1248 if (Identity && NElts == N1.getValueType().getVectorNumElements())
1251 return getUNDEF(VT);
1253 FoldingSetNodeID ID;
1254 SDValue Ops[2] = { N1, N2 };
1255 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2);
1256 for (unsigned i = 0; i != NElts; ++i)
1257 ID.AddInteger(MaskVec[i]);
1260 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1261 return SDValue(E, 0);
1263 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1264 // SDNode doesn't have access to it. This memory will be "leaked" when
1265 // the node is deallocated, but recovered when the NodeAllocator is released.
1266 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1267 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1269 ShuffleVectorSDNode *N =
1270 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc);
1271 CSEMap.InsertNode(N, IP);
1272 AllNodes.push_back(N);
1273 return SDValue(N, 0);
1276 SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl,
1277 SDValue Val, SDValue DTy,
1278 SDValue STy, SDValue Rnd, SDValue Sat,
1279 ISD::CvtCode Code) {
1280 // If the src and dest types are the same and the conversion is between
1281 // integer types of the same sign or two floats, no conversion is necessary.
1283 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1286 FoldingSetNodeID ID;
1287 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1288 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5);
1290 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1291 return SDValue(E, 0);
1293 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5,
1295 CSEMap.InsertNode(N, IP);
1296 AllNodes.push_back(N);
1297 return SDValue(N, 0);
1300 SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
1301 FoldingSetNodeID ID;
1302 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1303 ID.AddInteger(RegNo);
1305 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1306 return SDValue(E, 0);
1308 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT);
1309 CSEMap.InsertNode(N, IP);
1310 AllNodes.push_back(N);
1311 return SDValue(N, 0);
1314 SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) {
1315 FoldingSetNodeID ID;
1316 SDValue Ops[] = { Root };
1317 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1);
1318 ID.AddPointer(Label);
1320 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1321 return SDValue(E, 0);
1323 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label);
1324 CSEMap.InsertNode(N, IP);
1325 AllNodes.push_back(N);
1326 return SDValue(N, 0);
1330 SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT,
1332 unsigned char TargetFlags) {
1333 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress;
1335 FoldingSetNodeID ID;
1336 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1338 ID.AddInteger(TargetFlags);
1340 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1341 return SDValue(E, 0);
1343 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, TargetFlags);
1344 CSEMap.InsertNode(N, IP);
1345 AllNodes.push_back(N);
1346 return SDValue(N, 0);
1349 SDValue SelectionDAG::getSrcValue(const Value *V) {
1350 assert((!V || V->getType()->isPointerTy()) &&
1351 "SrcValue is not a pointer?");
1353 FoldingSetNodeID ID;
1354 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1358 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1359 return SDValue(E, 0);
1361 SDNode *N = new (NodeAllocator) SrcValueSDNode(V);
1362 CSEMap.InsertNode(N, IP);
1363 AllNodes.push_back(N);
1364 return SDValue(N, 0);
1367 /// getMDNode - Return an MDNodeSDNode which holds an MDNode.
1368 SDValue SelectionDAG::getMDNode(const MDNode *MD) {
1369 FoldingSetNodeID ID;
1370 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0);
1374 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1375 return SDValue(E, 0);
1377 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD);
1378 CSEMap.InsertNode(N, IP);
1379 AllNodes.push_back(N);
1380 return SDValue(N, 0);
1384 /// getShiftAmountOperand - Return the specified value casted to
1385 /// the target's desired shift amount type.
1386 SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) {
1387 EVT OpTy = Op.getValueType();
1388 MVT ShTy = TLI.getShiftAmountTy();
1389 if (OpTy == ShTy || OpTy.isVector()) return Op;
1391 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1392 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op);
1395 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1396 /// specified value type.
1397 SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
1398 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1399 unsigned ByteSize = VT.getStoreSize();
1400 const Type *Ty = VT.getTypeForEVT(*getContext());
1401 unsigned StackAlign =
1402 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign);
1404 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false);
1405 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1408 /// CreateStackTemporary - Create a stack temporary suitable for holding
1409 /// either of the specified value types.
1410 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
1411 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1412 VT2.getStoreSizeInBits())/8;
1413 const Type *Ty1 = VT1.getTypeForEVT(*getContext());
1414 const Type *Ty2 = VT2.getTypeForEVT(*getContext());
1415 const TargetData *TD = TLI.getTargetData();
1416 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1417 TD->getPrefTypeAlignment(Ty2));
1419 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1420 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false);
1421 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1424 SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
1425 SDValue N2, ISD::CondCode Cond, DebugLoc dl) {
1426 // These setcc operations always fold.
1430 case ISD::SETFALSE2: return getConstant(0, VT);
1432 case ISD::SETTRUE2: return getConstant(1, VT);
1444 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1448 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1449 const APInt &C2 = N2C->getAPIntValue();
1450 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1451 const APInt &C1 = N1C->getAPIntValue();
1454 default: llvm_unreachable("Unknown integer setcc!");
1455 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1456 case ISD::SETNE: return getConstant(C1 != C2, VT);
1457 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1458 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1459 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1460 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1461 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1462 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1463 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1464 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1468 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1469 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1470 // No compile time operations on this type yet.
1471 if (N1C->getValueType(0) == MVT::ppcf128)
1474 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1477 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1478 return getUNDEF(VT);
1480 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1481 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1482 return getUNDEF(VT);
1484 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1485 R==APFloat::cmpLessThan, VT);
1486 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1487 return getUNDEF(VT);
1489 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1490 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1491 return getUNDEF(VT);
1493 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1494 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1495 return getUNDEF(VT);
1497 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1498 R==APFloat::cmpEqual, VT);
1499 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1500 return getUNDEF(VT);
1502 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1503 R==APFloat::cmpEqual, VT);
1504 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1505 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1506 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1507 R==APFloat::cmpEqual, VT);
1508 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1509 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1510 R==APFloat::cmpLessThan, VT);
1511 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1512 R==APFloat::cmpUnordered, VT);
1513 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1514 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1517 // Ensure that the constant occurs on the RHS.
1518 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1522 // Could not fold it.
1526 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1527 /// use this predicate to simplify operations downstream.
1528 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1529 // This predicate is not safe for vector operations.
1530 if (Op.getValueType().isVector())
1533 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1534 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1537 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1538 /// this predicate to simplify operations downstream. Mask is known to be zero
1539 /// for bits that V cannot have.
1540 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1541 unsigned Depth) const {
1542 APInt KnownZero, KnownOne;
1543 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
1544 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1545 return (KnownZero & Mask) == Mask;
1548 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1549 /// known to be either zero or one and return them in the KnownZero/KnownOne
1550 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1552 void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask,
1553 APInt &KnownZero, APInt &KnownOne,
1554 unsigned Depth) const {
1555 unsigned BitWidth = Mask.getBitWidth();
1556 assert(BitWidth == Op.getValueType().getScalarType().getSizeInBits() &&
1557 "Mask size mismatches value type size!");
1559 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1560 if (Depth == 6 || Mask == 0)
1561 return; // Limit search depth.
1563 APInt KnownZero2, KnownOne2;
1565 switch (Op.getOpcode()) {
1567 // We know all of the bits for a constant!
1568 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask;
1569 KnownZero = ~KnownOne & Mask;
1572 // If either the LHS or the RHS are Zero, the result is zero.
1573 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1574 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero,
1575 KnownZero2, KnownOne2, Depth+1);
1576 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1577 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1579 // Output known-1 bits are only known if set in both the LHS & RHS.
1580 KnownOne &= KnownOne2;
1581 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1582 KnownZero |= KnownZero2;
1585 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1586 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne,
1587 KnownZero2, KnownOne2, Depth+1);
1588 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1589 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1591 // Output known-0 bits are only known if clear in both the LHS & RHS.
1592 KnownZero &= KnownZero2;
1593 // Output known-1 are known to be set if set in either the LHS | RHS.
1594 KnownOne |= KnownOne2;
1597 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1598 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
1599 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1600 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1602 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1603 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1604 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1605 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1606 KnownZero = KnownZeroOut;
1610 APInt Mask2 = APInt::getAllOnesValue(BitWidth);
1611 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1);
1612 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1613 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1614 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1616 // If low bits are zero in either operand, output low known-0 bits.
1617 // Also compute a conserative estimate for high known-0 bits.
1618 // More trickiness is possible, but this is sufficient for the
1619 // interesting case of alignment computation.
1621 unsigned TrailZ = KnownZero.countTrailingOnes() +
1622 KnownZero2.countTrailingOnes();
1623 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1624 KnownZero2.countLeadingOnes(),
1625 BitWidth) - BitWidth;
1627 TrailZ = std::min(TrailZ, BitWidth);
1628 LeadZ = std::min(LeadZ, BitWidth);
1629 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1630 APInt::getHighBitsSet(BitWidth, LeadZ);
1635 // For the purposes of computing leading zeros we can conservatively
1636 // treat a udiv as a logical right shift by the power of 2 known to
1637 // be less than the denominator.
1638 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1639 ComputeMaskedBits(Op.getOperand(0),
1640 AllOnes, KnownZero2, KnownOne2, Depth+1);
1641 unsigned LeadZ = KnownZero2.countLeadingOnes();
1645 ComputeMaskedBits(Op.getOperand(1),
1646 AllOnes, KnownZero2, KnownOne2, Depth+1);
1647 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1648 if (RHSUnknownLeadingOnes != BitWidth)
1649 LeadZ = std::min(BitWidth,
1650 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1652 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask;
1656 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1);
1657 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1);
1658 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1659 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1661 // Only known if known in both the LHS and RHS.
1662 KnownOne &= KnownOne2;
1663 KnownZero &= KnownZero2;
1665 case ISD::SELECT_CC:
1666 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1);
1667 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1);
1668 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1669 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1671 // Only known if known in both the LHS and RHS.
1672 KnownOne &= KnownOne2;
1673 KnownZero &= KnownZero2;
1681 if (Op.getResNo() != 1)
1683 // The boolean result conforms to getBooleanContents. Fall through.
1685 // If we know the result of a setcc has the top bits zero, use this info.
1686 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent &&
1688 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1691 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1692 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1693 unsigned ShAmt = SA->getZExtValue();
1695 // If the shift count is an invalid immediate, don't do anything.
1696 if (ShAmt >= BitWidth)
1699 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt),
1700 KnownZero, KnownOne, Depth+1);
1701 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1702 KnownZero <<= ShAmt;
1704 // low bits known zero.
1705 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1709 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1710 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1711 unsigned ShAmt = SA->getZExtValue();
1713 // If the shift count is an invalid immediate, don't do anything.
1714 if (ShAmt >= BitWidth)
1717 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt),
1718 KnownZero, KnownOne, Depth+1);
1719 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1720 KnownZero = KnownZero.lshr(ShAmt);
1721 KnownOne = KnownOne.lshr(ShAmt);
1723 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1724 KnownZero |= HighBits; // High bits known zero.
1728 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1729 unsigned ShAmt = SA->getZExtValue();
1731 // If the shift count is an invalid immediate, don't do anything.
1732 if (ShAmt >= BitWidth)
1735 APInt InDemandedMask = (Mask << ShAmt);
1736 // If any of the demanded bits are produced by the sign extension, we also
1737 // demand the input sign bit.
1738 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1739 if (HighBits.getBoolValue())
1740 InDemandedMask |= APInt::getSignBit(BitWidth);
1742 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne,
1744 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1745 KnownZero = KnownZero.lshr(ShAmt);
1746 KnownOne = KnownOne.lshr(ShAmt);
1748 // Handle the sign bits.
1749 APInt SignBit = APInt::getSignBit(BitWidth);
1750 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1752 if (KnownZero.intersects(SignBit)) {
1753 KnownZero |= HighBits; // New bits are known zero.
1754 } else if (KnownOne.intersects(SignBit)) {
1755 KnownOne |= HighBits; // New bits are known one.
1759 case ISD::SIGN_EXTEND_INREG: {
1760 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1761 unsigned EBits = EVT.getScalarType().getSizeInBits();
1763 // Sign extension. Compute the demanded bits in the result that are not
1764 // present in the input.
1765 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask;
1767 APInt InSignBit = APInt::getSignBit(EBits);
1768 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits);
1770 // If the sign extended bits are demanded, we know that the sign
1772 InSignBit.zext(BitWidth);
1773 if (NewBits.getBoolValue())
1774 InputDemandedBits |= InSignBit;
1776 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits,
1777 KnownZero, KnownOne, Depth+1);
1778 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1780 // If the sign bit of the input is known set or clear, then we know the
1781 // top bits of the result.
1782 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1783 KnownZero |= NewBits;
1784 KnownOne &= ~NewBits;
1785 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1786 KnownOne |= NewBits;
1787 KnownZero &= ~NewBits;
1788 } else { // Input sign bit unknown
1789 KnownZero &= ~NewBits;
1790 KnownOne &= ~NewBits;
1797 unsigned LowBits = Log2_32(BitWidth)+1;
1798 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1803 if (ISD::isZEXTLoad(Op.getNode())) {
1804 LoadSDNode *LD = cast<LoadSDNode>(Op);
1805 EVT VT = LD->getMemoryVT();
1806 unsigned MemBits = VT.getScalarType().getSizeInBits();
1807 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask;
1811 case ISD::ZERO_EXTEND: {
1812 EVT InVT = Op.getOperand(0).getValueType();
1813 unsigned InBits = InVT.getScalarType().getSizeInBits();
1814 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1815 APInt InMask = Mask;
1816 InMask.trunc(InBits);
1817 KnownZero.trunc(InBits);
1818 KnownOne.trunc(InBits);
1819 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1820 KnownZero.zext(BitWidth);
1821 KnownOne.zext(BitWidth);
1822 KnownZero |= NewBits;
1825 case ISD::SIGN_EXTEND: {
1826 EVT InVT = Op.getOperand(0).getValueType();
1827 unsigned InBits = InVT.getScalarType().getSizeInBits();
1828 APInt InSignBit = APInt::getSignBit(InBits);
1829 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1830 APInt InMask = Mask;
1831 InMask.trunc(InBits);
1833 // If any of the sign extended bits are demanded, we know that the sign
1834 // bit is demanded. Temporarily set this bit in the mask for our callee.
1835 if (NewBits.getBoolValue())
1836 InMask |= InSignBit;
1838 KnownZero.trunc(InBits);
1839 KnownOne.trunc(InBits);
1840 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1842 // Note if the sign bit is known to be zero or one.
1843 bool SignBitKnownZero = KnownZero.isNegative();
1844 bool SignBitKnownOne = KnownOne.isNegative();
1845 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1846 "Sign bit can't be known to be both zero and one!");
1848 // If the sign bit wasn't actually demanded by our caller, we don't
1849 // want it set in the KnownZero and KnownOne result values. Reset the
1850 // mask and reapply it to the result values.
1852 InMask.trunc(InBits);
1853 KnownZero &= InMask;
1856 KnownZero.zext(BitWidth);
1857 KnownOne.zext(BitWidth);
1859 // If the sign bit is known zero or one, the top bits match.
1860 if (SignBitKnownZero)
1861 KnownZero |= NewBits;
1862 else if (SignBitKnownOne)
1863 KnownOne |= NewBits;
1866 case ISD::ANY_EXTEND: {
1867 EVT InVT = Op.getOperand(0).getValueType();
1868 unsigned InBits = InVT.getScalarType().getSizeInBits();
1869 APInt InMask = Mask;
1870 InMask.trunc(InBits);
1871 KnownZero.trunc(InBits);
1872 KnownOne.trunc(InBits);
1873 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1874 KnownZero.zext(BitWidth);
1875 KnownOne.zext(BitWidth);
1878 case ISD::TRUNCATE: {
1879 EVT InVT = Op.getOperand(0).getValueType();
1880 unsigned InBits = InVT.getScalarType().getSizeInBits();
1881 APInt InMask = Mask;
1882 InMask.zext(InBits);
1883 KnownZero.zext(InBits);
1884 KnownOne.zext(InBits);
1885 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1886 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1887 KnownZero.trunc(BitWidth);
1888 KnownOne.trunc(BitWidth);
1891 case ISD::AssertZext: {
1892 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1893 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1894 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
1896 KnownZero |= (~InMask) & Mask;
1900 // All bits are zero except the low bit.
1901 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1905 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
1906 // We know that the top bits of C-X are clear if X contains less bits
1907 // than C (i.e. no wrap-around can happen). For example, 20-X is
1908 // positive if we can prove that X is >= 0 and < 16.
1909 if (CLHS->getAPIntValue().isNonNegative()) {
1910 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
1911 // NLZ can't be BitWidth with no sign bit
1912 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
1913 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2,
1916 // If all of the MaskV bits are known to be zero, then we know the
1917 // output top bits are zero, because we now know that the output is
1919 if ((KnownZero2 & MaskV) == MaskV) {
1920 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
1921 // Top bits known zero.
1922 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask;
1929 // Output known-0 bits are known if clear or set in both the low clear bits
1930 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
1931 // low 3 bits clear.
1932 APInt Mask2 = APInt::getLowBitsSet(BitWidth,
1933 BitWidth - Mask.countLeadingZeros());
1934 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1935 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1936 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
1938 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1);
1939 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1940 KnownZeroOut = std::min(KnownZeroOut,
1941 KnownZero2.countTrailingOnes());
1943 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
1947 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1948 const APInt &RA = Rem->getAPIntValue().abs();
1949 if (RA.isPowerOf2()) {
1950 APInt LowBits = RA - 1;
1951 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
1952 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1);
1954 // The low bits of the first operand are unchanged by the srem.
1955 KnownZero = KnownZero2 & LowBits;
1956 KnownOne = KnownOne2 & LowBits;
1958 // If the first operand is non-negative or has all low bits zero, then
1959 // the upper bits are all zero.
1960 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
1961 KnownZero |= ~LowBits;
1963 // If the first operand is negative and not all low bits are zero, then
1964 // the upper bits are all one.
1965 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0))
1966 KnownOne |= ~LowBits;
1971 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1976 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1977 const APInt &RA = Rem->getAPIntValue();
1978 if (RA.isPowerOf2()) {
1979 APInt LowBits = (RA - 1);
1980 APInt Mask2 = LowBits & Mask;
1981 KnownZero |= ~LowBits & Mask;
1982 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1);
1983 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1988 // Since the result is less than or equal to either operand, any leading
1989 // zero bits in either operand must also exist in the result.
1990 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1991 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne,
1993 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2,
1996 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
1997 KnownZero2.countLeadingOnes());
1999 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
2003 // Allow the target to implement this method for its nodes.
2004 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) {
2005 case ISD::INTRINSIC_WO_CHAIN:
2006 case ISD::INTRINSIC_W_CHAIN:
2007 case ISD::INTRINSIC_VOID:
2008 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this,
2015 /// ComputeNumSignBits - Return the number of times the sign bit of the
2016 /// register is replicated into the other bits. We know that at least 1 bit
2017 /// is always equal to the sign bit (itself), but other cases can give us
2018 /// information. For example, immediately after an "SRA X, 2", we know that
2019 /// the top 3 bits are all equal to each other, so we return 3.
2020 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
2021 EVT VT = Op.getValueType();
2022 assert(VT.isInteger() && "Invalid VT!");
2023 unsigned VTBits = VT.getScalarType().getSizeInBits();
2025 unsigned FirstAnswer = 1;
2028 return 1; // Limit search depth.
2030 switch (Op.getOpcode()) {
2032 case ISD::AssertSext:
2033 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2034 return VTBits-Tmp+1;
2035 case ISD::AssertZext:
2036 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2039 case ISD::Constant: {
2040 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2041 // If negative, return # leading ones.
2042 if (Val.isNegative())
2043 return Val.countLeadingOnes();
2045 // Return # leading zeros.
2046 return Val.countLeadingZeros();
2049 case ISD::SIGN_EXTEND:
2050 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
2051 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2053 case ISD::SIGN_EXTEND_INREG:
2054 // Max of the input and what this extends.
2056 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits();
2059 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2060 return std::max(Tmp, Tmp2);
2063 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2064 // SRA X, C -> adds C sign bits.
2065 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2066 Tmp += C->getZExtValue();
2067 if (Tmp > VTBits) Tmp = VTBits;
2071 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2072 // shl destroys sign bits.
2073 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2074 if (C->getZExtValue() >= VTBits || // Bad shift.
2075 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
2076 return Tmp - C->getZExtValue();
2081 case ISD::XOR: // NOT is handled here.
2082 // Logical binary ops preserve the number of sign bits at the worst.
2083 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2085 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2086 FirstAnswer = std::min(Tmp, Tmp2);
2087 // We computed what we know about the sign bits as our first
2088 // answer. Now proceed to the generic code that uses
2089 // ComputeMaskedBits, and pick whichever answer is better.
2094 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2095 if (Tmp == 1) return 1; // Early out.
2096 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2097 return std::min(Tmp, Tmp2);
2105 if (Op.getResNo() != 1)
2107 // The boolean result conforms to getBooleanContents. Fall through.
2109 // If setcc returns 0/-1, all bits are sign bits.
2110 if (TLI.getBooleanContents() ==
2111 TargetLowering::ZeroOrNegativeOneBooleanContent)
2116 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2117 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2119 // Handle rotate right by N like a rotate left by 32-N.
2120 if (Op.getOpcode() == ISD::ROTR)
2121 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2123 // If we aren't rotating out all of the known-in sign bits, return the
2124 // number that are left. This handles rotl(sext(x), 1) for example.
2125 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2126 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2130 // Add can have at most one carry bit. Thus we know that the output
2131 // is, at worst, one more bit than the inputs.
2132 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2133 if (Tmp == 1) return 1; // Early out.
2135 // Special case decrementing a value (ADD X, -1):
2136 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2137 if (CRHS->isAllOnesValue()) {
2138 APInt KnownZero, KnownOne;
2139 APInt Mask = APInt::getAllOnesValue(VTBits);
2140 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
2142 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2144 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2147 // If we are subtracting one from a positive number, there is no carry
2148 // out of the result.
2149 if (KnownZero.isNegative())
2153 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2154 if (Tmp2 == 1) return 1;
2155 return std::min(Tmp, Tmp2)-1;
2159 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2160 if (Tmp2 == 1) return 1;
2163 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2164 if (CLHS->isNullValue()) {
2165 APInt KnownZero, KnownOne;
2166 APInt Mask = APInt::getAllOnesValue(VTBits);
2167 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
2168 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2170 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2173 // If the input is known to be positive (the sign bit is known clear),
2174 // the output of the NEG has the same number of sign bits as the input.
2175 if (KnownZero.isNegative())
2178 // Otherwise, we treat this like a SUB.
2181 // Sub can have at most one carry bit. Thus we know that the output
2182 // is, at worst, one more bit than the inputs.
2183 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2184 if (Tmp == 1) return 1; // Early out.
2185 return std::min(Tmp, Tmp2)-1;
2188 // FIXME: it's tricky to do anything useful for this, but it is an important
2189 // case for targets like X86.
2193 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2194 if (Op.getOpcode() == ISD::LOAD) {
2195 LoadSDNode *LD = cast<LoadSDNode>(Op);
2196 unsigned ExtType = LD->getExtensionType();
2199 case ISD::SEXTLOAD: // '17' bits known
2200 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2201 return VTBits-Tmp+1;
2202 case ISD::ZEXTLOAD: // '16' bits known
2203 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2208 // Allow the target to implement this method for its nodes.
2209 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2210 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2211 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2212 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2213 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2214 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2217 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2218 // use this information.
2219 APInt KnownZero, KnownOne;
2220 APInt Mask = APInt::getAllOnesValue(VTBits);
2221 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
2223 if (KnownZero.isNegative()) { // sign bit is 0
2225 } else if (KnownOne.isNegative()) { // sign bit is 1;
2232 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2233 // the number of identical bits in the top of the input value.
2235 Mask <<= Mask.getBitWidth()-VTBits;
2236 // Return # leading zeros. We use 'min' here in case Val was zero before
2237 // shifting. We don't want to return '64' as for an i32 "0".
2238 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2241 bool SelectionDAG::isKnownNeverNaN(SDValue Op) const {
2242 // If we're told that NaNs won't happen, assume they won't.
2243 if (FiniteOnlyFPMath())
2246 // If the value is a constant, we can obviously see if it is a NaN or not.
2247 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2248 return !C->getValueAPF().isNaN();
2250 // TODO: Recognize more cases here.
2255 bool SelectionDAG::isKnownNeverZero(SDValue Op) const {
2256 // If the value is a constant, we can obviously see if it is a zero or not.
2257 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2258 return !C->isZero();
2260 // TODO: Recognize more cases here.
2265 bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const {
2266 // Check the obvious case.
2267 if (A == B) return true;
2269 // For for negative and positive zero.
2270 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A))
2271 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B))
2272 if (CA->isZero() && CB->isZero()) return true;
2274 // Otherwise they may not be equal.
2278 bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const {
2279 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op);
2280 if (!GA) return false;
2281 if (GA->getOffset() != 0) return false;
2282 const GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal());
2283 if (!GV) return false;
2284 return MF->getMMI().hasDebugInfo();
2288 /// getShuffleScalarElt - Returns the scalar element that will make up the ith
2289 /// element of the result of the vector shuffle.
2290 SDValue SelectionDAG::getShuffleScalarElt(const ShuffleVectorSDNode *N,
2292 EVT VT = N->getValueType(0);
2293 DebugLoc dl = N->getDebugLoc();
2294 if (N->getMaskElt(i) < 0)
2295 return getUNDEF(VT.getVectorElementType());
2296 unsigned Index = N->getMaskElt(i);
2297 unsigned NumElems = VT.getVectorNumElements();
2298 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1);
2301 if (V.getOpcode() == ISD::BIT_CONVERT) {
2302 V = V.getOperand(0);
2303 EVT VVT = V.getValueType();
2304 if (!VVT.isVector() || VVT.getVectorNumElements() != (unsigned)NumElems)
2307 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR)
2308 return (Index == 0) ? V.getOperand(0)
2309 : getUNDEF(VT.getVectorElementType());
2310 if (V.getOpcode() == ISD::BUILD_VECTOR)
2311 return V.getOperand(Index);
2312 if (const ShuffleVectorSDNode *SVN = dyn_cast<ShuffleVectorSDNode>(V))
2313 return getShuffleScalarElt(SVN, Index);
2318 /// getNode - Gets or creates the specified node.
2320 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) {
2321 FoldingSetNodeID ID;
2322 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2324 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2325 return SDValue(E, 0);
2327 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT));
2328 CSEMap.InsertNode(N, IP);
2330 AllNodes.push_back(N);
2334 return SDValue(N, 0);
2337 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
2338 EVT VT, SDValue Operand) {
2339 // Constant fold unary operations with an integer constant operand.
2340 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2341 const APInt &Val = C->getAPIntValue();
2344 case ISD::SIGN_EXTEND:
2345 return getConstant(APInt(Val).sextOrTrunc(VT.getSizeInBits()), VT);
2346 case ISD::ANY_EXTEND:
2347 case ISD::ZERO_EXTEND:
2349 return getConstant(APInt(Val).zextOrTrunc(VT.getSizeInBits()), VT);
2350 case ISD::UINT_TO_FP:
2351 case ISD::SINT_TO_FP: {
2352 const uint64_t zero[] = {0, 0};
2353 // No compile time operations on ppcf128.
2354 if (VT == MVT::ppcf128) break;
2355 APFloat apf = APFloat(APInt(VT.getSizeInBits(), 2, zero));
2356 (void)apf.convertFromAPInt(Val,
2357 Opcode==ISD::SINT_TO_FP,
2358 APFloat::rmNearestTiesToEven);
2359 return getConstantFP(apf, VT);
2361 case ISD::BIT_CONVERT:
2362 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2363 return getConstantFP(Val.bitsToFloat(), VT);
2364 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2365 return getConstantFP(Val.bitsToDouble(), VT);
2368 return getConstant(Val.byteSwap(), VT);
2370 return getConstant(Val.countPopulation(), VT);
2372 return getConstant(Val.countLeadingZeros(), VT);
2374 return getConstant(Val.countTrailingZeros(), VT);
2378 // Constant fold unary operations with a floating point constant operand.
2379 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2380 APFloat V = C->getValueAPF(); // make copy
2381 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) {
2385 return getConstantFP(V, VT);
2388 return getConstantFP(V, VT);
2390 case ISD::FP_EXTEND: {
2392 // This can return overflow, underflow, or inexact; we don't care.
2393 // FIXME need to be more flexible about rounding mode.
2394 (void)V.convert(*EVTToAPFloatSemantics(VT),
2395 APFloat::rmNearestTiesToEven, &ignored);
2396 return getConstantFP(V, VT);
2398 case ISD::FP_TO_SINT:
2399 case ISD::FP_TO_UINT: {
2402 assert(integerPartWidth >= 64);
2403 // FIXME need to be more flexible about rounding mode.
2404 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2405 Opcode==ISD::FP_TO_SINT,
2406 APFloat::rmTowardZero, &ignored);
2407 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2409 APInt api(VT.getSizeInBits(), 2, x);
2410 return getConstant(api, VT);
2412 case ISD::BIT_CONVERT:
2413 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2414 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2415 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2416 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2422 unsigned OpOpcode = Operand.getNode()->getOpcode();
2424 case ISD::TokenFactor:
2425 case ISD::MERGE_VALUES:
2426 case ISD::CONCAT_VECTORS:
2427 return Operand; // Factor, merge or concat of one node? No need.
2428 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
2429 case ISD::FP_EXTEND:
2430 assert(VT.isFloatingPoint() &&
2431 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2432 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2433 assert((!VT.isVector() ||
2434 VT.getVectorNumElements() ==
2435 Operand.getValueType().getVectorNumElements()) &&
2436 "Vector element count mismatch!");
2437 if (Operand.getOpcode() == ISD::UNDEF)
2438 return getUNDEF(VT);
2440 case ISD::SIGN_EXTEND:
2441 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2442 "Invalid SIGN_EXTEND!");
2443 if (Operand.getValueType() == VT) return Operand; // noop extension
2444 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2445 "Invalid sext node, dst < src!");
2446 assert((!VT.isVector() ||
2447 VT.getVectorNumElements() ==
2448 Operand.getValueType().getVectorNumElements()) &&
2449 "Vector element count mismatch!");
2450 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2451 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2453 case ISD::ZERO_EXTEND:
2454 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2455 "Invalid ZERO_EXTEND!");
2456 if (Operand.getValueType() == VT) return Operand; // noop extension
2457 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2458 "Invalid zext node, dst < src!");
2459 assert((!VT.isVector() ||
2460 VT.getVectorNumElements() ==
2461 Operand.getValueType().getVectorNumElements()) &&
2462 "Vector element count mismatch!");
2463 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2464 return getNode(ISD::ZERO_EXTEND, DL, VT,
2465 Operand.getNode()->getOperand(0));
2467 case ISD::ANY_EXTEND:
2468 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2469 "Invalid ANY_EXTEND!");
2470 if (Operand.getValueType() == VT) return Operand; // noop extension
2471 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2472 "Invalid anyext node, dst < src!");
2473 assert((!VT.isVector() ||
2474 VT.getVectorNumElements() ==
2475 Operand.getValueType().getVectorNumElements()) &&
2476 "Vector element count mismatch!");
2478 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2479 OpOpcode == ISD::ANY_EXTEND)
2480 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2481 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2483 // (ext (trunx x)) -> x
2484 if (OpOpcode == ISD::TRUNCATE) {
2485 SDValue OpOp = Operand.getNode()->getOperand(0);
2486 if (OpOp.getValueType() == VT)
2491 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2492 "Invalid TRUNCATE!");
2493 if (Operand.getValueType() == VT) return Operand; // noop truncate
2494 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) &&
2495 "Invalid truncate node, src < dst!");
2496 assert((!VT.isVector() ||
2497 VT.getVectorNumElements() ==
2498 Operand.getValueType().getVectorNumElements()) &&
2499 "Vector element count mismatch!");
2500 if (OpOpcode == ISD::TRUNCATE)
2501 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2502 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2503 OpOpcode == ISD::ANY_EXTEND) {
2504 // If the source is smaller than the dest, we still need an extend.
2505 if (Operand.getNode()->getOperand(0).getValueType().getScalarType()
2506 .bitsLT(VT.getScalarType()))
2507 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2508 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2509 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2511 return Operand.getNode()->getOperand(0);
2514 case ISD::BIT_CONVERT:
2515 // Basic sanity checking.
2516 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2517 && "Cannot BIT_CONVERT between types of different sizes!");
2518 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2519 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x)
2520 return getNode(ISD::BIT_CONVERT, DL, VT, Operand.getOperand(0));
2521 if (OpOpcode == ISD::UNDEF)
2522 return getUNDEF(VT);
2524 case ISD::SCALAR_TO_VECTOR:
2525 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2526 (VT.getVectorElementType() == Operand.getValueType() ||
2527 (VT.getVectorElementType().isInteger() &&
2528 Operand.getValueType().isInteger() &&
2529 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
2530 "Illegal SCALAR_TO_VECTOR node!");
2531 if (OpOpcode == ISD::UNDEF)
2532 return getUNDEF(VT);
2533 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2534 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2535 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2536 Operand.getConstantOperandVal(1) == 0 &&
2537 Operand.getOperand(0).getValueType() == VT)
2538 return Operand.getOperand(0);
2541 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
2542 if (UnsafeFPMath && OpOpcode == ISD::FSUB)
2543 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
2544 Operand.getNode()->getOperand(0));
2545 if (OpOpcode == ISD::FNEG) // --X -> X
2546 return Operand.getNode()->getOperand(0);
2549 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2550 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
2555 SDVTList VTs = getVTList(VT);
2556 if (VT != MVT::Flag) { // Don't CSE flag producing nodes
2557 FoldingSetNodeID ID;
2558 SDValue Ops[1] = { Operand };
2559 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2561 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2562 return SDValue(E, 0);
2564 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2565 CSEMap.InsertNode(N, IP);
2567 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2570 AllNodes.push_back(N);
2574 return SDValue(N, 0);
2577 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2579 ConstantSDNode *Cst1,
2580 ConstantSDNode *Cst2) {
2581 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
2584 case ISD::ADD: return getConstant(C1 + C2, VT);
2585 case ISD::SUB: return getConstant(C1 - C2, VT);
2586 case ISD::MUL: return getConstant(C1 * C2, VT);
2588 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2591 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2594 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2597 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2599 case ISD::AND: return getConstant(C1 & C2, VT);
2600 case ISD::OR: return getConstant(C1 | C2, VT);
2601 case ISD::XOR: return getConstant(C1 ^ C2, VT);
2602 case ISD::SHL: return getConstant(C1 << C2, VT);
2603 case ISD::SRL: return getConstant(C1.lshr(C2), VT);
2604 case ISD::SRA: return getConstant(C1.ashr(C2), VT);
2605 case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2606 case ISD::ROTR: return getConstant(C1.rotr(C2), VT);
2613 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2614 SDValue N1, SDValue N2) {
2615 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2616 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2619 case ISD::TokenFactor:
2620 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2621 N2.getValueType() == MVT::Other && "Invalid token factor!");
2622 // Fold trivial token factors.
2623 if (N1.getOpcode() == ISD::EntryToken) return N2;
2624 if (N2.getOpcode() == ISD::EntryToken) return N1;
2625 if (N1 == N2) return N1;
2627 case ISD::CONCAT_VECTORS:
2628 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2629 // one big BUILD_VECTOR.
2630 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2631 N2.getOpcode() == ISD::BUILD_VECTOR) {
2632 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2633 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2634 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2638 assert(VT.isInteger() && "This operator does not apply to FP types!");
2639 assert(N1.getValueType() == N2.getValueType() &&
2640 N1.getValueType() == VT && "Binary operator types must match!");
2641 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2642 // worth handling here.
2643 if (N2C && N2C->isNullValue())
2645 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2652 assert(VT.isInteger() && "This operator does not apply to FP types!");
2653 assert(N1.getValueType() == N2.getValueType() &&
2654 N1.getValueType() == VT && "Binary operator types must match!");
2655 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2656 // it's worth handling here.
2657 if (N2C && N2C->isNullValue())
2667 assert(VT.isInteger() && "This operator does not apply to FP types!");
2668 assert(N1.getValueType() == N2.getValueType() &&
2669 N1.getValueType() == VT && "Binary operator types must match!");
2677 if (Opcode == ISD::FADD) {
2679 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
2680 if (CFP->getValueAPF().isZero())
2683 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2684 if (CFP->getValueAPF().isZero())
2686 } else if (Opcode == ISD::FSUB) {
2688 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2689 if (CFP->getValueAPF().isZero())
2693 assert(VT.isFloatingPoint() && "This operator only applies to FP types!");
2694 assert(N1.getValueType() == N2.getValueType() &&
2695 N1.getValueType() == VT && "Binary operator types must match!");
2697 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2698 assert(N1.getValueType() == VT &&
2699 N1.getValueType().isFloatingPoint() &&
2700 N2.getValueType().isFloatingPoint() &&
2701 "Invalid FCOPYSIGN!");
2708 assert(VT == N1.getValueType() &&
2709 "Shift operators return type must be the same as their first arg");
2710 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2711 "Shifts only work on integers");
2713 // Always fold shifts of i1 values so the code generator doesn't need to
2714 // handle them. Since we know the size of the shift has to be less than the
2715 // size of the value, the shift/rotate count is guaranteed to be zero.
2718 if (N2C && N2C->isNullValue())
2721 case ISD::FP_ROUND_INREG: {
2722 EVT EVT = cast<VTSDNode>(N2)->getVT();
2723 assert(VT == N1.getValueType() && "Not an inreg round!");
2724 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2725 "Cannot FP_ROUND_INREG integer types");
2726 assert(EVT.isVector() == VT.isVector() &&
2727 "FP_ROUND_INREG type should be vector iff the operand "
2729 assert((!EVT.isVector() ||
2730 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2731 "Vector element counts must match in FP_ROUND_INREG");
2732 assert(EVT.bitsLE(VT) && "Not rounding down!");
2733 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2737 assert(VT.isFloatingPoint() &&
2738 N1.getValueType().isFloatingPoint() &&
2739 VT.bitsLE(N1.getValueType()) &&
2740 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2741 if (N1.getValueType() == VT) return N1; // noop conversion.
2743 case ISD::AssertSext:
2744 case ISD::AssertZext: {
2745 EVT EVT = cast<VTSDNode>(N2)->getVT();
2746 assert(VT == N1.getValueType() && "Not an inreg extend!");
2747 assert(VT.isInteger() && EVT.isInteger() &&
2748 "Cannot *_EXTEND_INREG FP types");
2749 assert(!EVT.isVector() &&
2750 "AssertSExt/AssertZExt type should be the vector element type "
2751 "rather than the vector type!");
2752 assert(EVT.bitsLE(VT) && "Not extending!");
2753 if (VT == EVT) return N1; // noop assertion.
2756 case ISD::SIGN_EXTEND_INREG: {
2757 EVT EVT = cast<VTSDNode>(N2)->getVT();
2758 assert(VT == N1.getValueType() && "Not an inreg extend!");
2759 assert(VT.isInteger() && EVT.isInteger() &&
2760 "Cannot *_EXTEND_INREG FP types");
2761 assert(EVT.isVector() == VT.isVector() &&
2762 "SIGN_EXTEND_INREG type should be vector iff the operand "
2764 assert((!EVT.isVector() ||
2765 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2766 "Vector element counts must match in SIGN_EXTEND_INREG");
2767 assert(EVT.bitsLE(VT) && "Not extending!");
2768 if (EVT == VT) return N1; // Not actually extending
2771 APInt Val = N1C->getAPIntValue();
2772 unsigned FromBits = EVT.getScalarType().getSizeInBits();
2773 Val <<= Val.getBitWidth()-FromBits;
2774 Val = Val.ashr(Val.getBitWidth()-FromBits);
2775 return getConstant(Val, VT);
2779 case ISD::EXTRACT_VECTOR_ELT:
2780 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2781 if (N1.getOpcode() == ISD::UNDEF)
2782 return getUNDEF(VT);
2784 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2785 // expanding copies of large vectors from registers.
2787 N1.getOpcode() == ISD::CONCAT_VECTORS &&
2788 N1.getNumOperands() > 0) {
2790 N1.getOperand(0).getValueType().getVectorNumElements();
2791 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
2792 N1.getOperand(N2C->getZExtValue() / Factor),
2793 getConstant(N2C->getZExtValue() % Factor,
2794 N2.getValueType()));
2797 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2798 // expanding large vector constants.
2799 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
2800 SDValue Elt = N1.getOperand(N2C->getZExtValue());
2801 EVT VEltTy = N1.getValueType().getVectorElementType();
2802 if (Elt.getValueType() != VEltTy) {
2803 // If the vector element type is not legal, the BUILD_VECTOR operands
2804 // are promoted and implicitly truncated. Make that explicit here.
2805 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt);
2808 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT
2809 // result is implicitly extended.
2810 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt);
2815 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2816 // operations are lowered to scalars.
2817 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2818 // If the indices are the same, return the inserted element else
2819 // if the indices are known different, extract the element from
2820 // the original vector.
2821 SDValue N1Op2 = N1.getOperand(2);
2822 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode());
2824 if (N1Op2C && N2C) {
2825 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) {
2826 if (VT == N1.getOperand(1).getValueType())
2827 return N1.getOperand(1);
2829 return getSExtOrTrunc(N1.getOperand(1), DL, VT);
2832 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
2836 case ISD::EXTRACT_ELEMENT:
2837 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
2838 assert(!N1.getValueType().isVector() && !VT.isVector() &&
2839 (N1.getValueType().isInteger() == VT.isInteger()) &&
2840 "Wrong types for EXTRACT_ELEMENT!");
2842 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2843 // 64-bit integers into 32-bit parts. Instead of building the extract of
2844 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2845 if (N1.getOpcode() == ISD::BUILD_PAIR)
2846 return N1.getOperand(N2C->getZExtValue());
2848 // EXTRACT_ELEMENT of a constant int is also very common.
2849 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2850 unsigned ElementSize = VT.getSizeInBits();
2851 unsigned Shift = ElementSize * N2C->getZExtValue();
2852 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2853 return getConstant(ShiftedVal.trunc(ElementSize), VT);
2856 case ISD::EXTRACT_SUBVECTOR:
2857 if (N1.getValueType() == VT) // Trivial extraction.
2864 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
2865 if (SV.getNode()) return SV;
2866 } else { // Cannonicalize constant to RHS if commutative
2867 if (isCommutativeBinOp(Opcode)) {
2868 std::swap(N1C, N2C);
2874 // Constant fold FP operations.
2875 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
2876 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
2878 if (!N2CFP && isCommutativeBinOp(Opcode)) {
2879 // Cannonicalize constant to RHS if commutative
2880 std::swap(N1CFP, N2CFP);
2882 } else if (N2CFP && VT != MVT::ppcf128) {
2883 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
2884 APFloat::opStatus s;
2887 s = V1.add(V2, APFloat::rmNearestTiesToEven);
2888 if (s != APFloat::opInvalidOp)
2889 return getConstantFP(V1, VT);
2892 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
2893 if (s!=APFloat::opInvalidOp)
2894 return getConstantFP(V1, VT);
2897 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
2898 if (s!=APFloat::opInvalidOp)
2899 return getConstantFP(V1, VT);
2902 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
2903 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2904 return getConstantFP(V1, VT);
2907 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
2908 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2909 return getConstantFP(V1, VT);
2911 case ISD::FCOPYSIGN:
2913 return getConstantFP(V1, VT);
2919 // Canonicalize an UNDEF to the RHS, even over a constant.
2920 if (N1.getOpcode() == ISD::UNDEF) {
2921 if (isCommutativeBinOp(Opcode)) {
2925 case ISD::FP_ROUND_INREG:
2926 case ISD::SIGN_EXTEND_INREG:
2932 return N1; // fold op(undef, arg2) -> undef
2940 return getConstant(0, VT); // fold op(undef, arg2) -> 0
2941 // For vectors, we can't easily build an all zero vector, just return
2948 // Fold a bunch of operators when the RHS is undef.
2949 if (N2.getOpcode() == ISD::UNDEF) {
2952 if (N1.getOpcode() == ISD::UNDEF)
2953 // Handle undef ^ undef -> 0 special case. This is a common
2955 return getConstant(0, VT);
2965 return N2; // fold op(arg1, undef) -> undef
2979 return getConstant(0, VT); // fold op(arg1, undef) -> 0
2980 // For vectors, we can't easily build an all zero vector, just return
2985 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
2986 // For vectors, we can't easily build an all one vector, just return
2994 // Memoize this node if possible.
2996 SDVTList VTs = getVTList(VT);
2997 if (VT != MVT::Flag) {
2998 SDValue Ops[] = { N1, N2 };
2999 FoldingSetNodeID ID;
3000 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
3002 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3003 return SDValue(E, 0);
3005 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
3006 CSEMap.InsertNode(N, IP);
3008 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
3011 AllNodes.push_back(N);
3015 return SDValue(N, 0);
3018 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3019 SDValue N1, SDValue N2, SDValue N3) {
3020 // Perform various simplifications.
3021 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
3022 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
3024 case ISD::CONCAT_VECTORS:
3025 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
3026 // one big BUILD_VECTOR.
3027 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
3028 N2.getOpcode() == ISD::BUILD_VECTOR &&
3029 N3.getOpcode() == ISD::BUILD_VECTOR) {
3030 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
3031 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
3032 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end());
3033 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
3037 // Use FoldSetCC to simplify SETCC's.
3038 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
3039 if (Simp.getNode()) return Simp;
3044 if (N1C->getZExtValue())
3045 return N2; // select true, X, Y -> X
3047 return N3; // select false, X, Y -> Y
3050 if (N2 == N3) return N2; // select C, X, X -> X
3054 if (N2C->getZExtValue()) // Unconditional branch
3055 return getNode(ISD::BR, DL, MVT::Other, N1, N3);
3057 return N1; // Never-taken branch
3060 case ISD::VECTOR_SHUFFLE:
3061 llvm_unreachable("should use getVectorShuffle constructor!");
3063 case ISD::BIT_CONVERT:
3064 // Fold bit_convert nodes from a type to themselves.
3065 if (N1.getValueType() == VT)
3070 // Memoize node if it doesn't produce a flag.
3072 SDVTList VTs = getVTList(VT);
3073 if (VT != MVT::Flag) {
3074 SDValue Ops[] = { N1, N2, N3 };
3075 FoldingSetNodeID ID;
3076 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3078 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3079 return SDValue(E, 0);
3081 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3082 CSEMap.InsertNode(N, IP);
3084 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3087 AllNodes.push_back(N);
3091 return SDValue(N, 0);
3094 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3095 SDValue N1, SDValue N2, SDValue N3,
3097 SDValue Ops[] = { N1, N2, N3, N4 };
3098 return getNode(Opcode, DL, VT, Ops, 4);
3101 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3102 SDValue N1, SDValue N2, SDValue N3,
3103 SDValue N4, SDValue N5) {
3104 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3105 return getNode(Opcode, DL, VT, Ops, 5);
3108 /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
3109 /// the incoming stack arguments to be loaded from the stack.
3110 SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) {
3111 SmallVector<SDValue, 8> ArgChains;
3113 // Include the original chain at the beginning of the list. When this is
3114 // used by target LowerCall hooks, this helps legalize find the
3115 // CALLSEQ_BEGIN node.
3116 ArgChains.push_back(Chain);
3118 // Add a chain value for each stack argument.
3119 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
3120 UE = getEntryNode().getNode()->use_end(); U != UE; ++U)
3121 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
3122 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
3123 if (FI->getIndex() < 0)
3124 ArgChains.push_back(SDValue(L, 1));
3126 // Build a tokenfactor for all the chains.
3127 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other,
3128 &ArgChains[0], ArgChains.size());
3131 /// getMemsetValue - Vectorized representation of the memset value
3133 static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
3135 assert(Value.getOpcode() != ISD::UNDEF);
3137 unsigned NumBits = VT.getScalarType().getSizeInBits();
3138 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
3139 APInt Val = APInt(NumBits, C->getZExtValue() & 255);
3141 for (unsigned i = NumBits; i > 8; i >>= 1) {
3142 Val = (Val << Shift) | Val;
3146 return DAG.getConstant(Val, VT);
3147 return DAG.getConstantFP(APFloat(Val), VT);
3150 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3151 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value);
3153 for (unsigned i = NumBits; i > 8; i >>= 1) {
3154 Value = DAG.getNode(ISD::OR, dl, VT,
3155 DAG.getNode(ISD::SHL, dl, VT, Value,
3156 DAG.getConstant(Shift,
3157 TLI.getShiftAmountTy())),
3165 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
3166 /// used when a memcpy is turned into a memset when the source is a constant
3168 static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG,
3169 const TargetLowering &TLI,
3170 std::string &Str, unsigned Offset) {
3171 // Handle vector with all elements zero.
3174 return DAG.getConstant(0, VT);
3175 else if (VT.getSimpleVT().SimpleTy == MVT::f32 ||
3176 VT.getSimpleVT().SimpleTy == MVT::f64)
3177 return DAG.getConstantFP(0.0, VT);
3178 else if (VT.isVector()) {
3179 unsigned NumElts = VT.getVectorNumElements();
3180 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
3181 return DAG.getNode(ISD::BIT_CONVERT, dl, VT,
3182 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(),
3185 llvm_unreachable("Expected type!");
3188 assert(!VT.isVector() && "Can't handle vector type here!");
3189 unsigned NumBits = VT.getSizeInBits();
3190 unsigned MSB = NumBits / 8;
3192 if (TLI.isLittleEndian())
3193 Offset = Offset + MSB - 1;
3194 for (unsigned i = 0; i != MSB; ++i) {
3195 Val = (Val << 8) | (unsigned char)Str[Offset];
3196 Offset += TLI.isLittleEndian() ? -1 : 1;
3198 return DAG.getConstant(Val, VT);
3201 /// getMemBasePlusOffset - Returns base and offset node for the
3203 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
3204 SelectionDAG &DAG) {
3205 EVT VT = Base.getValueType();
3206 return DAG.getNode(ISD::ADD, Base.getDebugLoc(),
3207 VT, Base, DAG.getConstant(Offset, VT));
3210 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
3212 static bool isMemSrcFromString(SDValue Src, std::string &Str) {
3213 unsigned SrcDelta = 0;
3214 GlobalAddressSDNode *G = NULL;
3215 if (Src.getOpcode() == ISD::GlobalAddress)
3216 G = cast<GlobalAddressSDNode>(Src);
3217 else if (Src.getOpcode() == ISD::ADD &&
3218 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
3219 Src.getOperand(1).getOpcode() == ISD::Constant) {
3220 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
3221 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
3226 const GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal());
3227 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false))
3233 /// FindOptimalMemOpLowering - Determines the optimial series memory ops
3234 /// to replace the memset / memcpy. Return true if the number of memory ops
3235 /// is below the threshold. It returns the types of the sequence of
3236 /// memory ops to perform memset / memcpy by reference.
3237 static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps,
3238 unsigned Limit, uint64_t Size,
3239 unsigned DstAlign, unsigned SrcAlign,
3240 bool NonScalarIntSafe,
3243 const TargetLowering &TLI) {
3244 assert((SrcAlign == 0 || SrcAlign >= DstAlign) &&
3245 "Expecting memcpy / memset source to meet alignment requirement!");
3246 // If 'SrcAlign' is zero, that means the memory operation does not need load
3247 // the value, i.e. memset or memcpy from constant string. Otherwise, it's
3248 // the inferred alignment of the source. 'DstAlign', on the other hand, is the
3249 // specified alignment of the memory operation. If it is zero, that means
3250 // it's possible to change the alignment of the destination. 'MemcpyStrSrc'
3251 // indicates whether the memcpy source is constant so it does not need to be
3253 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign,
3254 NonScalarIntSafe, MemcpyStrSrc,
3255 DAG.getMachineFunction());
3257 if (VT == MVT::Other) {
3258 if (DstAlign >= TLI.getTargetData()->getPointerPrefAlignment() ||
3259 TLI.allowsUnalignedMemoryAccesses(VT)) {
3260 VT = TLI.getPointerTy();
3262 switch (DstAlign & 7) {
3263 case 0: VT = MVT::i64; break;
3264 case 4: VT = MVT::i32; break;
3265 case 2: VT = MVT::i16; break;
3266 default: VT = MVT::i8; break;
3271 while (!TLI.isTypeLegal(LVT))
3272 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1);
3273 assert(LVT.isInteger());
3279 // If we're optimizing for size, and there is a limit, bump the maximum number
3280 // of operations inserted down to 4. This is a wild guess that approximates
3281 // the size of a call to memcpy or memset (3 arguments + call).
3283 const Function *F = DAG.getMachineFunction().getFunction();
3284 if (F->hasFnAttr(Attribute::OptimizeForSize))
3288 unsigned NumMemOps = 0;
3290 unsigned VTSize = VT.getSizeInBits() / 8;
3291 while (VTSize > Size) {
3292 // For now, only use non-vector load / store's for the left-over pieces.
3293 if (VT.isVector() || VT.isFloatingPoint()) {
3295 while (!TLI.isTypeLegal(VT))
3296 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3297 VTSize = VT.getSizeInBits() / 8;
3299 // This can result in a type that is not legal on the target, e.g.
3300 // 1 or 2 bytes on PPC.
3301 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3306 if (++NumMemOps > Limit)
3308 MemOps.push_back(VT);
3315 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3316 SDValue Chain, SDValue Dst,
3317 SDValue Src, uint64_t Size,
3318 unsigned Align, bool isVol,
3320 const Value *DstSV, uint64_t DstSVOff,
3321 const Value *SrcSV, uint64_t SrcSVOff) {
3322 // Turn a memcpy of undef to nop.
3323 if (Src.getOpcode() == ISD::UNDEF)
3326 // Expand memcpy to a series of load and store ops if the size operand falls
3327 // below a certain threshold.
3328 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3329 std::vector<EVT> MemOps;
3330 bool DstAlignCanChange = false;
3331 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
3332 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3333 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3334 DstAlignCanChange = true;
3335 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3336 if (Align > SrcAlign)
3339 bool CopyFromStr = isMemSrcFromString(Src, Str);
3340 bool isZeroStr = CopyFromStr && Str.empty();
3341 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy();
3343 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3344 (DstAlignCanChange ? 0 : Align),
3345 (isZeroStr ? 0 : SrcAlign),
3346 true, CopyFromStr, DAG, TLI))
3349 if (DstAlignCanChange) {
3350 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3351 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3352 if (NewAlign > Align) {
3353 // Give the stack frame object a larger alignment if needed.
3354 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3355 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3360 SmallVector<SDValue, 8> OutChains;
3361 unsigned NumMemOps = MemOps.size();
3362 uint64_t SrcOff = 0, DstOff = 0;
3363 for (unsigned i = 0; i != NumMemOps; ++i) {
3365 unsigned VTSize = VT.getSizeInBits() / 8;
3366 SDValue Value, Store;
3369 (isZeroStr || (VT.isInteger() && !VT.isVector()))) {
3370 // It's unlikely a store of a vector immediate can be done in a single
3371 // instruction. It would require a load from a constantpool first.
3372 // We only handle zero vectors here.
3373 // FIXME: Handle other cases where store of vector immediate is done in
3374 // a single instruction.
3375 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff);
3376 Store = DAG.getStore(Chain, dl, Value,
3377 getMemBasePlusOffset(Dst, DstOff, DAG),
3378 DstSV, DstSVOff + DstOff, isVol, false, Align);
3380 // The type might not be legal for the target. This should only happen
3381 // if the type is smaller than a legal type, as on PPC, so the right
3382 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify
3383 // to Load/Store if NVT==VT.
3384 // FIXME does the case above also need this?
3385 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
3386 assert(NVT.bitsGE(VT));
3387 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain,
3388 getMemBasePlusOffset(Src, SrcOff, DAG),
3389 SrcSV, SrcSVOff + SrcOff, VT, isVol, false,
3390 MinAlign(SrcAlign, SrcOff));
3391 Store = DAG.getTruncStore(Chain, dl, Value,
3392 getMemBasePlusOffset(Dst, DstOff, DAG),
3393 DstSV, DstSVOff + DstOff, VT, isVol, false,
3396 OutChains.push_back(Store);
3401 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3402 &OutChains[0], OutChains.size());
3405 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3406 SDValue Chain, SDValue Dst,
3407 SDValue Src, uint64_t Size,
3408 unsigned Align, bool isVol,
3410 const Value *DstSV, uint64_t DstSVOff,
3411 const Value *SrcSV, uint64_t SrcSVOff) {
3412 // Turn a memmove of undef to nop.
3413 if (Src.getOpcode() == ISD::UNDEF)
3416 // Expand memmove to a series of load and store ops if the size operand falls
3417 // below a certain threshold.
3418 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3419 std::vector<EVT> MemOps;
3420 bool DstAlignCanChange = false;
3421 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
3422 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3423 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3424 DstAlignCanChange = true;
3425 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3426 if (Align > SrcAlign)
3428 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove();
3430 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3431 (DstAlignCanChange ? 0 : Align),
3432 SrcAlign, true, false, DAG, TLI))
3435 if (DstAlignCanChange) {
3436 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3437 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3438 if (NewAlign > Align) {
3439 // Give the stack frame object a larger alignment if needed.
3440 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3441 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3446 uint64_t SrcOff = 0, DstOff = 0;
3447 SmallVector<SDValue, 8> LoadValues;
3448 SmallVector<SDValue, 8> LoadChains;
3449 SmallVector<SDValue, 8> OutChains;
3450 unsigned NumMemOps = MemOps.size();
3451 for (unsigned i = 0; i < NumMemOps; i++) {
3453 unsigned VTSize = VT.getSizeInBits() / 8;
3454 SDValue Value, Store;
3456 Value = DAG.getLoad(VT, dl, Chain,
3457 getMemBasePlusOffset(Src, SrcOff, DAG),
3458 SrcSV, SrcSVOff + SrcOff, isVol, false, SrcAlign);
3459 LoadValues.push_back(Value);
3460 LoadChains.push_back(Value.getValue(1));
3463 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3464 &LoadChains[0], LoadChains.size());
3466 for (unsigned i = 0; i < NumMemOps; i++) {
3468 unsigned VTSize = VT.getSizeInBits() / 8;
3469 SDValue Value, Store;
3471 Store = DAG.getStore(Chain, dl, LoadValues[i],
3472 getMemBasePlusOffset(Dst, DstOff, DAG),
3473 DstSV, DstSVOff + DstOff, isVol, false, Align);
3474 OutChains.push_back(Store);
3478 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3479 &OutChains[0], OutChains.size());
3482 static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl,
3483 SDValue Chain, SDValue Dst,
3484 SDValue Src, uint64_t Size,
3485 unsigned Align, bool isVol,
3486 const Value *DstSV, uint64_t DstSVOff) {
3487 // Turn a memset of undef to nop.
3488 if (Src.getOpcode() == ISD::UNDEF)
3491 // Expand memset to a series of load/store ops if the size operand
3492 // falls below a certain threshold.
3493 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3494 std::vector<EVT> MemOps;
3495 bool DstAlignCanChange = false;
3496 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
3497 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3498 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3499 DstAlignCanChange = true;
3500 bool NonScalarIntSafe =
3501 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue();
3502 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(),
3503 Size, (DstAlignCanChange ? 0 : Align), 0,
3504 NonScalarIntSafe, false, DAG, TLI))
3507 if (DstAlignCanChange) {
3508 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3509 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3510 if (NewAlign > Align) {
3511 // Give the stack frame object a larger alignment if needed.
3512 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3513 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3518 SmallVector<SDValue, 8> OutChains;
3519 uint64_t DstOff = 0;
3520 unsigned NumMemOps = MemOps.size();
3521 for (unsigned i = 0; i < NumMemOps; i++) {
3523 unsigned VTSize = VT.getSizeInBits() / 8;
3524 SDValue Value = getMemsetValue(Src, VT, DAG, dl);
3525 SDValue Store = DAG.getStore(Chain, dl, Value,
3526 getMemBasePlusOffset(Dst, DstOff, DAG),
3527 DstSV, DstSVOff + DstOff, isVol, false, 0);
3528 OutChains.push_back(Store);
3532 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3533 &OutChains[0], OutChains.size());
3536 SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst,
3537 SDValue Src, SDValue Size,
3538 unsigned Align, bool isVol, bool AlwaysInline,
3539 const Value *DstSV, uint64_t DstSVOff,
3540 const Value *SrcSV, uint64_t SrcSVOff) {
3542 // Check to see if we should lower the memcpy to loads and stores first.
3543 // For cases within the target-specified limits, this is the best choice.
3544 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3546 // Memcpy with size zero? Just return the original chain.
3547 if (ConstantSize->isNullValue())
3550 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3551 ConstantSize->getZExtValue(),Align,
3552 isVol, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3553 if (Result.getNode())
3557 // Then check to see if we should lower the memcpy with target-specific
3558 // code. If the target chooses to do this, this is the next best.
3560 TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align,
3561 isVol, AlwaysInline,
3562 DstSV, DstSVOff, SrcSV, SrcSVOff);
3563 if (Result.getNode())
3566 // If we really need inline code and the target declined to provide it,
3567 // use a (potentially long) sequence of loads and stores.
3569 assert(ConstantSize && "AlwaysInline requires a constant size!");
3570 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3571 ConstantSize->getZExtValue(), Align, isVol,
3572 true, DstSV, DstSVOff, SrcSV, SrcSVOff);
3575 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc
3576 // memcpy is not guaranteed to be safe. libc memcpys aren't required to
3577 // respect volatile, so they may do things like read or write memory
3578 // beyond the given memory regions. But fixing this isn't easy, and most
3579 // people don't care.
3581 // Emit a library call.
3582 TargetLowering::ArgListTy Args;
3583 TargetLowering::ArgListEntry Entry;
3584 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3585 Entry.Node = Dst; Args.push_back(Entry);
3586 Entry.Node = Src; Args.push_back(Entry);
3587 Entry.Node = Size; Args.push_back(Entry);
3588 // FIXME: pass in DebugLoc
3589 std::pair<SDValue,SDValue> CallResult =
3590 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3591 false, false, false, false, 0,
3592 TLI.getLibcallCallingConv(RTLIB::MEMCPY), false,
3593 /*isReturnValueUsed=*/false,
3594 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY),
3595 TLI.getPointerTy()),
3597 return CallResult.second;
3600 SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst,
3601 SDValue Src, SDValue Size,
3602 unsigned Align, bool isVol,
3603 const Value *DstSV, uint64_t DstSVOff,
3604 const Value *SrcSV, uint64_t SrcSVOff) {
3606 // Check to see if we should lower the memmove to loads and stores first.
3607 // For cases within the target-specified limits, this is the best choice.
3608 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3610 // Memmove with size zero? Just return the original chain.
3611 if (ConstantSize->isNullValue())
3615 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
3616 ConstantSize->getZExtValue(), Align, isVol,
3617 false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3618 if (Result.getNode())
3622 // Then check to see if we should lower the memmove with target-specific
3623 // code. If the target chooses to do this, this is the next best.
3625 TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3626 DstSV, DstSVOff, SrcSV, SrcSVOff);
3627 if (Result.getNode())
3630 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may
3631 // not be safe. See memcpy above for more details.
3633 // Emit a library call.
3634 TargetLowering::ArgListTy Args;
3635 TargetLowering::ArgListEntry Entry;
3636 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3637 Entry.Node = Dst; Args.push_back(Entry);
3638 Entry.Node = Src; Args.push_back(Entry);
3639 Entry.Node = Size; Args.push_back(Entry);
3640 // FIXME: pass in DebugLoc
3641 std::pair<SDValue,SDValue> CallResult =
3642 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3643 false, false, false, false, 0,
3644 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), false,
3645 /*isReturnValueUsed=*/false,
3646 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE),
3647 TLI.getPointerTy()),
3649 return CallResult.second;
3652 SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst,
3653 SDValue Src, SDValue Size,
3654 unsigned Align, bool isVol,
3655 const Value *DstSV, uint64_t DstSVOff) {
3657 // Check to see if we should lower the memset to stores first.
3658 // For cases within the target-specified limits, this is the best choice.
3659 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3661 // Memset with size zero? Just return the original chain.
3662 if (ConstantSize->isNullValue())
3666 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
3667 Align, isVol, DstSV, DstSVOff);
3669 if (Result.getNode())
3673 // Then check to see if we should lower the memset with target-specific
3674 // code. If the target chooses to do this, this is the next best.
3676 TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3678 if (Result.getNode())
3681 // Emit a library call.
3682 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext());
3683 TargetLowering::ArgListTy Args;
3684 TargetLowering::ArgListEntry Entry;
3685 Entry.Node = Dst; Entry.Ty = IntPtrTy;
3686 Args.push_back(Entry);
3687 // Extend or truncate the argument to be an i32 value for the call.
3688 if (Src.getValueType().bitsGT(MVT::i32))
3689 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
3691 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
3693 Entry.Ty = Type::getInt32Ty(*getContext());
3694 Entry.isSExt = true;
3695 Args.push_back(Entry);
3697 Entry.Ty = IntPtrTy;
3698 Entry.isSExt = false;
3699 Args.push_back(Entry);
3700 // FIXME: pass in DebugLoc
3701 std::pair<SDValue,SDValue> CallResult =
3702 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3703 false, false, false, false, 0,
3704 TLI.getLibcallCallingConv(RTLIB::MEMSET), false,
3705 /*isReturnValueUsed=*/false,
3706 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET),
3707 TLI.getPointerTy()),
3709 return CallResult.second;
3712 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3714 SDValue Ptr, SDValue Cmp,
3715 SDValue Swp, const Value* PtrVal,
3716 unsigned Alignment) {
3717 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3718 Alignment = getEVTAlignment(MemVT);
3720 // Check if the memory reference references a frame index
3722 if (const FrameIndexSDNode *FI =
3723 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
3724 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex());
3726 MachineFunction &MF = getMachineFunction();
3727 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
3729 // For now, atomics are considered to be volatile always.
3730 Flags |= MachineMemOperand::MOVolatile;
3732 MachineMemOperand *MMO =
3733 MF.getMachineMemOperand(PtrVal, Flags, 0,
3734 MemVT.getStoreSize(), Alignment);
3736 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO);
3739 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3741 SDValue Ptr, SDValue Cmp,
3742 SDValue Swp, MachineMemOperand *MMO) {
3743 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
3744 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3746 EVT VT = Cmp.getValueType();
3748 SDVTList VTs = getVTList(VT, MVT::Other);
3749 FoldingSetNodeID ID;
3750 ID.AddInteger(MemVT.getRawBits());
3751 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3752 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3754 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3755 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3756 return SDValue(E, 0);
3758 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
3759 Ptr, Cmp, Swp, MMO);
3760 CSEMap.InsertNode(N, IP);
3761 AllNodes.push_back(N);
3762 return SDValue(N, 0);
3765 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3767 SDValue Ptr, SDValue Val,
3768 const Value* PtrVal,
3769 unsigned Alignment) {
3770 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3771 Alignment = getEVTAlignment(MemVT);
3773 // Check if the memory reference references a frame index
3775 if (const FrameIndexSDNode *FI =
3776 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
3777 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex());
3779 MachineFunction &MF = getMachineFunction();
3780 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
3782 // For now, atomics are considered to be volatile always.
3783 Flags |= MachineMemOperand::MOVolatile;
3785 MachineMemOperand *MMO =
3786 MF.getMachineMemOperand(PtrVal, Flags, 0,
3787 MemVT.getStoreSize(), Alignment);
3789 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO);
3792 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3794 SDValue Ptr, SDValue Val,
3795 MachineMemOperand *MMO) {
3796 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
3797 Opcode == ISD::ATOMIC_LOAD_SUB ||
3798 Opcode == ISD::ATOMIC_LOAD_AND ||
3799 Opcode == ISD::ATOMIC_LOAD_OR ||
3800 Opcode == ISD::ATOMIC_LOAD_XOR ||
3801 Opcode == ISD::ATOMIC_LOAD_NAND ||
3802 Opcode == ISD::ATOMIC_LOAD_MIN ||
3803 Opcode == ISD::ATOMIC_LOAD_MAX ||
3804 Opcode == ISD::ATOMIC_LOAD_UMIN ||
3805 Opcode == ISD::ATOMIC_LOAD_UMAX ||
3806 Opcode == ISD::ATOMIC_SWAP) &&
3807 "Invalid Atomic Op");
3809 EVT VT = Val.getValueType();
3811 SDVTList VTs = getVTList(VT, MVT::Other);
3812 FoldingSetNodeID ID;
3813 ID.AddInteger(MemVT.getRawBits());
3814 SDValue Ops[] = {Chain, Ptr, Val};
3815 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3817 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3818 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3819 return SDValue(E, 0);
3821 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
3823 CSEMap.InsertNode(N, IP);
3824 AllNodes.push_back(N);
3825 return SDValue(N, 0);
3828 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
3829 /// Allowed to return something different (and simpler) if Simplify is true.
3830 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps,
3835 SmallVector<EVT, 4> VTs;
3836 VTs.reserve(NumOps);
3837 for (unsigned i = 0; i < NumOps; ++i)
3838 VTs.push_back(Ops[i].getValueType());
3839 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps),
3844 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl,
3845 const EVT *VTs, unsigned NumVTs,
3846 const SDValue *Ops, unsigned NumOps,
3847 EVT MemVT, const Value *srcValue, int SVOff,
3848 unsigned Align, bool Vol,
3849 bool ReadMem, bool WriteMem) {
3850 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps,
3851 MemVT, srcValue, SVOff, Align, Vol,
3856 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
3857 const SDValue *Ops, unsigned NumOps,
3858 EVT MemVT, const Value *srcValue, int SVOff,
3859 unsigned Align, bool Vol,
3860 bool ReadMem, bool WriteMem) {
3861 if (Align == 0) // Ensure that codegen never sees alignment 0
3862 Align = getEVTAlignment(MemVT);
3864 MachineFunction &MF = getMachineFunction();
3867 Flags |= MachineMemOperand::MOStore;
3869 Flags |= MachineMemOperand::MOLoad;
3871 Flags |= MachineMemOperand::MOVolatile;
3872 MachineMemOperand *MMO =
3873 MF.getMachineMemOperand(srcValue, Flags, SVOff,
3874 MemVT.getStoreSize(), Align);
3876 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO);
3880 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
3881 const SDValue *Ops, unsigned NumOps,
3882 EVT MemVT, MachineMemOperand *MMO) {
3883 assert((Opcode == ISD::INTRINSIC_VOID ||
3884 Opcode == ISD::INTRINSIC_W_CHAIN ||
3885 (Opcode <= INT_MAX &&
3886 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) &&
3887 "Opcode is not a memory-accessing opcode!");
3889 // Memoize the node unless it returns a flag.
3890 MemIntrinsicSDNode *N;
3891 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3892 FoldingSetNodeID ID;
3893 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3895 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3896 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO);
3897 return SDValue(E, 0);
3900 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
3902 CSEMap.InsertNode(N, IP);
3904 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
3907 AllNodes.push_back(N);
3908 return SDValue(N, 0);
3912 SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl,
3913 ISD::LoadExtType ExtType, EVT VT, SDValue Chain,
3914 SDValue Ptr, SDValue Offset,
3915 const Value *SV, int SVOffset, EVT MemVT,
3916 bool isVolatile, bool isNonTemporal,
3917 unsigned Alignment) {
3918 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3919 Alignment = getEVTAlignment(VT);
3921 // Check if the memory reference references a frame index
3923 if (const FrameIndexSDNode *FI =
3924 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
3925 SV = PseudoSourceValue::getFixedStack(FI->getIndex());
3927 MachineFunction &MF = getMachineFunction();
3928 unsigned Flags = MachineMemOperand::MOLoad;
3930 Flags |= MachineMemOperand::MOVolatile;
3932 Flags |= MachineMemOperand::MONonTemporal;
3933 MachineMemOperand *MMO =
3934 MF.getMachineMemOperand(SV, Flags, SVOffset,
3935 MemVT.getStoreSize(), Alignment);
3936 return getLoad(AM, dl, ExtType, VT, Chain, Ptr, Offset, MemVT, MMO);
3940 SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl,
3941 ISD::LoadExtType ExtType, EVT VT, SDValue Chain,
3942 SDValue Ptr, SDValue Offset, EVT MemVT,
3943 MachineMemOperand *MMO) {
3945 ExtType = ISD::NON_EXTLOAD;
3946 } else if (ExtType == ISD::NON_EXTLOAD) {
3947 assert(VT == MemVT && "Non-extending load from different memory type!");
3950 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) &&
3951 "Should only be an extending load, not truncating!");
3952 assert(VT.isInteger() == MemVT.isInteger() &&
3953 "Cannot convert from FP to Int or Int -> FP!");
3954 assert(VT.isVector() == MemVT.isVector() &&
3955 "Cannot use trunc store to convert to or from a vector!");
3956 assert((!VT.isVector() ||
3957 VT.getVectorNumElements() == MemVT.getVectorNumElements()) &&
3958 "Cannot use trunc store to change the number of vector elements!");
3961 bool Indexed = AM != ISD::UNINDEXED;
3962 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
3963 "Unindexed load with an offset!");
3965 SDVTList VTs = Indexed ?
3966 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
3967 SDValue Ops[] = { Chain, Ptr, Offset };
3968 FoldingSetNodeID ID;
3969 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
3970 ID.AddInteger(MemVT.getRawBits());
3971 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(),
3972 MMO->isNonTemporal()));
3974 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3975 cast<LoadSDNode>(E)->refineAlignment(MMO);
3976 return SDValue(E, 0);
3978 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType,
3980 CSEMap.InsertNode(N, IP);
3981 AllNodes.push_back(N);
3982 return SDValue(N, 0);
3985 SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl,
3986 SDValue Chain, SDValue Ptr,
3987 const Value *SV, int SVOffset,
3988 bool isVolatile, bool isNonTemporal,
3989 unsigned Alignment) {
3990 SDValue Undef = getUNDEF(Ptr.getValueType());
3991 return getLoad(ISD::UNINDEXED, dl, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef,
3992 SV, SVOffset, VT, isVolatile, isNonTemporal, Alignment);
3995 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT,
3996 SDValue Chain, SDValue Ptr,
3998 int SVOffset, EVT MemVT,
3999 bool isVolatile, bool isNonTemporal,
4000 unsigned Alignment) {
4001 SDValue Undef = getUNDEF(Ptr.getValueType());
4002 return getLoad(ISD::UNINDEXED, dl, ExtType, VT, Chain, Ptr, Undef,
4003 SV, SVOffset, MemVT, isVolatile, isNonTemporal, Alignment);
4007 SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base,
4008 SDValue Offset, ISD::MemIndexedMode AM) {
4009 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
4010 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
4011 "Load is already a indexed load!");
4012 return getLoad(AM, dl, LD->getExtensionType(), OrigLoad.getValueType(),
4013 LD->getChain(), Base, Offset, LD->getSrcValue(),
4014 LD->getSrcValueOffset(), LD->getMemoryVT(),
4015 LD->isVolatile(), LD->isNonTemporal(), LD->getAlignment());
4018 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4019 SDValue Ptr, const Value *SV, int SVOffset,
4020 bool isVolatile, bool isNonTemporal,
4021 unsigned Alignment) {
4022 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4023 Alignment = getEVTAlignment(Val.getValueType());
4025 // Check if the memory reference references a frame index
4027 if (const FrameIndexSDNode *FI =
4028 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
4029 SV = PseudoSourceValue::getFixedStack(FI->getIndex());
4031 MachineFunction &MF = getMachineFunction();
4032 unsigned Flags = MachineMemOperand::MOStore;
4034 Flags |= MachineMemOperand::MOVolatile;
4036 Flags |= MachineMemOperand::MONonTemporal;
4037 MachineMemOperand *MMO =
4038 MF.getMachineMemOperand(SV, Flags, SVOffset,
4039 Val.getValueType().getStoreSize(), Alignment);
4041 return getStore(Chain, dl, Val, Ptr, MMO);
4044 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4045 SDValue Ptr, MachineMemOperand *MMO) {
4046 EVT VT = Val.getValueType();
4047 SDVTList VTs = getVTList(MVT::Other);
4048 SDValue Undef = getUNDEF(Ptr.getValueType());
4049 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4050 FoldingSetNodeID ID;
4051 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4052 ID.AddInteger(VT.getRawBits());
4053 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
4054 MMO->isNonTemporal()));
4056 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4057 cast<StoreSDNode>(E)->refineAlignment(MMO);
4058 return SDValue(E, 0);
4060 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4062 CSEMap.InsertNode(N, IP);
4063 AllNodes.push_back(N);
4064 return SDValue(N, 0);
4067 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4068 SDValue Ptr, const Value *SV,
4069 int SVOffset, EVT SVT,
4070 bool isVolatile, bool isNonTemporal,
4071 unsigned Alignment) {
4072 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4073 Alignment = getEVTAlignment(SVT);
4075 // Check if the memory reference references a frame index
4077 if (const FrameIndexSDNode *FI =
4078 dyn_cast<const FrameIndexSDNode>(Ptr.getNode()))
4079 SV = PseudoSourceValue::getFixedStack(FI->getIndex());
4081 MachineFunction &MF = getMachineFunction();
4082 unsigned Flags = MachineMemOperand::MOStore;
4084 Flags |= MachineMemOperand::MOVolatile;
4086 Flags |= MachineMemOperand::MONonTemporal;
4087 MachineMemOperand *MMO =
4088 MF.getMachineMemOperand(SV, Flags, SVOffset, SVT.getStoreSize(), Alignment);
4090 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO);
4093 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4094 SDValue Ptr, EVT SVT,
4095 MachineMemOperand *MMO) {
4096 EVT VT = Val.getValueType();
4099 return getStore(Chain, dl, Val, Ptr, MMO);
4101 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) &&
4102 "Should only be a truncating store, not extending!");
4103 assert(VT.isInteger() == SVT.isInteger() &&
4104 "Can't do FP-INT conversion!");
4105 assert(VT.isVector() == SVT.isVector() &&
4106 "Cannot use trunc store to convert to or from a vector!");
4107 assert((!VT.isVector() ||
4108 VT.getVectorNumElements() == SVT.getVectorNumElements()) &&
4109 "Cannot use trunc store to change the number of vector elements!");
4111 SDVTList VTs = getVTList(MVT::Other);
4112 SDValue Undef = getUNDEF(Ptr.getValueType());
4113 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4114 FoldingSetNodeID ID;
4115 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4116 ID.AddInteger(SVT.getRawBits());
4117 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(),
4118 MMO->isNonTemporal()));
4120 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4121 cast<StoreSDNode>(E)->refineAlignment(MMO);
4122 return SDValue(E, 0);
4124 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4126 CSEMap.InsertNode(N, IP);
4127 AllNodes.push_back(N);
4128 return SDValue(N, 0);
4132 SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base,
4133 SDValue Offset, ISD::MemIndexedMode AM) {
4134 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
4135 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
4136 "Store is already a indexed store!");
4137 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
4138 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
4139 FoldingSetNodeID ID;
4140 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4141 ID.AddInteger(ST->getMemoryVT().getRawBits());
4142 ID.AddInteger(ST->getRawSubclassData());
4144 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4145 return SDValue(E, 0);
4147 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM,
4148 ST->isTruncatingStore(),
4150 ST->getMemOperand());
4151 CSEMap.InsertNode(N, IP);
4152 AllNodes.push_back(N);
4153 return SDValue(N, 0);
4156 SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl,
4157 SDValue Chain, SDValue Ptr,
4159 SDValue Ops[] = { Chain, Ptr, SV };
4160 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 3);
4163 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4164 const SDUse *Ops, unsigned NumOps) {
4166 case 0: return getNode(Opcode, DL, VT);
4167 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4168 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4169 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4173 // Copy from an SDUse array into an SDValue array for use with
4174 // the regular getNode logic.
4175 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
4176 return getNode(Opcode, DL, VT, &NewOps[0], NumOps);
4179 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4180 const SDValue *Ops, unsigned NumOps) {
4182 case 0: return getNode(Opcode, DL, VT);
4183 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4184 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4185 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4191 case ISD::SELECT_CC: {
4192 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
4193 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
4194 "LHS and RHS of condition must have same type!");
4195 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4196 "True and False arms of SelectCC must have same type!");
4197 assert(Ops[2].getValueType() == VT &&
4198 "select_cc node must be of same type as true and false value!");
4202 assert(NumOps == 5 && "BR_CC takes 5 operands!");
4203 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4204 "LHS/RHS of comparison should match types!");
4211 SDVTList VTs = getVTList(VT);
4213 if (VT != MVT::Flag) {
4214 FoldingSetNodeID ID;
4215 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
4218 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4219 return SDValue(E, 0);
4221 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4222 CSEMap.InsertNode(N, IP);
4224 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4227 AllNodes.push_back(N);
4231 return SDValue(N, 0);
4234 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4235 const std::vector<EVT> &ResultTys,
4236 const SDValue *Ops, unsigned NumOps) {
4237 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()),
4241 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4242 const EVT *VTs, unsigned NumVTs,
4243 const SDValue *Ops, unsigned NumOps) {
4245 return getNode(Opcode, DL, VTs[0], Ops, NumOps);
4246 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps);
4249 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4250 const SDValue *Ops, unsigned NumOps) {
4251 if (VTList.NumVTs == 1)
4252 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps);
4256 // FIXME: figure out how to safely handle things like
4257 // int foo(int x) { return 1 << (x & 255); }
4258 // int bar() { return foo(256); }
4259 case ISD::SRA_PARTS:
4260 case ISD::SRL_PARTS:
4261 case ISD::SHL_PARTS:
4262 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
4263 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
4264 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4265 else if (N3.getOpcode() == ISD::AND)
4266 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
4267 // If the and is only masking out bits that cannot effect the shift,
4268 // eliminate the and.
4269 unsigned NumBits = VT.getScalarType().getSizeInBits()*2;
4270 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
4271 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4277 // Memoize the node unless it returns a flag.
4279 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4280 FoldingSetNodeID ID;
4281 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4283 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4284 return SDValue(E, 0);
4287 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4288 } else if (NumOps == 2) {
4289 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4290 } else if (NumOps == 3) {
4291 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4294 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4296 CSEMap.InsertNode(N, IP);
4299 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4300 } else if (NumOps == 2) {
4301 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4302 } else if (NumOps == 3) {
4303 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4306 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4309 AllNodes.push_back(N);
4313 return SDValue(N, 0);
4316 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) {
4317 return getNode(Opcode, DL, VTList, 0, 0);
4320 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4322 SDValue Ops[] = { N1 };
4323 return getNode(Opcode, DL, VTList, Ops, 1);
4326 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4327 SDValue N1, SDValue N2) {
4328 SDValue Ops[] = { N1, N2 };
4329 return getNode(Opcode, DL, VTList, Ops, 2);
4332 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4333 SDValue N1, SDValue N2, SDValue N3) {
4334 SDValue Ops[] = { N1, N2, N3 };
4335 return getNode(Opcode, DL, VTList, Ops, 3);
4338 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4339 SDValue N1, SDValue N2, SDValue N3,
4341 SDValue Ops[] = { N1, N2, N3, N4 };
4342 return getNode(Opcode, DL, VTList, Ops, 4);
4345 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4346 SDValue N1, SDValue N2, SDValue N3,
4347 SDValue N4, SDValue N5) {
4348 SDValue Ops[] = { N1, N2, N3, N4, N5 };
4349 return getNode(Opcode, DL, VTList, Ops, 5);
4352 SDVTList SelectionDAG::getVTList(EVT VT) {
4353 return makeVTList(SDNode::getValueTypeList(VT), 1);
4356 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
4357 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4358 E = VTList.rend(); I != E; ++I)
4359 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
4362 EVT *Array = Allocator.Allocate<EVT>(2);
4365 SDVTList Result = makeVTList(Array, 2);
4366 VTList.push_back(Result);
4370 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
4371 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4372 E = VTList.rend(); I != E; ++I)
4373 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4377 EVT *Array = Allocator.Allocate<EVT>(3);
4381 SDVTList Result = makeVTList(Array, 3);
4382 VTList.push_back(Result);
4386 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
4387 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4388 E = VTList.rend(); I != E; ++I)
4389 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4390 I->VTs[2] == VT3 && I->VTs[3] == VT4)
4393 EVT *Array = Allocator.Allocate<EVT>(4);
4398 SDVTList Result = makeVTList(Array, 4);
4399 VTList.push_back(Result);
4403 SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) {
4405 case 0: llvm_unreachable("Cannot have nodes without results!");
4406 case 1: return getVTList(VTs[0]);
4407 case 2: return getVTList(VTs[0], VTs[1]);
4408 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
4409 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]);
4413 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4414 E = VTList.rend(); I != E; ++I) {
4415 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
4418 bool NoMatch = false;
4419 for (unsigned i = 2; i != NumVTs; ++i)
4420 if (VTs[i] != I->VTs[i]) {
4428 EVT *Array = Allocator.Allocate<EVT>(NumVTs);
4429 std::copy(VTs, VTs+NumVTs, Array);
4430 SDVTList Result = makeVTList(Array, NumVTs);
4431 VTList.push_back(Result);
4436 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
4437 /// specified operands. If the resultant node already exists in the DAG,
4438 /// this does not modify the specified node, instead it returns the node that
4439 /// already exists. If the resultant node does not exist in the DAG, the
4440 /// input node is returned. As a degenerate case, if you specify the same
4441 /// input operands as the node already has, the input node is returned.
4442 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) {
4443 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
4445 // Check to see if there is no change.
4446 if (Op == N->getOperand(0)) return N;
4448 // See if the modified node already exists.
4449 void *InsertPos = 0;
4450 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
4453 // Nope it doesn't. Remove the node from its current place in the maps.
4455 if (!RemoveNodeFromCSEMaps(N))
4458 // Now we update the operands.
4459 N->OperandList[0].set(Op);
4461 // If this gets put into a CSE map, add it.
4462 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4466 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) {
4467 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
4469 // Check to see if there is no change.
4470 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
4471 return N; // No operands changed, just return the input node.
4473 // See if the modified node already exists.
4474 void *InsertPos = 0;
4475 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
4478 // Nope it doesn't. Remove the node from its current place in the maps.
4480 if (!RemoveNodeFromCSEMaps(N))
4483 // Now we update the operands.
4484 if (N->OperandList[0] != Op1)
4485 N->OperandList[0].set(Op1);
4486 if (N->OperandList[1] != Op2)
4487 N->OperandList[1].set(Op2);
4489 // If this gets put into a CSE map, add it.
4490 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4494 SDNode *SelectionDAG::
4495 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) {
4496 SDValue Ops[] = { Op1, Op2, Op3 };
4497 return UpdateNodeOperands(N, Ops, 3);
4500 SDNode *SelectionDAG::
4501 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
4502 SDValue Op3, SDValue Op4) {
4503 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
4504 return UpdateNodeOperands(N, Ops, 4);
4507 SDNode *SelectionDAG::
4508 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
4509 SDValue Op3, SDValue Op4, SDValue Op5) {
4510 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
4511 return UpdateNodeOperands(N, Ops, 5);
4514 SDNode *SelectionDAG::
4515 UpdateNodeOperands(SDNode *N, const SDValue *Ops, unsigned NumOps) {
4516 assert(N->getNumOperands() == NumOps &&
4517 "Update with wrong number of operands");
4519 // Check to see if there is no change.
4520 bool AnyChange = false;
4521 for (unsigned i = 0; i != NumOps; ++i) {
4522 if (Ops[i] != N->getOperand(i)) {
4528 // No operands changed, just return the input node.
4529 if (!AnyChange) return N;
4531 // See if the modified node already exists.
4532 void *InsertPos = 0;
4533 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
4536 // Nope it doesn't. Remove the node from its current place in the maps.
4538 if (!RemoveNodeFromCSEMaps(N))
4541 // Now we update the operands.
4542 for (unsigned i = 0; i != NumOps; ++i)
4543 if (N->OperandList[i] != Ops[i])
4544 N->OperandList[i].set(Ops[i]);
4546 // If this gets put into a CSE map, add it.
4547 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4551 /// DropOperands - Release the operands and set this node to have
4553 void SDNode::DropOperands() {
4554 // Unlike the code in MorphNodeTo that does this, we don't need to
4555 // watch for dead nodes here.
4556 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
4562 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
4565 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4567 SDVTList VTs = getVTList(VT);
4568 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
4571 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4572 EVT VT, SDValue Op1) {
4573 SDVTList VTs = getVTList(VT);
4574 SDValue Ops[] = { Op1 };
4575 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4578 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4579 EVT VT, SDValue Op1,
4581 SDVTList VTs = getVTList(VT);
4582 SDValue Ops[] = { Op1, Op2 };
4583 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4586 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4587 EVT VT, SDValue Op1,
4588 SDValue Op2, SDValue Op3) {
4589 SDVTList VTs = getVTList(VT);
4590 SDValue Ops[] = { Op1, Op2, Op3 };
4591 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4594 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4595 EVT VT, const SDValue *Ops,
4597 SDVTList VTs = getVTList(VT);
4598 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4601 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4602 EVT VT1, EVT VT2, const SDValue *Ops,
4604 SDVTList VTs = getVTList(VT1, VT2);
4605 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4608 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4610 SDVTList VTs = getVTList(VT1, VT2);
4611 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
4614 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4615 EVT VT1, EVT VT2, EVT VT3,
4616 const SDValue *Ops, unsigned NumOps) {
4617 SDVTList VTs = getVTList(VT1, VT2, VT3);
4618 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4621 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4622 EVT VT1, EVT VT2, EVT VT3, EVT VT4,
4623 const SDValue *Ops, unsigned NumOps) {
4624 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4625 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4628 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4631 SDVTList VTs = getVTList(VT1, VT2);
4632 SDValue Ops[] = { Op1 };
4633 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4636 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4638 SDValue Op1, SDValue Op2) {
4639 SDVTList VTs = getVTList(VT1, VT2);
4640 SDValue Ops[] = { Op1, Op2 };
4641 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4644 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4646 SDValue Op1, SDValue Op2,
4648 SDVTList VTs = getVTList(VT1, VT2);
4649 SDValue Ops[] = { Op1, Op2, Op3 };
4650 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4653 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4654 EVT VT1, EVT VT2, EVT VT3,
4655 SDValue Op1, SDValue Op2,
4657 SDVTList VTs = getVTList(VT1, VT2, VT3);
4658 SDValue Ops[] = { Op1, Op2, Op3 };
4659 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4662 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4663 SDVTList VTs, const SDValue *Ops,
4665 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
4666 // Reset the NodeID to -1.
4671 /// MorphNodeTo - This *mutates* the specified node to have the specified
4672 /// return type, opcode, and operands.
4674 /// Note that MorphNodeTo returns the resultant node. If there is already a
4675 /// node of the specified opcode and operands, it returns that node instead of
4676 /// the current one. Note that the DebugLoc need not be the same.
4678 /// Using MorphNodeTo is faster than creating a new node and swapping it in
4679 /// with ReplaceAllUsesWith both because it often avoids allocating a new
4680 /// node, and because it doesn't require CSE recalculation for any of
4681 /// the node's users.
4683 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4684 SDVTList VTs, const SDValue *Ops,
4686 // If an identical node already exists, use it.
4688 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) {
4689 FoldingSetNodeID ID;
4690 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
4691 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
4695 if (!RemoveNodeFromCSEMaps(N))
4698 // Start the morphing.
4700 N->ValueList = VTs.VTs;
4701 N->NumValues = VTs.NumVTs;
4703 // Clear the operands list, updating used nodes to remove this from their
4704 // use list. Keep track of any operands that become dead as a result.
4705 SmallPtrSet<SDNode*, 16> DeadNodeSet;
4706 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
4708 SDNode *Used = Use.getNode();
4710 if (Used->use_empty())
4711 DeadNodeSet.insert(Used);
4714 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) {
4715 // Initialize the memory references information.
4716 MN->setMemRefs(0, 0);
4717 // If NumOps is larger than the # of operands we can have in a
4718 // MachineSDNode, reallocate the operand list.
4719 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) {
4720 if (MN->OperandsNeedDelete)
4721 delete[] MN->OperandList;
4722 if (NumOps > array_lengthof(MN->LocalOperands))
4723 // We're creating a final node that will live unmorphed for the
4724 // remainder of the current SelectionDAG iteration, so we can allocate
4725 // the operands directly out of a pool with no recycling metadata.
4726 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
4729 MN->InitOperands(MN->LocalOperands, Ops, NumOps);
4730 MN->OperandsNeedDelete = false;
4732 MN->InitOperands(MN->OperandList, Ops, NumOps);
4734 // If NumOps is larger than the # of operands we currently have, reallocate
4735 // the operand list.
4736 if (NumOps > N->NumOperands) {
4737 if (N->OperandsNeedDelete)
4738 delete[] N->OperandList;
4739 N->InitOperands(new SDUse[NumOps], Ops, NumOps);
4740 N->OperandsNeedDelete = true;
4742 N->InitOperands(N->OperandList, Ops, NumOps);
4745 // Delete any nodes that are still dead after adding the uses for the
4747 if (!DeadNodeSet.empty()) {
4748 SmallVector<SDNode *, 16> DeadNodes;
4749 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
4750 E = DeadNodeSet.end(); I != E; ++I)
4751 if ((*I)->use_empty())
4752 DeadNodes.push_back(*I);
4753 RemoveDeadNodes(DeadNodes);
4757 CSEMap.InsertNode(N, IP); // Memoize the new node.
4762 /// getMachineNode - These are used for target selectors to create a new node
4763 /// with specified return type(s), MachineInstr opcode, and operands.
4765 /// Note that getMachineNode returns the resultant node. If there is already a
4766 /// node of the specified opcode and operands, it returns that node instead of
4767 /// the current one.
4769 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) {
4770 SDVTList VTs = getVTList(VT);
4771 return getMachineNode(Opcode, dl, VTs, 0, 0);
4775 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) {
4776 SDVTList VTs = getVTList(VT);
4777 SDValue Ops[] = { Op1 };
4778 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4782 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4783 SDValue Op1, SDValue Op2) {
4784 SDVTList VTs = getVTList(VT);
4785 SDValue Ops[] = { Op1, Op2 };
4786 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4790 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4791 SDValue Op1, SDValue Op2, SDValue Op3) {
4792 SDVTList VTs = getVTList(VT);
4793 SDValue Ops[] = { Op1, Op2, Op3 };
4794 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4798 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4799 const SDValue *Ops, unsigned NumOps) {
4800 SDVTList VTs = getVTList(VT);
4801 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4805 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) {
4806 SDVTList VTs = getVTList(VT1, VT2);
4807 return getMachineNode(Opcode, dl, VTs, 0, 0);
4811 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4812 EVT VT1, EVT VT2, SDValue Op1) {
4813 SDVTList VTs = getVTList(VT1, VT2);
4814 SDValue Ops[] = { Op1 };
4815 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4819 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4820 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) {
4821 SDVTList VTs = getVTList(VT1, VT2);
4822 SDValue Ops[] = { Op1, Op2 };
4823 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4827 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4828 EVT VT1, EVT VT2, SDValue Op1,
4829 SDValue Op2, SDValue Op3) {
4830 SDVTList VTs = getVTList(VT1, VT2);
4831 SDValue Ops[] = { Op1, Op2, Op3 };
4832 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4836 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4838 const SDValue *Ops, unsigned NumOps) {
4839 SDVTList VTs = getVTList(VT1, VT2);
4840 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4844 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4845 EVT VT1, EVT VT2, EVT VT3,
4846 SDValue Op1, SDValue Op2) {
4847 SDVTList VTs = getVTList(VT1, VT2, VT3);
4848 SDValue Ops[] = { Op1, Op2 };
4849 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4853 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4854 EVT VT1, EVT VT2, EVT VT3,
4855 SDValue Op1, SDValue Op2, SDValue Op3) {
4856 SDVTList VTs = getVTList(VT1, VT2, VT3);
4857 SDValue Ops[] = { Op1, Op2, Op3 };
4858 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4862 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4863 EVT VT1, EVT VT2, EVT VT3,
4864 const SDValue *Ops, unsigned NumOps) {
4865 SDVTList VTs = getVTList(VT1, VT2, VT3);
4866 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4870 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1,
4871 EVT VT2, EVT VT3, EVT VT4,
4872 const SDValue *Ops, unsigned NumOps) {
4873 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4874 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4878 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4879 const std::vector<EVT> &ResultTys,
4880 const SDValue *Ops, unsigned NumOps) {
4881 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size());
4882 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4886 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs,
4887 const SDValue *Ops, unsigned NumOps) {
4888 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Flag;
4893 FoldingSetNodeID ID;
4894 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps);
4896 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4897 return cast<MachineSDNode>(E);
4900 // Allocate a new MachineSDNode.
4901 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs);
4903 // Initialize the operands list.
4904 if (NumOps > array_lengthof(N->LocalOperands))
4905 // We're creating a final node that will live unmorphed for the
4906 // remainder of the current SelectionDAG iteration, so we can allocate
4907 // the operands directly out of a pool with no recycling metadata.
4908 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
4911 N->InitOperands(N->LocalOperands, Ops, NumOps);
4912 N->OperandsNeedDelete = false;
4915 CSEMap.InsertNode(N, IP);
4917 AllNodes.push_back(N);
4924 /// getTargetExtractSubreg - A convenience function for creating
4925 /// TargetOpcode::EXTRACT_SUBREG nodes.
4927 SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT,
4929 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
4930 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL,
4931 VT, Operand, SRIdxVal);
4932 return SDValue(Subreg, 0);
4935 /// getTargetInsertSubreg - A convenience function for creating
4936 /// TargetOpcode::INSERT_SUBREG nodes.
4938 SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT,
4939 SDValue Operand, SDValue Subreg) {
4940 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
4941 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL,
4942 VT, Operand, Subreg, SRIdxVal);
4943 return SDValue(Result, 0);
4946 /// getNodeIfExists - Get the specified node if it's already available, or
4947 /// else return NULL.
4948 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
4949 const SDValue *Ops, unsigned NumOps) {
4950 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4951 FoldingSetNodeID ID;
4952 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4954 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4960 /// getDbgValue - Creates a SDDbgValue node.
4963 SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off,
4964 DebugLoc DL, unsigned O) {
4965 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O);
4969 SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off,
4970 DebugLoc DL, unsigned O) {
4971 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O);
4975 SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off,
4976 DebugLoc DL, unsigned O) {
4977 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O);
4982 /// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node
4983 /// pointed to by a use iterator is deleted, increment the use iterator
4984 /// so that it doesn't dangle.
4986 /// This class also manages a "downlink" DAGUpdateListener, to forward
4987 /// messages to ReplaceAllUsesWith's callers.
4989 class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener {
4990 SelectionDAG::DAGUpdateListener *DownLink;
4991 SDNode::use_iterator &UI;
4992 SDNode::use_iterator &UE;
4994 virtual void NodeDeleted(SDNode *N, SDNode *E) {
4995 // Increment the iterator as needed.
4996 while (UI != UE && N == *UI)
4999 // Then forward the message.
5000 if (DownLink) DownLink->NodeDeleted(N, E);
5003 virtual void NodeUpdated(SDNode *N) {
5004 // Just forward the message.
5005 if (DownLink) DownLink->NodeUpdated(N);
5009 RAUWUpdateListener(SelectionDAG::DAGUpdateListener *dl,
5010 SDNode::use_iterator &ui,
5011 SDNode::use_iterator &ue)
5012 : DownLink(dl), UI(ui), UE(ue) {}
5017 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5018 /// This can cause recursive merging of nodes in the DAG.
5020 /// This version assumes From has a single result value.
5022 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To,
5023 DAGUpdateListener *UpdateListener) {
5024 SDNode *From = FromN.getNode();
5025 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
5026 "Cannot replace with this method!");
5027 assert(From != To.getNode() && "Cannot replace uses of with self");
5029 // Iterate over all the existing uses of From. New uses will be added
5030 // to the beginning of the use list, which we avoid visiting.
5031 // This specifically avoids visiting uses of From that arise while the
5032 // replacement is happening, because any such uses would be the result
5033 // of CSE: If an existing node looks like From after one of its operands
5034 // is replaced by To, we don't want to replace of all its users with To
5035 // too. See PR3018 for more info.
5036 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5037 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5041 // This node is about to morph, remove its old self from the CSE maps.
5042 RemoveNodeFromCSEMaps(User);
5044 // A user can appear in a use list multiple times, and when this
5045 // happens the uses are usually next to each other in the list.
5046 // To help reduce the number of CSE recomputations, process all
5047 // the uses of this user that we can find this way.
5049 SDUse &Use = UI.getUse();
5052 } while (UI != UE && *UI == User);
5054 // Now that we have modified User, add it back to the CSE maps. If it
5055 // already exists there, recursively merge the results together.
5056 AddModifiedNodeToCSEMaps(User, &Listener);
5060 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5061 /// This can cause recursive merging of nodes in the DAG.
5063 /// This version assumes that for each value of From, there is a
5064 /// corresponding value in To in the same position with the same type.
5066 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To,
5067 DAGUpdateListener *UpdateListener) {
5069 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
5070 assert((!From->hasAnyUseOfValue(i) ||
5071 From->getValueType(i) == To->getValueType(i)) &&
5072 "Cannot use this version of ReplaceAllUsesWith!");
5075 // Handle the trivial case.
5079 // Iterate over just the existing users of From. See the comments in
5080 // the ReplaceAllUsesWith above.
5081 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5082 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5086 // This node is about to morph, remove its old self from the CSE maps.
5087 RemoveNodeFromCSEMaps(User);
5089 // A user can appear in a use list multiple times, and when this
5090 // happens the uses are usually next to each other in the list.
5091 // To help reduce the number of CSE recomputations, process all
5092 // the uses of this user that we can find this way.
5094 SDUse &Use = UI.getUse();
5097 } while (UI != UE && *UI == User);
5099 // Now that we have modified User, add it back to the CSE maps. If it
5100 // already exists there, recursively merge the results together.
5101 AddModifiedNodeToCSEMaps(User, &Listener);
5105 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5106 /// This can cause recursive merging of nodes in the DAG.
5108 /// This version can replace From with any result values. To must match the
5109 /// number and types of values returned by From.
5110 void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
5112 DAGUpdateListener *UpdateListener) {
5113 if (From->getNumValues() == 1) // Handle the simple case efficiently.
5114 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener);
5116 // Iterate over just the existing users of From. See the comments in
5117 // the ReplaceAllUsesWith above.
5118 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5119 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5123 // This node is about to morph, remove its old self from the CSE maps.
5124 RemoveNodeFromCSEMaps(User);
5126 // A user can appear in a use list multiple times, and when this
5127 // happens the uses are usually next to each other in the list.
5128 // To help reduce the number of CSE recomputations, process all
5129 // the uses of this user that we can find this way.
5131 SDUse &Use = UI.getUse();
5132 const SDValue &ToOp = To[Use.getResNo()];
5135 } while (UI != UE && *UI == User);
5137 // Now that we have modified User, add it back to the CSE maps. If it
5138 // already exists there, recursively merge the results together.
5139 AddModifiedNodeToCSEMaps(User, &Listener);
5143 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
5144 /// uses of other values produced by From.getNode() alone. The Deleted
5145 /// vector is handled the same way as for ReplaceAllUsesWith.
5146 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To,
5147 DAGUpdateListener *UpdateListener){
5148 // Handle the really simple, really trivial case efficiently.
5149 if (From == To) return;
5151 // Handle the simple, trivial, case efficiently.
5152 if (From.getNode()->getNumValues() == 1) {
5153 ReplaceAllUsesWith(From, To, UpdateListener);
5157 // Iterate over just the existing users of From. See the comments in
5158 // the ReplaceAllUsesWith above.
5159 SDNode::use_iterator UI = From.getNode()->use_begin(),
5160 UE = From.getNode()->use_end();
5161 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5164 bool UserRemovedFromCSEMaps = false;
5166 // A user can appear in a use list multiple times, and when this
5167 // happens the uses are usually next to each other in the list.
5168 // To help reduce the number of CSE recomputations, process all
5169 // the uses of this user that we can find this way.
5171 SDUse &Use = UI.getUse();
5173 // Skip uses of different values from the same node.
5174 if (Use.getResNo() != From.getResNo()) {
5179 // If this node hasn't been modified yet, it's still in the CSE maps,
5180 // so remove its old self from the CSE maps.
5181 if (!UserRemovedFromCSEMaps) {
5182 RemoveNodeFromCSEMaps(User);
5183 UserRemovedFromCSEMaps = true;
5188 } while (UI != UE && *UI == User);
5190 // We are iterating over all uses of the From node, so if a use
5191 // doesn't use the specific value, no changes are made.
5192 if (!UserRemovedFromCSEMaps)
5195 // Now that we have modified User, add it back to the CSE maps. If it
5196 // already exists there, recursively merge the results together.
5197 AddModifiedNodeToCSEMaps(User, &Listener);
5202 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
5203 /// to record information about a use.
5210 /// operator< - Sort Memos by User.
5211 bool operator<(const UseMemo &L, const UseMemo &R) {
5212 return (intptr_t)L.User < (intptr_t)R.User;
5216 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
5217 /// uses of other values produced by From.getNode() alone. The same value
5218 /// may appear in both the From and To list. The Deleted vector is
5219 /// handled the same way as for ReplaceAllUsesWith.
5220 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
5223 DAGUpdateListener *UpdateListener){
5224 // Handle the simple, trivial case efficiently.
5226 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener);
5228 // Read up all the uses and make records of them. This helps
5229 // processing new uses that are introduced during the
5230 // replacement process.
5231 SmallVector<UseMemo, 4> Uses;
5232 for (unsigned i = 0; i != Num; ++i) {
5233 unsigned FromResNo = From[i].getResNo();
5234 SDNode *FromNode = From[i].getNode();
5235 for (SDNode::use_iterator UI = FromNode->use_begin(),
5236 E = FromNode->use_end(); UI != E; ++UI) {
5237 SDUse &Use = UI.getUse();
5238 if (Use.getResNo() == FromResNo) {
5239 UseMemo Memo = { *UI, i, &Use };
5240 Uses.push_back(Memo);
5245 // Sort the uses, so that all the uses from a given User are together.
5246 std::sort(Uses.begin(), Uses.end());
5248 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
5249 UseIndex != UseIndexEnd; ) {
5250 // We know that this user uses some value of From. If it is the right
5251 // value, update it.
5252 SDNode *User = Uses[UseIndex].User;
5254 // This node is about to morph, remove its old self from the CSE maps.
5255 RemoveNodeFromCSEMaps(User);
5257 // The Uses array is sorted, so all the uses for a given User
5258 // are next to each other in the list.
5259 // To help reduce the number of CSE recomputations, process all
5260 // the uses of this user that we can find this way.
5262 unsigned i = Uses[UseIndex].Index;
5263 SDUse &Use = *Uses[UseIndex].Use;
5267 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
5269 // Now that we have modified User, add it back to the CSE maps. If it
5270 // already exists there, recursively merge the results together.
5271 AddModifiedNodeToCSEMaps(User, UpdateListener);
5275 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
5276 /// based on their topological order. It returns the maximum id and a vector
5277 /// of the SDNodes* in assigned order by reference.
5278 unsigned SelectionDAG::AssignTopologicalOrder() {
5280 unsigned DAGSize = 0;
5282 // SortedPos tracks the progress of the algorithm. Nodes before it are
5283 // sorted, nodes after it are unsorted. When the algorithm completes
5284 // it is at the end of the list.
5285 allnodes_iterator SortedPos = allnodes_begin();
5287 // Visit all the nodes. Move nodes with no operands to the front of
5288 // the list immediately. Annotate nodes that do have operands with their
5289 // operand count. Before we do this, the Node Id fields of the nodes
5290 // may contain arbitrary values. After, the Node Id fields for nodes
5291 // before SortedPos will contain the topological sort index, and the
5292 // Node Id fields for nodes At SortedPos and after will contain the
5293 // count of outstanding operands.
5294 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
5297 unsigned Degree = N->getNumOperands();
5299 // A node with no uses, add it to the result array immediately.
5300 N->setNodeId(DAGSize++);
5301 allnodes_iterator Q = N;
5303 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
5304 assert(SortedPos != AllNodes.end() && "Overran node list");
5307 // Temporarily use the Node Id as scratch space for the degree count.
5308 N->setNodeId(Degree);
5312 // Visit all the nodes. As we iterate, moves nodes into sorted order,
5313 // such that by the time the end is reached all nodes will be sorted.
5314 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
5317 // N is in sorted position, so all its uses have one less operand
5318 // that needs to be sorted.
5319 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
5322 unsigned Degree = P->getNodeId();
5323 assert(Degree != 0 && "Invalid node degree");
5326 // All of P's operands are sorted, so P may sorted now.
5327 P->setNodeId(DAGSize++);
5329 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
5330 assert(SortedPos != AllNodes.end() && "Overran node list");
5333 // Update P's outstanding operand count.
5334 P->setNodeId(Degree);
5337 if (I == SortedPos) {
5340 dbgs() << "Overran sorted position:\n";
5343 llvm_unreachable(0);
5347 assert(SortedPos == AllNodes.end() &&
5348 "Topological sort incomplete!");
5349 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
5350 "First node in topological sort is not the entry token!");
5351 assert(AllNodes.front().getNodeId() == 0 &&
5352 "First node in topological sort has non-zero id!");
5353 assert(AllNodes.front().getNumOperands() == 0 &&
5354 "First node in topological sort has operands!");
5355 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
5356 "Last node in topologic sort has unexpected id!");
5357 assert(AllNodes.back().use_empty() &&
5358 "Last node in topologic sort has users!");
5359 assert(DAGSize == allnodes_size() && "Node count mismatch!");
5363 /// AssignOrdering - Assign an order to the SDNode.
5364 void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) {
5365 assert(SD && "Trying to assign an order to a null node!");
5366 Ordering->add(SD, Order);
5369 /// GetOrdering - Get the order for the SDNode.
5370 unsigned SelectionDAG::GetOrdering(const SDNode *SD) const {
5371 assert(SD && "Trying to get the order of a null node!");
5372 return Ordering->getOrder(SD);
5375 /// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the
5376 /// value is produced by SD.
5377 void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) {
5378 DbgInfo->add(DB, SD, isParameter);
5380 SD->setHasDebugValue(true);
5383 //===----------------------------------------------------------------------===//
5385 //===----------------------------------------------------------------------===//
5387 HandleSDNode::~HandleSDNode() {
5391 GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, const GlobalValue *GA,
5392 EVT VT, int64_t o, unsigned char TF)
5393 : SDNode(Opc, DebugLoc(), getSDVTList(VT)), Offset(o), TargetFlags(TF) {
5397 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt,
5398 MachineMemOperand *mmo)
5399 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) {
5400 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5401 MMO->isNonTemporal());
5402 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5403 assert(isNonTemporal() == MMO->isNonTemporal() &&
5404 "Non-temporal encoding error!");
5405 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5408 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs,
5409 const SDValue *Ops, unsigned NumOps, EVT memvt,
5410 MachineMemOperand *mmo)
5411 : SDNode(Opc, dl, VTs, Ops, NumOps),
5412 MemoryVT(memvt), MMO(mmo) {
5413 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5414 MMO->isNonTemporal());
5415 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5416 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5419 /// Profile - Gather unique data for the node.
5421 void SDNode::Profile(FoldingSetNodeID &ID) const {
5422 AddNodeIDNode(ID, this);
5427 std::vector<EVT> VTs;
5430 VTs.reserve(MVT::LAST_VALUETYPE);
5431 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i)
5432 VTs.push_back(MVT((MVT::SimpleValueType)i));
5437 static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs;
5438 static ManagedStatic<EVTArray> SimpleVTArray;
5439 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
5441 /// getValueTypeList - Return a pointer to the specified value type.
5443 const EVT *SDNode::getValueTypeList(EVT VT) {
5444 if (VT.isExtended()) {
5445 sys::SmartScopedLock<true> Lock(*VTMutex);
5446 return &(*EVTs->insert(VT).first);
5448 assert(VT.getSimpleVT().SimpleTy < MVT::LAST_VALUETYPE &&
5449 "Value type out of range!");
5450 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy];
5454 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
5455 /// indicated value. This method ignores uses of other values defined by this
5457 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
5458 assert(Value < getNumValues() && "Bad value!");
5460 // TODO: Only iterate over uses of a given value of the node
5461 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
5462 if (UI.getUse().getResNo() == Value) {
5469 // Found exactly the right number of uses?
5474 /// hasAnyUseOfValue - Return true if there are any use of the indicated
5475 /// value. This method ignores uses of other values defined by this operation.
5476 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
5477 assert(Value < getNumValues() && "Bad value!");
5479 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
5480 if (UI.getUse().getResNo() == Value)
5487 /// isOnlyUserOf - Return true if this node is the only use of N.
5489 bool SDNode::isOnlyUserOf(SDNode *N) const {
5491 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
5502 /// isOperand - Return true if this node is an operand of N.
5504 bool SDValue::isOperandOf(SDNode *N) const {
5505 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5506 if (*this == N->getOperand(i))
5511 bool SDNode::isOperandOf(SDNode *N) const {
5512 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
5513 if (this == N->OperandList[i].getNode())
5518 /// reachesChainWithoutSideEffects - Return true if this operand (which must
5519 /// be a chain) reaches the specified operand without crossing any
5520 /// side-effecting instructions. In practice, this looks through token
5521 /// factors and non-volatile loads. In order to remain efficient, this only
5522 /// looks a couple of nodes in, it does not do an exhaustive search.
5523 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
5524 unsigned Depth) const {
5525 if (*this == Dest) return true;
5527 // Don't search too deeply, we just want to be able to see through
5528 // TokenFactor's etc.
5529 if (Depth == 0) return false;
5531 // If this is a token factor, all inputs to the TF happen in parallel. If any
5532 // of the operands of the TF reach dest, then we can do the xform.
5533 if (getOpcode() == ISD::TokenFactor) {
5534 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
5535 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
5540 // Loads don't have side effects, look through them.
5541 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
5542 if (!Ld->isVolatile())
5543 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
5548 /// isPredecessorOf - Return true if this node is a predecessor of N. This node
5549 /// is either an operand of N or it can be reached by traversing up the operands.
5550 /// NOTE: this is an expensive method. Use it carefully.
5551 bool SDNode::isPredecessorOf(SDNode *N) const {
5552 SmallPtrSet<SDNode *, 32> Visited;
5553 SmallVector<SDNode *, 16> Worklist;
5554 Worklist.push_back(N);
5557 N = Worklist.pop_back_val();
5558 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
5559 SDNode *Op = N->getOperand(i).getNode();
5562 if (Visited.insert(Op))
5563 Worklist.push_back(Op);
5565 } while (!Worklist.empty());
5570 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
5571 assert(Num < NumOperands && "Invalid child # of SDNode!");
5572 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
5575 std::string SDNode::getOperationName(const SelectionDAG *G) const {
5576 switch (getOpcode()) {
5578 if (getOpcode() < ISD::BUILTIN_OP_END)
5579 return "<<Unknown DAG Node>>";
5580 if (isMachineOpcode()) {
5582 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo())
5583 if (getMachineOpcode() < TII->getNumOpcodes())
5584 return TII->get(getMachineOpcode()).getName();
5585 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>";
5588 const TargetLowering &TLI = G->getTargetLoweringInfo();
5589 const char *Name = TLI.getTargetNodeName(getOpcode());
5590 if (Name) return Name;
5591 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>";
5593 return "<<Unknown Node #" + utostr(getOpcode()) + ">>";
5596 case ISD::DELETED_NODE:
5597 return "<<Deleted Node!>>";
5599 case ISD::PREFETCH: return "Prefetch";
5600 case ISD::MEMBARRIER: return "MemBarrier";
5601 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
5602 case ISD::ATOMIC_SWAP: return "AtomicSwap";
5603 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
5604 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
5605 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
5606 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
5607 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
5608 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
5609 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
5610 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
5611 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
5612 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
5613 case ISD::PCMARKER: return "PCMarker";
5614 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
5615 case ISD::SRCVALUE: return "SrcValue";
5616 case ISD::MDNODE_SDNODE: return "MDNode";
5617 case ISD::EntryToken: return "EntryToken";
5618 case ISD::TokenFactor: return "TokenFactor";
5619 case ISD::AssertSext: return "AssertSext";
5620 case ISD::AssertZext: return "AssertZext";
5622 case ISD::BasicBlock: return "BasicBlock";
5623 case ISD::VALUETYPE: return "ValueType";
5624 case ISD::Register: return "Register";
5626 case ISD::Constant: return "Constant";
5627 case ISD::ConstantFP: return "ConstantFP";
5628 case ISD::GlobalAddress: return "GlobalAddress";
5629 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
5630 case ISD::FrameIndex: return "FrameIndex";
5631 case ISD::JumpTable: return "JumpTable";
5632 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
5633 case ISD::RETURNADDR: return "RETURNADDR";
5634 case ISD::FRAMEADDR: return "FRAMEADDR";
5635 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
5636 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR";
5637 case ISD::LSDAADDR: return "LSDAADDR";
5638 case ISD::EHSELECTION: return "EHSELECTION";
5639 case ISD::EH_RETURN: return "EH_RETURN";
5640 case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP";
5641 case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP";
5642 case ISD::ConstantPool: return "ConstantPool";
5643 case ISD::ExternalSymbol: return "ExternalSymbol";
5644 case ISD::BlockAddress: return "BlockAddress";
5645 case ISD::INTRINSIC_WO_CHAIN:
5646 case ISD::INTRINSIC_VOID:
5647 case ISD::INTRINSIC_W_CHAIN: {
5648 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1;
5649 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue();
5650 if (IID < Intrinsic::num_intrinsics)
5651 return Intrinsic::getName((Intrinsic::ID)IID);
5652 else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo())
5653 return TII->getName(IID);
5654 llvm_unreachable("Invalid intrinsic ID");
5657 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
5658 case ISD::TargetConstant: return "TargetConstant";
5659 case ISD::TargetConstantFP:return "TargetConstantFP";
5660 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
5661 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
5662 case ISD::TargetFrameIndex: return "TargetFrameIndex";
5663 case ISD::TargetJumpTable: return "TargetJumpTable";
5664 case ISD::TargetConstantPool: return "TargetConstantPool";
5665 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
5666 case ISD::TargetBlockAddress: return "TargetBlockAddress";
5668 case ISD::CopyToReg: return "CopyToReg";
5669 case ISD::CopyFromReg: return "CopyFromReg";
5670 case ISD::UNDEF: return "undef";
5671 case ISD::MERGE_VALUES: return "merge_values";
5672 case ISD::INLINEASM: return "inlineasm";
5673 case ISD::EH_LABEL: return "eh_label";
5674 case ISD::HANDLENODE: return "handlenode";
5677 case ISD::FABS: return "fabs";
5678 case ISD::FNEG: return "fneg";
5679 case ISD::FSQRT: return "fsqrt";
5680 case ISD::FSIN: return "fsin";
5681 case ISD::FCOS: return "fcos";
5682 case ISD::FTRUNC: return "ftrunc";
5683 case ISD::FFLOOR: return "ffloor";
5684 case ISD::FCEIL: return "fceil";
5685 case ISD::FRINT: return "frint";
5686 case ISD::FNEARBYINT: return "fnearbyint";
5687 case ISD::FEXP: return "fexp";
5688 case ISD::FEXP2: return "fexp2";
5689 case ISD::FLOG: return "flog";
5690 case ISD::FLOG2: return "flog2";
5691 case ISD::FLOG10: return "flog10";
5694 case ISD::ADD: return "add";
5695 case ISD::SUB: return "sub";
5696 case ISD::MUL: return "mul";
5697 case ISD::MULHU: return "mulhu";
5698 case ISD::MULHS: return "mulhs";
5699 case ISD::SDIV: return "sdiv";
5700 case ISD::UDIV: return "udiv";
5701 case ISD::SREM: return "srem";
5702 case ISD::UREM: return "urem";
5703 case ISD::SMUL_LOHI: return "smul_lohi";
5704 case ISD::UMUL_LOHI: return "umul_lohi";
5705 case ISD::SDIVREM: return "sdivrem";
5706 case ISD::UDIVREM: return "udivrem";
5707 case ISD::AND: return "and";
5708 case ISD::OR: return "or";
5709 case ISD::XOR: return "xor";
5710 case ISD::SHL: return "shl";
5711 case ISD::SRA: return "sra";
5712 case ISD::SRL: return "srl";
5713 case ISD::ROTL: return "rotl";
5714 case ISD::ROTR: return "rotr";
5715 case ISD::FADD: return "fadd";
5716 case ISD::FSUB: return "fsub";
5717 case ISD::FMUL: return "fmul";
5718 case ISD::FDIV: return "fdiv";
5719 case ISD::FREM: return "frem";
5720 case ISD::FCOPYSIGN: return "fcopysign";
5721 case ISD::FGETSIGN: return "fgetsign";
5722 case ISD::FPOW: return "fpow";
5724 case ISD::FPOWI: return "fpowi";
5725 case ISD::SETCC: return "setcc";
5726 case ISD::VSETCC: return "vsetcc";
5727 case ISD::SELECT: return "select";
5728 case ISD::SELECT_CC: return "select_cc";
5729 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
5730 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
5731 case ISD::CONCAT_VECTORS: return "concat_vectors";
5732 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
5733 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
5734 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
5735 case ISD::CARRY_FALSE: return "carry_false";
5736 case ISD::ADDC: return "addc";
5737 case ISD::ADDE: return "adde";
5738 case ISD::SADDO: return "saddo";
5739 case ISD::UADDO: return "uaddo";
5740 case ISD::SSUBO: return "ssubo";
5741 case ISD::USUBO: return "usubo";
5742 case ISD::SMULO: return "smulo";
5743 case ISD::UMULO: return "umulo";
5744 case ISD::SUBC: return "subc";
5745 case ISD::SUBE: return "sube";
5746 case ISD::SHL_PARTS: return "shl_parts";
5747 case ISD::SRA_PARTS: return "sra_parts";
5748 case ISD::SRL_PARTS: return "srl_parts";
5750 // Conversion operators.
5751 case ISD::SIGN_EXTEND: return "sign_extend";
5752 case ISD::ZERO_EXTEND: return "zero_extend";
5753 case ISD::ANY_EXTEND: return "any_extend";
5754 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
5755 case ISD::TRUNCATE: return "truncate";
5756 case ISD::FP_ROUND: return "fp_round";
5757 case ISD::FLT_ROUNDS_: return "flt_rounds";
5758 case ISD::FP_ROUND_INREG: return "fp_round_inreg";
5759 case ISD::FP_EXTEND: return "fp_extend";
5761 case ISD::SINT_TO_FP: return "sint_to_fp";
5762 case ISD::UINT_TO_FP: return "uint_to_fp";
5763 case ISD::FP_TO_SINT: return "fp_to_sint";
5764 case ISD::FP_TO_UINT: return "fp_to_uint";
5765 case ISD::BIT_CONVERT: return "bit_convert";
5766 case ISD::FP16_TO_FP32: return "fp16_to_fp32";
5767 case ISD::FP32_TO_FP16: return "fp32_to_fp16";
5769 case ISD::CONVERT_RNDSAT: {
5770 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) {
5771 default: llvm_unreachable("Unknown cvt code!");
5772 case ISD::CVT_FF: return "cvt_ff";
5773 case ISD::CVT_FS: return "cvt_fs";
5774 case ISD::CVT_FU: return "cvt_fu";
5775 case ISD::CVT_SF: return "cvt_sf";
5776 case ISD::CVT_UF: return "cvt_uf";
5777 case ISD::CVT_SS: return "cvt_ss";
5778 case ISD::CVT_SU: return "cvt_su";
5779 case ISD::CVT_US: return "cvt_us";
5780 case ISD::CVT_UU: return "cvt_uu";
5784 // Control flow instructions
5785 case ISD::BR: return "br";
5786 case ISD::BRIND: return "brind";
5787 case ISD::BR_JT: return "br_jt";
5788 case ISD::BRCOND: return "brcond";
5789 case ISD::BR_CC: return "br_cc";
5790 case ISD::CALLSEQ_START: return "callseq_start";
5791 case ISD::CALLSEQ_END: return "callseq_end";
5794 case ISD::LOAD: return "load";
5795 case ISD::STORE: return "store";
5796 case ISD::VAARG: return "vaarg";
5797 case ISD::VACOPY: return "vacopy";
5798 case ISD::VAEND: return "vaend";
5799 case ISD::VASTART: return "vastart";
5800 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
5801 case ISD::EXTRACT_ELEMENT: return "extract_element";
5802 case ISD::BUILD_PAIR: return "build_pair";
5803 case ISD::STACKSAVE: return "stacksave";
5804 case ISD::STACKRESTORE: return "stackrestore";
5805 case ISD::TRAP: return "trap";
5808 case ISD::BSWAP: return "bswap";
5809 case ISD::CTPOP: return "ctpop";
5810 case ISD::CTTZ: return "cttz";
5811 case ISD::CTLZ: return "ctlz";
5814 case ISD::TRAMPOLINE: return "trampoline";
5817 switch (cast<CondCodeSDNode>(this)->get()) {
5818 default: llvm_unreachable("Unknown setcc condition!");
5819 case ISD::SETOEQ: return "setoeq";
5820 case ISD::SETOGT: return "setogt";
5821 case ISD::SETOGE: return "setoge";
5822 case ISD::SETOLT: return "setolt";
5823 case ISD::SETOLE: return "setole";
5824 case ISD::SETONE: return "setone";
5826 case ISD::SETO: return "seto";
5827 case ISD::SETUO: return "setuo";
5828 case ISD::SETUEQ: return "setue";
5829 case ISD::SETUGT: return "setugt";
5830 case ISD::SETUGE: return "setuge";
5831 case ISD::SETULT: return "setult";
5832 case ISD::SETULE: return "setule";
5833 case ISD::SETUNE: return "setune";
5835 case ISD::SETEQ: return "seteq";
5836 case ISD::SETGT: return "setgt";
5837 case ISD::SETGE: return "setge";
5838 case ISD::SETLT: return "setlt";
5839 case ISD::SETLE: return "setle";
5840 case ISD::SETNE: return "setne";
5845 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
5854 return "<post-inc>";
5856 return "<post-dec>";
5860 std::string ISD::ArgFlagsTy::getArgFlagsString() {
5861 std::string S = "< ";
5875 if (getByValAlign())
5876 S += "byval-align:" + utostr(getByValAlign()) + " ";
5878 S += "orig-align:" + utostr(getOrigAlign()) + " ";
5880 S += "byval-size:" + utostr(getByValSize()) + " ";
5884 void SDNode::dump() const { dump(0); }
5885 void SDNode::dump(const SelectionDAG *G) const {
5889 void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const {
5890 OS << (void*)this << ": ";
5892 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
5894 if (getValueType(i) == MVT::Other)
5897 OS << getValueType(i).getEVTString();
5899 OS << " = " << getOperationName(G);
5902 void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const {
5903 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) {
5904 if (!MN->memoperands_empty()) {
5907 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(),
5908 e = MN->memoperands_end(); i != e; ++i) {
5915 } else if (const ShuffleVectorSDNode *SVN =
5916 dyn_cast<ShuffleVectorSDNode>(this)) {
5918 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
5919 int Idx = SVN->getMaskElt(i);
5927 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
5928 OS << '<' << CSDN->getAPIntValue() << '>';
5929 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
5930 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle)
5931 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
5932 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble)
5933 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
5936 CSDN->getValueAPF().bitcastToAPInt().dump();
5939 } else if (const GlobalAddressSDNode *GADN =
5940 dyn_cast<GlobalAddressSDNode>(this)) {
5941 int64_t offset = GADN->getOffset();
5943 WriteAsOperand(OS, GADN->getGlobal());
5946 OS << " + " << offset;
5948 OS << " " << offset;
5949 if (unsigned int TF = GADN->getTargetFlags())
5950 OS << " [TF=" << TF << ']';
5951 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
5952 OS << "<" << FIDN->getIndex() << ">";
5953 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
5954 OS << "<" << JTDN->getIndex() << ">";
5955 if (unsigned int TF = JTDN->getTargetFlags())
5956 OS << " [TF=" << TF << ']';
5957 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
5958 int offset = CP->getOffset();
5959 if (CP->isMachineConstantPoolEntry())
5960 OS << "<" << *CP->getMachineCPVal() << ">";
5962 OS << "<" << *CP->getConstVal() << ">";
5964 OS << " + " << offset;
5966 OS << " " << offset;
5967 if (unsigned int TF = CP->getTargetFlags())
5968 OS << " [TF=" << TF << ']';
5969 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
5971 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
5973 OS << LBB->getName() << " ";
5974 OS << (const void*)BBDN->getBasicBlock() << ">";
5975 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
5976 if (G && R->getReg() &&
5977 TargetRegisterInfo::isPhysicalRegister(R->getReg())) {
5978 OS << " %" << G->getTarget().getRegisterInfo()->getName(R->getReg());
5980 OS << " %reg" << R->getReg();
5982 } else if (const ExternalSymbolSDNode *ES =
5983 dyn_cast<ExternalSymbolSDNode>(this)) {
5984 OS << "'" << ES->getSymbol() << "'";
5985 if (unsigned int TF = ES->getTargetFlags())
5986 OS << " [TF=" << TF << ']';
5987 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
5989 OS << "<" << M->getValue() << ">";
5992 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) {
5994 OS << "<" << MD->getMD() << ">";
5997 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
5998 OS << ":" << N->getVT().getEVTString();
6000 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
6001 OS << "<" << *LD->getMemOperand();
6004 switch (LD->getExtensionType()) {
6005 default: doExt = false; break;
6006 case ISD::EXTLOAD: OS << ", anyext"; break;
6007 case ISD::SEXTLOAD: OS << ", sext"; break;
6008 case ISD::ZEXTLOAD: OS << ", zext"; break;
6011 OS << " from " << LD->getMemoryVT().getEVTString();
6013 const char *AM = getIndexedModeName(LD->getAddressingMode());
6018 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
6019 OS << "<" << *ST->getMemOperand();
6021 if (ST->isTruncatingStore())
6022 OS << ", trunc to " << ST->getMemoryVT().getEVTString();
6024 const char *AM = getIndexedModeName(ST->getAddressingMode());
6029 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) {
6030 OS << "<" << *M->getMemOperand() << ">";
6031 } else if (const BlockAddressSDNode *BA =
6032 dyn_cast<BlockAddressSDNode>(this)) {
6034 WriteAsOperand(OS, BA->getBlockAddress()->getFunction(), false);
6036 WriteAsOperand(OS, BA->getBlockAddress()->getBasicBlock(), false);
6038 if (unsigned int TF = BA->getTargetFlags())
6039 OS << " [TF=" << TF << ']';
6043 if (unsigned Order = G->GetOrdering(this))
6044 OS << " [ORD=" << Order << ']';
6046 if (getNodeId() != -1)
6047 OS << " [ID=" << getNodeId() << ']';
6049 DebugLoc dl = getDebugLoc();
6050 if (G && !dl.isUnknown()) {
6052 Scope(dl.getScope(G->getMachineFunction().getFunction()->getContext()));
6054 // Omit the directory, since it's usually long and uninteresting.
6056 OS << Scope.getFilename();
6059 OS << ':' << dl.getLine();
6060 if (dl.getCol() != 0)
6061 OS << ':' << dl.getCol();
6065 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
6067 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
6068 if (i) OS << ", "; else OS << " ";
6069 OS << (void*)getOperand(i).getNode();
6070 if (unsigned RN = getOperand(i).getResNo())
6073 print_details(OS, G);
6076 static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N,
6077 const SelectionDAG *G, unsigned depth,
6090 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6092 printrWithDepthHelper(OS, N->getOperand(i).getNode(), G, depth-1, indent+2);
6096 void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G,
6097 unsigned depth) const {
6098 printrWithDepthHelper(OS, this, G, depth, 0);
6101 void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const {
6102 // Don't print impossibly deep things.
6103 printrWithDepth(OS, G, 100);
6106 void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const {
6107 printrWithDepth(dbgs(), G, depth);
6110 void SDNode::dumprFull(const SelectionDAG *G) const {
6111 // Don't print impossibly deep things.
6112 dumprWithDepth(G, 100);
6115 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
6116 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6117 if (N->getOperand(i).getNode()->hasOneUse())
6118 DumpNodes(N->getOperand(i).getNode(), indent+2, G);
6120 dbgs() << "\n" << std::string(indent+2, ' ')
6121 << (void*)N->getOperand(i).getNode() << ": <multiple use>";
6125 dbgs().indent(indent);
6129 SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
6130 assert(N->getNumValues() == 1 &&
6131 "Can't unroll a vector with multiple results!");
6133 EVT VT = N->getValueType(0);
6134 unsigned NE = VT.getVectorNumElements();
6135 EVT EltVT = VT.getVectorElementType();
6136 DebugLoc dl = N->getDebugLoc();
6138 SmallVector<SDValue, 8> Scalars;
6139 SmallVector<SDValue, 4> Operands(N->getNumOperands());
6141 // If ResNE is 0, fully unroll the vector op.
6144 else if (NE > ResNE)
6148 for (i= 0; i != NE; ++i) {
6149 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) {
6150 SDValue Operand = N->getOperand(j);
6151 EVT OperandVT = Operand.getValueType();
6152 if (OperandVT.isVector()) {
6153 // A vector operand; extract a single element.
6154 EVT OperandEltVT = OperandVT.getVectorElementType();
6155 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl,
6158 getConstant(i, MVT::i32));
6160 // A scalar operand; just use it as is.
6161 Operands[j] = Operand;
6165 switch (N->getOpcode()) {
6167 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6168 &Operands[0], Operands.size()));
6175 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0],
6176 getShiftAmountOperand(Operands[1])));
6178 case ISD::SIGN_EXTEND_INREG:
6179 case ISD::FP_ROUND_INREG: {
6180 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType();
6181 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6183 getValueType(ExtVT)));
6188 for (; i < ResNE; ++i)
6189 Scalars.push_back(getUNDEF(EltVT));
6191 return getNode(ISD::BUILD_VECTOR, dl,
6192 EVT::getVectorVT(*getContext(), EltVT, ResNE),
6193 &Scalars[0], Scalars.size());
6197 /// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a
6198 /// location that is 'Dist' units away from the location that the 'Base' load
6199 /// is loading from.
6200 bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base,
6201 unsigned Bytes, int Dist) const {
6202 if (LD->getChain() != Base->getChain())
6204 EVT VT = LD->getValueType(0);
6205 if (VT.getSizeInBits() / 8 != Bytes)
6208 SDValue Loc = LD->getOperand(1);
6209 SDValue BaseLoc = Base->getOperand(1);
6210 if (Loc.getOpcode() == ISD::FrameIndex) {
6211 if (BaseLoc.getOpcode() != ISD::FrameIndex)
6213 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo();
6214 int FI = cast<FrameIndexSDNode>(Loc)->getIndex();
6215 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex();
6216 int FS = MFI->getObjectSize(FI);
6217 int BFS = MFI->getObjectSize(BFI);
6218 if (FS != BFS || FS != (int)Bytes) return false;
6219 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes);
6221 if (Loc.getOpcode() == ISD::ADD && Loc.getOperand(0) == BaseLoc) {
6222 ConstantSDNode *V = dyn_cast<ConstantSDNode>(Loc.getOperand(1));
6223 if (V && (V->getSExtValue() == Dist*Bytes))
6227 const GlobalValue *GV1 = NULL;
6228 const GlobalValue *GV2 = NULL;
6229 int64_t Offset1 = 0;
6230 int64_t Offset2 = 0;
6231 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1);
6232 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2);
6233 if (isGA1 && isGA2 && GV1 == GV2)
6234 return Offset1 == (Offset2 + Dist*Bytes);
6239 /// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if
6240 /// it cannot be inferred.
6241 unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const {
6242 // If this is a GlobalAddress + cst, return the alignment.
6243 const GlobalValue *GV;
6244 int64_t GVOffset = 0;
6245 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) {
6246 // If GV has specified alignment, then use it. Otherwise, use the preferred
6248 unsigned Align = GV->getAlignment();
6250 if (const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV)) {
6251 if (GVar->hasInitializer()) {
6252 const TargetData *TD = TLI.getTargetData();
6253 Align = TD->getPreferredAlignment(GVar);
6257 return MinAlign(Align, GVOffset);
6260 // If this is a direct reference to a stack slot, use information about the
6261 // stack slot's alignment.
6262 int FrameIdx = 1 << 31;
6263 int64_t FrameOffset = 0;
6264 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) {
6265 FrameIdx = FI->getIndex();
6266 } else if (Ptr.getOpcode() == ISD::ADD &&
6267 isa<ConstantSDNode>(Ptr.getOperand(1)) &&
6268 isa<FrameIndexSDNode>(Ptr.getOperand(0))) {
6269 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
6270 FrameOffset = Ptr.getConstantOperandVal(1);
6273 if (FrameIdx != (1 << 31)) {
6274 // FIXME: Handle FI+CST.
6275 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo();
6276 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx),
6278 if (MFI.isFixedObjectIndex(FrameIdx)) {
6279 int64_t ObjectOffset = MFI.getObjectOffset(FrameIdx) + FrameOffset;
6281 // The alignment of the frame index can be determined from its offset from
6282 // the incoming frame position. If the frame object is at offset 32 and
6283 // the stack is guaranteed to be 16-byte aligned, then we know that the
6284 // object is 16-byte aligned.
6285 unsigned StackAlign = getTarget().getFrameInfo()->getStackAlignment();
6286 unsigned Align = MinAlign(ObjectOffset, StackAlign);
6288 // Finally, the frame object itself may have a known alignment. Factor
6289 // the alignment + offset into a new alignment. For example, if we know
6290 // the FI is 8 byte aligned, but the pointer is 4 off, we really have a
6291 // 4-byte alignment of the resultant pointer. Likewise align 4 + 4-byte
6292 // offset = 4-byte alignment, align 4 + 1-byte offset = align 1, etc.
6293 return std::max(Align, FIInfoAlign);
6301 void SelectionDAG::dump() const {
6302 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:";
6304 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end();
6306 const SDNode *N = I;
6307 if (!N->hasOneUse() && N != getRoot().getNode())
6308 DumpNodes(N, 2, this);
6311 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
6316 void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
6318 print_details(OS, G);
6321 typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet;
6322 static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
6323 const SelectionDAG *G, VisitedSDNodeSet &once) {
6324 if (!once.insert(N)) // If we've been here before, return now.
6327 // Dump the current SDNode, but don't end the line yet.
6328 OS << std::string(indent, ' ');
6331 // Having printed this SDNode, walk the children:
6332 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6333 const SDNode *child = N->getOperand(i).getNode();
6338 if (child->getNumOperands() == 0) {
6339 // This child has no grandchildren; print it inline right here.
6340 child->printr(OS, G);
6342 } else { // Just the address. FIXME: also print the child's opcode.
6344 if (unsigned RN = N->getOperand(i).getResNo())
6351 // Dump children that have grandchildren on their own line(s).
6352 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6353 const SDNode *child = N->getOperand(i).getNode();
6354 DumpNodesr(OS, child, indent+2, G, once);
6358 void SDNode::dumpr() const {
6359 VisitedSDNodeSet once;
6360 DumpNodesr(dbgs(), this, 0, 0, once);
6363 void SDNode::dumpr(const SelectionDAG *G) const {
6364 VisitedSDNodeSet once;
6365 DumpNodesr(dbgs(), this, 0, G, once);
6369 // getAddressSpace - Return the address space this GlobalAddress belongs to.
6370 unsigned GlobalAddressSDNode::getAddressSpace() const {
6371 return getGlobal()->getType()->getAddressSpace();
6375 const Type *ConstantPoolSDNode::getType() const {
6376 if (isMachineConstantPoolEntry())
6377 return Val.MachineCPVal->getType();
6378 return Val.ConstVal->getType();
6381 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
6383 unsigned &SplatBitSize,
6385 unsigned MinSplatBits,
6387 EVT VT = getValueType(0);
6388 assert(VT.isVector() && "Expected a vector type");
6389 unsigned sz = VT.getSizeInBits();
6390 if (MinSplatBits > sz)
6393 SplatValue = APInt(sz, 0);
6394 SplatUndef = APInt(sz, 0);
6396 // Get the bits. Bits with undefined values (when the corresponding element
6397 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
6398 // in SplatValue. If any of the values are not constant, give up and return
6400 unsigned int nOps = getNumOperands();
6401 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
6402 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
6404 for (unsigned j = 0; j < nOps; ++j) {
6405 unsigned i = isBigEndian ? nOps-1-j : j;
6406 SDValue OpVal = getOperand(i);
6407 unsigned BitPos = j * EltBitSize;
6409 if (OpVal.getOpcode() == ISD::UNDEF)
6410 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize);
6411 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
6412 SplatValue |= APInt(CN->getAPIntValue()).zextOrTrunc(EltBitSize).
6413 zextOrTrunc(sz) << BitPos;
6414 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
6415 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
6420 // The build_vector is all constants or undefs. Find the smallest element
6421 // size that splats the vector.
6423 HasAnyUndefs = (SplatUndef != 0);
6426 unsigned HalfSize = sz / 2;
6427 APInt HighValue = APInt(SplatValue).lshr(HalfSize).trunc(HalfSize);
6428 APInt LowValue = APInt(SplatValue).trunc(HalfSize);
6429 APInt HighUndef = APInt(SplatUndef).lshr(HalfSize).trunc(HalfSize);
6430 APInt LowUndef = APInt(SplatUndef).trunc(HalfSize);
6432 // If the two halves do not match (ignoring undef bits), stop here.
6433 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
6434 MinSplatBits > HalfSize)
6437 SplatValue = HighValue | LowValue;
6438 SplatUndef = HighUndef & LowUndef;
6447 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
6448 // Find the first non-undef value in the shuffle mask.
6450 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
6453 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
6455 // Make sure all remaining elements are either undef or the same as the first
6457 for (int Idx = Mask[i]; i != e; ++i)
6458 if (Mask[i] >= 0 && Mask[i] != Idx)
6464 static void checkForCyclesHelper(const SDNode *N,
6465 SmallPtrSet<const SDNode*, 32> &Visited,
6466 SmallPtrSet<const SDNode*, 32> &Checked) {
6467 // If this node has already been checked, don't check it again.
6468 if (Checked.count(N))
6471 // If a node has already been visited on this depth-first walk, reject it as
6473 if (!Visited.insert(N)) {
6474 dbgs() << "Offending node:\n";
6476 errs() << "Detected cycle in SelectionDAG\n";
6480 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6481 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked);
6488 void llvm::checkForCycles(const llvm::SDNode *N) {
6490 assert(N && "Checking nonexistant SDNode");
6491 SmallPtrSet<const SDNode*, 32> visited;
6492 SmallPtrSet<const SDNode*, 32> checked;
6493 checkForCyclesHelper(N, visited, checked);
6497 void llvm::checkForCycles(const llvm::SelectionDAG *DAG) {
6498 checkForCycles(DAG->getRoot().getNode());