1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
13 #include "llvm/CodeGen/SelectionDAG.h"
14 #include "llvm/Constants.h"
15 #include "llvm/Analysis/ValueTracking.h"
16 #include "llvm/GlobalAlias.h"
17 #include "llvm/GlobalVariable.h"
18 #include "llvm/Intrinsics.h"
19 #include "llvm/DerivedTypes.h"
20 #include "llvm/Assembly/Writer.h"
21 #include "llvm/CallingConv.h"
22 #include "llvm/CodeGen/MachineBasicBlock.h"
23 #include "llvm/CodeGen/MachineConstantPool.h"
24 #include "llvm/CodeGen/MachineFrameInfo.h"
25 #include "llvm/CodeGen/MachineModuleInfo.h"
26 #include "llvm/CodeGen/PseudoSourceValue.h"
27 #include "llvm/Target/TargetRegisterInfo.h"
28 #include "llvm/Target/TargetData.h"
29 #include "llvm/Target/TargetLowering.h"
30 #include "llvm/Target/TargetInstrInfo.h"
31 #include "llvm/Target/TargetMachine.h"
32 #include "llvm/Support/CommandLine.h"
33 #include "llvm/Support/MathExtras.h"
34 #include "llvm/Support/raw_ostream.h"
35 #include "llvm/ADT/SetVector.h"
36 #include "llvm/ADT/SmallPtrSet.h"
37 #include "llvm/ADT/SmallSet.h"
38 #include "llvm/ADT/SmallVector.h"
39 #include "llvm/ADT/StringExtras.h"
44 /// makeVTList - Return an instance of the SDVTList struct initialized with the
45 /// specified members.
46 static SDVTList makeVTList(const MVT *VTs, unsigned NumVTs) {
47 SDVTList Res = {VTs, NumVTs};
51 static const fltSemantics *MVTToAPFloatSemantics(MVT VT) {
52 switch (VT.getSimpleVT()) {
53 default: assert(0 && "Unknown FP format");
54 case MVT::f32: return &APFloat::IEEEsingle;
55 case MVT::f64: return &APFloat::IEEEdouble;
56 case MVT::f80: return &APFloat::x87DoubleExtended;
57 case MVT::f128: return &APFloat::IEEEquad;
58 case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
62 SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {}
64 //===----------------------------------------------------------------------===//
65 // ConstantFPSDNode Class
66 //===----------------------------------------------------------------------===//
68 /// isExactlyValue - We don't rely on operator== working on double values, as
69 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
70 /// As such, this method can be used to do an exact bit-for-bit comparison of
71 /// two floating point values.
72 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
73 return getValueAPF().bitwiseIsEqual(V);
76 bool ConstantFPSDNode::isValueValidForType(MVT VT,
78 assert(VT.isFloatingPoint() && "Can only convert between FP types");
80 // PPC long double cannot be converted to any other type.
81 if (VT == MVT::ppcf128 ||
82 &Val.getSemantics() == &APFloat::PPCDoubleDouble)
85 // convert modifies in place, so make a copy.
86 APFloat Val2 = APFloat(Val);
87 return Val2.convert(*MVTToAPFloatSemantics(VT),
88 APFloat::rmNearestTiesToEven) == APFloat::opOK;
91 //===----------------------------------------------------------------------===//
93 //===----------------------------------------------------------------------===//
95 /// isBuildVectorAllOnes - Return true if the specified node is a
96 /// BUILD_VECTOR where all of the elements are ~0 or undef.
97 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
98 // Look through a bit convert.
99 if (N->getOpcode() == ISD::BIT_CONVERT)
100 N = N->getOperand(0).getNode();
102 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
104 unsigned i = 0, e = N->getNumOperands();
106 // Skip over all of the undef values.
107 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
110 // Do not accept an all-undef vector.
111 if (i == e) return false;
113 // Do not accept build_vectors that aren't all constants or which have non-~0
115 SDValue NotZero = N->getOperand(i);
116 if (isa<ConstantSDNode>(NotZero)) {
117 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue())
119 } else if (isa<ConstantFPSDNode>(NotZero)) {
120 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF().
121 convertToAPInt().isAllOnesValue())
126 // Okay, we have at least one ~0 value, check to see if the rest match or are
128 for (++i; i != e; ++i)
129 if (N->getOperand(i) != NotZero &&
130 N->getOperand(i).getOpcode() != ISD::UNDEF)
136 /// isBuildVectorAllZeros - Return true if the specified node is a
137 /// BUILD_VECTOR where all of the elements are 0 or undef.
138 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
139 // Look through a bit convert.
140 if (N->getOpcode() == ISD::BIT_CONVERT)
141 N = N->getOperand(0).getNode();
143 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
145 unsigned i = 0, e = N->getNumOperands();
147 // Skip over all of the undef values.
148 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
151 // Do not accept an all-undef vector.
152 if (i == e) return false;
154 // Do not accept build_vectors that aren't all constants or which have non-~0
156 SDValue Zero = N->getOperand(i);
157 if (isa<ConstantSDNode>(Zero)) {
158 if (!cast<ConstantSDNode>(Zero)->isNullValue())
160 } else if (isa<ConstantFPSDNode>(Zero)) {
161 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero())
166 // Okay, we have at least one ~0 value, check to see if the rest match or are
168 for (++i; i != e; ++i)
169 if (N->getOperand(i) != Zero &&
170 N->getOperand(i).getOpcode() != ISD::UNDEF)
175 /// isScalarToVector - Return true if the specified node is a
176 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
177 /// element is not an undef.
178 bool ISD::isScalarToVector(const SDNode *N) {
179 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
182 if (N->getOpcode() != ISD::BUILD_VECTOR)
184 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
186 unsigned NumElems = N->getNumOperands();
187 for (unsigned i = 1; i < NumElems; ++i) {
188 SDValue V = N->getOperand(i);
189 if (V.getOpcode() != ISD::UNDEF)
196 /// isDebugLabel - Return true if the specified node represents a debug
197 /// label (i.e. ISD::DBG_LABEL or TargetInstrInfo::DBG_LABEL node).
198 bool ISD::isDebugLabel(const SDNode *N) {
200 if (N->getOpcode() == ISD::DBG_LABEL)
202 if (N->isMachineOpcode() &&
203 N->getMachineOpcode() == TargetInstrInfo::DBG_LABEL)
208 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
209 /// when given the operation for (X op Y).
210 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
211 // To perform this operation, we just need to swap the L and G bits of the
213 unsigned OldL = (Operation >> 2) & 1;
214 unsigned OldG = (Operation >> 1) & 1;
215 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
216 (OldL << 1) | // New G bit
217 (OldG << 2)); // New L bit.
220 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
221 /// 'op' is a valid SetCC operation.
222 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
223 unsigned Operation = Op;
225 Operation ^= 7; // Flip L, G, E bits, but not U.
227 Operation ^= 15; // Flip all of the condition bits.
228 if (Operation > ISD::SETTRUE2)
229 Operation &= ~8; // Don't let N and U bits get set.
230 return ISD::CondCode(Operation);
234 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
235 /// signed operation and 2 if the result is an unsigned comparison. Return zero
236 /// if the operation does not depend on the sign of the input (setne and seteq).
237 static int isSignedOp(ISD::CondCode Opcode) {
239 default: assert(0 && "Illegal integer setcc operation!");
241 case ISD::SETNE: return 0;
245 case ISD::SETGE: return 1;
249 case ISD::SETUGE: return 2;
253 /// getSetCCOrOperation - Return the result of a logical OR between different
254 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
255 /// returns SETCC_INVALID if it is not possible to represent the resultant
257 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
259 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
260 // Cannot fold a signed integer setcc with an unsigned integer setcc.
261 return ISD::SETCC_INVALID;
263 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
265 // If the N and U bits get set then the resultant comparison DOES suddenly
266 // care about orderedness, and is true when ordered.
267 if (Op > ISD::SETTRUE2)
268 Op &= ~16; // Clear the U bit if the N bit is set.
270 // Canonicalize illegal integer setcc's.
271 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
274 return ISD::CondCode(Op);
277 /// getSetCCAndOperation - Return the result of a logical AND between different
278 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
279 /// function returns zero if it is not possible to represent the resultant
281 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
283 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
284 // Cannot fold a signed setcc with an unsigned setcc.
285 return ISD::SETCC_INVALID;
287 // Combine all of the condition bits.
288 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
290 // Canonicalize illegal integer setcc's.
294 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
295 case ISD::SETOEQ: // SETEQ & SETU[LG]E
296 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
297 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
298 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
305 const TargetMachine &SelectionDAG::getTarget() const {
306 return MF->getTarget();
309 //===----------------------------------------------------------------------===//
310 // SDNode Profile Support
311 //===----------------------------------------------------------------------===//
313 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
315 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
319 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
320 /// solely with their pointer.
321 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
322 ID.AddPointer(VTList.VTs);
325 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
327 static void AddNodeIDOperands(FoldingSetNodeID &ID,
328 const SDValue *Ops, unsigned NumOps) {
329 for (; NumOps; --NumOps, ++Ops) {
330 ID.AddPointer(Ops->getNode());
331 ID.AddInteger(Ops->getResNo());
335 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
337 static void AddNodeIDOperands(FoldingSetNodeID &ID,
338 const SDUse *Ops, unsigned NumOps) {
339 for (; NumOps; --NumOps, ++Ops) {
340 ID.AddPointer(Ops->getVal());
341 ID.AddInteger(Ops->getSDValue().getResNo());
345 static void AddNodeIDNode(FoldingSetNodeID &ID,
346 unsigned short OpC, SDVTList VTList,
347 const SDValue *OpList, unsigned N) {
348 AddNodeIDOpcode(ID, OpC);
349 AddNodeIDValueTypes(ID, VTList);
350 AddNodeIDOperands(ID, OpList, N);
354 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
356 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
357 AddNodeIDOpcode(ID, N->getOpcode());
358 // Add the return value info.
359 AddNodeIDValueTypes(ID, N->getVTList());
360 // Add the operand info.
361 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
363 // Handle SDNode leafs with special info.
364 switch (N->getOpcode()) {
365 default: break; // Normal nodes don't need extra info.
367 ID.AddInteger(cast<ARG_FLAGSSDNode>(N)->getArgFlags().getRawBits());
369 case ISD::TargetConstant:
371 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
373 case ISD::TargetConstantFP:
374 case ISD::ConstantFP: {
375 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
378 case ISD::TargetGlobalAddress:
379 case ISD::GlobalAddress:
380 case ISD::TargetGlobalTLSAddress:
381 case ISD::GlobalTLSAddress: {
382 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
383 ID.AddPointer(GA->getGlobal());
384 ID.AddInteger(GA->getOffset());
387 case ISD::BasicBlock:
388 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
391 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
393 case ISD::DBG_STOPPOINT: {
394 const DbgStopPointSDNode *DSP = cast<DbgStopPointSDNode>(N);
395 ID.AddInteger(DSP->getLine());
396 ID.AddInteger(DSP->getColumn());
397 ID.AddPointer(DSP->getCompileUnit());
401 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
403 case ISD::MEMOPERAND: {
404 const MachineMemOperand &MO = cast<MemOperandSDNode>(N)->MO;
408 case ISD::FrameIndex:
409 case ISD::TargetFrameIndex:
410 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
413 case ISD::TargetJumpTable:
414 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
416 case ISD::ConstantPool:
417 case ISD::TargetConstantPool: {
418 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
419 ID.AddInteger(CP->getAlignment());
420 ID.AddInteger(CP->getOffset());
421 if (CP->isMachineConstantPoolEntry())
422 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID);
424 ID.AddPointer(CP->getConstVal());
428 const CallSDNode *Call = cast<CallSDNode>(N);
429 ID.AddInteger(Call->getCallingConv());
430 ID.AddInteger(Call->isVarArg());
434 const LoadSDNode *LD = cast<LoadSDNode>(N);
435 ID.AddInteger(LD->getAddressingMode());
436 ID.AddInteger(LD->getExtensionType());
437 ID.AddInteger(LD->getMemoryVT().getRawBits());
438 ID.AddInteger(LD->getRawFlags());
442 const StoreSDNode *ST = cast<StoreSDNode>(N);
443 ID.AddInteger(ST->getAddressingMode());
444 ID.AddInteger(ST->isTruncatingStore());
445 ID.AddInteger(ST->getMemoryVT().getRawBits());
446 ID.AddInteger(ST->getRawFlags());
449 case ISD::ATOMIC_CMP_SWAP_8:
450 case ISD::ATOMIC_SWAP_8:
451 case ISD::ATOMIC_LOAD_ADD_8:
452 case ISD::ATOMIC_LOAD_SUB_8:
453 case ISD::ATOMIC_LOAD_AND_8:
454 case ISD::ATOMIC_LOAD_OR_8:
455 case ISD::ATOMIC_LOAD_XOR_8:
456 case ISD::ATOMIC_LOAD_NAND_8:
457 case ISD::ATOMIC_LOAD_MIN_8:
458 case ISD::ATOMIC_LOAD_MAX_8:
459 case ISD::ATOMIC_LOAD_UMIN_8:
460 case ISD::ATOMIC_LOAD_UMAX_8:
461 case ISD::ATOMIC_CMP_SWAP_16:
462 case ISD::ATOMIC_SWAP_16:
463 case ISD::ATOMIC_LOAD_ADD_16:
464 case ISD::ATOMIC_LOAD_SUB_16:
465 case ISD::ATOMIC_LOAD_AND_16:
466 case ISD::ATOMIC_LOAD_OR_16:
467 case ISD::ATOMIC_LOAD_XOR_16:
468 case ISD::ATOMIC_LOAD_NAND_16:
469 case ISD::ATOMIC_LOAD_MIN_16:
470 case ISD::ATOMIC_LOAD_MAX_16:
471 case ISD::ATOMIC_LOAD_UMIN_16:
472 case ISD::ATOMIC_LOAD_UMAX_16:
473 case ISD::ATOMIC_CMP_SWAP_32:
474 case ISD::ATOMIC_SWAP_32:
475 case ISD::ATOMIC_LOAD_ADD_32:
476 case ISD::ATOMIC_LOAD_SUB_32:
477 case ISD::ATOMIC_LOAD_AND_32:
478 case ISD::ATOMIC_LOAD_OR_32:
479 case ISD::ATOMIC_LOAD_XOR_32:
480 case ISD::ATOMIC_LOAD_NAND_32:
481 case ISD::ATOMIC_LOAD_MIN_32:
482 case ISD::ATOMIC_LOAD_MAX_32:
483 case ISD::ATOMIC_LOAD_UMIN_32:
484 case ISD::ATOMIC_LOAD_UMAX_32:
485 case ISD::ATOMIC_CMP_SWAP_64:
486 case ISD::ATOMIC_SWAP_64:
487 case ISD::ATOMIC_LOAD_ADD_64:
488 case ISD::ATOMIC_LOAD_SUB_64:
489 case ISD::ATOMIC_LOAD_AND_64:
490 case ISD::ATOMIC_LOAD_OR_64:
491 case ISD::ATOMIC_LOAD_XOR_64:
492 case ISD::ATOMIC_LOAD_NAND_64:
493 case ISD::ATOMIC_LOAD_MIN_64:
494 case ISD::ATOMIC_LOAD_MAX_64:
495 case ISD::ATOMIC_LOAD_UMIN_64:
496 case ISD::ATOMIC_LOAD_UMAX_64: {
497 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
498 ID.AddInteger(AT->getRawFlags());
501 } // end switch (N->getOpcode())
504 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
505 /// the CSE map that carries both alignment and volatility information.
507 static unsigned encodeMemSDNodeFlags(bool isVolatile, unsigned Alignment) {
508 return isVolatile | ((Log2_32(Alignment) + 1) << 1);
511 //===----------------------------------------------------------------------===//
512 // SelectionDAG Class
513 //===----------------------------------------------------------------------===//
515 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
517 void SelectionDAG::RemoveDeadNodes() {
518 // Create a dummy node (which is not added to allnodes), that adds a reference
519 // to the root node, preventing it from being deleted.
520 HandleSDNode Dummy(getRoot());
522 SmallVector<SDNode*, 128> DeadNodes;
524 // Add all obviously-dead nodes to the DeadNodes worklist.
525 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
527 DeadNodes.push_back(I);
529 RemoveDeadNodes(DeadNodes);
531 // If the root changed (e.g. it was a dead load, update the root).
532 setRoot(Dummy.getValue());
535 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
536 /// given list, and any nodes that become unreachable as a result.
537 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes,
538 DAGUpdateListener *UpdateListener) {
540 // Process the worklist, deleting the nodes and adding their uses to the
542 while (!DeadNodes.empty()) {
543 SDNode *N = DeadNodes.back();
544 DeadNodes.pop_back();
547 UpdateListener->NodeDeleted(N, 0);
549 // Take the node out of the appropriate CSE map.
550 RemoveNodeFromCSEMaps(N);
552 // Next, brutally remove the operand list. This is safe to do, as there are
553 // no cycles in the graph.
554 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) {
555 SDNode *Operand = I->getVal();
556 Operand->removeUser(std::distance(N->op_begin(), I), N);
558 // Now that we removed this operand, see if there are no uses of it left.
559 if (Operand->use_empty())
560 DeadNodes.push_back(Operand);
562 if (N->OperandsNeedDelete) {
563 delete[] N->OperandList;
568 // Finally, remove N itself.
569 NodeAllocator.Deallocate(AllNodes.remove(N));
573 void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){
574 SmallVector<SDNode*, 16> DeadNodes(1, N);
575 RemoveDeadNodes(DeadNodes, UpdateListener);
578 void SelectionDAG::DeleteNode(SDNode *N) {
579 assert(N->use_empty() && "Cannot delete a node that is not dead!");
581 // First take this out of the appropriate CSE map.
582 RemoveNodeFromCSEMaps(N);
584 // Finally, remove uses due to operands of this node, remove from the
585 // AllNodes list, and delete the node.
586 DeleteNodeNotInCSEMaps(N);
589 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
591 // Drop all of the operands and decrement used node's use counts.
592 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I)
593 I->getVal()->removeUser(std::distance(N->op_begin(), I), N);
594 if (N->OperandsNeedDelete)
595 delete[] N->OperandList;
597 assert(N != AllNodes.begin());
598 NodeAllocator.Deallocate(AllNodes.remove(N));
601 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
602 /// correspond to it. This is useful when we're about to delete or repurpose
603 /// the node. We don't want future request for structurally identical nodes
604 /// to return N anymore.
605 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
607 switch (N->getOpcode()) {
608 case ISD::EntryToken:
609 assert(0 && "EntryToken should not be in CSEMaps!");
611 case ISD::HANDLENODE: return false; // noop.
613 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
614 "Cond code doesn't exist!");
615 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
616 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
618 case ISD::ExternalSymbol:
619 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
621 case ISD::TargetExternalSymbol:
623 TargetExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
625 case ISD::VALUETYPE: {
626 MVT VT = cast<VTSDNode>(N)->getVT();
627 if (VT.isExtended()) {
628 Erased = ExtendedValueTypeNodes.erase(VT);
630 Erased = ValueTypeNodes[VT.getSimpleVT()] != 0;
631 ValueTypeNodes[VT.getSimpleVT()] = 0;
636 // Remove it from the CSE Map.
637 Erased = CSEMap.RemoveNode(N);
641 // Verify that the node was actually in one of the CSE maps, unless it has a
642 // flag result (which cannot be CSE'd) or is one of the special cases that are
643 // not subject to CSE.
644 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag &&
645 !N->isMachineOpcode() &&
646 N->getOpcode() != ISD::DBG_LABEL &&
647 N->getOpcode() != ISD::DBG_STOPPOINT &&
648 N->getOpcode() != ISD::EH_LABEL &&
649 N->getOpcode() != ISD::DECLARE) {
652 assert(0 && "Node is not in map!");
658 /// AddNonLeafNodeToCSEMaps - Add the specified node back to the CSE maps. It
659 /// has been taken out and modified in some way. If the specified node already
660 /// exists in the CSE maps, do not modify the maps, but return the existing node
661 /// instead. If it doesn't exist, add it and return null.
663 SDNode *SelectionDAG::AddNonLeafNodeToCSEMaps(SDNode *N) {
664 assert(N->getNumOperands() && "This is a leaf node!");
666 if (N->getValueType(0) == MVT::Flag)
667 return 0; // Never CSE anything that produces a flag.
669 switch (N->getOpcode()) {
671 case ISD::HANDLENODE:
673 case ISD::DBG_STOPPOINT:
676 return 0; // Never add these nodes.
679 // Check that remaining values produced are not flags.
680 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
681 if (N->getValueType(i) == MVT::Flag)
682 return 0; // Never CSE anything that produces a flag.
684 SDNode *New = CSEMap.GetOrInsertNode(N);
685 if (New != N) return New; // Node already existed.
689 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
690 /// were replaced with those specified. If this node is never memoized,
691 /// return null, otherwise return a pointer to the slot it would take. If a
692 /// node already exists with these operands, the slot will be non-null.
693 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
695 if (N->getValueType(0) == MVT::Flag)
696 return 0; // Never CSE anything that produces a flag.
698 switch (N->getOpcode()) {
700 case ISD::HANDLENODE:
702 case ISD::DBG_STOPPOINT:
704 return 0; // Never add these nodes.
707 // Check that remaining values produced are not flags.
708 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
709 if (N->getValueType(i) == MVT::Flag)
710 return 0; // Never CSE anything that produces a flag.
712 SDValue Ops[] = { Op };
714 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
715 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
718 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
719 /// were replaced with those specified. If this node is never memoized,
720 /// return null, otherwise return a pointer to the slot it would take. If a
721 /// node already exists with these operands, the slot will be non-null.
722 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
723 SDValue Op1, SDValue Op2,
725 if (N->getOpcode() == ISD::HANDLENODE || N->getValueType(0) == MVT::Flag)
727 // Check that remaining values produced are not flags.
728 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
729 if (N->getValueType(i) == MVT::Flag)
730 return 0; // Never CSE anything that produces a flag.
732 SDValue Ops[] = { Op1, Op2 };
734 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
735 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
739 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
740 /// were replaced with those specified. If this node is never memoized,
741 /// return null, otherwise return a pointer to the slot it would take. If a
742 /// node already exists with these operands, the slot will be non-null.
743 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
744 const SDValue *Ops,unsigned NumOps,
746 if (N->getValueType(0) == MVT::Flag)
747 return 0; // Never CSE anything that produces a flag.
749 switch (N->getOpcode()) {
751 case ISD::HANDLENODE:
753 case ISD::DBG_STOPPOINT:
756 return 0; // Never add these nodes.
759 // Check that remaining values produced are not flags.
760 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
761 if (N->getValueType(i) == MVT::Flag)
762 return 0; // Never CSE anything that produces a flag.
765 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
767 if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(N)) {
768 ID.AddInteger(LD->getAddressingMode());
769 ID.AddInteger(LD->getExtensionType());
770 ID.AddInteger(LD->getMemoryVT().getRawBits());
771 ID.AddInteger(LD->getRawFlags());
772 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(N)) {
773 ID.AddInteger(ST->getAddressingMode());
774 ID.AddInteger(ST->isTruncatingStore());
775 ID.AddInteger(ST->getMemoryVT().getRawBits());
776 ID.AddInteger(ST->getRawFlags());
779 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
782 /// VerifyNode - Sanity check the given node. Aborts if it is invalid.
783 void SelectionDAG::VerifyNode(SDNode *N) {
784 switch (N->getOpcode()) {
787 case ISD::BUILD_VECTOR: {
788 assert(N->getNumValues() == 1 && "Too many results for BUILD_VECTOR!");
789 assert(N->getValueType(0).isVector() && "Wrong BUILD_VECTOR return type!");
790 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
791 "Wrong number of BUILD_VECTOR operands!");
792 MVT EltVT = N->getValueType(0).getVectorElementType();
793 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I)
794 assert(I->getSDValue().getValueType() == EltVT &&
795 "Wrong BUILD_VECTOR operand type!");
801 /// getMVTAlignment - Compute the default alignment value for the
804 unsigned SelectionDAG::getMVTAlignment(MVT VT) const {
805 const Type *Ty = VT == MVT::iPTR ?
806 PointerType::get(Type::Int8Ty, 0) :
809 return TLI.getTargetData()->getABITypeAlignment(Ty);
812 SelectionDAG::SelectionDAG(TargetLowering &tli, FunctionLoweringInfo &fli)
813 : TLI(tli), FLI(fli),
814 EntryNode(ISD::EntryToken, getVTList(MVT::Other)),
815 Root(getEntryNode()) {
816 AllNodes.push_back(&EntryNode);
819 void SelectionDAG::init(MachineFunction &mf, MachineModuleInfo *mmi) {
824 SelectionDAG::~SelectionDAG() {
828 void SelectionDAG::allnodes_clear() {
829 assert(&*AllNodes.begin() == &EntryNode);
830 AllNodes.remove(AllNodes.begin());
831 while (!AllNodes.empty()) {
832 SDNode *N = AllNodes.remove(AllNodes.begin());
833 N->SetNextInBucket(0);
834 if (N->OperandsNeedDelete)
835 delete [] N->OperandList;
836 NodeAllocator.Deallocate(N);
840 void SelectionDAG::clear() {
842 OperandAllocator.Reset();
845 ExtendedValueTypeNodes.clear();
846 ExternalSymbols.clear();
847 TargetExternalSymbols.clear();
848 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
849 static_cast<CondCodeSDNode*>(0));
850 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
851 static_cast<SDNode*>(0));
854 AllNodes.push_back(&EntryNode);
855 Root = getEntryNode();
858 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, MVT VT) {
859 if (Op.getValueType() == VT) return Op;
860 APInt Imm = APInt::getLowBitsSet(Op.getValueSizeInBits(),
862 return getNode(ISD::AND, Op.getValueType(), Op,
863 getConstant(Imm, Op.getValueType()));
866 SDValue SelectionDAG::getConstant(uint64_t Val, MVT VT, bool isT) {
867 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
868 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
871 SDValue SelectionDAG::getConstant(const APInt &Val, MVT VT, bool isT) {
872 return getConstant(*ConstantInt::get(Val), VT, isT);
875 SDValue SelectionDAG::getConstant(const ConstantInt &Val, MVT VT, bool isT) {
876 assert(VT.isInteger() && "Cannot create FP integer constant!");
878 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
879 assert(Val.getBitWidth() == EltVT.getSizeInBits() &&
880 "APInt size does not match type size!");
882 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
884 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
888 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
890 return SDValue(N, 0);
892 N = NodeAllocator.Allocate<ConstantSDNode>();
893 new (N) ConstantSDNode(isT, &Val, EltVT);
894 CSEMap.InsertNode(N, IP);
895 AllNodes.push_back(N);
898 SDValue Result(N, 0);
900 SmallVector<SDValue, 8> Ops;
901 Ops.assign(VT.getVectorNumElements(), Result);
902 Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size());
907 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
908 return getConstant(Val, TLI.getPointerTy(), isTarget);
912 SDValue SelectionDAG::getConstantFP(const APFloat& V, MVT VT, bool isTarget) {
913 return getConstantFP(*ConstantFP::get(V), VT, isTarget);
916 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, MVT VT, bool isTarget){
917 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
920 VT.isVector() ? VT.getVectorElementType() : VT;
922 // Do the map lookup using the actual bit pattern for the floating point
923 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
924 // we don't have issues with SNANs.
925 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
927 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
931 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
933 return SDValue(N, 0);
935 N = NodeAllocator.Allocate<ConstantFPSDNode>();
936 new (N) ConstantFPSDNode(isTarget, &V, EltVT);
937 CSEMap.InsertNode(N, IP);
938 AllNodes.push_back(N);
941 SDValue Result(N, 0);
943 SmallVector<SDValue, 8> Ops;
944 Ops.assign(VT.getVectorNumElements(), Result);
945 Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size());
950 SDValue SelectionDAG::getConstantFP(double Val, MVT VT, bool isTarget) {
952 VT.isVector() ? VT.getVectorElementType() : VT;
954 return getConstantFP(APFloat((float)Val), VT, isTarget);
956 return getConstantFP(APFloat(Val), VT, isTarget);
959 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV,
964 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
966 // If GV is an alias then use the aliasee for determining thread-localness.
967 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
968 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
971 if (GVar && GVar->isThreadLocal())
972 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
974 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
977 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
979 ID.AddInteger(Offset);
981 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
982 return SDValue(E, 0);
983 SDNode *N = NodeAllocator.Allocate<GlobalAddressSDNode>();
984 new (N) GlobalAddressSDNode(isTargetGA, GV, VT, Offset);
985 CSEMap.InsertNode(N, IP);
986 AllNodes.push_back(N);
987 return SDValue(N, 0);
990 SDValue SelectionDAG::getFrameIndex(int FI, MVT VT, bool isTarget) {
991 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
993 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
996 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
997 return SDValue(E, 0);
998 SDNode *N = NodeAllocator.Allocate<FrameIndexSDNode>();
999 new (N) FrameIndexSDNode(FI, VT, isTarget);
1000 CSEMap.InsertNode(N, IP);
1001 AllNodes.push_back(N);
1002 return SDValue(N, 0);
1005 SDValue SelectionDAG::getJumpTable(int JTI, MVT VT, bool isTarget){
1006 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1007 FoldingSetNodeID ID;
1008 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1011 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1012 return SDValue(E, 0);
1013 SDNode *N = NodeAllocator.Allocate<JumpTableSDNode>();
1014 new (N) JumpTableSDNode(JTI, VT, isTarget);
1015 CSEMap.InsertNode(N, IP);
1016 AllNodes.push_back(N);
1017 return SDValue(N, 0);
1020 SDValue SelectionDAG::getConstantPool(Constant *C, MVT VT,
1021 unsigned Alignment, int Offset,
1025 TLI.getTargetData()->getPreferredTypeAlignmentShift(C->getType());
1026 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1027 FoldingSetNodeID ID;
1028 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1029 ID.AddInteger(Alignment);
1030 ID.AddInteger(Offset);
1033 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1034 return SDValue(E, 0);
1035 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>();
1036 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment);
1037 CSEMap.InsertNode(N, IP);
1038 AllNodes.push_back(N);
1039 return SDValue(N, 0);
1043 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, MVT VT,
1044 unsigned Alignment, int Offset,
1048 TLI.getTargetData()->getPreferredTypeAlignmentShift(C->getType());
1049 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1050 FoldingSetNodeID ID;
1051 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1052 ID.AddInteger(Alignment);
1053 ID.AddInteger(Offset);
1054 C->AddSelectionDAGCSEId(ID);
1056 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1057 return SDValue(E, 0);
1058 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>();
1059 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment);
1060 CSEMap.InsertNode(N, IP);
1061 AllNodes.push_back(N);
1062 return SDValue(N, 0);
1066 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1067 FoldingSetNodeID ID;
1068 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1071 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1072 return SDValue(E, 0);
1073 SDNode *N = NodeAllocator.Allocate<BasicBlockSDNode>();
1074 new (N) BasicBlockSDNode(MBB);
1075 CSEMap.InsertNode(N, IP);
1076 AllNodes.push_back(N);
1077 return SDValue(N, 0);
1080 SDValue SelectionDAG::getArgFlags(ISD::ArgFlagsTy Flags) {
1081 FoldingSetNodeID ID;
1082 AddNodeIDNode(ID, ISD::ARG_FLAGS, getVTList(MVT::Other), 0, 0);
1083 ID.AddInteger(Flags.getRawBits());
1085 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1086 return SDValue(E, 0);
1087 SDNode *N = NodeAllocator.Allocate<ARG_FLAGSSDNode>();
1088 new (N) ARG_FLAGSSDNode(Flags);
1089 CSEMap.InsertNode(N, IP);
1090 AllNodes.push_back(N);
1091 return SDValue(N, 0);
1094 SDValue SelectionDAG::getValueType(MVT VT) {
1095 if (VT.isSimple() && (unsigned)VT.getSimpleVT() >= ValueTypeNodes.size())
1096 ValueTypeNodes.resize(VT.getSimpleVT()+1);
1098 SDNode *&N = VT.isExtended() ?
1099 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT()];
1101 if (N) return SDValue(N, 0);
1102 N = NodeAllocator.Allocate<VTSDNode>();
1103 new (N) VTSDNode(VT);
1104 AllNodes.push_back(N);
1105 return SDValue(N, 0);
1108 SDValue SelectionDAG::getExternalSymbol(const char *Sym, MVT VT) {
1109 SDNode *&N = ExternalSymbols[Sym];
1110 if (N) return SDValue(N, 0);
1111 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1112 new (N) ExternalSymbolSDNode(false, Sym, VT);
1113 AllNodes.push_back(N);
1114 return SDValue(N, 0);
1117 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, MVT VT) {
1118 SDNode *&N = TargetExternalSymbols[Sym];
1119 if (N) return SDValue(N, 0);
1120 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1121 new (N) ExternalSymbolSDNode(true, Sym, VT);
1122 AllNodes.push_back(N);
1123 return SDValue(N, 0);
1126 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1127 if ((unsigned)Cond >= CondCodeNodes.size())
1128 CondCodeNodes.resize(Cond+1);
1130 if (CondCodeNodes[Cond] == 0) {
1131 CondCodeSDNode *N = NodeAllocator.Allocate<CondCodeSDNode>();
1132 new (N) CondCodeSDNode(Cond);
1133 CondCodeNodes[Cond] = N;
1134 AllNodes.push_back(N);
1136 return SDValue(CondCodeNodes[Cond], 0);
1139 SDValue SelectionDAG::getRegister(unsigned RegNo, MVT VT) {
1140 FoldingSetNodeID ID;
1141 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1142 ID.AddInteger(RegNo);
1144 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1145 return SDValue(E, 0);
1146 SDNode *N = NodeAllocator.Allocate<RegisterSDNode>();
1147 new (N) RegisterSDNode(RegNo, VT);
1148 CSEMap.InsertNode(N, IP);
1149 AllNodes.push_back(N);
1150 return SDValue(N, 0);
1153 SDValue SelectionDAG::getDbgStopPoint(SDValue Root,
1154 unsigned Line, unsigned Col,
1155 const CompileUnitDesc *CU) {
1156 SDNode *N = NodeAllocator.Allocate<DbgStopPointSDNode>();
1157 new (N) DbgStopPointSDNode(Root, Line, Col, CU);
1158 AllNodes.push_back(N);
1159 return SDValue(N, 0);
1162 SDValue SelectionDAG::getLabel(unsigned Opcode,
1165 FoldingSetNodeID ID;
1166 SDValue Ops[] = { Root };
1167 AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), &Ops[0], 1);
1168 ID.AddInteger(LabelID);
1170 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1171 return SDValue(E, 0);
1172 SDNode *N = NodeAllocator.Allocate<LabelSDNode>();
1173 new (N) LabelSDNode(Opcode, Root, LabelID);
1174 CSEMap.InsertNode(N, IP);
1175 AllNodes.push_back(N);
1176 return SDValue(N, 0);
1179 SDValue SelectionDAG::getSrcValue(const Value *V) {
1180 assert((!V || isa<PointerType>(V->getType())) &&
1181 "SrcValue is not a pointer?");
1183 FoldingSetNodeID ID;
1184 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1188 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1189 return SDValue(E, 0);
1191 SDNode *N = NodeAllocator.Allocate<SrcValueSDNode>();
1192 new (N) SrcValueSDNode(V);
1193 CSEMap.InsertNode(N, IP);
1194 AllNodes.push_back(N);
1195 return SDValue(N, 0);
1198 SDValue SelectionDAG::getMemOperand(const MachineMemOperand &MO) {
1199 const Value *v = MO.getValue();
1200 assert((!v || isa<PointerType>(v->getType())) &&
1201 "SrcValue is not a pointer?");
1203 FoldingSetNodeID ID;
1204 AddNodeIDNode(ID, ISD::MEMOPERAND, getVTList(MVT::Other), 0, 0);
1208 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1209 return SDValue(E, 0);
1211 SDNode *N = NodeAllocator.Allocate<MemOperandSDNode>();
1212 new (N) MemOperandSDNode(MO);
1213 CSEMap.InsertNode(N, IP);
1214 AllNodes.push_back(N);
1215 return SDValue(N, 0);
1218 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1219 /// specified value type.
1220 SDValue SelectionDAG::CreateStackTemporary(MVT VT, unsigned minAlign) {
1221 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1222 unsigned ByteSize = VT.getSizeInBits()/8;
1223 const Type *Ty = VT.getTypeForMVT();
1224 unsigned StackAlign =
1225 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign);
1227 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign);
1228 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1231 SDValue SelectionDAG::FoldSetCC(MVT VT, SDValue N1,
1232 SDValue N2, ISD::CondCode Cond) {
1233 // These setcc operations always fold.
1237 case ISD::SETFALSE2: return getConstant(0, VT);
1239 case ISD::SETTRUE2: return getConstant(1, VT);
1251 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1255 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1256 const APInt &C2 = N2C->getAPIntValue();
1257 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1258 const APInt &C1 = N1C->getAPIntValue();
1261 default: assert(0 && "Unknown integer setcc!");
1262 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1263 case ISD::SETNE: return getConstant(C1 != C2, VT);
1264 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1265 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1266 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1267 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1268 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1269 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1270 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1271 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1275 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1276 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1277 // No compile time operations on this type yet.
1278 if (N1C->getValueType(0) == MVT::ppcf128)
1281 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1284 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1285 return getNode(ISD::UNDEF, VT);
1287 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1288 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1289 return getNode(ISD::UNDEF, VT);
1291 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1292 R==APFloat::cmpLessThan, VT);
1293 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1294 return getNode(ISD::UNDEF, VT);
1296 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1297 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1298 return getNode(ISD::UNDEF, VT);
1300 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1301 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1302 return getNode(ISD::UNDEF, VT);
1304 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1305 R==APFloat::cmpEqual, VT);
1306 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1307 return getNode(ISD::UNDEF, VT);
1309 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1310 R==APFloat::cmpEqual, VT);
1311 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1312 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1313 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1314 R==APFloat::cmpEqual, VT);
1315 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1316 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1317 R==APFloat::cmpLessThan, VT);
1318 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1319 R==APFloat::cmpUnordered, VT);
1320 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1321 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1324 // Ensure that the constant occurs on the RHS.
1325 return getSetCC(VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1329 // Could not fold it.
1333 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1334 /// use this predicate to simplify operations downstream.
1335 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1336 unsigned BitWidth = Op.getValueSizeInBits();
1337 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1340 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1341 /// this predicate to simplify operations downstream. Mask is known to be zero
1342 /// for bits that V cannot have.
1343 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1344 unsigned Depth) const {
1345 APInt KnownZero, KnownOne;
1346 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
1347 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1348 return (KnownZero & Mask) == Mask;
1351 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1352 /// known to be either zero or one and return them in the KnownZero/KnownOne
1353 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1355 void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask,
1356 APInt &KnownZero, APInt &KnownOne,
1357 unsigned Depth) const {
1358 unsigned BitWidth = Mask.getBitWidth();
1359 assert(BitWidth == Op.getValueType().getSizeInBits() &&
1360 "Mask size mismatches value type size!");
1362 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1363 if (Depth == 6 || Mask == 0)
1364 return; // Limit search depth.
1366 APInt KnownZero2, KnownOne2;
1368 switch (Op.getOpcode()) {
1370 // We know all of the bits for a constant!
1371 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask;
1372 KnownZero = ~KnownOne & Mask;
1375 // If either the LHS or the RHS are Zero, the result is zero.
1376 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1377 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero,
1378 KnownZero2, KnownOne2, Depth+1);
1379 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1380 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1382 // Output known-1 bits are only known if set in both the LHS & RHS.
1383 KnownOne &= KnownOne2;
1384 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1385 KnownZero |= KnownZero2;
1388 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1389 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne,
1390 KnownZero2, KnownOne2, Depth+1);
1391 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1392 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1394 // Output known-0 bits are only known if clear in both the LHS & RHS.
1395 KnownZero &= KnownZero2;
1396 // Output known-1 are known to be set if set in either the LHS | RHS.
1397 KnownOne |= KnownOne2;
1400 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1401 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
1402 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1403 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1405 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1406 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1407 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1408 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1409 KnownZero = KnownZeroOut;
1413 APInt Mask2 = APInt::getAllOnesValue(BitWidth);
1414 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1);
1415 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1416 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1417 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1419 // If low bits are zero in either operand, output low known-0 bits.
1420 // Also compute a conserative estimate for high known-0 bits.
1421 // More trickiness is possible, but this is sufficient for the
1422 // interesting case of alignment computation.
1424 unsigned TrailZ = KnownZero.countTrailingOnes() +
1425 KnownZero2.countTrailingOnes();
1426 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1427 KnownZero2.countLeadingOnes(),
1428 BitWidth) - BitWidth;
1430 TrailZ = std::min(TrailZ, BitWidth);
1431 LeadZ = std::min(LeadZ, BitWidth);
1432 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1433 APInt::getHighBitsSet(BitWidth, LeadZ);
1438 // For the purposes of computing leading zeros we can conservatively
1439 // treat a udiv as a logical right shift by the power of 2 known to
1440 // be less than the denominator.
1441 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1442 ComputeMaskedBits(Op.getOperand(0),
1443 AllOnes, KnownZero2, KnownOne2, Depth+1);
1444 unsigned LeadZ = KnownZero2.countLeadingOnes();
1448 ComputeMaskedBits(Op.getOperand(1),
1449 AllOnes, KnownZero2, KnownOne2, Depth+1);
1450 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1451 if (RHSUnknownLeadingOnes != BitWidth)
1452 LeadZ = std::min(BitWidth,
1453 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1455 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask;
1459 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1);
1460 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1);
1461 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1462 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1464 // Only known if known in both the LHS and RHS.
1465 KnownOne &= KnownOne2;
1466 KnownZero &= KnownZero2;
1468 case ISD::SELECT_CC:
1469 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1);
1470 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1);
1471 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1472 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1474 // Only known if known in both the LHS and RHS.
1475 KnownOne &= KnownOne2;
1476 KnownZero &= KnownZero2;
1479 // If we know the result of a setcc has the top bits zero, use this info.
1480 if (TLI.getSetCCResultContents() == TargetLowering::ZeroOrOneSetCCResult &&
1482 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1485 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1486 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1487 unsigned ShAmt = SA->getZExtValue();
1489 // If the shift count is an invalid immediate, don't do anything.
1490 if (ShAmt >= BitWidth)
1493 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt),
1494 KnownZero, KnownOne, Depth+1);
1495 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1496 KnownZero <<= ShAmt;
1498 // low bits known zero.
1499 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1503 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1504 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1505 unsigned ShAmt = SA->getZExtValue();
1507 // If the shift count is an invalid immediate, don't do anything.
1508 if (ShAmt >= BitWidth)
1511 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt),
1512 KnownZero, KnownOne, Depth+1);
1513 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1514 KnownZero = KnownZero.lshr(ShAmt);
1515 KnownOne = KnownOne.lshr(ShAmt);
1517 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1518 KnownZero |= HighBits; // High bits known zero.
1522 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1523 unsigned ShAmt = SA->getZExtValue();
1525 // If the shift count is an invalid immediate, don't do anything.
1526 if (ShAmt >= BitWidth)
1529 APInt InDemandedMask = (Mask << ShAmt);
1530 // If any of the demanded bits are produced by the sign extension, we also
1531 // demand the input sign bit.
1532 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1533 if (HighBits.getBoolValue())
1534 InDemandedMask |= APInt::getSignBit(BitWidth);
1536 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne,
1538 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1539 KnownZero = KnownZero.lshr(ShAmt);
1540 KnownOne = KnownOne.lshr(ShAmt);
1542 // Handle the sign bits.
1543 APInt SignBit = APInt::getSignBit(BitWidth);
1544 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1546 if (KnownZero.intersects(SignBit)) {
1547 KnownZero |= HighBits; // New bits are known zero.
1548 } else if (KnownOne.intersects(SignBit)) {
1549 KnownOne |= HighBits; // New bits are known one.
1553 case ISD::SIGN_EXTEND_INREG: {
1554 MVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1555 unsigned EBits = EVT.getSizeInBits();
1557 // Sign extension. Compute the demanded bits in the result that are not
1558 // present in the input.
1559 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask;
1561 APInt InSignBit = APInt::getSignBit(EBits);
1562 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits);
1564 // If the sign extended bits are demanded, we know that the sign
1566 InSignBit.zext(BitWidth);
1567 if (NewBits.getBoolValue())
1568 InputDemandedBits |= InSignBit;
1570 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits,
1571 KnownZero, KnownOne, Depth+1);
1572 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1574 // If the sign bit of the input is known set or clear, then we know the
1575 // top bits of the result.
1576 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1577 KnownZero |= NewBits;
1578 KnownOne &= ~NewBits;
1579 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1580 KnownOne |= NewBits;
1581 KnownZero &= ~NewBits;
1582 } else { // Input sign bit unknown
1583 KnownZero &= ~NewBits;
1584 KnownOne &= ~NewBits;
1591 unsigned LowBits = Log2_32(BitWidth)+1;
1592 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1597 if (ISD::isZEXTLoad(Op.getNode())) {
1598 LoadSDNode *LD = cast<LoadSDNode>(Op);
1599 MVT VT = LD->getMemoryVT();
1600 unsigned MemBits = VT.getSizeInBits();
1601 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask;
1605 case ISD::ZERO_EXTEND: {
1606 MVT InVT = Op.getOperand(0).getValueType();
1607 unsigned InBits = InVT.getSizeInBits();
1608 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1609 APInt InMask = Mask;
1610 InMask.trunc(InBits);
1611 KnownZero.trunc(InBits);
1612 KnownOne.trunc(InBits);
1613 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1614 KnownZero.zext(BitWidth);
1615 KnownOne.zext(BitWidth);
1616 KnownZero |= NewBits;
1619 case ISD::SIGN_EXTEND: {
1620 MVT InVT = Op.getOperand(0).getValueType();
1621 unsigned InBits = InVT.getSizeInBits();
1622 APInt InSignBit = APInt::getSignBit(InBits);
1623 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1624 APInt InMask = Mask;
1625 InMask.trunc(InBits);
1627 // If any of the sign extended bits are demanded, we know that the sign
1628 // bit is demanded. Temporarily set this bit in the mask for our callee.
1629 if (NewBits.getBoolValue())
1630 InMask |= InSignBit;
1632 KnownZero.trunc(InBits);
1633 KnownOne.trunc(InBits);
1634 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1636 // Note if the sign bit is known to be zero or one.
1637 bool SignBitKnownZero = KnownZero.isNegative();
1638 bool SignBitKnownOne = KnownOne.isNegative();
1639 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1640 "Sign bit can't be known to be both zero and one!");
1642 // If the sign bit wasn't actually demanded by our caller, we don't
1643 // want it set in the KnownZero and KnownOne result values. Reset the
1644 // mask and reapply it to the result values.
1646 InMask.trunc(InBits);
1647 KnownZero &= InMask;
1650 KnownZero.zext(BitWidth);
1651 KnownOne.zext(BitWidth);
1653 // If the sign bit is known zero or one, the top bits match.
1654 if (SignBitKnownZero)
1655 KnownZero |= NewBits;
1656 else if (SignBitKnownOne)
1657 KnownOne |= NewBits;
1660 case ISD::ANY_EXTEND: {
1661 MVT InVT = Op.getOperand(0).getValueType();
1662 unsigned InBits = InVT.getSizeInBits();
1663 APInt InMask = Mask;
1664 InMask.trunc(InBits);
1665 KnownZero.trunc(InBits);
1666 KnownOne.trunc(InBits);
1667 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1668 KnownZero.zext(BitWidth);
1669 KnownOne.zext(BitWidth);
1672 case ISD::TRUNCATE: {
1673 MVT InVT = Op.getOperand(0).getValueType();
1674 unsigned InBits = InVT.getSizeInBits();
1675 APInt InMask = Mask;
1676 InMask.zext(InBits);
1677 KnownZero.zext(InBits);
1678 KnownOne.zext(InBits);
1679 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1680 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1681 KnownZero.trunc(BitWidth);
1682 KnownOne.trunc(BitWidth);
1685 case ISD::AssertZext: {
1686 MVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1687 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1688 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
1690 KnownZero |= (~InMask) & Mask;
1694 // All bits are zero except the low bit.
1695 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1699 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
1700 // We know that the top bits of C-X are clear if X contains less bits
1701 // than C (i.e. no wrap-around can happen). For example, 20-X is
1702 // positive if we can prove that X is >= 0 and < 16.
1703 if (CLHS->getAPIntValue().isNonNegative()) {
1704 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
1705 // NLZ can't be BitWidth with no sign bit
1706 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
1707 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2,
1710 // If all of the MaskV bits are known to be zero, then we know the
1711 // output top bits are zero, because we now know that the output is
1713 if ((KnownZero2 & MaskV) == MaskV) {
1714 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
1715 // Top bits known zero.
1716 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask;
1723 // Output known-0 bits are known if clear or set in both the low clear bits
1724 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
1725 // low 3 bits clear.
1726 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes());
1727 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1728 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1729 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
1731 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1);
1732 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1733 KnownZeroOut = std::min(KnownZeroOut,
1734 KnownZero2.countTrailingOnes());
1736 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
1740 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1741 const APInt &RA = Rem->getAPIntValue();
1742 if (RA.isPowerOf2() || (-RA).isPowerOf2()) {
1743 APInt LowBits = RA.isStrictlyPositive() ? (RA - 1) : ~RA;
1744 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
1745 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1);
1747 // If the sign bit of the first operand is zero, the sign bit of
1748 // the result is zero. If the first operand has no one bits below
1749 // the second operand's single 1 bit, its sign will be zero.
1750 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
1751 KnownZero2 |= ~LowBits;
1753 KnownZero |= KnownZero2 & Mask;
1755 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1760 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1761 const APInt &RA = Rem->getAPIntValue();
1762 if (RA.isPowerOf2()) {
1763 APInt LowBits = (RA - 1);
1764 APInt Mask2 = LowBits & Mask;
1765 KnownZero |= ~LowBits & Mask;
1766 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1);
1767 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1772 // Since the result is less than or equal to either operand, any leading
1773 // zero bits in either operand must also exist in the result.
1774 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1775 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne,
1777 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2,
1780 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
1781 KnownZero2.countLeadingOnes());
1783 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
1787 // Allow the target to implement this method for its nodes.
1788 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) {
1789 case ISD::INTRINSIC_WO_CHAIN:
1790 case ISD::INTRINSIC_W_CHAIN:
1791 case ISD::INTRINSIC_VOID:
1792 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this);
1798 /// ComputeNumSignBits - Return the number of times the sign bit of the
1799 /// register is replicated into the other bits. We know that at least 1 bit
1800 /// is always equal to the sign bit (itself), but other cases can give us
1801 /// information. For example, immediately after an "SRA X, 2", we know that
1802 /// the top 3 bits are all equal to each other, so we return 3.
1803 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
1804 MVT VT = Op.getValueType();
1805 assert(VT.isInteger() && "Invalid VT!");
1806 unsigned VTBits = VT.getSizeInBits();
1808 unsigned FirstAnswer = 1;
1811 return 1; // Limit search depth.
1813 switch (Op.getOpcode()) {
1815 case ISD::AssertSext:
1816 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1817 return VTBits-Tmp+1;
1818 case ISD::AssertZext:
1819 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1822 case ISD::Constant: {
1823 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
1824 // If negative, return # leading ones.
1825 if (Val.isNegative())
1826 return Val.countLeadingOnes();
1828 // Return # leading zeros.
1829 return Val.countLeadingZeros();
1832 case ISD::SIGN_EXTEND:
1833 Tmp = VTBits-Op.getOperand(0).getValueType().getSizeInBits();
1834 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
1836 case ISD::SIGN_EXTEND_INREG:
1837 // Max of the input and what this extends.
1838 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1841 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1842 return std::max(Tmp, Tmp2);
1845 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1846 // SRA X, C -> adds C sign bits.
1847 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1848 Tmp += C->getZExtValue();
1849 if (Tmp > VTBits) Tmp = VTBits;
1853 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1854 // shl destroys sign bits.
1855 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1856 if (C->getZExtValue() >= VTBits || // Bad shift.
1857 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
1858 return Tmp - C->getZExtValue();
1863 case ISD::XOR: // NOT is handled here.
1864 // Logical binary ops preserve the number of sign bits at the worst.
1865 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1867 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
1868 FirstAnswer = std::min(Tmp, Tmp2);
1869 // We computed what we know about the sign bits as our first
1870 // answer. Now proceed to the generic code that uses
1871 // ComputeMaskedBits, and pick whichever answer is better.
1876 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
1877 if (Tmp == 1) return 1; // Early out.
1878 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
1879 return std::min(Tmp, Tmp2);
1882 // If setcc returns 0/-1, all bits are sign bits.
1883 if (TLI.getSetCCResultContents() ==
1884 TargetLowering::ZeroOrNegativeOneSetCCResult)
1889 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1890 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
1892 // Handle rotate right by N like a rotate left by 32-N.
1893 if (Op.getOpcode() == ISD::ROTR)
1894 RotAmt = (VTBits-RotAmt) & (VTBits-1);
1896 // If we aren't rotating out all of the known-in sign bits, return the
1897 // number that are left. This handles rotl(sext(x), 1) for example.
1898 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1899 if (Tmp > RotAmt+1) return Tmp-RotAmt;
1903 // Add can have at most one carry bit. Thus we know that the output
1904 // is, at worst, one more bit than the inputs.
1905 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1906 if (Tmp == 1) return 1; // Early out.
1908 // Special case decrementing a value (ADD X, -1):
1909 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
1910 if (CRHS->isAllOnesValue()) {
1911 APInt KnownZero, KnownOne;
1912 APInt Mask = APInt::getAllOnesValue(VTBits);
1913 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
1915 // If the input is known to be 0 or 1, the output is 0/-1, which is all
1917 if ((KnownZero | APInt(VTBits, 1)) == Mask)
1920 // If we are subtracting one from a positive number, there is no carry
1921 // out of the result.
1922 if (KnownZero.isNegative())
1926 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
1927 if (Tmp2 == 1) return 1;
1928 return std::min(Tmp, Tmp2)-1;
1932 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
1933 if (Tmp2 == 1) return 1;
1936 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
1937 if (CLHS->isNullValue()) {
1938 APInt KnownZero, KnownOne;
1939 APInt Mask = APInt::getAllOnesValue(VTBits);
1940 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1941 // If the input is known to be 0 or 1, the output is 0/-1, which is all
1943 if ((KnownZero | APInt(VTBits, 1)) == Mask)
1946 // If the input is known to be positive (the sign bit is known clear),
1947 // the output of the NEG has the same number of sign bits as the input.
1948 if (KnownZero.isNegative())
1951 // Otherwise, we treat this like a SUB.
1954 // Sub can have at most one carry bit. Thus we know that the output
1955 // is, at worst, one more bit than the inputs.
1956 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1957 if (Tmp == 1) return 1; // Early out.
1958 return std::min(Tmp, Tmp2)-1;
1961 // FIXME: it's tricky to do anything useful for this, but it is an important
1962 // case for targets like X86.
1966 // Handle LOADX separately here. EXTLOAD case will fallthrough.
1967 if (Op.getOpcode() == ISD::LOAD) {
1968 LoadSDNode *LD = cast<LoadSDNode>(Op);
1969 unsigned ExtType = LD->getExtensionType();
1972 case ISD::SEXTLOAD: // '17' bits known
1973 Tmp = LD->getMemoryVT().getSizeInBits();
1974 return VTBits-Tmp+1;
1975 case ISD::ZEXTLOAD: // '16' bits known
1976 Tmp = LD->getMemoryVT().getSizeInBits();
1981 // Allow the target to implement this method for its nodes.
1982 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
1983 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
1984 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
1985 Op.getOpcode() == ISD::INTRINSIC_VOID) {
1986 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
1987 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
1990 // Finally, if we can prove that the top bits of the result are 0's or 1's,
1991 // use this information.
1992 APInt KnownZero, KnownOne;
1993 APInt Mask = APInt::getAllOnesValue(VTBits);
1994 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
1996 if (KnownZero.isNegative()) { // sign bit is 0
1998 } else if (KnownOne.isNegative()) { // sign bit is 1;
2005 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2006 // the number of identical bits in the top of the input value.
2008 Mask <<= Mask.getBitWidth()-VTBits;
2009 // Return # leading zeros. We use 'min' here in case Val was zero before
2010 // shifting. We don't want to return '64' as for an i32 "0".
2011 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2015 bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const {
2016 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op);
2017 if (!GA) return false;
2018 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal());
2019 if (!GV) return false;
2020 MachineModuleInfo *MMI = getMachineModuleInfo();
2021 return MMI && MMI->hasDebugInfo() && MMI->isVerified(GV);
2025 /// getShuffleScalarElt - Returns the scalar element that will make up the ith
2026 /// element of the result of the vector shuffle.
2027 SDValue SelectionDAG::getShuffleScalarElt(const SDNode *N, unsigned i) {
2028 MVT VT = N->getValueType(0);
2029 SDValue PermMask = N->getOperand(2);
2030 SDValue Idx = PermMask.getOperand(i);
2031 if (Idx.getOpcode() == ISD::UNDEF)
2032 return getNode(ISD::UNDEF, VT.getVectorElementType());
2033 unsigned Index = cast<ConstantSDNode>(Idx)->getZExtValue();
2034 unsigned NumElems = PermMask.getNumOperands();
2035 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1);
2038 if (V.getOpcode() == ISD::BIT_CONVERT) {
2039 V = V.getOperand(0);
2040 if (V.getValueType().getVectorNumElements() != NumElems)
2043 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR)
2044 return (Index == 0) ? V.getOperand(0)
2045 : getNode(ISD::UNDEF, VT.getVectorElementType());
2046 if (V.getOpcode() == ISD::BUILD_VECTOR)
2047 return V.getOperand(Index);
2048 if (V.getOpcode() == ISD::VECTOR_SHUFFLE)
2049 return getShuffleScalarElt(V.getNode(), Index);
2054 /// getNode - Gets or creates the specified node.
2056 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT) {
2057 FoldingSetNodeID ID;
2058 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2060 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2061 return SDValue(E, 0);
2062 SDNode *N = NodeAllocator.Allocate<SDNode>();
2063 new (N) SDNode(Opcode, SDNode::getSDVTList(VT));
2064 CSEMap.InsertNode(N, IP);
2066 AllNodes.push_back(N);
2070 return SDValue(N, 0);
2073 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, SDValue Operand) {
2074 // Constant fold unary operations with an integer constant operand.
2075 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2076 const APInt &Val = C->getAPIntValue();
2077 unsigned BitWidth = VT.getSizeInBits();
2080 case ISD::SIGN_EXTEND:
2081 return getConstant(APInt(Val).sextOrTrunc(BitWidth), VT);
2082 case ISD::ANY_EXTEND:
2083 case ISD::ZERO_EXTEND:
2085 return getConstant(APInt(Val).zextOrTrunc(BitWidth), VT);
2086 case ISD::UINT_TO_FP:
2087 case ISD::SINT_TO_FP: {
2088 const uint64_t zero[] = {0, 0};
2089 // No compile time operations on this type.
2090 if (VT==MVT::ppcf128)
2092 APFloat apf = APFloat(APInt(BitWidth, 2, zero));
2093 (void)apf.convertFromAPInt(Val,
2094 Opcode==ISD::SINT_TO_FP,
2095 APFloat::rmNearestTiesToEven);
2096 return getConstantFP(apf, VT);
2098 case ISD::BIT_CONVERT:
2099 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2100 return getConstantFP(Val.bitsToFloat(), VT);
2101 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2102 return getConstantFP(Val.bitsToDouble(), VT);
2105 return getConstant(Val.byteSwap(), VT);
2107 return getConstant(Val.countPopulation(), VT);
2109 return getConstant(Val.countLeadingZeros(), VT);
2111 return getConstant(Val.countTrailingZeros(), VT);
2115 // Constant fold unary operations with a floating point constant operand.
2116 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2117 APFloat V = C->getValueAPF(); // make copy
2118 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) {
2122 return getConstantFP(V, VT);
2125 return getConstantFP(V, VT);
2127 case ISD::FP_EXTEND:
2128 // This can return overflow, underflow, or inexact; we don't care.
2129 // FIXME need to be more flexible about rounding mode.
2130 (void)V.convert(*MVTToAPFloatSemantics(VT),
2131 APFloat::rmNearestTiesToEven);
2132 return getConstantFP(V, VT);
2133 case ISD::FP_TO_SINT:
2134 case ISD::FP_TO_UINT: {
2136 assert(integerPartWidth >= 64);
2137 // FIXME need to be more flexible about rounding mode.
2138 APFloat::opStatus s = V.convertToInteger(&x, 64U,
2139 Opcode==ISD::FP_TO_SINT,
2140 APFloat::rmTowardZero);
2141 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2143 return getConstant(x, VT);
2145 case ISD::BIT_CONVERT:
2146 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2147 return getConstant((uint32_t)V.convertToAPInt().getZExtValue(), VT);
2148 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2149 return getConstant(V.convertToAPInt().getZExtValue(), VT);
2155 unsigned OpOpcode = Operand.getNode()->getOpcode();
2157 case ISD::TokenFactor:
2158 case ISD::CONCAT_VECTORS:
2159 return Operand; // Factor or concat of one node? No need.
2160 case ISD::FP_ROUND: assert(0 && "Invalid method to make FP_ROUND node");
2161 case ISD::FP_EXTEND:
2162 assert(VT.isFloatingPoint() &&
2163 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2164 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2165 if (Operand.getOpcode() == ISD::UNDEF)
2166 return getNode(ISD::UNDEF, VT);
2168 case ISD::SIGN_EXTEND:
2169 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2170 "Invalid SIGN_EXTEND!");
2171 if (Operand.getValueType() == VT) return Operand; // noop extension
2172 assert(Operand.getValueType().bitsLT(VT)
2173 && "Invalid sext node, dst < src!");
2174 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2175 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0));
2177 case ISD::ZERO_EXTEND:
2178 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2179 "Invalid ZERO_EXTEND!");
2180 if (Operand.getValueType() == VT) return Operand; // noop extension
2181 assert(Operand.getValueType().bitsLT(VT)
2182 && "Invalid zext node, dst < src!");
2183 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2184 return getNode(ISD::ZERO_EXTEND, VT, Operand.getNode()->getOperand(0));
2186 case ISD::ANY_EXTEND:
2187 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2188 "Invalid ANY_EXTEND!");
2189 if (Operand.getValueType() == VT) return Operand; // noop extension
2190 assert(Operand.getValueType().bitsLT(VT)
2191 && "Invalid anyext node, dst < src!");
2192 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND)
2193 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2194 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0));
2197 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2198 "Invalid TRUNCATE!");
2199 if (Operand.getValueType() == VT) return Operand; // noop truncate
2200 assert(Operand.getValueType().bitsGT(VT)
2201 && "Invalid truncate node, src < dst!");
2202 if (OpOpcode == ISD::TRUNCATE)
2203 return getNode(ISD::TRUNCATE, VT, Operand.getNode()->getOperand(0));
2204 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2205 OpOpcode == ISD::ANY_EXTEND) {
2206 // If the source is smaller than the dest, we still need an extend.
2207 if (Operand.getNode()->getOperand(0).getValueType().bitsLT(VT))
2208 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0));
2209 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2210 return getNode(ISD::TRUNCATE, VT, Operand.getNode()->getOperand(0));
2212 return Operand.getNode()->getOperand(0);
2215 case ISD::BIT_CONVERT:
2216 // Basic sanity checking.
2217 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2218 && "Cannot BIT_CONVERT between types of different sizes!");
2219 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2220 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x)
2221 return getNode(ISD::BIT_CONVERT, VT, Operand.getOperand(0));
2222 if (OpOpcode == ISD::UNDEF)
2223 return getNode(ISD::UNDEF, VT);
2225 case ISD::SCALAR_TO_VECTOR:
2226 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2227 VT.getVectorElementType() == Operand.getValueType() &&
2228 "Illegal SCALAR_TO_VECTOR node!");
2229 if (OpOpcode == ISD::UNDEF)
2230 return getNode(ISD::UNDEF, VT);
2231 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2232 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2233 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2234 Operand.getConstantOperandVal(1) == 0 &&
2235 Operand.getOperand(0).getValueType() == VT)
2236 return Operand.getOperand(0);
2239 if (OpOpcode == ISD::FSUB) // -(X-Y) -> (Y-X)
2240 return getNode(ISD::FSUB, VT, Operand.getNode()->getOperand(1),
2241 Operand.getNode()->getOperand(0));
2242 if (OpOpcode == ISD::FNEG) // --X -> X
2243 return Operand.getNode()->getOperand(0);
2246 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2247 return getNode(ISD::FABS, VT, Operand.getNode()->getOperand(0));
2252 SDVTList VTs = getVTList(VT);
2253 if (VT != MVT::Flag) { // Don't CSE flag producing nodes
2254 FoldingSetNodeID ID;
2255 SDValue Ops[1] = { Operand };
2256 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2258 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2259 return SDValue(E, 0);
2260 N = NodeAllocator.Allocate<UnarySDNode>();
2261 new (N) UnarySDNode(Opcode, VTs, Operand);
2262 CSEMap.InsertNode(N, IP);
2264 N = NodeAllocator.Allocate<UnarySDNode>();
2265 new (N) UnarySDNode(Opcode, VTs, Operand);
2268 AllNodes.push_back(N);
2272 return SDValue(N, 0);
2275 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2277 ConstantSDNode *Cst1,
2278 ConstantSDNode *Cst2) {
2279 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
2282 case ISD::ADD: return getConstant(C1 + C2, VT);
2283 case ISD::SUB: return getConstant(C1 - C2, VT);
2284 case ISD::MUL: return getConstant(C1 * C2, VT);
2286 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2289 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2292 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2295 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2297 case ISD::AND: return getConstant(C1 & C2, VT);
2298 case ISD::OR: return getConstant(C1 | C2, VT);
2299 case ISD::XOR: return getConstant(C1 ^ C2, VT);
2300 case ISD::SHL: return getConstant(C1 << C2, VT);
2301 case ISD::SRL: return getConstant(C1.lshr(C2), VT);
2302 case ISD::SRA: return getConstant(C1.ashr(C2), VT);
2303 case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2304 case ISD::ROTR: return getConstant(C1.rotr(C2), VT);
2311 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
2312 SDValue N1, SDValue N2) {
2313 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2314 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2317 case ISD::TokenFactor:
2318 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2319 N2.getValueType() == MVT::Other && "Invalid token factor!");
2320 // Fold trivial token factors.
2321 if (N1.getOpcode() == ISD::EntryToken) return N2;
2322 if (N2.getOpcode() == ISD::EntryToken) return N1;
2324 case ISD::CONCAT_VECTORS:
2325 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2326 // one big BUILD_VECTOR.
2327 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2328 N2.getOpcode() == ISD::BUILD_VECTOR) {
2329 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2330 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2331 return getNode(ISD::BUILD_VECTOR, VT, &Elts[0], Elts.size());
2335 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2336 N1.getValueType() == VT && "Binary operator types must match!");
2337 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2338 // worth handling here.
2339 if (N2C && N2C->isNullValue())
2341 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2348 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2349 N1.getValueType() == VT && "Binary operator types must match!");
2350 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2351 // it's worth handling here.
2352 if (N2C && N2C->isNullValue())
2359 assert(VT.isInteger() && "This operator does not apply to FP types!");
2369 assert(N1.getValueType() == N2.getValueType() &&
2370 N1.getValueType() == VT && "Binary operator types must match!");
2372 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2373 assert(N1.getValueType() == VT &&
2374 N1.getValueType().isFloatingPoint() &&
2375 N2.getValueType().isFloatingPoint() &&
2376 "Invalid FCOPYSIGN!");
2383 assert(VT == N1.getValueType() &&
2384 "Shift operators return type must be the same as their first arg");
2385 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2386 "Shifts only work on integers");
2388 // Always fold shifts of i1 values so the code generator doesn't need to
2389 // handle them. Since we know the size of the shift has to be less than the
2390 // size of the value, the shift/rotate count is guaranteed to be zero.
2394 case ISD::FP_ROUND_INREG: {
2395 MVT EVT = cast<VTSDNode>(N2)->getVT();
2396 assert(VT == N1.getValueType() && "Not an inreg round!");
2397 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2398 "Cannot FP_ROUND_INREG integer types");
2399 assert(EVT.bitsLE(VT) && "Not rounding down!");
2400 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2404 assert(VT.isFloatingPoint() &&
2405 N1.getValueType().isFloatingPoint() &&
2406 VT.bitsLE(N1.getValueType()) &&
2407 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2408 if (N1.getValueType() == VT) return N1; // noop conversion.
2410 case ISD::AssertSext:
2411 case ISD::AssertZext: {
2412 MVT EVT = cast<VTSDNode>(N2)->getVT();
2413 assert(VT == N1.getValueType() && "Not an inreg extend!");
2414 assert(VT.isInteger() && EVT.isInteger() &&
2415 "Cannot *_EXTEND_INREG FP types");
2416 assert(EVT.bitsLE(VT) && "Not extending!");
2417 if (VT == EVT) return N1; // noop assertion.
2420 case ISD::SIGN_EXTEND_INREG: {
2421 MVT EVT = cast<VTSDNode>(N2)->getVT();
2422 assert(VT == N1.getValueType() && "Not an inreg extend!");
2423 assert(VT.isInteger() && EVT.isInteger() &&
2424 "Cannot *_EXTEND_INREG FP types");
2425 assert(EVT.bitsLE(VT) && "Not extending!");
2426 if (EVT == VT) return N1; // Not actually extending
2429 APInt Val = N1C->getAPIntValue();
2430 unsigned FromBits = cast<VTSDNode>(N2)->getVT().getSizeInBits();
2431 Val <<= Val.getBitWidth()-FromBits;
2432 Val = Val.ashr(Val.getBitWidth()-FromBits);
2433 return getConstant(Val, VT);
2437 case ISD::EXTRACT_VECTOR_ELT:
2438 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2439 if (N1.getOpcode() == ISD::UNDEF)
2440 return getNode(ISD::UNDEF, VT);
2442 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2443 // expanding copies of large vectors from registers.
2445 N1.getOpcode() == ISD::CONCAT_VECTORS &&
2446 N1.getNumOperands() > 0) {
2448 N1.getOperand(0).getValueType().getVectorNumElements();
2449 return getNode(ISD::EXTRACT_VECTOR_ELT, VT,
2450 N1.getOperand(N2C->getZExtValue() / Factor),
2451 getConstant(N2C->getZExtValue() % Factor,
2452 N2.getValueType()));
2455 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2456 // expanding large vector constants.
2457 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR)
2458 return N1.getOperand(N2C->getZExtValue());
2460 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2461 // operations are lowered to scalars.
2462 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2463 if (N1.getOperand(2) == N2)
2464 return N1.getOperand(1);
2466 return getNode(ISD::EXTRACT_VECTOR_ELT, VT, N1.getOperand(0), N2);
2469 case ISD::EXTRACT_ELEMENT:
2470 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
2471 assert(!N1.getValueType().isVector() && !VT.isVector() &&
2472 (N1.getValueType().isInteger() == VT.isInteger()) &&
2473 "Wrong types for EXTRACT_ELEMENT!");
2475 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2476 // 64-bit integers into 32-bit parts. Instead of building the extract of
2477 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2478 if (N1.getOpcode() == ISD::BUILD_PAIR)
2479 return N1.getOperand(N2C->getZExtValue());
2481 // EXTRACT_ELEMENT of a constant int is also very common.
2482 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2483 unsigned ElementSize = VT.getSizeInBits();
2484 unsigned Shift = ElementSize * N2C->getZExtValue();
2485 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2486 return getConstant(ShiftedVal.trunc(ElementSize), VT);
2489 case ISD::EXTRACT_SUBVECTOR:
2490 if (N1.getValueType() == VT) // Trivial extraction.
2497 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
2498 if (SV.getNode()) return SV;
2499 } else { // Cannonicalize constant to RHS if commutative
2500 if (isCommutativeBinOp(Opcode)) {
2501 std::swap(N1C, N2C);
2507 // Constant fold FP operations.
2508 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
2509 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
2511 if (!N2CFP && isCommutativeBinOp(Opcode)) {
2512 // Cannonicalize constant to RHS if commutative
2513 std::swap(N1CFP, N2CFP);
2515 } else if (N2CFP && VT != MVT::ppcf128) {
2516 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
2517 APFloat::opStatus s;
2520 s = V1.add(V2, APFloat::rmNearestTiesToEven);
2521 if (s != APFloat::opInvalidOp)
2522 return getConstantFP(V1, VT);
2525 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
2526 if (s!=APFloat::opInvalidOp)
2527 return getConstantFP(V1, VT);
2530 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
2531 if (s!=APFloat::opInvalidOp)
2532 return getConstantFP(V1, VT);
2535 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
2536 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2537 return getConstantFP(V1, VT);
2540 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
2541 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2542 return getConstantFP(V1, VT);
2544 case ISD::FCOPYSIGN:
2546 return getConstantFP(V1, VT);
2552 // Canonicalize an UNDEF to the RHS, even over a constant.
2553 if (N1.getOpcode() == ISD::UNDEF) {
2554 if (isCommutativeBinOp(Opcode)) {
2558 case ISD::FP_ROUND_INREG:
2559 case ISD::SIGN_EXTEND_INREG:
2565 return N1; // fold op(undef, arg2) -> undef
2573 return getConstant(0, VT); // fold op(undef, arg2) -> 0
2574 // For vectors, we can't easily build an all zero vector, just return
2581 // Fold a bunch of operators when the RHS is undef.
2582 if (N2.getOpcode() == ISD::UNDEF) {
2585 if (N1.getOpcode() == ISD::UNDEF)
2586 // Handle undef ^ undef -> 0 special case. This is a common
2588 return getConstant(0, VT);
2603 return N2; // fold op(arg1, undef) -> undef
2609 return getConstant(0, VT); // fold op(arg1, undef) -> 0
2610 // For vectors, we can't easily build an all zero vector, just return
2615 return getConstant(VT.getIntegerVTBitMask(), VT);
2616 // For vectors, we can't easily build an all one vector, just return
2624 // Memoize this node if possible.
2626 SDVTList VTs = getVTList(VT);
2627 if (VT != MVT::Flag) {
2628 SDValue Ops[] = { N1, N2 };
2629 FoldingSetNodeID ID;
2630 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
2632 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2633 return SDValue(E, 0);
2634 N = NodeAllocator.Allocate<BinarySDNode>();
2635 new (N) BinarySDNode(Opcode, VTs, N1, N2);
2636 CSEMap.InsertNode(N, IP);
2638 N = NodeAllocator.Allocate<BinarySDNode>();
2639 new (N) BinarySDNode(Opcode, VTs, N1, N2);
2642 AllNodes.push_back(N);
2646 return SDValue(N, 0);
2649 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
2650 SDValue N1, SDValue N2, SDValue N3) {
2651 // Perform various simplifications.
2652 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2653 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2655 case ISD::CONCAT_VECTORS:
2656 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2657 // one big BUILD_VECTOR.
2658 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2659 N2.getOpcode() == ISD::BUILD_VECTOR &&
2660 N3.getOpcode() == ISD::BUILD_VECTOR) {
2661 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2662 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2663 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end());
2664 return getNode(ISD::BUILD_VECTOR, VT, &Elts[0], Elts.size());
2668 // Use FoldSetCC to simplify SETCC's.
2669 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get());
2670 if (Simp.getNode()) return Simp;
2675 if (N1C->getZExtValue())
2676 return N2; // select true, X, Y -> X
2678 return N3; // select false, X, Y -> Y
2681 if (N2 == N3) return N2; // select C, X, X -> X
2685 if (N2C->getZExtValue()) // Unconditional branch
2686 return getNode(ISD::BR, MVT::Other, N1, N3);
2688 return N1; // Never-taken branch
2691 case ISD::VECTOR_SHUFFLE:
2692 assert(VT == N1.getValueType() && VT == N2.getValueType() &&
2693 VT.isVector() && N3.getValueType().isVector() &&
2694 N3.getOpcode() == ISD::BUILD_VECTOR &&
2695 VT.getVectorNumElements() == N3.getNumOperands() &&
2696 "Illegal VECTOR_SHUFFLE node!");
2698 case ISD::BIT_CONVERT:
2699 // Fold bit_convert nodes from a type to themselves.
2700 if (N1.getValueType() == VT)
2705 // Memoize node if it doesn't produce a flag.
2707 SDVTList VTs = getVTList(VT);
2708 if (VT != MVT::Flag) {
2709 SDValue Ops[] = { N1, N2, N3 };
2710 FoldingSetNodeID ID;
2711 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
2713 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2714 return SDValue(E, 0);
2715 N = NodeAllocator.Allocate<TernarySDNode>();
2716 new (N) TernarySDNode(Opcode, VTs, N1, N2, N3);
2717 CSEMap.InsertNode(N, IP);
2719 N = NodeAllocator.Allocate<TernarySDNode>();
2720 new (N) TernarySDNode(Opcode, VTs, N1, N2, N3);
2722 AllNodes.push_back(N);
2726 return SDValue(N, 0);
2729 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
2730 SDValue N1, SDValue N2, SDValue N3,
2732 SDValue Ops[] = { N1, N2, N3, N4 };
2733 return getNode(Opcode, VT, Ops, 4);
2736 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
2737 SDValue N1, SDValue N2, SDValue N3,
2738 SDValue N4, SDValue N5) {
2739 SDValue Ops[] = { N1, N2, N3, N4, N5 };
2740 return getNode(Opcode, VT, Ops, 5);
2743 /// getMemsetValue - Vectorized representation of the memset value
2745 static SDValue getMemsetValue(SDValue Value, MVT VT, SelectionDAG &DAG) {
2746 unsigned NumBits = VT.isVector() ?
2747 VT.getVectorElementType().getSizeInBits() : VT.getSizeInBits();
2748 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
2749 APInt Val = APInt(NumBits, C->getZExtValue() & 255);
2751 for (unsigned i = NumBits; i > 8; i >>= 1) {
2752 Val = (Val << Shift) | Val;
2756 return DAG.getConstant(Val, VT);
2757 return DAG.getConstantFP(APFloat(Val), VT);
2760 Value = DAG.getNode(ISD::ZERO_EXTEND, VT, Value);
2762 for (unsigned i = NumBits; i > 8; i >>= 1) {
2763 Value = DAG.getNode(ISD::OR, VT,
2764 DAG.getNode(ISD::SHL, VT, Value,
2765 DAG.getConstant(Shift, MVT::i8)), Value);
2772 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
2773 /// used when a memcpy is turned into a memset when the source is a constant
2775 static SDValue getMemsetStringVal(MVT VT, SelectionDAG &DAG,
2776 const TargetLowering &TLI,
2777 std::string &Str, unsigned Offset) {
2778 // Handle vector with all elements zero.
2781 return DAG.getConstant(0, VT);
2782 unsigned NumElts = VT.getVectorNumElements();
2783 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
2784 return DAG.getNode(ISD::BIT_CONVERT, VT,
2785 DAG.getConstant(0, MVT::getVectorVT(EltVT, NumElts)));
2788 assert(!VT.isVector() && "Can't handle vector type here!");
2789 unsigned NumBits = VT.getSizeInBits();
2790 unsigned MSB = NumBits / 8;
2792 if (TLI.isLittleEndian())
2793 Offset = Offset + MSB - 1;
2794 for (unsigned i = 0; i != MSB; ++i) {
2795 Val = (Val << 8) | (unsigned char)Str[Offset];
2796 Offset += TLI.isLittleEndian() ? -1 : 1;
2798 return DAG.getConstant(Val, VT);
2801 /// getMemBasePlusOffset - Returns base and offset node for the
2803 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
2804 SelectionDAG &DAG) {
2805 MVT VT = Base.getValueType();
2806 return DAG.getNode(ISD::ADD, VT, Base, DAG.getConstant(Offset, VT));
2809 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
2811 static bool isMemSrcFromString(SDValue Src, std::string &Str) {
2812 unsigned SrcDelta = 0;
2813 GlobalAddressSDNode *G = NULL;
2814 if (Src.getOpcode() == ISD::GlobalAddress)
2815 G = cast<GlobalAddressSDNode>(Src);
2816 else if (Src.getOpcode() == ISD::ADD &&
2817 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
2818 Src.getOperand(1).getOpcode() == ISD::Constant) {
2819 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
2820 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
2825 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal());
2826 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false))
2832 /// MeetsMaxMemopRequirement - Determines if the number of memory ops required
2833 /// to replace the memset / memcpy is below the threshold. It also returns the
2834 /// types of the sequence of memory ops to perform memset / memcpy.
2836 bool MeetsMaxMemopRequirement(std::vector<MVT> &MemOps,
2837 SDValue Dst, SDValue Src,
2838 unsigned Limit, uint64_t Size, unsigned &Align,
2839 std::string &Str, bool &isSrcStr,
2841 const TargetLowering &TLI) {
2842 isSrcStr = isMemSrcFromString(Src, Str);
2843 bool isSrcConst = isa<ConstantSDNode>(Src);
2844 bool AllowUnalign = TLI.allowsUnalignedMemoryAccesses();
2845 MVT VT= TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr);
2846 if (VT != MVT::iAny) {
2847 unsigned NewAlign = (unsigned)
2848 TLI.getTargetData()->getABITypeAlignment(VT.getTypeForMVT());
2849 // If source is a string constant, this will require an unaligned load.
2850 if (NewAlign > Align && (isSrcConst || AllowUnalign)) {
2851 if (Dst.getOpcode() != ISD::FrameIndex) {
2852 // Can't change destination alignment. It requires a unaligned store.
2856 int FI = cast<FrameIndexSDNode>(Dst)->getIndex();
2857 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
2858 if (MFI->isFixedObjectIndex(FI)) {
2859 // Can't change destination alignment. It requires a unaligned store.
2863 // Give the stack frame object a larger alignment if needed.
2864 if (MFI->getObjectAlignment(FI) < NewAlign)
2865 MFI->setObjectAlignment(FI, NewAlign);
2872 if (VT == MVT::iAny) {
2876 switch (Align & 7) {
2877 case 0: VT = MVT::i64; break;
2878 case 4: VT = MVT::i32; break;
2879 case 2: VT = MVT::i16; break;
2880 default: VT = MVT::i8; break;
2885 while (!TLI.isTypeLegal(LVT))
2886 LVT = (MVT::SimpleValueType)(LVT.getSimpleVT() - 1);
2887 assert(LVT.isInteger());
2893 unsigned NumMemOps = 0;
2895 unsigned VTSize = VT.getSizeInBits() / 8;
2896 while (VTSize > Size) {
2897 // For now, only use non-vector load / store's for the left-over pieces.
2898 if (VT.isVector()) {
2900 while (!TLI.isTypeLegal(VT))
2901 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1);
2902 VTSize = VT.getSizeInBits() / 8;
2904 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1);
2909 if (++NumMemOps > Limit)
2911 MemOps.push_back(VT);
2918 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG,
2919 SDValue Chain, SDValue Dst,
2920 SDValue Src, uint64_t Size,
2921 unsigned Align, bool AlwaysInline,
2922 const Value *DstSV, uint64_t DstSVOff,
2923 const Value *SrcSV, uint64_t SrcSVOff){
2924 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
2926 // Expand memcpy to a series of load and store ops if the size operand falls
2927 // below a certain threshold.
2928 std::vector<MVT> MemOps;
2929 uint64_t Limit = -1;
2931 Limit = TLI.getMaxStoresPerMemcpy();
2932 unsigned DstAlign = Align; // Destination alignment can change.
2935 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
2936 Str, CopyFromStr, DAG, TLI))
2940 bool isZeroStr = CopyFromStr && Str.empty();
2941 SmallVector<SDValue, 8> OutChains;
2942 unsigned NumMemOps = MemOps.size();
2943 uint64_t SrcOff = 0, DstOff = 0;
2944 for (unsigned i = 0; i < NumMemOps; i++) {
2946 unsigned VTSize = VT.getSizeInBits() / 8;
2947 SDValue Value, Store;
2949 if (CopyFromStr && (isZeroStr || !VT.isVector())) {
2950 // It's unlikely a store of a vector immediate can be done in a single
2951 // instruction. It would require a load from a constantpool first.
2952 // We also handle store a vector with all zero's.
2953 // FIXME: Handle other cases where store of vector immediate is done in
2954 // a single instruction.
2955 Value = getMemsetStringVal(VT, DAG, TLI, Str, SrcOff);
2956 Store = DAG.getStore(Chain, Value,
2957 getMemBasePlusOffset(Dst, DstOff, DAG),
2958 DstSV, DstSVOff + DstOff, false, DstAlign);
2960 Value = DAG.getLoad(VT, Chain,
2961 getMemBasePlusOffset(Src, SrcOff, DAG),
2962 SrcSV, SrcSVOff + SrcOff, false, Align);
2963 Store = DAG.getStore(Chain, Value,
2964 getMemBasePlusOffset(Dst, DstOff, DAG),
2965 DstSV, DstSVOff + DstOff, false, DstAlign);
2967 OutChains.push_back(Store);
2972 return DAG.getNode(ISD::TokenFactor, MVT::Other,
2973 &OutChains[0], OutChains.size());
2976 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG,
2977 SDValue Chain, SDValue Dst,
2978 SDValue Src, uint64_t Size,
2979 unsigned Align, bool AlwaysInline,
2980 const Value *DstSV, uint64_t DstSVOff,
2981 const Value *SrcSV, uint64_t SrcSVOff){
2982 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
2984 // Expand memmove to a series of load and store ops if the size operand falls
2985 // below a certain threshold.
2986 std::vector<MVT> MemOps;
2987 uint64_t Limit = -1;
2989 Limit = TLI.getMaxStoresPerMemmove();
2990 unsigned DstAlign = Align; // Destination alignment can change.
2993 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
2994 Str, CopyFromStr, DAG, TLI))
2997 uint64_t SrcOff = 0, DstOff = 0;
2999 SmallVector<SDValue, 8> LoadValues;
3000 SmallVector<SDValue, 8> LoadChains;
3001 SmallVector<SDValue, 8> OutChains;
3002 unsigned NumMemOps = MemOps.size();
3003 for (unsigned i = 0; i < NumMemOps; i++) {
3005 unsigned VTSize = VT.getSizeInBits() / 8;
3006 SDValue Value, Store;
3008 Value = DAG.getLoad(VT, Chain,
3009 getMemBasePlusOffset(Src, SrcOff, DAG),
3010 SrcSV, SrcSVOff + SrcOff, false, Align);
3011 LoadValues.push_back(Value);
3012 LoadChains.push_back(Value.getValue(1));
3015 Chain = DAG.getNode(ISD::TokenFactor, MVT::Other,
3016 &LoadChains[0], LoadChains.size());
3018 for (unsigned i = 0; i < NumMemOps; i++) {
3020 unsigned VTSize = VT.getSizeInBits() / 8;
3021 SDValue Value, Store;
3023 Store = DAG.getStore(Chain, LoadValues[i],
3024 getMemBasePlusOffset(Dst, DstOff, DAG),
3025 DstSV, DstSVOff + DstOff, false, DstAlign);
3026 OutChains.push_back(Store);
3030 return DAG.getNode(ISD::TokenFactor, MVT::Other,
3031 &OutChains[0], OutChains.size());
3034 static SDValue getMemsetStores(SelectionDAG &DAG,
3035 SDValue Chain, SDValue Dst,
3036 SDValue Src, uint64_t Size,
3038 const Value *DstSV, uint64_t DstSVOff) {
3039 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3041 // Expand memset to a series of load/store ops if the size operand
3042 // falls below a certain threshold.
3043 std::vector<MVT> MemOps;
3046 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, TLI.getMaxStoresPerMemset(),
3047 Size, Align, Str, CopyFromStr, DAG, TLI))
3050 SmallVector<SDValue, 8> OutChains;
3051 uint64_t DstOff = 0;
3053 unsigned NumMemOps = MemOps.size();
3054 for (unsigned i = 0; i < NumMemOps; i++) {
3056 unsigned VTSize = VT.getSizeInBits() / 8;
3057 SDValue Value = getMemsetValue(Src, VT, DAG);
3058 SDValue Store = DAG.getStore(Chain, Value,
3059 getMemBasePlusOffset(Dst, DstOff, DAG),
3060 DstSV, DstSVOff + DstOff);
3061 OutChains.push_back(Store);
3065 return DAG.getNode(ISD::TokenFactor, MVT::Other,
3066 &OutChains[0], OutChains.size());
3069 SDValue SelectionDAG::getMemcpy(SDValue Chain, SDValue Dst,
3070 SDValue Src, SDValue Size,
3071 unsigned Align, bool AlwaysInline,
3072 const Value *DstSV, uint64_t DstSVOff,
3073 const Value *SrcSV, uint64_t SrcSVOff) {
3075 // Check to see if we should lower the memcpy to loads and stores first.
3076 // For cases within the target-specified limits, this is the best choice.
3077 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3079 // Memcpy with size zero? Just return the original chain.
3080 if (ConstantSize->isNullValue())
3084 getMemcpyLoadsAndStores(*this, Chain, Dst, Src,
3085 ConstantSize->getZExtValue(),
3086 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3087 if (Result.getNode())
3091 // Then check to see if we should lower the memcpy with target-specific
3092 // code. If the target chooses to do this, this is the next best.
3094 TLI.EmitTargetCodeForMemcpy(*this, Chain, Dst, Src, Size, Align,
3096 DstSV, DstSVOff, SrcSV, SrcSVOff);
3097 if (Result.getNode())
3100 // If we really need inline code and the target declined to provide it,
3101 // use a (potentially long) sequence of loads and stores.
3103 assert(ConstantSize && "AlwaysInline requires a constant size!");
3104 return getMemcpyLoadsAndStores(*this, Chain, Dst, Src,
3105 ConstantSize->getZExtValue(), Align, true,
3106 DstSV, DstSVOff, SrcSV, SrcSVOff);
3109 // Emit a library call.
3110 TargetLowering::ArgListTy Args;
3111 TargetLowering::ArgListEntry Entry;
3112 Entry.Ty = TLI.getTargetData()->getIntPtrType();
3113 Entry.Node = Dst; Args.push_back(Entry);
3114 Entry.Node = Src; Args.push_back(Entry);
3115 Entry.Node = Size; Args.push_back(Entry);
3116 std::pair<SDValue,SDValue> CallResult =
3117 TLI.LowerCallTo(Chain, Type::VoidTy,
3118 false, false, false, false, CallingConv::C, false,
3119 getExternalSymbol("memcpy", TLI.getPointerTy()),
3121 return CallResult.second;
3124 SDValue SelectionDAG::getMemmove(SDValue Chain, SDValue Dst,
3125 SDValue Src, SDValue Size,
3127 const Value *DstSV, uint64_t DstSVOff,
3128 const Value *SrcSV, uint64_t SrcSVOff) {
3130 // Check to see if we should lower the memmove to loads and stores first.
3131 // For cases within the target-specified limits, this is the best choice.
3132 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3134 // Memmove with size zero? Just return the original chain.
3135 if (ConstantSize->isNullValue())
3139 getMemmoveLoadsAndStores(*this, Chain, Dst, Src,
3140 ConstantSize->getZExtValue(),
3141 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3142 if (Result.getNode())
3146 // Then check to see if we should lower the memmove with target-specific
3147 // code. If the target chooses to do this, this is the next best.
3149 TLI.EmitTargetCodeForMemmove(*this, Chain, Dst, Src, Size, Align,
3150 DstSV, DstSVOff, SrcSV, SrcSVOff);
3151 if (Result.getNode())
3154 // Emit a library call.
3155 TargetLowering::ArgListTy Args;
3156 TargetLowering::ArgListEntry Entry;
3157 Entry.Ty = TLI.getTargetData()->getIntPtrType();
3158 Entry.Node = Dst; Args.push_back(Entry);
3159 Entry.Node = Src; Args.push_back(Entry);
3160 Entry.Node = Size; Args.push_back(Entry);
3161 std::pair<SDValue,SDValue> CallResult =
3162 TLI.LowerCallTo(Chain, Type::VoidTy,
3163 false, false, false, false, CallingConv::C, false,
3164 getExternalSymbol("memmove", TLI.getPointerTy()),
3166 return CallResult.second;
3169 SDValue SelectionDAG::getMemset(SDValue Chain, SDValue Dst,
3170 SDValue Src, SDValue Size,
3172 const Value *DstSV, uint64_t DstSVOff) {
3174 // Check to see if we should lower the memset to stores first.
3175 // For cases within the target-specified limits, this is the best choice.
3176 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3178 // Memset with size zero? Just return the original chain.
3179 if (ConstantSize->isNullValue())
3183 getMemsetStores(*this, Chain, Dst, Src, ConstantSize->getZExtValue(),
3184 Align, DstSV, DstSVOff);
3185 if (Result.getNode())
3189 // Then check to see if we should lower the memset with target-specific
3190 // code. If the target chooses to do this, this is the next best.
3192 TLI.EmitTargetCodeForMemset(*this, Chain, Dst, Src, Size, Align,
3194 if (Result.getNode())
3197 // Emit a library call.
3198 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType();
3199 TargetLowering::ArgListTy Args;
3200 TargetLowering::ArgListEntry Entry;
3201 Entry.Node = Dst; Entry.Ty = IntPtrTy;
3202 Args.push_back(Entry);
3203 // Extend or truncate the argument to be an i32 value for the call.
3204 if (Src.getValueType().bitsGT(MVT::i32))
3205 Src = getNode(ISD::TRUNCATE, MVT::i32, Src);
3207 Src = getNode(ISD::ZERO_EXTEND, MVT::i32, Src);
3208 Entry.Node = Src; Entry.Ty = Type::Int32Ty; Entry.isSExt = true;
3209 Args.push_back(Entry);
3210 Entry.Node = Size; Entry.Ty = IntPtrTy; Entry.isSExt = false;
3211 Args.push_back(Entry);
3212 std::pair<SDValue,SDValue> CallResult =
3213 TLI.LowerCallTo(Chain, Type::VoidTy,
3214 false, false, false, false, CallingConv::C, false,
3215 getExternalSymbol("memset", TLI.getPointerTy()),
3217 return CallResult.second;
3220 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDValue Chain,
3221 SDValue Ptr, SDValue Cmp,
3222 SDValue Swp, const Value* PtrVal,
3223 unsigned Alignment) {
3224 assert((Opcode == ISD::ATOMIC_CMP_SWAP_8 ||
3225 Opcode == ISD::ATOMIC_CMP_SWAP_16 ||
3226 Opcode == ISD::ATOMIC_CMP_SWAP_32 ||
3227 Opcode == ISD::ATOMIC_CMP_SWAP_64) && "Invalid Atomic Op");
3228 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3230 MVT VT = Cmp.getValueType();
3232 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3233 Alignment = getMVTAlignment(VT);
3235 SDVTList VTs = getVTList(VT, MVT::Other);
3236 FoldingSetNodeID ID;
3237 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3238 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3240 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3241 return SDValue(E, 0);
3242 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3243 new (N) AtomicSDNode(Opcode, VTs, Chain, Ptr, Cmp, Swp, PtrVal, Alignment);
3244 CSEMap.InsertNode(N, IP);
3245 AllNodes.push_back(N);
3246 return SDValue(N, 0);
3249 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDValue Chain,
3250 SDValue Ptr, SDValue Val,
3251 const Value* PtrVal,
3252 unsigned Alignment) {
3253 assert((Opcode == ISD::ATOMIC_LOAD_ADD_8 ||
3254 Opcode == ISD::ATOMIC_LOAD_SUB_8 ||
3255 Opcode == ISD::ATOMIC_LOAD_AND_8 ||
3256 Opcode == ISD::ATOMIC_LOAD_OR_8 ||
3257 Opcode == ISD::ATOMIC_LOAD_XOR_8 ||
3258 Opcode == ISD::ATOMIC_LOAD_NAND_8 ||
3259 Opcode == ISD::ATOMIC_LOAD_MIN_8 ||
3260 Opcode == ISD::ATOMIC_LOAD_MAX_8 ||
3261 Opcode == ISD::ATOMIC_LOAD_UMIN_8 ||
3262 Opcode == ISD::ATOMIC_LOAD_UMAX_8 ||
3263 Opcode == ISD::ATOMIC_SWAP_8 ||
3264 Opcode == ISD::ATOMIC_LOAD_ADD_16 ||
3265 Opcode == ISD::ATOMIC_LOAD_SUB_16 ||
3266 Opcode == ISD::ATOMIC_LOAD_AND_16 ||
3267 Opcode == ISD::ATOMIC_LOAD_OR_16 ||
3268 Opcode == ISD::ATOMIC_LOAD_XOR_16 ||
3269 Opcode == ISD::ATOMIC_LOAD_NAND_16 ||
3270 Opcode == ISD::ATOMIC_LOAD_MIN_16 ||
3271 Opcode == ISD::ATOMIC_LOAD_MAX_16 ||
3272 Opcode == ISD::ATOMIC_LOAD_UMIN_16 ||
3273 Opcode == ISD::ATOMIC_LOAD_UMAX_16 ||
3274 Opcode == ISD::ATOMIC_SWAP_16 ||
3275 Opcode == ISD::ATOMIC_LOAD_ADD_32 ||
3276 Opcode == ISD::ATOMIC_LOAD_SUB_32 ||
3277 Opcode == ISD::ATOMIC_LOAD_AND_32 ||
3278 Opcode == ISD::ATOMIC_LOAD_OR_32 ||
3279 Opcode == ISD::ATOMIC_LOAD_XOR_32 ||
3280 Opcode == ISD::ATOMIC_LOAD_NAND_32 ||
3281 Opcode == ISD::ATOMIC_LOAD_MIN_32 ||
3282 Opcode == ISD::ATOMIC_LOAD_MAX_32 ||
3283 Opcode == ISD::ATOMIC_LOAD_UMIN_32 ||
3284 Opcode == ISD::ATOMIC_LOAD_UMAX_32 ||
3285 Opcode == ISD::ATOMIC_SWAP_32 ||
3286 Opcode == ISD::ATOMIC_LOAD_ADD_64 ||
3287 Opcode == ISD::ATOMIC_LOAD_SUB_64 ||
3288 Opcode == ISD::ATOMIC_LOAD_AND_64 ||
3289 Opcode == ISD::ATOMIC_LOAD_OR_64 ||
3290 Opcode == ISD::ATOMIC_LOAD_XOR_64 ||
3291 Opcode == ISD::ATOMIC_LOAD_NAND_64 ||
3292 Opcode == ISD::ATOMIC_LOAD_MIN_64 ||
3293 Opcode == ISD::ATOMIC_LOAD_MAX_64 ||
3294 Opcode == ISD::ATOMIC_LOAD_UMIN_64 ||
3295 Opcode == ISD::ATOMIC_LOAD_UMAX_64 ||
3296 Opcode == ISD::ATOMIC_SWAP_64) && "Invalid Atomic Op");
3298 MVT VT = Val.getValueType();
3300 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3301 Alignment = getMVTAlignment(VT);
3303 SDVTList VTs = getVTList(VT, MVT::Other);
3304 FoldingSetNodeID ID;
3305 SDValue Ops[] = {Chain, Ptr, Val};
3306 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3308 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3309 return SDValue(E, 0);
3310 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3311 new (N) AtomicSDNode(Opcode, VTs, Chain, Ptr, Val, PtrVal, Alignment);
3312 CSEMap.InsertNode(N, IP);
3313 AllNodes.push_back(N);
3314 return SDValue(N, 0);
3317 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
3318 /// Allowed to return something different (and simpler) if Simplify is true.
3319 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps,
3321 if (Simplify && NumOps == 1)
3324 SmallVector<MVT, 4> VTs;
3325 VTs.reserve(NumOps);
3326 for (unsigned i = 0; i < NumOps; ++i)
3327 VTs.push_back(Ops[i].getValueType());
3328 return getNode(ISD::MERGE_VALUES, getVTList(&VTs[0], NumOps), Ops, NumOps);
3332 SelectionDAG::getCall(unsigned CallingConv, bool IsVarArgs, bool IsTailCall,
3333 bool IsInreg, SDVTList VTs,
3334 const SDValue *Operands, unsigned NumOperands) {
3335 // Do not include isTailCall in the folding set profile.
3336 FoldingSetNodeID ID;
3337 AddNodeIDNode(ID, ISD::CALL, VTs, Operands, NumOperands);
3338 ID.AddInteger(CallingConv);
3339 ID.AddInteger(IsVarArgs);
3341 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3342 // Instead of including isTailCall in the folding set, we just
3343 // set the flag of the existing node.
3345 cast<CallSDNode>(E)->setNotTailCall();
3346 return SDValue(E, 0);
3348 SDNode *N = NodeAllocator.Allocate<CallSDNode>();
3349 new (N) CallSDNode(CallingConv, IsVarArgs, IsTailCall, IsInreg,
3350 VTs, Operands, NumOperands);
3351 CSEMap.InsertNode(N, IP);
3352 AllNodes.push_back(N);
3353 return SDValue(N, 0);
3357 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
3358 MVT VT, SDValue Chain,
3359 SDValue Ptr, SDValue Offset,
3360 const Value *SV, int SVOffset, MVT EVT,
3361 bool isVolatile, unsigned Alignment) {
3362 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3363 Alignment = getMVTAlignment(VT);
3366 ExtType = ISD::NON_EXTLOAD;
3367 } else if (ExtType == ISD::NON_EXTLOAD) {
3368 assert(VT == EVT && "Non-extending load from different memory type!");
3372 assert(EVT.getVectorNumElements() == VT.getVectorNumElements() &&
3373 "Invalid vector extload!");
3375 assert(EVT.bitsLT(VT) &&
3376 "Should only be an extending load, not truncating!");
3377 assert((ExtType == ISD::EXTLOAD || VT.isInteger()) &&
3378 "Cannot sign/zero extend a FP/Vector load!");
3379 assert(VT.isInteger() == EVT.isInteger() &&
3380 "Cannot convert from FP to Int or Int -> FP!");
3383 bool Indexed = AM != ISD::UNINDEXED;
3384 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
3385 "Unindexed load with an offset!");
3387 SDVTList VTs = Indexed ?
3388 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
3389 SDValue Ops[] = { Chain, Ptr, Offset };
3390 FoldingSetNodeID ID;
3391 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
3393 ID.AddInteger(ExtType);
3394 ID.AddInteger(EVT.getRawBits());
3395 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment));
3397 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3398 return SDValue(E, 0);
3399 SDNode *N = NodeAllocator.Allocate<LoadSDNode>();
3400 new (N) LoadSDNode(Ops, VTs, AM, ExtType, EVT, SV, SVOffset,
3401 Alignment, isVolatile);
3402 CSEMap.InsertNode(N, IP);
3403 AllNodes.push_back(N);
3404 return SDValue(N, 0);
3407 SDValue SelectionDAG::getLoad(MVT VT,
3408 SDValue Chain, SDValue Ptr,
3409 const Value *SV, int SVOffset,
3410 bool isVolatile, unsigned Alignment) {
3411 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3412 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef,
3413 SV, SVOffset, VT, isVolatile, Alignment);
3416 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, MVT VT,
3417 SDValue Chain, SDValue Ptr,
3419 int SVOffset, MVT EVT,
3420 bool isVolatile, unsigned Alignment) {
3421 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3422 return getLoad(ISD::UNINDEXED, ExtType, VT, Chain, Ptr, Undef,
3423 SV, SVOffset, EVT, isVolatile, Alignment);
3427 SelectionDAG::getIndexedLoad(SDValue OrigLoad, SDValue Base,
3428 SDValue Offset, ISD::MemIndexedMode AM) {
3429 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
3430 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
3431 "Load is already a indexed load!");
3432 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(),
3433 LD->getChain(), Base, Offset, LD->getSrcValue(),
3434 LD->getSrcValueOffset(), LD->getMemoryVT(),
3435 LD->isVolatile(), LD->getAlignment());
3438 SDValue SelectionDAG::getStore(SDValue Chain, SDValue Val,
3439 SDValue Ptr, const Value *SV, int SVOffset,
3440 bool isVolatile, unsigned Alignment) {
3441 MVT VT = Val.getValueType();
3443 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3444 Alignment = getMVTAlignment(VT);
3446 SDVTList VTs = getVTList(MVT::Other);
3447 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3448 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3449 FoldingSetNodeID ID;
3450 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3451 ID.AddInteger(ISD::UNINDEXED);
3452 ID.AddInteger(false);
3453 ID.AddInteger(VT.getRawBits());
3454 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment));
3456 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3457 return SDValue(E, 0);
3458 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3459 new (N) StoreSDNode(Ops, VTs, ISD::UNINDEXED, false,
3460 VT, SV, SVOffset, Alignment, isVolatile);
3461 CSEMap.InsertNode(N, IP);
3462 AllNodes.push_back(N);
3463 return SDValue(N, 0);
3466 SDValue SelectionDAG::getTruncStore(SDValue Chain, SDValue Val,
3467 SDValue Ptr, const Value *SV,
3468 int SVOffset, MVT SVT,
3469 bool isVolatile, unsigned Alignment) {
3470 MVT VT = Val.getValueType();
3473 return getStore(Chain, Val, Ptr, SV, SVOffset, isVolatile, Alignment);
3475 assert(VT.bitsGT(SVT) && "Not a truncation?");
3476 assert(VT.isInteger() == SVT.isInteger() &&
3477 "Can't do FP-INT conversion!");
3479 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3480 Alignment = getMVTAlignment(VT);
3482 SDVTList VTs = getVTList(MVT::Other);
3483 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3484 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3485 FoldingSetNodeID ID;
3486 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3487 ID.AddInteger(ISD::UNINDEXED);
3489 ID.AddInteger(SVT.getRawBits());
3490 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment));
3492 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3493 return SDValue(E, 0);
3494 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3495 new (N) StoreSDNode(Ops, VTs, ISD::UNINDEXED, true,
3496 SVT, SV, SVOffset, Alignment, isVolatile);
3497 CSEMap.InsertNode(N, IP);
3498 AllNodes.push_back(N);
3499 return SDValue(N, 0);
3503 SelectionDAG::getIndexedStore(SDValue OrigStore, SDValue Base,
3504 SDValue Offset, ISD::MemIndexedMode AM) {
3505 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
3506 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
3507 "Store is already a indexed store!");
3508 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
3509 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
3510 FoldingSetNodeID ID;
3511 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3513 ID.AddInteger(ST->isTruncatingStore());
3514 ID.AddInteger(ST->getMemoryVT().getRawBits());
3515 ID.AddInteger(ST->getRawFlags());
3517 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3518 return SDValue(E, 0);
3519 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3520 new (N) StoreSDNode(Ops, VTs, AM,
3521 ST->isTruncatingStore(), ST->getMemoryVT(),
3522 ST->getSrcValue(), ST->getSrcValueOffset(),
3523 ST->getAlignment(), ST->isVolatile());
3524 CSEMap.InsertNode(N, IP);
3525 AllNodes.push_back(N);
3526 return SDValue(N, 0);
3529 SDValue SelectionDAG::getVAArg(MVT VT,
3530 SDValue Chain, SDValue Ptr,
3532 SDValue Ops[] = { Chain, Ptr, SV };
3533 return getNode(ISD::VAARG, getVTList(VT, MVT::Other), Ops, 3);
3536 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
3537 const SDUse *Ops, unsigned NumOps) {
3539 case 0: return getNode(Opcode, VT);
3540 case 1: return getNode(Opcode, VT, Ops[0]);
3541 case 2: return getNode(Opcode, VT, Ops[0], Ops[1]);
3542 case 3: return getNode(Opcode, VT, Ops[0], Ops[1], Ops[2]);
3546 // Copy from an SDUse array into an SDValue array for use with
3547 // the regular getNode logic.
3548 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
3549 return getNode(Opcode, VT, &NewOps[0], NumOps);
3552 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
3553 const SDValue *Ops, unsigned NumOps) {
3555 case 0: return getNode(Opcode, VT);
3556 case 1: return getNode(Opcode, VT, Ops[0]);
3557 case 2: return getNode(Opcode, VT, Ops[0], Ops[1]);
3558 case 3: return getNode(Opcode, VT, Ops[0], Ops[1], Ops[2]);
3564 case ISD::SELECT_CC: {
3565 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
3566 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
3567 "LHS and RHS of condition must have same type!");
3568 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
3569 "True and False arms of SelectCC must have same type!");
3570 assert(Ops[2].getValueType() == VT &&
3571 "select_cc node must be of same type as true and false value!");
3575 assert(NumOps == 5 && "BR_CC takes 5 operands!");
3576 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
3577 "LHS/RHS of comparison should match types!");
3584 SDVTList VTs = getVTList(VT);
3585 if (VT != MVT::Flag) {
3586 FoldingSetNodeID ID;
3587 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
3589 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3590 return SDValue(E, 0);
3591 N = NodeAllocator.Allocate<SDNode>();
3592 new (N) SDNode(Opcode, VTs, Ops, NumOps);
3593 CSEMap.InsertNode(N, IP);
3595 N = NodeAllocator.Allocate<SDNode>();
3596 new (N) SDNode(Opcode, VTs, Ops, NumOps);
3598 AllNodes.push_back(N);
3602 return SDValue(N, 0);
3605 SDValue SelectionDAG::getNode(unsigned Opcode,
3606 const std::vector<MVT> &ResultTys,
3607 const SDValue *Ops, unsigned NumOps) {
3608 return getNode(Opcode, getNodeValueTypes(ResultTys), ResultTys.size(),
3612 SDValue SelectionDAG::getNode(unsigned Opcode,
3613 const MVT *VTs, unsigned NumVTs,
3614 const SDValue *Ops, unsigned NumOps) {
3616 return getNode(Opcode, VTs[0], Ops, NumOps);
3617 return getNode(Opcode, makeVTList(VTs, NumVTs), Ops, NumOps);
3620 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3621 const SDValue *Ops, unsigned NumOps) {
3622 if (VTList.NumVTs == 1)
3623 return getNode(Opcode, VTList.VTs[0], Ops, NumOps);
3626 // FIXME: figure out how to safely handle things like
3627 // int foo(int x) { return 1 << (x & 255); }
3628 // int bar() { return foo(256); }
3630 case ISD::SRA_PARTS:
3631 case ISD::SRL_PARTS:
3632 case ISD::SHL_PARTS:
3633 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
3634 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
3635 return getNode(Opcode, VT, N1, N2, N3.getOperand(0));
3636 else if (N3.getOpcode() == ISD::AND)
3637 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
3638 // If the and is only masking out bits that cannot effect the shift,
3639 // eliminate the and.
3640 unsigned NumBits = VT.getSizeInBits()*2;
3641 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
3642 return getNode(Opcode, VT, N1, N2, N3.getOperand(0));
3648 // Memoize the node unless it returns a flag.
3650 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3651 FoldingSetNodeID ID;
3652 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3654 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3655 return SDValue(E, 0);
3657 N = NodeAllocator.Allocate<UnarySDNode>();
3658 new (N) UnarySDNode(Opcode, VTList, Ops[0]);
3659 } else if (NumOps == 2) {
3660 N = NodeAllocator.Allocate<BinarySDNode>();
3661 new (N) BinarySDNode(Opcode, VTList, Ops[0], Ops[1]);
3662 } else if (NumOps == 3) {
3663 N = NodeAllocator.Allocate<TernarySDNode>();
3664 new (N) TernarySDNode(Opcode, VTList, Ops[0], Ops[1], Ops[2]);
3666 N = NodeAllocator.Allocate<SDNode>();
3667 new (N) SDNode(Opcode, VTList, Ops, NumOps);
3669 CSEMap.InsertNode(N, IP);
3672 N = NodeAllocator.Allocate<UnarySDNode>();
3673 new (N) UnarySDNode(Opcode, VTList, Ops[0]);
3674 } else if (NumOps == 2) {
3675 N = NodeAllocator.Allocate<BinarySDNode>();
3676 new (N) BinarySDNode(Opcode, VTList, Ops[0], Ops[1]);
3677 } else if (NumOps == 3) {
3678 N = NodeAllocator.Allocate<TernarySDNode>();
3679 new (N) TernarySDNode(Opcode, VTList, Ops[0], Ops[1], Ops[2]);
3681 N = NodeAllocator.Allocate<SDNode>();
3682 new (N) SDNode(Opcode, VTList, Ops, NumOps);
3685 AllNodes.push_back(N);
3689 return SDValue(N, 0);
3692 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList) {
3693 return getNode(Opcode, VTList, 0, 0);
3696 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3698 SDValue Ops[] = { N1 };
3699 return getNode(Opcode, VTList, Ops, 1);
3702 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3703 SDValue N1, SDValue N2) {
3704 SDValue Ops[] = { N1, N2 };
3705 return getNode(Opcode, VTList, Ops, 2);
3708 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3709 SDValue N1, SDValue N2, SDValue N3) {
3710 SDValue Ops[] = { N1, N2, N3 };
3711 return getNode(Opcode, VTList, Ops, 3);
3714 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3715 SDValue N1, SDValue N2, SDValue N3,
3717 SDValue Ops[] = { N1, N2, N3, N4 };
3718 return getNode(Opcode, VTList, Ops, 4);
3721 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3722 SDValue N1, SDValue N2, SDValue N3,
3723 SDValue N4, SDValue N5) {
3724 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3725 return getNode(Opcode, VTList, Ops, 5);
3728 SDVTList SelectionDAG::getVTList(MVT VT) {
3729 return makeVTList(SDNode::getValueTypeList(VT), 1);
3732 SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2) {
3733 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
3734 E = VTList.rend(); I != E; ++I)
3735 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
3738 MVT *Array = Allocator.Allocate<MVT>(2);
3741 SDVTList Result = makeVTList(Array, 2);
3742 VTList.push_back(Result);
3746 SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2, MVT VT3) {
3747 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
3748 E = VTList.rend(); I != E; ++I)
3749 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
3753 MVT *Array = Allocator.Allocate<MVT>(3);
3757 SDVTList Result = makeVTList(Array, 3);
3758 VTList.push_back(Result);
3762 SDVTList SelectionDAG::getVTList(const MVT *VTs, unsigned NumVTs) {
3764 case 0: assert(0 && "Cannot have nodes without results!");
3765 case 1: return getVTList(VTs[0]);
3766 case 2: return getVTList(VTs[0], VTs[1]);
3767 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
3771 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
3772 E = VTList.rend(); I != E; ++I) {
3773 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
3776 bool NoMatch = false;
3777 for (unsigned i = 2; i != NumVTs; ++i)
3778 if (VTs[i] != I->VTs[i]) {
3786 MVT *Array = Allocator.Allocate<MVT>(NumVTs);
3787 std::copy(VTs, VTs+NumVTs, Array);
3788 SDVTList Result = makeVTList(Array, NumVTs);
3789 VTList.push_back(Result);
3794 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
3795 /// specified operands. If the resultant node already exists in the DAG,
3796 /// this does not modify the specified node, instead it returns the node that
3797 /// already exists. If the resultant node does not exist in the DAG, the
3798 /// input node is returned. As a degenerate case, if you specify the same
3799 /// input operands as the node already has, the input node is returned.
3800 SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) {
3801 SDNode *N = InN.getNode();
3802 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
3804 // Check to see if there is no change.
3805 if (Op == N->getOperand(0)) return InN;
3807 // See if the modified node already exists.
3808 void *InsertPos = 0;
3809 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
3810 return SDValue(Existing, InN.getResNo());
3812 // Nope it doesn't. Remove the node from its current place in the maps.
3814 if (!RemoveNodeFromCSEMaps(N))
3817 // Now we update the operands.
3818 N->OperandList[0].getVal()->removeUser(0, N);
3819 N->OperandList[0] = Op;
3820 N->OperandList[0].setUser(N);
3821 Op.getNode()->addUser(0, N);
3823 // If this gets put into a CSE map, add it.
3824 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
3828 SDValue SelectionDAG::
3829 UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) {
3830 SDNode *N = InN.getNode();
3831 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
3833 // Check to see if there is no change.
3834 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
3835 return InN; // No operands changed, just return the input node.
3837 // See if the modified node already exists.
3838 void *InsertPos = 0;
3839 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
3840 return SDValue(Existing, InN.getResNo());
3842 // Nope it doesn't. Remove the node from its current place in the maps.
3844 if (!RemoveNodeFromCSEMaps(N))
3847 // Now we update the operands.
3848 if (N->OperandList[0] != Op1) {
3849 N->OperandList[0].getVal()->removeUser(0, N);
3850 N->OperandList[0] = Op1;
3851 N->OperandList[0].setUser(N);
3852 Op1.getNode()->addUser(0, N);
3854 if (N->OperandList[1] != Op2) {
3855 N->OperandList[1].getVal()->removeUser(1, N);
3856 N->OperandList[1] = Op2;
3857 N->OperandList[1].setUser(N);
3858 Op2.getNode()->addUser(1, N);
3861 // If this gets put into a CSE map, add it.
3862 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
3866 SDValue SelectionDAG::
3867 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) {
3868 SDValue Ops[] = { Op1, Op2, Op3 };
3869 return UpdateNodeOperands(N, Ops, 3);
3872 SDValue SelectionDAG::
3873 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
3874 SDValue Op3, SDValue Op4) {
3875 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
3876 return UpdateNodeOperands(N, Ops, 4);
3879 SDValue SelectionDAG::
3880 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
3881 SDValue Op3, SDValue Op4, SDValue Op5) {
3882 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
3883 return UpdateNodeOperands(N, Ops, 5);
3886 SDValue SelectionDAG::
3887 UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) {
3888 SDNode *N = InN.getNode();
3889 assert(N->getNumOperands() == NumOps &&
3890 "Update with wrong number of operands");
3892 // Check to see if there is no change.
3893 bool AnyChange = false;
3894 for (unsigned i = 0; i != NumOps; ++i) {
3895 if (Ops[i] != N->getOperand(i)) {
3901 // No operands changed, just return the input node.
3902 if (!AnyChange) return InN;
3904 // See if the modified node already exists.
3905 void *InsertPos = 0;
3906 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
3907 return SDValue(Existing, InN.getResNo());
3909 // Nope it doesn't. Remove the node from its current place in the maps.
3911 if (!RemoveNodeFromCSEMaps(N))
3914 // Now we update the operands.
3915 for (unsigned i = 0; i != NumOps; ++i) {
3916 if (N->OperandList[i] != Ops[i]) {
3917 N->OperandList[i].getVal()->removeUser(i, N);
3918 N->OperandList[i] = Ops[i];
3919 N->OperandList[i].setUser(N);
3920 Ops[i].getNode()->addUser(i, N);
3924 // If this gets put into a CSE map, add it.
3925 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
3929 /// DropOperands - Release the operands and set this node to have
3931 void SDNode::DropOperands() {
3932 // Unlike the code in MorphNodeTo that does this, we don't need to
3933 // watch for dead nodes here.
3934 for (op_iterator I = op_begin(), E = op_end(); I != E; ++I)
3935 I->getVal()->removeUser(std::distance(op_begin(), I), this);
3940 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
3943 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
3945 SDVTList VTs = getVTList(VT);
3946 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
3949 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
3950 MVT VT, SDValue Op1) {
3951 SDVTList VTs = getVTList(VT);
3952 SDValue Ops[] = { Op1 };
3953 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
3956 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
3957 MVT VT, SDValue Op1,
3959 SDVTList VTs = getVTList(VT);
3960 SDValue Ops[] = { Op1, Op2 };
3961 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
3964 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
3965 MVT VT, SDValue Op1,
3966 SDValue Op2, SDValue Op3) {
3967 SDVTList VTs = getVTList(VT);
3968 SDValue Ops[] = { Op1, Op2, Op3 };
3969 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
3972 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
3973 MVT VT, const SDValue *Ops,
3975 SDVTList VTs = getVTList(VT);
3976 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
3979 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
3980 MVT VT1, MVT VT2, const SDValue *Ops,
3982 SDVTList VTs = getVTList(VT1, VT2);
3983 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
3986 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
3988 SDVTList VTs = getVTList(VT1, VT2);
3989 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
3992 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
3993 MVT VT1, MVT VT2, MVT VT3,
3994 const SDValue *Ops, unsigned NumOps) {
3995 SDVTList VTs = getVTList(VT1, VT2, VT3);
3996 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
3999 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4002 SDVTList VTs = getVTList(VT1, VT2);
4003 SDValue Ops[] = { Op1 };
4004 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4007 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4009 SDValue Op1, SDValue Op2) {
4010 SDVTList VTs = getVTList(VT1, VT2);
4011 SDValue Ops[] = { Op1, Op2 };
4012 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4015 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4017 SDValue Op1, SDValue Op2,
4019 SDVTList VTs = getVTList(VT1, VT2);
4020 SDValue Ops[] = { Op1, Op2, Op3 };
4021 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4024 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4025 SDVTList VTs, const SDValue *Ops,
4027 return MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
4030 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4032 SDVTList VTs = getVTList(VT);
4033 return MorphNodeTo(N, Opc, VTs, 0, 0);
4036 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4037 MVT VT, SDValue Op1) {
4038 SDVTList VTs = getVTList(VT);
4039 SDValue Ops[] = { Op1 };
4040 return MorphNodeTo(N, Opc, VTs, Ops, 1);
4043 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4044 MVT VT, SDValue Op1,
4046 SDVTList VTs = getVTList(VT);
4047 SDValue Ops[] = { Op1, Op2 };
4048 return MorphNodeTo(N, Opc, VTs, Ops, 2);
4051 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4052 MVT VT, SDValue Op1,
4053 SDValue Op2, SDValue Op3) {
4054 SDVTList VTs = getVTList(VT);
4055 SDValue Ops[] = { Op1, Op2, Op3 };
4056 return MorphNodeTo(N, Opc, VTs, Ops, 3);
4059 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4060 MVT VT, const SDValue *Ops,
4062 SDVTList VTs = getVTList(VT);
4063 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4066 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4067 MVT VT1, MVT VT2, const SDValue *Ops,
4069 SDVTList VTs = getVTList(VT1, VT2);
4070 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4073 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4075 SDVTList VTs = getVTList(VT1, VT2);
4076 return MorphNodeTo(N, Opc, VTs, (SDValue *)0, 0);
4079 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4080 MVT VT1, MVT VT2, MVT VT3,
4081 const SDValue *Ops, unsigned NumOps) {
4082 SDVTList VTs = getVTList(VT1, VT2, VT3);
4083 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4086 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4089 SDVTList VTs = getVTList(VT1, VT2);
4090 SDValue Ops[] = { Op1 };
4091 return MorphNodeTo(N, Opc, VTs, Ops, 1);
4094 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4096 SDValue Op1, SDValue Op2) {
4097 SDVTList VTs = getVTList(VT1, VT2);
4098 SDValue Ops[] = { Op1, Op2 };
4099 return MorphNodeTo(N, Opc, VTs, Ops, 2);
4102 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4104 SDValue Op1, SDValue Op2,
4106 SDVTList VTs = getVTList(VT1, VT2);
4107 SDValue Ops[] = { Op1, Op2, Op3 };
4108 return MorphNodeTo(N, Opc, VTs, Ops, 3);
4111 /// MorphNodeTo - These *mutate* the specified node to have the specified
4112 /// return type, opcode, and operands.
4114 /// Note that MorphNodeTo returns the resultant node. If there is already a
4115 /// node of the specified opcode and operands, it returns that node instead of
4116 /// the current one.
4118 /// Using MorphNodeTo is faster than creating a new node and swapping it in
4119 /// with ReplaceAllUsesWith both because it often avoids allocating a new
4120 /// node, and because it doesn't require CSE recalculation for any of
4121 /// the node's users.
4123 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4124 SDVTList VTs, const SDValue *Ops,
4126 // If an identical node already exists, use it.
4128 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) {
4129 FoldingSetNodeID ID;
4130 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
4131 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
4135 if (!RemoveNodeFromCSEMaps(N))
4138 // Start the morphing.
4140 N->ValueList = VTs.VTs;
4141 N->NumValues = VTs.NumVTs;
4143 // Clear the operands list, updating used nodes to remove this from their
4144 // use list. Keep track of any operands that become dead as a result.
4145 SmallPtrSet<SDNode*, 16> DeadNodeSet;
4146 for (SDNode::op_iterator B = N->op_begin(), I = B, E = N->op_end();
4148 SDNode *Used = I->getVal();
4149 Used->removeUser(std::distance(B, I), N);
4150 if (Used->use_empty())
4151 DeadNodeSet.insert(Used);
4154 // If NumOps is larger than the # of operands we currently have, reallocate
4155 // the operand list.
4156 if (NumOps > N->NumOperands) {
4157 if (N->OperandsNeedDelete)
4158 delete[] N->OperandList;
4159 if (N->isMachineOpcode()) {
4160 // We're creating a final node that will live unmorphed for the
4161 // remainder of the current SelectionDAG iteration, so we can allocate
4162 // the operands directly out of a pool with no recycling metadata.
4163 N->OperandList = OperandAllocator.Allocate<SDUse>(NumOps);
4164 N->OperandsNeedDelete = false;
4166 N->OperandList = new SDUse[NumOps];
4167 N->OperandsNeedDelete = true;
4171 // Assign the new operands.
4172 N->NumOperands = NumOps;
4173 for (unsigned i = 0, e = NumOps; i != e; ++i) {
4174 N->OperandList[i] = Ops[i];
4175 N->OperandList[i].setUser(N);
4176 SDNode *ToUse = N->OperandList[i].getVal();
4177 ToUse->addUser(i, N);
4180 // Delete any nodes that are still dead after adding the uses for the
4182 SmallVector<SDNode *, 16> DeadNodes;
4183 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
4184 E = DeadNodeSet.end(); I != E; ++I)
4185 if ((*I)->use_empty())
4186 DeadNodes.push_back(*I);
4187 RemoveDeadNodes(DeadNodes);
4190 CSEMap.InsertNode(N, IP); // Memoize the new node.
4195 /// getTargetNode - These are used for target selectors to create a new node
4196 /// with specified return type(s), target opcode, and operands.
4198 /// Note that getTargetNode returns the resultant node. If there is already a
4199 /// node of the specified opcode and operands, it returns that node instead of
4200 /// the current one.
4201 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT) {
4202 return getNode(~Opcode, VT).getNode();
4204 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, SDValue Op1) {
4205 return getNode(~Opcode, VT, Op1).getNode();
4207 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT,
4208 SDValue Op1, SDValue Op2) {
4209 return getNode(~Opcode, VT, Op1, Op2).getNode();
4211 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT,
4212 SDValue Op1, SDValue Op2,
4214 return getNode(~Opcode, VT, Op1, Op2, Op3).getNode();
4216 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT,
4217 const SDValue *Ops, unsigned NumOps) {
4218 return getNode(~Opcode, VT, Ops, NumOps).getNode();
4220 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2) {
4221 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4223 return getNode(~Opcode, VTs, 2, &Op, 0).getNode();
4225 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
4226 MVT VT2, SDValue Op1) {
4227 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4228 return getNode(~Opcode, VTs, 2, &Op1, 1).getNode();
4230 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
4231 MVT VT2, SDValue Op1,
4233 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4234 SDValue Ops[] = { Op1, Op2 };
4235 return getNode(~Opcode, VTs, 2, Ops, 2).getNode();
4237 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
4238 MVT VT2, SDValue Op1,
4239 SDValue Op2, SDValue Op3) {
4240 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4241 SDValue Ops[] = { Op1, Op2, Op3 };
4242 return getNode(~Opcode, VTs, 2, Ops, 3).getNode();
4244 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2,
4245 const SDValue *Ops, unsigned NumOps) {
4246 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4247 return getNode(~Opcode, VTs, 2, Ops, NumOps).getNode();
4249 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
4250 SDValue Op1, SDValue Op2) {
4251 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4252 SDValue Ops[] = { Op1, Op2 };
4253 return getNode(~Opcode, VTs, 3, Ops, 2).getNode();
4255 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
4256 SDValue Op1, SDValue Op2,
4258 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4259 SDValue Ops[] = { Op1, Op2, Op3 };
4260 return getNode(~Opcode, VTs, 3, Ops, 3).getNode();
4262 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
4263 const SDValue *Ops, unsigned NumOps) {
4264 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4265 return getNode(~Opcode, VTs, 3, Ops, NumOps).getNode();
4267 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
4268 MVT VT2, MVT VT3, MVT VT4,
4269 const SDValue *Ops, unsigned NumOps) {
4270 std::vector<MVT> VTList;
4271 VTList.push_back(VT1);
4272 VTList.push_back(VT2);
4273 VTList.push_back(VT3);
4274 VTList.push_back(VT4);
4275 const MVT *VTs = getNodeValueTypes(VTList);
4276 return getNode(~Opcode, VTs, 4, Ops, NumOps).getNode();
4278 SDNode *SelectionDAG::getTargetNode(unsigned Opcode,
4279 const std::vector<MVT> &ResultTys,
4280 const SDValue *Ops, unsigned NumOps) {
4281 const MVT *VTs = getNodeValueTypes(ResultTys);
4282 return getNode(~Opcode, VTs, ResultTys.size(),
4283 Ops, NumOps).getNode();
4286 /// getNodeIfExists - Get the specified node if it's already available, or
4287 /// else return NULL.
4288 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
4289 const SDValue *Ops, unsigned NumOps) {
4290 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4291 FoldingSetNodeID ID;
4292 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4294 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4301 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4302 /// This can cause recursive merging of nodes in the DAG.
4304 /// This version assumes From has a single result value.
4306 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To,
4307 DAGUpdateListener *UpdateListener) {
4308 SDNode *From = FromN.getNode();
4309 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
4310 "Cannot replace with this method!");
4311 assert(From != To.getNode() && "Cannot replace uses of with self");
4313 while (!From->use_empty()) {
4314 SDNode::use_iterator UI = From->use_begin();
4317 // This node is about to morph, remove its old self from the CSE maps.
4318 RemoveNodeFromCSEMaps(U);
4320 for (SDNode::op_iterator I = U->op_begin(), E = U->op_end();
4321 I != E; ++I, ++operandNum)
4322 if (I->getVal() == From) {
4323 From->removeUser(operandNum, U);
4326 To.getNode()->addUser(operandNum, U);
4329 // Now that we have modified U, add it back to the CSE maps. If it already
4330 // exists there, recursively merge the results together.
4331 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) {
4332 ReplaceAllUsesWith(U, Existing, UpdateListener);
4333 // U is now dead. Inform the listener if it exists and delete it.
4335 UpdateListener->NodeDeleted(U, Existing);
4336 DeleteNodeNotInCSEMaps(U);
4338 // If the node doesn't already exist, we updated it. Inform a listener if
4341 UpdateListener->NodeUpdated(U);
4346 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4347 /// This can cause recursive merging of nodes in the DAG.
4349 /// This version assumes From/To have matching types and numbers of result
4352 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To,
4353 DAGUpdateListener *UpdateListener) {
4354 assert(From->getVTList().VTs == To->getVTList().VTs &&
4355 From->getNumValues() == To->getNumValues() &&
4356 "Cannot use this version of ReplaceAllUsesWith!");
4358 // Handle the trivial case.
4362 while (!From->use_empty()) {
4363 SDNode::use_iterator UI = From->use_begin();
4366 // This node is about to morph, remove its old self from the CSE maps.
4367 RemoveNodeFromCSEMaps(U);
4369 for (SDNode::op_iterator I = U->op_begin(), E = U->op_end();
4370 I != E; ++I, ++operandNum)
4371 if (I->getVal() == From) {
4372 From->removeUser(operandNum, U);
4373 I->getSDValue().setNode(To);
4374 To->addUser(operandNum, U);
4377 // Now that we have modified U, add it back to the CSE maps. If it already
4378 // exists there, recursively merge the results together.
4379 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) {
4380 ReplaceAllUsesWith(U, Existing, UpdateListener);
4381 // U is now dead. Inform the listener if it exists and delete it.
4383 UpdateListener->NodeDeleted(U, Existing);
4384 DeleteNodeNotInCSEMaps(U);
4386 // If the node doesn't already exist, we updated it. Inform a listener if
4389 UpdateListener->NodeUpdated(U);
4394 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4395 /// This can cause recursive merging of nodes in the DAG.
4397 /// This version can replace From with any result values. To must match the
4398 /// number and types of values returned by From.
4399 void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
4401 DAGUpdateListener *UpdateListener) {
4402 if (From->getNumValues() == 1) // Handle the simple case efficiently.
4403 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener);
4405 while (!From->use_empty()) {
4406 SDNode::use_iterator UI = From->use_begin();
4409 // This node is about to morph, remove its old self from the CSE maps.
4410 RemoveNodeFromCSEMaps(U);
4412 for (SDNode::op_iterator I = U->op_begin(), E = U->op_end();
4413 I != E; ++I, ++operandNum)
4414 if (I->getVal() == From) {
4415 const SDValue &ToOp = To[I->getSDValue().getResNo()];
4416 From->removeUser(operandNum, U);
4419 ToOp.getNode()->addUser(operandNum, U);
4422 // Now that we have modified U, add it back to the CSE maps. If it already
4423 // exists there, recursively merge the results together.
4424 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) {
4425 ReplaceAllUsesWith(U, Existing, UpdateListener);
4426 // U is now dead. Inform the listener if it exists and delete it.
4428 UpdateListener->NodeDeleted(U, Existing);
4429 DeleteNodeNotInCSEMaps(U);
4431 // If the node doesn't already exist, we updated it. Inform a listener if
4434 UpdateListener->NodeUpdated(U);
4439 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
4440 /// uses of other values produced by From.getVal() alone. The Deleted vector is
4441 /// handled the same way as for ReplaceAllUsesWith.
4442 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To,
4443 DAGUpdateListener *UpdateListener){
4444 // Handle the really simple, really trivial case efficiently.
4445 if (From == To) return;
4447 // Handle the simple, trivial, case efficiently.
4448 if (From.getNode()->getNumValues() == 1) {
4449 ReplaceAllUsesWith(From, To, UpdateListener);
4453 // Get all of the users of From.getNode(). We want these in a nice,
4454 // deterministically ordered and uniqued set, so we use a SmallSetVector.
4455 SmallSetVector<SDNode*, 16> Users(From.getNode()->use_begin(), From.getNode()->use_end());
4457 while (!Users.empty()) {
4458 // We know that this user uses some value of From. If it is the right
4459 // value, update it.
4460 SDNode *User = Users.back();
4463 // Scan for an operand that matches From.
4464 SDNode::op_iterator Op = User->op_begin(), E = User->op_end();
4465 for (; Op != E; ++Op)
4466 if (*Op == From) break;
4468 // If there are no matches, the user must use some other result of From.
4469 if (Op == E) continue;
4471 // Okay, we know this user needs to be updated. Remove its old self
4472 // from the CSE maps.
4473 RemoveNodeFromCSEMaps(User);
4475 // Update all operands that match "From" in case there are multiple uses.
4476 for (; Op != E; ++Op) {
4478 From.getNode()->removeUser(Op-User->op_begin(), User);
4481 To.getNode()->addUser(Op-User->op_begin(), User);
4485 // Now that we have modified User, add it back to the CSE maps. If it
4486 // already exists there, recursively merge the results together.
4487 SDNode *Existing = AddNonLeafNodeToCSEMaps(User);
4489 if (UpdateListener) UpdateListener->NodeUpdated(User);
4490 continue; // Continue on to next user.
4493 // If there was already an existing matching node, use ReplaceAllUsesWith
4494 // to replace the dead one with the existing one. This can cause
4495 // recursive merging of other unrelated nodes down the line.
4496 ReplaceAllUsesWith(User, Existing, UpdateListener);
4498 // User is now dead. Notify a listener if present.
4499 if (UpdateListener) UpdateListener->NodeDeleted(User, Existing);
4500 DeleteNodeNotInCSEMaps(User);
4504 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
4505 /// uses of other values produced by From.getVal() alone. The same value may
4506 /// appear in both the From and To list. The Deleted vector is
4507 /// handled the same way as for ReplaceAllUsesWith.
4508 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
4511 DAGUpdateListener *UpdateListener){
4512 // Handle the simple, trivial case efficiently.
4514 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener);
4516 SmallVector<std::pair<SDNode *, unsigned>, 16> Users;
4517 for (unsigned i = 0; i != Num; ++i)
4518 for (SDNode::use_iterator UI = From[i].getNode()->use_begin(),
4519 E = From[i].getNode()->use_end(); UI != E; ++UI)
4520 Users.push_back(std::make_pair(*UI, i));
4522 while (!Users.empty()) {
4523 // We know that this user uses some value of From. If it is the right
4524 // value, update it.
4525 SDNode *User = Users.back().first;
4526 unsigned i = Users.back().second;
4529 // Scan for an operand that matches From.
4530 SDNode::op_iterator Op = User->op_begin(), E = User->op_end();
4531 for (; Op != E; ++Op)
4532 if (*Op == From[i]) break;
4534 // If there are no matches, the user must use some other result of From.
4535 if (Op == E) continue;
4537 // Okay, we know this user needs to be updated. Remove its old self
4538 // from the CSE maps.
4539 RemoveNodeFromCSEMaps(User);
4541 // Update all operands that match "From" in case there are multiple uses.
4542 for (; Op != E; ++Op) {
4543 if (*Op == From[i]) {
4544 From[i].getNode()->removeUser(Op-User->op_begin(), User);
4547 To[i].getNode()->addUser(Op-User->op_begin(), User);
4551 // Now that we have modified User, add it back to the CSE maps. If it
4552 // already exists there, recursively merge the results together.
4553 SDNode *Existing = AddNonLeafNodeToCSEMaps(User);
4555 if (UpdateListener) UpdateListener->NodeUpdated(User);
4556 continue; // Continue on to next user.
4559 // If there was already an existing matching node, use ReplaceAllUsesWith
4560 // to replace the dead one with the existing one. This can cause
4561 // recursive merging of other unrelated nodes down the line.
4562 ReplaceAllUsesWith(User, Existing, UpdateListener);
4564 // User is now dead. Notify a listener if present.
4565 if (UpdateListener) UpdateListener->NodeDeleted(User, Existing);
4566 DeleteNodeNotInCSEMaps(User);
4570 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
4571 /// based on their topological order. It returns the maximum id and a vector
4572 /// of the SDNodes* in assigned order by reference.
4573 unsigned SelectionDAG::AssignTopologicalOrder() {
4575 unsigned DAGSize = 0;
4577 // SortedPos tracks the progress of the algorithm. Nodes before it are
4578 // sorted, nodes after it are unsorted. When the algorithm completes
4579 // it is at the end of the list.
4580 allnodes_iterator SortedPos = allnodes_begin();
4582 // Visit all the nodes. Add nodes with no operands to the TopOrder result
4583 // array immediately. Annotate nodes that do have operands with their
4584 // operand count. Before we do this, the Node Id fields of the nodes
4585 // may contain arbitrary values. After, the Node Id fields for nodes
4586 // before SortedPos will contain the topological sort index, and the
4587 // Node Id fields for nodes At SortedPos and after will contain the
4588 // count of outstanding operands.
4589 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
4591 unsigned Degree = N->getNumOperands();
4593 // A node with no uses, add it to the result array immediately.
4594 N->setNodeId(DAGSize++);
4595 allnodes_iterator Q = N;
4597 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
4600 // Temporarily use the Node Id as scratch space for the degree count.
4601 N->setNodeId(Degree);
4605 // Visit all the nodes. As we iterate, moves nodes into sorted order,
4606 // such that by the time the end is reached all nodes will be sorted.
4607 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
4609 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
4612 unsigned Degree = P->getNodeId();
4615 // All of P's operands are sorted, so P may sorted now.
4616 P->setNodeId(DAGSize++);
4618 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
4621 // Update P's outstanding operand count.
4622 P->setNodeId(Degree);
4627 assert(SortedPos == AllNodes.end() &&
4628 "Topological sort incomplete!");
4629 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
4630 "First node in topological sort is not the entry token!");
4631 assert(AllNodes.front().getNodeId() == 0 &&
4632 "First node in topological sort has non-zero id!");
4633 assert(AllNodes.front().getNumOperands() == 0 &&
4634 "First node in topological sort has operands!");
4635 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
4636 "Last node in topologic sort has unexpected id!");
4637 assert(AllNodes.back().use_empty() &&
4638 "Last node in topologic sort has users!");
4639 assert(DAGSize == allnodes_size() && "TopOrder result count mismatch!");
4645 //===----------------------------------------------------------------------===//
4647 //===----------------------------------------------------------------------===//
4649 // Out-of-line virtual method to give class a home.
4650 void SDNode::ANCHOR() {}
4651 void UnarySDNode::ANCHOR() {}
4652 void BinarySDNode::ANCHOR() {}
4653 void TernarySDNode::ANCHOR() {}
4654 void HandleSDNode::ANCHOR() {}
4655 void ConstantSDNode::ANCHOR() {}
4656 void ConstantFPSDNode::ANCHOR() {}
4657 void GlobalAddressSDNode::ANCHOR() {}
4658 void FrameIndexSDNode::ANCHOR() {}
4659 void JumpTableSDNode::ANCHOR() {}
4660 void ConstantPoolSDNode::ANCHOR() {}
4661 void BasicBlockSDNode::ANCHOR() {}
4662 void SrcValueSDNode::ANCHOR() {}
4663 void MemOperandSDNode::ANCHOR() {}
4664 void RegisterSDNode::ANCHOR() {}
4665 void DbgStopPointSDNode::ANCHOR() {}
4666 void LabelSDNode::ANCHOR() {}
4667 void ExternalSymbolSDNode::ANCHOR() {}
4668 void CondCodeSDNode::ANCHOR() {}
4669 void ARG_FLAGSSDNode::ANCHOR() {}
4670 void VTSDNode::ANCHOR() {}
4671 void MemSDNode::ANCHOR() {}
4672 void LoadSDNode::ANCHOR() {}
4673 void StoreSDNode::ANCHOR() {}
4674 void AtomicSDNode::ANCHOR() {}
4675 void CallSDNode::ANCHOR() {}
4677 HandleSDNode::~HandleSDNode() {
4681 GlobalAddressSDNode::GlobalAddressSDNode(bool isTarget, const GlobalValue *GA,
4683 : SDNode(isa<GlobalVariable>(GA) &&
4684 cast<GlobalVariable>(GA)->isThreadLocal() ?
4686 (isTarget ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress) :
4688 (isTarget ? ISD::TargetGlobalAddress : ISD::GlobalAddress),
4689 getSDVTList(VT)), Offset(o) {
4690 TheGlobal = const_cast<GlobalValue*>(GA);
4693 MemSDNode::MemSDNode(unsigned Opc, SDVTList VTs, MVT memvt,
4694 const Value *srcValue, int SVO,
4695 unsigned alignment, bool vol)
4696 : SDNode(Opc, VTs), MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO),
4697 Flags(encodeMemSDNodeFlags(vol, alignment)) {
4699 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
4700 assert(getAlignment() == alignment && "Alignment representation error!");
4701 assert(isVolatile() == vol && "Volatile representation error!");
4704 /// getMemOperand - Return a MachineMemOperand object describing the memory
4705 /// reference performed by this memory reference.
4706 MachineMemOperand MemSDNode::getMemOperand() const {
4708 if (isa<LoadSDNode>(this))
4709 Flags = MachineMemOperand::MOLoad;
4710 else if (isa<StoreSDNode>(this))
4711 Flags = MachineMemOperand::MOStore;
4713 assert(isa<AtomicSDNode>(this) && "Unknown MemSDNode opcode!");
4714 Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
4717 int Size = (getMemoryVT().getSizeInBits() + 7) >> 3;
4718 if (isVolatile()) Flags |= MachineMemOperand::MOVolatile;
4720 // Check if the memory reference references a frame index
4721 const FrameIndexSDNode *FI =
4722 dyn_cast<const FrameIndexSDNode>(getBasePtr().getNode());
4723 if (!getSrcValue() && FI)
4724 return MachineMemOperand(PseudoSourceValue::getFixedStack(FI->getIndex()),
4725 Flags, 0, Size, getAlignment());
4727 return MachineMemOperand(getSrcValue(), Flags, getSrcValueOffset(),
4728 Size, getAlignment());
4731 /// Profile - Gather unique data for the node.
4733 void SDNode::Profile(FoldingSetNodeID &ID) const {
4734 AddNodeIDNode(ID, this);
4737 /// getValueTypeList - Return a pointer to the specified value type.
4739 const MVT *SDNode::getValueTypeList(MVT VT) {
4740 if (VT.isExtended()) {
4741 static std::set<MVT, MVT::compareRawBits> EVTs;
4742 return &(*EVTs.insert(VT).first);
4744 static MVT VTs[MVT::LAST_VALUETYPE];
4745 VTs[VT.getSimpleVT()] = VT;
4746 return &VTs[VT.getSimpleVT()];
4750 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
4751 /// indicated value. This method ignores uses of other values defined by this
4753 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
4754 assert(Value < getNumValues() && "Bad value!");
4756 // TODO: Only iterate over uses of a given value of the node
4757 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
4758 if (UI.getUse().getSDValue().getResNo() == Value) {
4765 // Found exactly the right number of uses?
4770 /// hasAnyUseOfValue - Return true if there are any use of the indicated
4771 /// value. This method ignores uses of other values defined by this operation.
4772 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
4773 assert(Value < getNumValues() && "Bad value!");
4775 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
4776 if (UI.getUse().getSDValue().getResNo() == Value)
4783 /// isOnlyUserOf - Return true if this node is the only use of N.
4785 bool SDNode::isOnlyUserOf(SDNode *N) const {
4787 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
4798 /// isOperand - Return true if this node is an operand of N.
4800 bool SDValue::isOperandOf(SDNode *N) const {
4801 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
4802 if (*this == N->getOperand(i))
4807 bool SDNode::isOperandOf(SDNode *N) const {
4808 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
4809 if (this == N->OperandList[i].getVal())
4814 /// reachesChainWithoutSideEffects - Return true if this operand (which must
4815 /// be a chain) reaches the specified operand without crossing any
4816 /// side-effecting instructions. In practice, this looks through token
4817 /// factors and non-volatile loads. In order to remain efficient, this only
4818 /// looks a couple of nodes in, it does not do an exhaustive search.
4819 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
4820 unsigned Depth) const {
4821 if (*this == Dest) return true;
4823 // Don't search too deeply, we just want to be able to see through
4824 // TokenFactor's etc.
4825 if (Depth == 0) return false;
4827 // If this is a token factor, all inputs to the TF happen in parallel. If any
4828 // of the operands of the TF reach dest, then we can do the xform.
4829 if (getOpcode() == ISD::TokenFactor) {
4830 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
4831 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
4836 // Loads don't have side effects, look through them.
4837 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
4838 if (!Ld->isVolatile())
4839 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
4845 static void findPredecessor(SDNode *N, const SDNode *P, bool &found,
4846 SmallPtrSet<SDNode *, 32> &Visited) {
4847 if (found || !Visited.insert(N))
4850 for (unsigned i = 0, e = N->getNumOperands(); !found && i != e; ++i) {
4851 SDNode *Op = N->getOperand(i).getNode();
4856 findPredecessor(Op, P, found, Visited);
4860 /// isPredecessorOf - Return true if this node is a predecessor of N. This node
4861 /// is either an operand of N or it can be reached by recursively traversing
4862 /// up the operands.
4863 /// NOTE: this is an expensive method. Use it carefully.
4864 bool SDNode::isPredecessorOf(SDNode *N) const {
4865 SmallPtrSet<SDNode *, 32> Visited;
4867 findPredecessor(N, this, found, Visited);
4871 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
4872 assert(Num < NumOperands && "Invalid child # of SDNode!");
4873 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
4876 std::string SDNode::getOperationName(const SelectionDAG *G) const {
4877 switch (getOpcode()) {
4879 if (getOpcode() < ISD::BUILTIN_OP_END)
4880 return "<<Unknown DAG Node>>";
4881 if (isMachineOpcode()) {
4883 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo())
4884 if (getMachineOpcode() < TII->getNumOpcodes())
4885 return TII->get(getMachineOpcode()).getName();
4886 return "<<Unknown Machine Node>>";
4889 TargetLowering &TLI = G->getTargetLoweringInfo();
4890 const char *Name = TLI.getTargetNodeName(getOpcode());
4891 if (Name) return Name;
4892 return "<<Unknown Target Node>>";
4894 return "<<Unknown Node>>";
4897 case ISD::DELETED_NODE:
4898 return "<<Deleted Node!>>";
4900 case ISD::PREFETCH: return "Prefetch";
4901 case ISD::MEMBARRIER: return "MemBarrier";
4902 case ISD::ATOMIC_CMP_SWAP_8: return "AtomicCmpSwap8";
4903 case ISD::ATOMIC_SWAP_8: return "AtomicSwap8";
4904 case ISD::ATOMIC_LOAD_ADD_8: return "AtomicLoadAdd8";
4905 case ISD::ATOMIC_LOAD_SUB_8: return "AtomicLoadSub8";
4906 case ISD::ATOMIC_LOAD_AND_8: return "AtomicLoadAnd8";
4907 case ISD::ATOMIC_LOAD_OR_8: return "AtomicLoadOr8";
4908 case ISD::ATOMIC_LOAD_XOR_8: return "AtomicLoadXor8";
4909 case ISD::ATOMIC_LOAD_NAND_8: return "AtomicLoadNand8";
4910 case ISD::ATOMIC_LOAD_MIN_8: return "AtomicLoadMin8";
4911 case ISD::ATOMIC_LOAD_MAX_8: return "AtomicLoadMax8";
4912 case ISD::ATOMIC_LOAD_UMIN_8: return "AtomicLoadUMin8";
4913 case ISD::ATOMIC_LOAD_UMAX_8: return "AtomicLoadUMax8";
4914 case ISD::ATOMIC_CMP_SWAP_16: return "AtomicCmpSwap16";
4915 case ISD::ATOMIC_SWAP_16: return "AtomicSwap16";
4916 case ISD::ATOMIC_LOAD_ADD_16: return "AtomicLoadAdd16";
4917 case ISD::ATOMIC_LOAD_SUB_16: return "AtomicLoadSub16";
4918 case ISD::ATOMIC_LOAD_AND_16: return "AtomicLoadAnd16";
4919 case ISD::ATOMIC_LOAD_OR_16: return "AtomicLoadOr16";
4920 case ISD::ATOMIC_LOAD_XOR_16: return "AtomicLoadXor16";
4921 case ISD::ATOMIC_LOAD_NAND_16: return "AtomicLoadNand16";
4922 case ISD::ATOMIC_LOAD_MIN_16: return "AtomicLoadMin16";
4923 case ISD::ATOMIC_LOAD_MAX_16: return "AtomicLoadMax16";
4924 case ISD::ATOMIC_LOAD_UMIN_16: return "AtomicLoadUMin16";
4925 case ISD::ATOMIC_LOAD_UMAX_16: return "AtomicLoadUMax16";
4926 case ISD::ATOMIC_CMP_SWAP_32: return "AtomicCmpSwap32";
4927 case ISD::ATOMIC_SWAP_32: return "AtomicSwap32";
4928 case ISD::ATOMIC_LOAD_ADD_32: return "AtomicLoadAdd32";
4929 case ISD::ATOMIC_LOAD_SUB_32: return "AtomicLoadSub32";
4930 case ISD::ATOMIC_LOAD_AND_32: return "AtomicLoadAnd32";
4931 case ISD::ATOMIC_LOAD_OR_32: return "AtomicLoadOr32";
4932 case ISD::ATOMIC_LOAD_XOR_32: return "AtomicLoadXor32";
4933 case ISD::ATOMIC_LOAD_NAND_32: return "AtomicLoadNand32";
4934 case ISD::ATOMIC_LOAD_MIN_32: return "AtomicLoadMin32";
4935 case ISD::ATOMIC_LOAD_MAX_32: return "AtomicLoadMax32";
4936 case ISD::ATOMIC_LOAD_UMIN_32: return "AtomicLoadUMin32";
4937 case ISD::ATOMIC_LOAD_UMAX_32: return "AtomicLoadUMax32";
4938 case ISD::ATOMIC_CMP_SWAP_64: return "AtomicCmpSwap64";
4939 case ISD::ATOMIC_SWAP_64: return "AtomicSwap64";
4940 case ISD::ATOMIC_LOAD_ADD_64: return "AtomicLoadAdd64";
4941 case ISD::ATOMIC_LOAD_SUB_64: return "AtomicLoadSub64";
4942 case ISD::ATOMIC_LOAD_AND_64: return "AtomicLoadAnd64";
4943 case ISD::ATOMIC_LOAD_OR_64: return "AtomicLoadOr64";
4944 case ISD::ATOMIC_LOAD_XOR_64: return "AtomicLoadXor64";
4945 case ISD::ATOMIC_LOAD_NAND_64: return "AtomicLoadNand64";
4946 case ISD::ATOMIC_LOAD_MIN_64: return "AtomicLoadMin64";
4947 case ISD::ATOMIC_LOAD_MAX_64: return "AtomicLoadMax64";
4948 case ISD::ATOMIC_LOAD_UMIN_64: return "AtomicLoadUMin64";
4949 case ISD::ATOMIC_LOAD_UMAX_64: return "AtomicLoadUMax64";
4950 case ISD::PCMARKER: return "PCMarker";
4951 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
4952 case ISD::SRCVALUE: return "SrcValue";
4953 case ISD::MEMOPERAND: return "MemOperand";
4954 case ISD::EntryToken: return "EntryToken";
4955 case ISD::TokenFactor: return "TokenFactor";
4956 case ISD::AssertSext: return "AssertSext";
4957 case ISD::AssertZext: return "AssertZext";
4959 case ISD::BasicBlock: return "BasicBlock";
4960 case ISD::ARG_FLAGS: return "ArgFlags";
4961 case ISD::VALUETYPE: return "ValueType";
4962 case ISD::Register: return "Register";
4964 case ISD::Constant: return "Constant";
4965 case ISD::ConstantFP: return "ConstantFP";
4966 case ISD::GlobalAddress: return "GlobalAddress";
4967 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
4968 case ISD::FrameIndex: return "FrameIndex";
4969 case ISD::JumpTable: return "JumpTable";
4970 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
4971 case ISD::RETURNADDR: return "RETURNADDR";
4972 case ISD::FRAMEADDR: return "FRAMEADDR";
4973 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
4974 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR";
4975 case ISD::EHSELECTION: return "EHSELECTION";
4976 case ISD::EH_RETURN: return "EH_RETURN";
4977 case ISD::ConstantPool: return "ConstantPool";
4978 case ISD::ExternalSymbol: return "ExternalSymbol";
4979 case ISD::INTRINSIC_WO_CHAIN: {
4980 unsigned IID = cast<ConstantSDNode>(getOperand(0))->getZExtValue();
4981 return Intrinsic::getName((Intrinsic::ID)IID);
4983 case ISD::INTRINSIC_VOID:
4984 case ISD::INTRINSIC_W_CHAIN: {
4985 unsigned IID = cast<ConstantSDNode>(getOperand(1))->getZExtValue();
4986 return Intrinsic::getName((Intrinsic::ID)IID);
4989 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
4990 case ISD::TargetConstant: return "TargetConstant";
4991 case ISD::TargetConstantFP:return "TargetConstantFP";
4992 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
4993 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
4994 case ISD::TargetFrameIndex: return "TargetFrameIndex";
4995 case ISD::TargetJumpTable: return "TargetJumpTable";
4996 case ISD::TargetConstantPool: return "TargetConstantPool";
4997 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
4999 case ISD::CopyToReg: return "CopyToReg";
5000 case ISD::CopyFromReg: return "CopyFromReg";
5001 case ISD::UNDEF: return "undef";
5002 case ISD::MERGE_VALUES: return "merge_values";
5003 case ISD::INLINEASM: return "inlineasm";
5004 case ISD::DBG_LABEL: return "dbg_label";
5005 case ISD::EH_LABEL: return "eh_label";
5006 case ISD::DECLARE: return "declare";
5007 case ISD::HANDLENODE: return "handlenode";
5008 case ISD::FORMAL_ARGUMENTS: return "formal_arguments";
5009 case ISD::CALL: return "call";
5012 case ISD::FABS: return "fabs";
5013 case ISD::FNEG: return "fneg";
5014 case ISD::FSQRT: return "fsqrt";
5015 case ISD::FSIN: return "fsin";
5016 case ISD::FCOS: return "fcos";
5017 case ISD::FPOWI: return "fpowi";
5018 case ISD::FPOW: return "fpow";
5019 case ISD::FTRUNC: return "ftrunc";
5020 case ISD::FFLOOR: return "ffloor";
5021 case ISD::FCEIL: return "fceil";
5022 case ISD::FRINT: return "frint";
5023 case ISD::FNEARBYINT: return "fnearbyint";
5026 case ISD::ADD: return "add";
5027 case ISD::SUB: return "sub";
5028 case ISD::MUL: return "mul";
5029 case ISD::MULHU: return "mulhu";
5030 case ISD::MULHS: return "mulhs";
5031 case ISD::SDIV: return "sdiv";
5032 case ISD::UDIV: return "udiv";
5033 case ISD::SREM: return "srem";
5034 case ISD::UREM: return "urem";
5035 case ISD::SMUL_LOHI: return "smul_lohi";
5036 case ISD::UMUL_LOHI: return "umul_lohi";
5037 case ISD::SDIVREM: return "sdivrem";
5038 case ISD::UDIVREM: return "udivrem";
5039 case ISD::AND: return "and";
5040 case ISD::OR: return "or";
5041 case ISD::XOR: return "xor";
5042 case ISD::SHL: return "shl";
5043 case ISD::SRA: return "sra";
5044 case ISD::SRL: return "srl";
5045 case ISD::ROTL: return "rotl";
5046 case ISD::ROTR: return "rotr";
5047 case ISD::FADD: return "fadd";
5048 case ISD::FSUB: return "fsub";
5049 case ISD::FMUL: return "fmul";
5050 case ISD::FDIV: return "fdiv";
5051 case ISD::FREM: return "frem";
5052 case ISD::FCOPYSIGN: return "fcopysign";
5053 case ISD::FGETSIGN: return "fgetsign";
5055 case ISD::SETCC: return "setcc";
5056 case ISD::VSETCC: return "vsetcc";
5057 case ISD::SELECT: return "select";
5058 case ISD::SELECT_CC: return "select_cc";
5059 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
5060 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
5061 case ISD::CONCAT_VECTORS: return "concat_vectors";
5062 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
5063 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
5064 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
5065 case ISD::CARRY_FALSE: return "carry_false";
5066 case ISD::ADDC: return "addc";
5067 case ISD::ADDE: return "adde";
5068 case ISD::SUBC: return "subc";
5069 case ISD::SUBE: return "sube";
5070 case ISD::SHL_PARTS: return "shl_parts";
5071 case ISD::SRA_PARTS: return "sra_parts";
5072 case ISD::SRL_PARTS: return "srl_parts";
5074 case ISD::EXTRACT_SUBREG: return "extract_subreg";
5075 case ISD::INSERT_SUBREG: return "insert_subreg";
5077 // Conversion operators.
5078 case ISD::SIGN_EXTEND: return "sign_extend";
5079 case ISD::ZERO_EXTEND: return "zero_extend";
5080 case ISD::ANY_EXTEND: return "any_extend";
5081 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
5082 case ISD::TRUNCATE: return "truncate";
5083 case ISD::FP_ROUND: return "fp_round";
5084 case ISD::FLT_ROUNDS_: return "flt_rounds";
5085 case ISD::FP_ROUND_INREG: return "fp_round_inreg";
5086 case ISD::FP_EXTEND: return "fp_extend";
5088 case ISD::SINT_TO_FP: return "sint_to_fp";
5089 case ISD::UINT_TO_FP: return "uint_to_fp";
5090 case ISD::FP_TO_SINT: return "fp_to_sint";
5091 case ISD::FP_TO_UINT: return "fp_to_uint";
5092 case ISD::BIT_CONVERT: return "bit_convert";
5094 // Control flow instructions
5095 case ISD::BR: return "br";
5096 case ISD::BRIND: return "brind";
5097 case ISD::BR_JT: return "br_jt";
5098 case ISD::BRCOND: return "brcond";
5099 case ISD::BR_CC: return "br_cc";
5100 case ISD::RET: return "ret";
5101 case ISD::CALLSEQ_START: return "callseq_start";
5102 case ISD::CALLSEQ_END: return "callseq_end";
5105 case ISD::LOAD: return "load";
5106 case ISD::STORE: return "store";
5107 case ISD::VAARG: return "vaarg";
5108 case ISD::VACOPY: return "vacopy";
5109 case ISD::VAEND: return "vaend";
5110 case ISD::VASTART: return "vastart";
5111 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
5112 case ISD::EXTRACT_ELEMENT: return "extract_element";
5113 case ISD::BUILD_PAIR: return "build_pair";
5114 case ISD::STACKSAVE: return "stacksave";
5115 case ISD::STACKRESTORE: return "stackrestore";
5116 case ISD::TRAP: return "trap";
5119 case ISD::BSWAP: return "bswap";
5120 case ISD::CTPOP: return "ctpop";
5121 case ISD::CTTZ: return "cttz";
5122 case ISD::CTLZ: return "ctlz";
5125 case ISD::DBG_STOPPOINT: return "dbg_stoppoint";
5126 case ISD::DEBUG_LOC: return "debug_loc";
5129 case ISD::TRAMPOLINE: return "trampoline";
5132 switch (cast<CondCodeSDNode>(this)->get()) {
5133 default: assert(0 && "Unknown setcc condition!");
5134 case ISD::SETOEQ: return "setoeq";
5135 case ISD::SETOGT: return "setogt";
5136 case ISD::SETOGE: return "setoge";
5137 case ISD::SETOLT: return "setolt";
5138 case ISD::SETOLE: return "setole";
5139 case ISD::SETONE: return "setone";
5141 case ISD::SETO: return "seto";
5142 case ISD::SETUO: return "setuo";
5143 case ISD::SETUEQ: return "setue";
5144 case ISD::SETUGT: return "setugt";
5145 case ISD::SETUGE: return "setuge";
5146 case ISD::SETULT: return "setult";
5147 case ISD::SETULE: return "setule";
5148 case ISD::SETUNE: return "setune";
5150 case ISD::SETEQ: return "seteq";
5151 case ISD::SETGT: return "setgt";
5152 case ISD::SETGE: return "setge";
5153 case ISD::SETLT: return "setlt";
5154 case ISD::SETLE: return "setle";
5155 case ISD::SETNE: return "setne";
5160 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
5169 return "<post-inc>";
5171 return "<post-dec>";
5175 std::string ISD::ArgFlagsTy::getArgFlagsString() {
5176 std::string S = "< ";
5190 if (getByValAlign())
5191 S += "byval-align:" + utostr(getByValAlign()) + " ";
5193 S += "orig-align:" + utostr(getOrigAlign()) + " ";
5195 S += "byval-size:" + utostr(getByValSize()) + " ";
5199 void SDNode::dump() const { dump(0); }
5200 void SDNode::dump(const SelectionDAG *G) const {
5205 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
5206 OS << (void*)this << ": ";
5208 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
5210 if (getValueType(i) == MVT::Other)
5213 OS << getValueType(i).getMVTString();
5215 OS << " = " << getOperationName(G);
5218 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
5220 OS << (void*)getOperand(i).getNode();
5221 if (unsigned RN = getOperand(i).getResNo())
5225 if (!isTargetOpcode() && getOpcode() == ISD::VECTOR_SHUFFLE) {
5226 SDNode *Mask = getOperand(2).getNode();
5228 for (unsigned i = 0, e = Mask->getNumOperands(); i != e; ++i) {
5230 if (Mask->getOperand(i).getOpcode() == ISD::UNDEF)
5233 OS << cast<ConstantSDNode>(Mask->getOperand(i))->getZExtValue();
5238 if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
5239 OS << '<' << CSDN->getAPIntValue() << '>';
5240 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
5241 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle)
5242 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
5243 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble)
5244 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
5247 CSDN->getValueAPF().convertToAPInt().dump();
5250 } else if (const GlobalAddressSDNode *GADN =
5251 dyn_cast<GlobalAddressSDNode>(this)) {
5252 int offset = GADN->getOffset();
5254 WriteAsOperand(OS, GADN->getGlobal());
5257 OS << " + " << offset;
5259 OS << " " << offset;
5260 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
5261 OS << "<" << FIDN->getIndex() << ">";
5262 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
5263 OS << "<" << JTDN->getIndex() << ">";
5264 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
5265 int offset = CP->getOffset();
5266 if (CP->isMachineConstantPoolEntry())
5267 OS << "<" << *CP->getMachineCPVal() << ">";
5269 OS << "<" << *CP->getConstVal() << ">";
5271 OS << " + " << offset;
5273 OS << " " << offset;
5274 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
5276 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
5278 OS << LBB->getName() << " ";
5279 OS << (const void*)BBDN->getBasicBlock() << ">";
5280 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
5281 if (G && R->getReg() &&
5282 TargetRegisterInfo::isPhysicalRegister(R->getReg())) {
5283 OS << " " << G->getTarget().getRegisterInfo()->getName(R->getReg());
5285 OS << " #" << R->getReg();
5287 } else if (const ExternalSymbolSDNode *ES =
5288 dyn_cast<ExternalSymbolSDNode>(this)) {
5289 OS << "'" << ES->getSymbol() << "'";
5290 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
5292 OS << "<" << M->getValue() << ">";
5295 } else if (const MemOperandSDNode *M = dyn_cast<MemOperandSDNode>(this)) {
5296 if (M->MO.getValue())
5297 OS << "<" << M->MO.getValue() << ":" << M->MO.getOffset() << ">";
5299 OS << "<null:" << M->MO.getOffset() << ">";
5300 } else if (const ARG_FLAGSSDNode *N = dyn_cast<ARG_FLAGSSDNode>(this)) {
5301 OS << N->getArgFlags().getArgFlagsString();
5302 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
5303 OS << ":" << N->getVT().getMVTString();
5305 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
5306 const Value *SrcValue = LD->getSrcValue();
5307 int SrcOffset = LD->getSrcValueOffset();
5313 OS << ":" << SrcOffset << ">";
5316 switch (LD->getExtensionType()) {
5317 default: doExt = false; break;
5318 case ISD::EXTLOAD: OS << " <anyext "; break;
5319 case ISD::SEXTLOAD: OS << " <sext "; break;
5320 case ISD::ZEXTLOAD: OS << " <zext "; break;
5323 OS << LD->getMemoryVT().getMVTString() << ">";
5325 const char *AM = getIndexedModeName(LD->getAddressingMode());
5328 if (LD->isVolatile())
5329 OS << " <volatile>";
5330 OS << " alignment=" << LD->getAlignment();
5331 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
5332 const Value *SrcValue = ST->getSrcValue();
5333 int SrcOffset = ST->getSrcValueOffset();
5339 OS << ":" << SrcOffset << ">";
5341 if (ST->isTruncatingStore())
5342 OS << " <trunc " << ST->getMemoryVT().getMVTString() << ">";
5344 const char *AM = getIndexedModeName(ST->getAddressingMode());
5347 if (ST->isVolatile())
5348 OS << " <volatile>";
5349 OS << " alignment=" << ST->getAlignment();
5350 } else if (const AtomicSDNode* AT = dyn_cast<AtomicSDNode>(this)) {
5351 const Value *SrcValue = AT->getSrcValue();
5352 int SrcOffset = AT->getSrcValueOffset();
5358 OS << ":" << SrcOffset << ">";
5359 if (AT->isVolatile())
5360 OS << " <volatile>";
5361 OS << " alignment=" << AT->getAlignment();
5365 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
5366 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5367 if (N->getOperand(i).getNode()->hasOneUse())
5368 DumpNodes(N->getOperand(i).getNode(), indent+2, G);
5370 cerr << "\n" << std::string(indent+2, ' ')
5371 << (void*)N->getOperand(i).getNode() << ": <multiple use>";
5374 cerr << "\n" << std::string(indent, ' ');
5378 void SelectionDAG::dump() const {
5379 cerr << "SelectionDAG has " << AllNodes.size() << " nodes:";
5381 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end();
5383 const SDNode *N = I;
5384 if (!N->hasOneUse() && N != getRoot().getNode())
5385 DumpNodes(N, 2, this);
5388 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
5393 const Type *ConstantPoolSDNode::getType() const {
5394 if (isMachineConstantPoolEntry())
5395 return Val.MachineCPVal->getType();
5396 return Val.ConstVal->getType();