1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "SDNodeDbgValue.h"
16 #include "llvm/ADT/SetVector.h"
17 #include "llvm/ADT/SmallPtrSet.h"
18 #include "llvm/ADT/SmallSet.h"
19 #include "llvm/ADT/SmallVector.h"
20 #include "llvm/ADT/StringExtras.h"
21 #include "llvm/Analysis/ValueTracking.h"
22 #include "llvm/CodeGen/MachineBasicBlock.h"
23 #include "llvm/CodeGen/MachineConstantPool.h"
24 #include "llvm/CodeGen/MachineFrameInfo.h"
25 #include "llvm/CodeGen/MachineModuleInfo.h"
26 #include "llvm/IR/CallingConv.h"
27 #include "llvm/IR/Constants.h"
28 #include "llvm/IR/DataLayout.h"
29 #include "llvm/IR/DebugInfo.h"
30 #include "llvm/IR/DerivedTypes.h"
31 #include "llvm/IR/Function.h"
32 #include "llvm/IR/GlobalAlias.h"
33 #include "llvm/IR/GlobalVariable.h"
34 #include "llvm/IR/Intrinsics.h"
35 #include "llvm/Support/CommandLine.h"
36 #include "llvm/Support/Debug.h"
37 #include "llvm/Support/ErrorHandling.h"
38 #include "llvm/Support/ManagedStatic.h"
39 #include "llvm/Support/MathExtras.h"
40 #include "llvm/Support/Mutex.h"
41 #include "llvm/Support/raw_ostream.h"
42 #include "llvm/Target/TargetInstrInfo.h"
43 #include "llvm/Target/TargetIntrinsicInfo.h"
44 #include "llvm/Target/TargetLowering.h"
45 #include "llvm/Target/TargetMachine.h"
46 #include "llvm/Target/TargetOptions.h"
47 #include "llvm/Target/TargetRegisterInfo.h"
48 #include "llvm/Target/TargetSelectionDAGInfo.h"
49 #include "llvm/Target/TargetSubtargetInfo.h"
55 /// makeVTList - Return an instance of the SDVTList struct initialized with the
56 /// specified members.
57 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
58 SDVTList Res = {VTs, NumVTs};
62 // Default null implementations of the callbacks.
63 void SelectionDAG::DAGUpdateListener::NodeDeleted(SDNode*, SDNode*) {}
64 void SelectionDAG::DAGUpdateListener::NodeUpdated(SDNode*) {}
66 //===----------------------------------------------------------------------===//
67 // ConstantFPSDNode Class
68 //===----------------------------------------------------------------------===//
70 /// isExactlyValue - We don't rely on operator== working on double values, as
71 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
72 /// As such, this method can be used to do an exact bit-for-bit comparison of
73 /// two floating point values.
74 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
75 return getValueAPF().bitwiseIsEqual(V);
78 bool ConstantFPSDNode::isValueValidForType(EVT VT,
80 assert(VT.isFloatingPoint() && "Can only convert between FP types");
82 // convert modifies in place, so make a copy.
83 APFloat Val2 = APFloat(Val);
85 (void) Val2.convert(SelectionDAG::EVTToAPFloatSemantics(VT),
86 APFloat::rmNearestTiesToEven,
91 //===----------------------------------------------------------------------===//
93 //===----------------------------------------------------------------------===//
95 /// isBuildVectorAllOnes - Return true if the specified node is a
96 /// BUILD_VECTOR where all of the elements are ~0 or undef.
97 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
98 // Look through a bit convert.
99 while (N->getOpcode() == ISD::BITCAST)
100 N = N->getOperand(0).getNode();
102 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
104 unsigned i = 0, e = N->getNumOperands();
106 // Skip over all of the undef values.
107 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
110 // Do not accept an all-undef vector.
111 if (i == e) return false;
113 // Do not accept build_vectors that aren't all constants or which have non-~0
114 // elements. We have to be a bit careful here, as the type of the constant
115 // may not be the same as the type of the vector elements due to type
116 // legalization (the elements are promoted to a legal type for the target and
117 // a vector of a type may be legal when the base element type is not).
118 // We only want to check enough bits to cover the vector elements, because
119 // we care if the resultant vector is all ones, not whether the individual
121 SDValue NotZero = N->getOperand(i);
122 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits();
123 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(NotZero)) {
124 if (CN->getAPIntValue().countTrailingOnes() < EltSize)
126 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(NotZero)) {
127 if (CFPN->getValueAPF().bitcastToAPInt().countTrailingOnes() < EltSize)
132 // Okay, we have at least one ~0 value, check to see if the rest match or are
133 // undefs. Even with the above element type twiddling, this should be OK, as
134 // the same type legalization should have applied to all the elements.
135 for (++i; i != e; ++i)
136 if (N->getOperand(i) != NotZero &&
137 N->getOperand(i).getOpcode() != ISD::UNDEF)
143 /// isBuildVectorAllZeros - Return true if the specified node is a
144 /// BUILD_VECTOR where all of the elements are 0 or undef.
145 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
146 // Look through a bit convert.
147 while (N->getOpcode() == ISD::BITCAST)
148 N = N->getOperand(0).getNode();
150 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
152 bool IsAllUndef = true;
153 for (unsigned i = 0, e = N->getNumOperands(); i < e; ++i) {
154 if (N->getOperand(i).getOpcode() == ISD::UNDEF)
157 // Do not accept build_vectors that aren't all constants or which have non-0
158 // elements. We have to be a bit careful here, as the type of the constant
159 // may not be the same as the type of the vector elements due to type
160 // legalization (the elements are promoted to a legal type for the target
161 // and a vector of a type may be legal when the base element type is not).
162 // We only want to check enough bits to cover the vector elements, because
163 // we care if the resultant vector is all zeros, not whether the individual
165 SDValue Zero = N->getOperand(i);
166 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits();
167 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Zero)) {
168 if (CN->getAPIntValue().countTrailingZeros() < EltSize)
170 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(Zero)) {
171 if (CFPN->getValueAPF().bitcastToAPInt().countTrailingZeros() < EltSize)
177 // Do not accept an all-undef vector.
183 /// \brief Return true if the specified node is a BUILD_VECTOR node of
184 /// all ConstantSDNode or undef.
185 bool ISD::isBuildVectorOfConstantSDNodes(const SDNode *N) {
186 if (N->getOpcode() != ISD::BUILD_VECTOR)
189 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
190 SDValue Op = N->getOperand(i);
191 if (Op.getOpcode() == ISD::UNDEF)
193 if (!isa<ConstantSDNode>(Op))
199 /// isScalarToVector - Return true if the specified node is a
200 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
201 /// element is not an undef.
202 bool ISD::isScalarToVector(const SDNode *N) {
203 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
206 if (N->getOpcode() != ISD::BUILD_VECTOR)
208 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
210 unsigned NumElems = N->getNumOperands();
213 for (unsigned i = 1; i < NumElems; ++i) {
214 SDValue V = N->getOperand(i);
215 if (V.getOpcode() != ISD::UNDEF)
221 /// allOperandsUndef - Return true if the node has at least one operand
222 /// and all operands of the specified node are ISD::UNDEF.
223 bool ISD::allOperandsUndef(const SDNode *N) {
224 // Return false if the node has no operands.
225 // This is "logically inconsistent" with the definition of "all" but
226 // is probably the desired behavior.
227 if (N->getNumOperands() == 0)
230 for (unsigned i = 0, e = N->getNumOperands(); i != e ; ++i)
231 if (N->getOperand(i).getOpcode() != ISD::UNDEF)
237 ISD::NodeType ISD::getExtForLoadExtType(bool IsFP, ISD::LoadExtType ExtType) {
240 return IsFP ? ISD::FP_EXTEND : ISD::ANY_EXTEND;
242 return ISD::SIGN_EXTEND;
244 return ISD::ZERO_EXTEND;
249 llvm_unreachable("Invalid LoadExtType");
252 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
253 /// when given the operation for (X op Y).
254 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
255 // To perform this operation, we just need to swap the L and G bits of the
257 unsigned OldL = (Operation >> 2) & 1;
258 unsigned OldG = (Operation >> 1) & 1;
259 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
260 (OldL << 1) | // New G bit
261 (OldG << 2)); // New L bit.
264 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
265 /// 'op' is a valid SetCC operation.
266 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
267 unsigned Operation = Op;
269 Operation ^= 7; // Flip L, G, E bits, but not U.
271 Operation ^= 15; // Flip all of the condition bits.
273 if (Operation > ISD::SETTRUE2)
274 Operation &= ~8; // Don't let N and U bits get set.
276 return ISD::CondCode(Operation);
280 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
281 /// signed operation and 2 if the result is an unsigned comparison. Return zero
282 /// if the operation does not depend on the sign of the input (setne and seteq).
283 static int isSignedOp(ISD::CondCode Opcode) {
285 default: llvm_unreachable("Illegal integer setcc operation!");
287 case ISD::SETNE: return 0;
291 case ISD::SETGE: return 1;
295 case ISD::SETUGE: return 2;
299 /// getSetCCOrOperation - Return the result of a logical OR between different
300 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
301 /// returns SETCC_INVALID if it is not possible to represent the resultant
303 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
305 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
306 // Cannot fold a signed integer setcc with an unsigned integer setcc.
307 return ISD::SETCC_INVALID;
309 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
311 // If the N and U bits get set then the resultant comparison DOES suddenly
312 // care about orderedness, and is true when ordered.
313 if (Op > ISD::SETTRUE2)
314 Op &= ~16; // Clear the U bit if the N bit is set.
316 // Canonicalize illegal integer setcc's.
317 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
320 return ISD::CondCode(Op);
323 /// getSetCCAndOperation - Return the result of a logical AND between different
324 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
325 /// function returns zero if it is not possible to represent the resultant
327 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
329 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
330 // Cannot fold a signed setcc with an unsigned setcc.
331 return ISD::SETCC_INVALID;
333 // Combine all of the condition bits.
334 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
336 // Canonicalize illegal integer setcc's.
340 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
341 case ISD::SETOEQ: // SETEQ & SETU[LG]E
342 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
343 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
344 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
351 //===----------------------------------------------------------------------===//
352 // SDNode Profile Support
353 //===----------------------------------------------------------------------===//
355 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
357 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
361 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
362 /// solely with their pointer.
363 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
364 ID.AddPointer(VTList.VTs);
367 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
369 static void AddNodeIDOperands(FoldingSetNodeID &ID,
370 ArrayRef<SDValue> Ops) {
371 for (auto& Op : Ops) {
372 ID.AddPointer(Op.getNode());
373 ID.AddInteger(Op.getResNo());
377 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
379 static void AddNodeIDOperands(FoldingSetNodeID &ID,
380 ArrayRef<SDUse> Ops) {
381 for (auto& Op : Ops) {
382 ID.AddPointer(Op.getNode());
383 ID.AddInteger(Op.getResNo());
387 static void AddBinaryNodeIDCustom(FoldingSetNodeID &ID, bool nuw, bool nsw,
391 ID.AddBoolean(exact);
394 /// AddBinaryNodeIDCustom - Add BinarySDNodes special infos
395 static void AddBinaryNodeIDCustom(FoldingSetNodeID &ID, unsigned Opcode,
396 bool nuw, bool nsw, bool exact) {
397 if (isBinOpWithFlags(Opcode))
398 AddBinaryNodeIDCustom(ID, nuw, nsw, exact);
401 static void AddNodeIDNode(FoldingSetNodeID &ID, unsigned short OpC,
402 SDVTList VTList, ArrayRef<SDValue> OpList) {
403 AddNodeIDOpcode(ID, OpC);
404 AddNodeIDValueTypes(ID, VTList);
405 AddNodeIDOperands(ID, OpList);
408 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
410 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
411 switch (N->getOpcode()) {
412 case ISD::TargetExternalSymbol:
413 case ISD::ExternalSymbol:
414 llvm_unreachable("Should only be used on nodes with operands");
415 default: break; // Normal nodes don't need extra info.
416 case ISD::TargetConstant:
417 case ISD::Constant: {
418 const ConstantSDNode *C = cast<ConstantSDNode>(N);
419 ID.AddPointer(C->getConstantIntValue());
420 ID.AddBoolean(C->isOpaque());
423 case ISD::TargetConstantFP:
424 case ISD::ConstantFP: {
425 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
428 case ISD::TargetGlobalAddress:
429 case ISD::GlobalAddress:
430 case ISD::TargetGlobalTLSAddress:
431 case ISD::GlobalTLSAddress: {
432 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
433 ID.AddPointer(GA->getGlobal());
434 ID.AddInteger(GA->getOffset());
435 ID.AddInteger(GA->getTargetFlags());
436 ID.AddInteger(GA->getAddressSpace());
439 case ISD::BasicBlock:
440 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
443 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
445 case ISD::RegisterMask:
446 ID.AddPointer(cast<RegisterMaskSDNode>(N)->getRegMask());
449 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
451 case ISD::FrameIndex:
452 case ISD::TargetFrameIndex:
453 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
456 case ISD::TargetJumpTable:
457 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
458 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
460 case ISD::ConstantPool:
461 case ISD::TargetConstantPool: {
462 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
463 ID.AddInteger(CP->getAlignment());
464 ID.AddInteger(CP->getOffset());
465 if (CP->isMachineConstantPoolEntry())
466 CP->getMachineCPVal()->addSelectionDAGCSEId(ID);
468 ID.AddPointer(CP->getConstVal());
469 ID.AddInteger(CP->getTargetFlags());
472 case ISD::TargetIndex: {
473 const TargetIndexSDNode *TI = cast<TargetIndexSDNode>(N);
474 ID.AddInteger(TI->getIndex());
475 ID.AddInteger(TI->getOffset());
476 ID.AddInteger(TI->getTargetFlags());
480 const LoadSDNode *LD = cast<LoadSDNode>(N);
481 ID.AddInteger(LD->getMemoryVT().getRawBits());
482 ID.AddInteger(LD->getRawSubclassData());
483 ID.AddInteger(LD->getPointerInfo().getAddrSpace());
487 const StoreSDNode *ST = cast<StoreSDNode>(N);
488 ID.AddInteger(ST->getMemoryVT().getRawBits());
489 ID.AddInteger(ST->getRawSubclassData());
490 ID.AddInteger(ST->getPointerInfo().getAddrSpace());
501 const BinaryWithFlagsSDNode *BinNode = cast<BinaryWithFlagsSDNode>(N);
502 AddBinaryNodeIDCustom(ID, N->getOpcode(), BinNode->hasNoUnsignedWrap(),
503 BinNode->hasNoSignedWrap(), BinNode->isExact());
506 case ISD::ATOMIC_CMP_SWAP:
507 case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS:
508 case ISD::ATOMIC_SWAP:
509 case ISD::ATOMIC_LOAD_ADD:
510 case ISD::ATOMIC_LOAD_SUB:
511 case ISD::ATOMIC_LOAD_AND:
512 case ISD::ATOMIC_LOAD_OR:
513 case ISD::ATOMIC_LOAD_XOR:
514 case ISD::ATOMIC_LOAD_NAND:
515 case ISD::ATOMIC_LOAD_MIN:
516 case ISD::ATOMIC_LOAD_MAX:
517 case ISD::ATOMIC_LOAD_UMIN:
518 case ISD::ATOMIC_LOAD_UMAX:
519 case ISD::ATOMIC_LOAD:
520 case ISD::ATOMIC_STORE: {
521 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
522 ID.AddInteger(AT->getMemoryVT().getRawBits());
523 ID.AddInteger(AT->getRawSubclassData());
524 ID.AddInteger(AT->getPointerInfo().getAddrSpace());
527 case ISD::PREFETCH: {
528 const MemSDNode *PF = cast<MemSDNode>(N);
529 ID.AddInteger(PF->getPointerInfo().getAddrSpace());
532 case ISD::VECTOR_SHUFFLE: {
533 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
534 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
536 ID.AddInteger(SVN->getMaskElt(i));
539 case ISD::TargetBlockAddress:
540 case ISD::BlockAddress: {
541 const BlockAddressSDNode *BA = cast<BlockAddressSDNode>(N);
542 ID.AddPointer(BA->getBlockAddress());
543 ID.AddInteger(BA->getOffset());
544 ID.AddInteger(BA->getTargetFlags());
547 } // end switch (N->getOpcode())
549 // Target specific memory nodes could also have address spaces to check.
550 if (N->isTargetMemoryOpcode())
551 ID.AddInteger(cast<MemSDNode>(N)->getPointerInfo().getAddrSpace());
554 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
556 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
557 AddNodeIDOpcode(ID, N->getOpcode());
558 // Add the return value info.
559 AddNodeIDValueTypes(ID, N->getVTList());
560 // Add the operand info.
561 AddNodeIDOperands(ID, N->ops());
563 // Handle SDNode leafs with special info.
564 AddNodeIDCustom(ID, N);
567 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
568 /// the CSE map that carries volatility, temporalness, indexing mode, and
569 /// extension/truncation information.
571 static inline unsigned
572 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile,
573 bool isNonTemporal, bool isInvariant) {
574 assert((ConvType & 3) == ConvType &&
575 "ConvType may not require more than 2 bits!");
576 assert((AM & 7) == AM &&
577 "AM may not require more than 3 bits!");
581 (isNonTemporal << 6) |
585 //===----------------------------------------------------------------------===//
586 // SelectionDAG Class
587 //===----------------------------------------------------------------------===//
589 /// doNotCSE - Return true if CSE should not be performed for this node.
590 static bool doNotCSE(SDNode *N) {
591 if (N->getValueType(0) == MVT::Glue)
592 return true; // Never CSE anything that produces a flag.
594 switch (N->getOpcode()) {
596 case ISD::HANDLENODE:
598 return true; // Never CSE these nodes.
601 // Check that remaining values produced are not flags.
602 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
603 if (N->getValueType(i) == MVT::Glue)
604 return true; // Never CSE anything that produces a flag.
609 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
611 void SelectionDAG::RemoveDeadNodes() {
612 // Create a dummy node (which is not added to allnodes), that adds a reference
613 // to the root node, preventing it from being deleted.
614 HandleSDNode Dummy(getRoot());
616 SmallVector<SDNode*, 128> DeadNodes;
618 // Add all obviously-dead nodes to the DeadNodes worklist.
619 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
621 DeadNodes.push_back(I);
623 RemoveDeadNodes(DeadNodes);
625 // If the root changed (e.g. it was a dead load, update the root).
626 setRoot(Dummy.getValue());
629 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
630 /// given list, and any nodes that become unreachable as a result.
631 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes) {
633 // Process the worklist, deleting the nodes and adding their uses to the
635 while (!DeadNodes.empty()) {
636 SDNode *N = DeadNodes.pop_back_val();
638 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
639 DUL->NodeDeleted(N, nullptr);
641 // Take the node out of the appropriate CSE map.
642 RemoveNodeFromCSEMaps(N);
644 // Next, brutally remove the operand list. This is safe to do, as there are
645 // no cycles in the graph.
646 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
648 SDNode *Operand = Use.getNode();
651 // Now that we removed this operand, see if there are no uses of it left.
652 if (Operand->use_empty())
653 DeadNodes.push_back(Operand);
660 void SelectionDAG::RemoveDeadNode(SDNode *N){
661 SmallVector<SDNode*, 16> DeadNodes(1, N);
663 // Create a dummy node that adds a reference to the root node, preventing
664 // it from being deleted. (This matters if the root is an operand of the
666 HandleSDNode Dummy(getRoot());
668 RemoveDeadNodes(DeadNodes);
671 void SelectionDAG::DeleteNode(SDNode *N) {
672 // First take this out of the appropriate CSE map.
673 RemoveNodeFromCSEMaps(N);
675 // Finally, remove uses due to operands of this node, remove from the
676 // AllNodes list, and delete the node.
677 DeleteNodeNotInCSEMaps(N);
680 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
681 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
682 assert(N->use_empty() && "Cannot delete a node that is not dead!");
684 // Drop all of the operands and decrement used node's use counts.
690 void SDDbgInfo::erase(const SDNode *Node) {
691 DbgValMapType::iterator I = DbgValMap.find(Node);
692 if (I == DbgValMap.end())
694 for (auto &Val: I->second)
695 Val->setIsInvalidated();
699 void SelectionDAG::DeallocateNode(SDNode *N) {
700 if (N->OperandsNeedDelete)
701 delete[] N->OperandList;
703 // Set the opcode to DELETED_NODE to help catch bugs when node
704 // memory is reallocated.
705 N->NodeType = ISD::DELETED_NODE;
707 NodeAllocator.Deallocate(AllNodes.remove(N));
709 // If any of the SDDbgValue nodes refer to this SDNode, invalidate
710 // them and forget about that node.
715 /// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid.
716 static void VerifySDNode(SDNode *N) {
717 switch (N->getOpcode()) {
720 case ISD::BUILD_PAIR: {
721 EVT VT = N->getValueType(0);
722 assert(N->getNumValues() == 1 && "Too many results!");
723 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
724 "Wrong return type!");
725 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
726 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
727 "Mismatched operand types!");
728 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
729 "Wrong operand type!");
730 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
731 "Wrong return type size");
734 case ISD::BUILD_VECTOR: {
735 assert(N->getNumValues() == 1 && "Too many results!");
736 assert(N->getValueType(0).isVector() && "Wrong return type!");
737 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
738 "Wrong number of operands!");
739 EVT EltVT = N->getValueType(0).getVectorElementType();
740 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) {
741 assert((I->getValueType() == EltVT ||
742 (EltVT.isInteger() && I->getValueType().isInteger() &&
743 EltVT.bitsLE(I->getValueType()))) &&
744 "Wrong operand type!");
745 assert(I->getValueType() == N->getOperand(0).getValueType() &&
746 "Operands must all have the same type");
754 /// \brief Insert a newly allocated node into the DAG.
756 /// Handles insertion into the all nodes list and CSE map, as well as
757 /// verification and other common operations when a new node is allocated.
758 void SelectionDAG::InsertNode(SDNode *N) {
759 AllNodes.push_back(N);
765 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
766 /// correspond to it. This is useful when we're about to delete or repurpose
767 /// the node. We don't want future request for structurally identical nodes
768 /// to return N anymore.
769 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
771 switch (N->getOpcode()) {
772 case ISD::HANDLENODE: return false; // noop.
774 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
775 "Cond code doesn't exist!");
776 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != nullptr;
777 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = nullptr;
779 case ISD::ExternalSymbol:
780 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
782 case ISD::TargetExternalSymbol: {
783 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
784 Erased = TargetExternalSymbols.erase(
785 std::pair<std::string,unsigned char>(ESN->getSymbol(),
786 ESN->getTargetFlags()));
789 case ISD::VALUETYPE: {
790 EVT VT = cast<VTSDNode>(N)->getVT();
791 if (VT.isExtended()) {
792 Erased = ExtendedValueTypeNodes.erase(VT);
794 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != nullptr;
795 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = nullptr;
800 // Remove it from the CSE Map.
801 assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!");
802 assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!");
803 Erased = CSEMap.RemoveNode(N);
807 // Verify that the node was actually in one of the CSE maps, unless it has a
808 // flag result (which cannot be CSE'd) or is one of the special cases that are
809 // not subject to CSE.
810 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue &&
811 !N->isMachineOpcode() && !doNotCSE(N)) {
814 llvm_unreachable("Node is not in map!");
820 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
821 /// maps and modified in place. Add it back to the CSE maps, unless an identical
822 /// node already exists, in which case transfer all its users to the existing
823 /// node. This transfer can potentially trigger recursive merging.
826 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N) {
827 // For node types that aren't CSE'd, just act as if no identical node
830 SDNode *Existing = CSEMap.GetOrInsertNode(N);
832 // If there was already an existing matching node, use ReplaceAllUsesWith
833 // to replace the dead one with the existing one. This can cause
834 // recursive merging of other unrelated nodes down the line.
835 ReplaceAllUsesWith(N, Existing);
837 // N is now dead. Inform the listeners and delete it.
838 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
839 DUL->NodeDeleted(N, Existing);
840 DeleteNodeNotInCSEMaps(N);
845 // If the node doesn't already exist, we updated it. Inform listeners.
846 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
850 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
851 /// were replaced with those specified. If this node is never memoized,
852 /// return null, otherwise return a pointer to the slot it would take. If a
853 /// node already exists with these operands, the slot will be non-null.
854 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
859 SDValue Ops[] = { Op };
861 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops);
862 AddNodeIDCustom(ID, N);
863 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
867 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
868 /// were replaced with those specified. If this node is never memoized,
869 /// return null, otherwise return a pointer to the slot it would take. If a
870 /// node already exists with these operands, the slot will be non-null.
871 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
872 SDValue Op1, SDValue Op2,
877 SDValue Ops[] = { Op1, Op2 };
879 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops);
880 AddNodeIDCustom(ID, N);
881 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
886 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
887 /// were replaced with those specified. If this node is never memoized,
888 /// return null, otherwise return a pointer to the slot it would take. If a
889 /// node already exists with these operands, the slot will be non-null.
890 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, ArrayRef<SDValue> Ops,
896 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops);
897 AddNodeIDCustom(ID, N);
898 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
902 /// getEVTAlignment - Compute the default alignment value for the
905 unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
906 Type *Ty = VT == MVT::iPTR ?
907 PointerType::get(Type::getInt8Ty(*getContext()), 0) :
908 VT.getTypeForEVT(*getContext());
910 return TLI->getDataLayout()->getABITypeAlignment(Ty);
913 // EntryNode could meaningfully have debug info if we can find it...
914 SelectionDAG::SelectionDAG(const TargetMachine &tm, CodeGenOpt::Level OL)
915 : TM(tm), TSI(nullptr), TLI(nullptr), OptLevel(OL),
916 EntryNode(ISD::EntryToken, 0, DebugLoc(), getVTList(MVT::Other)),
917 Root(getEntryNode()), NewNodesMustHaveLegalTypes(false),
918 UpdateListeners(nullptr) {
919 AllNodes.push_back(&EntryNode);
920 DbgInfo = new SDDbgInfo();
923 void SelectionDAG::init(MachineFunction &mf) {
925 TLI = getSubtarget().getTargetLowering();
926 TSI = getSubtarget().getSelectionDAGInfo();
927 Context = &mf.getFunction()->getContext();
930 SelectionDAG::~SelectionDAG() {
931 assert(!UpdateListeners && "Dangling registered DAGUpdateListeners");
936 void SelectionDAG::allnodes_clear() {
937 assert(&*AllNodes.begin() == &EntryNode);
938 AllNodes.remove(AllNodes.begin());
939 while (!AllNodes.empty())
940 DeallocateNode(AllNodes.begin());
943 BinarySDNode *SelectionDAG::GetBinarySDNode(unsigned Opcode, SDLoc DL,
944 SDVTList VTs, SDValue N1,
945 SDValue N2, bool nuw, bool nsw,
947 if (isBinOpWithFlags(Opcode)) {
948 BinaryWithFlagsSDNode *FN = new (NodeAllocator) BinaryWithFlagsSDNode(
949 Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs, N1, N2);
950 FN->setHasNoUnsignedWrap(nuw);
951 FN->setHasNoSignedWrap(nsw);
952 FN->setIsExact(exact);
957 BinarySDNode *N = new (NodeAllocator)
958 BinarySDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs, N1, N2);
962 void SelectionDAG::clear() {
964 OperandAllocator.Reset();
967 ExtendedValueTypeNodes.clear();
968 ExternalSymbols.clear();
969 TargetExternalSymbols.clear();
970 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
971 static_cast<CondCodeSDNode*>(nullptr));
972 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
973 static_cast<SDNode*>(nullptr));
975 EntryNode.UseList = nullptr;
976 AllNodes.push_back(&EntryNode);
977 Root = getEntryNode();
981 SDValue SelectionDAG::getAnyExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) {
982 return VT.bitsGT(Op.getValueType()) ?
983 getNode(ISD::ANY_EXTEND, DL, VT, Op) :
984 getNode(ISD::TRUNCATE, DL, VT, Op);
987 SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) {
988 return VT.bitsGT(Op.getValueType()) ?
989 getNode(ISD::SIGN_EXTEND, DL, VT, Op) :
990 getNode(ISD::TRUNCATE, DL, VT, Op);
993 SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) {
994 return VT.bitsGT(Op.getValueType()) ?
995 getNode(ISD::ZERO_EXTEND, DL, VT, Op) :
996 getNode(ISD::TRUNCATE, DL, VT, Op);
999 SDValue SelectionDAG::getBoolExtOrTrunc(SDValue Op, SDLoc SL, EVT VT,
1001 if (VT.bitsLE(Op.getValueType()))
1002 return getNode(ISD::TRUNCATE, SL, VT, Op);
1004 TargetLowering::BooleanContent BType = TLI->getBooleanContents(OpVT);
1005 return getNode(TLI->getExtendForContent(BType), SL, VT, Op);
1008 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, SDLoc DL, EVT VT) {
1009 assert(!VT.isVector() &&
1010 "getZeroExtendInReg should use the vector element type instead of "
1011 "the vector type!");
1012 if (Op.getValueType() == VT) return Op;
1013 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1014 APInt Imm = APInt::getLowBitsSet(BitWidth,
1015 VT.getSizeInBits());
1016 return getNode(ISD::AND, DL, Op.getValueType(), Op,
1017 getConstant(Imm, Op.getValueType()));
1020 SDValue SelectionDAG::getAnyExtendVectorInReg(SDValue Op, SDLoc DL, EVT VT) {
1021 assert(VT.isVector() && "This DAG node is restricted to vector types.");
1022 assert(VT.getSizeInBits() == Op.getValueType().getSizeInBits() &&
1023 "The sizes of the input and result must match in order to perform the "
1024 "extend in-register.");
1025 assert(VT.getVectorNumElements() < Op.getValueType().getVectorNumElements() &&
1026 "The destination vector type must have fewer lanes than the input.");
1027 return getNode(ISD::ANY_EXTEND_VECTOR_INREG, DL, VT, Op);
1030 SDValue SelectionDAG::getSignExtendVectorInReg(SDValue Op, SDLoc DL, EVT VT) {
1031 assert(VT.isVector() && "This DAG node is restricted to vector types.");
1032 assert(VT.getSizeInBits() == Op.getValueType().getSizeInBits() &&
1033 "The sizes of the input and result must match in order to perform the "
1034 "extend in-register.");
1035 assert(VT.getVectorNumElements() < Op.getValueType().getVectorNumElements() &&
1036 "The destination vector type must have fewer lanes than the input.");
1037 return getNode(ISD::SIGN_EXTEND_VECTOR_INREG, DL, VT, Op);
1040 SDValue SelectionDAG::getZeroExtendVectorInReg(SDValue Op, SDLoc DL, EVT VT) {
1041 assert(VT.isVector() && "This DAG node is restricted to vector types.");
1042 assert(VT.getSizeInBits() == Op.getValueType().getSizeInBits() &&
1043 "The sizes of the input and result must match in order to perform the "
1044 "extend in-register.");
1045 assert(VT.getVectorNumElements() < Op.getValueType().getVectorNumElements() &&
1046 "The destination vector type must have fewer lanes than the input.");
1047 return getNode(ISD::ZERO_EXTEND_VECTOR_INREG, DL, VT, Op);
1050 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
1052 SDValue SelectionDAG::getNOT(SDLoc DL, SDValue Val, EVT VT) {
1053 EVT EltVT = VT.getScalarType();
1055 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT);
1056 return getNode(ISD::XOR, DL, VT, Val, NegOne);
1059 SDValue SelectionDAG::getLogicalNOT(SDLoc DL, SDValue Val, EVT VT) {
1060 EVT EltVT = VT.getScalarType();
1062 switch (TLI->getBooleanContents(VT)) {
1063 case TargetLowering::ZeroOrOneBooleanContent:
1064 case TargetLowering::UndefinedBooleanContent:
1065 TrueValue = getConstant(1, VT);
1067 case TargetLowering::ZeroOrNegativeOneBooleanContent:
1068 TrueValue = getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()),
1072 return getNode(ISD::XOR, DL, VT, Val, TrueValue);
1075 SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT, bool isO) {
1076 EVT EltVT = VT.getScalarType();
1077 assert((EltVT.getSizeInBits() >= 64 ||
1078 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
1079 "getConstant with a uint64_t value that doesn't fit in the type!");
1080 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT, isO);
1083 SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT, bool isO)
1085 return getConstant(*ConstantInt::get(*Context, Val), VT, isT, isO);
1088 SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT,
1090 assert(VT.isInteger() && "Cannot create FP integer constant!");
1092 EVT EltVT = VT.getScalarType();
1093 const ConstantInt *Elt = &Val;
1095 // In some cases the vector type is legal but the element type is illegal and
1096 // needs to be promoted, for example v8i8 on ARM. In this case, promote the
1097 // inserted value (the type does not need to match the vector element type).
1098 // Any extra bits introduced will be truncated away.
1099 if (VT.isVector() && TLI->getTypeAction(*getContext(), EltVT) ==
1100 TargetLowering::TypePromoteInteger) {
1101 EltVT = TLI->getTypeToTransformTo(*getContext(), EltVT);
1102 APInt NewVal = Elt->getValue().zext(EltVT.getSizeInBits());
1103 Elt = ConstantInt::get(*getContext(), NewVal);
1105 // In other cases the element type is illegal and needs to be expanded, for
1106 // example v2i64 on MIPS32. In this case, find the nearest legal type, split
1107 // the value into n parts and use a vector type with n-times the elements.
1108 // Then bitcast to the type requested.
1109 // Legalizing constants too early makes the DAGCombiner's job harder so we
1110 // only legalize if the DAG tells us we must produce legal types.
1111 else if (NewNodesMustHaveLegalTypes && VT.isVector() &&
1112 TLI->getTypeAction(*getContext(), EltVT) ==
1113 TargetLowering::TypeExpandInteger) {
1114 APInt NewVal = Elt->getValue();
1115 EVT ViaEltVT = TLI->getTypeToTransformTo(*getContext(), EltVT);
1116 unsigned ViaEltSizeInBits = ViaEltVT.getSizeInBits();
1117 unsigned ViaVecNumElts = VT.getSizeInBits() / ViaEltSizeInBits;
1118 EVT ViaVecVT = EVT::getVectorVT(*getContext(), ViaEltVT, ViaVecNumElts);
1120 // Check the temporary vector is the correct size. If this fails then
1121 // getTypeToTransformTo() probably returned a type whose size (in bits)
1122 // isn't a power-of-2 factor of the requested type size.
1123 assert(ViaVecVT.getSizeInBits() == VT.getSizeInBits());
1125 SmallVector<SDValue, 2> EltParts;
1126 for (unsigned i = 0; i < ViaVecNumElts / VT.getVectorNumElements(); ++i) {
1127 EltParts.push_back(getConstant(NewVal.lshr(i * ViaEltSizeInBits)
1128 .trunc(ViaEltSizeInBits),
1129 ViaEltVT, isT, isO));
1132 // EltParts is currently in little endian order. If we actually want
1133 // big-endian order then reverse it now.
1134 if (TLI->isBigEndian())
1135 std::reverse(EltParts.begin(), EltParts.end());
1137 // The elements must be reversed when the element order is different
1138 // to the endianness of the elements (because the BITCAST is itself a
1139 // vector shuffle in this situation). However, we do not need any code to
1140 // perform this reversal because getConstant() is producing a vector
1142 // This situation occurs in MIPS MSA.
1144 SmallVector<SDValue, 8> Ops;
1145 for (unsigned i = 0; i < VT.getVectorNumElements(); ++i)
1146 Ops.insert(Ops.end(), EltParts.begin(), EltParts.end());
1148 SDValue Result = getNode(ISD::BITCAST, SDLoc(), VT,
1149 getNode(ISD::BUILD_VECTOR, SDLoc(), ViaVecVT,
1154 assert(Elt->getBitWidth() == EltVT.getSizeInBits() &&
1155 "APInt size does not match type size!");
1156 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
1157 FoldingSetNodeID ID;
1158 AddNodeIDNode(ID, Opc, getVTList(EltVT), None);
1162 SDNode *N = nullptr;
1163 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
1165 return SDValue(N, 0);
1168 N = new (NodeAllocator) ConstantSDNode(isT, isO, Elt, EltVT);
1169 CSEMap.InsertNode(N, IP);
1173 SDValue Result(N, 0);
1174 if (VT.isVector()) {
1175 SmallVector<SDValue, 8> Ops;
1176 Ops.assign(VT.getVectorNumElements(), Result);
1177 Result = getNode(ISD::BUILD_VECTOR, SDLoc(), VT, Ops);
1182 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
1183 return getConstant(Val, TLI->getPointerTy(), isTarget);
1187 SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) {
1188 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget);
1191 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){
1192 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
1194 EVT EltVT = VT.getScalarType();
1196 // Do the map lookup using the actual bit pattern for the floating point
1197 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
1198 // we don't have issues with SNANs.
1199 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
1200 FoldingSetNodeID ID;
1201 AddNodeIDNode(ID, Opc, getVTList(EltVT), None);
1204 SDNode *N = nullptr;
1205 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
1207 return SDValue(N, 0);
1210 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT);
1211 CSEMap.InsertNode(N, IP);
1215 SDValue Result(N, 0);
1216 if (VT.isVector()) {
1217 SmallVector<SDValue, 8> Ops;
1218 Ops.assign(VT.getVectorNumElements(), Result);
1219 // FIXME SDLoc info might be appropriate here
1220 Result = getNode(ISD::BUILD_VECTOR, SDLoc(), VT, Ops);
1225 SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) {
1226 EVT EltVT = VT.getScalarType();
1227 if (EltVT==MVT::f32)
1228 return getConstantFP(APFloat((float)Val), VT, isTarget);
1229 else if (EltVT==MVT::f64)
1230 return getConstantFP(APFloat(Val), VT, isTarget);
1231 else if (EltVT==MVT::f80 || EltVT==MVT::f128 || EltVT==MVT::ppcf128 ||
1234 APFloat apf = APFloat(Val);
1235 apf.convert(EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven,
1237 return getConstantFP(apf, VT, isTarget);
1239 llvm_unreachable("Unsupported type in getConstantFP");
1242 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, SDLoc DL,
1243 EVT VT, int64_t Offset,
1245 unsigned char TargetFlags) {
1246 assert((TargetFlags == 0 || isTargetGA) &&
1247 "Cannot set target flags on target-independent globals");
1249 // Truncate (with sign-extension) the offset value to the pointer size.
1250 unsigned BitWidth = TLI->getPointerTypeSizeInBits(GV->getType());
1252 Offset = SignExtend64(Offset, BitWidth);
1255 if (GV->isThreadLocal())
1256 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
1258 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
1260 FoldingSetNodeID ID;
1261 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1263 ID.AddInteger(Offset);
1264 ID.AddInteger(TargetFlags);
1265 ID.AddInteger(GV->getType()->getAddressSpace());
1267 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1268 return SDValue(E, 0);
1270 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL.getIROrder(),
1271 DL.getDebugLoc(), GV, VT,
1272 Offset, TargetFlags);
1273 CSEMap.InsertNode(N, IP);
1275 return SDValue(N, 0);
1278 SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
1279 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1280 FoldingSetNodeID ID;
1281 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1284 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1285 return SDValue(E, 0);
1287 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget);
1288 CSEMap.InsertNode(N, IP);
1290 return SDValue(N, 0);
1293 SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
1294 unsigned char TargetFlags) {
1295 assert((TargetFlags == 0 || isTarget) &&
1296 "Cannot set target flags on target-independent jump tables");
1297 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1298 FoldingSetNodeID ID;
1299 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1301 ID.AddInteger(TargetFlags);
1303 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1304 return SDValue(E, 0);
1306 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget,
1308 CSEMap.InsertNode(N, IP);
1310 return SDValue(N, 0);
1313 SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT,
1314 unsigned Alignment, int Offset,
1316 unsigned char TargetFlags) {
1317 assert((TargetFlags == 0 || isTarget) &&
1318 "Cannot set target flags on target-independent globals");
1320 Alignment = TLI->getDataLayout()->getPrefTypeAlignment(C->getType());
1321 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1322 FoldingSetNodeID ID;
1323 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1324 ID.AddInteger(Alignment);
1325 ID.AddInteger(Offset);
1327 ID.AddInteger(TargetFlags);
1329 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1330 return SDValue(E, 0);
1332 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1333 Alignment, TargetFlags);
1334 CSEMap.InsertNode(N, IP);
1336 return SDValue(N, 0);
1340 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
1341 unsigned Alignment, int Offset,
1343 unsigned char TargetFlags) {
1344 assert((TargetFlags == 0 || isTarget) &&
1345 "Cannot set target flags on target-independent globals");
1347 Alignment = TLI->getDataLayout()->getPrefTypeAlignment(C->getType());
1348 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1349 FoldingSetNodeID ID;
1350 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1351 ID.AddInteger(Alignment);
1352 ID.AddInteger(Offset);
1353 C->addSelectionDAGCSEId(ID);
1354 ID.AddInteger(TargetFlags);
1356 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1357 return SDValue(E, 0);
1359 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1360 Alignment, TargetFlags);
1361 CSEMap.InsertNode(N, IP);
1363 return SDValue(N, 0);
1366 SDValue SelectionDAG::getTargetIndex(int Index, EVT VT, int64_t Offset,
1367 unsigned char TargetFlags) {
1368 FoldingSetNodeID ID;
1369 AddNodeIDNode(ID, ISD::TargetIndex, getVTList(VT), None);
1370 ID.AddInteger(Index);
1371 ID.AddInteger(Offset);
1372 ID.AddInteger(TargetFlags);
1374 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1375 return SDValue(E, 0);
1377 SDNode *N = new (NodeAllocator) TargetIndexSDNode(Index, VT, Offset,
1379 CSEMap.InsertNode(N, IP);
1381 return SDValue(N, 0);
1384 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1385 FoldingSetNodeID ID;
1386 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), None);
1389 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1390 return SDValue(E, 0);
1392 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB);
1393 CSEMap.InsertNode(N, IP);
1395 return SDValue(N, 0);
1398 SDValue SelectionDAG::getValueType(EVT VT) {
1399 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
1400 ValueTypeNodes.size())
1401 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
1403 SDNode *&N = VT.isExtended() ?
1404 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
1406 if (N) return SDValue(N, 0);
1407 N = new (NodeAllocator) VTSDNode(VT);
1409 return SDValue(N, 0);
1412 SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
1413 SDNode *&N = ExternalSymbols[Sym];
1414 if (N) return SDValue(N, 0);
1415 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT);
1417 return SDValue(N, 0);
1420 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
1421 unsigned char TargetFlags) {
1423 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1425 if (N) return SDValue(N, 0);
1426 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1428 return SDValue(N, 0);
1431 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1432 if ((unsigned)Cond >= CondCodeNodes.size())
1433 CondCodeNodes.resize(Cond+1);
1435 if (!CondCodeNodes[Cond]) {
1436 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond);
1437 CondCodeNodes[Cond] = N;
1441 return SDValue(CondCodeNodes[Cond], 0);
1444 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1445 // the shuffle mask M that point at N1 to point at N2, and indices that point
1446 // N2 to point at N1.
1447 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1449 int NElts = M.size();
1450 for (int i = 0; i != NElts; ++i) {
1458 SDValue SelectionDAG::getVectorShuffle(EVT VT, SDLoc dl, SDValue N1,
1459 SDValue N2, const int *Mask) {
1460 assert(VT == N1.getValueType() && VT == N2.getValueType() &&
1461 "Invalid VECTOR_SHUFFLE");
1463 // Canonicalize shuffle undef, undef -> undef
1464 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1465 return getUNDEF(VT);
1467 // Validate that all indices in Mask are within the range of the elements
1468 // input to the shuffle.
1469 unsigned NElts = VT.getVectorNumElements();
1470 SmallVector<int, 8> MaskVec;
1471 for (unsigned i = 0; i != NElts; ++i) {
1472 assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1473 MaskVec.push_back(Mask[i]);
1476 // Canonicalize shuffle v, v -> v, undef
1479 for (unsigned i = 0; i != NElts; ++i)
1480 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1483 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1484 if (N1.getOpcode() == ISD::UNDEF)
1485 commuteShuffle(N1, N2, MaskVec);
1487 // Canonicalize all index into lhs, -> shuffle lhs, undef
1488 // Canonicalize all index into rhs, -> shuffle rhs, undef
1489 bool AllLHS = true, AllRHS = true;
1490 bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1491 for (unsigned i = 0; i != NElts; ++i) {
1492 if (MaskVec[i] >= (int)NElts) {
1497 } else if (MaskVec[i] >= 0) {
1501 if (AllLHS && AllRHS)
1502 return getUNDEF(VT);
1503 if (AllLHS && !N2Undef)
1507 commuteShuffle(N1, N2, MaskVec);
1509 // Reset our undef status after accounting for the mask.
1510 N2Undef = N2.getOpcode() == ISD::UNDEF;
1511 // Re-check whether both sides ended up undef.
1512 if (N1.getOpcode() == ISD::UNDEF && N2Undef)
1513 return getUNDEF(VT);
1515 // If Identity shuffle return that node.
1516 bool Identity = true, AllSame = true;
1517 for (unsigned i = 0; i != NElts; ++i) {
1518 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1519 if (MaskVec[i] != MaskVec[0]) AllSame = false;
1521 if (Identity && NElts)
1524 // Shuffling a constant splat doesn't change the result.
1528 // Look through any bitcasts. We check that these don't change the number
1529 // (and size) of elements and just changes their types.
1530 while (V.getOpcode() == ISD::BITCAST)
1531 V = V->getOperand(0);
1533 // A splat should always show up as a build vector node.
1534 if (auto *BV = dyn_cast<BuildVectorSDNode>(V)) {
1535 BitVector UndefElements;
1536 SDValue Splat = BV->getSplatValue(&UndefElements);
1537 // If this is a splat of an undef, shuffling it is also undef.
1538 if (Splat && Splat.getOpcode() == ISD::UNDEF)
1539 return getUNDEF(VT);
1541 // We only have a splat which can skip shuffles if there is a splatted
1542 // value and no undef lanes rearranged by the shuffle.
1543 if (Splat && UndefElements.none()) {
1544 // Splat of <x, x, ..., x>, return <x, x, ..., x>, provided that the
1545 // number of elements match or the value splatted is a zero constant.
1546 if (V.getValueType().getVectorNumElements() ==
1547 VT.getVectorNumElements())
1549 if (auto *C = dyn_cast<ConstantSDNode>(Splat))
1550 if (C->isNullValue())
1554 // If the shuffle itself creates a constant splat, build the vector
1557 const SDValue &Splatted = BV->getOperand(MaskVec[0]);
1558 if (isa<ConstantSDNode>(Splatted) || isa<ConstantFPSDNode>(Splatted)) {
1559 SmallVector<SDValue, 8> Ops;
1560 for (unsigned i = 0; i != NElts; ++i) {
1561 Ops.push_back(Splatted);
1563 SDValue NewBV = getNode(ISD::BUILD_VECTOR, dl,
1564 BV->getValueType(0), Ops);
1566 // We may have jumped through bitcasts, so the type of the
1567 // BUILD_VECTOR may not match the type of the shuffle.
1568 if (BV->getValueType(0) != VT)
1569 NewBV = getNode(ISD::BITCAST, dl, VT, NewBV);
1576 FoldingSetNodeID ID;
1577 SDValue Ops[2] = { N1, N2 };
1578 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops);
1579 for (unsigned i = 0; i != NElts; ++i)
1580 ID.AddInteger(MaskVec[i]);
1583 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1584 return SDValue(E, 0);
1586 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1587 // SDNode doesn't have access to it. This memory will be "leaked" when
1588 // the node is deallocated, but recovered when the NodeAllocator is released.
1589 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1590 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1592 ShuffleVectorSDNode *N =
1593 new (NodeAllocator) ShuffleVectorSDNode(VT, dl.getIROrder(),
1594 dl.getDebugLoc(), N1, N2,
1596 CSEMap.InsertNode(N, IP);
1598 return SDValue(N, 0);
1601 SDValue SelectionDAG::getCommutedVectorShuffle(const ShuffleVectorSDNode &SV) {
1602 MVT VT = SV.getSimpleValueType(0);
1603 unsigned NumElems = VT.getVectorNumElements();
1604 SmallVector<int, 8> MaskVec;
1606 for (unsigned i = 0; i != NumElems; ++i) {
1607 int Idx = SV.getMaskElt(i);
1609 if (Idx < (int)NumElems)
1614 MaskVec.push_back(Idx);
1617 SDValue Op0 = SV.getOperand(0);
1618 SDValue Op1 = SV.getOperand(1);
1619 return getVectorShuffle(VT, SDLoc(&SV), Op1, Op0, &MaskVec[0]);
1622 SDValue SelectionDAG::getConvertRndSat(EVT VT, SDLoc dl,
1623 SDValue Val, SDValue DTy,
1624 SDValue STy, SDValue Rnd, SDValue Sat,
1625 ISD::CvtCode Code) {
1626 // If the src and dest types are the same and the conversion is between
1627 // integer types of the same sign or two floats, no conversion is necessary.
1629 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1632 FoldingSetNodeID ID;
1633 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1634 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), Ops);
1636 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1637 return SDValue(E, 0);
1639 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl.getIROrder(),
1642 CSEMap.InsertNode(N, IP);
1644 return SDValue(N, 0);
1647 SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
1648 FoldingSetNodeID ID;
1649 AddNodeIDNode(ID, ISD::Register, getVTList(VT), None);
1650 ID.AddInteger(RegNo);
1652 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1653 return SDValue(E, 0);
1655 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT);
1656 CSEMap.InsertNode(N, IP);
1658 return SDValue(N, 0);
1661 SDValue SelectionDAG::getRegisterMask(const uint32_t *RegMask) {
1662 FoldingSetNodeID ID;
1663 AddNodeIDNode(ID, ISD::RegisterMask, getVTList(MVT::Untyped), None);
1664 ID.AddPointer(RegMask);
1666 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1667 return SDValue(E, 0);
1669 SDNode *N = new (NodeAllocator) RegisterMaskSDNode(RegMask);
1670 CSEMap.InsertNode(N, IP);
1672 return SDValue(N, 0);
1675 SDValue SelectionDAG::getEHLabel(SDLoc dl, SDValue Root, MCSymbol *Label) {
1676 FoldingSetNodeID ID;
1677 SDValue Ops[] = { Root };
1678 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), Ops);
1679 ID.AddPointer(Label);
1681 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1682 return SDValue(E, 0);
1684 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl.getIROrder(),
1685 dl.getDebugLoc(), Root, Label);
1686 CSEMap.InsertNode(N, IP);
1688 return SDValue(N, 0);
1692 SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT,
1695 unsigned char TargetFlags) {
1696 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress;
1698 FoldingSetNodeID ID;
1699 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1701 ID.AddInteger(Offset);
1702 ID.AddInteger(TargetFlags);
1704 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1705 return SDValue(E, 0);
1707 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, Offset,
1709 CSEMap.InsertNode(N, IP);
1711 return SDValue(N, 0);
1714 SDValue SelectionDAG::getSrcValue(const Value *V) {
1715 assert((!V || V->getType()->isPointerTy()) &&
1716 "SrcValue is not a pointer?");
1718 FoldingSetNodeID ID;
1719 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), None);
1723 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1724 return SDValue(E, 0);
1726 SDNode *N = new (NodeAllocator) SrcValueSDNode(V);
1727 CSEMap.InsertNode(N, IP);
1729 return SDValue(N, 0);
1732 /// getMDNode - Return an MDNodeSDNode which holds an MDNode.
1733 SDValue SelectionDAG::getMDNode(const MDNode *MD) {
1734 FoldingSetNodeID ID;
1735 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), None);
1739 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1740 return SDValue(E, 0);
1742 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD);
1743 CSEMap.InsertNode(N, IP);
1745 return SDValue(N, 0);
1748 /// getAddrSpaceCast - Return an AddrSpaceCastSDNode.
1749 SDValue SelectionDAG::getAddrSpaceCast(SDLoc dl, EVT VT, SDValue Ptr,
1750 unsigned SrcAS, unsigned DestAS) {
1751 SDValue Ops[] = {Ptr};
1752 FoldingSetNodeID ID;
1753 AddNodeIDNode(ID, ISD::ADDRSPACECAST, getVTList(VT), Ops);
1754 ID.AddInteger(SrcAS);
1755 ID.AddInteger(DestAS);
1758 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1759 return SDValue(E, 0);
1761 SDNode *N = new (NodeAllocator) AddrSpaceCastSDNode(dl.getIROrder(),
1763 VT, Ptr, SrcAS, DestAS);
1764 CSEMap.InsertNode(N, IP);
1766 return SDValue(N, 0);
1769 /// getShiftAmountOperand - Return the specified value casted to
1770 /// the target's desired shift amount type.
1771 SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) {
1772 EVT OpTy = Op.getValueType();
1773 EVT ShTy = TLI->getShiftAmountTy(LHSTy);
1774 if (OpTy == ShTy || OpTy.isVector()) return Op;
1776 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1777 return getNode(Opcode, SDLoc(Op), ShTy, Op);
1780 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1781 /// specified value type.
1782 SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
1783 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1784 unsigned ByteSize = VT.getStoreSize();
1785 Type *Ty = VT.getTypeForEVT(*getContext());
1786 unsigned StackAlign =
1787 std::max((unsigned)TLI->getDataLayout()->getPrefTypeAlignment(Ty), minAlign);
1789 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false);
1790 return getFrameIndex(FrameIdx, TLI->getPointerTy());
1793 /// CreateStackTemporary - Create a stack temporary suitable for holding
1794 /// either of the specified value types.
1795 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
1796 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1797 VT2.getStoreSizeInBits())/8;
1798 Type *Ty1 = VT1.getTypeForEVT(*getContext());
1799 Type *Ty2 = VT2.getTypeForEVT(*getContext());
1800 const DataLayout *TD = TLI->getDataLayout();
1801 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1802 TD->getPrefTypeAlignment(Ty2));
1804 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1805 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false);
1806 return getFrameIndex(FrameIdx, TLI->getPointerTy());
1809 SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
1810 SDValue N2, ISD::CondCode Cond, SDLoc dl) {
1811 // These setcc operations always fold.
1815 case ISD::SETFALSE2: return getConstant(0, VT);
1817 case ISD::SETTRUE2: {
1818 TargetLowering::BooleanContent Cnt =
1819 TLI->getBooleanContents(N1->getValueType(0));
1821 Cnt == TargetLowering::ZeroOrNegativeOneBooleanContent ? -1ULL : 1, VT);
1834 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1838 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1839 const APInt &C2 = N2C->getAPIntValue();
1840 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1841 const APInt &C1 = N1C->getAPIntValue();
1844 default: llvm_unreachable("Unknown integer setcc!");
1845 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1846 case ISD::SETNE: return getConstant(C1 != C2, VT);
1847 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1848 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1849 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1850 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1851 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1852 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1853 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1854 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1858 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1859 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1860 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1863 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1864 return getUNDEF(VT);
1866 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1867 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1868 return getUNDEF(VT);
1870 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1871 R==APFloat::cmpLessThan, VT);
1872 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1873 return getUNDEF(VT);
1875 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1876 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1877 return getUNDEF(VT);
1879 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1880 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1881 return getUNDEF(VT);
1883 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1884 R==APFloat::cmpEqual, VT);
1885 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1886 return getUNDEF(VT);
1888 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1889 R==APFloat::cmpEqual, VT);
1890 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1891 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1892 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1893 R==APFloat::cmpEqual, VT);
1894 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1895 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1896 R==APFloat::cmpLessThan, VT);
1897 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1898 R==APFloat::cmpUnordered, VT);
1899 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1900 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1903 // Ensure that the constant occurs on the RHS.
1904 ISD::CondCode SwappedCond = ISD::getSetCCSwappedOperands(Cond);
1905 MVT CompVT = N1.getValueType().getSimpleVT();
1906 if (!TLI->isCondCodeLegal(SwappedCond, CompVT))
1909 return getSetCC(dl, VT, N2, N1, SwappedCond);
1913 // Could not fold it.
1917 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1918 /// use this predicate to simplify operations downstream.
1919 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1920 // This predicate is not safe for vector operations.
1921 if (Op.getValueType().isVector())
1924 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1925 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1928 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1929 /// this predicate to simplify operations downstream. Mask is known to be zero
1930 /// for bits that V cannot have.
1931 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1932 unsigned Depth) const {
1933 APInt KnownZero, KnownOne;
1934 computeKnownBits(Op, KnownZero, KnownOne, Depth);
1935 return (KnownZero & Mask) == Mask;
1938 /// Determine which bits of Op are known to be either zero or one and return
1939 /// them in the KnownZero/KnownOne bitsets.
1940 void SelectionDAG::computeKnownBits(SDValue Op, APInt &KnownZero,
1941 APInt &KnownOne, unsigned Depth) const {
1942 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1944 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1946 return; // Limit search depth.
1948 APInt KnownZero2, KnownOne2;
1950 switch (Op.getOpcode()) {
1952 // We know all of the bits for a constant!
1953 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue();
1954 KnownZero = ~KnownOne;
1957 // If either the LHS or the RHS are Zero, the result is zero.
1958 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1959 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1961 // Output known-1 bits are only known if set in both the LHS & RHS.
1962 KnownOne &= KnownOne2;
1963 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1964 KnownZero |= KnownZero2;
1967 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1968 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1970 // Output known-0 bits are only known if clear in both the LHS & RHS.
1971 KnownZero &= KnownZero2;
1972 // Output known-1 are known to be set if set in either the LHS | RHS.
1973 KnownOne |= KnownOne2;
1976 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1977 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1979 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1980 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1981 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1982 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1983 KnownZero = KnownZeroOut;
1987 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1988 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1990 // If low bits are zero in either operand, output low known-0 bits.
1991 // Also compute a conserative estimate for high known-0 bits.
1992 // More trickiness is possible, but this is sufficient for the
1993 // interesting case of alignment computation.
1994 KnownOne.clearAllBits();
1995 unsigned TrailZ = KnownZero.countTrailingOnes() +
1996 KnownZero2.countTrailingOnes();
1997 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1998 KnownZero2.countLeadingOnes(),
1999 BitWidth) - BitWidth;
2001 TrailZ = std::min(TrailZ, BitWidth);
2002 LeadZ = std::min(LeadZ, BitWidth);
2003 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
2004 APInt::getHighBitsSet(BitWidth, LeadZ);
2008 // For the purposes of computing leading zeros we can conservatively
2009 // treat a udiv as a logical right shift by the power of 2 known to
2010 // be less than the denominator.
2011 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2012 unsigned LeadZ = KnownZero2.countLeadingOnes();
2014 KnownOne2.clearAllBits();
2015 KnownZero2.clearAllBits();
2016 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2017 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
2018 if (RHSUnknownLeadingOnes != BitWidth)
2019 LeadZ = std::min(BitWidth,
2020 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
2022 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ);
2026 computeKnownBits(Op.getOperand(2), KnownZero, KnownOne, Depth+1);
2027 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2029 // Only known if known in both the LHS and RHS.
2030 KnownOne &= KnownOne2;
2031 KnownZero &= KnownZero2;
2033 case ISD::SELECT_CC:
2034 computeKnownBits(Op.getOperand(3), KnownZero, KnownOne, Depth+1);
2035 computeKnownBits(Op.getOperand(2), KnownZero2, KnownOne2, Depth+1);
2037 // Only known if known in both the LHS and RHS.
2038 KnownOne &= KnownOne2;
2039 KnownZero &= KnownZero2;
2047 if (Op.getResNo() != 1)
2049 // The boolean result conforms to getBooleanContents.
2050 // If we know the result of a setcc has the top bits zero, use this info.
2051 // We know that we have an integer-based boolean since these operations
2052 // are only available for integer.
2053 if (TLI->getBooleanContents(Op.getValueType().isVector(), false) ==
2054 TargetLowering::ZeroOrOneBooleanContent &&
2056 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
2059 // If we know the result of a setcc has the top bits zero, use this info.
2060 if (TLI->getBooleanContents(Op.getOperand(0).getValueType()) ==
2061 TargetLowering::ZeroOrOneBooleanContent &&
2063 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
2066 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
2067 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2068 unsigned ShAmt = SA->getZExtValue();
2070 // If the shift count is an invalid immediate, don't do anything.
2071 if (ShAmt >= BitWidth)
2074 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2075 KnownZero <<= ShAmt;
2077 // low bits known zero.
2078 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
2082 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
2083 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2084 unsigned ShAmt = SA->getZExtValue();
2086 // If the shift count is an invalid immediate, don't do anything.
2087 if (ShAmt >= BitWidth)
2090 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2091 KnownZero = KnownZero.lshr(ShAmt);
2092 KnownOne = KnownOne.lshr(ShAmt);
2094 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
2095 KnownZero |= HighBits; // High bits known zero.
2099 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2100 unsigned ShAmt = SA->getZExtValue();
2102 // If the shift count is an invalid immediate, don't do anything.
2103 if (ShAmt >= BitWidth)
2106 // If any of the demanded bits are produced by the sign extension, we also
2107 // demand the input sign bit.
2108 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
2110 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2111 KnownZero = KnownZero.lshr(ShAmt);
2112 KnownOne = KnownOne.lshr(ShAmt);
2114 // Handle the sign bits.
2115 APInt SignBit = APInt::getSignBit(BitWidth);
2116 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
2118 if (KnownZero.intersects(SignBit)) {
2119 KnownZero |= HighBits; // New bits are known zero.
2120 } else if (KnownOne.intersects(SignBit)) {
2121 KnownOne |= HighBits; // New bits are known one.
2125 case ISD::SIGN_EXTEND_INREG: {
2126 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
2127 unsigned EBits = EVT.getScalarType().getSizeInBits();
2129 // Sign extension. Compute the demanded bits in the result that are not
2130 // present in the input.
2131 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits);
2133 APInt InSignBit = APInt::getSignBit(EBits);
2134 APInt InputDemandedBits = APInt::getLowBitsSet(BitWidth, EBits);
2136 // If the sign extended bits are demanded, we know that the sign
2138 InSignBit = InSignBit.zext(BitWidth);
2139 if (NewBits.getBoolValue())
2140 InputDemandedBits |= InSignBit;
2142 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2143 KnownOne &= InputDemandedBits;
2144 KnownZero &= InputDemandedBits;
2146 // If the sign bit of the input is known set or clear, then we know the
2147 // top bits of the result.
2148 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
2149 KnownZero |= NewBits;
2150 KnownOne &= ~NewBits;
2151 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
2152 KnownOne |= NewBits;
2153 KnownZero &= ~NewBits;
2154 } else { // Input sign bit unknown
2155 KnownZero &= ~NewBits;
2156 KnownOne &= ~NewBits;
2161 case ISD::CTTZ_ZERO_UNDEF:
2163 case ISD::CTLZ_ZERO_UNDEF:
2165 unsigned LowBits = Log2_32(BitWidth)+1;
2166 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
2167 KnownOne.clearAllBits();
2171 LoadSDNode *LD = cast<LoadSDNode>(Op);
2172 // If this is a ZEXTLoad and we are looking at the loaded value.
2173 if (ISD::isZEXTLoad(Op.getNode()) && Op.getResNo() == 0) {
2174 EVT VT = LD->getMemoryVT();
2175 unsigned MemBits = VT.getScalarType().getSizeInBits();
2176 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits);
2177 } else if (const MDNode *Ranges = LD->getRanges()) {
2178 computeKnownBitsFromRangeMetadata(*Ranges, KnownZero);
2182 case ISD::ZERO_EXTEND: {
2183 EVT InVT = Op.getOperand(0).getValueType();
2184 unsigned InBits = InVT.getScalarType().getSizeInBits();
2185 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
2186 KnownZero = KnownZero.trunc(InBits);
2187 KnownOne = KnownOne.trunc(InBits);
2188 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2189 KnownZero = KnownZero.zext(BitWidth);
2190 KnownOne = KnownOne.zext(BitWidth);
2191 KnownZero |= NewBits;
2194 case ISD::SIGN_EXTEND: {
2195 EVT InVT = Op.getOperand(0).getValueType();
2196 unsigned InBits = InVT.getScalarType().getSizeInBits();
2197 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
2199 KnownZero = KnownZero.trunc(InBits);
2200 KnownOne = KnownOne.trunc(InBits);
2201 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2203 // Note if the sign bit is known to be zero or one.
2204 bool SignBitKnownZero = KnownZero.isNegative();
2205 bool SignBitKnownOne = KnownOne.isNegative();
2207 KnownZero = KnownZero.zext(BitWidth);
2208 KnownOne = KnownOne.zext(BitWidth);
2210 // If the sign bit is known zero or one, the top bits match.
2211 if (SignBitKnownZero)
2212 KnownZero |= NewBits;
2213 else if (SignBitKnownOne)
2214 KnownOne |= NewBits;
2217 case ISD::ANY_EXTEND: {
2218 EVT InVT = Op.getOperand(0).getValueType();
2219 unsigned InBits = InVT.getScalarType().getSizeInBits();
2220 KnownZero = KnownZero.trunc(InBits);
2221 KnownOne = KnownOne.trunc(InBits);
2222 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2223 KnownZero = KnownZero.zext(BitWidth);
2224 KnownOne = KnownOne.zext(BitWidth);
2227 case ISD::TRUNCATE: {
2228 EVT InVT = Op.getOperand(0).getValueType();
2229 unsigned InBits = InVT.getScalarType().getSizeInBits();
2230 KnownZero = KnownZero.zext(InBits);
2231 KnownOne = KnownOne.zext(InBits);
2232 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2233 KnownZero = KnownZero.trunc(BitWidth);
2234 KnownOne = KnownOne.trunc(BitWidth);
2237 case ISD::AssertZext: {
2238 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
2239 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
2240 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2241 KnownZero |= (~InMask);
2242 KnownOne &= (~KnownZero);
2246 // All bits are zero except the low bit.
2247 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
2251 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
2252 // We know that the top bits of C-X are clear if X contains less bits
2253 // than C (i.e. no wrap-around can happen). For example, 20-X is
2254 // positive if we can prove that X is >= 0 and < 16.
2255 if (CLHS->getAPIntValue().isNonNegative()) {
2256 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
2257 // NLZ can't be BitWidth with no sign bit
2258 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
2259 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2261 // If all of the MaskV bits are known to be zero, then we know the
2262 // output top bits are zero, because we now know that the output is
2264 if ((KnownZero2 & MaskV) == MaskV) {
2265 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
2266 // Top bits known zero.
2267 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2);
2275 // Output known-0 bits are known if clear or set in both the low clear bits
2276 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
2277 // low 3 bits clear.
2278 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2279 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
2281 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2282 KnownZeroOut = std::min(KnownZeroOut,
2283 KnownZero2.countTrailingOnes());
2285 if (Op.getOpcode() == ISD::ADD) {
2286 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
2290 // With ADDE, a carry bit may be added in, so we can only use this
2291 // information if we know (at least) that the low two bits are clear. We
2292 // then return to the caller that the low bit is unknown but that other bits
2294 if (KnownZeroOut >= 2) // ADDE
2295 KnownZero |= APInt::getBitsSet(BitWidth, 1, KnownZeroOut);
2299 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2300 const APInt &RA = Rem->getAPIntValue().abs();
2301 if (RA.isPowerOf2()) {
2302 APInt LowBits = RA - 1;
2303 computeKnownBits(Op.getOperand(0), KnownZero2,KnownOne2,Depth+1);
2305 // The low bits of the first operand are unchanged by the srem.
2306 KnownZero = KnownZero2 & LowBits;
2307 KnownOne = KnownOne2 & LowBits;
2309 // If the first operand is non-negative or has all low bits zero, then
2310 // the upper bits are all zero.
2311 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
2312 KnownZero |= ~LowBits;
2314 // If the first operand is negative and not all low bits are zero, then
2315 // the upper bits are all one.
2316 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0))
2317 KnownOne |= ~LowBits;
2318 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2323 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2324 const APInt &RA = Rem->getAPIntValue();
2325 if (RA.isPowerOf2()) {
2326 APInt LowBits = (RA - 1);
2327 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth + 1);
2329 // The upper bits are all zero, the lower ones are unchanged.
2330 KnownZero = KnownZero2 | ~LowBits;
2331 KnownOne = KnownOne2 & LowBits;
2336 // Since the result is less than or equal to either operand, any leading
2337 // zero bits in either operand must also exist in the result.
2338 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2339 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2341 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
2342 KnownZero2.countLeadingOnes());
2343 KnownOne.clearAllBits();
2344 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders);
2347 case ISD::EXTRACT_ELEMENT: {
2348 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2349 const unsigned Index =
2350 cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();
2351 const unsigned BitWidth = Op.getValueType().getSizeInBits();
2353 // Remove low part of known bits mask
2354 KnownZero = KnownZero.getHiBits(KnownZero.getBitWidth() - Index * BitWidth);
2355 KnownOne = KnownOne.getHiBits(KnownOne.getBitWidth() - Index * BitWidth);
2357 // Remove high part of known bit mask
2358 KnownZero = KnownZero.trunc(BitWidth);
2359 KnownOne = KnownOne.trunc(BitWidth);
2362 case ISD::FrameIndex:
2363 case ISD::TargetFrameIndex:
2364 if (unsigned Align = InferPtrAlignment(Op)) {
2365 // The low bits are known zero if the pointer is aligned.
2366 KnownZero = APInt::getLowBitsSet(BitWidth, Log2_32(Align));
2372 if (Op.getOpcode() < ISD::BUILTIN_OP_END)
2375 case ISD::INTRINSIC_WO_CHAIN:
2376 case ISD::INTRINSIC_W_CHAIN:
2377 case ISD::INTRINSIC_VOID:
2378 // Allow the target to implement this method for its nodes.
2379 TLI->computeKnownBitsForTargetNode(Op, KnownZero, KnownOne, *this, Depth);
2383 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
2386 /// ComputeNumSignBits - Return the number of times the sign bit of the
2387 /// register is replicated into the other bits. We know that at least 1 bit
2388 /// is always equal to the sign bit (itself), but other cases can give us
2389 /// information. For example, immediately after an "SRA X, 2", we know that
2390 /// the top 3 bits are all equal to each other, so we return 3.
2391 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
2392 EVT VT = Op.getValueType();
2393 assert(VT.isInteger() && "Invalid VT!");
2394 unsigned VTBits = VT.getScalarType().getSizeInBits();
2396 unsigned FirstAnswer = 1;
2399 return 1; // Limit search depth.
2401 switch (Op.getOpcode()) {
2403 case ISD::AssertSext:
2404 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2405 return VTBits-Tmp+1;
2406 case ISD::AssertZext:
2407 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2410 case ISD::Constant: {
2411 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2412 return Val.getNumSignBits();
2415 case ISD::SIGN_EXTEND:
2417 VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
2418 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2420 case ISD::SIGN_EXTEND_INREG:
2421 // Max of the input and what this extends.
2423 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits();
2426 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2427 return std::max(Tmp, Tmp2);
2430 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2431 // SRA X, C -> adds C sign bits.
2432 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2433 Tmp += C->getZExtValue();
2434 if (Tmp > VTBits) Tmp = VTBits;
2438 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2439 // shl destroys sign bits.
2440 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2441 if (C->getZExtValue() >= VTBits || // Bad shift.
2442 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
2443 return Tmp - C->getZExtValue();
2448 case ISD::XOR: // NOT is handled here.
2449 // Logical binary ops preserve the number of sign bits at the worst.
2450 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2452 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2453 FirstAnswer = std::min(Tmp, Tmp2);
2454 // We computed what we know about the sign bits as our first
2455 // answer. Now proceed to the generic code that uses
2456 // computeKnownBits, and pick whichever answer is better.
2461 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2462 if (Tmp == 1) return 1; // Early out.
2463 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2464 return std::min(Tmp, Tmp2);
2472 if (Op.getResNo() != 1)
2474 // The boolean result conforms to getBooleanContents. Fall through.
2475 // If setcc returns 0/-1, all bits are sign bits.
2476 // We know that we have an integer-based boolean since these operations
2477 // are only available for integer.
2478 if (TLI->getBooleanContents(Op.getValueType().isVector(), false) ==
2479 TargetLowering::ZeroOrNegativeOneBooleanContent)
2483 // If setcc returns 0/-1, all bits are sign bits.
2484 if (TLI->getBooleanContents(Op.getOperand(0).getValueType()) ==
2485 TargetLowering::ZeroOrNegativeOneBooleanContent)
2490 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2491 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2493 // Handle rotate right by N like a rotate left by 32-N.
2494 if (Op.getOpcode() == ISD::ROTR)
2495 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2497 // If we aren't rotating out all of the known-in sign bits, return the
2498 // number that are left. This handles rotl(sext(x), 1) for example.
2499 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2500 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2504 // Add can have at most one carry bit. Thus we know that the output
2505 // is, at worst, one more bit than the inputs.
2506 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2507 if (Tmp == 1) return 1; // Early out.
2509 // Special case decrementing a value (ADD X, -1):
2510 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2511 if (CRHS->isAllOnesValue()) {
2512 APInt KnownZero, KnownOne;
2513 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2515 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2517 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue())
2520 // If we are subtracting one from a positive number, there is no carry
2521 // out of the result.
2522 if (KnownZero.isNegative())
2526 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2527 if (Tmp2 == 1) return 1;
2528 return std::min(Tmp, Tmp2)-1;
2531 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2532 if (Tmp2 == 1) return 1;
2535 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2536 if (CLHS->isNullValue()) {
2537 APInt KnownZero, KnownOne;
2538 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
2539 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2541 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue())
2544 // If the input is known to be positive (the sign bit is known clear),
2545 // the output of the NEG has the same number of sign bits as the input.
2546 if (KnownZero.isNegative())
2549 // Otherwise, we treat this like a SUB.
2552 // Sub can have at most one carry bit. Thus we know that the output
2553 // is, at worst, one more bit than the inputs.
2554 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2555 if (Tmp == 1) return 1; // Early out.
2556 return std::min(Tmp, Tmp2)-1;
2558 // FIXME: it's tricky to do anything useful for this, but it is an important
2559 // case for targets like X86.
2561 case ISD::EXTRACT_ELEMENT: {
2562 const int KnownSign = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2563 const int BitWidth = Op.getValueType().getSizeInBits();
2565 Op.getOperand(0).getValueType().getSizeInBits() / BitWidth;
2567 // Get reverse index (starting from 1), Op1 value indexes elements from
2568 // little end. Sign starts at big end.
2569 const int rIndex = Items - 1 -
2570 cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();
2572 // If the sign portion ends in our element the substraction gives correct
2573 // result. Otherwise it gives either negative or > bitwidth result
2574 return std::max(std::min(KnownSign - rIndex * BitWidth, BitWidth), 0);
2578 // If we are looking at the loaded value of the SDNode.
2579 if (Op.getResNo() == 0) {
2580 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2581 if (LoadSDNode *LD = dyn_cast<LoadSDNode>(Op)) {
2582 unsigned ExtType = LD->getExtensionType();
2585 case ISD::SEXTLOAD: // '17' bits known
2586 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2587 return VTBits-Tmp+1;
2588 case ISD::ZEXTLOAD: // '16' bits known
2589 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2595 // Allow the target to implement this method for its nodes.
2596 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2597 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2598 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2599 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2600 unsigned NumBits = TLI->ComputeNumSignBitsForTargetNode(Op, *this, Depth);
2601 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2604 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2605 // use this information.
2606 APInt KnownZero, KnownOne;
2607 computeKnownBits(Op, KnownZero, KnownOne, Depth);
2610 if (KnownZero.isNegative()) { // sign bit is 0
2612 } else if (KnownOne.isNegative()) { // sign bit is 1;
2619 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2620 // the number of identical bits in the top of the input value.
2622 Mask <<= Mask.getBitWidth()-VTBits;
2623 // Return # leading zeros. We use 'min' here in case Val was zero before
2624 // shifting. We don't want to return '64' as for an i32 "0".
2625 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2628 /// isBaseWithConstantOffset - Return true if the specified operand is an
2629 /// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an
2630 /// ISD::OR with a ConstantSDNode that is guaranteed to have the same
2631 /// semantics as an ADD. This handles the equivalence:
2632 /// X|Cst == X+Cst iff X&Cst = 0.
2633 bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const {
2634 if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) ||
2635 !isa<ConstantSDNode>(Op.getOperand(1)))
2638 if (Op.getOpcode() == ISD::OR &&
2639 !MaskedValueIsZero(Op.getOperand(0),
2640 cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue()))
2647 bool SelectionDAG::isKnownNeverNaN(SDValue Op) const {
2648 // If we're told that NaNs won't happen, assume they won't.
2649 if (getTarget().Options.NoNaNsFPMath)
2652 // If the value is a constant, we can obviously see if it is a NaN or not.
2653 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2654 return !C->getValueAPF().isNaN();
2656 // TODO: Recognize more cases here.
2661 bool SelectionDAG::isKnownNeverZero(SDValue Op) const {
2662 // If the value is a constant, we can obviously see if it is a zero or not.
2663 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2664 return !C->isZero();
2666 // TODO: Recognize more cases here.
2667 switch (Op.getOpcode()) {
2670 if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2671 return !C->isNullValue();
2678 bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const {
2679 // Check the obvious case.
2680 if (A == B) return true;
2682 // For for negative and positive zero.
2683 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A))
2684 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B))
2685 if (CA->isZero() && CB->isZero()) return true;
2687 // Otherwise they may not be equal.
2691 /// getNode - Gets or creates the specified node.
2693 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT) {
2694 FoldingSetNodeID ID;
2695 AddNodeIDNode(ID, Opcode, getVTList(VT), None);
2697 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2698 return SDValue(E, 0);
2700 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(),
2701 DL.getDebugLoc(), getVTList(VT));
2702 CSEMap.InsertNode(N, IP);
2705 return SDValue(N, 0);
2708 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL,
2709 EVT VT, SDValue Operand) {
2710 // Constant fold unary operations with an integer constant operand. Even
2711 // opaque constant will be folded, because the folding of unary operations
2712 // doesn't create new constants with different values. Nevertheless, the
2713 // opaque flag is preserved during folding to prevent future folding with
2715 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2716 const APInt &Val = C->getAPIntValue();
2719 case ISD::SIGN_EXTEND:
2720 return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), VT,
2721 C->isTargetOpcode(), C->isOpaque());
2722 case ISD::ANY_EXTEND:
2723 case ISD::ZERO_EXTEND:
2725 return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), VT,
2726 C->isTargetOpcode(), C->isOpaque());
2727 case ISD::UINT_TO_FP:
2728 case ISD::SINT_TO_FP: {
2729 APFloat apf(EVTToAPFloatSemantics(VT),
2730 APInt::getNullValue(VT.getSizeInBits()));
2731 (void)apf.convertFromAPInt(Val,
2732 Opcode==ISD::SINT_TO_FP,
2733 APFloat::rmNearestTiesToEven);
2734 return getConstantFP(apf, VT);
2737 if (VT == MVT::f16 && C->getValueType(0) == MVT::i16)
2738 return getConstantFP(APFloat(APFloat::IEEEhalf, Val), VT);
2739 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2740 return getConstantFP(APFloat(APFloat::IEEEsingle, Val), VT);
2741 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2742 return getConstantFP(APFloat(APFloat::IEEEdouble, Val), VT);
2745 return getConstant(Val.byteSwap(), VT, C->isTargetOpcode(),
2748 return getConstant(Val.countPopulation(), VT, C->isTargetOpcode(),
2751 case ISD::CTLZ_ZERO_UNDEF:
2752 return getConstant(Val.countLeadingZeros(), VT, C->isTargetOpcode(),
2755 case ISD::CTTZ_ZERO_UNDEF:
2756 return getConstant(Val.countTrailingZeros(), VT, C->isTargetOpcode(),
2761 // Constant fold unary operations with a floating point constant operand.
2762 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2763 APFloat V = C->getValueAPF(); // make copy
2767 return getConstantFP(V, VT);
2770 return getConstantFP(V, VT);
2772 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardPositive);
2773 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2774 return getConstantFP(V, VT);
2778 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardZero);
2779 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2780 return getConstantFP(V, VT);
2784 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardNegative);
2785 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2786 return getConstantFP(V, VT);
2789 case ISD::FP_EXTEND: {
2791 // This can return overflow, underflow, or inexact; we don't care.
2792 // FIXME need to be more flexible about rounding mode.
2793 (void)V.convert(EVTToAPFloatSemantics(VT),
2794 APFloat::rmNearestTiesToEven, &ignored);
2795 return getConstantFP(V, VT);
2797 case ISD::FP_TO_SINT:
2798 case ISD::FP_TO_UINT: {
2801 static_assert(integerPartWidth >= 64, "APFloat parts too small!");
2802 // FIXME need to be more flexible about rounding mode.
2803 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2804 Opcode==ISD::FP_TO_SINT,
2805 APFloat::rmTowardZero, &ignored);
2806 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2808 APInt api(VT.getSizeInBits(), x);
2809 return getConstant(api, VT);
2812 if (VT == MVT::i16 && C->getValueType(0) == MVT::f16)
2813 return getConstant((uint16_t)V.bitcastToAPInt().getZExtValue(), VT);
2814 else if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2815 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2816 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2817 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2822 // Constant fold unary operations with a vector integer operand.
2823 if (BuildVectorSDNode *BV = dyn_cast<BuildVectorSDNode>(Operand.getNode())) {
2824 if (BV->isConstant()) {
2827 // FIXME: Entirely reasonable to perform folding of other unary
2828 // operations here as the need arises.
2830 case ISD::UINT_TO_FP:
2831 case ISD::SINT_TO_FP: {
2832 SmallVector<SDValue, 8> Ops;
2833 for (int i = 0, e = VT.getVectorNumElements(); i != e; ++i) {
2834 SDValue OpN = BV->getOperand(i);
2835 // Let the above scalar folding handle the conversion of each
2837 OpN = getNode(ISD::SINT_TO_FP, DL, VT.getVectorElementType(),
2841 return getNode(ISD::BUILD_VECTOR, DL, VT, Ops);
2847 unsigned OpOpcode = Operand.getNode()->getOpcode();
2849 case ISD::TokenFactor:
2850 case ISD::MERGE_VALUES:
2851 case ISD::CONCAT_VECTORS:
2852 return Operand; // Factor, merge or concat of one node? No need.
2853 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
2854 case ISD::FP_EXTEND:
2855 assert(VT.isFloatingPoint() &&
2856 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2857 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2858 assert((!VT.isVector() ||
2859 VT.getVectorNumElements() ==
2860 Operand.getValueType().getVectorNumElements()) &&
2861 "Vector element count mismatch!");
2862 if (Operand.getOpcode() == ISD::UNDEF)
2863 return getUNDEF(VT);
2865 case ISD::SIGN_EXTEND:
2866 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2867 "Invalid SIGN_EXTEND!");
2868 if (Operand.getValueType() == VT) return Operand; // noop extension
2869 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2870 "Invalid sext node, dst < src!");
2871 assert((!VT.isVector() ||
2872 VT.getVectorNumElements() ==
2873 Operand.getValueType().getVectorNumElements()) &&
2874 "Vector element count mismatch!");
2875 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2876 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2877 else if (OpOpcode == ISD::UNDEF)
2878 // sext(undef) = 0, because the top bits will all be the same.
2879 return getConstant(0, VT);
2881 case ISD::ZERO_EXTEND:
2882 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2883 "Invalid ZERO_EXTEND!");
2884 if (Operand.getValueType() == VT) return Operand; // noop extension
2885 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2886 "Invalid zext node, dst < src!");
2887 assert((!VT.isVector() ||
2888 VT.getVectorNumElements() ==
2889 Operand.getValueType().getVectorNumElements()) &&
2890 "Vector element count mismatch!");
2891 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2892 return getNode(ISD::ZERO_EXTEND, DL, VT,
2893 Operand.getNode()->getOperand(0));
2894 else if (OpOpcode == ISD::UNDEF)
2895 // zext(undef) = 0, because the top bits will be zero.
2896 return getConstant(0, VT);
2898 case ISD::ANY_EXTEND:
2899 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2900 "Invalid ANY_EXTEND!");
2901 if (Operand.getValueType() == VT) return Operand; // noop extension
2902 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2903 "Invalid anyext node, dst < src!");
2904 assert((!VT.isVector() ||
2905 VT.getVectorNumElements() ==
2906 Operand.getValueType().getVectorNumElements()) &&
2907 "Vector element count mismatch!");
2909 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2910 OpOpcode == ISD::ANY_EXTEND)
2911 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2912 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2913 else if (OpOpcode == ISD::UNDEF)
2914 return getUNDEF(VT);
2916 // (ext (trunx x)) -> x
2917 if (OpOpcode == ISD::TRUNCATE) {
2918 SDValue OpOp = Operand.getNode()->getOperand(0);
2919 if (OpOp.getValueType() == VT)
2924 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2925 "Invalid TRUNCATE!");
2926 if (Operand.getValueType() == VT) return Operand; // noop truncate
2927 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) &&
2928 "Invalid truncate node, src < dst!");
2929 assert((!VT.isVector() ||
2930 VT.getVectorNumElements() ==
2931 Operand.getValueType().getVectorNumElements()) &&
2932 "Vector element count mismatch!");
2933 if (OpOpcode == ISD::TRUNCATE)
2934 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2935 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2936 OpOpcode == ISD::ANY_EXTEND) {
2937 // If the source is smaller than the dest, we still need an extend.
2938 if (Operand.getNode()->getOperand(0).getValueType().getScalarType()
2939 .bitsLT(VT.getScalarType()))
2940 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2941 if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2942 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2943 return Operand.getNode()->getOperand(0);
2945 if (OpOpcode == ISD::UNDEF)
2946 return getUNDEF(VT);
2949 // Basic sanity checking.
2950 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2951 && "Cannot BITCAST between types of different sizes!");
2952 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2953 if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x)
2954 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0));
2955 if (OpOpcode == ISD::UNDEF)
2956 return getUNDEF(VT);
2958 case ISD::SCALAR_TO_VECTOR:
2959 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2960 (VT.getVectorElementType() == Operand.getValueType() ||
2961 (VT.getVectorElementType().isInteger() &&
2962 Operand.getValueType().isInteger() &&
2963 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
2964 "Illegal SCALAR_TO_VECTOR node!");
2965 if (OpOpcode == ISD::UNDEF)
2966 return getUNDEF(VT);
2967 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2968 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2969 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2970 Operand.getConstantOperandVal(1) == 0 &&
2971 Operand.getOperand(0).getValueType() == VT)
2972 return Operand.getOperand(0);
2975 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
2976 if (getTarget().Options.UnsafeFPMath && OpOpcode == ISD::FSUB)
2977 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
2978 Operand.getNode()->getOperand(0));
2979 if (OpOpcode == ISD::FNEG) // --X -> X
2980 return Operand.getNode()->getOperand(0);
2983 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2984 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
2989 SDVTList VTs = getVTList(VT);
2990 if (VT != MVT::Glue) { // Don't CSE flag producing nodes
2991 FoldingSetNodeID ID;
2992 SDValue Ops[1] = { Operand };
2993 AddNodeIDNode(ID, Opcode, VTs, Ops);
2995 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2996 return SDValue(E, 0);
2998 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(),
2999 DL.getDebugLoc(), VTs, Operand);
3000 CSEMap.InsertNode(N, IP);
3002 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(),
3003 DL.getDebugLoc(), VTs, Operand);
3007 return SDValue(N, 0);
3010 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, EVT VT,
3011 SDNode *Cst1, SDNode *Cst2) {
3012 // If the opcode is a target-specific ISD node, there's nothing we can
3013 // do here and the operand rules may not line up with the below, so
3015 if (Opcode >= ISD::BUILTIN_OP_END)
3018 SmallVector<std::pair<ConstantSDNode *, ConstantSDNode *>, 4> Inputs;
3019 SmallVector<SDValue, 4> Outputs;
3020 EVT SVT = VT.getScalarType();
3022 ConstantSDNode *Scalar1 = dyn_cast<ConstantSDNode>(Cst1);
3023 ConstantSDNode *Scalar2 = dyn_cast<ConstantSDNode>(Cst2);
3024 if (Scalar1 && Scalar2 && (Scalar1->isOpaque() || Scalar2->isOpaque()))
3027 if (Scalar1 && Scalar2)
3028 // Scalar instruction.
3029 Inputs.push_back(std::make_pair(Scalar1, Scalar2));
3031 // For vectors extract each constant element into Inputs so we can constant
3032 // fold them individually.
3033 BuildVectorSDNode *BV1 = dyn_cast<BuildVectorSDNode>(Cst1);
3034 BuildVectorSDNode *BV2 = dyn_cast<BuildVectorSDNode>(Cst2);
3038 assert(BV1->getNumOperands() == BV2->getNumOperands() && "Out of sync!");
3040 for (unsigned I = 0, E = BV1->getNumOperands(); I != E; ++I) {
3041 ConstantSDNode *V1 = dyn_cast<ConstantSDNode>(BV1->getOperand(I));
3042 ConstantSDNode *V2 = dyn_cast<ConstantSDNode>(BV2->getOperand(I));
3043 if (!V1 || !V2) // Not a constant, bail.
3046 if (V1->isOpaque() || V2->isOpaque())
3049 // Avoid BUILD_VECTOR nodes that perform implicit truncation.
3050 // FIXME: This is valid and could be handled by truncating the APInts.
3051 if (V1->getValueType(0) != SVT || V2->getValueType(0) != SVT)
3054 Inputs.push_back(std::make_pair(V1, V2));
3058 // We have a number of constant values, constant fold them element by element.
3059 for (unsigned I = 0, E = Inputs.size(); I != E; ++I) {
3060 const APInt &C1 = Inputs[I].first->getAPIntValue();
3061 const APInt &C2 = Inputs[I].second->getAPIntValue();
3065 Outputs.push_back(getConstant(C1 + C2, SVT));
3068 Outputs.push_back(getConstant(C1 - C2, SVT));
3071 Outputs.push_back(getConstant(C1 * C2, SVT));
3074 if (!C2.getBoolValue())
3076 Outputs.push_back(getConstant(C1.udiv(C2), SVT));
3079 if (!C2.getBoolValue())
3081 Outputs.push_back(getConstant(C1.urem(C2), SVT));
3084 if (!C2.getBoolValue())
3086 Outputs.push_back(getConstant(C1.sdiv(C2), SVT));
3089 if (!C2.getBoolValue())
3091 Outputs.push_back(getConstant(C1.srem(C2), SVT));
3094 Outputs.push_back(getConstant(C1 & C2, SVT));
3097 Outputs.push_back(getConstant(C1 | C2, SVT));
3100 Outputs.push_back(getConstant(C1 ^ C2, SVT));
3103 Outputs.push_back(getConstant(C1 << C2, SVT));
3106 Outputs.push_back(getConstant(C1.lshr(C2), SVT));
3109 Outputs.push_back(getConstant(C1.ashr(C2), SVT));
3112 Outputs.push_back(getConstant(C1.rotl(C2), SVT));
3115 Outputs.push_back(getConstant(C1.rotr(C2), SVT));
3122 assert((Scalar1 && Scalar2) || (VT.getVectorNumElements() == Outputs.size() &&
3123 "Expected a scalar or vector!"));
3125 // Handle the scalar case first.
3127 return Outputs.back();
3129 // We may have a vector type but a scalar result. Create a splat.
3130 Outputs.resize(VT.getVectorNumElements(), Outputs.back());
3132 // Build a big vector out of the scalar elements we generated.
3133 return getNode(ISD::BUILD_VECTOR, SDLoc(), VT, Outputs);
3136 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT, SDValue N1,
3137 SDValue N2, bool nuw, bool nsw, bool exact) {
3138 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
3139 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
3142 case ISD::TokenFactor:
3143 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
3144 N2.getValueType() == MVT::Other && "Invalid token factor!");
3145 // Fold trivial token factors.
3146 if (N1.getOpcode() == ISD::EntryToken) return N2;
3147 if (N2.getOpcode() == ISD::EntryToken) return N1;
3148 if (N1 == N2) return N1;
3150 case ISD::CONCAT_VECTORS:
3151 // Concat of UNDEFs is UNDEF.
3152 if (N1.getOpcode() == ISD::UNDEF &&
3153 N2.getOpcode() == ISD::UNDEF)
3154 return getUNDEF(VT);
3156 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
3157 // one big BUILD_VECTOR.
3158 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
3159 N2.getOpcode() == ISD::BUILD_VECTOR) {
3160 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
3161 N1.getNode()->op_end());
3162 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
3163 return getNode(ISD::BUILD_VECTOR, DL, VT, Elts);
3167 assert(VT.isInteger() && "This operator does not apply to FP types!");
3168 assert(N1.getValueType() == N2.getValueType() &&
3169 N1.getValueType() == VT && "Binary operator types must match!");
3170 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
3171 // worth handling here.
3172 if (N2C && N2C->isNullValue())
3174 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
3181 assert(VT.isInteger() && "This operator does not apply to FP types!");
3182 assert(N1.getValueType() == N2.getValueType() &&
3183 N1.getValueType() == VT && "Binary operator types must match!");
3184 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
3185 // it's worth handling here.
3186 if (N2C && N2C->isNullValue())
3196 assert(VT.isInteger() && "This operator does not apply to FP types!");
3197 assert(N1.getValueType() == N2.getValueType() &&
3198 N1.getValueType() == VT && "Binary operator types must match!");
3205 if (getTarget().Options.UnsafeFPMath) {
3206 if (Opcode == ISD::FADD) {
3208 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
3209 if (CFP->getValueAPF().isZero())
3212 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
3213 if (CFP->getValueAPF().isZero())
3215 } else if (Opcode == ISD::FSUB) {
3217 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
3218 if (CFP->getValueAPF().isZero())
3220 } else if (Opcode == ISD::FMUL) {
3221 ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1);
3224 // If the first operand isn't the constant, try the second
3226 CFP = dyn_cast<ConstantFPSDNode>(N2);
3233 return SDValue(CFP,0);
3235 if (CFP->isExactlyValue(1.0))
3240 assert(VT.isFloatingPoint() && "This operator only applies to FP types!");
3241 assert(N1.getValueType() == N2.getValueType() &&
3242 N1.getValueType() == VT && "Binary operator types must match!");
3244 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
3245 assert(N1.getValueType() == VT &&
3246 N1.getValueType().isFloatingPoint() &&
3247 N2.getValueType().isFloatingPoint() &&
3248 "Invalid FCOPYSIGN!");
3255 assert(VT == N1.getValueType() &&
3256 "Shift operators return type must be the same as their first arg");
3257 assert(VT.isInteger() && N2.getValueType().isInteger() &&
3258 "Shifts only work on integers");
3259 assert((!VT.isVector() || VT == N2.getValueType()) &&
3260 "Vector shift amounts must be in the same as their first arg");
3261 // Verify that the shift amount VT is bit enough to hold valid shift
3262 // amounts. This catches things like trying to shift an i1024 value by an
3263 // i8, which is easy to fall into in generic code that uses
3264 // TLI.getShiftAmount().
3265 assert(N2.getValueType().getSizeInBits() >=
3266 Log2_32_Ceil(N1.getValueType().getSizeInBits()) &&
3267 "Invalid use of small shift amount with oversized value!");
3269 // Always fold shifts of i1 values so the code generator doesn't need to
3270 // handle them. Since we know the size of the shift has to be less than the
3271 // size of the value, the shift/rotate count is guaranteed to be zero.
3274 if (N2C && N2C->isNullValue())
3277 case ISD::FP_ROUND_INREG: {
3278 EVT EVT = cast<VTSDNode>(N2)->getVT();
3279 assert(VT == N1.getValueType() && "Not an inreg round!");
3280 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
3281 "Cannot FP_ROUND_INREG integer types");
3282 assert(EVT.isVector() == VT.isVector() &&
3283 "FP_ROUND_INREG type should be vector iff the operand "
3285 assert((!EVT.isVector() ||
3286 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
3287 "Vector element counts must match in FP_ROUND_INREG");
3288 assert(EVT.bitsLE(VT) && "Not rounding down!");
3290 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
3294 assert(VT.isFloatingPoint() &&
3295 N1.getValueType().isFloatingPoint() &&
3296 VT.bitsLE(N1.getValueType()) &&
3297 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
3298 if (N1.getValueType() == VT) return N1; // noop conversion.
3300 case ISD::AssertSext:
3301 case ISD::AssertZext: {
3302 EVT EVT = cast<VTSDNode>(N2)->getVT();
3303 assert(VT == N1.getValueType() && "Not an inreg extend!");
3304 assert(VT.isInteger() && EVT.isInteger() &&
3305 "Cannot *_EXTEND_INREG FP types");
3306 assert(!EVT.isVector() &&
3307 "AssertSExt/AssertZExt type should be the vector element type "
3308 "rather than the vector type!");
3309 assert(EVT.bitsLE(VT) && "Not extending!");
3310 if (VT == EVT) return N1; // noop assertion.
3313 case ISD::SIGN_EXTEND_INREG: {
3314 EVT EVT = cast<VTSDNode>(N2)->getVT();
3315 assert(VT == N1.getValueType() && "Not an inreg extend!");
3316 assert(VT.isInteger() && EVT.isInteger() &&
3317 "Cannot *_EXTEND_INREG FP types");
3318 assert(EVT.isVector() == VT.isVector() &&
3319 "SIGN_EXTEND_INREG type should be vector iff the operand "
3321 assert((!EVT.isVector() ||
3322 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
3323 "Vector element counts must match in SIGN_EXTEND_INREG");
3324 assert(EVT.bitsLE(VT) && "Not extending!");
3325 if (EVT == VT) return N1; // Not actually extending
3328 APInt Val = N1C->getAPIntValue();
3329 unsigned FromBits = EVT.getScalarType().getSizeInBits();
3330 Val <<= Val.getBitWidth()-FromBits;
3331 Val = Val.ashr(Val.getBitWidth()-FromBits);
3332 return getConstant(Val, VT);
3336 case ISD::EXTRACT_VECTOR_ELT:
3337 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
3338 if (N1.getOpcode() == ISD::UNDEF)
3339 return getUNDEF(VT);
3341 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
3342 // expanding copies of large vectors from registers.
3344 N1.getOpcode() == ISD::CONCAT_VECTORS &&
3345 N1.getNumOperands() > 0) {
3347 N1.getOperand(0).getValueType().getVectorNumElements();
3348 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
3349 N1.getOperand(N2C->getZExtValue() / Factor),
3350 getConstant(N2C->getZExtValue() % Factor,
3351 N2.getValueType()));
3354 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
3355 // expanding large vector constants.
3356 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
3357 SDValue Elt = N1.getOperand(N2C->getZExtValue());
3359 if (VT != Elt.getValueType())
3360 // If the vector element type is not legal, the BUILD_VECTOR operands
3361 // are promoted and implicitly truncated, and the result implicitly
3362 // extended. Make that explicit here.
3363 Elt = getAnyExtOrTrunc(Elt, DL, VT);
3368 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
3369 // operations are lowered to scalars.
3370 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
3371 // If the indices are the same, return the inserted element else
3372 // if the indices are known different, extract the element from
3373 // the original vector.
3374 SDValue N1Op2 = N1.getOperand(2);
3375 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode());
3377 if (N1Op2C && N2C) {
3378 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) {
3379 if (VT == N1.getOperand(1).getValueType())
3380 return N1.getOperand(1);
3382 return getSExtOrTrunc(N1.getOperand(1), DL, VT);
3385 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
3389 case ISD::EXTRACT_ELEMENT:
3390 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
3391 assert(!N1.getValueType().isVector() && !VT.isVector() &&
3392 (N1.getValueType().isInteger() == VT.isInteger()) &&
3393 N1.getValueType() != VT &&
3394 "Wrong types for EXTRACT_ELEMENT!");
3396 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
3397 // 64-bit integers into 32-bit parts. Instead of building the extract of
3398 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
3399 if (N1.getOpcode() == ISD::BUILD_PAIR)
3400 return N1.getOperand(N2C->getZExtValue());
3402 // EXTRACT_ELEMENT of a constant int is also very common.
3403 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
3404 unsigned ElementSize = VT.getSizeInBits();
3405 unsigned Shift = ElementSize * N2C->getZExtValue();
3406 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
3407 return getConstant(ShiftedVal.trunc(ElementSize), VT);
3410 case ISD::EXTRACT_SUBVECTOR: {
3412 if (VT.isSimple() && N1.getValueType().isSimple()) {
3413 assert(VT.isVector() && N1.getValueType().isVector() &&
3414 "Extract subvector VTs must be a vectors!");
3415 assert(VT.getVectorElementType() ==
3416 N1.getValueType().getVectorElementType() &&
3417 "Extract subvector VTs must have the same element type!");
3418 assert(VT.getSimpleVT() <= N1.getSimpleValueType() &&
3419 "Extract subvector must be from larger vector to smaller vector!");
3421 if (isa<ConstantSDNode>(Index.getNode())) {
3422 assert((VT.getVectorNumElements() +
3423 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
3424 <= N1.getValueType().getVectorNumElements())
3425 && "Extract subvector overflow!");
3428 // Trivial extraction.
3429 if (VT.getSimpleVT() == N1.getSimpleValueType())
3436 // Perform trivial constant folding.
3438 FoldConstantArithmetic(Opcode, VT, N1.getNode(), N2.getNode()))
3441 // Canonicalize constant to RHS if commutative.
3442 if (N1C && !N2C && isCommutativeBinOp(Opcode)) {
3443 std::swap(N1C, N2C);
3447 // Constant fold FP operations.
3448 bool HasFPExceptions = TLI->hasFloatingPointExceptions();
3449 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
3450 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
3452 if (!N2CFP && isCommutativeBinOp(Opcode)) {
3453 // Canonicalize constant to RHS if commutative.
3454 std::swap(N1CFP, N2CFP);
3457 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
3458 APFloat::opStatus s;
3461 s = V1.add(V2, APFloat::rmNearestTiesToEven);
3462 if (!HasFPExceptions || s != APFloat::opInvalidOp)
3463 return getConstantFP(V1, VT);
3466 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
3467 if (!HasFPExceptions || s!=APFloat::opInvalidOp)
3468 return getConstantFP(V1, VT);
3471 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
3472 if (!HasFPExceptions || s!=APFloat::opInvalidOp)
3473 return getConstantFP(V1, VT);
3476 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
3477 if (!HasFPExceptions || (s!=APFloat::opInvalidOp &&
3478 s!=APFloat::opDivByZero)) {
3479 return getConstantFP(V1, VT);
3483 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
3484 if (!HasFPExceptions || (s!=APFloat::opInvalidOp &&
3485 s!=APFloat::opDivByZero)) {
3486 return getConstantFP(V1, VT);
3489 case ISD::FCOPYSIGN:
3491 return getConstantFP(V1, VT);
3496 if (Opcode == ISD::FP_ROUND) {
3497 APFloat V = N1CFP->getValueAPF(); // make copy
3499 // This can return overflow, underflow, or inexact; we don't care.
3500 // FIXME need to be more flexible about rounding mode.
3501 (void)V.convert(EVTToAPFloatSemantics(VT),
3502 APFloat::rmNearestTiesToEven, &ignored);
3503 return getConstantFP(V, VT);
3507 // Canonicalize an UNDEF to the RHS, even over a constant.
3508 if (N1.getOpcode() == ISD::UNDEF) {
3509 if (isCommutativeBinOp(Opcode)) {
3513 case ISD::FP_ROUND_INREG:
3514 case ISD::SIGN_EXTEND_INREG:
3520 return N1; // fold op(undef, arg2) -> undef
3528 return getConstant(0, VT); // fold op(undef, arg2) -> 0
3529 // For vectors, we can't easily build an all zero vector, just return
3536 // Fold a bunch of operators when the RHS is undef.
3537 if (N2.getOpcode() == ISD::UNDEF) {
3540 if (N1.getOpcode() == ISD::UNDEF)
3541 // Handle undef ^ undef -> 0 special case. This is a common
3543 return getConstant(0, VT);
3553 return N2; // fold op(arg1, undef) -> undef
3559 if (getTarget().Options.UnsafeFPMath)
3567 return getConstant(0, VT); // fold op(arg1, undef) -> 0
3568 // For vectors, we can't easily build an all zero vector, just return
3573 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
3574 // For vectors, we can't easily build an all one vector, just return
3582 // Memoize this node if possible.
3584 SDVTList VTs = getVTList(VT);
3585 const bool BinOpHasFlags = isBinOpWithFlags(Opcode);
3586 if (VT != MVT::Glue) {
3587 SDValue Ops[] = {N1, N2};
3588 FoldingSetNodeID ID;
3589 AddNodeIDNode(ID, Opcode, VTs, Ops);
3591 AddBinaryNodeIDCustom(ID, Opcode, nuw, nsw, exact);
3593 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3594 return SDValue(E, 0);
3596 N = GetBinarySDNode(Opcode, DL, VTs, N1, N2, nuw, nsw, exact);
3598 CSEMap.InsertNode(N, IP);
3601 N = GetBinarySDNode(Opcode, DL, VTs, N1, N2, nuw, nsw, exact);
3605 return SDValue(N, 0);
3608 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
3609 SDValue N1, SDValue N2, SDValue N3) {
3610 // Perform various simplifications.
3611 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
3614 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1);
3615 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2);
3616 ConstantFPSDNode *N3CFP = dyn_cast<ConstantFPSDNode>(N3);
3617 if (N1CFP && N2CFP && N3CFP) {
3618 APFloat V1 = N1CFP->getValueAPF();
3619 const APFloat &V2 = N2CFP->getValueAPF();
3620 const APFloat &V3 = N3CFP->getValueAPF();
3621 APFloat::opStatus s =
3622 V1.fusedMultiplyAdd(V2, V3, APFloat::rmNearestTiesToEven);
3623 if (!TLI->hasFloatingPointExceptions() || s != APFloat::opInvalidOp)
3624 return getConstantFP(V1, VT);
3628 case ISD::CONCAT_VECTORS:
3629 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
3630 // one big BUILD_VECTOR.
3631 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
3632 N2.getOpcode() == ISD::BUILD_VECTOR &&
3633 N3.getOpcode() == ISD::BUILD_VECTOR) {
3634 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
3635 N1.getNode()->op_end());
3636 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
3637 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end());
3638 return getNode(ISD::BUILD_VECTOR, DL, VT, Elts);
3642 // Use FoldSetCC to simplify SETCC's.
3643 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
3644 if (Simp.getNode()) return Simp;
3649 if (N1C->getZExtValue())
3650 return N2; // select true, X, Y -> X
3651 return N3; // select false, X, Y -> Y
3654 if (N2 == N3) return N2; // select C, X, X -> X
3656 case ISD::VECTOR_SHUFFLE:
3657 llvm_unreachable("should use getVectorShuffle constructor!");
3658 case ISD::INSERT_SUBVECTOR: {
3660 if (VT.isSimple() && N1.getValueType().isSimple()
3661 && N2.getValueType().isSimple()) {
3662 assert(VT.isVector() && N1.getValueType().isVector() &&
3663 N2.getValueType().isVector() &&
3664 "Insert subvector VTs must be a vectors");
3665 assert(VT == N1.getValueType() &&
3666 "Dest and insert subvector source types must match!");
3667 assert(N2.getSimpleValueType() <= N1.getSimpleValueType() &&
3668 "Insert subvector must be from smaller vector to larger vector!");
3669 if (isa<ConstantSDNode>(Index.getNode())) {
3670 assert((N2.getValueType().getVectorNumElements() +
3671 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
3672 <= VT.getVectorNumElements())
3673 && "Insert subvector overflow!");
3676 // Trivial insertion.
3677 if (VT.getSimpleVT() == N2.getSimpleValueType())
3683 // Fold bit_convert nodes from a type to themselves.
3684 if (N1.getValueType() == VT)
3689 // Memoize node if it doesn't produce a flag.
3691 SDVTList VTs = getVTList(VT);
3692 if (VT != MVT::Glue) {
3693 SDValue Ops[] = { N1, N2, N3 };
3694 FoldingSetNodeID ID;
3695 AddNodeIDNode(ID, Opcode, VTs, Ops);
3697 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3698 return SDValue(E, 0);
3700 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(),
3701 DL.getDebugLoc(), VTs, N1, N2, N3);
3702 CSEMap.InsertNode(N, IP);
3704 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(),
3705 DL.getDebugLoc(), VTs, N1, N2, N3);
3709 return SDValue(N, 0);
3712 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
3713 SDValue N1, SDValue N2, SDValue N3,
3715 SDValue Ops[] = { N1, N2, N3, N4 };
3716 return getNode(Opcode, DL, VT, Ops);
3719 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
3720 SDValue N1, SDValue N2, SDValue N3,
3721 SDValue N4, SDValue N5) {
3722 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3723 return getNode(Opcode, DL, VT, Ops);
3726 /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
3727 /// the incoming stack arguments to be loaded from the stack.
3728 SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) {
3729 SmallVector<SDValue, 8> ArgChains;
3731 // Include the original chain at the beginning of the list. When this is
3732 // used by target LowerCall hooks, this helps legalize find the
3733 // CALLSEQ_BEGIN node.
3734 ArgChains.push_back(Chain);
3736 // Add a chain value for each stack argument.
3737 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
3738 UE = getEntryNode().getNode()->use_end(); U != UE; ++U)
3739 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
3740 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
3741 if (FI->getIndex() < 0)
3742 ArgChains.push_back(SDValue(L, 1));
3744 // Build a tokenfactor for all the chains.
3745 return getNode(ISD::TokenFactor, SDLoc(Chain), MVT::Other, ArgChains);
3748 /// getMemsetValue - Vectorized representation of the memset value
3750 static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
3752 assert(Value.getOpcode() != ISD::UNDEF);
3754 unsigned NumBits = VT.getScalarType().getSizeInBits();
3755 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
3756 assert(C->getAPIntValue().getBitWidth() == 8);
3757 APInt Val = APInt::getSplat(NumBits, C->getAPIntValue());
3759 return DAG.getConstant(Val, VT);
3760 return DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(VT), Val), VT);
3763 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value);
3765 // Use a multiplication with 0x010101... to extend the input to the
3767 APInt Magic = APInt::getSplat(NumBits, APInt(8, 0x01));
3768 Value = DAG.getNode(ISD::MUL, dl, VT, Value, DAG.getConstant(Magic, VT));
3774 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
3775 /// used when a memcpy is turned into a memset when the source is a constant
3777 static SDValue getMemsetStringVal(EVT VT, SDLoc dl, SelectionDAG &DAG,
3778 const TargetLowering &TLI, StringRef Str) {
3779 // Handle vector with all elements zero.
3782 return DAG.getConstant(0, VT);
3783 else if (VT == MVT::f32 || VT == MVT::f64 || VT == MVT::f128)
3784 return DAG.getConstantFP(0.0, VT);
3785 else if (VT.isVector()) {
3786 unsigned NumElts = VT.getVectorNumElements();
3787 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
3788 return DAG.getNode(ISD::BITCAST, dl, VT,
3789 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(),
3792 llvm_unreachable("Expected type!");
3795 assert(!VT.isVector() && "Can't handle vector type here!");
3796 unsigned NumVTBits = VT.getSizeInBits();
3797 unsigned NumVTBytes = NumVTBits / 8;
3798 unsigned NumBytes = std::min(NumVTBytes, unsigned(Str.size()));
3800 APInt Val(NumVTBits, 0);
3801 if (TLI.isLittleEndian()) {
3802 for (unsigned i = 0; i != NumBytes; ++i)
3803 Val |= (uint64_t)(unsigned char)Str[i] << i*8;
3805 for (unsigned i = 0; i != NumBytes; ++i)
3806 Val |= (uint64_t)(unsigned char)Str[i] << (NumVTBytes-i-1)*8;
3809 // If the "cost" of materializing the integer immediate is less than the cost
3810 // of a load, then it is cost effective to turn the load into the immediate.
3811 Type *Ty = VT.getTypeForEVT(*DAG.getContext());
3812 if (TLI.shouldConvertConstantLoadToIntImm(Val, Ty))
3813 return DAG.getConstant(Val, VT);
3814 return SDValue(nullptr, 0);
3817 /// getMemBasePlusOffset - Returns base and offset node for the
3819 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, SDLoc dl,
3820 SelectionDAG &DAG) {
3821 EVT VT = Base.getValueType();
3822 return DAG.getNode(ISD::ADD, dl,
3823 VT, Base, DAG.getConstant(Offset, VT));
3826 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
3828 static bool isMemSrcFromString(SDValue Src, StringRef &Str) {
3829 unsigned SrcDelta = 0;
3830 GlobalAddressSDNode *G = nullptr;
3831 if (Src.getOpcode() == ISD::GlobalAddress)
3832 G = cast<GlobalAddressSDNode>(Src);
3833 else if (Src.getOpcode() == ISD::ADD &&
3834 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
3835 Src.getOperand(1).getOpcode() == ISD::Constant) {
3836 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
3837 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
3842 return getConstantStringInfo(G->getGlobal(), Str, SrcDelta, false);
3845 /// FindOptimalMemOpLowering - Determines the optimial series memory ops
3846 /// to replace the memset / memcpy. Return true if the number of memory ops
3847 /// is below the threshold. It returns the types of the sequence of
3848 /// memory ops to perform memset / memcpy by reference.
3849 static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps,
3850 unsigned Limit, uint64_t Size,
3851 unsigned DstAlign, unsigned SrcAlign,
3857 const TargetLowering &TLI) {
3858 assert((SrcAlign == 0 || SrcAlign >= DstAlign) &&
3859 "Expecting memcpy / memset source to meet alignment requirement!");
3860 // If 'SrcAlign' is zero, that means the memory operation does not need to
3861 // load the value, i.e. memset or memcpy from constant string. Otherwise,
3862 // it's the inferred alignment of the source. 'DstAlign', on the other hand,
3863 // is the specified alignment of the memory operation. If it is zero, that
3864 // means it's possible to change the alignment of the destination.
3865 // 'MemcpyStrSrc' indicates whether the memcpy source is constant so it does
3866 // not need to be loaded.
3867 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign,
3868 IsMemset, ZeroMemset, MemcpyStrSrc,
3869 DAG.getMachineFunction());
3871 if (VT == MVT::Other) {
3873 if (DstAlign >= TLI.getDataLayout()->getPointerPrefAlignment(AS) ||
3874 TLI.allowsMisalignedMemoryAccesses(VT, AS, DstAlign)) {
3875 VT = TLI.getPointerTy();
3877 switch (DstAlign & 7) {
3878 case 0: VT = MVT::i64; break;
3879 case 4: VT = MVT::i32; break;
3880 case 2: VT = MVT::i16; break;
3881 default: VT = MVT::i8; break;
3886 while (!TLI.isTypeLegal(LVT))
3887 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1);
3888 assert(LVT.isInteger());
3894 unsigned NumMemOps = 0;
3896 unsigned VTSize = VT.getSizeInBits() / 8;
3897 while (VTSize > Size) {
3898 // For now, only use non-vector load / store's for the left-over pieces.
3903 if (VT.isVector() || VT.isFloatingPoint()) {
3904 NewVT = (VT.getSizeInBits() > 64) ? MVT::i64 : MVT::i32;
3905 if (TLI.isOperationLegalOrCustom(ISD::STORE, NewVT) &&
3906 TLI.isSafeMemOpType(NewVT.getSimpleVT()))
3908 else if (NewVT == MVT::i64 &&
3909 TLI.isOperationLegalOrCustom(ISD::STORE, MVT::f64) &&
3910 TLI.isSafeMemOpType(MVT::f64)) {
3911 // i64 is usually not legal on 32-bit targets, but f64 may be.
3919 NewVT = (MVT::SimpleValueType)(NewVT.getSimpleVT().SimpleTy - 1);
3920 if (NewVT == MVT::i8)
3922 } while (!TLI.isSafeMemOpType(NewVT.getSimpleVT()));
3924 NewVTSize = NewVT.getSizeInBits() / 8;
3926 // If the new VT cannot cover all of the remaining bits, then consider
3927 // issuing a (or a pair of) unaligned and overlapping load / store.
3928 // FIXME: Only does this for 64-bit or more since we don't have proper
3929 // cost model for unaligned load / store.
3932 if (NumMemOps && AllowOverlap &&
3933 VTSize >= 8 && NewVTSize < Size &&
3934 TLI.allowsMisalignedMemoryAccesses(VT, AS, DstAlign, &Fast) && Fast)
3942 if (++NumMemOps > Limit)
3945 MemOps.push_back(VT);
3952 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, SDLoc dl,
3953 SDValue Chain, SDValue Dst,
3954 SDValue Src, uint64_t Size,
3955 unsigned Align, bool isVol,
3957 MachinePointerInfo DstPtrInfo,
3958 MachinePointerInfo SrcPtrInfo) {
3959 // Turn a memcpy of undef to nop.
3960 if (Src.getOpcode() == ISD::UNDEF)
3963 // Expand memcpy to a series of load and store ops if the size operand falls
3964 // below a certain threshold.
3965 // TODO: In the AlwaysInline case, if the size is big then generate a loop
3966 // rather than maybe a humongous number of loads and stores.
3967 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3968 std::vector<EVT> MemOps;
3969 bool DstAlignCanChange = false;
3970 MachineFunction &MF = DAG.getMachineFunction();
3971 MachineFrameInfo *MFI = MF.getFrameInfo();
3973 MF.getFunction()->getAttributes().
3974 hasAttribute(AttributeSet::FunctionIndex, Attribute::OptimizeForSize);
3975 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3976 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3977 DstAlignCanChange = true;
3978 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3979 if (Align > SrcAlign)
3982 bool CopyFromStr = isMemSrcFromString(Src, Str);
3983 bool isZeroStr = CopyFromStr && Str.empty();
3984 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(OptSize);
3986 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3987 (DstAlignCanChange ? 0 : Align),
3988 (isZeroStr ? 0 : SrcAlign),
3989 false, false, CopyFromStr, true, DAG, TLI))
3992 if (DstAlignCanChange) {
3993 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3994 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
3996 // Don't promote to an alignment that would require dynamic stack
3998 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
3999 if (!TRI->needsStackRealignment(MF))
4000 while (NewAlign > Align &&
4001 TLI.getDataLayout()->exceedsNaturalStackAlignment(NewAlign))
4004 if (NewAlign > Align) {
4005 // Give the stack frame object a larger alignment if needed.
4006 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
4007 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
4012 SmallVector<SDValue, 8> OutChains;
4013 unsigned NumMemOps = MemOps.size();
4014 uint64_t SrcOff = 0, DstOff = 0;
4015 for (unsigned i = 0; i != NumMemOps; ++i) {
4017 unsigned VTSize = VT.getSizeInBits() / 8;
4018 SDValue Value, Store;
4020 if (VTSize > Size) {
4021 // Issuing an unaligned load / store pair that overlaps with the previous
4022 // pair. Adjust the offset accordingly.
4023 assert(i == NumMemOps-1 && i != 0);
4024 SrcOff -= VTSize - Size;
4025 DstOff -= VTSize - Size;
4029 (isZeroStr || (VT.isInteger() && !VT.isVector()))) {
4030 // It's unlikely a store of a vector immediate can be done in a single
4031 // instruction. It would require a load from a constantpool first.
4032 // We only handle zero vectors here.
4033 // FIXME: Handle other cases where store of vector immediate is done in
4034 // a single instruction.
4035 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str.substr(SrcOff));
4036 if (Value.getNode())
4037 Store = DAG.getStore(Chain, dl, Value,
4038 getMemBasePlusOffset(Dst, DstOff, dl, DAG),
4039 DstPtrInfo.getWithOffset(DstOff), isVol,
4043 if (!Store.getNode()) {
4044 // The type might not be legal for the target. This should only happen
4045 // if the type is smaller than a legal type, as on PPC, so the right
4046 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify
4047 // to Load/Store if NVT==VT.
4048 // FIXME does the case above also need this?
4049 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
4050 assert(NVT.bitsGE(VT));
4051 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain,
4052 getMemBasePlusOffset(Src, SrcOff, dl, DAG),
4053 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false,
4054 false, MinAlign(SrcAlign, SrcOff));
4055 Store = DAG.getTruncStore(Chain, dl, Value,
4056 getMemBasePlusOffset(Dst, DstOff, dl, DAG),
4057 DstPtrInfo.getWithOffset(DstOff), VT, isVol,
4060 OutChains.push_back(Store);
4066 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains);
4069 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, SDLoc dl,
4070 SDValue Chain, SDValue Dst,
4071 SDValue Src, uint64_t Size,
4072 unsigned Align, bool isVol,
4074 MachinePointerInfo DstPtrInfo,
4075 MachinePointerInfo SrcPtrInfo) {
4076 // Turn a memmove of undef to nop.
4077 if (Src.getOpcode() == ISD::UNDEF)
4080 // Expand memmove to a series of load and store ops if the size operand falls
4081 // below a certain threshold.
4082 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
4083 std::vector<EVT> MemOps;
4084 bool DstAlignCanChange = false;
4085 MachineFunction &MF = DAG.getMachineFunction();
4086 MachineFrameInfo *MFI = MF.getFrameInfo();
4087 bool OptSize = MF.getFunction()->getAttributes().
4088 hasAttribute(AttributeSet::FunctionIndex, Attribute::OptimizeForSize);
4089 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
4090 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
4091 DstAlignCanChange = true;
4092 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
4093 if (Align > SrcAlign)
4095 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(OptSize);
4097 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
4098 (DstAlignCanChange ? 0 : Align), SrcAlign,
4099 false, false, false, false, DAG, TLI))
4102 if (DstAlignCanChange) {
4103 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
4104 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
4105 if (NewAlign > Align) {
4106 // Give the stack frame object a larger alignment if needed.
4107 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
4108 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
4113 uint64_t SrcOff = 0, DstOff = 0;
4114 SmallVector<SDValue, 8> LoadValues;
4115 SmallVector<SDValue, 8> LoadChains;
4116 SmallVector<SDValue, 8> OutChains;
4117 unsigned NumMemOps = MemOps.size();
4118 for (unsigned i = 0; i < NumMemOps; i++) {
4120 unsigned VTSize = VT.getSizeInBits() / 8;
4123 Value = DAG.getLoad(VT, dl, Chain,
4124 getMemBasePlusOffset(Src, SrcOff, dl, DAG),
4125 SrcPtrInfo.getWithOffset(SrcOff), isVol,
4126 false, false, SrcAlign);
4127 LoadValues.push_back(Value);
4128 LoadChains.push_back(Value.getValue(1));
4131 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, LoadChains);
4133 for (unsigned i = 0; i < NumMemOps; i++) {
4135 unsigned VTSize = VT.getSizeInBits() / 8;
4138 Store = DAG.getStore(Chain, dl, LoadValues[i],
4139 getMemBasePlusOffset(Dst, DstOff, dl, DAG),
4140 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align);
4141 OutChains.push_back(Store);
4145 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains);
4148 /// \brief Lower the call to 'memset' intrinsic function into a series of store
4151 /// \param DAG Selection DAG where lowered code is placed.
4152 /// \param dl Link to corresponding IR location.
4153 /// \param Chain Control flow dependency.
4154 /// \param Dst Pointer to destination memory location.
4155 /// \param Src Value of byte to write into the memory.
4156 /// \param Size Number of bytes to write.
4157 /// \param Align Alignment of the destination in bytes.
4158 /// \param isVol True if destination is volatile.
4159 /// \param DstPtrInfo IR information on the memory pointer.
4160 /// \returns New head in the control flow, if lowering was successful, empty
4161 /// SDValue otherwise.
4163 /// The function tries to replace 'llvm.memset' intrinsic with several store
4164 /// operations and value calculation code. This is usually profitable for small
4166 static SDValue getMemsetStores(SelectionDAG &DAG, SDLoc dl,
4167 SDValue Chain, SDValue Dst,
4168 SDValue Src, uint64_t Size,
4169 unsigned Align, bool isVol,
4170 MachinePointerInfo DstPtrInfo) {
4171 // Turn a memset of undef to nop.
4172 if (Src.getOpcode() == ISD::UNDEF)
4175 // Expand memset to a series of load/store ops if the size operand
4176 // falls below a certain threshold.
4177 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
4178 std::vector<EVT> MemOps;
4179 bool DstAlignCanChange = false;
4180 MachineFunction &MF = DAG.getMachineFunction();
4181 MachineFrameInfo *MFI = MF.getFrameInfo();
4182 bool OptSize = MF.getFunction()->getAttributes().
4183 hasAttribute(AttributeSet::FunctionIndex, Attribute::OptimizeForSize);
4184 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
4185 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
4186 DstAlignCanChange = true;
4188 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue();
4189 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(OptSize),
4190 Size, (DstAlignCanChange ? 0 : Align), 0,
4191 true, IsZeroVal, false, true, DAG, TLI))
4194 if (DstAlignCanChange) {
4195 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
4196 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
4197 if (NewAlign > Align) {
4198 // Give the stack frame object a larger alignment if needed.
4199 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
4200 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
4205 SmallVector<SDValue, 8> OutChains;
4206 uint64_t DstOff = 0;
4207 unsigned NumMemOps = MemOps.size();
4209 // Find the largest store and generate the bit pattern for it.
4210 EVT LargestVT = MemOps[0];
4211 for (unsigned i = 1; i < NumMemOps; i++)
4212 if (MemOps[i].bitsGT(LargestVT))
4213 LargestVT = MemOps[i];
4214 SDValue MemSetValue = getMemsetValue(Src, LargestVT, DAG, dl);
4216 for (unsigned i = 0; i < NumMemOps; i++) {
4218 unsigned VTSize = VT.getSizeInBits() / 8;
4219 if (VTSize > Size) {
4220 // Issuing an unaligned load / store pair that overlaps with the previous
4221 // pair. Adjust the offset accordingly.
4222 assert(i == NumMemOps-1 && i != 0);
4223 DstOff -= VTSize - Size;
4226 // If this store is smaller than the largest store see whether we can get
4227 // the smaller value for free with a truncate.
4228 SDValue Value = MemSetValue;
4229 if (VT.bitsLT(LargestVT)) {
4230 if (!LargestVT.isVector() && !VT.isVector() &&
4231 TLI.isTruncateFree(LargestVT, VT))
4232 Value = DAG.getNode(ISD::TRUNCATE, dl, VT, MemSetValue);
4234 Value = getMemsetValue(Src, VT, DAG, dl);
4236 assert(Value.getValueType() == VT && "Value with wrong type.");
4237 SDValue Store = DAG.getStore(Chain, dl, Value,
4238 getMemBasePlusOffset(Dst, DstOff, dl, DAG),
4239 DstPtrInfo.getWithOffset(DstOff),
4240 isVol, false, Align);
4241 OutChains.push_back(Store);
4242 DstOff += VT.getSizeInBits() / 8;
4246 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains);
4249 SDValue SelectionDAG::getMemcpy(SDValue Chain, SDLoc dl, SDValue Dst,
4250 SDValue Src, SDValue Size,
4251 unsigned Align, bool isVol, bool AlwaysInline,
4252 MachinePointerInfo DstPtrInfo,
4253 MachinePointerInfo SrcPtrInfo) {
4254 assert(Align && "The SDAG layer expects explicit alignment and reserves 0");
4256 // Check to see if we should lower the memcpy to loads and stores first.
4257 // For cases within the target-specified limits, this is the best choice.
4258 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
4260 // Memcpy with size zero? Just return the original chain.
4261 if (ConstantSize->isNullValue())
4264 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
4265 ConstantSize->getZExtValue(),Align,
4266 isVol, false, DstPtrInfo, SrcPtrInfo);
4267 if (Result.getNode())
4271 // Then check to see if we should lower the memcpy with target-specific
4272 // code. If the target chooses to do this, this is the next best.
4274 TSI->EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align,
4275 isVol, AlwaysInline, DstPtrInfo, SrcPtrInfo);
4276 if (Result.getNode())
4279 // If we really need inline code and the target declined to provide it,
4280 // use a (potentially long) sequence of loads and stores.
4282 assert(ConstantSize && "AlwaysInline requires a constant size!");
4283 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
4284 ConstantSize->getZExtValue(), Align, isVol,
4285 true, DstPtrInfo, SrcPtrInfo);
4288 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc
4289 // memcpy is not guaranteed to be safe. libc memcpys aren't required to
4290 // respect volatile, so they may do things like read or write memory
4291 // beyond the given memory regions. But fixing this isn't easy, and most
4292 // people don't care.
4294 // Emit a library call.
4295 TargetLowering::ArgListTy Args;
4296 TargetLowering::ArgListEntry Entry;
4297 Entry.Ty = TLI->getDataLayout()->getIntPtrType(*getContext());
4298 Entry.Node = Dst; Args.push_back(Entry);
4299 Entry.Node = Src; Args.push_back(Entry);
4300 Entry.Node = Size; Args.push_back(Entry);
4301 // FIXME: pass in SDLoc
4302 TargetLowering::CallLoweringInfo CLI(*this);
4303 CLI.setDebugLoc(dl).setChain(Chain)
4304 .setCallee(TLI->getLibcallCallingConv(RTLIB::MEMCPY),
4305 Type::getVoidTy(*getContext()),
4306 getExternalSymbol(TLI->getLibcallName(RTLIB::MEMCPY),
4307 TLI->getPointerTy()), std::move(Args), 0)
4308 .setDiscardResult();
4309 std::pair<SDValue,SDValue> CallResult = TLI->LowerCallTo(CLI);
4311 return CallResult.second;
4314 SDValue SelectionDAG::getMemmove(SDValue Chain, SDLoc dl, SDValue Dst,
4315 SDValue Src, SDValue Size,
4316 unsigned Align, bool isVol,
4317 MachinePointerInfo DstPtrInfo,
4318 MachinePointerInfo SrcPtrInfo) {
4319 assert(Align && "The SDAG layer expects explicit alignment and reserves 0");
4321 // Check to see if we should lower the memmove to loads and stores first.
4322 // For cases within the target-specified limits, this is the best choice.
4323 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
4325 // Memmove with size zero? Just return the original chain.
4326 if (ConstantSize->isNullValue())
4330 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
4331 ConstantSize->getZExtValue(), Align, isVol,
4332 false, DstPtrInfo, SrcPtrInfo);
4333 if (Result.getNode())
4337 // Then check to see if we should lower the memmove with target-specific
4338 // code. If the target chooses to do this, this is the next best.
4339 SDValue Result = TSI->EmitTargetCodeForMemmove(
4340 *this, dl, Chain, Dst, Src, Size, Align, isVol, DstPtrInfo, SrcPtrInfo);
4341 if (Result.getNode())
4344 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may
4345 // not be safe. See memcpy above for more details.
4347 // Emit a library call.
4348 TargetLowering::ArgListTy Args;
4349 TargetLowering::ArgListEntry Entry;
4350 Entry.Ty = TLI->getDataLayout()->getIntPtrType(*getContext());
4351 Entry.Node = Dst; Args.push_back(Entry);
4352 Entry.Node = Src; Args.push_back(Entry);
4353 Entry.Node = Size; Args.push_back(Entry);
4354 // FIXME: pass in SDLoc
4355 TargetLowering::CallLoweringInfo CLI(*this);
4356 CLI.setDebugLoc(dl).setChain(Chain)
4357 .setCallee(TLI->getLibcallCallingConv(RTLIB::MEMMOVE),
4358 Type::getVoidTy(*getContext()),
4359 getExternalSymbol(TLI->getLibcallName(RTLIB::MEMMOVE),
4360 TLI->getPointerTy()), std::move(Args), 0)
4361 .setDiscardResult();
4362 std::pair<SDValue,SDValue> CallResult = TLI->LowerCallTo(CLI);
4364 return CallResult.second;
4367 SDValue SelectionDAG::getMemset(SDValue Chain, SDLoc dl, SDValue Dst,
4368 SDValue Src, SDValue Size,
4369 unsigned Align, bool isVol,
4370 MachinePointerInfo DstPtrInfo) {
4371 assert(Align && "The SDAG layer expects explicit alignment and reserves 0");
4373 // Check to see if we should lower the memset to stores first.
4374 // For cases within the target-specified limits, this is the best choice.
4375 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
4377 // Memset with size zero? Just return the original chain.
4378 if (ConstantSize->isNullValue())
4382 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
4383 Align, isVol, DstPtrInfo);
4385 if (Result.getNode())
4389 // Then check to see if we should lower the memset with target-specific
4390 // code. If the target chooses to do this, this is the next best.
4391 SDValue Result = TSI->EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src,
4392 Size, Align, isVol, DstPtrInfo);
4393 if (Result.getNode())
4396 // Emit a library call.
4397 Type *IntPtrTy = TLI->getDataLayout()->getIntPtrType(*getContext());
4398 TargetLowering::ArgListTy Args;
4399 TargetLowering::ArgListEntry Entry;
4400 Entry.Node = Dst; Entry.Ty = IntPtrTy;
4401 Args.push_back(Entry);
4403 Entry.Ty = Src.getValueType().getTypeForEVT(*getContext());
4404 Args.push_back(Entry);
4406 Entry.Ty = IntPtrTy;
4407 Args.push_back(Entry);
4409 // FIXME: pass in SDLoc
4410 TargetLowering::CallLoweringInfo CLI(*this);
4411 CLI.setDebugLoc(dl).setChain(Chain)
4412 .setCallee(TLI->getLibcallCallingConv(RTLIB::MEMSET),
4413 Type::getVoidTy(*getContext()),
4414 getExternalSymbol(TLI->getLibcallName(RTLIB::MEMSET),
4415 TLI->getPointerTy()), std::move(Args), 0)
4416 .setDiscardResult();
4418 std::pair<SDValue,SDValue> CallResult = TLI->LowerCallTo(CLI);
4419 return CallResult.second;
4422 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4423 SDVTList VTList, ArrayRef<SDValue> Ops,
4424 MachineMemOperand *MMO,
4425 AtomicOrdering SuccessOrdering,
4426 AtomicOrdering FailureOrdering,
4427 SynchronizationScope SynchScope) {
4428 FoldingSetNodeID ID;
4429 ID.AddInteger(MemVT.getRawBits());
4430 AddNodeIDNode(ID, Opcode, VTList, Ops);
4431 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4433 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4434 cast<AtomicSDNode>(E)->refineAlignment(MMO);
4435 return SDValue(E, 0);
4438 // Allocate the operands array for the node out of the BumpPtrAllocator, since
4439 // SDNode doesn't have access to it. This memory will be "leaked" when
4440 // the node is deallocated, but recovered when the allocator is released.
4441 // If the number of operands is less than 5 we use AtomicSDNode's internal
4443 unsigned NumOps = Ops.size();
4444 SDUse *DynOps = NumOps > 4 ? OperandAllocator.Allocate<SDUse>(NumOps)
4447 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl.getIROrder(),
4448 dl.getDebugLoc(), VTList, MemVT,
4449 Ops.data(), DynOps, NumOps, MMO,
4450 SuccessOrdering, FailureOrdering,
4452 CSEMap.InsertNode(N, IP);
4454 return SDValue(N, 0);
4457 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4458 SDVTList VTList, ArrayRef<SDValue> Ops,
4459 MachineMemOperand *MMO,
4460 AtomicOrdering Ordering,
4461 SynchronizationScope SynchScope) {
4462 return getAtomic(Opcode, dl, MemVT, VTList, Ops, MMO, Ordering,
4463 Ordering, SynchScope);
4466 SDValue SelectionDAG::getAtomicCmpSwap(
4467 unsigned Opcode, SDLoc dl, EVT MemVT, SDVTList VTs, SDValue Chain,
4468 SDValue Ptr, SDValue Cmp, SDValue Swp, MachinePointerInfo PtrInfo,
4469 unsigned Alignment, AtomicOrdering SuccessOrdering,
4470 AtomicOrdering FailureOrdering, SynchronizationScope SynchScope) {
4471 assert(Opcode == ISD::ATOMIC_CMP_SWAP ||
4472 Opcode == ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS);
4473 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
4475 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4476 Alignment = getEVTAlignment(MemVT);
4478 MachineFunction &MF = getMachineFunction();
4480 // FIXME: Volatile isn't really correct; we should keep track of atomic
4481 // orderings in the memoperand.
4482 unsigned Flags = MachineMemOperand::MOVolatile;
4483 Flags |= MachineMemOperand::MOLoad;
4484 Flags |= MachineMemOperand::MOStore;
4486 MachineMemOperand *MMO =
4487 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment);
4489 return getAtomicCmpSwap(Opcode, dl, MemVT, VTs, Chain, Ptr, Cmp, Swp, MMO,
4490 SuccessOrdering, FailureOrdering, SynchScope);
4493 SDValue SelectionDAG::getAtomicCmpSwap(unsigned Opcode, SDLoc dl, EVT MemVT,
4494 SDVTList VTs, SDValue Chain, SDValue Ptr,
4495 SDValue Cmp, SDValue Swp,
4496 MachineMemOperand *MMO,
4497 AtomicOrdering SuccessOrdering,
4498 AtomicOrdering FailureOrdering,
4499 SynchronizationScope SynchScope) {
4500 assert(Opcode == ISD::ATOMIC_CMP_SWAP ||
4501 Opcode == ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS);
4502 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
4504 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
4505 return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO,
4506 SuccessOrdering, FailureOrdering, SynchScope);
4509 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4511 SDValue Ptr, SDValue Val,
4512 const Value* PtrVal,
4514 AtomicOrdering Ordering,
4515 SynchronizationScope SynchScope) {
4516 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4517 Alignment = getEVTAlignment(MemVT);
4519 MachineFunction &MF = getMachineFunction();
4520 // An atomic store does not load. An atomic load does not store.
4521 // (An atomicrmw obviously both loads and stores.)
4522 // For now, atomics are considered to be volatile always, and they are
4524 // FIXME: Volatile isn't really correct; we should keep track of atomic
4525 // orderings in the memoperand.
4526 unsigned Flags = MachineMemOperand::MOVolatile;
4527 if (Opcode != ISD::ATOMIC_STORE)
4528 Flags |= MachineMemOperand::MOLoad;
4529 if (Opcode != ISD::ATOMIC_LOAD)
4530 Flags |= MachineMemOperand::MOStore;
4532 MachineMemOperand *MMO =
4533 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
4534 MemVT.getStoreSize(), Alignment);
4536 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO,
4537 Ordering, SynchScope);
4540 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4542 SDValue Ptr, SDValue Val,
4543 MachineMemOperand *MMO,
4544 AtomicOrdering Ordering,
4545 SynchronizationScope SynchScope) {
4546 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
4547 Opcode == ISD::ATOMIC_LOAD_SUB ||
4548 Opcode == ISD::ATOMIC_LOAD_AND ||
4549 Opcode == ISD::ATOMIC_LOAD_OR ||
4550 Opcode == ISD::ATOMIC_LOAD_XOR ||
4551 Opcode == ISD::ATOMIC_LOAD_NAND ||
4552 Opcode == ISD::ATOMIC_LOAD_MIN ||
4553 Opcode == ISD::ATOMIC_LOAD_MAX ||
4554 Opcode == ISD::ATOMIC_LOAD_UMIN ||
4555 Opcode == ISD::ATOMIC_LOAD_UMAX ||
4556 Opcode == ISD::ATOMIC_SWAP ||
4557 Opcode == ISD::ATOMIC_STORE) &&
4558 "Invalid Atomic Op");
4560 EVT VT = Val.getValueType();
4562 SDVTList VTs = Opcode == ISD::ATOMIC_STORE ? getVTList(MVT::Other) :
4563 getVTList(VT, MVT::Other);
4564 SDValue Ops[] = {Chain, Ptr, Val};
4565 return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO, Ordering, SynchScope);
4568 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4569 EVT VT, SDValue Chain,
4571 MachineMemOperand *MMO,
4572 AtomicOrdering Ordering,
4573 SynchronizationScope SynchScope) {
4574 assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op");
4576 SDVTList VTs = getVTList(VT, MVT::Other);
4577 SDValue Ops[] = {Chain, Ptr};
4578 return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO, Ordering, SynchScope);
4581 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
4582 SDValue SelectionDAG::getMergeValues(ArrayRef<SDValue> Ops, SDLoc dl) {
4583 if (Ops.size() == 1)
4586 SmallVector<EVT, 4> VTs;
4587 VTs.reserve(Ops.size());
4588 for (unsigned i = 0; i < Ops.size(); ++i)
4589 VTs.push_back(Ops[i].getValueType());
4590 return getNode(ISD::MERGE_VALUES, dl, getVTList(VTs), Ops);
4594 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDLoc dl, SDVTList VTList,
4595 ArrayRef<SDValue> Ops,
4596 EVT MemVT, MachinePointerInfo PtrInfo,
4597 unsigned Align, bool Vol,
4598 bool ReadMem, bool WriteMem, unsigned Size) {
4599 if (Align == 0) // Ensure that codegen never sees alignment 0
4600 Align = getEVTAlignment(MemVT);
4602 MachineFunction &MF = getMachineFunction();
4605 Flags |= MachineMemOperand::MOStore;
4607 Flags |= MachineMemOperand::MOLoad;
4609 Flags |= MachineMemOperand::MOVolatile;
4611 Size = MemVT.getStoreSize();
4612 MachineMemOperand *MMO =
4613 MF.getMachineMemOperand(PtrInfo, Flags, Size, Align);
4615 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, MemVT, MMO);
4619 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDLoc dl, SDVTList VTList,
4620 ArrayRef<SDValue> Ops, EVT MemVT,
4621 MachineMemOperand *MMO) {
4622 assert((Opcode == ISD::INTRINSIC_VOID ||
4623 Opcode == ISD::INTRINSIC_W_CHAIN ||
4624 Opcode == ISD::PREFETCH ||
4625 Opcode == ISD::LIFETIME_START ||
4626 Opcode == ISD::LIFETIME_END ||
4627 (Opcode <= INT_MAX &&
4628 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) &&
4629 "Opcode is not a memory-accessing opcode!");
4631 // Memoize the node unless it returns a flag.
4632 MemIntrinsicSDNode *N;
4633 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
4634 FoldingSetNodeID ID;
4635 AddNodeIDNode(ID, Opcode, VTList, Ops);
4636 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4638 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4639 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO);
4640 return SDValue(E, 0);
4643 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl.getIROrder(),
4644 dl.getDebugLoc(), VTList, Ops,
4646 CSEMap.InsertNode(N, IP);
4648 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl.getIROrder(),
4649 dl.getDebugLoc(), VTList, Ops,
4653 return SDValue(N, 0);
4656 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4657 /// MachinePointerInfo record from it. This is particularly useful because the
4658 /// code generator has many cases where it doesn't bother passing in a
4659 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4660 static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) {
4661 // If this is FI+Offset, we can model it.
4662 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr))
4663 return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset);
4665 // If this is (FI+Offset1)+Offset2, we can model it.
4666 if (Ptr.getOpcode() != ISD::ADD ||
4667 !isa<ConstantSDNode>(Ptr.getOperand(1)) ||
4668 !isa<FrameIndexSDNode>(Ptr.getOperand(0)))
4669 return MachinePointerInfo();
4671 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
4672 return MachinePointerInfo::getFixedStack(FI, Offset+
4673 cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue());
4676 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4677 /// MachinePointerInfo record from it. This is particularly useful because the
4678 /// code generator has many cases where it doesn't bother passing in a
4679 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4680 static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) {
4681 // If the 'Offset' value isn't a constant, we can't handle this.
4682 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp))
4683 return InferPointerInfo(Ptr, OffsetNode->getSExtValue());
4684 if (OffsetOp.getOpcode() == ISD::UNDEF)
4685 return InferPointerInfo(Ptr);
4686 return MachinePointerInfo();
4691 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4692 EVT VT, SDLoc dl, SDValue Chain,
4693 SDValue Ptr, SDValue Offset,
4694 MachinePointerInfo PtrInfo, EVT MemVT,
4695 bool isVolatile, bool isNonTemporal, bool isInvariant,
4696 unsigned Alignment, const AAMDNodes &AAInfo,
4697 const MDNode *Ranges) {
4698 assert(Chain.getValueType() == MVT::Other &&
4699 "Invalid chain type");
4700 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4701 Alignment = getEVTAlignment(VT);
4703 unsigned Flags = MachineMemOperand::MOLoad;
4705 Flags |= MachineMemOperand::MOVolatile;
4707 Flags |= MachineMemOperand::MONonTemporal;
4709 Flags |= MachineMemOperand::MOInvariant;
4711 // If we don't have a PtrInfo, infer the trivial frame index case to simplify
4713 if (PtrInfo.V.isNull())
4714 PtrInfo = InferPointerInfo(Ptr, Offset);
4716 MachineFunction &MF = getMachineFunction();
4717 MachineMemOperand *MMO =
4718 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment,
4720 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO);
4724 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4725 EVT VT, SDLoc dl, SDValue Chain,
4726 SDValue Ptr, SDValue Offset, EVT MemVT,
4727 MachineMemOperand *MMO) {
4729 ExtType = ISD::NON_EXTLOAD;
4730 } else if (ExtType == ISD::NON_EXTLOAD) {
4731 assert(VT == MemVT && "Non-extending load from different memory type!");
4734 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) &&
4735 "Should only be an extending load, not truncating!");
4736 assert(VT.isInteger() == MemVT.isInteger() &&
4737 "Cannot convert from FP to Int or Int -> FP!");
4738 assert(VT.isVector() == MemVT.isVector() &&
4739 "Cannot use trunc store to convert to or from a vector!");
4740 assert((!VT.isVector() ||
4741 VT.getVectorNumElements() == MemVT.getVectorNumElements()) &&
4742 "Cannot use trunc store to change the number of vector elements!");
4745 bool Indexed = AM != ISD::UNINDEXED;
4746 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
4747 "Unindexed load with an offset!");
4749 SDVTList VTs = Indexed ?
4750 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
4751 SDValue Ops[] = { Chain, Ptr, Offset };
4752 FoldingSetNodeID ID;
4753 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops);
4754 ID.AddInteger(MemVT.getRawBits());
4755 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(),
4756 MMO->isNonTemporal(),
4757 MMO->isInvariant()));
4758 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4760 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4761 cast<LoadSDNode>(E)->refineAlignment(MMO);
4762 return SDValue(E, 0);
4764 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl.getIROrder(),
4765 dl.getDebugLoc(), VTs, AM, ExtType,
4767 CSEMap.InsertNode(N, IP);
4769 return SDValue(N, 0);
4772 SDValue SelectionDAG::getLoad(EVT VT, SDLoc dl,
4773 SDValue Chain, SDValue Ptr,
4774 MachinePointerInfo PtrInfo,
4775 bool isVolatile, bool isNonTemporal,
4776 bool isInvariant, unsigned Alignment,
4777 const AAMDNodes &AAInfo,
4778 const MDNode *Ranges) {
4779 SDValue Undef = getUNDEF(Ptr.getValueType());
4780 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
4781 PtrInfo, VT, isVolatile, isNonTemporal, isInvariant, Alignment,
4785 SDValue SelectionDAG::getLoad(EVT VT, SDLoc dl,
4786 SDValue Chain, SDValue Ptr,
4787 MachineMemOperand *MMO) {
4788 SDValue Undef = getUNDEF(Ptr.getValueType());
4789 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
4793 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, SDLoc dl, EVT VT,
4794 SDValue Chain, SDValue Ptr,
4795 MachinePointerInfo PtrInfo, EVT MemVT,
4796 bool isVolatile, bool isNonTemporal,
4797 bool isInvariant, unsigned Alignment,
4798 const AAMDNodes &AAInfo) {
4799 SDValue Undef = getUNDEF(Ptr.getValueType());
4800 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
4801 PtrInfo, MemVT, isVolatile, isNonTemporal, isInvariant,
4806 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, SDLoc dl, EVT VT,
4807 SDValue Chain, SDValue Ptr, EVT MemVT,
4808 MachineMemOperand *MMO) {
4809 SDValue Undef = getUNDEF(Ptr.getValueType());
4810 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
4815 SelectionDAG::getIndexedLoad(SDValue OrigLoad, SDLoc dl, SDValue Base,
4816 SDValue Offset, ISD::MemIndexedMode AM) {
4817 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
4818 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
4819 "Load is already a indexed load!");
4820 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl,
4821 LD->getChain(), Base, Offset, LD->getPointerInfo(),
4822 LD->getMemoryVT(), LD->isVolatile(), LD->isNonTemporal(),
4823 false, LD->getAlignment());
4826 SDValue SelectionDAG::getStore(SDValue Chain, SDLoc dl, SDValue Val,
4827 SDValue Ptr, MachinePointerInfo PtrInfo,
4828 bool isVolatile, bool isNonTemporal,
4829 unsigned Alignment, const AAMDNodes &AAInfo) {
4830 assert(Chain.getValueType() == MVT::Other &&
4831 "Invalid chain type");
4832 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4833 Alignment = getEVTAlignment(Val.getValueType());
4835 unsigned Flags = MachineMemOperand::MOStore;
4837 Flags |= MachineMemOperand::MOVolatile;
4839 Flags |= MachineMemOperand::MONonTemporal;
4841 if (PtrInfo.V.isNull())
4842 PtrInfo = InferPointerInfo(Ptr);
4844 MachineFunction &MF = getMachineFunction();
4845 MachineMemOperand *MMO =
4846 MF.getMachineMemOperand(PtrInfo, Flags,
4847 Val.getValueType().getStoreSize(), Alignment,
4850 return getStore(Chain, dl, Val, Ptr, MMO);
4853 SDValue SelectionDAG::getStore(SDValue Chain, SDLoc dl, SDValue Val,
4854 SDValue Ptr, MachineMemOperand *MMO) {
4855 assert(Chain.getValueType() == MVT::Other &&
4856 "Invalid chain type");
4857 EVT VT = Val.getValueType();
4858 SDVTList VTs = getVTList(MVT::Other);
4859 SDValue Undef = getUNDEF(Ptr.getValueType());
4860 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4861 FoldingSetNodeID ID;
4862 AddNodeIDNode(ID, ISD::STORE, VTs, Ops);
4863 ID.AddInteger(VT.getRawBits());
4864 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
4865 MMO->isNonTemporal(), MMO->isInvariant()));
4866 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4868 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4869 cast<StoreSDNode>(E)->refineAlignment(MMO);
4870 return SDValue(E, 0);
4872 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl.getIROrder(),
4873 dl.getDebugLoc(), VTs,
4874 ISD::UNINDEXED, false, VT, MMO);
4875 CSEMap.InsertNode(N, IP);
4877 return SDValue(N, 0);
4880 SDValue SelectionDAG::getTruncStore(SDValue Chain, SDLoc dl, SDValue Val,
4881 SDValue Ptr, MachinePointerInfo PtrInfo,
4882 EVT SVT,bool isVolatile, bool isNonTemporal,
4884 const AAMDNodes &AAInfo) {
4885 assert(Chain.getValueType() == MVT::Other &&
4886 "Invalid chain type");
4887 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4888 Alignment = getEVTAlignment(SVT);
4890 unsigned Flags = MachineMemOperand::MOStore;
4892 Flags |= MachineMemOperand::MOVolatile;
4894 Flags |= MachineMemOperand::MONonTemporal;
4896 if (PtrInfo.V.isNull())
4897 PtrInfo = InferPointerInfo(Ptr);
4899 MachineFunction &MF = getMachineFunction();
4900 MachineMemOperand *MMO =
4901 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment,
4904 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO);
4907 SDValue SelectionDAG::getTruncStore(SDValue Chain, SDLoc dl, SDValue Val,
4908 SDValue Ptr, EVT SVT,
4909 MachineMemOperand *MMO) {
4910 EVT VT = Val.getValueType();
4912 assert(Chain.getValueType() == MVT::Other &&
4913 "Invalid chain type");
4915 return getStore(Chain, dl, Val, Ptr, MMO);
4917 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) &&
4918 "Should only be a truncating store, not extending!");
4919 assert(VT.isInteger() == SVT.isInteger() &&
4920 "Can't do FP-INT conversion!");
4921 assert(VT.isVector() == SVT.isVector() &&
4922 "Cannot use trunc store to convert to or from a vector!");
4923 assert((!VT.isVector() ||
4924 VT.getVectorNumElements() == SVT.getVectorNumElements()) &&
4925 "Cannot use trunc store to change the number of vector elements!");
4927 SDVTList VTs = getVTList(MVT::Other);
4928 SDValue Undef = getUNDEF(Ptr.getValueType());
4929 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4930 FoldingSetNodeID ID;
4931 AddNodeIDNode(ID, ISD::STORE, VTs, Ops);
4932 ID.AddInteger(SVT.getRawBits());
4933 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(),
4934 MMO->isNonTemporal(), MMO->isInvariant()));
4935 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4937 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4938 cast<StoreSDNode>(E)->refineAlignment(MMO);
4939 return SDValue(E, 0);
4941 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl.getIROrder(),
4942 dl.getDebugLoc(), VTs,
4943 ISD::UNINDEXED, true, SVT, MMO);
4944 CSEMap.InsertNode(N, IP);
4946 return SDValue(N, 0);
4950 SelectionDAG::getIndexedStore(SDValue OrigStore, SDLoc dl, SDValue Base,
4951 SDValue Offset, ISD::MemIndexedMode AM) {
4952 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
4953 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
4954 "Store is already a indexed store!");
4955 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
4956 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
4957 FoldingSetNodeID ID;
4958 AddNodeIDNode(ID, ISD::STORE, VTs, Ops);
4959 ID.AddInteger(ST->getMemoryVT().getRawBits());
4960 ID.AddInteger(ST->getRawSubclassData());
4961 ID.AddInteger(ST->getPointerInfo().getAddrSpace());
4963 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4964 return SDValue(E, 0);
4966 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl.getIROrder(),
4967 dl.getDebugLoc(), VTs, AM,
4968 ST->isTruncatingStore(),
4970 ST->getMemOperand());
4971 CSEMap.InsertNode(N, IP);
4973 return SDValue(N, 0);
4977 SelectionDAG::getMaskedLoad(EVT VT, SDLoc dl, SDValue Chain,
4978 SDValue Ptr, SDValue Mask, SDValue Src0, EVT MemVT,
4979 MachineMemOperand *MMO, ISD::LoadExtType ExtTy) {
4981 SDVTList VTs = getVTList(VT, MVT::Other);
4982 SDValue Ops[] = { Chain, Ptr, Mask, Src0 };
4983 FoldingSetNodeID ID;
4984 AddNodeIDNode(ID, ISD::MLOAD, VTs, Ops);
4985 ID.AddInteger(VT.getRawBits());
4986 ID.AddInteger(encodeMemSDNodeFlags(ExtTy, ISD::UNINDEXED,
4988 MMO->isNonTemporal(),
4989 MMO->isInvariant()));
4990 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4992 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4993 cast<MaskedLoadSDNode>(E)->refineAlignment(MMO);
4994 return SDValue(E, 0);
4996 SDNode *N = new (NodeAllocator) MaskedLoadSDNode(dl.getIROrder(),
4997 dl.getDebugLoc(), Ops, 4, VTs,
4999 CSEMap.InsertNode(N, IP);
5001 return SDValue(N, 0);
5004 SDValue SelectionDAG::getMaskedStore(SDValue Chain, SDLoc dl, SDValue Val,
5005 SDValue Ptr, SDValue Mask, EVT MemVT,
5006 MachineMemOperand *MMO, bool isTrunc) {
5007 assert(Chain.getValueType() == MVT::Other &&
5008 "Invalid chain type");
5009 EVT VT = Val.getValueType();
5010 SDVTList VTs = getVTList(MVT::Other);
5011 SDValue Ops[] = { Chain, Ptr, Mask, Val };
5012 FoldingSetNodeID ID;
5013 AddNodeIDNode(ID, ISD::MSTORE, VTs, Ops);
5014 ID.AddInteger(VT.getRawBits());
5015 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
5016 MMO->isNonTemporal(), MMO->isInvariant()));
5017 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
5019 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
5020 cast<MaskedStoreSDNode>(E)->refineAlignment(MMO);
5021 return SDValue(E, 0);
5023 SDNode *N = new (NodeAllocator) MaskedStoreSDNode(dl.getIROrder(),
5024 dl.getDebugLoc(), Ops, 4,
5025 VTs, isTrunc, MemVT, MMO);
5026 CSEMap.InsertNode(N, IP);
5028 return SDValue(N, 0);
5031 SDValue SelectionDAG::getVAArg(EVT VT, SDLoc dl,
5032 SDValue Chain, SDValue Ptr,
5035 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) };
5036 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops);
5039 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
5040 ArrayRef<SDUse> Ops) {
5041 switch (Ops.size()) {
5042 case 0: return getNode(Opcode, DL, VT);
5043 case 1: return getNode(Opcode, DL, VT, static_cast<const SDValue>(Ops[0]));
5044 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
5045 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
5049 // Copy from an SDUse array into an SDValue array for use with
5050 // the regular getNode logic.
5051 SmallVector<SDValue, 8> NewOps(Ops.begin(), Ops.end());
5052 return getNode(Opcode, DL, VT, NewOps);
5055 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
5056 ArrayRef<SDValue> Ops) {
5057 unsigned NumOps = Ops.size();
5059 case 0: return getNode(Opcode, DL, VT);
5060 case 1: return getNode(Opcode, DL, VT, Ops[0]);
5061 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
5062 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
5068 case ISD::SELECT_CC: {
5069 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
5070 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
5071 "LHS and RHS of condition must have same type!");
5072 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
5073 "True and False arms of SelectCC must have same type!");
5074 assert(Ops[2].getValueType() == VT &&
5075 "select_cc node must be of same type as true and false value!");
5079 assert(NumOps == 5 && "BR_CC takes 5 operands!");
5080 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
5081 "LHS/RHS of comparison should match types!");
5088 SDVTList VTs = getVTList(VT);
5090 if (VT != MVT::Glue) {
5091 FoldingSetNodeID ID;
5092 AddNodeIDNode(ID, Opcode, VTs, Ops);
5095 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
5096 return SDValue(E, 0);
5098 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
5100 CSEMap.InsertNode(N, IP);
5102 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
5107 return SDValue(N, 0);
5110 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL,
5111 ArrayRef<EVT> ResultTys, ArrayRef<SDValue> Ops) {
5112 return getNode(Opcode, DL, getVTList(ResultTys), Ops);
5115 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5116 ArrayRef<SDValue> Ops) {
5117 if (VTList.NumVTs == 1)
5118 return getNode(Opcode, DL, VTList.VTs[0], Ops);
5122 // FIXME: figure out how to safely handle things like
5123 // int foo(int x) { return 1 << (x & 255); }
5124 // int bar() { return foo(256); }
5125 case ISD::SRA_PARTS:
5126 case ISD::SRL_PARTS:
5127 case ISD::SHL_PARTS:
5128 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
5129 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
5130 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
5131 else if (N3.getOpcode() == ISD::AND)
5132 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
5133 // If the and is only masking out bits that cannot effect the shift,
5134 // eliminate the and.
5135 unsigned NumBits = VT.getScalarType().getSizeInBits()*2;
5136 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
5137 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
5143 // Memoize the node unless it returns a flag.
5145 unsigned NumOps = Ops.size();
5146 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
5147 FoldingSetNodeID ID;
5148 AddNodeIDNode(ID, Opcode, VTList, Ops);
5150 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
5151 return SDValue(E, 0);
5154 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(),
5155 DL.getDebugLoc(), VTList, Ops[0]);
5156 } else if (NumOps == 2) {
5157 N = new (NodeAllocator) BinarySDNode(Opcode, DL.getIROrder(),
5158 DL.getDebugLoc(), VTList, Ops[0],
5160 } else if (NumOps == 3) {
5161 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(),
5162 DL.getDebugLoc(), VTList, Ops[0],
5165 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
5168 CSEMap.InsertNode(N, IP);
5171 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(),
5172 DL.getDebugLoc(), VTList, Ops[0]);
5173 } else if (NumOps == 2) {
5174 N = new (NodeAllocator) BinarySDNode(Opcode, DL.getIROrder(),
5175 DL.getDebugLoc(), VTList, Ops[0],
5177 } else if (NumOps == 3) {
5178 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(),
5179 DL.getDebugLoc(), VTList, Ops[0],
5182 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
5187 return SDValue(N, 0);
5190 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList) {
5191 return getNode(Opcode, DL, VTList, None);
5194 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5196 SDValue Ops[] = { N1 };
5197 return getNode(Opcode, DL, VTList, Ops);
5200 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5201 SDValue N1, SDValue N2) {
5202 SDValue Ops[] = { N1, N2 };
5203 return getNode(Opcode, DL, VTList, Ops);
5206 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5207 SDValue N1, SDValue N2, SDValue N3) {
5208 SDValue Ops[] = { N1, N2, N3 };
5209 return getNode(Opcode, DL, VTList, Ops);
5212 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5213 SDValue N1, SDValue N2, SDValue N3,
5215 SDValue Ops[] = { N1, N2, N3, N4 };
5216 return getNode(Opcode, DL, VTList, Ops);
5219 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5220 SDValue N1, SDValue N2, SDValue N3,
5221 SDValue N4, SDValue N5) {
5222 SDValue Ops[] = { N1, N2, N3, N4, N5 };
5223 return getNode(Opcode, DL, VTList, Ops);
5226 SDVTList SelectionDAG::getVTList(EVT VT) {
5227 return makeVTList(SDNode::getValueTypeList(VT), 1);
5230 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
5231 FoldingSetNodeID ID;
5233 ID.AddInteger(VT1.getRawBits());
5234 ID.AddInteger(VT2.getRawBits());
5237 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5239 EVT *Array = Allocator.Allocate<EVT>(2);
5242 Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, 2);
5243 VTListMap.InsertNode(Result, IP);
5245 return Result->getSDVTList();
5248 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
5249 FoldingSetNodeID ID;
5251 ID.AddInteger(VT1.getRawBits());
5252 ID.AddInteger(VT2.getRawBits());
5253 ID.AddInteger(VT3.getRawBits());
5256 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5258 EVT *Array = Allocator.Allocate<EVT>(3);
5262 Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, 3);
5263 VTListMap.InsertNode(Result, IP);
5265 return Result->getSDVTList();
5268 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
5269 FoldingSetNodeID ID;
5271 ID.AddInteger(VT1.getRawBits());
5272 ID.AddInteger(VT2.getRawBits());
5273 ID.AddInteger(VT3.getRawBits());
5274 ID.AddInteger(VT4.getRawBits());
5277 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5279 EVT *Array = Allocator.Allocate<EVT>(4);
5284 Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, 4);
5285 VTListMap.InsertNode(Result, IP);
5287 return Result->getSDVTList();
5290 SDVTList SelectionDAG::getVTList(ArrayRef<EVT> VTs) {
5291 unsigned NumVTs = VTs.size();
5292 FoldingSetNodeID ID;
5293 ID.AddInteger(NumVTs);
5294 for (unsigned index = 0; index < NumVTs; index++) {
5295 ID.AddInteger(VTs[index].getRawBits());
5299 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5301 EVT *Array = Allocator.Allocate<EVT>(NumVTs);
5302 std::copy(VTs.begin(), VTs.end(), Array);
5303 Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, NumVTs);
5304 VTListMap.InsertNode(Result, IP);
5306 return Result->getSDVTList();
5310 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
5311 /// specified operands. If the resultant node already exists in the DAG,
5312 /// this does not modify the specified node, instead it returns the node that
5313 /// already exists. If the resultant node does not exist in the DAG, the
5314 /// input node is returned. As a degenerate case, if you specify the same
5315 /// input operands as the node already has, the input node is returned.
5316 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) {
5317 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
5319 // Check to see if there is no change.
5320 if (Op == N->getOperand(0)) return N;
5322 // See if the modified node already exists.
5323 void *InsertPos = nullptr;
5324 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
5327 // Nope it doesn't. Remove the node from its current place in the maps.
5329 if (!RemoveNodeFromCSEMaps(N))
5330 InsertPos = nullptr;
5332 // Now we update the operands.
5333 N->OperandList[0].set(Op);
5335 // If this gets put into a CSE map, add it.
5336 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
5340 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) {
5341 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
5343 // Check to see if there is no change.
5344 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
5345 return N; // No operands changed, just return the input node.
5347 // See if the modified node already exists.
5348 void *InsertPos = nullptr;
5349 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
5352 // Nope it doesn't. Remove the node from its current place in the maps.
5354 if (!RemoveNodeFromCSEMaps(N))
5355 InsertPos = nullptr;
5357 // Now we update the operands.
5358 if (N->OperandList[0] != Op1)
5359 N->OperandList[0].set(Op1);
5360 if (N->OperandList[1] != Op2)
5361 N->OperandList[1].set(Op2);
5363 // If this gets put into a CSE map, add it.
5364 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
5368 SDNode *SelectionDAG::
5369 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) {
5370 SDValue Ops[] = { Op1, Op2, Op3 };
5371 return UpdateNodeOperands(N, Ops);
5374 SDNode *SelectionDAG::
5375 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
5376 SDValue Op3, SDValue Op4) {
5377 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
5378 return UpdateNodeOperands(N, Ops);
5381 SDNode *SelectionDAG::
5382 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
5383 SDValue Op3, SDValue Op4, SDValue Op5) {
5384 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
5385 return UpdateNodeOperands(N, Ops);
5388 SDNode *SelectionDAG::
5389 UpdateNodeOperands(SDNode *N, ArrayRef<SDValue> Ops) {
5390 unsigned NumOps = Ops.size();
5391 assert(N->getNumOperands() == NumOps &&
5392 "Update with wrong number of operands");
5394 // Check to see if there is no change.
5395 bool AnyChange = false;
5396 for (unsigned i = 0; i != NumOps; ++i) {
5397 if (Ops[i] != N->getOperand(i)) {
5403 // No operands changed, just return the input node.
5404 if (!AnyChange) return N;
5406 // See if the modified node already exists.
5407 void *InsertPos = nullptr;
5408 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, InsertPos))
5411 // Nope it doesn't. Remove the node from its current place in the maps.
5413 if (!RemoveNodeFromCSEMaps(N))
5414 InsertPos = nullptr;
5416 // Now we update the operands.
5417 for (unsigned i = 0; i != NumOps; ++i)
5418 if (N->OperandList[i] != Ops[i])
5419 N->OperandList[i].set(Ops[i]);
5421 // If this gets put into a CSE map, add it.
5422 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
5426 /// DropOperands - Release the operands and set this node to have
5428 void SDNode::DropOperands() {
5429 // Unlike the code in MorphNodeTo that does this, we don't need to
5430 // watch for dead nodes here.
5431 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
5437 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
5440 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5442 SDVTList VTs = getVTList(VT);
5443 return SelectNodeTo(N, MachineOpc, VTs, None);
5446 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5447 EVT VT, SDValue Op1) {
5448 SDVTList VTs = getVTList(VT);
5449 SDValue Ops[] = { Op1 };
5450 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5453 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5454 EVT VT, SDValue Op1,
5456 SDVTList VTs = getVTList(VT);
5457 SDValue Ops[] = { Op1, Op2 };
5458 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5461 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5462 EVT VT, SDValue Op1,
5463 SDValue Op2, SDValue Op3) {
5464 SDVTList VTs = getVTList(VT);
5465 SDValue Ops[] = { Op1, Op2, Op3 };
5466 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5469 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5470 EVT VT, ArrayRef<SDValue> Ops) {
5471 SDVTList VTs = getVTList(VT);
5472 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5475 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5476 EVT VT1, EVT VT2, ArrayRef<SDValue> Ops) {
5477 SDVTList VTs = getVTList(VT1, VT2);
5478 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5481 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5483 SDVTList VTs = getVTList(VT1, VT2);
5484 return SelectNodeTo(N, MachineOpc, VTs, None);
5487 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5488 EVT VT1, EVT VT2, EVT VT3,
5489 ArrayRef<SDValue> Ops) {
5490 SDVTList VTs = getVTList(VT1, VT2, VT3);
5491 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5494 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5495 EVT VT1, EVT VT2, EVT VT3, EVT VT4,
5496 ArrayRef<SDValue> Ops) {
5497 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
5498 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5501 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5504 SDVTList VTs = getVTList(VT1, VT2);
5505 SDValue Ops[] = { Op1 };
5506 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5509 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5511 SDValue Op1, SDValue Op2) {
5512 SDVTList VTs = getVTList(VT1, VT2);
5513 SDValue Ops[] = { Op1, Op2 };
5514 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5517 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5519 SDValue Op1, SDValue Op2,
5521 SDVTList VTs = getVTList(VT1, VT2);
5522 SDValue Ops[] = { Op1, Op2, Op3 };
5523 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5526 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5527 EVT VT1, EVT VT2, EVT VT3,
5528 SDValue Op1, SDValue Op2,
5530 SDVTList VTs = getVTList(VT1, VT2, VT3);
5531 SDValue Ops[] = { Op1, Op2, Op3 };
5532 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5535 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5536 SDVTList VTs,ArrayRef<SDValue> Ops) {
5537 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops);
5538 // Reset the NodeID to -1.
5543 /// UpdadeSDLocOnMergedSDNode - If the opt level is -O0 then it throws away
5544 /// the line number information on the merged node since it is not possible to
5545 /// preserve the information that operation is associated with multiple lines.
5546 /// This will make the debugger working better at -O0, were there is a higher
5547 /// probability having other instructions associated with that line.
5549 /// For IROrder, we keep the smaller of the two
5550 SDNode *SelectionDAG::UpdadeSDLocOnMergedSDNode(SDNode *N, SDLoc OLoc) {
5551 DebugLoc NLoc = N->getDebugLoc();
5552 if (!(NLoc.isUnknown()) && (OptLevel == CodeGenOpt::None) &&
5553 (OLoc.getDebugLoc() != NLoc)) {
5554 N->setDebugLoc(DebugLoc());
5556 unsigned Order = std::min(N->getIROrder(), OLoc.getIROrder());
5557 N->setIROrder(Order);
5561 /// MorphNodeTo - This *mutates* the specified node to have the specified
5562 /// return type, opcode, and operands.
5564 /// Note that MorphNodeTo returns the resultant node. If there is already a
5565 /// node of the specified opcode and operands, it returns that node instead of
5566 /// the current one. Note that the SDLoc need not be the same.
5568 /// Using MorphNodeTo is faster than creating a new node and swapping it in
5569 /// with ReplaceAllUsesWith both because it often avoids allocating a new
5570 /// node, and because it doesn't require CSE recalculation for any of
5571 /// the node's users.
5573 /// However, note that MorphNodeTo recursively deletes dead nodes from the DAG.
5574 /// As a consequence it isn't appropriate to use from within the DAG combiner or
5575 /// the legalizer which maintain worklists that would need to be updated when
5576 /// deleting things.
5577 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
5578 SDVTList VTs, ArrayRef<SDValue> Ops) {
5579 unsigned NumOps = Ops.size();
5580 // If an identical node already exists, use it.
5582 if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) {
5583 FoldingSetNodeID ID;
5584 AddNodeIDNode(ID, Opc, VTs, Ops);
5585 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
5586 return UpdadeSDLocOnMergedSDNode(ON, SDLoc(N));
5589 if (!RemoveNodeFromCSEMaps(N))
5592 // Start the morphing.
5594 N->ValueList = VTs.VTs;
5595 N->NumValues = VTs.NumVTs;
5597 // Clear the operands list, updating used nodes to remove this from their
5598 // use list. Keep track of any operands that become dead as a result.
5599 SmallPtrSet<SDNode*, 16> DeadNodeSet;
5600 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
5602 SDNode *Used = Use.getNode();
5604 if (Used->use_empty())
5605 DeadNodeSet.insert(Used);
5608 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) {
5609 // Initialize the memory references information.
5610 MN->setMemRefs(nullptr, nullptr);
5611 // If NumOps is larger than the # of operands we can have in a
5612 // MachineSDNode, reallocate the operand list.
5613 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) {
5614 if (MN->OperandsNeedDelete)
5615 delete[] MN->OperandList;
5616 if (NumOps > array_lengthof(MN->LocalOperands))
5617 // We're creating a final node that will live unmorphed for the
5618 // remainder of the current SelectionDAG iteration, so we can allocate
5619 // the operands directly out of a pool with no recycling metadata.
5620 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
5621 Ops.data(), NumOps);
5623 MN->InitOperands(MN->LocalOperands, Ops.data(), NumOps);
5624 MN->OperandsNeedDelete = false;
5626 MN->InitOperands(MN->OperandList, Ops.data(), NumOps);
5628 // If NumOps is larger than the # of operands we currently have, reallocate
5629 // the operand list.
5630 if (NumOps > N->NumOperands) {
5631 if (N->OperandsNeedDelete)
5632 delete[] N->OperandList;
5633 N->InitOperands(new SDUse[NumOps], Ops.data(), NumOps);
5634 N->OperandsNeedDelete = true;
5636 N->InitOperands(N->OperandList, Ops.data(), NumOps);
5639 // Delete any nodes that are still dead after adding the uses for the
5641 if (!DeadNodeSet.empty()) {
5642 SmallVector<SDNode *, 16> DeadNodes;
5643 for (SDNode *N : DeadNodeSet)
5645 DeadNodes.push_back(N);
5646 RemoveDeadNodes(DeadNodes);
5650 CSEMap.InsertNode(N, IP); // Memoize the new node.
5655 /// getMachineNode - These are used for target selectors to create a new node
5656 /// with specified return type(s), MachineInstr opcode, and operands.
5658 /// Note that getMachineNode returns the resultant node. If there is already a
5659 /// node of the specified opcode and operands, it returns that node instead of
5660 /// the current one.
5662 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT) {
5663 SDVTList VTs = getVTList(VT);
5664 return getMachineNode(Opcode, dl, VTs, None);
5668 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT, SDValue Op1) {
5669 SDVTList VTs = getVTList(VT);
5670 SDValue Ops[] = { Op1 };
5671 return getMachineNode(Opcode, dl, VTs, Ops);
5675 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT,
5676 SDValue Op1, SDValue Op2) {
5677 SDVTList VTs = getVTList(VT);
5678 SDValue Ops[] = { Op1, Op2 };
5679 return getMachineNode(Opcode, dl, VTs, Ops);
5683 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT,
5684 SDValue Op1, SDValue Op2, SDValue Op3) {
5685 SDVTList VTs = getVTList(VT);
5686 SDValue Ops[] = { Op1, Op2, Op3 };
5687 return getMachineNode(Opcode, dl, VTs, Ops);
5691 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT,
5692 ArrayRef<SDValue> Ops) {
5693 SDVTList VTs = getVTList(VT);
5694 return getMachineNode(Opcode, dl, VTs, Ops);
5698 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1, EVT VT2) {
5699 SDVTList VTs = getVTList(VT1, VT2);
5700 return getMachineNode(Opcode, dl, VTs, None);
5704 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5705 EVT VT1, EVT VT2, SDValue Op1) {
5706 SDVTList VTs = getVTList(VT1, VT2);
5707 SDValue Ops[] = { Op1 };
5708 return getMachineNode(Opcode, dl, VTs, Ops);
5712 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5713 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) {
5714 SDVTList VTs = getVTList(VT1, VT2);
5715 SDValue Ops[] = { Op1, Op2 };
5716 return getMachineNode(Opcode, dl, VTs, Ops);
5720 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5721 EVT VT1, EVT VT2, SDValue Op1,
5722 SDValue Op2, SDValue Op3) {
5723 SDVTList VTs = getVTList(VT1, VT2);
5724 SDValue Ops[] = { Op1, Op2, Op3 };
5725 return getMachineNode(Opcode, dl, VTs, Ops);
5729 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5731 ArrayRef<SDValue> Ops) {
5732 SDVTList VTs = getVTList(VT1, VT2);
5733 return getMachineNode(Opcode, dl, VTs, Ops);
5737 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5738 EVT VT1, EVT VT2, EVT VT3,
5739 SDValue Op1, SDValue Op2) {
5740 SDVTList VTs = getVTList(VT1, VT2, VT3);
5741 SDValue Ops[] = { Op1, Op2 };
5742 return getMachineNode(Opcode, dl, VTs, Ops);
5746 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5747 EVT VT1, EVT VT2, EVT VT3,
5748 SDValue Op1, SDValue Op2, SDValue Op3) {
5749 SDVTList VTs = getVTList(VT1, VT2, VT3);
5750 SDValue Ops[] = { Op1, Op2, Op3 };
5751 return getMachineNode(Opcode, dl, VTs, Ops);
5755 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5756 EVT VT1, EVT VT2, EVT VT3,
5757 ArrayRef<SDValue> Ops) {
5758 SDVTList VTs = getVTList(VT1, VT2, VT3);
5759 return getMachineNode(Opcode, dl, VTs, Ops);
5763 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1,
5764 EVT VT2, EVT VT3, EVT VT4,
5765 ArrayRef<SDValue> Ops) {
5766 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
5767 return getMachineNode(Opcode, dl, VTs, Ops);
5771 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5772 ArrayRef<EVT> ResultTys,
5773 ArrayRef<SDValue> Ops) {
5774 SDVTList VTs = getVTList(ResultTys);
5775 return getMachineNode(Opcode, dl, VTs, Ops);
5779 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc DL, SDVTList VTs,
5780 ArrayRef<SDValue> OpsArray) {
5781 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue;
5784 const SDValue *Ops = OpsArray.data();
5785 unsigned NumOps = OpsArray.size();
5788 FoldingSetNodeID ID;
5789 AddNodeIDNode(ID, ~Opcode, VTs, OpsArray);
5791 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
5792 return cast<MachineSDNode>(UpdadeSDLocOnMergedSDNode(E, DL));
5796 // Allocate a new MachineSDNode.
5797 N = new (NodeAllocator) MachineSDNode(~Opcode, DL.getIROrder(),
5798 DL.getDebugLoc(), VTs);
5800 // Initialize the operands list.
5801 if (NumOps > array_lengthof(N->LocalOperands))
5802 // We're creating a final node that will live unmorphed for the
5803 // remainder of the current SelectionDAG iteration, so we can allocate
5804 // the operands directly out of a pool with no recycling metadata.
5805 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
5808 N->InitOperands(N->LocalOperands, Ops, NumOps);
5809 N->OperandsNeedDelete = false;
5812 CSEMap.InsertNode(N, IP);
5818 /// getTargetExtractSubreg - A convenience function for creating
5819 /// TargetOpcode::EXTRACT_SUBREG nodes.
5821 SelectionDAG::getTargetExtractSubreg(int SRIdx, SDLoc DL, EVT VT,
5823 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
5824 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL,
5825 VT, Operand, SRIdxVal);
5826 return SDValue(Subreg, 0);
5829 /// getTargetInsertSubreg - A convenience function for creating
5830 /// TargetOpcode::INSERT_SUBREG nodes.
5832 SelectionDAG::getTargetInsertSubreg(int SRIdx, SDLoc DL, EVT VT,
5833 SDValue Operand, SDValue Subreg) {
5834 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
5835 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL,
5836 VT, Operand, Subreg, SRIdxVal);
5837 return SDValue(Result, 0);
5840 /// getNodeIfExists - Get the specified node if it's already available, or
5841 /// else return NULL.
5842 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
5843 ArrayRef<SDValue> Ops, bool nuw, bool nsw,
5845 if (VTList.VTs[VTList.NumVTs - 1] != MVT::Glue) {
5846 FoldingSetNodeID ID;
5847 AddNodeIDNode(ID, Opcode, VTList, Ops);
5848 if (isBinOpWithFlags(Opcode))
5849 AddBinaryNodeIDCustom(ID, nuw, nsw, exact);
5851 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
5857 /// getDbgValue - Creates a SDDbgValue node.
5860 SDDbgValue *SelectionDAG::getDbgValue(MDNode *Var, MDNode *Expr, SDNode *N,
5861 unsigned R, bool IsIndirect, uint64_t Off,
5862 DebugLoc DL, unsigned O) {
5863 return new (Allocator) SDDbgValue(Var, Expr, N, R, IsIndirect, Off, DL, O);
5867 SDDbgValue *SelectionDAG::getConstantDbgValue(MDNode *Var, MDNode *Expr,
5868 const Value *C, uint64_t Off,
5869 DebugLoc DL, unsigned O) {
5870 return new (Allocator) SDDbgValue(Var, Expr, C, Off, DL, O);
5874 SDDbgValue *SelectionDAG::getFrameIndexDbgValue(MDNode *Var, MDNode *Expr,
5875 unsigned FI, uint64_t Off,
5876 DebugLoc DL, unsigned O) {
5877 return new (Allocator) SDDbgValue(Var, Expr, FI, Off, DL, O);
5882 /// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node
5883 /// pointed to by a use iterator is deleted, increment the use iterator
5884 /// so that it doesn't dangle.
5886 class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener {
5887 SDNode::use_iterator &UI;
5888 SDNode::use_iterator &UE;
5890 void NodeDeleted(SDNode *N, SDNode *E) override {
5891 // Increment the iterator as needed.
5892 while (UI != UE && N == *UI)
5897 RAUWUpdateListener(SelectionDAG &d,
5898 SDNode::use_iterator &ui,
5899 SDNode::use_iterator &ue)
5900 : SelectionDAG::DAGUpdateListener(d), UI(ui), UE(ue) {}
5905 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5906 /// This can cause recursive merging of nodes in the DAG.
5908 /// This version assumes From has a single result value.
5910 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To) {
5911 SDNode *From = FromN.getNode();
5912 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
5913 "Cannot replace with this method!");
5914 assert(From != To.getNode() && "Cannot replace uses of with self");
5916 // Iterate over all the existing uses of From. New uses will be added
5917 // to the beginning of the use list, which we avoid visiting.
5918 // This specifically avoids visiting uses of From that arise while the
5919 // replacement is happening, because any such uses would be the result
5920 // of CSE: If an existing node looks like From after one of its operands
5921 // is replaced by To, we don't want to replace of all its users with To
5922 // too. See PR3018 for more info.
5923 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5924 RAUWUpdateListener Listener(*this, UI, UE);
5928 // This node is about to morph, remove its old self from the CSE maps.
5929 RemoveNodeFromCSEMaps(User);
5931 // A user can appear in a use list multiple times, and when this
5932 // happens the uses are usually next to each other in the list.
5933 // To help reduce the number of CSE recomputations, process all
5934 // the uses of this user that we can find this way.
5936 SDUse &Use = UI.getUse();
5939 } while (UI != UE && *UI == User);
5941 // Now that we have modified User, add it back to the CSE maps. If it
5942 // already exists there, recursively merge the results together.
5943 AddModifiedNodeToCSEMaps(User);
5946 // If we just RAUW'd the root, take note.
5947 if (FromN == getRoot())
5951 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5952 /// This can cause recursive merging of nodes in the DAG.
5954 /// This version assumes that for each value of From, there is a
5955 /// corresponding value in To in the same position with the same type.
5957 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To) {
5959 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
5960 assert((!From->hasAnyUseOfValue(i) ||
5961 From->getValueType(i) == To->getValueType(i)) &&
5962 "Cannot use this version of ReplaceAllUsesWith!");
5965 // Handle the trivial case.
5969 // Iterate over just the existing users of From. See the comments in
5970 // the ReplaceAllUsesWith above.
5971 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5972 RAUWUpdateListener Listener(*this, UI, UE);
5976 // This node is about to morph, remove its old self from the CSE maps.
5977 RemoveNodeFromCSEMaps(User);
5979 // A user can appear in a use list multiple times, and when this
5980 // happens the uses are usually next to each other in the list.
5981 // To help reduce the number of CSE recomputations, process all
5982 // the uses of this user that we can find this way.
5984 SDUse &Use = UI.getUse();
5987 } while (UI != UE && *UI == User);
5989 // Now that we have modified User, add it back to the CSE maps. If it
5990 // already exists there, recursively merge the results together.
5991 AddModifiedNodeToCSEMaps(User);
5994 // If we just RAUW'd the root, take note.
5995 if (From == getRoot().getNode())
5996 setRoot(SDValue(To, getRoot().getResNo()));
5999 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
6000 /// This can cause recursive merging of nodes in the DAG.
6002 /// This version can replace From with any result values. To must match the
6003 /// number and types of values returned by From.
6004 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, const SDValue *To) {
6005 if (From->getNumValues() == 1) // Handle the simple case efficiently.
6006 return ReplaceAllUsesWith(SDValue(From, 0), To[0]);
6008 // Iterate over just the existing users of From. See the comments in
6009 // the ReplaceAllUsesWith above.
6010 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
6011 RAUWUpdateListener Listener(*this, UI, UE);
6015 // This node is about to morph, remove its old self from the CSE maps.
6016 RemoveNodeFromCSEMaps(User);
6018 // A user can appear in a use list multiple times, and when this
6019 // happens the uses are usually next to each other in the list.
6020 // To help reduce the number of CSE recomputations, process all
6021 // the uses of this user that we can find this way.
6023 SDUse &Use = UI.getUse();
6024 const SDValue &ToOp = To[Use.getResNo()];
6027 } while (UI != UE && *UI == User);
6029 // Now that we have modified User, add it back to the CSE maps. If it
6030 // already exists there, recursively merge the results together.
6031 AddModifiedNodeToCSEMaps(User);
6034 // If we just RAUW'd the root, take note.
6035 if (From == getRoot().getNode())
6036 setRoot(SDValue(To[getRoot().getResNo()]));
6039 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
6040 /// uses of other values produced by From.getNode() alone. The Deleted
6041 /// vector is handled the same way as for ReplaceAllUsesWith.
6042 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To){
6043 // Handle the really simple, really trivial case efficiently.
6044 if (From == To) return;
6046 // Handle the simple, trivial, case efficiently.
6047 if (From.getNode()->getNumValues() == 1) {
6048 ReplaceAllUsesWith(From, To);
6052 // Iterate over just the existing users of From. See the comments in
6053 // the ReplaceAllUsesWith above.
6054 SDNode::use_iterator UI = From.getNode()->use_begin(),
6055 UE = From.getNode()->use_end();
6056 RAUWUpdateListener Listener(*this, UI, UE);
6059 bool UserRemovedFromCSEMaps = false;
6061 // A user can appear in a use list multiple times, and when this
6062 // happens the uses are usually next to each other in the list.
6063 // To help reduce the number of CSE recomputations, process all
6064 // the uses of this user that we can find this way.
6066 SDUse &Use = UI.getUse();
6068 // Skip uses of different values from the same node.
6069 if (Use.getResNo() != From.getResNo()) {
6074 // If this node hasn't been modified yet, it's still in the CSE maps,
6075 // so remove its old self from the CSE maps.
6076 if (!UserRemovedFromCSEMaps) {
6077 RemoveNodeFromCSEMaps(User);
6078 UserRemovedFromCSEMaps = true;
6083 } while (UI != UE && *UI == User);
6085 // We are iterating over all uses of the From node, so if a use
6086 // doesn't use the specific value, no changes are made.
6087 if (!UserRemovedFromCSEMaps)
6090 // Now that we have modified User, add it back to the CSE maps. If it
6091 // already exists there, recursively merge the results together.
6092 AddModifiedNodeToCSEMaps(User);
6095 // If we just RAUW'd the root, take note.
6096 if (From == getRoot())
6101 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
6102 /// to record information about a use.
6109 /// operator< - Sort Memos by User.
6110 bool operator<(const UseMemo &L, const UseMemo &R) {
6111 return (intptr_t)L.User < (intptr_t)R.User;
6115 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
6116 /// uses of other values produced by From.getNode() alone. The same value
6117 /// may appear in both the From and To list. The Deleted vector is
6118 /// handled the same way as for ReplaceAllUsesWith.
6119 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
6122 // Handle the simple, trivial case efficiently.
6124 return ReplaceAllUsesOfValueWith(*From, *To);
6126 // Read up all the uses and make records of them. This helps
6127 // processing new uses that are introduced during the
6128 // replacement process.
6129 SmallVector<UseMemo, 4> Uses;
6130 for (unsigned i = 0; i != Num; ++i) {
6131 unsigned FromResNo = From[i].getResNo();
6132 SDNode *FromNode = From[i].getNode();
6133 for (SDNode::use_iterator UI = FromNode->use_begin(),
6134 E = FromNode->use_end(); UI != E; ++UI) {
6135 SDUse &Use = UI.getUse();
6136 if (Use.getResNo() == FromResNo) {
6137 UseMemo Memo = { *UI, i, &Use };
6138 Uses.push_back(Memo);
6143 // Sort the uses, so that all the uses from a given User are together.
6144 std::sort(Uses.begin(), Uses.end());
6146 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
6147 UseIndex != UseIndexEnd; ) {
6148 // We know that this user uses some value of From. If it is the right
6149 // value, update it.
6150 SDNode *User = Uses[UseIndex].User;
6152 // This node is about to morph, remove its old self from the CSE maps.
6153 RemoveNodeFromCSEMaps(User);
6155 // The Uses array is sorted, so all the uses for a given User
6156 // are next to each other in the list.
6157 // To help reduce the number of CSE recomputations, process all
6158 // the uses of this user that we can find this way.
6160 unsigned i = Uses[UseIndex].Index;
6161 SDUse &Use = *Uses[UseIndex].Use;
6165 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
6167 // Now that we have modified User, add it back to the CSE maps. If it
6168 // already exists there, recursively merge the results together.
6169 AddModifiedNodeToCSEMaps(User);
6173 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
6174 /// based on their topological order. It returns the maximum id and a vector
6175 /// of the SDNodes* in assigned order by reference.
6176 unsigned SelectionDAG::AssignTopologicalOrder() {
6178 unsigned DAGSize = 0;
6180 // SortedPos tracks the progress of the algorithm. Nodes before it are
6181 // sorted, nodes after it are unsorted. When the algorithm completes
6182 // it is at the end of the list.
6183 allnodes_iterator SortedPos = allnodes_begin();
6185 // Visit all the nodes. Move nodes with no operands to the front of
6186 // the list immediately. Annotate nodes that do have operands with their
6187 // operand count. Before we do this, the Node Id fields of the nodes
6188 // may contain arbitrary values. After, the Node Id fields for nodes
6189 // before SortedPos will contain the topological sort index, and the
6190 // Node Id fields for nodes At SortedPos and after will contain the
6191 // count of outstanding operands.
6192 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
6194 checkForCycles(N, this);
6195 unsigned Degree = N->getNumOperands();
6197 // A node with no uses, add it to the result array immediately.
6198 N->setNodeId(DAGSize++);
6199 allnodes_iterator Q = N;
6201 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
6202 assert(SortedPos != AllNodes.end() && "Overran node list");
6205 // Temporarily use the Node Id as scratch space for the degree count.
6206 N->setNodeId(Degree);
6210 // Visit all the nodes. As we iterate, move nodes into sorted order,
6211 // such that by the time the end is reached all nodes will be sorted.
6212 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
6214 checkForCycles(N, this);
6215 // N is in sorted position, so all its uses have one less operand
6216 // that needs to be sorted.
6217 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
6220 unsigned Degree = P->getNodeId();
6221 assert(Degree != 0 && "Invalid node degree");
6224 // All of P's operands are sorted, so P may sorted now.
6225 P->setNodeId(DAGSize++);
6227 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
6228 assert(SortedPos != AllNodes.end() && "Overran node list");
6231 // Update P's outstanding operand count.
6232 P->setNodeId(Degree);
6235 if (I == SortedPos) {
6238 dbgs() << "Overran sorted position:\n";
6239 S->dumprFull(this); dbgs() << "\n";
6240 dbgs() << "Checking if this is due to cycles\n";
6241 checkForCycles(this, true);
6243 llvm_unreachable(nullptr);
6247 assert(SortedPos == AllNodes.end() &&
6248 "Topological sort incomplete!");
6249 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
6250 "First node in topological sort is not the entry token!");
6251 assert(AllNodes.front().getNodeId() == 0 &&
6252 "First node in topological sort has non-zero id!");
6253 assert(AllNodes.front().getNumOperands() == 0 &&
6254 "First node in topological sort has operands!");
6255 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
6256 "Last node in topologic sort has unexpected id!");
6257 assert(AllNodes.back().use_empty() &&
6258 "Last node in topologic sort has users!");
6259 assert(DAGSize == allnodes_size() && "Node count mismatch!");
6263 /// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the
6264 /// value is produced by SD.
6265 void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) {
6267 assert(DbgInfo->getSDDbgValues(SD).empty() || SD->getHasDebugValue());
6268 SD->setHasDebugValue(true);
6270 DbgInfo->add(DB, SD, isParameter);
6273 /// TransferDbgValues - Transfer SDDbgValues.
6274 void SelectionDAG::TransferDbgValues(SDValue From, SDValue To) {
6275 if (From == To || !From.getNode()->getHasDebugValue())
6277 SDNode *FromNode = From.getNode();
6278 SDNode *ToNode = To.getNode();
6279 ArrayRef<SDDbgValue *> DVs = GetDbgValues(FromNode);
6280 SmallVector<SDDbgValue *, 2> ClonedDVs;
6281 for (ArrayRef<SDDbgValue *>::iterator I = DVs.begin(), E = DVs.end();
6283 SDDbgValue *Dbg = *I;
6284 if (Dbg->getKind() == SDDbgValue::SDNODE) {
6286 getDbgValue(Dbg->getVariable(), Dbg->getExpression(), ToNode,
6287 To.getResNo(), Dbg->isIndirect(), Dbg->getOffset(),
6288 Dbg->getDebugLoc(), Dbg->getOrder());
6289 ClonedDVs.push_back(Clone);
6292 for (SmallVectorImpl<SDDbgValue *>::iterator I = ClonedDVs.begin(),
6293 E = ClonedDVs.end(); I != E; ++I)
6294 AddDbgValue(*I, ToNode, false);
6297 //===----------------------------------------------------------------------===//
6299 //===----------------------------------------------------------------------===//
6301 HandleSDNode::~HandleSDNode() {
6305 GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, unsigned Order,
6306 DebugLoc DL, const GlobalValue *GA,
6307 EVT VT, int64_t o, unsigned char TF)
6308 : SDNode(Opc, Order, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) {
6312 AddrSpaceCastSDNode::AddrSpaceCastSDNode(unsigned Order, DebugLoc dl, EVT VT,
6313 SDValue X, unsigned SrcAS,
6315 : UnarySDNode(ISD::ADDRSPACECAST, Order, dl, getSDVTList(VT), X),
6316 SrcAddrSpace(SrcAS), DestAddrSpace(DestAS) {}
6318 MemSDNode::MemSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs,
6319 EVT memvt, MachineMemOperand *mmo)
6320 : SDNode(Opc, Order, dl, VTs), MemoryVT(memvt), MMO(mmo) {
6321 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
6322 MMO->isNonTemporal(), MMO->isInvariant());
6323 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
6324 assert(isNonTemporal() == MMO->isNonTemporal() &&
6325 "Non-temporal encoding error!");
6326 // We check here that the size of the memory operand fits within the size of
6327 // the MMO. This is because the MMO might indicate only a possible address
6328 // range instead of specifying the affected memory addresses precisely.
6329 assert(memvt.getStoreSize() <= MMO->getSize() && "Size mismatch!");
6332 MemSDNode::MemSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs,
6333 ArrayRef<SDValue> Ops, EVT memvt, MachineMemOperand *mmo)
6334 : SDNode(Opc, Order, dl, VTs, Ops),
6335 MemoryVT(memvt), MMO(mmo) {
6336 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
6337 MMO->isNonTemporal(), MMO->isInvariant());
6338 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
6339 assert(memvt.getStoreSize() <= MMO->getSize() && "Size mismatch!");
6342 /// Profile - Gather unique data for the node.
6344 void SDNode::Profile(FoldingSetNodeID &ID) const {
6345 AddNodeIDNode(ID, this);
6350 std::vector<EVT> VTs;
6353 VTs.reserve(MVT::LAST_VALUETYPE);
6354 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i)
6355 VTs.push_back(MVT((MVT::SimpleValueType)i));
6360 static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs;
6361 static ManagedStatic<EVTArray> SimpleVTArray;
6362 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
6364 /// getValueTypeList - Return a pointer to the specified value type.
6366 const EVT *SDNode::getValueTypeList(EVT VT) {
6367 if (VT.isExtended()) {
6368 sys::SmartScopedLock<true> Lock(*VTMutex);
6369 return &(*EVTs->insert(VT).first);
6371 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE &&
6372 "Value type out of range!");
6373 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy];
6377 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
6378 /// indicated value. This method ignores uses of other values defined by this
6380 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
6381 assert(Value < getNumValues() && "Bad value!");
6383 // TODO: Only iterate over uses of a given value of the node
6384 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
6385 if (UI.getUse().getResNo() == Value) {
6392 // Found exactly the right number of uses?
6397 /// hasAnyUseOfValue - Return true if there are any use of the indicated
6398 /// value. This method ignores uses of other values defined by this operation.
6399 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
6400 assert(Value < getNumValues() && "Bad value!");
6402 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
6403 if (UI.getUse().getResNo() == Value)
6410 /// isOnlyUserOf - Return true if this node is the only use of N.
6412 bool SDNode::isOnlyUserOf(SDNode *N) const {
6414 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
6425 /// isOperand - Return true if this node is an operand of N.
6427 bool SDValue::isOperandOf(SDNode *N) const {
6428 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6429 if (*this == N->getOperand(i))
6434 bool SDNode::isOperandOf(SDNode *N) const {
6435 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
6436 if (this == N->OperandList[i].getNode())
6441 /// reachesChainWithoutSideEffects - Return true if this operand (which must
6442 /// be a chain) reaches the specified operand without crossing any
6443 /// side-effecting instructions on any chain path. In practice, this looks
6444 /// through token factors and non-volatile loads. In order to remain efficient,
6445 /// this only looks a couple of nodes in, it does not do an exhaustive search.
6446 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
6447 unsigned Depth) const {
6448 if (*this == Dest) return true;
6450 // Don't search too deeply, we just want to be able to see through
6451 // TokenFactor's etc.
6452 if (Depth == 0) return false;
6454 // If this is a token factor, all inputs to the TF happen in parallel. If any
6455 // of the operands of the TF does not reach dest, then we cannot do the xform.
6456 if (getOpcode() == ISD::TokenFactor) {
6457 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
6458 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
6463 // Loads don't have side effects, look through them.
6464 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
6465 if (!Ld->isVolatile())
6466 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
6471 /// hasPredecessor - Return true if N is a predecessor of this node.
6472 /// N is either an operand of this node, or can be reached by recursively
6473 /// traversing up the operands.
6474 /// NOTE: This is an expensive method. Use it carefully.
6475 bool SDNode::hasPredecessor(const SDNode *N) const {
6476 SmallPtrSet<const SDNode *, 32> Visited;
6477 SmallVector<const SDNode *, 16> Worklist;
6478 return hasPredecessorHelper(N, Visited, Worklist);
6482 SDNode::hasPredecessorHelper(const SDNode *N,
6483 SmallPtrSetImpl<const SDNode *> &Visited,
6484 SmallVectorImpl<const SDNode *> &Worklist) const {
6485 if (Visited.empty()) {
6486 Worklist.push_back(this);
6488 // Take a look in the visited set. If we've already encountered this node
6489 // we needn't search further.
6490 if (Visited.count(N))
6494 // Haven't visited N yet. Continue the search.
6495 while (!Worklist.empty()) {
6496 const SDNode *M = Worklist.pop_back_val();
6497 for (unsigned i = 0, e = M->getNumOperands(); i != e; ++i) {
6498 SDNode *Op = M->getOperand(i).getNode();
6499 if (Visited.insert(Op).second)
6500 Worklist.push_back(Op);
6509 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
6510 assert(Num < NumOperands && "Invalid child # of SDNode!");
6511 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
6514 SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
6515 assert(N->getNumValues() == 1 &&
6516 "Can't unroll a vector with multiple results!");
6518 EVT VT = N->getValueType(0);
6519 unsigned NE = VT.getVectorNumElements();
6520 EVT EltVT = VT.getVectorElementType();
6523 SmallVector<SDValue, 8> Scalars;
6524 SmallVector<SDValue, 4> Operands(N->getNumOperands());
6526 // If ResNE is 0, fully unroll the vector op.
6529 else if (NE > ResNE)
6533 for (i= 0; i != NE; ++i) {
6534 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) {
6535 SDValue Operand = N->getOperand(j);
6536 EVT OperandVT = Operand.getValueType();
6537 if (OperandVT.isVector()) {
6538 // A vector operand; extract a single element.
6539 EVT OperandEltVT = OperandVT.getVectorElementType();
6540 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl,
6543 getConstant(i, TLI->getVectorIdxTy()));
6545 // A scalar operand; just use it as is.
6546 Operands[j] = Operand;
6550 switch (N->getOpcode()) {
6552 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands));
6555 Scalars.push_back(getNode(ISD::SELECT, dl, EltVT, Operands));
6562 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0],
6563 getShiftAmountOperand(Operands[0].getValueType(),
6566 case ISD::SIGN_EXTEND_INREG:
6567 case ISD::FP_ROUND_INREG: {
6568 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType();
6569 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6571 getValueType(ExtVT)));
6576 for (; i < ResNE; ++i)
6577 Scalars.push_back(getUNDEF(EltVT));
6579 return getNode(ISD::BUILD_VECTOR, dl,
6580 EVT::getVectorVT(*getContext(), EltVT, ResNE), Scalars);
6584 /// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a
6585 /// location that is 'Dist' units away from the location that the 'Base' load
6586 /// is loading from.
6587 bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base,
6588 unsigned Bytes, int Dist) const {
6589 if (LD->getChain() != Base->getChain())
6591 EVT VT = LD->getValueType(0);
6592 if (VT.getSizeInBits() / 8 != Bytes)
6595 SDValue Loc = LD->getOperand(1);
6596 SDValue BaseLoc = Base->getOperand(1);
6597 if (Loc.getOpcode() == ISD::FrameIndex) {
6598 if (BaseLoc.getOpcode() != ISD::FrameIndex)
6600 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo();
6601 int FI = cast<FrameIndexSDNode>(Loc)->getIndex();
6602 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex();
6603 int FS = MFI->getObjectSize(FI);
6604 int BFS = MFI->getObjectSize(BFI);
6605 if (FS != BFS || FS != (int)Bytes) return false;
6606 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes);
6610 if (isBaseWithConstantOffset(Loc)) {
6611 int64_t LocOffset = cast<ConstantSDNode>(Loc.getOperand(1))->getSExtValue();
6612 if (Loc.getOperand(0) == BaseLoc) {
6613 // If the base location is a simple address with no offset itself, then
6614 // the second load's first add operand should be the base address.
6615 if (LocOffset == Dist * (int)Bytes)
6617 } else if (isBaseWithConstantOffset(BaseLoc)) {
6618 // The base location itself has an offset, so subtract that value from the
6619 // second load's offset before comparing to distance * size.
6621 cast<ConstantSDNode>(BaseLoc.getOperand(1))->getSExtValue();
6622 if (Loc.getOperand(0) == BaseLoc.getOperand(0)) {
6623 if ((LocOffset - BOffset) == Dist * (int)Bytes)
6628 const GlobalValue *GV1 = nullptr;
6629 const GlobalValue *GV2 = nullptr;
6630 int64_t Offset1 = 0;
6631 int64_t Offset2 = 0;
6632 bool isGA1 = TLI->isGAPlusOffset(Loc.getNode(), GV1, Offset1);
6633 bool isGA2 = TLI->isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2);
6634 if (isGA1 && isGA2 && GV1 == GV2)
6635 return Offset1 == (Offset2 + Dist*Bytes);
6640 /// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if
6641 /// it cannot be inferred.
6642 unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const {
6643 // If this is a GlobalAddress + cst, return the alignment.
6644 const GlobalValue *GV;
6645 int64_t GVOffset = 0;
6646 if (TLI->isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) {
6647 unsigned PtrWidth = TLI->getPointerTypeSizeInBits(GV->getType());
6648 APInt KnownZero(PtrWidth, 0), KnownOne(PtrWidth, 0);
6649 llvm::computeKnownBits(const_cast<GlobalValue*>(GV), KnownZero, KnownOne,
6650 TLI->getDataLayout());
6651 unsigned AlignBits = KnownZero.countTrailingOnes();
6652 unsigned Align = AlignBits ? 1 << std::min(31U, AlignBits) : 0;
6654 return MinAlign(Align, GVOffset);
6657 // If this is a direct reference to a stack slot, use information about the
6658 // stack slot's alignment.
6659 int FrameIdx = 1 << 31;
6660 int64_t FrameOffset = 0;
6661 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) {
6662 FrameIdx = FI->getIndex();
6663 } else if (isBaseWithConstantOffset(Ptr) &&
6664 isa<FrameIndexSDNode>(Ptr.getOperand(0))) {
6666 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
6667 FrameOffset = Ptr.getConstantOperandVal(1);
6670 if (FrameIdx != (1 << 31)) {
6671 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo();
6672 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx),
6680 /// GetSplitDestVTs - Compute the VTs needed for the low/hi parts of a type
6681 /// which is split (or expanded) into two not necessarily identical pieces.
6682 std::pair<EVT, EVT> SelectionDAG::GetSplitDestVTs(const EVT &VT) const {
6683 // Currently all types are split in half.
6685 if (!VT.isVector()) {
6686 LoVT = HiVT = TLI->getTypeToTransformTo(*getContext(), VT);
6688 unsigned NumElements = VT.getVectorNumElements();
6689 assert(!(NumElements & 1) && "Splitting vector, but not in half!");
6690 LoVT = HiVT = EVT::getVectorVT(*getContext(), VT.getVectorElementType(),
6693 return std::make_pair(LoVT, HiVT);
6696 /// SplitVector - Split the vector with EXTRACT_SUBVECTOR and return the
6698 std::pair<SDValue, SDValue>
6699 SelectionDAG::SplitVector(const SDValue &N, const SDLoc &DL, const EVT &LoVT,
6701 assert(LoVT.getVectorNumElements() + HiVT.getVectorNumElements() <=
6702 N.getValueType().getVectorNumElements() &&
6703 "More vector elements requested than available!");
6705 Lo = getNode(ISD::EXTRACT_SUBVECTOR, DL, LoVT, N,
6706 getConstant(0, TLI->getVectorIdxTy()));
6707 Hi = getNode(ISD::EXTRACT_SUBVECTOR, DL, HiVT, N,
6708 getConstant(LoVT.getVectorNumElements(), TLI->getVectorIdxTy()));
6709 return std::make_pair(Lo, Hi);
6712 void SelectionDAG::ExtractVectorElements(SDValue Op,
6713 SmallVectorImpl<SDValue> &Args,
6714 unsigned Start, unsigned Count) {
6715 EVT VT = Op.getValueType();
6717 Count = VT.getVectorNumElements();
6719 EVT EltVT = VT.getVectorElementType();
6720 EVT IdxTy = TLI->getVectorIdxTy();
6722 for (unsigned i = Start, e = Start + Count; i != e; ++i) {
6723 Args.push_back(getNode(ISD::EXTRACT_VECTOR_ELT, SL, EltVT,
6724 Op, getConstant(i, IdxTy)));
6728 // getAddressSpace - Return the address space this GlobalAddress belongs to.
6729 unsigned GlobalAddressSDNode::getAddressSpace() const {
6730 return getGlobal()->getType()->getAddressSpace();
6734 Type *ConstantPoolSDNode::getType() const {
6735 if (isMachineConstantPoolEntry())
6736 return Val.MachineCPVal->getType();
6737 return Val.ConstVal->getType();
6740 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
6742 unsigned &SplatBitSize,
6744 unsigned MinSplatBits,
6745 bool isBigEndian) const {
6746 EVT VT = getValueType(0);
6747 assert(VT.isVector() && "Expected a vector type");
6748 unsigned sz = VT.getSizeInBits();
6749 if (MinSplatBits > sz)
6752 SplatValue = APInt(sz, 0);
6753 SplatUndef = APInt(sz, 0);
6755 // Get the bits. Bits with undefined values (when the corresponding element
6756 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
6757 // in SplatValue. If any of the values are not constant, give up and return
6759 unsigned int nOps = getNumOperands();
6760 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
6761 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
6763 for (unsigned j = 0; j < nOps; ++j) {
6764 unsigned i = isBigEndian ? nOps-1-j : j;
6765 SDValue OpVal = getOperand(i);
6766 unsigned BitPos = j * EltBitSize;
6768 if (OpVal.getOpcode() == ISD::UNDEF)
6769 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize);
6770 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
6771 SplatValue |= CN->getAPIntValue().zextOrTrunc(EltBitSize).
6772 zextOrTrunc(sz) << BitPos;
6773 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
6774 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
6779 // The build_vector is all constants or undefs. Find the smallest element
6780 // size that splats the vector.
6782 HasAnyUndefs = (SplatUndef != 0);
6785 unsigned HalfSize = sz / 2;
6786 APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize);
6787 APInt LowValue = SplatValue.trunc(HalfSize);
6788 APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize);
6789 APInt LowUndef = SplatUndef.trunc(HalfSize);
6791 // If the two halves do not match (ignoring undef bits), stop here.
6792 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
6793 MinSplatBits > HalfSize)
6796 SplatValue = HighValue | LowValue;
6797 SplatUndef = HighUndef & LowUndef;
6806 SDValue BuildVectorSDNode::getSplatValue(BitVector *UndefElements) const {
6807 if (UndefElements) {
6808 UndefElements->clear();
6809 UndefElements->resize(getNumOperands());
6812 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
6813 SDValue Op = getOperand(i);
6814 if (Op.getOpcode() == ISD::UNDEF) {
6816 (*UndefElements)[i] = true;
6817 } else if (!Splatted) {
6819 } else if (Splatted != Op) {
6825 assert(getOperand(0).getOpcode() == ISD::UNDEF &&
6826 "Can only have a splat without a constant for all undefs.");
6827 return getOperand(0);
6834 BuildVectorSDNode::getConstantSplatNode(BitVector *UndefElements) const {
6835 return dyn_cast_or_null<ConstantSDNode>(
6836 getSplatValue(UndefElements).getNode());
6840 BuildVectorSDNode::getConstantFPSplatNode(BitVector *UndefElements) const {
6841 return dyn_cast_or_null<ConstantFPSDNode>(
6842 getSplatValue(UndefElements).getNode());
6845 bool BuildVectorSDNode::isConstant() const {
6846 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
6847 unsigned Opc = getOperand(i).getOpcode();
6848 if (Opc != ISD::UNDEF && Opc != ISD::Constant && Opc != ISD::ConstantFP)
6854 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
6855 // Find the first non-undef value in the shuffle mask.
6857 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
6860 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
6862 // Make sure all remaining elements are either undef or the same as the first
6864 for (int Idx = Mask[i]; i != e; ++i)
6865 if (Mask[i] >= 0 && Mask[i] != Idx)
6871 static void checkForCyclesHelper(const SDNode *N,
6872 SmallPtrSetImpl<const SDNode*> &Visited,
6873 SmallPtrSetImpl<const SDNode*> &Checked,
6874 const llvm::SelectionDAG *DAG) {
6875 // If this node has already been checked, don't check it again.
6876 if (Checked.count(N))
6879 // If a node has already been visited on this depth-first walk, reject it as
6881 if (!Visited.insert(N).second) {
6882 errs() << "Detected cycle in SelectionDAG\n";
6883 dbgs() << "Offending node:\n";
6884 N->dumprFull(DAG); dbgs() << "\n";
6888 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6889 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked, DAG);
6896 void llvm::checkForCycles(const llvm::SDNode *N,
6897 const llvm::SelectionDAG *DAG,
6905 assert(N && "Checking nonexistent SDNode");
6906 SmallPtrSet<const SDNode*, 32> visited;
6907 SmallPtrSet<const SDNode*, 32> checked;
6908 checkForCyclesHelper(N, visited, checked, DAG);
6913 void llvm::checkForCycles(const llvm::SelectionDAG *DAG, bool force) {
6914 checkForCycles(DAG->getRoot().getNode(), DAG, force);