1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "SDNodeDbgValue.h"
16 #include "llvm/ADT/SetVector.h"
17 #include "llvm/ADT/SmallPtrSet.h"
18 #include "llvm/ADT/SmallSet.h"
19 #include "llvm/ADT/SmallVector.h"
20 #include "llvm/ADT/StringExtras.h"
21 #include "llvm/Analysis/ValueTracking.h"
22 #include "llvm/CodeGen/MachineBasicBlock.h"
23 #include "llvm/CodeGen/MachineConstantPool.h"
24 #include "llvm/CodeGen/MachineFrameInfo.h"
25 #include "llvm/CodeGen/MachineModuleInfo.h"
26 #include "llvm/IR/CallingConv.h"
27 #include "llvm/IR/Constants.h"
28 #include "llvm/IR/DataLayout.h"
29 #include "llvm/IR/DebugInfo.h"
30 #include "llvm/IR/DerivedTypes.h"
31 #include "llvm/IR/Function.h"
32 #include "llvm/IR/GlobalAlias.h"
33 #include "llvm/IR/GlobalVariable.h"
34 #include "llvm/IR/Intrinsics.h"
35 #include "llvm/Support/CommandLine.h"
36 #include "llvm/Support/Debug.h"
37 #include "llvm/Support/ErrorHandling.h"
38 #include "llvm/Support/ManagedStatic.h"
39 #include "llvm/Support/MathExtras.h"
40 #include "llvm/Support/Mutex.h"
41 #include "llvm/Support/raw_ostream.h"
42 #include "llvm/Target/TargetInstrInfo.h"
43 #include "llvm/Target/TargetIntrinsicInfo.h"
44 #include "llvm/Target/TargetLowering.h"
45 #include "llvm/Target/TargetMachine.h"
46 #include "llvm/Target/TargetOptions.h"
47 #include "llvm/Target/TargetRegisterInfo.h"
48 #include "llvm/Target/TargetSelectionDAGInfo.h"
54 /// makeVTList - Return an instance of the SDVTList struct initialized with the
55 /// specified members.
56 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
57 SDVTList Res = {VTs, NumVTs};
61 // Default null implementations of the callbacks.
62 void SelectionDAG::DAGUpdateListener::NodeDeleted(SDNode*, SDNode*) {}
63 void SelectionDAG::DAGUpdateListener::NodeUpdated(SDNode*) {}
65 //===----------------------------------------------------------------------===//
66 // ConstantFPSDNode Class
67 //===----------------------------------------------------------------------===//
69 /// isExactlyValue - We don't rely on operator== working on double values, as
70 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
71 /// As such, this method can be used to do an exact bit-for-bit comparison of
72 /// two floating point values.
73 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
74 return getValueAPF().bitwiseIsEqual(V);
77 bool ConstantFPSDNode::isValueValidForType(EVT VT,
79 assert(VT.isFloatingPoint() && "Can only convert between FP types");
81 // convert modifies in place, so make a copy.
82 APFloat Val2 = APFloat(Val);
84 (void) Val2.convert(SelectionDAG::EVTToAPFloatSemantics(VT),
85 APFloat::rmNearestTiesToEven,
90 //===----------------------------------------------------------------------===//
92 //===----------------------------------------------------------------------===//
94 /// isBuildVectorAllOnes - Return true if the specified node is a
95 /// BUILD_VECTOR where all of the elements are ~0 or undef.
96 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
97 // Look through a bit convert.
98 if (N->getOpcode() == ISD::BITCAST)
99 N = N->getOperand(0).getNode();
101 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
103 unsigned i = 0, e = N->getNumOperands();
105 // Skip over all of the undef values.
106 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
109 // Do not accept an all-undef vector.
110 if (i == e) return false;
112 // Do not accept build_vectors that aren't all constants or which have non-~0
113 // elements. We have to be a bit careful here, as the type of the constant
114 // may not be the same as the type of the vector elements due to type
115 // legalization (the elements are promoted to a legal type for the target and
116 // a vector of a type may be legal when the base element type is not).
117 // We only want to check enough bits to cover the vector elements, because
118 // we care if the resultant vector is all ones, not whether the individual
120 SDValue NotZero = N->getOperand(i);
121 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits();
122 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(NotZero)) {
123 if (CN->getAPIntValue().countTrailingOnes() < EltSize)
125 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(NotZero)) {
126 if (CFPN->getValueAPF().bitcastToAPInt().countTrailingOnes() < EltSize)
131 // Okay, we have at least one ~0 value, check to see if the rest match or are
132 // undefs. Even with the above element type twiddling, this should be OK, as
133 // the same type legalization should have applied to all the elements.
134 for (++i; i != e; ++i)
135 if (N->getOperand(i) != NotZero &&
136 N->getOperand(i).getOpcode() != ISD::UNDEF)
142 /// isBuildVectorAllZeros - Return true if the specified node is a
143 /// BUILD_VECTOR where all of the elements are 0 or undef.
144 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
145 // Look through a bit convert.
146 if (N->getOpcode() == ISD::BITCAST)
147 N = N->getOperand(0).getNode();
149 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
151 bool IsAllUndef = true;
152 for (unsigned i = 0, e = N->getNumOperands(); i < e; ++i) {
153 if (N->getOperand(i).getOpcode() == ISD::UNDEF)
156 // Do not accept build_vectors that aren't all constants or which have non-0
157 // elements. We have to be a bit careful here, as the type of the constant
158 // may not be the same as the type of the vector elements due to type
159 // legalization (the elements are promoted to a legal type for the target
160 // and a vector of a type may be legal when the base element type is not).
161 // We only want to check enough bits to cover the vector elements, because
162 // we care if the resultant vector is all zeros, not whether the individual
164 SDValue Zero = N->getOperand(i);
165 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits();
166 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Zero)) {
167 if (CN->getAPIntValue().countTrailingZeros() < EltSize)
169 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(Zero)) {
170 if (CFPN->getValueAPF().bitcastToAPInt().countTrailingZeros() < EltSize)
176 // Do not accept an all-undef vector.
182 /// \brief Return true if the specified node is a BUILD_VECTOR node of
183 /// all ConstantSDNode or undef.
184 bool ISD::isBuildVectorOfConstantSDNodes(const SDNode *N) {
185 if (N->getOpcode() != ISD::BUILD_VECTOR)
188 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
189 SDValue Op = N->getOperand(i);
190 if (Op.getOpcode() == ISD::UNDEF)
192 if (!isa<ConstantSDNode>(Op))
198 /// isScalarToVector - Return true if the specified node is a
199 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
200 /// element is not an undef.
201 bool ISD::isScalarToVector(const SDNode *N) {
202 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
205 if (N->getOpcode() != ISD::BUILD_VECTOR)
207 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
209 unsigned NumElems = N->getNumOperands();
212 for (unsigned i = 1; i < NumElems; ++i) {
213 SDValue V = N->getOperand(i);
214 if (V.getOpcode() != ISD::UNDEF)
220 /// allOperandsUndef - Return true if the node has at least one operand
221 /// and all operands of the specified node are ISD::UNDEF.
222 bool ISD::allOperandsUndef(const SDNode *N) {
223 // Return false if the node has no operands.
224 // This is "logically inconsistent" with the definition of "all" but
225 // is probably the desired behavior.
226 if (N->getNumOperands() == 0)
229 for (unsigned i = 0, e = N->getNumOperands(); i != e ; ++i)
230 if (N->getOperand(i).getOpcode() != ISD::UNDEF)
236 ISD::NodeType ISD::getExtForLoadExtType(ISD::LoadExtType ExtType) {
239 return ISD::ANY_EXTEND;
241 return ISD::SIGN_EXTEND;
243 return ISD::ZERO_EXTEND;
248 llvm_unreachable("Invalid LoadExtType");
251 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
252 /// when given the operation for (X op Y).
253 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
254 // To perform this operation, we just need to swap the L and G bits of the
256 unsigned OldL = (Operation >> 2) & 1;
257 unsigned OldG = (Operation >> 1) & 1;
258 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
259 (OldL << 1) | // New G bit
260 (OldG << 2)); // New L bit.
263 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
264 /// 'op' is a valid SetCC operation.
265 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
266 unsigned Operation = Op;
268 Operation ^= 7; // Flip L, G, E bits, but not U.
270 Operation ^= 15; // Flip all of the condition bits.
272 if (Operation > ISD::SETTRUE2)
273 Operation &= ~8; // Don't let N and U bits get set.
275 return ISD::CondCode(Operation);
279 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
280 /// signed operation and 2 if the result is an unsigned comparison. Return zero
281 /// if the operation does not depend on the sign of the input (setne and seteq).
282 static int isSignedOp(ISD::CondCode Opcode) {
284 default: llvm_unreachable("Illegal integer setcc operation!");
286 case ISD::SETNE: return 0;
290 case ISD::SETGE: return 1;
294 case ISD::SETUGE: return 2;
298 /// getSetCCOrOperation - Return the result of a logical OR between different
299 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
300 /// returns SETCC_INVALID if it is not possible to represent the resultant
302 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
304 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
305 // Cannot fold a signed integer setcc with an unsigned integer setcc.
306 return ISD::SETCC_INVALID;
308 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
310 // If the N and U bits get set then the resultant comparison DOES suddenly
311 // care about orderedness, and is true when ordered.
312 if (Op > ISD::SETTRUE2)
313 Op &= ~16; // Clear the U bit if the N bit is set.
315 // Canonicalize illegal integer setcc's.
316 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
319 return ISD::CondCode(Op);
322 /// getSetCCAndOperation - Return the result of a logical AND between different
323 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
324 /// function returns zero if it is not possible to represent the resultant
326 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
328 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
329 // Cannot fold a signed setcc with an unsigned setcc.
330 return ISD::SETCC_INVALID;
332 // Combine all of the condition bits.
333 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
335 // Canonicalize illegal integer setcc's.
339 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
340 case ISD::SETOEQ: // SETEQ & SETU[LG]E
341 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
342 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
343 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
350 //===----------------------------------------------------------------------===//
351 // SDNode Profile Support
352 //===----------------------------------------------------------------------===//
354 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
356 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
360 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
361 /// solely with their pointer.
362 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
363 ID.AddPointer(VTList.VTs);
366 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
368 static void AddNodeIDOperands(FoldingSetNodeID &ID,
369 ArrayRef<SDValue> Ops) {
370 for (auto& Op : Ops) {
371 ID.AddPointer(Op.getNode());
372 ID.AddInteger(Op.getResNo());
376 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
378 static void AddNodeIDOperands(FoldingSetNodeID &ID,
379 ArrayRef<SDUse> Ops) {
380 for (auto& Op : Ops) {
381 ID.AddPointer(Op.getNode());
382 ID.AddInteger(Op.getResNo());
386 static void AddBinaryNodeIDCustom(FoldingSetNodeID &ID, bool nuw, bool nsw,
390 ID.AddBoolean(exact);
393 /// AddBinaryNodeIDCustom - Add BinarySDNodes special infos
394 static void AddBinaryNodeIDCustom(FoldingSetNodeID &ID, unsigned Opcode,
395 bool nuw, bool nsw, bool exact) {
396 if (isBinOpWithFlags(Opcode))
397 AddBinaryNodeIDCustom(ID, nuw, nsw, exact);
400 static void AddNodeIDNode(FoldingSetNodeID &ID, unsigned short OpC,
401 SDVTList VTList, ArrayRef<SDValue> OpList) {
402 AddNodeIDOpcode(ID, OpC);
403 AddNodeIDValueTypes(ID, VTList);
404 AddNodeIDOperands(ID, OpList);
407 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
409 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
410 switch (N->getOpcode()) {
411 case ISD::TargetExternalSymbol:
412 case ISD::ExternalSymbol:
413 llvm_unreachable("Should only be used on nodes with operands");
414 default: break; // Normal nodes don't need extra info.
415 case ISD::TargetConstant:
416 case ISD::Constant: {
417 const ConstantSDNode *C = cast<ConstantSDNode>(N);
418 ID.AddPointer(C->getConstantIntValue());
419 ID.AddBoolean(C->isOpaque());
422 case ISD::TargetConstantFP:
423 case ISD::ConstantFP: {
424 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
427 case ISD::TargetGlobalAddress:
428 case ISD::GlobalAddress:
429 case ISD::TargetGlobalTLSAddress:
430 case ISD::GlobalTLSAddress: {
431 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
432 ID.AddPointer(GA->getGlobal());
433 ID.AddInteger(GA->getOffset());
434 ID.AddInteger(GA->getTargetFlags());
435 ID.AddInteger(GA->getAddressSpace());
438 case ISD::BasicBlock:
439 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
442 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
444 case ISD::RegisterMask:
445 ID.AddPointer(cast<RegisterMaskSDNode>(N)->getRegMask());
448 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
450 case ISD::FrameIndex:
451 case ISD::TargetFrameIndex:
452 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
455 case ISD::TargetJumpTable:
456 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
457 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
459 case ISD::ConstantPool:
460 case ISD::TargetConstantPool: {
461 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
462 ID.AddInteger(CP->getAlignment());
463 ID.AddInteger(CP->getOffset());
464 if (CP->isMachineConstantPoolEntry())
465 CP->getMachineCPVal()->addSelectionDAGCSEId(ID);
467 ID.AddPointer(CP->getConstVal());
468 ID.AddInteger(CP->getTargetFlags());
471 case ISD::TargetIndex: {
472 const TargetIndexSDNode *TI = cast<TargetIndexSDNode>(N);
473 ID.AddInteger(TI->getIndex());
474 ID.AddInteger(TI->getOffset());
475 ID.AddInteger(TI->getTargetFlags());
479 const LoadSDNode *LD = cast<LoadSDNode>(N);
480 ID.AddInteger(LD->getMemoryVT().getRawBits());
481 ID.AddInteger(LD->getRawSubclassData());
482 ID.AddInteger(LD->getPointerInfo().getAddrSpace());
486 const StoreSDNode *ST = cast<StoreSDNode>(N);
487 ID.AddInteger(ST->getMemoryVT().getRawBits());
488 ID.AddInteger(ST->getRawSubclassData());
489 ID.AddInteger(ST->getPointerInfo().getAddrSpace());
500 const BinaryWithFlagsSDNode *BinNode = cast<BinaryWithFlagsSDNode>(N);
501 AddBinaryNodeIDCustom(ID, N->getOpcode(), BinNode->hasNoUnsignedWrap(),
502 BinNode->hasNoSignedWrap(), BinNode->isExact());
505 case ISD::ATOMIC_CMP_SWAP:
506 case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS:
507 case ISD::ATOMIC_SWAP:
508 case ISD::ATOMIC_LOAD_ADD:
509 case ISD::ATOMIC_LOAD_SUB:
510 case ISD::ATOMIC_LOAD_AND:
511 case ISD::ATOMIC_LOAD_OR:
512 case ISD::ATOMIC_LOAD_XOR:
513 case ISD::ATOMIC_LOAD_NAND:
514 case ISD::ATOMIC_LOAD_MIN:
515 case ISD::ATOMIC_LOAD_MAX:
516 case ISD::ATOMIC_LOAD_UMIN:
517 case ISD::ATOMIC_LOAD_UMAX:
518 case ISD::ATOMIC_LOAD:
519 case ISD::ATOMIC_STORE: {
520 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
521 ID.AddInteger(AT->getMemoryVT().getRawBits());
522 ID.AddInteger(AT->getRawSubclassData());
523 ID.AddInteger(AT->getPointerInfo().getAddrSpace());
526 case ISD::PREFETCH: {
527 const MemSDNode *PF = cast<MemSDNode>(N);
528 ID.AddInteger(PF->getPointerInfo().getAddrSpace());
531 case ISD::VECTOR_SHUFFLE: {
532 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
533 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
535 ID.AddInteger(SVN->getMaskElt(i));
538 case ISD::TargetBlockAddress:
539 case ISD::BlockAddress: {
540 const BlockAddressSDNode *BA = cast<BlockAddressSDNode>(N);
541 ID.AddPointer(BA->getBlockAddress());
542 ID.AddInteger(BA->getOffset());
543 ID.AddInteger(BA->getTargetFlags());
546 } // end switch (N->getOpcode())
548 // Target specific memory nodes could also have address spaces to check.
549 if (N->isTargetMemoryOpcode())
550 ID.AddInteger(cast<MemSDNode>(N)->getPointerInfo().getAddrSpace());
553 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
555 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
556 AddNodeIDOpcode(ID, N->getOpcode());
557 // Add the return value info.
558 AddNodeIDValueTypes(ID, N->getVTList());
559 // Add the operand info.
560 AddNodeIDOperands(ID, N->ops());
562 // Handle SDNode leafs with special info.
563 AddNodeIDCustom(ID, N);
566 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
567 /// the CSE map that carries volatility, temporalness, indexing mode, and
568 /// extension/truncation information.
570 static inline unsigned
571 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile,
572 bool isNonTemporal, bool isInvariant) {
573 assert((ConvType & 3) == ConvType &&
574 "ConvType may not require more than 2 bits!");
575 assert((AM & 7) == AM &&
576 "AM may not require more than 3 bits!");
580 (isNonTemporal << 6) |
584 //===----------------------------------------------------------------------===//
585 // SelectionDAG Class
586 //===----------------------------------------------------------------------===//
588 /// doNotCSE - Return true if CSE should not be performed for this node.
589 static bool doNotCSE(SDNode *N) {
590 if (N->getValueType(0) == MVT::Glue)
591 return true; // Never CSE anything that produces a flag.
593 switch (N->getOpcode()) {
595 case ISD::HANDLENODE:
597 return true; // Never CSE these nodes.
600 // Check that remaining values produced are not flags.
601 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
602 if (N->getValueType(i) == MVT::Glue)
603 return true; // Never CSE anything that produces a flag.
608 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
610 void SelectionDAG::RemoveDeadNodes() {
611 // Create a dummy node (which is not added to allnodes), that adds a reference
612 // to the root node, preventing it from being deleted.
613 HandleSDNode Dummy(getRoot());
615 SmallVector<SDNode*, 128> DeadNodes;
617 // Add all obviously-dead nodes to the DeadNodes worklist.
618 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
620 DeadNodes.push_back(I);
622 RemoveDeadNodes(DeadNodes);
624 // If the root changed (e.g. it was a dead load, update the root).
625 setRoot(Dummy.getValue());
628 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
629 /// given list, and any nodes that become unreachable as a result.
630 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes) {
632 // Process the worklist, deleting the nodes and adding their uses to the
634 while (!DeadNodes.empty()) {
635 SDNode *N = DeadNodes.pop_back_val();
637 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
638 DUL->NodeDeleted(N, nullptr);
640 // Take the node out of the appropriate CSE map.
641 RemoveNodeFromCSEMaps(N);
643 // Next, brutally remove the operand list. This is safe to do, as there are
644 // no cycles in the graph.
645 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
647 SDNode *Operand = Use.getNode();
650 // Now that we removed this operand, see if there are no uses of it left.
651 if (Operand->use_empty())
652 DeadNodes.push_back(Operand);
659 void SelectionDAG::RemoveDeadNode(SDNode *N){
660 SmallVector<SDNode*, 16> DeadNodes(1, N);
662 // Create a dummy node that adds a reference to the root node, preventing
663 // it from being deleted. (This matters if the root is an operand of the
665 HandleSDNode Dummy(getRoot());
667 RemoveDeadNodes(DeadNodes);
670 void SelectionDAG::DeleteNode(SDNode *N) {
671 // First take this out of the appropriate CSE map.
672 RemoveNodeFromCSEMaps(N);
674 // Finally, remove uses due to operands of this node, remove from the
675 // AllNodes list, and delete the node.
676 DeleteNodeNotInCSEMaps(N);
679 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
680 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
681 assert(N->use_empty() && "Cannot delete a node that is not dead!");
683 // Drop all of the operands and decrement used node's use counts.
689 void SelectionDAG::DeallocateNode(SDNode *N) {
690 if (N->OperandsNeedDelete)
691 delete[] N->OperandList;
693 // Set the opcode to DELETED_NODE to help catch bugs when node
694 // memory is reallocated.
695 N->NodeType = ISD::DELETED_NODE;
697 NodeAllocator.Deallocate(AllNodes.remove(N));
699 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them.
700 ArrayRef<SDDbgValue*> DbgVals = DbgInfo->getSDDbgValues(N);
701 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i)
702 DbgVals[i]->setIsInvalidated();
705 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
706 /// correspond to it. This is useful when we're about to delete or repurpose
707 /// the node. We don't want future request for structurally identical nodes
708 /// to return N anymore.
709 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
711 switch (N->getOpcode()) {
712 case ISD::HANDLENODE: return false; // noop.
714 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
715 "Cond code doesn't exist!");
716 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != nullptr;
717 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = nullptr;
719 case ISD::ExternalSymbol:
720 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
722 case ISD::TargetExternalSymbol: {
723 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
724 Erased = TargetExternalSymbols.erase(
725 std::pair<std::string,unsigned char>(ESN->getSymbol(),
726 ESN->getTargetFlags()));
729 case ISD::VALUETYPE: {
730 EVT VT = cast<VTSDNode>(N)->getVT();
731 if (VT.isExtended()) {
732 Erased = ExtendedValueTypeNodes.erase(VT);
734 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != nullptr;
735 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = nullptr;
740 // Remove it from the CSE Map.
741 assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!");
742 assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!");
743 Erased = CSEMap.RemoveNode(N);
747 // Verify that the node was actually in one of the CSE maps, unless it has a
748 // flag result (which cannot be CSE'd) or is one of the special cases that are
749 // not subject to CSE.
750 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue &&
751 !N->isMachineOpcode() && !doNotCSE(N)) {
754 llvm_unreachable("Node is not in map!");
760 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
761 /// maps and modified in place. Add it back to the CSE maps, unless an identical
762 /// node already exists, in which case transfer all its users to the existing
763 /// node. This transfer can potentially trigger recursive merging.
766 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N) {
767 // For node types that aren't CSE'd, just act as if no identical node
770 SDNode *Existing = CSEMap.GetOrInsertNode(N);
772 // If there was already an existing matching node, use ReplaceAllUsesWith
773 // to replace the dead one with the existing one. This can cause
774 // recursive merging of other unrelated nodes down the line.
775 ReplaceAllUsesWith(N, Existing);
777 // N is now dead. Inform the listeners and delete it.
778 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
779 DUL->NodeDeleted(N, Existing);
780 DeleteNodeNotInCSEMaps(N);
785 // If the node doesn't already exist, we updated it. Inform listeners.
786 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
790 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
791 /// were replaced with those specified. If this node is never memoized,
792 /// return null, otherwise return a pointer to the slot it would take. If a
793 /// node already exists with these operands, the slot will be non-null.
794 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
799 SDValue Ops[] = { Op };
801 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops);
802 AddNodeIDCustom(ID, N);
803 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
807 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
808 /// were replaced with those specified. If this node is never memoized,
809 /// return null, otherwise return a pointer to the slot it would take. If a
810 /// node already exists with these operands, the slot will be non-null.
811 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
812 SDValue Op1, SDValue Op2,
817 SDValue Ops[] = { Op1, Op2 };
819 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops);
820 AddNodeIDCustom(ID, N);
821 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
826 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
827 /// were replaced with those specified. If this node is never memoized,
828 /// return null, otherwise return a pointer to the slot it would take. If a
829 /// node already exists with these operands, the slot will be non-null.
830 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, ArrayRef<SDValue> Ops,
836 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops);
837 AddNodeIDCustom(ID, N);
838 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
843 /// VerifyNodeCommon - Sanity check the given node. Aborts if it is invalid.
844 static void VerifyNodeCommon(SDNode *N) {
845 switch (N->getOpcode()) {
848 case ISD::BUILD_PAIR: {
849 EVT VT = N->getValueType(0);
850 assert(N->getNumValues() == 1 && "Too many results!");
851 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
852 "Wrong return type!");
853 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
854 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
855 "Mismatched operand types!");
856 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
857 "Wrong operand type!");
858 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
859 "Wrong return type size");
862 case ISD::BUILD_VECTOR: {
863 assert(N->getNumValues() == 1 && "Too many results!");
864 assert(N->getValueType(0).isVector() && "Wrong return type!");
865 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
866 "Wrong number of operands!");
867 EVT EltVT = N->getValueType(0).getVectorElementType();
868 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) {
869 assert((I->getValueType() == EltVT ||
870 (EltVT.isInteger() && I->getValueType().isInteger() &&
871 EltVT.bitsLE(I->getValueType()))) &&
872 "Wrong operand type!");
873 assert(I->getValueType() == N->getOperand(0).getValueType() &&
874 "Operands must all have the same type");
881 /// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid.
882 static void VerifySDNode(SDNode *N) {
883 // The SDNode allocators cannot be used to allocate nodes with fields that are
884 // not present in an SDNode!
885 assert(!isa<MemSDNode>(N) && "Bad MemSDNode!");
886 assert(!isa<ShuffleVectorSDNode>(N) && "Bad ShuffleVectorSDNode!");
887 assert(!isa<ConstantSDNode>(N) && "Bad ConstantSDNode!");
888 assert(!isa<ConstantFPSDNode>(N) && "Bad ConstantFPSDNode!");
889 assert(!isa<GlobalAddressSDNode>(N) && "Bad GlobalAddressSDNode!");
890 assert(!isa<FrameIndexSDNode>(N) && "Bad FrameIndexSDNode!");
891 assert(!isa<JumpTableSDNode>(N) && "Bad JumpTableSDNode!");
892 assert(!isa<ConstantPoolSDNode>(N) && "Bad ConstantPoolSDNode!");
893 assert(!isa<BasicBlockSDNode>(N) && "Bad BasicBlockSDNode!");
894 assert(!isa<SrcValueSDNode>(N) && "Bad SrcValueSDNode!");
895 assert(!isa<MDNodeSDNode>(N) && "Bad MDNodeSDNode!");
896 assert(!isa<RegisterSDNode>(N) && "Bad RegisterSDNode!");
897 assert(!isa<BlockAddressSDNode>(N) && "Bad BlockAddressSDNode!");
898 assert(!isa<EHLabelSDNode>(N) && "Bad EHLabelSDNode!");
899 assert(!isa<ExternalSymbolSDNode>(N) && "Bad ExternalSymbolSDNode!");
900 assert(!isa<CondCodeSDNode>(N) && "Bad CondCodeSDNode!");
901 assert(!isa<CvtRndSatSDNode>(N) && "Bad CvtRndSatSDNode!");
902 assert(!isa<VTSDNode>(N) && "Bad VTSDNode!");
903 assert(!isa<MachineSDNode>(N) && "Bad MachineSDNode!");
908 /// VerifyMachineNode - Sanity check the given MachineNode. Aborts if it is
910 static void VerifyMachineNode(SDNode *N) {
911 // The MachineNode allocators cannot be used to allocate nodes with fields
912 // that are not present in a MachineNode!
913 // Currently there are no such nodes.
919 /// getEVTAlignment - Compute the default alignment value for the
922 unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
923 Type *Ty = VT == MVT::iPTR ?
924 PointerType::get(Type::getInt8Ty(*getContext()), 0) :
925 VT.getTypeForEVT(*getContext());
927 return TM.getTargetLowering()->getDataLayout()->getABITypeAlignment(Ty);
930 // EntryNode could meaningfully have debug info if we can find it...
931 SelectionDAG::SelectionDAG(const TargetMachine &tm, CodeGenOpt::Level OL)
932 : TM(tm), TSI(*tm.getSelectionDAGInfo()), TLI(nullptr), OptLevel(OL),
933 EntryNode(ISD::EntryToken, 0, DebugLoc(), getVTList(MVT::Other)),
934 Root(getEntryNode()), NewNodesMustHaveLegalTypes(false),
935 UpdateListeners(nullptr) {
936 AllNodes.push_back(&EntryNode);
937 DbgInfo = new SDDbgInfo();
940 void SelectionDAG::init(MachineFunction &mf, const TargetLowering *tli) {
943 Context = &mf.getFunction()->getContext();
946 SelectionDAG::~SelectionDAG() {
947 assert(!UpdateListeners && "Dangling registered DAGUpdateListeners");
952 void SelectionDAG::allnodes_clear() {
953 assert(&*AllNodes.begin() == &EntryNode);
954 AllNodes.remove(AllNodes.begin());
955 while (!AllNodes.empty())
956 DeallocateNode(AllNodes.begin());
959 BinarySDNode *SelectionDAG::GetBinarySDNode(unsigned Opcode, SDLoc DL,
960 SDVTList VTs, SDValue N1,
961 SDValue N2, bool nuw, bool nsw,
963 if (isBinOpWithFlags(Opcode)) {
964 BinaryWithFlagsSDNode *FN = new (NodeAllocator) BinaryWithFlagsSDNode(
965 Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs, N1, N2);
966 FN->setHasNoUnsignedWrap(nuw);
967 FN->setHasNoSignedWrap(nsw);
968 FN->setIsExact(exact);
973 BinarySDNode *N = new (NodeAllocator)
974 BinarySDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs, N1, N2);
978 void SelectionDAG::clear() {
980 OperandAllocator.Reset();
983 ExtendedValueTypeNodes.clear();
984 ExternalSymbols.clear();
985 TargetExternalSymbols.clear();
986 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
987 static_cast<CondCodeSDNode*>(nullptr));
988 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
989 static_cast<SDNode*>(nullptr));
991 EntryNode.UseList = nullptr;
992 AllNodes.push_back(&EntryNode);
993 Root = getEntryNode();
997 SDValue SelectionDAG::getAnyExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) {
998 return VT.bitsGT(Op.getValueType()) ?
999 getNode(ISD::ANY_EXTEND, DL, VT, Op) :
1000 getNode(ISD::TRUNCATE, DL, VT, Op);
1003 SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) {
1004 return VT.bitsGT(Op.getValueType()) ?
1005 getNode(ISD::SIGN_EXTEND, DL, VT, Op) :
1006 getNode(ISD::TRUNCATE, DL, VT, Op);
1009 SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) {
1010 return VT.bitsGT(Op.getValueType()) ?
1011 getNode(ISD::ZERO_EXTEND, DL, VT, Op) :
1012 getNode(ISD::TRUNCATE, DL, VT, Op);
1015 SDValue SelectionDAG::getBoolExtOrTrunc(SDValue Op, SDLoc SL, EVT VT) {
1016 if (VT.bitsLE(Op.getValueType()))
1017 return getNode(ISD::TRUNCATE, SL, VT, Op);
1019 TargetLowering::BooleanContent BType = TLI->getBooleanContents(VT.isVector());
1020 return getNode(TLI->getExtendForContent(BType), SL, VT, Op);
1023 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, SDLoc DL, EVT VT) {
1024 assert(!VT.isVector() &&
1025 "getZeroExtendInReg should use the vector element type instead of "
1026 "the vector type!");
1027 if (Op.getValueType() == VT) return Op;
1028 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1029 APInt Imm = APInt::getLowBitsSet(BitWidth,
1030 VT.getSizeInBits());
1031 return getNode(ISD::AND, DL, Op.getValueType(), Op,
1032 getConstant(Imm, Op.getValueType()));
1035 SDValue SelectionDAG::getZeroExtendVectorInReg(SDValue Op, SDLoc DL, EVT VT) {
1036 assert(VT.isVector() && "This DAG node is restricted to vector types.");
1037 assert(VT.getVectorNumElements() < Op.getValueType().getVectorNumElements() &&
1038 "The destination vector type must have fewer lanes than the input.");
1039 return getNode(ISD::ZERO_EXTEND_VECTOR_INREG, DL, VT, Op);
1042 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
1044 SDValue SelectionDAG::getNOT(SDLoc DL, SDValue Val, EVT VT) {
1045 EVT EltVT = VT.getScalarType();
1047 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT);
1048 return getNode(ISD::XOR, DL, VT, Val, NegOne);
1051 SDValue SelectionDAG::getLogicalNOT(SDLoc DL, SDValue Val, EVT VT) {
1052 EVT EltVT = VT.getScalarType();
1054 switch (TLI->getBooleanContents(VT.isVector())) {
1055 case TargetLowering::ZeroOrOneBooleanContent:
1056 case TargetLowering::UndefinedBooleanContent:
1057 TrueValue = getConstant(1, VT);
1059 case TargetLowering::ZeroOrNegativeOneBooleanContent:
1060 TrueValue = getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()),
1064 return getNode(ISD::XOR, DL, VT, Val, TrueValue);
1067 SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT, bool isO) {
1068 EVT EltVT = VT.getScalarType();
1069 assert((EltVT.getSizeInBits() >= 64 ||
1070 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
1071 "getConstant with a uint64_t value that doesn't fit in the type!");
1072 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT, isO);
1075 SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT, bool isO)
1077 return getConstant(*ConstantInt::get(*Context, Val), VT, isT, isO);
1080 SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT,
1082 assert(VT.isInteger() && "Cannot create FP integer constant!");
1084 EVT EltVT = VT.getScalarType();
1085 const ConstantInt *Elt = &Val;
1087 const TargetLowering *TLI = TM.getTargetLowering();
1089 // In some cases the vector type is legal but the element type is illegal and
1090 // needs to be promoted, for example v8i8 on ARM. In this case, promote the
1091 // inserted value (the type does not need to match the vector element type).
1092 // Any extra bits introduced will be truncated away.
1093 if (VT.isVector() && TLI->getTypeAction(*getContext(), EltVT) ==
1094 TargetLowering::TypePromoteInteger) {
1095 EltVT = TLI->getTypeToTransformTo(*getContext(), EltVT);
1096 APInt NewVal = Elt->getValue().zext(EltVT.getSizeInBits());
1097 Elt = ConstantInt::get(*getContext(), NewVal);
1099 // In other cases the element type is illegal and needs to be expanded, for
1100 // example v2i64 on MIPS32. In this case, find the nearest legal type, split
1101 // the value into n parts and use a vector type with n-times the elements.
1102 // Then bitcast to the type requested.
1103 // Legalizing constants too early makes the DAGCombiner's job harder so we
1104 // only legalize if the DAG tells us we must produce legal types.
1105 else if (NewNodesMustHaveLegalTypes && VT.isVector() &&
1106 TLI->getTypeAction(*getContext(), EltVT) ==
1107 TargetLowering::TypeExpandInteger) {
1108 APInt NewVal = Elt->getValue();
1109 EVT ViaEltVT = TLI->getTypeToTransformTo(*getContext(), EltVT);
1110 unsigned ViaEltSizeInBits = ViaEltVT.getSizeInBits();
1111 unsigned ViaVecNumElts = VT.getSizeInBits() / ViaEltSizeInBits;
1112 EVT ViaVecVT = EVT::getVectorVT(*getContext(), ViaEltVT, ViaVecNumElts);
1114 // Check the temporary vector is the correct size. If this fails then
1115 // getTypeToTransformTo() probably returned a type whose size (in bits)
1116 // isn't a power-of-2 factor of the requested type size.
1117 assert(ViaVecVT.getSizeInBits() == VT.getSizeInBits());
1119 SmallVector<SDValue, 2> EltParts;
1120 for (unsigned i = 0; i < ViaVecNumElts / VT.getVectorNumElements(); ++i) {
1121 EltParts.push_back(getConstant(NewVal.lshr(i * ViaEltSizeInBits)
1122 .trunc(ViaEltSizeInBits),
1123 ViaEltVT, isT, isO));
1126 // EltParts is currently in little endian order. If we actually want
1127 // big-endian order then reverse it now.
1128 if (TLI->isBigEndian())
1129 std::reverse(EltParts.begin(), EltParts.end());
1131 // The elements must be reversed when the element order is different
1132 // to the endianness of the elements (because the BITCAST is itself a
1133 // vector shuffle in this situation). However, we do not need any code to
1134 // perform this reversal because getConstant() is producing a vector
1136 // This situation occurs in MIPS MSA.
1138 SmallVector<SDValue, 8> Ops;
1139 for (unsigned i = 0; i < VT.getVectorNumElements(); ++i)
1140 Ops.insert(Ops.end(), EltParts.begin(), EltParts.end());
1142 SDValue Result = getNode(ISD::BITCAST, SDLoc(), VT,
1143 getNode(ISD::BUILD_VECTOR, SDLoc(), ViaVecVT,
1148 assert(Elt->getBitWidth() == EltVT.getSizeInBits() &&
1149 "APInt size does not match type size!");
1150 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
1151 FoldingSetNodeID ID;
1152 AddNodeIDNode(ID, Opc, getVTList(EltVT), None);
1156 SDNode *N = nullptr;
1157 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
1159 return SDValue(N, 0);
1162 N = new (NodeAllocator) ConstantSDNode(isT, isO, Elt, EltVT);
1163 CSEMap.InsertNode(N, IP);
1164 AllNodes.push_back(N);
1167 SDValue Result(N, 0);
1168 if (VT.isVector()) {
1169 SmallVector<SDValue, 8> Ops;
1170 Ops.assign(VT.getVectorNumElements(), Result);
1171 Result = getNode(ISD::BUILD_VECTOR, SDLoc(), VT, Ops);
1176 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
1177 return getConstant(Val, TM.getTargetLowering()->getPointerTy(), isTarget);
1181 SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) {
1182 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget);
1185 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){
1186 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
1188 EVT EltVT = VT.getScalarType();
1190 // Do the map lookup using the actual bit pattern for the floating point
1191 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
1192 // we don't have issues with SNANs.
1193 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
1194 FoldingSetNodeID ID;
1195 AddNodeIDNode(ID, Opc, getVTList(EltVT), None);
1198 SDNode *N = nullptr;
1199 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
1201 return SDValue(N, 0);
1204 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT);
1205 CSEMap.InsertNode(N, IP);
1206 AllNodes.push_back(N);
1209 SDValue Result(N, 0);
1210 if (VT.isVector()) {
1211 SmallVector<SDValue, 8> Ops;
1212 Ops.assign(VT.getVectorNumElements(), Result);
1213 // FIXME SDLoc info might be appropriate here
1214 Result = getNode(ISD::BUILD_VECTOR, SDLoc(), VT, Ops);
1219 SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) {
1220 EVT EltVT = VT.getScalarType();
1221 if (EltVT==MVT::f32)
1222 return getConstantFP(APFloat((float)Val), VT, isTarget);
1223 else if (EltVT==MVT::f64)
1224 return getConstantFP(APFloat(Val), VT, isTarget);
1225 else if (EltVT==MVT::f80 || EltVT==MVT::f128 || EltVT==MVT::ppcf128 ||
1228 APFloat apf = APFloat(Val);
1229 apf.convert(EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven,
1231 return getConstantFP(apf, VT, isTarget);
1233 llvm_unreachable("Unsupported type in getConstantFP");
1236 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, SDLoc DL,
1237 EVT VT, int64_t Offset,
1239 unsigned char TargetFlags) {
1240 assert((TargetFlags == 0 || isTargetGA) &&
1241 "Cannot set target flags on target-independent globals");
1242 const TargetLowering *TLI = TM.getTargetLowering();
1244 // Truncate (with sign-extension) the offset value to the pointer size.
1245 unsigned BitWidth = TLI->getPointerTypeSizeInBits(GV->getType());
1247 Offset = SignExtend64(Offset, BitWidth);
1250 if (GV->isThreadLocal())
1251 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
1253 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
1255 FoldingSetNodeID ID;
1256 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1258 ID.AddInteger(Offset);
1259 ID.AddInteger(TargetFlags);
1260 ID.AddInteger(GV->getType()->getAddressSpace());
1262 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1263 return SDValue(E, 0);
1265 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL.getIROrder(),
1266 DL.getDebugLoc(), GV, VT,
1267 Offset, TargetFlags);
1268 CSEMap.InsertNode(N, IP);
1269 AllNodes.push_back(N);
1270 return SDValue(N, 0);
1273 SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
1274 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1275 FoldingSetNodeID ID;
1276 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1279 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1280 return SDValue(E, 0);
1282 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget);
1283 CSEMap.InsertNode(N, IP);
1284 AllNodes.push_back(N);
1285 return SDValue(N, 0);
1288 SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
1289 unsigned char TargetFlags) {
1290 assert((TargetFlags == 0 || isTarget) &&
1291 "Cannot set target flags on target-independent jump tables");
1292 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1293 FoldingSetNodeID ID;
1294 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1296 ID.AddInteger(TargetFlags);
1298 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1299 return SDValue(E, 0);
1301 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget,
1303 CSEMap.InsertNode(N, IP);
1304 AllNodes.push_back(N);
1305 return SDValue(N, 0);
1308 SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT,
1309 unsigned Alignment, int Offset,
1311 unsigned char TargetFlags) {
1312 assert((TargetFlags == 0 || isTarget) &&
1313 "Cannot set target flags on target-independent globals");
1316 TM.getTargetLowering()->getDataLayout()->getPrefTypeAlignment(C->getType());
1317 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1318 FoldingSetNodeID ID;
1319 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1320 ID.AddInteger(Alignment);
1321 ID.AddInteger(Offset);
1323 ID.AddInteger(TargetFlags);
1325 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1326 return SDValue(E, 0);
1328 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1329 Alignment, TargetFlags);
1330 CSEMap.InsertNode(N, IP);
1331 AllNodes.push_back(N);
1332 return SDValue(N, 0);
1336 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
1337 unsigned Alignment, int Offset,
1339 unsigned char TargetFlags) {
1340 assert((TargetFlags == 0 || isTarget) &&
1341 "Cannot set target flags on target-independent globals");
1344 TM.getTargetLowering()->getDataLayout()->getPrefTypeAlignment(C->getType());
1345 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1346 FoldingSetNodeID ID;
1347 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1348 ID.AddInteger(Alignment);
1349 ID.AddInteger(Offset);
1350 C->addSelectionDAGCSEId(ID);
1351 ID.AddInteger(TargetFlags);
1353 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1354 return SDValue(E, 0);
1356 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1357 Alignment, TargetFlags);
1358 CSEMap.InsertNode(N, IP);
1359 AllNodes.push_back(N);
1360 return SDValue(N, 0);
1363 SDValue SelectionDAG::getTargetIndex(int Index, EVT VT, int64_t Offset,
1364 unsigned char TargetFlags) {
1365 FoldingSetNodeID ID;
1366 AddNodeIDNode(ID, ISD::TargetIndex, getVTList(VT), None);
1367 ID.AddInteger(Index);
1368 ID.AddInteger(Offset);
1369 ID.AddInteger(TargetFlags);
1371 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1372 return SDValue(E, 0);
1374 SDNode *N = new (NodeAllocator) TargetIndexSDNode(Index, VT, Offset,
1376 CSEMap.InsertNode(N, IP);
1377 AllNodes.push_back(N);
1378 return SDValue(N, 0);
1381 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1382 FoldingSetNodeID ID;
1383 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), None);
1386 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1387 return SDValue(E, 0);
1389 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB);
1390 CSEMap.InsertNode(N, IP);
1391 AllNodes.push_back(N);
1392 return SDValue(N, 0);
1395 SDValue SelectionDAG::getValueType(EVT VT) {
1396 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
1397 ValueTypeNodes.size())
1398 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
1400 SDNode *&N = VT.isExtended() ?
1401 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
1403 if (N) return SDValue(N, 0);
1404 N = new (NodeAllocator) VTSDNode(VT);
1405 AllNodes.push_back(N);
1406 return SDValue(N, 0);
1409 SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
1410 SDNode *&N = ExternalSymbols[Sym];
1411 if (N) return SDValue(N, 0);
1412 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT);
1413 AllNodes.push_back(N);
1414 return SDValue(N, 0);
1417 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
1418 unsigned char TargetFlags) {
1420 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1422 if (N) return SDValue(N, 0);
1423 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1424 AllNodes.push_back(N);
1425 return SDValue(N, 0);
1428 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1429 if ((unsigned)Cond >= CondCodeNodes.size())
1430 CondCodeNodes.resize(Cond+1);
1432 if (!CondCodeNodes[Cond]) {
1433 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond);
1434 CondCodeNodes[Cond] = N;
1435 AllNodes.push_back(N);
1438 return SDValue(CondCodeNodes[Cond], 0);
1441 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1442 // the shuffle mask M that point at N1 to point at N2, and indices that point
1443 // N2 to point at N1.
1444 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1446 int NElts = M.size();
1447 for (int i = 0; i != NElts; ++i) {
1455 SDValue SelectionDAG::getVectorShuffle(EVT VT, SDLoc dl, SDValue N1,
1456 SDValue N2, const int *Mask) {
1457 assert(VT == N1.getValueType() && VT == N2.getValueType() &&
1458 "Invalid VECTOR_SHUFFLE");
1460 // Canonicalize shuffle undef, undef -> undef
1461 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1462 return getUNDEF(VT);
1464 // Validate that all indices in Mask are within the range of the elements
1465 // input to the shuffle.
1466 unsigned NElts = VT.getVectorNumElements();
1467 SmallVector<int, 8> MaskVec;
1468 for (unsigned i = 0; i != NElts; ++i) {
1469 assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1470 MaskVec.push_back(Mask[i]);
1473 // Canonicalize shuffle v, v -> v, undef
1476 for (unsigned i = 0; i != NElts; ++i)
1477 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1480 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1481 if (N1.getOpcode() == ISD::UNDEF)
1482 commuteShuffle(N1, N2, MaskVec);
1484 // Canonicalize all index into lhs, -> shuffle lhs, undef
1485 // Canonicalize all index into rhs, -> shuffle rhs, undef
1486 bool AllLHS = true, AllRHS = true;
1487 bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1488 for (unsigned i = 0; i != NElts; ++i) {
1489 if (MaskVec[i] >= (int)NElts) {
1494 } else if (MaskVec[i] >= 0) {
1498 if (AllLHS && AllRHS)
1499 return getUNDEF(VT);
1500 if (AllLHS && !N2Undef)
1504 commuteShuffle(N1, N2, MaskVec);
1506 // Reset our undef status after accounting for the mask.
1507 N2Undef = N2.getOpcode() == ISD::UNDEF;
1508 // Re-check whether both sides ended up undef.
1509 if (N1.getOpcode() == ISD::UNDEF && N2Undef)
1510 return getUNDEF(VT);
1512 // If Identity shuffle return that node.
1513 bool Identity = true;
1514 for (unsigned i = 0; i != NElts; ++i) {
1515 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1517 if (Identity && NElts)
1520 // Shuffling a constant splat doesn't change the result.
1524 // Look through any bitcasts. We check that these don't change the number
1525 // (and size) of elements and just changes their types.
1526 while (V.getOpcode() == ISD::BITCAST)
1527 V = V->getOperand(0);
1529 // A splat should always show up as a build vector node.
1530 if (auto *BV = dyn_cast<BuildVectorSDNode>(V)) {
1531 BitVector UndefElements;
1532 SDValue Splat = BV->getSplatValue(&UndefElements);
1533 // If this is a splat of an undef, shuffling it is also undef.
1534 if (Splat && Splat.getOpcode() == ISD::UNDEF)
1535 return getUNDEF(VT);
1537 // We only have a splat which can skip shuffles if there is a splatted
1538 // value and no undef lanes rearranged by the shuffle.
1539 if (Splat && UndefElements.none()) {
1540 // Splat of <x, x, ..., x>, return <x, x, ..., x>, provided that the
1541 // number of elements match or the value splatted is a zero constant.
1542 if (V.getValueType().getVectorNumElements() ==
1543 VT.getVectorNumElements())
1545 if (auto *C = dyn_cast<ConstantSDNode>(Splat))
1546 if (C->isNullValue())
1552 FoldingSetNodeID ID;
1553 SDValue Ops[2] = { N1, N2 };
1554 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops);
1555 for (unsigned i = 0; i != NElts; ++i)
1556 ID.AddInteger(MaskVec[i]);
1559 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1560 return SDValue(E, 0);
1562 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1563 // SDNode doesn't have access to it. This memory will be "leaked" when
1564 // the node is deallocated, but recovered when the NodeAllocator is released.
1565 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1566 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1568 ShuffleVectorSDNode *N =
1569 new (NodeAllocator) ShuffleVectorSDNode(VT, dl.getIROrder(),
1570 dl.getDebugLoc(), N1, N2,
1572 CSEMap.InsertNode(N, IP);
1573 AllNodes.push_back(N);
1574 return SDValue(N, 0);
1577 SDValue SelectionDAG::getConvertRndSat(EVT VT, SDLoc dl,
1578 SDValue Val, SDValue DTy,
1579 SDValue STy, SDValue Rnd, SDValue Sat,
1580 ISD::CvtCode Code) {
1581 // If the src and dest types are the same and the conversion is between
1582 // integer types of the same sign or two floats, no conversion is necessary.
1584 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1587 FoldingSetNodeID ID;
1588 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1589 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), Ops);
1591 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1592 return SDValue(E, 0);
1594 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl.getIROrder(),
1597 CSEMap.InsertNode(N, IP);
1598 AllNodes.push_back(N);
1599 return SDValue(N, 0);
1602 SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
1603 FoldingSetNodeID ID;
1604 AddNodeIDNode(ID, ISD::Register, getVTList(VT), None);
1605 ID.AddInteger(RegNo);
1607 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1608 return SDValue(E, 0);
1610 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT);
1611 CSEMap.InsertNode(N, IP);
1612 AllNodes.push_back(N);
1613 return SDValue(N, 0);
1616 SDValue SelectionDAG::getRegisterMask(const uint32_t *RegMask) {
1617 FoldingSetNodeID ID;
1618 AddNodeIDNode(ID, ISD::RegisterMask, getVTList(MVT::Untyped), None);
1619 ID.AddPointer(RegMask);
1621 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1622 return SDValue(E, 0);
1624 SDNode *N = new (NodeAllocator) RegisterMaskSDNode(RegMask);
1625 CSEMap.InsertNode(N, IP);
1626 AllNodes.push_back(N);
1627 return SDValue(N, 0);
1630 SDValue SelectionDAG::getEHLabel(SDLoc dl, SDValue Root, MCSymbol *Label) {
1631 FoldingSetNodeID ID;
1632 SDValue Ops[] = { Root };
1633 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), Ops);
1634 ID.AddPointer(Label);
1636 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1637 return SDValue(E, 0);
1639 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl.getIROrder(),
1640 dl.getDebugLoc(), Root, Label);
1641 CSEMap.InsertNode(N, IP);
1642 AllNodes.push_back(N);
1643 return SDValue(N, 0);
1647 SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT,
1650 unsigned char TargetFlags) {
1651 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress;
1653 FoldingSetNodeID ID;
1654 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1656 ID.AddInteger(Offset);
1657 ID.AddInteger(TargetFlags);
1659 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1660 return SDValue(E, 0);
1662 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, Offset,
1664 CSEMap.InsertNode(N, IP);
1665 AllNodes.push_back(N);
1666 return SDValue(N, 0);
1669 SDValue SelectionDAG::getSrcValue(const Value *V) {
1670 assert((!V || V->getType()->isPointerTy()) &&
1671 "SrcValue is not a pointer?");
1673 FoldingSetNodeID ID;
1674 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), None);
1678 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1679 return SDValue(E, 0);
1681 SDNode *N = new (NodeAllocator) SrcValueSDNode(V);
1682 CSEMap.InsertNode(N, IP);
1683 AllNodes.push_back(N);
1684 return SDValue(N, 0);
1687 /// getMDNode - Return an MDNodeSDNode which holds an MDNode.
1688 SDValue SelectionDAG::getMDNode(const MDNode *MD) {
1689 FoldingSetNodeID ID;
1690 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), None);
1694 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1695 return SDValue(E, 0);
1697 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD);
1698 CSEMap.InsertNode(N, IP);
1699 AllNodes.push_back(N);
1700 return SDValue(N, 0);
1703 /// getAddrSpaceCast - Return an AddrSpaceCastSDNode.
1704 SDValue SelectionDAG::getAddrSpaceCast(SDLoc dl, EVT VT, SDValue Ptr,
1705 unsigned SrcAS, unsigned DestAS) {
1706 SDValue Ops[] = {Ptr};
1707 FoldingSetNodeID ID;
1708 AddNodeIDNode(ID, ISD::ADDRSPACECAST, getVTList(VT), Ops);
1709 ID.AddInteger(SrcAS);
1710 ID.AddInteger(DestAS);
1713 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1714 return SDValue(E, 0);
1716 SDNode *N = new (NodeAllocator) AddrSpaceCastSDNode(dl.getIROrder(),
1718 VT, Ptr, SrcAS, DestAS);
1719 CSEMap.InsertNode(N, IP);
1720 AllNodes.push_back(N);
1721 return SDValue(N, 0);
1724 /// getShiftAmountOperand - Return the specified value casted to
1725 /// the target's desired shift amount type.
1726 SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) {
1727 EVT OpTy = Op.getValueType();
1728 EVT ShTy = TM.getTargetLowering()->getShiftAmountTy(LHSTy);
1729 if (OpTy == ShTy || OpTy.isVector()) return Op;
1731 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1732 return getNode(Opcode, SDLoc(Op), ShTy, Op);
1735 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1736 /// specified value type.
1737 SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
1738 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1739 unsigned ByteSize = VT.getStoreSize();
1740 Type *Ty = VT.getTypeForEVT(*getContext());
1741 const TargetLowering *TLI = TM.getTargetLowering();
1742 unsigned StackAlign =
1743 std::max((unsigned)TLI->getDataLayout()->getPrefTypeAlignment(Ty), minAlign);
1745 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false);
1746 return getFrameIndex(FrameIdx, TLI->getPointerTy());
1749 /// CreateStackTemporary - Create a stack temporary suitable for holding
1750 /// either of the specified value types.
1751 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
1752 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1753 VT2.getStoreSizeInBits())/8;
1754 Type *Ty1 = VT1.getTypeForEVT(*getContext());
1755 Type *Ty2 = VT2.getTypeForEVT(*getContext());
1756 const TargetLowering *TLI = TM.getTargetLowering();
1757 const DataLayout *TD = TLI->getDataLayout();
1758 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1759 TD->getPrefTypeAlignment(Ty2));
1761 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1762 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false);
1763 return getFrameIndex(FrameIdx, TLI->getPointerTy());
1766 SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
1767 SDValue N2, ISD::CondCode Cond, SDLoc dl) {
1768 // These setcc operations always fold.
1772 case ISD::SETFALSE2: return getConstant(0, VT);
1774 case ISD::SETTRUE2: {
1775 const TargetLowering *TLI = TM.getTargetLowering();
1776 TargetLowering::BooleanContent Cnt = TLI->getBooleanContents(VT.isVector());
1778 Cnt == TargetLowering::ZeroOrNegativeOneBooleanContent ? -1ULL : 1, VT);
1791 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1795 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1796 const APInt &C2 = N2C->getAPIntValue();
1797 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1798 const APInt &C1 = N1C->getAPIntValue();
1801 default: llvm_unreachable("Unknown integer setcc!");
1802 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1803 case ISD::SETNE: return getConstant(C1 != C2, VT);
1804 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1805 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1806 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1807 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1808 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1809 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1810 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1811 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1815 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1816 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1817 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1820 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1821 return getUNDEF(VT);
1823 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1824 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1825 return getUNDEF(VT);
1827 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1828 R==APFloat::cmpLessThan, VT);
1829 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1830 return getUNDEF(VT);
1832 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1833 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1834 return getUNDEF(VT);
1836 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1837 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1838 return getUNDEF(VT);
1840 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1841 R==APFloat::cmpEqual, VT);
1842 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1843 return getUNDEF(VT);
1845 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1846 R==APFloat::cmpEqual, VT);
1847 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1848 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1849 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1850 R==APFloat::cmpEqual, VT);
1851 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1852 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1853 R==APFloat::cmpLessThan, VT);
1854 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1855 R==APFloat::cmpUnordered, VT);
1856 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1857 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1860 // Ensure that the constant occurs on the RHS.
1861 ISD::CondCode SwappedCond = ISD::getSetCCSwappedOperands(Cond);
1862 MVT CompVT = N1.getValueType().getSimpleVT();
1863 if (!TM.getTargetLowering()->isCondCodeLegal(SwappedCond, CompVT))
1866 return getSetCC(dl, VT, N2, N1, SwappedCond);
1870 // Could not fold it.
1874 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1875 /// use this predicate to simplify operations downstream.
1876 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1877 // This predicate is not safe for vector operations.
1878 if (Op.getValueType().isVector())
1881 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1882 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1885 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1886 /// this predicate to simplify operations downstream. Mask is known to be zero
1887 /// for bits that V cannot have.
1888 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1889 unsigned Depth) const {
1890 APInt KnownZero, KnownOne;
1891 computeKnownBits(Op, KnownZero, KnownOne, Depth);
1892 return (KnownZero & Mask) == Mask;
1895 /// Determine which bits of Op are known to be either zero or one and return
1896 /// them in the KnownZero/KnownOne bitsets.
1897 void SelectionDAG::computeKnownBits(SDValue Op, APInt &KnownZero,
1898 APInt &KnownOne, unsigned Depth) const {
1899 const TargetLowering *TLI = TM.getTargetLowering();
1900 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1902 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1904 return; // Limit search depth.
1906 APInt KnownZero2, KnownOne2;
1908 switch (Op.getOpcode()) {
1910 // We know all of the bits for a constant!
1911 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue();
1912 KnownZero = ~KnownOne;
1915 // If either the LHS or the RHS are Zero, the result is zero.
1916 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1917 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1919 // Output known-1 bits are only known if set in both the LHS & RHS.
1920 KnownOne &= KnownOne2;
1921 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1922 KnownZero |= KnownZero2;
1925 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1926 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1928 // Output known-0 bits are only known if clear in both the LHS & RHS.
1929 KnownZero &= KnownZero2;
1930 // Output known-1 are known to be set if set in either the LHS | RHS.
1931 KnownOne |= KnownOne2;
1934 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1935 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1937 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1938 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1939 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1940 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1941 KnownZero = KnownZeroOut;
1945 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1946 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1948 // If low bits are zero in either operand, output low known-0 bits.
1949 // Also compute a conserative estimate for high known-0 bits.
1950 // More trickiness is possible, but this is sufficient for the
1951 // interesting case of alignment computation.
1952 KnownOne.clearAllBits();
1953 unsigned TrailZ = KnownZero.countTrailingOnes() +
1954 KnownZero2.countTrailingOnes();
1955 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1956 KnownZero2.countLeadingOnes(),
1957 BitWidth) - BitWidth;
1959 TrailZ = std::min(TrailZ, BitWidth);
1960 LeadZ = std::min(LeadZ, BitWidth);
1961 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1962 APInt::getHighBitsSet(BitWidth, LeadZ);
1966 // For the purposes of computing leading zeros we can conservatively
1967 // treat a udiv as a logical right shift by the power of 2 known to
1968 // be less than the denominator.
1969 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1970 unsigned LeadZ = KnownZero2.countLeadingOnes();
1972 KnownOne2.clearAllBits();
1973 KnownZero2.clearAllBits();
1974 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
1975 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1976 if (RHSUnknownLeadingOnes != BitWidth)
1977 LeadZ = std::min(BitWidth,
1978 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1980 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ);
1984 computeKnownBits(Op.getOperand(2), KnownZero, KnownOne, Depth+1);
1985 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
1987 // Only known if known in both the LHS and RHS.
1988 KnownOne &= KnownOne2;
1989 KnownZero &= KnownZero2;
1991 case ISD::SELECT_CC:
1992 computeKnownBits(Op.getOperand(3), KnownZero, KnownOne, Depth+1);
1993 computeKnownBits(Op.getOperand(2), KnownZero2, KnownOne2, Depth+1);
1995 // Only known if known in both the LHS and RHS.
1996 KnownOne &= KnownOne2;
1997 KnownZero &= KnownZero2;
2005 if (Op.getResNo() != 1)
2007 // The boolean result conforms to getBooleanContents. Fall through.
2009 // If we know the result of a setcc has the top bits zero, use this info.
2010 if (TLI->getBooleanContents(Op.getValueType().isVector()) ==
2011 TargetLowering::ZeroOrOneBooleanContent && BitWidth > 1)
2012 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
2015 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
2016 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2017 unsigned ShAmt = SA->getZExtValue();
2019 // If the shift count is an invalid immediate, don't do anything.
2020 if (ShAmt >= BitWidth)
2023 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2024 KnownZero <<= ShAmt;
2026 // low bits known zero.
2027 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
2031 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
2032 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2033 unsigned ShAmt = SA->getZExtValue();
2035 // If the shift count is an invalid immediate, don't do anything.
2036 if (ShAmt >= BitWidth)
2039 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2040 KnownZero = KnownZero.lshr(ShAmt);
2041 KnownOne = KnownOne.lshr(ShAmt);
2043 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
2044 KnownZero |= HighBits; // High bits known zero.
2048 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2049 unsigned ShAmt = SA->getZExtValue();
2051 // If the shift count is an invalid immediate, don't do anything.
2052 if (ShAmt >= BitWidth)
2055 // If any of the demanded bits are produced by the sign extension, we also
2056 // demand the input sign bit.
2057 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
2059 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2060 KnownZero = KnownZero.lshr(ShAmt);
2061 KnownOne = KnownOne.lshr(ShAmt);
2063 // Handle the sign bits.
2064 APInt SignBit = APInt::getSignBit(BitWidth);
2065 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
2067 if (KnownZero.intersects(SignBit)) {
2068 KnownZero |= HighBits; // New bits are known zero.
2069 } else if (KnownOne.intersects(SignBit)) {
2070 KnownOne |= HighBits; // New bits are known one.
2074 case ISD::SIGN_EXTEND_INREG: {
2075 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
2076 unsigned EBits = EVT.getScalarType().getSizeInBits();
2078 // Sign extension. Compute the demanded bits in the result that are not
2079 // present in the input.
2080 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits);
2082 APInt InSignBit = APInt::getSignBit(EBits);
2083 APInt InputDemandedBits = APInt::getLowBitsSet(BitWidth, EBits);
2085 // If the sign extended bits are demanded, we know that the sign
2087 InSignBit = InSignBit.zext(BitWidth);
2088 if (NewBits.getBoolValue())
2089 InputDemandedBits |= InSignBit;
2091 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2092 KnownOne &= InputDemandedBits;
2093 KnownZero &= InputDemandedBits;
2095 // If the sign bit of the input is known set or clear, then we know the
2096 // top bits of the result.
2097 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
2098 KnownZero |= NewBits;
2099 KnownOne &= ~NewBits;
2100 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
2101 KnownOne |= NewBits;
2102 KnownZero &= ~NewBits;
2103 } else { // Input sign bit unknown
2104 KnownZero &= ~NewBits;
2105 KnownOne &= ~NewBits;
2110 case ISD::CTTZ_ZERO_UNDEF:
2112 case ISD::CTLZ_ZERO_UNDEF:
2114 unsigned LowBits = Log2_32(BitWidth)+1;
2115 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
2116 KnownOne.clearAllBits();
2120 LoadSDNode *LD = cast<LoadSDNode>(Op);
2121 // If this is a ZEXTLoad and we are looking at the loaded value.
2122 if (ISD::isZEXTLoad(Op.getNode()) && Op.getResNo() == 0) {
2123 EVT VT = LD->getMemoryVT();
2124 unsigned MemBits = VT.getScalarType().getSizeInBits();
2125 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits);
2126 } else if (const MDNode *Ranges = LD->getRanges()) {
2127 computeKnownBitsFromRangeMetadata(*Ranges, KnownZero);
2131 case ISD::ZERO_EXTEND: {
2132 EVT InVT = Op.getOperand(0).getValueType();
2133 unsigned InBits = InVT.getScalarType().getSizeInBits();
2134 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
2135 KnownZero = KnownZero.trunc(InBits);
2136 KnownOne = KnownOne.trunc(InBits);
2137 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2138 KnownZero = KnownZero.zext(BitWidth);
2139 KnownOne = KnownOne.zext(BitWidth);
2140 KnownZero |= NewBits;
2143 case ISD::SIGN_EXTEND: {
2144 EVT InVT = Op.getOperand(0).getValueType();
2145 unsigned InBits = InVT.getScalarType().getSizeInBits();
2146 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
2148 KnownZero = KnownZero.trunc(InBits);
2149 KnownOne = KnownOne.trunc(InBits);
2150 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2152 // Note if the sign bit is known to be zero or one.
2153 bool SignBitKnownZero = KnownZero.isNegative();
2154 bool SignBitKnownOne = KnownOne.isNegative();
2156 KnownZero = KnownZero.zext(BitWidth);
2157 KnownOne = KnownOne.zext(BitWidth);
2159 // If the sign bit is known zero or one, the top bits match.
2160 if (SignBitKnownZero)
2161 KnownZero |= NewBits;
2162 else if (SignBitKnownOne)
2163 KnownOne |= NewBits;
2166 case ISD::ANY_EXTEND: {
2167 EVT InVT = Op.getOperand(0).getValueType();
2168 unsigned InBits = InVT.getScalarType().getSizeInBits();
2169 KnownZero = KnownZero.trunc(InBits);
2170 KnownOne = KnownOne.trunc(InBits);
2171 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2172 KnownZero = KnownZero.zext(BitWidth);
2173 KnownOne = KnownOne.zext(BitWidth);
2176 case ISD::TRUNCATE: {
2177 EVT InVT = Op.getOperand(0).getValueType();
2178 unsigned InBits = InVT.getScalarType().getSizeInBits();
2179 KnownZero = KnownZero.zext(InBits);
2180 KnownOne = KnownOne.zext(InBits);
2181 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2182 KnownZero = KnownZero.trunc(BitWidth);
2183 KnownOne = KnownOne.trunc(BitWidth);
2186 case ISD::AssertZext: {
2187 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
2188 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
2189 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2190 KnownZero |= (~InMask);
2191 KnownOne &= (~KnownZero);
2195 // All bits are zero except the low bit.
2196 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
2200 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
2201 // We know that the top bits of C-X are clear if X contains less bits
2202 // than C (i.e. no wrap-around can happen). For example, 20-X is
2203 // positive if we can prove that X is >= 0 and < 16.
2204 if (CLHS->getAPIntValue().isNonNegative()) {
2205 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
2206 // NLZ can't be BitWidth with no sign bit
2207 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
2208 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2210 // If all of the MaskV bits are known to be zero, then we know the
2211 // output top bits are zero, because we now know that the output is
2213 if ((KnownZero2 & MaskV) == MaskV) {
2214 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
2215 // Top bits known zero.
2216 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2);
2224 // Output known-0 bits are known if clear or set in both the low clear bits
2225 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
2226 // low 3 bits clear.
2227 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2228 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
2230 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2231 KnownZeroOut = std::min(KnownZeroOut,
2232 KnownZero2.countTrailingOnes());
2234 if (Op.getOpcode() == ISD::ADD) {
2235 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
2239 // With ADDE, a carry bit may be added in, so we can only use this
2240 // information if we know (at least) that the low two bits are clear. We
2241 // then return to the caller that the low bit is unknown but that other bits
2243 if (KnownZeroOut >= 2) // ADDE
2244 KnownZero |= APInt::getBitsSet(BitWidth, 1, KnownZeroOut);
2248 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2249 const APInt &RA = Rem->getAPIntValue().abs();
2250 if (RA.isPowerOf2()) {
2251 APInt LowBits = RA - 1;
2252 computeKnownBits(Op.getOperand(0), KnownZero2,KnownOne2,Depth+1);
2254 // The low bits of the first operand are unchanged by the srem.
2255 KnownZero = KnownZero2 & LowBits;
2256 KnownOne = KnownOne2 & LowBits;
2258 // If the first operand is non-negative or has all low bits zero, then
2259 // the upper bits are all zero.
2260 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
2261 KnownZero |= ~LowBits;
2263 // If the first operand is negative and not all low bits are zero, then
2264 // the upper bits are all one.
2265 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0))
2266 KnownOne |= ~LowBits;
2267 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2272 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2273 const APInt &RA = Rem->getAPIntValue();
2274 if (RA.isPowerOf2()) {
2275 APInt LowBits = (RA - 1);
2276 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth + 1);
2278 // The upper bits are all zero, the lower ones are unchanged.
2279 KnownZero = KnownZero2 | ~LowBits;
2280 KnownOne = KnownOne2 & LowBits;
2285 // Since the result is less than or equal to either operand, any leading
2286 // zero bits in either operand must also exist in the result.
2287 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2288 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2290 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
2291 KnownZero2.countLeadingOnes());
2292 KnownOne.clearAllBits();
2293 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders);
2296 case ISD::FrameIndex:
2297 case ISD::TargetFrameIndex:
2298 if (unsigned Align = InferPtrAlignment(Op)) {
2299 // The low bits are known zero if the pointer is aligned.
2300 KnownZero = APInt::getLowBitsSet(BitWidth, Log2_32(Align));
2306 if (Op.getOpcode() < ISD::BUILTIN_OP_END)
2309 case ISD::INTRINSIC_WO_CHAIN:
2310 case ISD::INTRINSIC_W_CHAIN:
2311 case ISD::INTRINSIC_VOID:
2312 // Allow the target to implement this method for its nodes.
2313 TLI->computeKnownBitsForTargetNode(Op, KnownZero, KnownOne, *this, Depth);
2317 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
2320 /// ComputeNumSignBits - Return the number of times the sign bit of the
2321 /// register is replicated into the other bits. We know that at least 1 bit
2322 /// is always equal to the sign bit (itself), but other cases can give us
2323 /// information. For example, immediately after an "SRA X, 2", we know that
2324 /// the top 3 bits are all equal to each other, so we return 3.
2325 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
2326 const TargetLowering *TLI = TM.getTargetLowering();
2327 EVT VT = Op.getValueType();
2328 assert(VT.isInteger() && "Invalid VT!");
2329 unsigned VTBits = VT.getScalarType().getSizeInBits();
2331 unsigned FirstAnswer = 1;
2334 return 1; // Limit search depth.
2336 switch (Op.getOpcode()) {
2338 case ISD::AssertSext:
2339 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2340 return VTBits-Tmp+1;
2341 case ISD::AssertZext:
2342 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2345 case ISD::Constant: {
2346 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2347 return Val.getNumSignBits();
2350 case ISD::SIGN_EXTEND:
2352 VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
2353 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2355 case ISD::SIGN_EXTEND_INREG:
2356 // Max of the input and what this extends.
2358 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits();
2361 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2362 return std::max(Tmp, Tmp2);
2365 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2366 // SRA X, C -> adds C sign bits.
2367 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2368 Tmp += C->getZExtValue();
2369 if (Tmp > VTBits) Tmp = VTBits;
2373 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2374 // shl destroys sign bits.
2375 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2376 if (C->getZExtValue() >= VTBits || // Bad shift.
2377 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
2378 return Tmp - C->getZExtValue();
2383 case ISD::XOR: // NOT is handled here.
2384 // Logical binary ops preserve the number of sign bits at the worst.
2385 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2387 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2388 FirstAnswer = std::min(Tmp, Tmp2);
2389 // We computed what we know about the sign bits as our first
2390 // answer. Now proceed to the generic code that uses
2391 // computeKnownBits, and pick whichever answer is better.
2396 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2397 if (Tmp == 1) return 1; // Early out.
2398 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2399 return std::min(Tmp, Tmp2);
2407 if (Op.getResNo() != 1)
2409 // The boolean result conforms to getBooleanContents. Fall through.
2411 // If setcc returns 0/-1, all bits are sign bits.
2412 if (TLI->getBooleanContents(Op.getValueType().isVector()) ==
2413 TargetLowering::ZeroOrNegativeOneBooleanContent)
2418 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2419 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2421 // Handle rotate right by N like a rotate left by 32-N.
2422 if (Op.getOpcode() == ISD::ROTR)
2423 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2425 // If we aren't rotating out all of the known-in sign bits, return the
2426 // number that are left. This handles rotl(sext(x), 1) for example.
2427 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2428 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2432 // Add can have at most one carry bit. Thus we know that the output
2433 // is, at worst, one more bit than the inputs.
2434 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2435 if (Tmp == 1) return 1; // Early out.
2437 // Special case decrementing a value (ADD X, -1):
2438 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2439 if (CRHS->isAllOnesValue()) {
2440 APInt KnownZero, KnownOne;
2441 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2443 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2445 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue())
2448 // If we are subtracting one from a positive number, there is no carry
2449 // out of the result.
2450 if (KnownZero.isNegative())
2454 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2455 if (Tmp2 == 1) return 1;
2456 return std::min(Tmp, Tmp2)-1;
2459 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2460 if (Tmp2 == 1) return 1;
2463 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2464 if (CLHS->isNullValue()) {
2465 APInt KnownZero, KnownOne;
2466 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
2467 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2469 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue())
2472 // If the input is known to be positive (the sign bit is known clear),
2473 // the output of the NEG has the same number of sign bits as the input.
2474 if (KnownZero.isNegative())
2477 // Otherwise, we treat this like a SUB.
2480 // Sub can have at most one carry bit. Thus we know that the output
2481 // is, at worst, one more bit than the inputs.
2482 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2483 if (Tmp == 1) return 1; // Early out.
2484 return std::min(Tmp, Tmp2)-1;
2486 // FIXME: it's tricky to do anything useful for this, but it is an important
2487 // case for targets like X86.
2491 // If we are looking at the loaded value of the SDNode.
2492 if (Op.getResNo() == 0) {
2493 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2494 if (LoadSDNode *LD = dyn_cast<LoadSDNode>(Op)) {
2495 unsigned ExtType = LD->getExtensionType();
2498 case ISD::SEXTLOAD: // '17' bits known
2499 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2500 return VTBits-Tmp+1;
2501 case ISD::ZEXTLOAD: // '16' bits known
2502 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2508 // Allow the target to implement this method for its nodes.
2509 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2510 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2511 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2512 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2513 unsigned NumBits = TLI->ComputeNumSignBitsForTargetNode(Op, *this, Depth);
2514 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2517 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2518 // use this information.
2519 APInt KnownZero, KnownOne;
2520 computeKnownBits(Op, KnownZero, KnownOne, Depth);
2523 if (KnownZero.isNegative()) { // sign bit is 0
2525 } else if (KnownOne.isNegative()) { // sign bit is 1;
2532 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2533 // the number of identical bits in the top of the input value.
2535 Mask <<= Mask.getBitWidth()-VTBits;
2536 // Return # leading zeros. We use 'min' here in case Val was zero before
2537 // shifting. We don't want to return '64' as for an i32 "0".
2538 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2541 /// isBaseWithConstantOffset - Return true if the specified operand is an
2542 /// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an
2543 /// ISD::OR with a ConstantSDNode that is guaranteed to have the same
2544 /// semantics as an ADD. This handles the equivalence:
2545 /// X|Cst == X+Cst iff X&Cst = 0.
2546 bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const {
2547 if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) ||
2548 !isa<ConstantSDNode>(Op.getOperand(1)))
2551 if (Op.getOpcode() == ISD::OR &&
2552 !MaskedValueIsZero(Op.getOperand(0),
2553 cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue()))
2560 bool SelectionDAG::isKnownNeverNaN(SDValue Op) const {
2561 // If we're told that NaNs won't happen, assume they won't.
2562 if (getTarget().Options.NoNaNsFPMath)
2565 // If the value is a constant, we can obviously see if it is a NaN or not.
2566 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2567 return !C->getValueAPF().isNaN();
2569 // TODO: Recognize more cases here.
2574 bool SelectionDAG::isKnownNeverZero(SDValue Op) const {
2575 // If the value is a constant, we can obviously see if it is a zero or not.
2576 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2577 return !C->isZero();
2579 // TODO: Recognize more cases here.
2580 switch (Op.getOpcode()) {
2583 if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2584 return !C->isNullValue();
2591 bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const {
2592 // Check the obvious case.
2593 if (A == B) return true;
2595 // For for negative and positive zero.
2596 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A))
2597 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B))
2598 if (CA->isZero() && CB->isZero()) return true;
2600 // Otherwise they may not be equal.
2604 /// getNode - Gets or creates the specified node.
2606 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT) {
2607 FoldingSetNodeID ID;
2608 AddNodeIDNode(ID, Opcode, getVTList(VT), None);
2610 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2611 return SDValue(E, 0);
2613 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(),
2614 DL.getDebugLoc(), getVTList(VT));
2615 CSEMap.InsertNode(N, IP);
2617 AllNodes.push_back(N);
2621 return SDValue(N, 0);
2624 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL,
2625 EVT VT, SDValue Operand) {
2626 // Constant fold unary operations with an integer constant operand. Even
2627 // opaque constant will be folded, because the folding of unary operations
2628 // doesn't create new constants with different values. Nevertheless, the
2629 // opaque flag is preserved during folding to prevent future folding with
2631 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2632 const APInt &Val = C->getAPIntValue();
2635 case ISD::SIGN_EXTEND:
2636 return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), VT,
2637 C->isTargetOpcode(), C->isOpaque());
2638 case ISD::ANY_EXTEND:
2639 case ISD::ZERO_EXTEND:
2641 return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), VT,
2642 C->isTargetOpcode(), C->isOpaque());
2643 case ISD::UINT_TO_FP:
2644 case ISD::SINT_TO_FP: {
2645 APFloat apf(EVTToAPFloatSemantics(VT),
2646 APInt::getNullValue(VT.getSizeInBits()));
2647 (void)apf.convertFromAPInt(Val,
2648 Opcode==ISD::SINT_TO_FP,
2649 APFloat::rmNearestTiesToEven);
2650 return getConstantFP(apf, VT);
2653 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2654 return getConstantFP(APFloat(APFloat::IEEEsingle, Val), VT);
2655 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2656 return getConstantFP(APFloat(APFloat::IEEEdouble, Val), VT);
2659 return getConstant(Val.byteSwap(), VT, C->isTargetOpcode(),
2662 return getConstant(Val.countPopulation(), VT, C->isTargetOpcode(),
2665 case ISD::CTLZ_ZERO_UNDEF:
2666 return getConstant(Val.countLeadingZeros(), VT, C->isTargetOpcode(),
2669 case ISD::CTTZ_ZERO_UNDEF:
2670 return getConstant(Val.countTrailingZeros(), VT, C->isTargetOpcode(),
2675 // Constant fold unary operations with a floating point constant operand.
2676 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2677 APFloat V = C->getValueAPF(); // make copy
2681 return getConstantFP(V, VT);
2684 return getConstantFP(V, VT);
2686 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardPositive);
2687 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2688 return getConstantFP(V, VT);
2692 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardZero);
2693 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2694 return getConstantFP(V, VT);
2698 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardNegative);
2699 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2700 return getConstantFP(V, VT);
2703 case ISD::FP_EXTEND: {
2705 // This can return overflow, underflow, or inexact; we don't care.
2706 // FIXME need to be more flexible about rounding mode.
2707 (void)V.convert(EVTToAPFloatSemantics(VT),
2708 APFloat::rmNearestTiesToEven, &ignored);
2709 return getConstantFP(V, VT);
2711 case ISD::FP_TO_SINT:
2712 case ISD::FP_TO_UINT: {
2715 assert(integerPartWidth >= 64);
2716 // FIXME need to be more flexible about rounding mode.
2717 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2718 Opcode==ISD::FP_TO_SINT,
2719 APFloat::rmTowardZero, &ignored);
2720 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2722 APInt api(VT.getSizeInBits(), x);
2723 return getConstant(api, VT);
2726 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2727 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2728 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2729 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2734 unsigned OpOpcode = Operand.getNode()->getOpcode();
2736 case ISD::TokenFactor:
2737 case ISD::MERGE_VALUES:
2738 case ISD::CONCAT_VECTORS:
2739 return Operand; // Factor, merge or concat of one node? No need.
2740 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
2741 case ISD::FP_EXTEND:
2742 assert(VT.isFloatingPoint() &&
2743 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2744 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2745 assert((!VT.isVector() ||
2746 VT.getVectorNumElements() ==
2747 Operand.getValueType().getVectorNumElements()) &&
2748 "Vector element count mismatch!");
2749 if (Operand.getOpcode() == ISD::UNDEF)
2750 return getUNDEF(VT);
2752 case ISD::SIGN_EXTEND:
2753 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2754 "Invalid SIGN_EXTEND!");
2755 if (Operand.getValueType() == VT) return Operand; // noop extension
2756 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2757 "Invalid sext node, dst < src!");
2758 assert((!VT.isVector() ||
2759 VT.getVectorNumElements() ==
2760 Operand.getValueType().getVectorNumElements()) &&
2761 "Vector element count mismatch!");
2762 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2763 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2764 else if (OpOpcode == ISD::UNDEF)
2765 // sext(undef) = 0, because the top bits will all be the same.
2766 return getConstant(0, VT);
2768 case ISD::ZERO_EXTEND:
2769 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2770 "Invalid ZERO_EXTEND!");
2771 if (Operand.getValueType() == VT) return Operand; // noop extension
2772 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2773 "Invalid zext node, dst < src!");
2774 assert((!VT.isVector() ||
2775 VT.getVectorNumElements() ==
2776 Operand.getValueType().getVectorNumElements()) &&
2777 "Vector element count mismatch!");
2778 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2779 return getNode(ISD::ZERO_EXTEND, DL, VT,
2780 Operand.getNode()->getOperand(0));
2781 else if (OpOpcode == ISD::UNDEF)
2782 // zext(undef) = 0, because the top bits will be zero.
2783 return getConstant(0, VT);
2785 case ISD::ANY_EXTEND:
2786 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2787 "Invalid ANY_EXTEND!");
2788 if (Operand.getValueType() == VT) return Operand; // noop extension
2789 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2790 "Invalid anyext node, dst < src!");
2791 assert((!VT.isVector() ||
2792 VT.getVectorNumElements() ==
2793 Operand.getValueType().getVectorNumElements()) &&
2794 "Vector element count mismatch!");
2796 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2797 OpOpcode == ISD::ANY_EXTEND)
2798 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2799 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2800 else if (OpOpcode == ISD::UNDEF)
2801 return getUNDEF(VT);
2803 // (ext (trunx x)) -> x
2804 if (OpOpcode == ISD::TRUNCATE) {
2805 SDValue OpOp = Operand.getNode()->getOperand(0);
2806 if (OpOp.getValueType() == VT)
2811 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2812 "Invalid TRUNCATE!");
2813 if (Operand.getValueType() == VT) return Operand; // noop truncate
2814 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) &&
2815 "Invalid truncate node, src < dst!");
2816 assert((!VT.isVector() ||
2817 VT.getVectorNumElements() ==
2818 Operand.getValueType().getVectorNumElements()) &&
2819 "Vector element count mismatch!");
2820 if (OpOpcode == ISD::TRUNCATE)
2821 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2822 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2823 OpOpcode == ISD::ANY_EXTEND) {
2824 // If the source is smaller than the dest, we still need an extend.
2825 if (Operand.getNode()->getOperand(0).getValueType().getScalarType()
2826 .bitsLT(VT.getScalarType()))
2827 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2828 if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2829 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2830 return Operand.getNode()->getOperand(0);
2832 if (OpOpcode == ISD::UNDEF)
2833 return getUNDEF(VT);
2836 // Basic sanity checking.
2837 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2838 && "Cannot BITCAST between types of different sizes!");
2839 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2840 if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x)
2841 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0));
2842 if (OpOpcode == ISD::UNDEF)
2843 return getUNDEF(VT);
2845 case ISD::SCALAR_TO_VECTOR:
2846 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2847 (VT.getVectorElementType() == Operand.getValueType() ||
2848 (VT.getVectorElementType().isInteger() &&
2849 Operand.getValueType().isInteger() &&
2850 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
2851 "Illegal SCALAR_TO_VECTOR node!");
2852 if (OpOpcode == ISD::UNDEF)
2853 return getUNDEF(VT);
2854 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2855 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2856 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2857 Operand.getConstantOperandVal(1) == 0 &&
2858 Operand.getOperand(0).getValueType() == VT)
2859 return Operand.getOperand(0);
2862 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
2863 if (getTarget().Options.UnsafeFPMath && OpOpcode == ISD::FSUB)
2864 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
2865 Operand.getNode()->getOperand(0));
2866 if (OpOpcode == ISD::FNEG) // --X -> X
2867 return Operand.getNode()->getOperand(0);
2870 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2871 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
2876 SDVTList VTs = getVTList(VT);
2877 if (VT != MVT::Glue) { // Don't CSE flag producing nodes
2878 FoldingSetNodeID ID;
2879 SDValue Ops[1] = { Operand };
2880 AddNodeIDNode(ID, Opcode, VTs, Ops);
2882 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2883 return SDValue(E, 0);
2885 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(),
2886 DL.getDebugLoc(), VTs, Operand);
2887 CSEMap.InsertNode(N, IP);
2889 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(),
2890 DL.getDebugLoc(), VTs, Operand);
2893 AllNodes.push_back(N);
2897 return SDValue(N, 0);
2900 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, EVT VT,
2901 SDNode *Cst1, SDNode *Cst2) {
2902 // If the opcode is a target-specific ISD node, there's nothing we can
2903 // do here and the operand rules may not line up with the below, so
2905 if (Opcode >= ISD::BUILTIN_OP_END)
2908 SmallVector<std::pair<ConstantSDNode *, ConstantSDNode *>, 4> Inputs;
2909 SmallVector<SDValue, 4> Outputs;
2910 EVT SVT = VT.getScalarType();
2912 ConstantSDNode *Scalar1 = dyn_cast<ConstantSDNode>(Cst1);
2913 ConstantSDNode *Scalar2 = dyn_cast<ConstantSDNode>(Cst2);
2914 if (Scalar1 && Scalar2 && (Scalar1->isOpaque() || Scalar2->isOpaque()))
2917 if (Scalar1 && Scalar2)
2918 // Scalar instruction.
2919 Inputs.push_back(std::make_pair(Scalar1, Scalar2));
2921 // For vectors extract each constant element into Inputs so we can constant
2922 // fold them individually.
2923 BuildVectorSDNode *BV1 = dyn_cast<BuildVectorSDNode>(Cst1);
2924 BuildVectorSDNode *BV2 = dyn_cast<BuildVectorSDNode>(Cst2);
2928 assert(BV1->getNumOperands() == BV2->getNumOperands() && "Out of sync!");
2930 for (unsigned I = 0, E = BV1->getNumOperands(); I != E; ++I) {
2931 ConstantSDNode *V1 = dyn_cast<ConstantSDNode>(BV1->getOperand(I));
2932 ConstantSDNode *V2 = dyn_cast<ConstantSDNode>(BV2->getOperand(I));
2933 if (!V1 || !V2) // Not a constant, bail.
2936 if (V1->isOpaque() || V2->isOpaque())
2939 // Avoid BUILD_VECTOR nodes that perform implicit truncation.
2940 // FIXME: This is valid and could be handled by truncating the APInts.
2941 if (V1->getValueType(0) != SVT || V2->getValueType(0) != SVT)
2944 Inputs.push_back(std::make_pair(V1, V2));
2948 // We have a number of constant values, constant fold them element by element.
2949 for (unsigned I = 0, E = Inputs.size(); I != E; ++I) {
2950 const APInt &C1 = Inputs[I].first->getAPIntValue();
2951 const APInt &C2 = Inputs[I].second->getAPIntValue();
2955 Outputs.push_back(getConstant(C1 + C2, SVT));
2958 Outputs.push_back(getConstant(C1 - C2, SVT));
2961 Outputs.push_back(getConstant(C1 * C2, SVT));
2964 if (!C2.getBoolValue())
2966 Outputs.push_back(getConstant(C1.udiv(C2), SVT));
2969 if (!C2.getBoolValue())
2971 Outputs.push_back(getConstant(C1.urem(C2), SVT));
2974 if (!C2.getBoolValue())
2976 Outputs.push_back(getConstant(C1.sdiv(C2), SVT));
2979 if (!C2.getBoolValue())
2981 Outputs.push_back(getConstant(C1.srem(C2), SVT));
2984 Outputs.push_back(getConstant(C1 & C2, SVT));
2987 Outputs.push_back(getConstant(C1 | C2, SVT));
2990 Outputs.push_back(getConstant(C1 ^ C2, SVT));
2993 Outputs.push_back(getConstant(C1 << C2, SVT));
2996 Outputs.push_back(getConstant(C1.lshr(C2), SVT));
2999 Outputs.push_back(getConstant(C1.ashr(C2), SVT));
3002 Outputs.push_back(getConstant(C1.rotl(C2), SVT));
3005 Outputs.push_back(getConstant(C1.rotr(C2), SVT));
3012 assert((Scalar1 && Scalar2) || (VT.getVectorNumElements() == Outputs.size() &&
3013 "Expected a scalar or vector!"));
3015 // Handle the scalar case first.
3017 return Outputs.back();
3019 // We may have a vector type but a scalar result. Create a splat.
3020 Outputs.resize(VT.getVectorNumElements(), Outputs.back());
3022 // Build a big vector out of the scalar elements we generated.
3023 return getNode(ISD::BUILD_VECTOR, SDLoc(), VT, Outputs);
3026 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT, SDValue N1,
3027 SDValue N2, bool nuw, bool nsw, bool exact) {
3028 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
3029 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
3032 case ISD::TokenFactor:
3033 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
3034 N2.getValueType() == MVT::Other && "Invalid token factor!");
3035 // Fold trivial token factors.
3036 if (N1.getOpcode() == ISD::EntryToken) return N2;
3037 if (N2.getOpcode() == ISD::EntryToken) return N1;
3038 if (N1 == N2) return N1;
3040 case ISD::CONCAT_VECTORS:
3041 // Concat of UNDEFs is UNDEF.
3042 if (N1.getOpcode() == ISD::UNDEF &&
3043 N2.getOpcode() == ISD::UNDEF)
3044 return getUNDEF(VT);
3046 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
3047 // one big BUILD_VECTOR.
3048 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
3049 N2.getOpcode() == ISD::BUILD_VECTOR) {
3050 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
3051 N1.getNode()->op_end());
3052 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
3053 return getNode(ISD::BUILD_VECTOR, DL, VT, Elts);
3057 assert(VT.isInteger() && "This operator does not apply to FP types!");
3058 assert(N1.getValueType() == N2.getValueType() &&
3059 N1.getValueType() == VT && "Binary operator types must match!");
3060 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
3061 // worth handling here.
3062 if (N2C && N2C->isNullValue())
3064 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
3071 assert(VT.isInteger() && "This operator does not apply to FP types!");
3072 assert(N1.getValueType() == N2.getValueType() &&
3073 N1.getValueType() == VT && "Binary operator types must match!");
3074 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
3075 // it's worth handling here.
3076 if (N2C && N2C->isNullValue())
3086 assert(VT.isInteger() && "This operator does not apply to FP types!");
3087 assert(N1.getValueType() == N2.getValueType() &&
3088 N1.getValueType() == VT && "Binary operator types must match!");
3095 if (getTarget().Options.UnsafeFPMath) {
3096 if (Opcode == ISD::FADD) {
3098 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
3099 if (CFP->getValueAPF().isZero())
3102 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
3103 if (CFP->getValueAPF().isZero())
3105 } else if (Opcode == ISD::FSUB) {
3107 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
3108 if (CFP->getValueAPF().isZero())
3110 } else if (Opcode == ISD::FMUL) {
3111 ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1);
3114 // If the first operand isn't the constant, try the second
3116 CFP = dyn_cast<ConstantFPSDNode>(N2);
3123 return SDValue(CFP,0);
3125 if (CFP->isExactlyValue(1.0))
3130 assert(VT.isFloatingPoint() && "This operator only applies to FP types!");
3131 assert(N1.getValueType() == N2.getValueType() &&
3132 N1.getValueType() == VT && "Binary operator types must match!");
3134 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
3135 assert(N1.getValueType() == VT &&
3136 N1.getValueType().isFloatingPoint() &&
3137 N2.getValueType().isFloatingPoint() &&
3138 "Invalid FCOPYSIGN!");
3145 assert(VT == N1.getValueType() &&
3146 "Shift operators return type must be the same as their first arg");
3147 assert(VT.isInteger() && N2.getValueType().isInteger() &&
3148 "Shifts only work on integers");
3149 assert((!VT.isVector() || VT == N2.getValueType()) &&
3150 "Vector shift amounts must be in the same as their first arg");
3151 // Verify that the shift amount VT is bit enough to hold valid shift
3152 // amounts. This catches things like trying to shift an i1024 value by an
3153 // i8, which is easy to fall into in generic code that uses
3154 // TLI.getShiftAmount().
3155 assert(N2.getValueType().getSizeInBits() >=
3156 Log2_32_Ceil(N1.getValueType().getSizeInBits()) &&
3157 "Invalid use of small shift amount with oversized value!");
3159 // Always fold shifts of i1 values so the code generator doesn't need to
3160 // handle them. Since we know the size of the shift has to be less than the
3161 // size of the value, the shift/rotate count is guaranteed to be zero.
3164 if (N2C && N2C->isNullValue())
3167 case ISD::FP_ROUND_INREG: {
3168 EVT EVT = cast<VTSDNode>(N2)->getVT();
3169 assert(VT == N1.getValueType() && "Not an inreg round!");
3170 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
3171 "Cannot FP_ROUND_INREG integer types");
3172 assert(EVT.isVector() == VT.isVector() &&
3173 "FP_ROUND_INREG type should be vector iff the operand "
3175 assert((!EVT.isVector() ||
3176 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
3177 "Vector element counts must match in FP_ROUND_INREG");
3178 assert(EVT.bitsLE(VT) && "Not rounding down!");
3180 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
3184 assert(VT.isFloatingPoint() &&
3185 N1.getValueType().isFloatingPoint() &&
3186 VT.bitsLE(N1.getValueType()) &&
3187 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
3188 if (N1.getValueType() == VT) return N1; // noop conversion.
3190 case ISD::AssertSext:
3191 case ISD::AssertZext: {
3192 EVT EVT = cast<VTSDNode>(N2)->getVT();
3193 assert(VT == N1.getValueType() && "Not an inreg extend!");
3194 assert(VT.isInteger() && EVT.isInteger() &&
3195 "Cannot *_EXTEND_INREG FP types");
3196 assert(!EVT.isVector() &&
3197 "AssertSExt/AssertZExt type should be the vector element type "
3198 "rather than the vector type!");
3199 assert(EVT.bitsLE(VT) && "Not extending!");
3200 if (VT == EVT) return N1; // noop assertion.
3203 case ISD::SIGN_EXTEND_INREG: {
3204 EVT EVT = cast<VTSDNode>(N2)->getVT();
3205 assert(VT == N1.getValueType() && "Not an inreg extend!");
3206 assert(VT.isInteger() && EVT.isInteger() &&
3207 "Cannot *_EXTEND_INREG FP types");
3208 assert(EVT.isVector() == VT.isVector() &&
3209 "SIGN_EXTEND_INREG type should be vector iff the operand "
3211 assert((!EVT.isVector() ||
3212 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
3213 "Vector element counts must match in SIGN_EXTEND_INREG");
3214 assert(EVT.bitsLE(VT) && "Not extending!");
3215 if (EVT == VT) return N1; // Not actually extending
3218 APInt Val = N1C->getAPIntValue();
3219 unsigned FromBits = EVT.getScalarType().getSizeInBits();
3220 Val <<= Val.getBitWidth()-FromBits;
3221 Val = Val.ashr(Val.getBitWidth()-FromBits);
3222 return getConstant(Val, VT);
3226 case ISD::EXTRACT_VECTOR_ELT:
3227 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
3228 if (N1.getOpcode() == ISD::UNDEF)
3229 return getUNDEF(VT);
3231 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
3232 // expanding copies of large vectors from registers.
3234 N1.getOpcode() == ISD::CONCAT_VECTORS &&
3235 N1.getNumOperands() > 0) {
3237 N1.getOperand(0).getValueType().getVectorNumElements();
3238 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
3239 N1.getOperand(N2C->getZExtValue() / Factor),
3240 getConstant(N2C->getZExtValue() % Factor,
3241 N2.getValueType()));
3244 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
3245 // expanding large vector constants.
3246 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
3247 SDValue Elt = N1.getOperand(N2C->getZExtValue());
3249 if (VT != Elt.getValueType())
3250 // If the vector element type is not legal, the BUILD_VECTOR operands
3251 // are promoted and implicitly truncated, and the result implicitly
3252 // extended. Make that explicit here.
3253 Elt = getAnyExtOrTrunc(Elt, DL, VT);
3258 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
3259 // operations are lowered to scalars.
3260 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
3261 // If the indices are the same, return the inserted element else
3262 // if the indices are known different, extract the element from
3263 // the original vector.
3264 SDValue N1Op2 = N1.getOperand(2);
3265 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode());
3267 if (N1Op2C && N2C) {
3268 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) {
3269 if (VT == N1.getOperand(1).getValueType())
3270 return N1.getOperand(1);
3272 return getSExtOrTrunc(N1.getOperand(1), DL, VT);
3275 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
3279 case ISD::EXTRACT_ELEMENT:
3280 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
3281 assert(!N1.getValueType().isVector() && !VT.isVector() &&
3282 (N1.getValueType().isInteger() == VT.isInteger()) &&
3283 N1.getValueType() != VT &&
3284 "Wrong types for EXTRACT_ELEMENT!");
3286 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
3287 // 64-bit integers into 32-bit parts. Instead of building the extract of
3288 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
3289 if (N1.getOpcode() == ISD::BUILD_PAIR)
3290 return N1.getOperand(N2C->getZExtValue());
3292 // EXTRACT_ELEMENT of a constant int is also very common.
3293 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
3294 unsigned ElementSize = VT.getSizeInBits();
3295 unsigned Shift = ElementSize * N2C->getZExtValue();
3296 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
3297 return getConstant(ShiftedVal.trunc(ElementSize), VT);
3300 case ISD::EXTRACT_SUBVECTOR: {
3302 if (VT.isSimple() && N1.getValueType().isSimple()) {
3303 assert(VT.isVector() && N1.getValueType().isVector() &&
3304 "Extract subvector VTs must be a vectors!");
3305 assert(VT.getVectorElementType() ==
3306 N1.getValueType().getVectorElementType() &&
3307 "Extract subvector VTs must have the same element type!");
3308 assert(VT.getSimpleVT() <= N1.getSimpleValueType() &&
3309 "Extract subvector must be from larger vector to smaller vector!");
3311 if (isa<ConstantSDNode>(Index.getNode())) {
3312 assert((VT.getVectorNumElements() +
3313 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
3314 <= N1.getValueType().getVectorNumElements())
3315 && "Extract subvector overflow!");
3318 // Trivial extraction.
3319 if (VT.getSimpleVT() == N1.getSimpleValueType())
3326 // Perform trivial constant folding.
3327 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1.getNode(), N2.getNode());
3328 if (SV.getNode()) return SV;
3330 // Canonicalize constant to RHS if commutative.
3331 if (N1C && !N2C && isCommutativeBinOp(Opcode)) {
3332 std::swap(N1C, N2C);
3336 // Constant fold FP operations.
3337 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
3338 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
3340 if (!N2CFP && isCommutativeBinOp(Opcode)) {
3341 // Canonicalize constant to RHS if commutative.
3342 std::swap(N1CFP, N2CFP);
3345 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
3346 APFloat::opStatus s;
3349 s = V1.add(V2, APFloat::rmNearestTiesToEven);
3350 if (s != APFloat::opInvalidOp)
3351 return getConstantFP(V1, VT);
3354 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
3355 if (s!=APFloat::opInvalidOp)
3356 return getConstantFP(V1, VT);
3359 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
3360 if (s!=APFloat::opInvalidOp)
3361 return getConstantFP(V1, VT);
3364 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
3365 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
3366 return getConstantFP(V1, VT);
3369 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
3370 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
3371 return getConstantFP(V1, VT);
3373 case ISD::FCOPYSIGN:
3375 return getConstantFP(V1, VT);
3380 if (Opcode == ISD::FP_ROUND) {
3381 APFloat V = N1CFP->getValueAPF(); // make copy
3383 // This can return overflow, underflow, or inexact; we don't care.
3384 // FIXME need to be more flexible about rounding mode.
3385 (void)V.convert(EVTToAPFloatSemantics(VT),
3386 APFloat::rmNearestTiesToEven, &ignored);
3387 return getConstantFP(V, VT);
3391 // Canonicalize an UNDEF to the RHS, even over a constant.
3392 if (N1.getOpcode() == ISD::UNDEF) {
3393 if (isCommutativeBinOp(Opcode)) {
3397 case ISD::FP_ROUND_INREG:
3398 case ISD::SIGN_EXTEND_INREG:
3404 return N1; // fold op(undef, arg2) -> undef
3412 return getConstant(0, VT); // fold op(undef, arg2) -> 0
3413 // For vectors, we can't easily build an all zero vector, just return
3420 // Fold a bunch of operators when the RHS is undef.
3421 if (N2.getOpcode() == ISD::UNDEF) {
3424 if (N1.getOpcode() == ISD::UNDEF)
3425 // Handle undef ^ undef -> 0 special case. This is a common
3427 return getConstant(0, VT);
3437 return N2; // fold op(arg1, undef) -> undef
3443 if (getTarget().Options.UnsafeFPMath)
3451 return getConstant(0, VT); // fold op(arg1, undef) -> 0
3452 // For vectors, we can't easily build an all zero vector, just return
3457 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
3458 // For vectors, we can't easily build an all one vector, just return
3466 // Memoize this node if possible.
3468 SDVTList VTs = getVTList(VT);
3469 const bool BinOpHasFlags = isBinOpWithFlags(Opcode);
3470 if (VT != MVT::Glue) {
3471 SDValue Ops[] = {N1, N2};
3472 FoldingSetNodeID ID;
3473 AddNodeIDNode(ID, Opcode, VTs, Ops);
3475 AddBinaryNodeIDCustom(ID, Opcode, nuw, nsw, exact);
3477 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3478 return SDValue(E, 0);
3480 N = GetBinarySDNode(Opcode, DL, VTs, N1, N2, nuw, nsw, exact);
3482 CSEMap.InsertNode(N, IP);
3485 N = GetBinarySDNode(Opcode, DL, VTs, N1, N2, nuw, nsw, exact);
3488 AllNodes.push_back(N);
3492 return SDValue(N, 0);
3495 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
3496 SDValue N1, SDValue N2, SDValue N3) {
3497 // Perform various simplifications.
3498 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
3501 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1);
3502 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2);
3503 ConstantFPSDNode *N3CFP = dyn_cast<ConstantFPSDNode>(N3);
3504 if (N1CFP && N2CFP && N3CFP) {
3505 APFloat V1 = N1CFP->getValueAPF();
3506 const APFloat &V2 = N2CFP->getValueAPF();
3507 const APFloat &V3 = N3CFP->getValueAPF();
3508 APFloat::opStatus s =
3509 V1.fusedMultiplyAdd(V2, V3, APFloat::rmNearestTiesToEven);
3510 if (s != APFloat::opInvalidOp)
3511 return getConstantFP(V1, VT);
3515 case ISD::CONCAT_VECTORS:
3516 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
3517 // one big BUILD_VECTOR.
3518 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
3519 N2.getOpcode() == ISD::BUILD_VECTOR &&
3520 N3.getOpcode() == ISD::BUILD_VECTOR) {
3521 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
3522 N1.getNode()->op_end());
3523 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
3524 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end());
3525 return getNode(ISD::BUILD_VECTOR, DL, VT, Elts);
3529 // Use FoldSetCC to simplify SETCC's.
3530 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
3531 if (Simp.getNode()) return Simp;
3536 if (N1C->getZExtValue())
3537 return N2; // select true, X, Y -> X
3538 return N3; // select false, X, Y -> Y
3541 if (N2 == N3) return N2; // select C, X, X -> X
3543 case ISD::VECTOR_SHUFFLE:
3544 llvm_unreachable("should use getVectorShuffle constructor!");
3545 case ISD::INSERT_SUBVECTOR: {
3547 if (VT.isSimple() && N1.getValueType().isSimple()
3548 && N2.getValueType().isSimple()) {
3549 assert(VT.isVector() && N1.getValueType().isVector() &&
3550 N2.getValueType().isVector() &&
3551 "Insert subvector VTs must be a vectors");
3552 assert(VT == N1.getValueType() &&
3553 "Dest and insert subvector source types must match!");
3554 assert(N2.getSimpleValueType() <= N1.getSimpleValueType() &&
3555 "Insert subvector must be from smaller vector to larger vector!");
3556 if (isa<ConstantSDNode>(Index.getNode())) {
3557 assert((N2.getValueType().getVectorNumElements() +
3558 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
3559 <= VT.getVectorNumElements())
3560 && "Insert subvector overflow!");
3563 // Trivial insertion.
3564 if (VT.getSimpleVT() == N2.getSimpleValueType())
3570 // Fold bit_convert nodes from a type to themselves.
3571 if (N1.getValueType() == VT)
3576 // Memoize node if it doesn't produce a flag.
3578 SDVTList VTs = getVTList(VT);
3579 if (VT != MVT::Glue) {
3580 SDValue Ops[] = { N1, N2, N3 };
3581 FoldingSetNodeID ID;
3582 AddNodeIDNode(ID, Opcode, VTs, Ops);
3584 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3585 return SDValue(E, 0);
3587 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(),
3588 DL.getDebugLoc(), VTs, N1, N2, N3);
3589 CSEMap.InsertNode(N, IP);
3591 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(),
3592 DL.getDebugLoc(), VTs, N1, N2, N3);
3595 AllNodes.push_back(N);
3599 return SDValue(N, 0);
3602 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
3603 SDValue N1, SDValue N2, SDValue N3,
3605 SDValue Ops[] = { N1, N2, N3, N4 };
3606 return getNode(Opcode, DL, VT, Ops);
3609 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
3610 SDValue N1, SDValue N2, SDValue N3,
3611 SDValue N4, SDValue N5) {
3612 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3613 return getNode(Opcode, DL, VT, Ops);
3616 /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
3617 /// the incoming stack arguments to be loaded from the stack.
3618 SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) {
3619 SmallVector<SDValue, 8> ArgChains;
3621 // Include the original chain at the beginning of the list. When this is
3622 // used by target LowerCall hooks, this helps legalize find the
3623 // CALLSEQ_BEGIN node.
3624 ArgChains.push_back(Chain);
3626 // Add a chain value for each stack argument.
3627 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
3628 UE = getEntryNode().getNode()->use_end(); U != UE; ++U)
3629 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
3630 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
3631 if (FI->getIndex() < 0)
3632 ArgChains.push_back(SDValue(L, 1));
3634 // Build a tokenfactor for all the chains.
3635 return getNode(ISD::TokenFactor, SDLoc(Chain), MVT::Other, ArgChains);
3638 /// getMemsetValue - Vectorized representation of the memset value
3640 static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
3642 assert(Value.getOpcode() != ISD::UNDEF);
3644 unsigned NumBits = VT.getScalarType().getSizeInBits();
3645 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
3646 assert(C->getAPIntValue().getBitWidth() == 8);
3647 APInt Val = APInt::getSplat(NumBits, C->getAPIntValue());
3649 return DAG.getConstant(Val, VT);
3650 return DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(VT), Val), VT);
3653 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value);
3655 // Use a multiplication with 0x010101... to extend the input to the
3657 APInt Magic = APInt::getSplat(NumBits, APInt(8, 0x01));
3658 Value = DAG.getNode(ISD::MUL, dl, VT, Value, DAG.getConstant(Magic, VT));
3664 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
3665 /// used when a memcpy is turned into a memset when the source is a constant
3667 static SDValue getMemsetStringVal(EVT VT, SDLoc dl, SelectionDAG &DAG,
3668 const TargetLowering &TLI, StringRef Str) {
3669 // Handle vector with all elements zero.
3672 return DAG.getConstant(0, VT);
3673 else if (VT == MVT::f32 || VT == MVT::f64 || VT == MVT::f128)
3674 return DAG.getConstantFP(0.0, VT);
3675 else if (VT.isVector()) {
3676 unsigned NumElts = VT.getVectorNumElements();
3677 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
3678 return DAG.getNode(ISD::BITCAST, dl, VT,
3679 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(),
3682 llvm_unreachable("Expected type!");
3685 assert(!VT.isVector() && "Can't handle vector type here!");
3686 unsigned NumVTBits = VT.getSizeInBits();
3687 unsigned NumVTBytes = NumVTBits / 8;
3688 unsigned NumBytes = std::min(NumVTBytes, unsigned(Str.size()));
3690 APInt Val(NumVTBits, 0);
3691 if (TLI.isLittleEndian()) {
3692 for (unsigned i = 0; i != NumBytes; ++i)
3693 Val |= (uint64_t)(unsigned char)Str[i] << i*8;
3695 for (unsigned i = 0; i != NumBytes; ++i)
3696 Val |= (uint64_t)(unsigned char)Str[i] << (NumVTBytes-i-1)*8;
3699 // If the "cost" of materializing the integer immediate is less than the cost
3700 // of a load, then it is cost effective to turn the load into the immediate.
3701 Type *Ty = VT.getTypeForEVT(*DAG.getContext());
3702 if (TLI.shouldConvertConstantLoadToIntImm(Val, Ty))
3703 return DAG.getConstant(Val, VT);
3704 return SDValue(nullptr, 0);
3707 /// getMemBasePlusOffset - Returns base and offset node for the
3709 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, SDLoc dl,
3710 SelectionDAG &DAG) {
3711 EVT VT = Base.getValueType();
3712 return DAG.getNode(ISD::ADD, dl,
3713 VT, Base, DAG.getConstant(Offset, VT));
3716 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
3718 static bool isMemSrcFromString(SDValue Src, StringRef &Str) {
3719 unsigned SrcDelta = 0;
3720 GlobalAddressSDNode *G = nullptr;
3721 if (Src.getOpcode() == ISD::GlobalAddress)
3722 G = cast<GlobalAddressSDNode>(Src);
3723 else if (Src.getOpcode() == ISD::ADD &&
3724 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
3725 Src.getOperand(1).getOpcode() == ISD::Constant) {
3726 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
3727 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
3732 return getConstantStringInfo(G->getGlobal(), Str, SrcDelta, false);
3735 /// FindOptimalMemOpLowering - Determines the optimial series memory ops
3736 /// to replace the memset / memcpy. Return true if the number of memory ops
3737 /// is below the threshold. It returns the types of the sequence of
3738 /// memory ops to perform memset / memcpy by reference.
3739 static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps,
3740 unsigned Limit, uint64_t Size,
3741 unsigned DstAlign, unsigned SrcAlign,
3747 const TargetLowering &TLI) {
3748 assert((SrcAlign == 0 || SrcAlign >= DstAlign) &&
3749 "Expecting memcpy / memset source to meet alignment requirement!");
3750 // If 'SrcAlign' is zero, that means the memory operation does not need to
3751 // load the value, i.e. memset or memcpy from constant string. Otherwise,
3752 // it's the inferred alignment of the source. 'DstAlign', on the other hand,
3753 // is the specified alignment of the memory operation. If it is zero, that
3754 // means it's possible to change the alignment of the destination.
3755 // 'MemcpyStrSrc' indicates whether the memcpy source is constant so it does
3756 // not need to be loaded.
3757 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign,
3758 IsMemset, ZeroMemset, MemcpyStrSrc,
3759 DAG.getMachineFunction());
3761 if (VT == MVT::Other) {
3763 if (DstAlign >= TLI.getDataLayout()->getPointerPrefAlignment(AS) ||
3764 TLI.allowsUnalignedMemoryAccesses(VT, AS)) {
3765 VT = TLI.getPointerTy();
3767 switch (DstAlign & 7) {
3768 case 0: VT = MVT::i64; break;
3769 case 4: VT = MVT::i32; break;
3770 case 2: VT = MVT::i16; break;
3771 default: VT = MVT::i8; break;
3776 while (!TLI.isTypeLegal(LVT))
3777 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1);
3778 assert(LVT.isInteger());
3784 unsigned NumMemOps = 0;
3786 unsigned VTSize = VT.getSizeInBits() / 8;
3787 while (VTSize > Size) {
3788 // For now, only use non-vector load / store's for the left-over pieces.
3793 if (VT.isVector() || VT.isFloatingPoint()) {
3794 NewVT = (VT.getSizeInBits() > 64) ? MVT::i64 : MVT::i32;
3795 if (TLI.isOperationLegalOrCustom(ISD::STORE, NewVT) &&
3796 TLI.isSafeMemOpType(NewVT.getSimpleVT()))
3798 else if (NewVT == MVT::i64 &&
3799 TLI.isOperationLegalOrCustom(ISD::STORE, MVT::f64) &&
3800 TLI.isSafeMemOpType(MVT::f64)) {
3801 // i64 is usually not legal on 32-bit targets, but f64 may be.
3809 NewVT = (MVT::SimpleValueType)(NewVT.getSimpleVT().SimpleTy - 1);
3810 if (NewVT == MVT::i8)
3812 } while (!TLI.isSafeMemOpType(NewVT.getSimpleVT()));
3814 NewVTSize = NewVT.getSizeInBits() / 8;
3816 // If the new VT cannot cover all of the remaining bits, then consider
3817 // issuing a (or a pair of) unaligned and overlapping load / store.
3818 // FIXME: Only does this for 64-bit or more since we don't have proper
3819 // cost model for unaligned load / store.
3822 if (NumMemOps && AllowOverlap &&
3823 VTSize >= 8 && NewVTSize < Size &&
3824 TLI.allowsUnalignedMemoryAccesses(VT, AS, &Fast) && Fast)
3832 if (++NumMemOps > Limit)
3835 MemOps.push_back(VT);
3842 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, SDLoc dl,
3843 SDValue Chain, SDValue Dst,
3844 SDValue Src, uint64_t Size,
3845 unsigned Align, bool isVol,
3847 MachinePointerInfo DstPtrInfo,
3848 MachinePointerInfo SrcPtrInfo) {
3849 // Turn a memcpy of undef to nop.
3850 if (Src.getOpcode() == ISD::UNDEF)
3853 // Expand memcpy to a series of load and store ops if the size operand falls
3854 // below a certain threshold.
3855 // TODO: In the AlwaysInline case, if the size is big then generate a loop
3856 // rather than maybe a humongous number of loads and stores.
3857 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3858 std::vector<EVT> MemOps;
3859 bool DstAlignCanChange = false;
3860 MachineFunction &MF = DAG.getMachineFunction();
3861 MachineFrameInfo *MFI = MF.getFrameInfo();
3863 MF.getFunction()->getAttributes().
3864 hasAttribute(AttributeSet::FunctionIndex, Attribute::OptimizeForSize);
3865 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3866 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3867 DstAlignCanChange = true;
3868 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3869 if (Align > SrcAlign)
3872 bool CopyFromStr = isMemSrcFromString(Src, Str);
3873 bool isZeroStr = CopyFromStr && Str.empty();
3874 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(OptSize);
3876 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3877 (DstAlignCanChange ? 0 : Align),
3878 (isZeroStr ? 0 : SrcAlign),
3879 false, false, CopyFromStr, true, DAG, TLI))
3882 if (DstAlignCanChange) {
3883 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3884 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
3886 // Don't promote to an alignment that would require dynamic stack
3888 const TargetRegisterInfo *TRI = MF.getTarget().getRegisterInfo();
3889 if (!TRI->needsStackRealignment(MF))
3890 while (NewAlign > Align &&
3891 TLI.getDataLayout()->exceedsNaturalStackAlignment(NewAlign))
3894 if (NewAlign > Align) {
3895 // Give the stack frame object a larger alignment if needed.
3896 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3897 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3902 SmallVector<SDValue, 8> OutChains;
3903 unsigned NumMemOps = MemOps.size();
3904 uint64_t SrcOff = 0, DstOff = 0;
3905 for (unsigned i = 0; i != NumMemOps; ++i) {
3907 unsigned VTSize = VT.getSizeInBits() / 8;
3908 SDValue Value, Store;
3910 if (VTSize > Size) {
3911 // Issuing an unaligned load / store pair that overlaps with the previous
3912 // pair. Adjust the offset accordingly.
3913 assert(i == NumMemOps-1 && i != 0);
3914 SrcOff -= VTSize - Size;
3915 DstOff -= VTSize - Size;
3919 (isZeroStr || (VT.isInteger() && !VT.isVector()))) {
3920 // It's unlikely a store of a vector immediate can be done in a single
3921 // instruction. It would require a load from a constantpool first.
3922 // We only handle zero vectors here.
3923 // FIXME: Handle other cases where store of vector immediate is done in
3924 // a single instruction.
3925 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str.substr(SrcOff));
3926 if (Value.getNode())
3927 Store = DAG.getStore(Chain, dl, Value,
3928 getMemBasePlusOffset(Dst, DstOff, dl, DAG),
3929 DstPtrInfo.getWithOffset(DstOff), isVol,
3933 if (!Store.getNode()) {
3934 // The type might not be legal for the target. This should only happen
3935 // if the type is smaller than a legal type, as on PPC, so the right
3936 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify
3937 // to Load/Store if NVT==VT.
3938 // FIXME does the case above also need this?
3939 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
3940 assert(NVT.bitsGE(VT));
3941 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain,
3942 getMemBasePlusOffset(Src, SrcOff, dl, DAG),
3943 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false,
3944 MinAlign(SrcAlign, SrcOff));
3945 Store = DAG.getTruncStore(Chain, dl, Value,
3946 getMemBasePlusOffset(Dst, DstOff, dl, DAG),
3947 DstPtrInfo.getWithOffset(DstOff), VT, isVol,
3950 OutChains.push_back(Store);
3956 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains);
3959 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, SDLoc dl,
3960 SDValue Chain, SDValue Dst,
3961 SDValue Src, uint64_t Size,
3962 unsigned Align, bool isVol,
3964 MachinePointerInfo DstPtrInfo,
3965 MachinePointerInfo SrcPtrInfo) {
3966 // Turn a memmove of undef to nop.
3967 if (Src.getOpcode() == ISD::UNDEF)
3970 // Expand memmove to a series of load and store ops if the size operand falls
3971 // below a certain threshold.
3972 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3973 std::vector<EVT> MemOps;
3974 bool DstAlignCanChange = false;
3975 MachineFunction &MF = DAG.getMachineFunction();
3976 MachineFrameInfo *MFI = MF.getFrameInfo();
3977 bool OptSize = MF.getFunction()->getAttributes().
3978 hasAttribute(AttributeSet::FunctionIndex, Attribute::OptimizeForSize);
3979 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3980 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3981 DstAlignCanChange = true;
3982 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3983 if (Align > SrcAlign)
3985 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(OptSize);
3987 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3988 (DstAlignCanChange ? 0 : Align), SrcAlign,
3989 false, false, false, false, DAG, TLI))
3992 if (DstAlignCanChange) {
3993 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3994 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
3995 if (NewAlign > Align) {
3996 // Give the stack frame object a larger alignment if needed.
3997 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3998 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
4003 uint64_t SrcOff = 0, DstOff = 0;
4004 SmallVector<SDValue, 8> LoadValues;
4005 SmallVector<SDValue, 8> LoadChains;
4006 SmallVector<SDValue, 8> OutChains;
4007 unsigned NumMemOps = MemOps.size();
4008 for (unsigned i = 0; i < NumMemOps; i++) {
4010 unsigned VTSize = VT.getSizeInBits() / 8;
4013 Value = DAG.getLoad(VT, dl, Chain,
4014 getMemBasePlusOffset(Src, SrcOff, dl, DAG),
4015 SrcPtrInfo.getWithOffset(SrcOff), isVol,
4016 false, false, SrcAlign);
4017 LoadValues.push_back(Value);
4018 LoadChains.push_back(Value.getValue(1));
4021 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, LoadChains);
4023 for (unsigned i = 0; i < NumMemOps; i++) {
4025 unsigned VTSize = VT.getSizeInBits() / 8;
4028 Store = DAG.getStore(Chain, dl, LoadValues[i],
4029 getMemBasePlusOffset(Dst, DstOff, dl, DAG),
4030 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align);
4031 OutChains.push_back(Store);
4035 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains);
4038 /// \brief Lower the call to 'memset' intrinsic function into a series of store
4041 /// \param DAG Selection DAG where lowered code is placed.
4042 /// \param dl Link to corresponding IR location.
4043 /// \param Chain Control flow dependency.
4044 /// \param Dst Pointer to destination memory location.
4045 /// \param Src Value of byte to write into the memory.
4046 /// \param Size Number of bytes to write.
4047 /// \param Align Alignment of the destination in bytes.
4048 /// \param isVol True if destination is volatile.
4049 /// \param DstPtrInfo IR information on the memory pointer.
4050 /// \returns New head in the control flow, if lowering was successful, empty
4051 /// SDValue otherwise.
4053 /// The function tries to replace 'llvm.memset' intrinsic with several store
4054 /// operations and value calculation code. This is usually profitable for small
4056 static SDValue getMemsetStores(SelectionDAG &DAG, SDLoc dl,
4057 SDValue Chain, SDValue Dst,
4058 SDValue Src, uint64_t Size,
4059 unsigned Align, bool isVol,
4060 MachinePointerInfo DstPtrInfo) {
4061 // Turn a memset of undef to nop.
4062 if (Src.getOpcode() == ISD::UNDEF)
4065 // Expand memset to a series of load/store ops if the size operand
4066 // falls below a certain threshold.
4067 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
4068 std::vector<EVT> MemOps;
4069 bool DstAlignCanChange = false;
4070 MachineFunction &MF = DAG.getMachineFunction();
4071 MachineFrameInfo *MFI = MF.getFrameInfo();
4072 bool OptSize = MF.getFunction()->getAttributes().
4073 hasAttribute(AttributeSet::FunctionIndex, Attribute::OptimizeForSize);
4074 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
4075 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
4076 DstAlignCanChange = true;
4078 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue();
4079 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(OptSize),
4080 Size, (DstAlignCanChange ? 0 : Align), 0,
4081 true, IsZeroVal, false, true, DAG, TLI))
4084 if (DstAlignCanChange) {
4085 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
4086 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
4087 if (NewAlign > Align) {
4088 // Give the stack frame object a larger alignment if needed.
4089 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
4090 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
4095 SmallVector<SDValue, 8> OutChains;
4096 uint64_t DstOff = 0;
4097 unsigned NumMemOps = MemOps.size();
4099 // Find the largest store and generate the bit pattern for it.
4100 EVT LargestVT = MemOps[0];
4101 for (unsigned i = 1; i < NumMemOps; i++)
4102 if (MemOps[i].bitsGT(LargestVT))
4103 LargestVT = MemOps[i];
4104 SDValue MemSetValue = getMemsetValue(Src, LargestVT, DAG, dl);
4106 for (unsigned i = 0; i < NumMemOps; i++) {
4108 unsigned VTSize = VT.getSizeInBits() / 8;
4109 if (VTSize > Size) {
4110 // Issuing an unaligned load / store pair that overlaps with the previous
4111 // pair. Adjust the offset accordingly.
4112 assert(i == NumMemOps-1 && i != 0);
4113 DstOff -= VTSize - Size;
4116 // If this store is smaller than the largest store see whether we can get
4117 // the smaller value for free with a truncate.
4118 SDValue Value = MemSetValue;
4119 if (VT.bitsLT(LargestVT)) {
4120 if (!LargestVT.isVector() && !VT.isVector() &&
4121 TLI.isTruncateFree(LargestVT, VT))
4122 Value = DAG.getNode(ISD::TRUNCATE, dl, VT, MemSetValue);
4124 Value = getMemsetValue(Src, VT, DAG, dl);
4126 assert(Value.getValueType() == VT && "Value with wrong type.");
4127 SDValue Store = DAG.getStore(Chain, dl, Value,
4128 getMemBasePlusOffset(Dst, DstOff, dl, DAG),
4129 DstPtrInfo.getWithOffset(DstOff),
4130 isVol, false, Align);
4131 OutChains.push_back(Store);
4132 DstOff += VT.getSizeInBits() / 8;
4136 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains);
4139 SDValue SelectionDAG::getMemcpy(SDValue Chain, SDLoc dl, SDValue Dst,
4140 SDValue Src, SDValue Size,
4141 unsigned Align, bool isVol, bool AlwaysInline,
4142 MachinePointerInfo DstPtrInfo,
4143 MachinePointerInfo SrcPtrInfo) {
4144 assert(Align && "The SDAG layer expects explicit alignment and reserves 0");
4146 // Check to see if we should lower the memcpy to loads and stores first.
4147 // For cases within the target-specified limits, this is the best choice.
4148 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
4150 // Memcpy with size zero? Just return the original chain.
4151 if (ConstantSize->isNullValue())
4154 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
4155 ConstantSize->getZExtValue(),Align,
4156 isVol, false, DstPtrInfo, SrcPtrInfo);
4157 if (Result.getNode())
4161 // Then check to see if we should lower the memcpy with target-specific
4162 // code. If the target chooses to do this, this is the next best.
4164 TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align,
4165 isVol, AlwaysInline,
4166 DstPtrInfo, SrcPtrInfo);
4167 if (Result.getNode())
4170 // If we really need inline code and the target declined to provide it,
4171 // use a (potentially long) sequence of loads and stores.
4173 assert(ConstantSize && "AlwaysInline requires a constant size!");
4174 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
4175 ConstantSize->getZExtValue(), Align, isVol,
4176 true, DstPtrInfo, SrcPtrInfo);
4179 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc
4180 // memcpy is not guaranteed to be safe. libc memcpys aren't required to
4181 // respect volatile, so they may do things like read or write memory
4182 // beyond the given memory regions. But fixing this isn't easy, and most
4183 // people don't care.
4185 const TargetLowering *TLI = TM.getTargetLowering();
4187 // Emit a library call.
4188 TargetLowering::ArgListTy Args;
4189 TargetLowering::ArgListEntry Entry;
4190 Entry.Ty = TLI->getDataLayout()->getIntPtrType(*getContext());
4191 Entry.Node = Dst; Args.push_back(Entry);
4192 Entry.Node = Src; Args.push_back(Entry);
4193 Entry.Node = Size; Args.push_back(Entry);
4194 // FIXME: pass in SDLoc
4195 TargetLowering::CallLoweringInfo CLI(*this);
4196 CLI.setDebugLoc(dl).setChain(Chain)
4197 .setCallee(TLI->getLibcallCallingConv(RTLIB::MEMCPY),
4198 Type::getVoidTy(*getContext()),
4199 getExternalSymbol(TLI->getLibcallName(RTLIB::MEMCPY),
4200 TLI->getPointerTy()), std::move(Args), 0)
4201 .setDiscardResult();
4202 std::pair<SDValue,SDValue> CallResult = TLI->LowerCallTo(CLI);
4204 return CallResult.second;
4207 SDValue SelectionDAG::getMemmove(SDValue Chain, SDLoc dl, SDValue Dst,
4208 SDValue Src, SDValue Size,
4209 unsigned Align, bool isVol,
4210 MachinePointerInfo DstPtrInfo,
4211 MachinePointerInfo SrcPtrInfo) {
4212 assert(Align && "The SDAG layer expects explicit alignment and reserves 0");
4214 // Check to see if we should lower the memmove to loads and stores first.
4215 // For cases within the target-specified limits, this is the best choice.
4216 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
4218 // Memmove with size zero? Just return the original chain.
4219 if (ConstantSize->isNullValue())
4223 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
4224 ConstantSize->getZExtValue(), Align, isVol,
4225 false, DstPtrInfo, SrcPtrInfo);
4226 if (Result.getNode())
4230 // Then check to see if we should lower the memmove with target-specific
4231 // code. If the target chooses to do this, this is the next best.
4233 TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol,
4234 DstPtrInfo, SrcPtrInfo);
4235 if (Result.getNode())
4238 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may
4239 // not be safe. See memcpy above for more details.
4241 const TargetLowering *TLI = TM.getTargetLowering();
4243 // Emit a library call.
4244 TargetLowering::ArgListTy Args;
4245 TargetLowering::ArgListEntry Entry;
4246 Entry.Ty = TLI->getDataLayout()->getIntPtrType(*getContext());
4247 Entry.Node = Dst; Args.push_back(Entry);
4248 Entry.Node = Src; Args.push_back(Entry);
4249 Entry.Node = Size; Args.push_back(Entry);
4250 // FIXME: pass in SDLoc
4251 TargetLowering::CallLoweringInfo CLI(*this);
4252 CLI.setDebugLoc(dl).setChain(Chain)
4253 .setCallee(TLI->getLibcallCallingConv(RTLIB::MEMMOVE),
4254 Type::getVoidTy(*getContext()),
4255 getExternalSymbol(TLI->getLibcallName(RTLIB::MEMMOVE),
4256 TLI->getPointerTy()), std::move(Args), 0)
4257 .setDiscardResult();
4258 std::pair<SDValue,SDValue> CallResult = TLI->LowerCallTo(CLI);
4260 return CallResult.second;
4263 SDValue SelectionDAG::getMemset(SDValue Chain, SDLoc dl, SDValue Dst,
4264 SDValue Src, SDValue Size,
4265 unsigned Align, bool isVol,
4266 MachinePointerInfo DstPtrInfo) {
4267 assert(Align && "The SDAG layer expects explicit alignment and reserves 0");
4269 // Check to see if we should lower the memset to stores first.
4270 // For cases within the target-specified limits, this is the best choice.
4271 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
4273 // Memset with size zero? Just return the original chain.
4274 if (ConstantSize->isNullValue())
4278 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
4279 Align, isVol, DstPtrInfo);
4281 if (Result.getNode())
4285 // Then check to see if we should lower the memset with target-specific
4286 // code. If the target chooses to do this, this is the next best.
4288 TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol,
4290 if (Result.getNode())
4293 // Emit a library call.
4294 const TargetLowering *TLI = TM.getTargetLowering();
4295 Type *IntPtrTy = TLI->getDataLayout()->getIntPtrType(*getContext());
4296 TargetLowering::ArgListTy Args;
4297 TargetLowering::ArgListEntry Entry;
4298 Entry.Node = Dst; Entry.Ty = IntPtrTy;
4299 Args.push_back(Entry);
4300 // Extend or truncate the argument to be an i32 value for the call.
4301 if (Src.getValueType().bitsGT(MVT::i32))
4302 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
4304 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
4306 Entry.Ty = Type::getInt32Ty(*getContext());
4307 Entry.isSExt = true;
4308 Args.push_back(Entry);
4310 Entry.Ty = IntPtrTy;
4311 Entry.isSExt = false;
4312 Args.push_back(Entry);
4314 // FIXME: pass in SDLoc
4315 TargetLowering::CallLoweringInfo CLI(*this);
4316 CLI.setDebugLoc(dl).setChain(Chain)
4317 .setCallee(TLI->getLibcallCallingConv(RTLIB::MEMSET),
4318 Type::getVoidTy(*getContext()),
4319 getExternalSymbol(TLI->getLibcallName(RTLIB::MEMSET),
4320 TLI->getPointerTy()), std::move(Args), 0)
4321 .setDiscardResult();
4323 std::pair<SDValue,SDValue> CallResult = TLI->LowerCallTo(CLI);
4324 return CallResult.second;
4327 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4328 SDVTList VTList, ArrayRef<SDValue> Ops,
4329 MachineMemOperand *MMO,
4330 AtomicOrdering SuccessOrdering,
4331 AtomicOrdering FailureOrdering,
4332 SynchronizationScope SynchScope) {
4333 FoldingSetNodeID ID;
4334 ID.AddInteger(MemVT.getRawBits());
4335 AddNodeIDNode(ID, Opcode, VTList, Ops);
4336 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4338 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4339 cast<AtomicSDNode>(E)->refineAlignment(MMO);
4340 return SDValue(E, 0);
4343 // Allocate the operands array for the node out of the BumpPtrAllocator, since
4344 // SDNode doesn't have access to it. This memory will be "leaked" when
4345 // the node is deallocated, but recovered when the allocator is released.
4346 // If the number of operands is less than 5 we use AtomicSDNode's internal
4348 unsigned NumOps = Ops.size();
4349 SDUse *DynOps = NumOps > 4 ? OperandAllocator.Allocate<SDUse>(NumOps)
4352 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl.getIROrder(),
4353 dl.getDebugLoc(), VTList, MemVT,
4354 Ops.data(), DynOps, NumOps, MMO,
4355 SuccessOrdering, FailureOrdering,
4357 CSEMap.InsertNode(N, IP);
4358 AllNodes.push_back(N);
4359 return SDValue(N, 0);
4362 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4363 SDVTList VTList, ArrayRef<SDValue> Ops,
4364 MachineMemOperand *MMO,
4365 AtomicOrdering Ordering,
4366 SynchronizationScope SynchScope) {
4367 return getAtomic(Opcode, dl, MemVT, VTList, Ops, MMO, Ordering,
4368 Ordering, SynchScope);
4371 SDValue SelectionDAG::getAtomicCmpSwap(
4372 unsigned Opcode, SDLoc dl, EVT MemVT, SDVTList VTs, SDValue Chain,
4373 SDValue Ptr, SDValue Cmp, SDValue Swp, MachinePointerInfo PtrInfo,
4374 unsigned Alignment, AtomicOrdering SuccessOrdering,
4375 AtomicOrdering FailureOrdering, SynchronizationScope SynchScope) {
4376 assert(Opcode == ISD::ATOMIC_CMP_SWAP ||
4377 Opcode == ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS);
4378 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
4380 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4381 Alignment = getEVTAlignment(MemVT);
4383 MachineFunction &MF = getMachineFunction();
4385 // FIXME: Volatile isn't really correct; we should keep track of atomic
4386 // orderings in the memoperand.
4387 unsigned Flags = MachineMemOperand::MOVolatile;
4388 Flags |= MachineMemOperand::MOLoad;
4389 Flags |= MachineMemOperand::MOStore;
4391 MachineMemOperand *MMO =
4392 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment);
4394 return getAtomicCmpSwap(Opcode, dl, MemVT, VTs, Chain, Ptr, Cmp, Swp, MMO,
4395 SuccessOrdering, FailureOrdering, SynchScope);
4398 SDValue SelectionDAG::getAtomicCmpSwap(unsigned Opcode, SDLoc dl, EVT MemVT,
4399 SDVTList VTs, SDValue Chain, SDValue Ptr,
4400 SDValue Cmp, SDValue Swp,
4401 MachineMemOperand *MMO,
4402 AtomicOrdering SuccessOrdering,
4403 AtomicOrdering FailureOrdering,
4404 SynchronizationScope SynchScope) {
4405 assert(Opcode == ISD::ATOMIC_CMP_SWAP ||
4406 Opcode == ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS);
4407 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
4409 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
4410 return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO,
4411 SuccessOrdering, FailureOrdering, SynchScope);
4414 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4416 SDValue Ptr, SDValue Val,
4417 const Value* PtrVal,
4419 AtomicOrdering Ordering,
4420 SynchronizationScope SynchScope) {
4421 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4422 Alignment = getEVTAlignment(MemVT);
4424 MachineFunction &MF = getMachineFunction();
4425 // An atomic store does not load. An atomic load does not store.
4426 // (An atomicrmw obviously both loads and stores.)
4427 // For now, atomics are considered to be volatile always, and they are
4429 // FIXME: Volatile isn't really correct; we should keep track of atomic
4430 // orderings in the memoperand.
4431 unsigned Flags = MachineMemOperand::MOVolatile;
4432 if (Opcode != ISD::ATOMIC_STORE)
4433 Flags |= MachineMemOperand::MOLoad;
4434 if (Opcode != ISD::ATOMIC_LOAD)
4435 Flags |= MachineMemOperand::MOStore;
4437 MachineMemOperand *MMO =
4438 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
4439 MemVT.getStoreSize(), Alignment);
4441 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO,
4442 Ordering, SynchScope);
4445 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4447 SDValue Ptr, SDValue Val,
4448 MachineMemOperand *MMO,
4449 AtomicOrdering Ordering,
4450 SynchronizationScope SynchScope) {
4451 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
4452 Opcode == ISD::ATOMIC_LOAD_SUB ||
4453 Opcode == ISD::ATOMIC_LOAD_AND ||
4454 Opcode == ISD::ATOMIC_LOAD_OR ||
4455 Opcode == ISD::ATOMIC_LOAD_XOR ||
4456 Opcode == ISD::ATOMIC_LOAD_NAND ||
4457 Opcode == ISD::ATOMIC_LOAD_MIN ||
4458 Opcode == ISD::ATOMIC_LOAD_MAX ||
4459 Opcode == ISD::ATOMIC_LOAD_UMIN ||
4460 Opcode == ISD::ATOMIC_LOAD_UMAX ||
4461 Opcode == ISD::ATOMIC_SWAP ||
4462 Opcode == ISD::ATOMIC_STORE) &&
4463 "Invalid Atomic Op");
4465 EVT VT = Val.getValueType();
4467 SDVTList VTs = Opcode == ISD::ATOMIC_STORE ? getVTList(MVT::Other) :
4468 getVTList(VT, MVT::Other);
4469 SDValue Ops[] = {Chain, Ptr, Val};
4470 return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO, Ordering, SynchScope);
4473 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4474 EVT VT, SDValue Chain,
4476 MachineMemOperand *MMO,
4477 AtomicOrdering Ordering,
4478 SynchronizationScope SynchScope) {
4479 assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op");
4481 SDVTList VTs = getVTList(VT, MVT::Other);
4482 SDValue Ops[] = {Chain, Ptr};
4483 return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO, Ordering, SynchScope);
4486 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
4487 SDValue SelectionDAG::getMergeValues(ArrayRef<SDValue> Ops, SDLoc dl) {
4488 if (Ops.size() == 1)
4491 SmallVector<EVT, 4> VTs;
4492 VTs.reserve(Ops.size());
4493 for (unsigned i = 0; i < Ops.size(); ++i)
4494 VTs.push_back(Ops[i].getValueType());
4495 return getNode(ISD::MERGE_VALUES, dl, getVTList(VTs), Ops);
4499 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDLoc dl, SDVTList VTList,
4500 ArrayRef<SDValue> Ops,
4501 EVT MemVT, MachinePointerInfo PtrInfo,
4502 unsigned Align, bool Vol,
4503 bool ReadMem, bool WriteMem) {
4504 if (Align == 0) // Ensure that codegen never sees alignment 0
4505 Align = getEVTAlignment(MemVT);
4507 MachineFunction &MF = getMachineFunction();
4510 Flags |= MachineMemOperand::MOStore;
4512 Flags |= MachineMemOperand::MOLoad;
4514 Flags |= MachineMemOperand::MOVolatile;
4515 MachineMemOperand *MMO =
4516 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Align);
4518 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, MemVT, MMO);
4522 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDLoc dl, SDVTList VTList,
4523 ArrayRef<SDValue> Ops, EVT MemVT,
4524 MachineMemOperand *MMO) {
4525 assert((Opcode == ISD::INTRINSIC_VOID ||
4526 Opcode == ISD::INTRINSIC_W_CHAIN ||
4527 Opcode == ISD::PREFETCH ||
4528 Opcode == ISD::LIFETIME_START ||
4529 Opcode == ISD::LIFETIME_END ||
4530 (Opcode <= INT_MAX &&
4531 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) &&
4532 "Opcode is not a memory-accessing opcode!");
4534 // Memoize the node unless it returns a flag.
4535 MemIntrinsicSDNode *N;
4536 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
4537 FoldingSetNodeID ID;
4538 AddNodeIDNode(ID, Opcode, VTList, Ops);
4539 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4541 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4542 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO);
4543 return SDValue(E, 0);
4546 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl.getIROrder(),
4547 dl.getDebugLoc(), VTList, Ops,
4549 CSEMap.InsertNode(N, IP);
4551 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl.getIROrder(),
4552 dl.getDebugLoc(), VTList, Ops,
4555 AllNodes.push_back(N);
4556 return SDValue(N, 0);
4559 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4560 /// MachinePointerInfo record from it. This is particularly useful because the
4561 /// code generator has many cases where it doesn't bother passing in a
4562 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4563 static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) {
4564 // If this is FI+Offset, we can model it.
4565 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr))
4566 return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset);
4568 // If this is (FI+Offset1)+Offset2, we can model it.
4569 if (Ptr.getOpcode() != ISD::ADD ||
4570 !isa<ConstantSDNode>(Ptr.getOperand(1)) ||
4571 !isa<FrameIndexSDNode>(Ptr.getOperand(0)))
4572 return MachinePointerInfo();
4574 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
4575 return MachinePointerInfo::getFixedStack(FI, Offset+
4576 cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue());
4579 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4580 /// MachinePointerInfo record from it. This is particularly useful because the
4581 /// code generator has many cases where it doesn't bother passing in a
4582 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4583 static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) {
4584 // If the 'Offset' value isn't a constant, we can't handle this.
4585 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp))
4586 return InferPointerInfo(Ptr, OffsetNode->getSExtValue());
4587 if (OffsetOp.getOpcode() == ISD::UNDEF)
4588 return InferPointerInfo(Ptr);
4589 return MachinePointerInfo();
4594 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4595 EVT VT, SDLoc dl, SDValue Chain,
4596 SDValue Ptr, SDValue Offset,
4597 MachinePointerInfo PtrInfo, EVT MemVT,
4598 bool isVolatile, bool isNonTemporal, bool isInvariant,
4599 unsigned Alignment, const MDNode *TBAAInfo,
4600 const MDNode *Ranges) {
4601 assert(Chain.getValueType() == MVT::Other &&
4602 "Invalid chain type");
4603 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4604 Alignment = getEVTAlignment(VT);
4606 unsigned Flags = MachineMemOperand::MOLoad;
4608 Flags |= MachineMemOperand::MOVolatile;
4610 Flags |= MachineMemOperand::MONonTemporal;
4612 Flags |= MachineMemOperand::MOInvariant;
4614 // If we don't have a PtrInfo, infer the trivial frame index case to simplify
4616 if (PtrInfo.V.isNull())
4617 PtrInfo = InferPointerInfo(Ptr, Offset);
4619 MachineFunction &MF = getMachineFunction();
4620 MachineMemOperand *MMO =
4621 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment,
4623 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO);
4627 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4628 EVT VT, SDLoc dl, SDValue Chain,
4629 SDValue Ptr, SDValue Offset, EVT MemVT,
4630 MachineMemOperand *MMO) {
4632 ExtType = ISD::NON_EXTLOAD;
4633 } else if (ExtType == ISD::NON_EXTLOAD) {
4634 assert(VT == MemVT && "Non-extending load from different memory type!");
4637 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) &&
4638 "Should only be an extending load, not truncating!");
4639 assert(VT.isInteger() == MemVT.isInteger() &&
4640 "Cannot convert from FP to Int or Int -> FP!");
4641 assert(VT.isVector() == MemVT.isVector() &&
4642 "Cannot use trunc store to convert to or from a vector!");
4643 assert((!VT.isVector() ||
4644 VT.getVectorNumElements() == MemVT.getVectorNumElements()) &&
4645 "Cannot use trunc store to change the number of vector elements!");
4648 bool Indexed = AM != ISD::UNINDEXED;
4649 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
4650 "Unindexed load with an offset!");
4652 SDVTList VTs = Indexed ?
4653 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
4654 SDValue Ops[] = { Chain, Ptr, Offset };
4655 FoldingSetNodeID ID;
4656 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops);
4657 ID.AddInteger(MemVT.getRawBits());
4658 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(),
4659 MMO->isNonTemporal(),
4660 MMO->isInvariant()));
4661 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4663 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4664 cast<LoadSDNode>(E)->refineAlignment(MMO);
4665 return SDValue(E, 0);
4667 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl.getIROrder(),
4668 dl.getDebugLoc(), VTs, AM, ExtType,
4670 CSEMap.InsertNode(N, IP);
4671 AllNodes.push_back(N);
4672 return SDValue(N, 0);
4675 SDValue SelectionDAG::getLoad(EVT VT, SDLoc dl,
4676 SDValue Chain, SDValue Ptr,
4677 MachinePointerInfo PtrInfo,
4678 bool isVolatile, bool isNonTemporal,
4679 bool isInvariant, unsigned Alignment,
4680 const MDNode *TBAAInfo,
4681 const MDNode *Ranges) {
4682 SDValue Undef = getUNDEF(Ptr.getValueType());
4683 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
4684 PtrInfo, VT, isVolatile, isNonTemporal, isInvariant, Alignment,
4688 SDValue SelectionDAG::getLoad(EVT VT, SDLoc dl,
4689 SDValue Chain, SDValue Ptr,
4690 MachineMemOperand *MMO) {
4691 SDValue Undef = getUNDEF(Ptr.getValueType());
4692 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
4696 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, SDLoc dl, EVT VT,
4697 SDValue Chain, SDValue Ptr,
4698 MachinePointerInfo PtrInfo, EVT MemVT,
4699 bool isVolatile, bool isNonTemporal,
4700 unsigned Alignment, const MDNode *TBAAInfo) {
4701 SDValue Undef = getUNDEF(Ptr.getValueType());
4702 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
4703 PtrInfo, MemVT, isVolatile, isNonTemporal, false, Alignment,
4708 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, SDLoc dl, EVT VT,
4709 SDValue Chain, SDValue Ptr, EVT MemVT,
4710 MachineMemOperand *MMO) {
4711 SDValue Undef = getUNDEF(Ptr.getValueType());
4712 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
4717 SelectionDAG::getIndexedLoad(SDValue OrigLoad, SDLoc dl, SDValue Base,
4718 SDValue Offset, ISD::MemIndexedMode AM) {
4719 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
4720 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
4721 "Load is already a indexed load!");
4722 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl,
4723 LD->getChain(), Base, Offset, LD->getPointerInfo(),
4724 LD->getMemoryVT(), LD->isVolatile(), LD->isNonTemporal(),
4725 false, LD->getAlignment());
4728 SDValue SelectionDAG::getStore(SDValue Chain, SDLoc dl, SDValue Val,
4729 SDValue Ptr, MachinePointerInfo PtrInfo,
4730 bool isVolatile, bool isNonTemporal,
4731 unsigned Alignment, const MDNode *TBAAInfo) {
4732 assert(Chain.getValueType() == MVT::Other &&
4733 "Invalid chain type");
4734 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4735 Alignment = getEVTAlignment(Val.getValueType());
4737 unsigned Flags = MachineMemOperand::MOStore;
4739 Flags |= MachineMemOperand::MOVolatile;
4741 Flags |= MachineMemOperand::MONonTemporal;
4743 if (PtrInfo.V.isNull())
4744 PtrInfo = InferPointerInfo(Ptr);
4746 MachineFunction &MF = getMachineFunction();
4747 MachineMemOperand *MMO =
4748 MF.getMachineMemOperand(PtrInfo, Flags,
4749 Val.getValueType().getStoreSize(), Alignment,
4752 return getStore(Chain, dl, Val, Ptr, MMO);
4755 SDValue SelectionDAG::getStore(SDValue Chain, SDLoc dl, SDValue Val,
4756 SDValue Ptr, MachineMemOperand *MMO) {
4757 assert(Chain.getValueType() == MVT::Other &&
4758 "Invalid chain type");
4759 EVT VT = Val.getValueType();
4760 SDVTList VTs = getVTList(MVT::Other);
4761 SDValue Undef = getUNDEF(Ptr.getValueType());
4762 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4763 FoldingSetNodeID ID;
4764 AddNodeIDNode(ID, ISD::STORE, VTs, Ops);
4765 ID.AddInteger(VT.getRawBits());
4766 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
4767 MMO->isNonTemporal(), MMO->isInvariant()));
4768 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4770 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4771 cast<StoreSDNode>(E)->refineAlignment(MMO);
4772 return SDValue(E, 0);
4774 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl.getIROrder(),
4775 dl.getDebugLoc(), VTs,
4776 ISD::UNINDEXED, false, VT, MMO);
4777 CSEMap.InsertNode(N, IP);
4778 AllNodes.push_back(N);
4779 return SDValue(N, 0);
4782 SDValue SelectionDAG::getTruncStore(SDValue Chain, SDLoc dl, SDValue Val,
4783 SDValue Ptr, MachinePointerInfo PtrInfo,
4784 EVT SVT,bool isVolatile, bool isNonTemporal,
4786 const MDNode *TBAAInfo) {
4787 assert(Chain.getValueType() == MVT::Other &&
4788 "Invalid chain type");
4789 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4790 Alignment = getEVTAlignment(SVT);
4792 unsigned Flags = MachineMemOperand::MOStore;
4794 Flags |= MachineMemOperand::MOVolatile;
4796 Flags |= MachineMemOperand::MONonTemporal;
4798 if (PtrInfo.V.isNull())
4799 PtrInfo = InferPointerInfo(Ptr);
4801 MachineFunction &MF = getMachineFunction();
4802 MachineMemOperand *MMO =
4803 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment,
4806 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO);
4809 SDValue SelectionDAG::getTruncStore(SDValue Chain, SDLoc dl, SDValue Val,
4810 SDValue Ptr, EVT SVT,
4811 MachineMemOperand *MMO) {
4812 EVT VT = Val.getValueType();
4814 assert(Chain.getValueType() == MVT::Other &&
4815 "Invalid chain type");
4817 return getStore(Chain, dl, Val, Ptr, MMO);
4819 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) &&
4820 "Should only be a truncating store, not extending!");
4821 assert(VT.isInteger() == SVT.isInteger() &&
4822 "Can't do FP-INT conversion!");
4823 assert(VT.isVector() == SVT.isVector() &&
4824 "Cannot use trunc store to convert to or from a vector!");
4825 assert((!VT.isVector() ||
4826 VT.getVectorNumElements() == SVT.getVectorNumElements()) &&
4827 "Cannot use trunc store to change the number of vector elements!");
4829 SDVTList VTs = getVTList(MVT::Other);
4830 SDValue Undef = getUNDEF(Ptr.getValueType());
4831 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4832 FoldingSetNodeID ID;
4833 AddNodeIDNode(ID, ISD::STORE, VTs, Ops);
4834 ID.AddInteger(SVT.getRawBits());
4835 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(),
4836 MMO->isNonTemporal(), MMO->isInvariant()));
4837 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4839 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4840 cast<StoreSDNode>(E)->refineAlignment(MMO);
4841 return SDValue(E, 0);
4843 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl.getIROrder(),
4844 dl.getDebugLoc(), VTs,
4845 ISD::UNINDEXED, true, SVT, MMO);
4846 CSEMap.InsertNode(N, IP);
4847 AllNodes.push_back(N);
4848 return SDValue(N, 0);
4852 SelectionDAG::getIndexedStore(SDValue OrigStore, SDLoc dl, SDValue Base,
4853 SDValue Offset, ISD::MemIndexedMode AM) {
4854 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
4855 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
4856 "Store is already a indexed store!");
4857 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
4858 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
4859 FoldingSetNodeID ID;
4860 AddNodeIDNode(ID, ISD::STORE, VTs, Ops);
4861 ID.AddInteger(ST->getMemoryVT().getRawBits());
4862 ID.AddInteger(ST->getRawSubclassData());
4863 ID.AddInteger(ST->getPointerInfo().getAddrSpace());
4865 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4866 return SDValue(E, 0);
4868 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl.getIROrder(),
4869 dl.getDebugLoc(), VTs, AM,
4870 ST->isTruncatingStore(),
4872 ST->getMemOperand());
4873 CSEMap.InsertNode(N, IP);
4874 AllNodes.push_back(N);
4875 return SDValue(N, 0);
4878 SDValue SelectionDAG::getVAArg(EVT VT, SDLoc dl,
4879 SDValue Chain, SDValue Ptr,
4882 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) };
4883 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops);
4886 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
4887 ArrayRef<SDUse> Ops) {
4888 switch (Ops.size()) {
4889 case 0: return getNode(Opcode, DL, VT);
4890 case 1: return getNode(Opcode, DL, VT, static_cast<const SDValue>(Ops[0]));
4891 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4892 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4896 // Copy from an SDUse array into an SDValue array for use with
4897 // the regular getNode logic.
4898 SmallVector<SDValue, 8> NewOps(Ops.begin(), Ops.end());
4899 return getNode(Opcode, DL, VT, NewOps);
4902 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
4903 ArrayRef<SDValue> Ops) {
4904 unsigned NumOps = Ops.size();
4906 case 0: return getNode(Opcode, DL, VT);
4907 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4908 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4909 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4915 case ISD::SELECT_CC: {
4916 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
4917 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
4918 "LHS and RHS of condition must have same type!");
4919 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4920 "True and False arms of SelectCC must have same type!");
4921 assert(Ops[2].getValueType() == VT &&
4922 "select_cc node must be of same type as true and false value!");
4926 assert(NumOps == 5 && "BR_CC takes 5 operands!");
4927 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4928 "LHS/RHS of comparison should match types!");
4935 SDVTList VTs = getVTList(VT);
4937 if (VT != MVT::Glue) {
4938 FoldingSetNodeID ID;
4939 AddNodeIDNode(ID, Opcode, VTs, Ops);
4942 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4943 return SDValue(E, 0);
4945 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
4947 CSEMap.InsertNode(N, IP);
4949 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
4953 AllNodes.push_back(N);
4957 return SDValue(N, 0);
4960 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL,
4961 ArrayRef<EVT> ResultTys, ArrayRef<SDValue> Ops) {
4962 return getNode(Opcode, DL, getVTList(ResultTys), Ops);
4965 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
4966 ArrayRef<SDValue> Ops) {
4967 if (VTList.NumVTs == 1)
4968 return getNode(Opcode, DL, VTList.VTs[0], Ops);
4972 // FIXME: figure out how to safely handle things like
4973 // int foo(int x) { return 1 << (x & 255); }
4974 // int bar() { return foo(256); }
4975 case ISD::SRA_PARTS:
4976 case ISD::SRL_PARTS:
4977 case ISD::SHL_PARTS:
4978 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
4979 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
4980 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4981 else if (N3.getOpcode() == ISD::AND)
4982 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
4983 // If the and is only masking out bits that cannot effect the shift,
4984 // eliminate the and.
4985 unsigned NumBits = VT.getScalarType().getSizeInBits()*2;
4986 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
4987 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4993 // Memoize the node unless it returns a flag.
4995 unsigned NumOps = Ops.size();
4996 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
4997 FoldingSetNodeID ID;
4998 AddNodeIDNode(ID, Opcode, VTList, Ops);
5000 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
5001 return SDValue(E, 0);
5004 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(),
5005 DL.getDebugLoc(), VTList, Ops[0]);
5006 } else if (NumOps == 2) {
5007 N = new (NodeAllocator) BinarySDNode(Opcode, DL.getIROrder(),
5008 DL.getDebugLoc(), VTList, Ops[0],
5010 } else if (NumOps == 3) {
5011 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(),
5012 DL.getDebugLoc(), VTList, Ops[0],
5015 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
5018 CSEMap.InsertNode(N, IP);
5021 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(),
5022 DL.getDebugLoc(), VTList, Ops[0]);
5023 } else if (NumOps == 2) {
5024 N = new (NodeAllocator) BinarySDNode(Opcode, DL.getIROrder(),
5025 DL.getDebugLoc(), VTList, Ops[0],
5027 } else if (NumOps == 3) {
5028 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(),
5029 DL.getDebugLoc(), VTList, Ops[0],
5032 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
5036 AllNodes.push_back(N);
5040 return SDValue(N, 0);
5043 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList) {
5044 return getNode(Opcode, DL, VTList, ArrayRef<SDValue>());
5047 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5049 SDValue Ops[] = { N1 };
5050 return getNode(Opcode, DL, VTList, Ops);
5053 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5054 SDValue N1, SDValue N2) {
5055 SDValue Ops[] = { N1, N2 };
5056 return getNode(Opcode, DL, VTList, Ops);
5059 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5060 SDValue N1, SDValue N2, SDValue N3) {
5061 SDValue Ops[] = { N1, N2, N3 };
5062 return getNode(Opcode, DL, VTList, Ops);
5065 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5066 SDValue N1, SDValue N2, SDValue N3,
5068 SDValue Ops[] = { N1, N2, N3, N4 };
5069 return getNode(Opcode, DL, VTList, Ops);
5072 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5073 SDValue N1, SDValue N2, SDValue N3,
5074 SDValue N4, SDValue N5) {
5075 SDValue Ops[] = { N1, N2, N3, N4, N5 };
5076 return getNode(Opcode, DL, VTList, Ops);
5079 SDVTList SelectionDAG::getVTList(EVT VT) {
5080 return makeVTList(SDNode::getValueTypeList(VT), 1);
5083 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
5084 FoldingSetNodeID ID;
5086 ID.AddInteger(VT1.getRawBits());
5087 ID.AddInteger(VT2.getRawBits());
5090 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5092 EVT *Array = Allocator.Allocate<EVT>(2);
5095 Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, 2);
5096 VTListMap.InsertNode(Result, IP);
5098 return Result->getSDVTList();
5101 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
5102 FoldingSetNodeID ID;
5104 ID.AddInteger(VT1.getRawBits());
5105 ID.AddInteger(VT2.getRawBits());
5106 ID.AddInteger(VT3.getRawBits());
5109 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5111 EVT *Array = Allocator.Allocate<EVT>(3);
5115 Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, 3);
5116 VTListMap.InsertNode(Result, IP);
5118 return Result->getSDVTList();
5121 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
5122 FoldingSetNodeID ID;
5124 ID.AddInteger(VT1.getRawBits());
5125 ID.AddInteger(VT2.getRawBits());
5126 ID.AddInteger(VT3.getRawBits());
5127 ID.AddInteger(VT4.getRawBits());
5130 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5132 EVT *Array = Allocator.Allocate<EVT>(4);
5137 Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, 4);
5138 VTListMap.InsertNode(Result, IP);
5140 return Result->getSDVTList();
5143 SDVTList SelectionDAG::getVTList(ArrayRef<EVT> VTs) {
5144 unsigned NumVTs = VTs.size();
5145 FoldingSetNodeID ID;
5146 ID.AddInteger(NumVTs);
5147 for (unsigned index = 0; index < NumVTs; index++) {
5148 ID.AddInteger(VTs[index].getRawBits());
5152 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5154 EVT *Array = Allocator.Allocate<EVT>(NumVTs);
5155 std::copy(VTs.begin(), VTs.end(), Array);
5156 Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, NumVTs);
5157 VTListMap.InsertNode(Result, IP);
5159 return Result->getSDVTList();
5163 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
5164 /// specified operands. If the resultant node already exists in the DAG,
5165 /// this does not modify the specified node, instead it returns the node that
5166 /// already exists. If the resultant node does not exist in the DAG, the
5167 /// input node is returned. As a degenerate case, if you specify the same
5168 /// input operands as the node already has, the input node is returned.
5169 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) {
5170 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
5172 // Check to see if there is no change.
5173 if (Op == N->getOperand(0)) return N;
5175 // See if the modified node already exists.
5176 void *InsertPos = nullptr;
5177 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
5180 // Nope it doesn't. Remove the node from its current place in the maps.
5182 if (!RemoveNodeFromCSEMaps(N))
5183 InsertPos = nullptr;
5185 // Now we update the operands.
5186 N->OperandList[0].set(Op);
5188 // If this gets put into a CSE map, add it.
5189 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
5193 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) {
5194 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
5196 // Check to see if there is no change.
5197 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
5198 return N; // No operands changed, just return the input node.
5200 // See if the modified node already exists.
5201 void *InsertPos = nullptr;
5202 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
5205 // Nope it doesn't. Remove the node from its current place in the maps.
5207 if (!RemoveNodeFromCSEMaps(N))
5208 InsertPos = nullptr;
5210 // Now we update the operands.
5211 if (N->OperandList[0] != Op1)
5212 N->OperandList[0].set(Op1);
5213 if (N->OperandList[1] != Op2)
5214 N->OperandList[1].set(Op2);
5216 // If this gets put into a CSE map, add it.
5217 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
5221 SDNode *SelectionDAG::
5222 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) {
5223 SDValue Ops[] = { Op1, Op2, Op3 };
5224 return UpdateNodeOperands(N, Ops);
5227 SDNode *SelectionDAG::
5228 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
5229 SDValue Op3, SDValue Op4) {
5230 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
5231 return UpdateNodeOperands(N, Ops);
5234 SDNode *SelectionDAG::
5235 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
5236 SDValue Op3, SDValue Op4, SDValue Op5) {
5237 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
5238 return UpdateNodeOperands(N, Ops);
5241 SDNode *SelectionDAG::
5242 UpdateNodeOperands(SDNode *N, ArrayRef<SDValue> Ops) {
5243 unsigned NumOps = Ops.size();
5244 assert(N->getNumOperands() == NumOps &&
5245 "Update with wrong number of operands");
5247 // Check to see if there is no change.
5248 bool AnyChange = false;
5249 for (unsigned i = 0; i != NumOps; ++i) {
5250 if (Ops[i] != N->getOperand(i)) {
5256 // No operands changed, just return the input node.
5257 if (!AnyChange) return N;
5259 // See if the modified node already exists.
5260 void *InsertPos = nullptr;
5261 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, InsertPos))
5264 // Nope it doesn't. Remove the node from its current place in the maps.
5266 if (!RemoveNodeFromCSEMaps(N))
5267 InsertPos = nullptr;
5269 // Now we update the operands.
5270 for (unsigned i = 0; i != NumOps; ++i)
5271 if (N->OperandList[i] != Ops[i])
5272 N->OperandList[i].set(Ops[i]);
5274 // If this gets put into a CSE map, add it.
5275 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
5279 /// DropOperands - Release the operands and set this node to have
5281 void SDNode::DropOperands() {
5282 // Unlike the code in MorphNodeTo that does this, we don't need to
5283 // watch for dead nodes here.
5284 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
5290 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
5293 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5295 SDVTList VTs = getVTList(VT);
5296 return SelectNodeTo(N, MachineOpc, VTs, None);
5299 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5300 EVT VT, SDValue Op1) {
5301 SDVTList VTs = getVTList(VT);
5302 SDValue Ops[] = { Op1 };
5303 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5306 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5307 EVT VT, SDValue Op1,
5309 SDVTList VTs = getVTList(VT);
5310 SDValue Ops[] = { Op1, Op2 };
5311 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5314 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5315 EVT VT, SDValue Op1,
5316 SDValue Op2, SDValue Op3) {
5317 SDVTList VTs = getVTList(VT);
5318 SDValue Ops[] = { Op1, Op2, Op3 };
5319 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5322 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5323 EVT VT, ArrayRef<SDValue> Ops) {
5324 SDVTList VTs = getVTList(VT);
5325 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5328 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5329 EVT VT1, EVT VT2, ArrayRef<SDValue> Ops) {
5330 SDVTList VTs = getVTList(VT1, VT2);
5331 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5334 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5336 SDVTList VTs = getVTList(VT1, VT2);
5337 return SelectNodeTo(N, MachineOpc, VTs, None);
5340 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5341 EVT VT1, EVT VT2, EVT VT3,
5342 ArrayRef<SDValue> Ops) {
5343 SDVTList VTs = getVTList(VT1, VT2, VT3);
5344 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5347 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5348 EVT VT1, EVT VT2, EVT VT3, EVT VT4,
5349 ArrayRef<SDValue> Ops) {
5350 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
5351 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5354 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5357 SDVTList VTs = getVTList(VT1, VT2);
5358 SDValue Ops[] = { Op1 };
5359 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5362 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5364 SDValue Op1, SDValue Op2) {
5365 SDVTList VTs = getVTList(VT1, VT2);
5366 SDValue Ops[] = { Op1, Op2 };
5367 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5370 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5372 SDValue Op1, SDValue Op2,
5374 SDVTList VTs = getVTList(VT1, VT2);
5375 SDValue Ops[] = { Op1, Op2, Op3 };
5376 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5379 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5380 EVT VT1, EVT VT2, EVT VT3,
5381 SDValue Op1, SDValue Op2,
5383 SDVTList VTs = getVTList(VT1, VT2, VT3);
5384 SDValue Ops[] = { Op1, Op2, Op3 };
5385 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5388 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5389 SDVTList VTs,ArrayRef<SDValue> Ops) {
5390 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops);
5391 // Reset the NodeID to -1.
5396 /// UpdadeSDLocOnMergedSDNode - If the opt level is -O0 then it throws away
5397 /// the line number information on the merged node since it is not possible to
5398 /// preserve the information that operation is associated with multiple lines.
5399 /// This will make the debugger working better at -O0, were there is a higher
5400 /// probability having other instructions associated with that line.
5402 /// For IROrder, we keep the smaller of the two
5403 SDNode *SelectionDAG::UpdadeSDLocOnMergedSDNode(SDNode *N, SDLoc OLoc) {
5404 DebugLoc NLoc = N->getDebugLoc();
5405 if (!(NLoc.isUnknown()) && (OptLevel == CodeGenOpt::None) &&
5406 (OLoc.getDebugLoc() != NLoc)) {
5407 N->setDebugLoc(DebugLoc());
5409 unsigned Order = std::min(N->getIROrder(), OLoc.getIROrder());
5410 N->setIROrder(Order);
5414 /// MorphNodeTo - This *mutates* the specified node to have the specified
5415 /// return type, opcode, and operands.
5417 /// Note that MorphNodeTo returns the resultant node. If there is already a
5418 /// node of the specified opcode and operands, it returns that node instead of
5419 /// the current one. Note that the SDLoc need not be the same.
5421 /// Using MorphNodeTo is faster than creating a new node and swapping it in
5422 /// with ReplaceAllUsesWith both because it often avoids allocating a new
5423 /// node, and because it doesn't require CSE recalculation for any of
5424 /// the node's users.
5426 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
5427 SDVTList VTs, ArrayRef<SDValue> Ops) {
5428 unsigned NumOps = Ops.size();
5429 // If an identical node already exists, use it.
5431 if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) {
5432 FoldingSetNodeID ID;
5433 AddNodeIDNode(ID, Opc, VTs, Ops);
5434 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
5435 return UpdadeSDLocOnMergedSDNode(ON, SDLoc(N));
5438 if (!RemoveNodeFromCSEMaps(N))
5441 // Start the morphing.
5443 N->ValueList = VTs.VTs;
5444 N->NumValues = VTs.NumVTs;
5446 // Clear the operands list, updating used nodes to remove this from their
5447 // use list. Keep track of any operands that become dead as a result.
5448 SmallPtrSet<SDNode*, 16> DeadNodeSet;
5449 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
5451 SDNode *Used = Use.getNode();
5453 if (Used->use_empty())
5454 DeadNodeSet.insert(Used);
5457 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) {
5458 // Initialize the memory references information.
5459 MN->setMemRefs(nullptr, nullptr);
5460 // If NumOps is larger than the # of operands we can have in a
5461 // MachineSDNode, reallocate the operand list.
5462 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) {
5463 if (MN->OperandsNeedDelete)
5464 delete[] MN->OperandList;
5465 if (NumOps > array_lengthof(MN->LocalOperands))
5466 // We're creating a final node that will live unmorphed for the
5467 // remainder of the current SelectionDAG iteration, so we can allocate
5468 // the operands directly out of a pool with no recycling metadata.
5469 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
5470 Ops.data(), NumOps);
5472 MN->InitOperands(MN->LocalOperands, Ops.data(), NumOps);
5473 MN->OperandsNeedDelete = false;
5475 MN->InitOperands(MN->OperandList, Ops.data(), NumOps);
5477 // If NumOps is larger than the # of operands we currently have, reallocate
5478 // the operand list.
5479 if (NumOps > N->NumOperands) {
5480 if (N->OperandsNeedDelete)
5481 delete[] N->OperandList;
5482 N->InitOperands(new SDUse[NumOps], Ops.data(), NumOps);
5483 N->OperandsNeedDelete = true;
5485 N->InitOperands(N->OperandList, Ops.data(), NumOps);
5488 // Delete any nodes that are still dead after adding the uses for the
5490 if (!DeadNodeSet.empty()) {
5491 SmallVector<SDNode *, 16> DeadNodes;
5492 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
5493 E = DeadNodeSet.end(); I != E; ++I)
5494 if ((*I)->use_empty())
5495 DeadNodes.push_back(*I);
5496 RemoveDeadNodes(DeadNodes);
5500 CSEMap.InsertNode(N, IP); // Memoize the new node.
5505 /// getMachineNode - These are used for target selectors to create a new node
5506 /// with specified return type(s), MachineInstr opcode, and operands.
5508 /// Note that getMachineNode returns the resultant node. If there is already a
5509 /// node of the specified opcode and operands, it returns that node instead of
5510 /// the current one.
5512 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT) {
5513 SDVTList VTs = getVTList(VT);
5514 return getMachineNode(Opcode, dl, VTs, None);
5518 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT, SDValue Op1) {
5519 SDVTList VTs = getVTList(VT);
5520 SDValue Ops[] = { Op1 };
5521 return getMachineNode(Opcode, dl, VTs, Ops);
5525 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT,
5526 SDValue Op1, SDValue Op2) {
5527 SDVTList VTs = getVTList(VT);
5528 SDValue Ops[] = { Op1, Op2 };
5529 return getMachineNode(Opcode, dl, VTs, Ops);
5533 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT,
5534 SDValue Op1, SDValue Op2, SDValue Op3) {
5535 SDVTList VTs = getVTList(VT);
5536 SDValue Ops[] = { Op1, Op2, Op3 };
5537 return getMachineNode(Opcode, dl, VTs, Ops);
5541 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT,
5542 ArrayRef<SDValue> Ops) {
5543 SDVTList VTs = getVTList(VT);
5544 return getMachineNode(Opcode, dl, VTs, Ops);
5548 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1, EVT VT2) {
5549 SDVTList VTs = getVTList(VT1, VT2);
5550 return getMachineNode(Opcode, dl, VTs, None);
5554 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5555 EVT VT1, EVT VT2, SDValue Op1) {
5556 SDVTList VTs = getVTList(VT1, VT2);
5557 SDValue Ops[] = { Op1 };
5558 return getMachineNode(Opcode, dl, VTs, Ops);
5562 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5563 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) {
5564 SDVTList VTs = getVTList(VT1, VT2);
5565 SDValue Ops[] = { Op1, Op2 };
5566 return getMachineNode(Opcode, dl, VTs, Ops);
5570 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5571 EVT VT1, EVT VT2, SDValue Op1,
5572 SDValue Op2, SDValue Op3) {
5573 SDVTList VTs = getVTList(VT1, VT2);
5574 SDValue Ops[] = { Op1, Op2, Op3 };
5575 return getMachineNode(Opcode, dl, VTs, Ops);
5579 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5581 ArrayRef<SDValue> Ops) {
5582 SDVTList VTs = getVTList(VT1, VT2);
5583 return getMachineNode(Opcode, dl, VTs, Ops);
5587 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5588 EVT VT1, EVT VT2, EVT VT3,
5589 SDValue Op1, SDValue Op2) {
5590 SDVTList VTs = getVTList(VT1, VT2, VT3);
5591 SDValue Ops[] = { Op1, Op2 };
5592 return getMachineNode(Opcode, dl, VTs, Ops);
5596 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5597 EVT VT1, EVT VT2, EVT VT3,
5598 SDValue Op1, SDValue Op2, SDValue Op3) {
5599 SDVTList VTs = getVTList(VT1, VT2, VT3);
5600 SDValue Ops[] = { Op1, Op2, Op3 };
5601 return getMachineNode(Opcode, dl, VTs, Ops);
5605 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5606 EVT VT1, EVT VT2, EVT VT3,
5607 ArrayRef<SDValue> Ops) {
5608 SDVTList VTs = getVTList(VT1, VT2, VT3);
5609 return getMachineNode(Opcode, dl, VTs, Ops);
5613 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1,
5614 EVT VT2, EVT VT3, EVT VT4,
5615 ArrayRef<SDValue> Ops) {
5616 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
5617 return getMachineNode(Opcode, dl, VTs, Ops);
5621 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5622 ArrayRef<EVT> ResultTys,
5623 ArrayRef<SDValue> Ops) {
5624 SDVTList VTs = getVTList(ResultTys);
5625 return getMachineNode(Opcode, dl, VTs, Ops);
5629 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc DL, SDVTList VTs,
5630 ArrayRef<SDValue> OpsArray) {
5631 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue;
5634 const SDValue *Ops = OpsArray.data();
5635 unsigned NumOps = OpsArray.size();
5638 FoldingSetNodeID ID;
5639 AddNodeIDNode(ID, ~Opcode, VTs, OpsArray);
5641 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
5642 return cast<MachineSDNode>(UpdadeSDLocOnMergedSDNode(E, DL));
5646 // Allocate a new MachineSDNode.
5647 N = new (NodeAllocator) MachineSDNode(~Opcode, DL.getIROrder(),
5648 DL.getDebugLoc(), VTs);
5650 // Initialize the operands list.
5651 if (NumOps > array_lengthof(N->LocalOperands))
5652 // We're creating a final node that will live unmorphed for the
5653 // remainder of the current SelectionDAG iteration, so we can allocate
5654 // the operands directly out of a pool with no recycling metadata.
5655 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
5658 N->InitOperands(N->LocalOperands, Ops, NumOps);
5659 N->OperandsNeedDelete = false;
5662 CSEMap.InsertNode(N, IP);
5664 AllNodes.push_back(N);
5666 VerifyMachineNode(N);
5671 /// getTargetExtractSubreg - A convenience function for creating
5672 /// TargetOpcode::EXTRACT_SUBREG nodes.
5674 SelectionDAG::getTargetExtractSubreg(int SRIdx, SDLoc DL, EVT VT,
5676 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
5677 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL,
5678 VT, Operand, SRIdxVal);
5679 return SDValue(Subreg, 0);
5682 /// getTargetInsertSubreg - A convenience function for creating
5683 /// TargetOpcode::INSERT_SUBREG nodes.
5685 SelectionDAG::getTargetInsertSubreg(int SRIdx, SDLoc DL, EVT VT,
5686 SDValue Operand, SDValue Subreg) {
5687 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
5688 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL,
5689 VT, Operand, Subreg, SRIdxVal);
5690 return SDValue(Result, 0);
5693 /// getNodeIfExists - Get the specified node if it's already available, or
5694 /// else return NULL.
5695 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
5696 ArrayRef<SDValue> Ops, bool nuw, bool nsw,
5698 if (VTList.VTs[VTList.NumVTs - 1] != MVT::Glue) {
5699 FoldingSetNodeID ID;
5700 AddNodeIDNode(ID, Opcode, VTList, Ops);
5701 if (isBinOpWithFlags(Opcode))
5702 AddBinaryNodeIDCustom(ID, nuw, nsw, exact);
5704 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
5710 /// getDbgValue - Creates a SDDbgValue node.
5714 SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R,
5715 bool IsIndirect, uint64_t Off,
5716 DebugLoc DL, unsigned O) {
5717 return new (Allocator) SDDbgValue(MDPtr, N, R, IsIndirect, Off, DL, O);
5722 SelectionDAG::getConstantDbgValue(MDNode *MDPtr, const Value *C,
5724 DebugLoc DL, unsigned O) {
5725 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O);
5730 SelectionDAG::getFrameIndexDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off,
5731 DebugLoc DL, unsigned O) {
5732 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O);
5737 /// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node
5738 /// pointed to by a use iterator is deleted, increment the use iterator
5739 /// so that it doesn't dangle.
5741 class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener {
5742 SDNode::use_iterator &UI;
5743 SDNode::use_iterator &UE;
5745 void NodeDeleted(SDNode *N, SDNode *E) override {
5746 // Increment the iterator as needed.
5747 while (UI != UE && N == *UI)
5752 RAUWUpdateListener(SelectionDAG &d,
5753 SDNode::use_iterator &ui,
5754 SDNode::use_iterator &ue)
5755 : SelectionDAG::DAGUpdateListener(d), UI(ui), UE(ue) {}
5760 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5761 /// This can cause recursive merging of nodes in the DAG.
5763 /// This version assumes From has a single result value.
5765 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To) {
5766 SDNode *From = FromN.getNode();
5767 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
5768 "Cannot replace with this method!");
5769 assert(From != To.getNode() && "Cannot replace uses of with self");
5771 // Iterate over all the existing uses of From. New uses will be added
5772 // to the beginning of the use list, which we avoid visiting.
5773 // This specifically avoids visiting uses of From that arise while the
5774 // replacement is happening, because any such uses would be the result
5775 // of CSE: If an existing node looks like From after one of its operands
5776 // is replaced by To, we don't want to replace of all its users with To
5777 // too. See PR3018 for more info.
5778 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5779 RAUWUpdateListener Listener(*this, UI, UE);
5783 // This node is about to morph, remove its old self from the CSE maps.
5784 RemoveNodeFromCSEMaps(User);
5786 // A user can appear in a use list multiple times, and when this
5787 // happens the uses are usually next to each other in the list.
5788 // To help reduce the number of CSE recomputations, process all
5789 // the uses of this user that we can find this way.
5791 SDUse &Use = UI.getUse();
5794 } while (UI != UE && *UI == User);
5796 // Now that we have modified User, add it back to the CSE maps. If it
5797 // already exists there, recursively merge the results together.
5798 AddModifiedNodeToCSEMaps(User);
5801 // If we just RAUW'd the root, take note.
5802 if (FromN == getRoot())
5806 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5807 /// This can cause recursive merging of nodes in the DAG.
5809 /// This version assumes that for each value of From, there is a
5810 /// corresponding value in To in the same position with the same type.
5812 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To) {
5814 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
5815 assert((!From->hasAnyUseOfValue(i) ||
5816 From->getValueType(i) == To->getValueType(i)) &&
5817 "Cannot use this version of ReplaceAllUsesWith!");
5820 // Handle the trivial case.
5824 // Iterate over just the existing users of From. See the comments in
5825 // the ReplaceAllUsesWith above.
5826 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5827 RAUWUpdateListener Listener(*this, UI, UE);
5831 // This node is about to morph, remove its old self from the CSE maps.
5832 RemoveNodeFromCSEMaps(User);
5834 // A user can appear in a use list multiple times, and when this
5835 // happens the uses are usually next to each other in the list.
5836 // To help reduce the number of CSE recomputations, process all
5837 // the uses of this user that we can find this way.
5839 SDUse &Use = UI.getUse();
5842 } while (UI != UE && *UI == User);
5844 // Now that we have modified User, add it back to the CSE maps. If it
5845 // already exists there, recursively merge the results together.
5846 AddModifiedNodeToCSEMaps(User);
5849 // If we just RAUW'd the root, take note.
5850 if (From == getRoot().getNode())
5851 setRoot(SDValue(To, getRoot().getResNo()));
5854 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5855 /// This can cause recursive merging of nodes in the DAG.
5857 /// This version can replace From with any result values. To must match the
5858 /// number and types of values returned by From.
5859 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, const SDValue *To) {
5860 if (From->getNumValues() == 1) // Handle the simple case efficiently.
5861 return ReplaceAllUsesWith(SDValue(From, 0), To[0]);
5863 // Iterate over just the existing users of From. See the comments in
5864 // the ReplaceAllUsesWith above.
5865 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5866 RAUWUpdateListener Listener(*this, UI, UE);
5870 // This node is about to morph, remove its old self from the CSE maps.
5871 RemoveNodeFromCSEMaps(User);
5873 // A user can appear in a use list multiple times, and when this
5874 // happens the uses are usually next to each other in the list.
5875 // To help reduce the number of CSE recomputations, process all
5876 // the uses of this user that we can find this way.
5878 SDUse &Use = UI.getUse();
5879 const SDValue &ToOp = To[Use.getResNo()];
5882 } while (UI != UE && *UI == User);
5884 // Now that we have modified User, add it back to the CSE maps. If it
5885 // already exists there, recursively merge the results together.
5886 AddModifiedNodeToCSEMaps(User);
5889 // If we just RAUW'd the root, take note.
5890 if (From == getRoot().getNode())
5891 setRoot(SDValue(To[getRoot().getResNo()]));
5894 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
5895 /// uses of other values produced by From.getNode() alone. The Deleted
5896 /// vector is handled the same way as for ReplaceAllUsesWith.
5897 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To){
5898 // Handle the really simple, really trivial case efficiently.
5899 if (From == To) return;
5901 // Handle the simple, trivial, case efficiently.
5902 if (From.getNode()->getNumValues() == 1) {
5903 ReplaceAllUsesWith(From, To);
5907 // Iterate over just the existing users of From. See the comments in
5908 // the ReplaceAllUsesWith above.
5909 SDNode::use_iterator UI = From.getNode()->use_begin(),
5910 UE = From.getNode()->use_end();
5911 RAUWUpdateListener Listener(*this, UI, UE);
5914 bool UserRemovedFromCSEMaps = false;
5916 // A user can appear in a use list multiple times, and when this
5917 // happens the uses are usually next to each other in the list.
5918 // To help reduce the number of CSE recomputations, process all
5919 // the uses of this user that we can find this way.
5921 SDUse &Use = UI.getUse();
5923 // Skip uses of different values from the same node.
5924 if (Use.getResNo() != From.getResNo()) {
5929 // If this node hasn't been modified yet, it's still in the CSE maps,
5930 // so remove its old self from the CSE maps.
5931 if (!UserRemovedFromCSEMaps) {
5932 RemoveNodeFromCSEMaps(User);
5933 UserRemovedFromCSEMaps = true;
5938 } while (UI != UE && *UI == User);
5940 // We are iterating over all uses of the From node, so if a use
5941 // doesn't use the specific value, no changes are made.
5942 if (!UserRemovedFromCSEMaps)
5945 // Now that we have modified User, add it back to the CSE maps. If it
5946 // already exists there, recursively merge the results together.
5947 AddModifiedNodeToCSEMaps(User);
5950 // If we just RAUW'd the root, take note.
5951 if (From == getRoot())
5956 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
5957 /// to record information about a use.
5964 /// operator< - Sort Memos by User.
5965 bool operator<(const UseMemo &L, const UseMemo &R) {
5966 return (intptr_t)L.User < (intptr_t)R.User;
5970 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
5971 /// uses of other values produced by From.getNode() alone. The same value
5972 /// may appear in both the From and To list. The Deleted vector is
5973 /// handled the same way as for ReplaceAllUsesWith.
5974 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
5977 // Handle the simple, trivial case efficiently.
5979 return ReplaceAllUsesOfValueWith(*From, *To);
5981 // Read up all the uses and make records of them. This helps
5982 // processing new uses that are introduced during the
5983 // replacement process.
5984 SmallVector<UseMemo, 4> Uses;
5985 for (unsigned i = 0; i != Num; ++i) {
5986 unsigned FromResNo = From[i].getResNo();
5987 SDNode *FromNode = From[i].getNode();
5988 for (SDNode::use_iterator UI = FromNode->use_begin(),
5989 E = FromNode->use_end(); UI != E; ++UI) {
5990 SDUse &Use = UI.getUse();
5991 if (Use.getResNo() == FromResNo) {
5992 UseMemo Memo = { *UI, i, &Use };
5993 Uses.push_back(Memo);
5998 // Sort the uses, so that all the uses from a given User are together.
5999 std::sort(Uses.begin(), Uses.end());
6001 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
6002 UseIndex != UseIndexEnd; ) {
6003 // We know that this user uses some value of From. If it is the right
6004 // value, update it.
6005 SDNode *User = Uses[UseIndex].User;
6007 // This node is about to morph, remove its old self from the CSE maps.
6008 RemoveNodeFromCSEMaps(User);
6010 // The Uses array is sorted, so all the uses for a given User
6011 // are next to each other in the list.
6012 // To help reduce the number of CSE recomputations, process all
6013 // the uses of this user that we can find this way.
6015 unsigned i = Uses[UseIndex].Index;
6016 SDUse &Use = *Uses[UseIndex].Use;
6020 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
6022 // Now that we have modified User, add it back to the CSE maps. If it
6023 // already exists there, recursively merge the results together.
6024 AddModifiedNodeToCSEMaps(User);
6028 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
6029 /// based on their topological order. It returns the maximum id and a vector
6030 /// of the SDNodes* in assigned order by reference.
6031 unsigned SelectionDAG::AssignTopologicalOrder() {
6033 unsigned DAGSize = 0;
6035 // SortedPos tracks the progress of the algorithm. Nodes before it are
6036 // sorted, nodes after it are unsorted. When the algorithm completes
6037 // it is at the end of the list.
6038 allnodes_iterator SortedPos = allnodes_begin();
6040 // Visit all the nodes. Move nodes with no operands to the front of
6041 // the list immediately. Annotate nodes that do have operands with their
6042 // operand count. Before we do this, the Node Id fields of the nodes
6043 // may contain arbitrary values. After, the Node Id fields for nodes
6044 // before SortedPos will contain the topological sort index, and the
6045 // Node Id fields for nodes At SortedPos and after will contain the
6046 // count of outstanding operands.
6047 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
6049 checkForCycles(N, this);
6050 unsigned Degree = N->getNumOperands();
6052 // A node with no uses, add it to the result array immediately.
6053 N->setNodeId(DAGSize++);
6054 allnodes_iterator Q = N;
6056 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
6057 assert(SortedPos != AllNodes.end() && "Overran node list");
6060 // Temporarily use the Node Id as scratch space for the degree count.
6061 N->setNodeId(Degree);
6065 // Visit all the nodes. As we iterate, move nodes into sorted order,
6066 // such that by the time the end is reached all nodes will be sorted.
6067 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
6069 checkForCycles(N, this);
6070 // N is in sorted position, so all its uses have one less operand
6071 // that needs to be sorted.
6072 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
6075 unsigned Degree = P->getNodeId();
6076 assert(Degree != 0 && "Invalid node degree");
6079 // All of P's operands are sorted, so P may sorted now.
6080 P->setNodeId(DAGSize++);
6082 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
6083 assert(SortedPos != AllNodes.end() && "Overran node list");
6086 // Update P's outstanding operand count.
6087 P->setNodeId(Degree);
6090 if (I == SortedPos) {
6093 dbgs() << "Overran sorted position:\n";
6094 S->dumprFull(this); dbgs() << "\n";
6095 dbgs() << "Checking if this is due to cycles\n";
6096 checkForCycles(this, true);
6098 llvm_unreachable(nullptr);
6102 assert(SortedPos == AllNodes.end() &&
6103 "Topological sort incomplete!");
6104 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
6105 "First node in topological sort is not the entry token!");
6106 assert(AllNodes.front().getNodeId() == 0 &&
6107 "First node in topological sort has non-zero id!");
6108 assert(AllNodes.front().getNumOperands() == 0 &&
6109 "First node in topological sort has operands!");
6110 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
6111 "Last node in topologic sort has unexpected id!");
6112 assert(AllNodes.back().use_empty() &&
6113 "Last node in topologic sort has users!");
6114 assert(DAGSize == allnodes_size() && "Node count mismatch!");
6118 /// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the
6119 /// value is produced by SD.
6120 void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) {
6121 DbgInfo->add(DB, SD, isParameter);
6123 SD->setHasDebugValue(true);
6126 /// TransferDbgValues - Transfer SDDbgValues.
6127 void SelectionDAG::TransferDbgValues(SDValue From, SDValue To) {
6128 if (From == To || !From.getNode()->getHasDebugValue())
6130 SDNode *FromNode = From.getNode();
6131 SDNode *ToNode = To.getNode();
6132 ArrayRef<SDDbgValue *> DVs = GetDbgValues(FromNode);
6133 SmallVector<SDDbgValue *, 2> ClonedDVs;
6134 for (ArrayRef<SDDbgValue *>::iterator I = DVs.begin(), E = DVs.end();
6136 SDDbgValue *Dbg = *I;
6137 if (Dbg->getKind() == SDDbgValue::SDNODE) {
6138 SDDbgValue *Clone = getDbgValue(Dbg->getMDPtr(), ToNode, To.getResNo(),
6140 Dbg->getOffset(), Dbg->getDebugLoc(),
6142 ClonedDVs.push_back(Clone);
6145 for (SmallVectorImpl<SDDbgValue *>::iterator I = ClonedDVs.begin(),
6146 E = ClonedDVs.end(); I != E; ++I)
6147 AddDbgValue(*I, ToNode, false);
6150 //===----------------------------------------------------------------------===//
6152 //===----------------------------------------------------------------------===//
6154 HandleSDNode::~HandleSDNode() {
6158 GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, unsigned Order,
6159 DebugLoc DL, const GlobalValue *GA,
6160 EVT VT, int64_t o, unsigned char TF)
6161 : SDNode(Opc, Order, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) {
6165 AddrSpaceCastSDNode::AddrSpaceCastSDNode(unsigned Order, DebugLoc dl, EVT VT,
6166 SDValue X, unsigned SrcAS,
6168 : UnarySDNode(ISD::ADDRSPACECAST, Order, dl, getSDVTList(VT), X),
6169 SrcAddrSpace(SrcAS), DestAddrSpace(DestAS) {}
6171 MemSDNode::MemSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs,
6172 EVT memvt, MachineMemOperand *mmo)
6173 : SDNode(Opc, Order, dl, VTs), MemoryVT(memvt), MMO(mmo) {
6174 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
6175 MMO->isNonTemporal(), MMO->isInvariant());
6176 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
6177 assert(isNonTemporal() == MMO->isNonTemporal() &&
6178 "Non-temporal encoding error!");
6179 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
6182 MemSDNode::MemSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs,
6183 ArrayRef<SDValue> Ops, EVT memvt, MachineMemOperand *mmo)
6184 : SDNode(Opc, Order, dl, VTs, Ops),
6185 MemoryVT(memvt), MMO(mmo) {
6186 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
6187 MMO->isNonTemporal(), MMO->isInvariant());
6188 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
6189 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
6192 /// Profile - Gather unique data for the node.
6194 void SDNode::Profile(FoldingSetNodeID &ID) const {
6195 AddNodeIDNode(ID, this);
6200 std::vector<EVT> VTs;
6203 VTs.reserve(MVT::LAST_VALUETYPE);
6204 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i)
6205 VTs.push_back(MVT((MVT::SimpleValueType)i));
6210 static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs;
6211 static ManagedStatic<EVTArray> SimpleVTArray;
6212 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
6214 /// getValueTypeList - Return a pointer to the specified value type.
6216 const EVT *SDNode::getValueTypeList(EVT VT) {
6217 if (VT.isExtended()) {
6218 sys::SmartScopedLock<true> Lock(*VTMutex);
6219 return &(*EVTs->insert(VT).first);
6221 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE &&
6222 "Value type out of range!");
6223 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy];
6227 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
6228 /// indicated value. This method ignores uses of other values defined by this
6230 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
6231 assert(Value < getNumValues() && "Bad value!");
6233 // TODO: Only iterate over uses of a given value of the node
6234 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
6235 if (UI.getUse().getResNo() == Value) {
6242 // Found exactly the right number of uses?
6247 /// hasAnyUseOfValue - Return true if there are any use of the indicated
6248 /// value. This method ignores uses of other values defined by this operation.
6249 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
6250 assert(Value < getNumValues() && "Bad value!");
6252 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
6253 if (UI.getUse().getResNo() == Value)
6260 /// isOnlyUserOf - Return true if this node is the only use of N.
6262 bool SDNode::isOnlyUserOf(SDNode *N) const {
6264 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
6275 /// isOperand - Return true if this node is an operand of N.
6277 bool SDValue::isOperandOf(SDNode *N) const {
6278 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6279 if (*this == N->getOperand(i))
6284 bool SDNode::isOperandOf(SDNode *N) const {
6285 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
6286 if (this == N->OperandList[i].getNode())
6291 /// reachesChainWithoutSideEffects - Return true if this operand (which must
6292 /// be a chain) reaches the specified operand without crossing any
6293 /// side-effecting instructions on any chain path. In practice, this looks
6294 /// through token factors and non-volatile loads. In order to remain efficient,
6295 /// this only looks a couple of nodes in, it does not do an exhaustive search.
6296 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
6297 unsigned Depth) const {
6298 if (*this == Dest) return true;
6300 // Don't search too deeply, we just want to be able to see through
6301 // TokenFactor's etc.
6302 if (Depth == 0) return false;
6304 // If this is a token factor, all inputs to the TF happen in parallel. If any
6305 // of the operands of the TF does not reach dest, then we cannot do the xform.
6306 if (getOpcode() == ISD::TokenFactor) {
6307 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
6308 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
6313 // Loads don't have side effects, look through them.
6314 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
6315 if (!Ld->isVolatile())
6316 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
6321 /// hasPredecessor - Return true if N is a predecessor of this node.
6322 /// N is either an operand of this node, or can be reached by recursively
6323 /// traversing up the operands.
6324 /// NOTE: This is an expensive method. Use it carefully.
6325 bool SDNode::hasPredecessor(const SDNode *N) const {
6326 SmallPtrSet<const SDNode *, 32> Visited;
6327 SmallVector<const SDNode *, 16> Worklist;
6328 return hasPredecessorHelper(N, Visited, Worklist);
6332 SDNode::hasPredecessorHelper(const SDNode *N,
6333 SmallPtrSet<const SDNode *, 32> &Visited,
6334 SmallVectorImpl<const SDNode *> &Worklist) const {
6335 if (Visited.empty()) {
6336 Worklist.push_back(this);
6338 // Take a look in the visited set. If we've already encountered this node
6339 // we needn't search further.
6340 if (Visited.count(N))
6344 // Haven't visited N yet. Continue the search.
6345 while (!Worklist.empty()) {
6346 const SDNode *M = Worklist.pop_back_val();
6347 for (unsigned i = 0, e = M->getNumOperands(); i != e; ++i) {
6348 SDNode *Op = M->getOperand(i).getNode();
6349 if (Visited.insert(Op))
6350 Worklist.push_back(Op);
6359 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
6360 assert(Num < NumOperands && "Invalid child # of SDNode!");
6361 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
6364 SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
6365 assert(N->getNumValues() == 1 &&
6366 "Can't unroll a vector with multiple results!");
6368 EVT VT = N->getValueType(0);
6369 unsigned NE = VT.getVectorNumElements();
6370 EVT EltVT = VT.getVectorElementType();
6373 SmallVector<SDValue, 8> Scalars;
6374 SmallVector<SDValue, 4> Operands(N->getNumOperands());
6376 // If ResNE is 0, fully unroll the vector op.
6379 else if (NE > ResNE)
6383 for (i= 0; i != NE; ++i) {
6384 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) {
6385 SDValue Operand = N->getOperand(j);
6386 EVT OperandVT = Operand.getValueType();
6387 if (OperandVT.isVector()) {
6388 // A vector operand; extract a single element.
6389 const TargetLowering *TLI = TM.getTargetLowering();
6390 EVT OperandEltVT = OperandVT.getVectorElementType();
6391 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl,
6394 getConstant(i, TLI->getVectorIdxTy()));
6396 // A scalar operand; just use it as is.
6397 Operands[j] = Operand;
6401 switch (N->getOpcode()) {
6403 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands));
6406 Scalars.push_back(getNode(ISD::SELECT, dl, EltVT, Operands));
6413 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0],
6414 getShiftAmountOperand(Operands[0].getValueType(),
6417 case ISD::SIGN_EXTEND_INREG:
6418 case ISD::FP_ROUND_INREG: {
6419 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType();
6420 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6422 getValueType(ExtVT)));
6427 for (; i < ResNE; ++i)
6428 Scalars.push_back(getUNDEF(EltVT));
6430 return getNode(ISD::BUILD_VECTOR, dl,
6431 EVT::getVectorVT(*getContext(), EltVT, ResNE), Scalars);
6435 /// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a
6436 /// location that is 'Dist' units away from the location that the 'Base' load
6437 /// is loading from.
6438 bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base,
6439 unsigned Bytes, int Dist) const {
6440 if (LD->getChain() != Base->getChain())
6442 EVT VT = LD->getValueType(0);
6443 if (VT.getSizeInBits() / 8 != Bytes)
6446 SDValue Loc = LD->getOperand(1);
6447 SDValue BaseLoc = Base->getOperand(1);
6448 if (Loc.getOpcode() == ISD::FrameIndex) {
6449 if (BaseLoc.getOpcode() != ISD::FrameIndex)
6451 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo();
6452 int FI = cast<FrameIndexSDNode>(Loc)->getIndex();
6453 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex();
6454 int FS = MFI->getObjectSize(FI);
6455 int BFS = MFI->getObjectSize(BFI);
6456 if (FS != BFS || FS != (int)Bytes) return false;
6457 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes);
6461 if (isBaseWithConstantOffset(Loc) && Loc.getOperand(0) == BaseLoc &&
6462 cast<ConstantSDNode>(Loc.getOperand(1))->getSExtValue() == Dist*Bytes)
6465 const GlobalValue *GV1 = nullptr;
6466 const GlobalValue *GV2 = nullptr;
6467 int64_t Offset1 = 0;
6468 int64_t Offset2 = 0;
6469 const TargetLowering *TLI = TM.getTargetLowering();
6470 bool isGA1 = TLI->isGAPlusOffset(Loc.getNode(), GV1, Offset1);
6471 bool isGA2 = TLI->isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2);
6472 if (isGA1 && isGA2 && GV1 == GV2)
6473 return Offset1 == (Offset2 + Dist*Bytes);
6478 /// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if
6479 /// it cannot be inferred.
6480 unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const {
6481 // If this is a GlobalAddress + cst, return the alignment.
6482 const GlobalValue *GV;
6483 int64_t GVOffset = 0;
6484 const TargetLowering *TLI = TM.getTargetLowering();
6485 if (TLI->isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) {
6486 unsigned PtrWidth = TLI->getPointerTypeSizeInBits(GV->getType());
6487 APInt KnownZero(PtrWidth, 0), KnownOne(PtrWidth, 0);
6488 llvm::computeKnownBits(const_cast<GlobalValue*>(GV), KnownZero, KnownOne,
6489 TLI->getDataLayout());
6490 unsigned AlignBits = KnownZero.countTrailingOnes();
6491 unsigned Align = AlignBits ? 1 << std::min(31U, AlignBits) : 0;
6493 return MinAlign(Align, GVOffset);
6496 // If this is a direct reference to a stack slot, use information about the
6497 // stack slot's alignment.
6498 int FrameIdx = 1 << 31;
6499 int64_t FrameOffset = 0;
6500 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) {
6501 FrameIdx = FI->getIndex();
6502 } else if (isBaseWithConstantOffset(Ptr) &&
6503 isa<FrameIndexSDNode>(Ptr.getOperand(0))) {
6505 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
6506 FrameOffset = Ptr.getConstantOperandVal(1);
6509 if (FrameIdx != (1 << 31)) {
6510 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo();
6511 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx),
6519 /// GetSplitDestVTs - Compute the VTs needed for the low/hi parts of a type
6520 /// which is split (or expanded) into two not necessarily identical pieces.
6521 std::pair<EVT, EVT> SelectionDAG::GetSplitDestVTs(const EVT &VT) const {
6522 // Currently all types are split in half.
6524 if (!VT.isVector()) {
6525 LoVT = HiVT = TLI->getTypeToTransformTo(*getContext(), VT);
6527 unsigned NumElements = VT.getVectorNumElements();
6528 assert(!(NumElements & 1) && "Splitting vector, but not in half!");
6529 LoVT = HiVT = EVT::getVectorVT(*getContext(), VT.getVectorElementType(),
6532 return std::make_pair(LoVT, HiVT);
6535 /// SplitVector - Split the vector with EXTRACT_SUBVECTOR and return the
6537 std::pair<SDValue, SDValue>
6538 SelectionDAG::SplitVector(const SDValue &N, const SDLoc &DL, const EVT &LoVT,
6540 assert(LoVT.getVectorNumElements() + HiVT.getVectorNumElements() <=
6541 N.getValueType().getVectorNumElements() &&
6542 "More vector elements requested than available!");
6544 Lo = getNode(ISD::EXTRACT_SUBVECTOR, DL, LoVT, N,
6545 getConstant(0, TLI->getVectorIdxTy()));
6546 Hi = getNode(ISD::EXTRACT_SUBVECTOR, DL, HiVT, N,
6547 getConstant(LoVT.getVectorNumElements(), TLI->getVectorIdxTy()));
6548 return std::make_pair(Lo, Hi);
6551 void SelectionDAG::ExtractVectorElements(SDValue Op,
6552 SmallVectorImpl<SDValue> &Args,
6553 unsigned Start, unsigned Count) {
6554 EVT VT = Op.getValueType();
6556 Count = VT.getVectorNumElements();
6558 EVT EltVT = VT.getVectorElementType();
6559 EVT IdxTy = TLI->getVectorIdxTy();
6561 for (unsigned i = Start, e = Start + Count; i != e; ++i) {
6562 Args.push_back(getNode(ISD::EXTRACT_VECTOR_ELT, SL, EltVT,
6563 Op, getConstant(i, IdxTy)));
6567 // getAddressSpace - Return the address space this GlobalAddress belongs to.
6568 unsigned GlobalAddressSDNode::getAddressSpace() const {
6569 return getGlobal()->getType()->getAddressSpace();
6573 Type *ConstantPoolSDNode::getType() const {
6574 if (isMachineConstantPoolEntry())
6575 return Val.MachineCPVal->getType();
6576 return Val.ConstVal->getType();
6579 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
6581 unsigned &SplatBitSize,
6583 unsigned MinSplatBits,
6584 bool isBigEndian) const {
6585 EVT VT = getValueType(0);
6586 assert(VT.isVector() && "Expected a vector type");
6587 unsigned sz = VT.getSizeInBits();
6588 if (MinSplatBits > sz)
6591 SplatValue = APInt(sz, 0);
6592 SplatUndef = APInt(sz, 0);
6594 // Get the bits. Bits with undefined values (when the corresponding element
6595 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
6596 // in SplatValue. If any of the values are not constant, give up and return
6598 unsigned int nOps = getNumOperands();
6599 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
6600 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
6602 for (unsigned j = 0; j < nOps; ++j) {
6603 unsigned i = isBigEndian ? nOps-1-j : j;
6604 SDValue OpVal = getOperand(i);
6605 unsigned BitPos = j * EltBitSize;
6607 if (OpVal.getOpcode() == ISD::UNDEF)
6608 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize);
6609 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
6610 SplatValue |= CN->getAPIntValue().zextOrTrunc(EltBitSize).
6611 zextOrTrunc(sz) << BitPos;
6612 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
6613 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
6618 // The build_vector is all constants or undefs. Find the smallest element
6619 // size that splats the vector.
6621 HasAnyUndefs = (SplatUndef != 0);
6624 unsigned HalfSize = sz / 2;
6625 APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize);
6626 APInt LowValue = SplatValue.trunc(HalfSize);
6627 APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize);
6628 APInt LowUndef = SplatUndef.trunc(HalfSize);
6630 // If the two halves do not match (ignoring undef bits), stop here.
6631 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
6632 MinSplatBits > HalfSize)
6635 SplatValue = HighValue | LowValue;
6636 SplatUndef = HighUndef & LowUndef;
6645 SDValue BuildVectorSDNode::getSplatValue(BitVector *UndefElements) const {
6646 if (UndefElements) {
6647 UndefElements->clear();
6648 UndefElements->resize(getNumOperands());
6651 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
6652 SDValue Op = getOperand(i);
6653 if (Op.getOpcode() == ISD::UNDEF) {
6655 (*UndefElements)[i] = true;
6656 } else if (!Splatted) {
6658 } else if (Splatted != Op) {
6664 assert(getOperand(0).getOpcode() == ISD::UNDEF &&
6665 "Can only have a splat without a constant for all undefs.");
6666 return getOperand(0);
6673 BuildVectorSDNode::getConstantSplatNode(BitVector *UndefElements) const {
6674 return dyn_cast_or_null<ConstantSDNode>(
6675 getSplatValue(UndefElements).getNode());
6679 BuildVectorSDNode::getConstantFPSplatNode(BitVector *UndefElements) const {
6680 return dyn_cast_or_null<ConstantFPSDNode>(
6681 getSplatValue(UndefElements).getNode());
6684 bool BuildVectorSDNode::isConstant() const {
6685 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
6686 unsigned Opc = getOperand(i).getOpcode();
6687 if (Opc != ISD::UNDEF && Opc != ISD::Constant && Opc != ISD::ConstantFP)
6693 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
6694 // Find the first non-undef value in the shuffle mask.
6696 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
6699 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
6701 // Make sure all remaining elements are either undef or the same as the first
6703 for (int Idx = Mask[i]; i != e; ++i)
6704 if (Mask[i] >= 0 && Mask[i] != Idx)
6710 static void checkForCyclesHelper(const SDNode *N,
6711 SmallPtrSet<const SDNode*, 32> &Visited,
6712 SmallPtrSet<const SDNode*, 32> &Checked,
6713 const llvm::SelectionDAG *DAG) {
6714 // If this node has already been checked, don't check it again.
6715 if (Checked.count(N))
6718 // If a node has already been visited on this depth-first walk, reject it as
6720 if (!Visited.insert(N)) {
6721 errs() << "Detected cycle in SelectionDAG\n";
6722 dbgs() << "Offending node:\n";
6723 N->dumprFull(DAG); dbgs() << "\n";
6727 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6728 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked, DAG);
6735 void llvm::checkForCycles(const llvm::SDNode *N,
6736 const llvm::SelectionDAG *DAG,
6744 assert(N && "Checking nonexistent SDNode");
6745 SmallPtrSet<const SDNode*, 32> visited;
6746 SmallPtrSet<const SDNode*, 32> checked;
6747 checkForCyclesHelper(N, visited, checked, DAG);
6752 void llvm::checkForCycles(const llvm::SelectionDAG *DAG, bool force) {
6753 checkForCycles(DAG->getRoot().getNode(), DAG, force);