1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "SDNodeDbgValue.h"
16 #include "llvm/ADT/SetVector.h"
17 #include "llvm/ADT/SmallPtrSet.h"
18 #include "llvm/ADT/SmallSet.h"
19 #include "llvm/ADT/SmallVector.h"
20 #include "llvm/ADT/StringExtras.h"
21 #include "llvm/Analysis/ValueTracking.h"
22 #include "llvm/CodeGen/MachineBasicBlock.h"
23 #include "llvm/CodeGen/MachineConstantPool.h"
24 #include "llvm/CodeGen/MachineFrameInfo.h"
25 #include "llvm/CodeGen/MachineModuleInfo.h"
26 #include "llvm/IR/CallingConv.h"
27 #include "llvm/IR/Constants.h"
28 #include "llvm/IR/DataLayout.h"
29 #include "llvm/IR/DebugInfo.h"
30 #include "llvm/IR/DerivedTypes.h"
31 #include "llvm/IR/Function.h"
32 #include "llvm/IR/GlobalAlias.h"
33 #include "llvm/IR/GlobalVariable.h"
34 #include "llvm/IR/Intrinsics.h"
35 #include "llvm/Support/CommandLine.h"
36 #include "llvm/Support/Debug.h"
37 #include "llvm/Support/ErrorHandling.h"
38 #include "llvm/Support/ManagedStatic.h"
39 #include "llvm/Support/MathExtras.h"
40 #include "llvm/Support/Mutex.h"
41 #include "llvm/Support/raw_ostream.h"
42 #include "llvm/Target/TargetInstrInfo.h"
43 #include "llvm/Target/TargetIntrinsicInfo.h"
44 #include "llvm/Target/TargetLowering.h"
45 #include "llvm/Target/TargetMachine.h"
46 #include "llvm/Target/TargetOptions.h"
47 #include "llvm/Target/TargetRegisterInfo.h"
48 #include "llvm/Target/TargetSelectionDAGInfo.h"
49 #include "llvm/Target/TargetSubtargetInfo.h"
56 /// makeVTList - Return an instance of the SDVTList struct initialized with the
57 /// specified members.
58 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
59 SDVTList Res = {VTs, NumVTs};
63 // Default null implementations of the callbacks.
64 void SelectionDAG::DAGUpdateListener::NodeDeleted(SDNode*, SDNode*) {}
65 void SelectionDAG::DAGUpdateListener::NodeUpdated(SDNode*) {}
67 //===----------------------------------------------------------------------===//
68 // ConstantFPSDNode Class
69 //===----------------------------------------------------------------------===//
71 /// isExactlyValue - We don't rely on operator== working on double values, as
72 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
73 /// As such, this method can be used to do an exact bit-for-bit comparison of
74 /// two floating point values.
75 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
76 return getValueAPF().bitwiseIsEqual(V);
79 bool ConstantFPSDNode::isValueValidForType(EVT VT,
81 assert(VT.isFloatingPoint() && "Can only convert between FP types");
83 // convert modifies in place, so make a copy.
84 APFloat Val2 = APFloat(Val);
86 (void) Val2.convert(SelectionDAG::EVTToAPFloatSemantics(VT),
87 APFloat::rmNearestTiesToEven,
92 //===----------------------------------------------------------------------===//
94 //===----------------------------------------------------------------------===//
96 /// isBuildVectorAllOnes - Return true if the specified node is a
97 /// BUILD_VECTOR where all of the elements are ~0 or undef.
98 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
99 // Look through a bit convert.
100 while (N->getOpcode() == ISD::BITCAST)
101 N = N->getOperand(0).getNode();
103 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
105 unsigned i = 0, e = N->getNumOperands();
107 // Skip over all of the undef values.
108 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
111 // Do not accept an all-undef vector.
112 if (i == e) return false;
114 // Do not accept build_vectors that aren't all constants or which have non-~0
115 // elements. We have to be a bit careful here, as the type of the constant
116 // may not be the same as the type of the vector elements due to type
117 // legalization (the elements are promoted to a legal type for the target and
118 // a vector of a type may be legal when the base element type is not).
119 // We only want to check enough bits to cover the vector elements, because
120 // we care if the resultant vector is all ones, not whether the individual
122 SDValue NotZero = N->getOperand(i);
123 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits();
124 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(NotZero)) {
125 if (CN->getAPIntValue().countTrailingOnes() < EltSize)
127 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(NotZero)) {
128 if (CFPN->getValueAPF().bitcastToAPInt().countTrailingOnes() < EltSize)
133 // Okay, we have at least one ~0 value, check to see if the rest match or are
134 // undefs. Even with the above element type twiddling, this should be OK, as
135 // the same type legalization should have applied to all the elements.
136 for (++i; i != e; ++i)
137 if (N->getOperand(i) != NotZero &&
138 N->getOperand(i).getOpcode() != ISD::UNDEF)
144 /// isBuildVectorAllZeros - Return true if the specified node is a
145 /// BUILD_VECTOR where all of the elements are 0 or undef.
146 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
147 // Look through a bit convert.
148 while (N->getOpcode() == ISD::BITCAST)
149 N = N->getOperand(0).getNode();
151 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
153 bool IsAllUndef = true;
154 for (const SDValue &Op : N->op_values()) {
155 if (Op.getOpcode() == ISD::UNDEF)
158 // Do not accept build_vectors that aren't all constants or which have non-0
159 // elements. We have to be a bit careful here, as the type of the constant
160 // may not be the same as the type of the vector elements due to type
161 // legalization (the elements are promoted to a legal type for the target
162 // and a vector of a type may be legal when the base element type is not).
163 // We only want to check enough bits to cover the vector elements, because
164 // we care if the resultant vector is all zeros, not whether the individual
166 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits();
167 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Op)) {
168 if (CN->getAPIntValue().countTrailingZeros() < EltSize)
170 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(Op)) {
171 if (CFPN->getValueAPF().bitcastToAPInt().countTrailingZeros() < EltSize)
177 // Do not accept an all-undef vector.
183 /// \brief Return true if the specified node is a BUILD_VECTOR node of
184 /// all ConstantSDNode or undef.
185 bool ISD::isBuildVectorOfConstantSDNodes(const SDNode *N) {
186 if (N->getOpcode() != ISD::BUILD_VECTOR)
189 for (const SDValue &Op : N->op_values()) {
190 if (Op.getOpcode() == ISD::UNDEF)
192 if (!isa<ConstantSDNode>(Op))
198 /// \brief Return true if the specified node is a BUILD_VECTOR node of
199 /// all ConstantFPSDNode or undef.
200 bool ISD::isBuildVectorOfConstantFPSDNodes(const SDNode *N) {
201 if (N->getOpcode() != ISD::BUILD_VECTOR)
204 for (const SDValue &Op : N->op_values()) {
205 if (Op.getOpcode() == ISD::UNDEF)
207 if (!isa<ConstantFPSDNode>(Op))
213 /// isScalarToVector - Return true if the specified node is a
214 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
215 /// element is not an undef.
216 bool ISD::isScalarToVector(const SDNode *N) {
217 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
220 if (N->getOpcode() != ISD::BUILD_VECTOR)
222 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
224 unsigned NumElems = N->getNumOperands();
227 for (unsigned i = 1; i < NumElems; ++i) {
228 SDValue V = N->getOperand(i);
229 if (V.getOpcode() != ISD::UNDEF)
235 /// allOperandsUndef - Return true if the node has at least one operand
236 /// and all operands of the specified node are ISD::UNDEF.
237 bool ISD::allOperandsUndef(const SDNode *N) {
238 // Return false if the node has no operands.
239 // This is "logically inconsistent" with the definition of "all" but
240 // is probably the desired behavior.
241 if (N->getNumOperands() == 0)
244 for (const SDValue &Op : N->op_values())
245 if (Op.getOpcode() != ISD::UNDEF)
251 ISD::NodeType ISD::getExtForLoadExtType(bool IsFP, ISD::LoadExtType ExtType) {
254 return IsFP ? ISD::FP_EXTEND : ISD::ANY_EXTEND;
256 return ISD::SIGN_EXTEND;
258 return ISD::ZERO_EXTEND;
263 llvm_unreachable("Invalid LoadExtType");
266 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
267 /// when given the operation for (X op Y).
268 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
269 // To perform this operation, we just need to swap the L and G bits of the
271 unsigned OldL = (Operation >> 2) & 1;
272 unsigned OldG = (Operation >> 1) & 1;
273 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
274 (OldL << 1) | // New G bit
275 (OldG << 2)); // New L bit.
278 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
279 /// 'op' is a valid SetCC operation.
280 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
281 unsigned Operation = Op;
283 Operation ^= 7; // Flip L, G, E bits, but not U.
285 Operation ^= 15; // Flip all of the condition bits.
287 if (Operation > ISD::SETTRUE2)
288 Operation &= ~8; // Don't let N and U bits get set.
290 return ISD::CondCode(Operation);
294 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
295 /// signed operation and 2 if the result is an unsigned comparison. Return zero
296 /// if the operation does not depend on the sign of the input (setne and seteq).
297 static int isSignedOp(ISD::CondCode Opcode) {
299 default: llvm_unreachable("Illegal integer setcc operation!");
301 case ISD::SETNE: return 0;
305 case ISD::SETGE: return 1;
309 case ISD::SETUGE: return 2;
313 /// getSetCCOrOperation - Return the result of a logical OR between different
314 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
315 /// returns SETCC_INVALID if it is not possible to represent the resultant
317 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
319 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
320 // Cannot fold a signed integer setcc with an unsigned integer setcc.
321 return ISD::SETCC_INVALID;
323 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
325 // If the N and U bits get set then the resultant comparison DOES suddenly
326 // care about orderedness, and is true when ordered.
327 if (Op > ISD::SETTRUE2)
328 Op &= ~16; // Clear the U bit if the N bit is set.
330 // Canonicalize illegal integer setcc's.
331 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
334 return ISD::CondCode(Op);
337 /// getSetCCAndOperation - Return the result of a logical AND between different
338 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
339 /// function returns zero if it is not possible to represent the resultant
341 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
343 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
344 // Cannot fold a signed setcc with an unsigned setcc.
345 return ISD::SETCC_INVALID;
347 // Combine all of the condition bits.
348 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
350 // Canonicalize illegal integer setcc's.
354 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
355 case ISD::SETOEQ: // SETEQ & SETU[LG]E
356 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
357 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
358 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
365 //===----------------------------------------------------------------------===//
366 // SDNode Profile Support
367 //===----------------------------------------------------------------------===//
369 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
371 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
375 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
376 /// solely with their pointer.
377 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
378 ID.AddPointer(VTList.VTs);
381 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
383 static void AddNodeIDOperands(FoldingSetNodeID &ID,
384 ArrayRef<SDValue> Ops) {
385 for (auto& Op : Ops) {
386 ID.AddPointer(Op.getNode());
387 ID.AddInteger(Op.getResNo());
391 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
393 static void AddNodeIDOperands(FoldingSetNodeID &ID,
394 ArrayRef<SDUse> Ops) {
395 for (auto& Op : Ops) {
396 ID.AddPointer(Op.getNode());
397 ID.AddInteger(Op.getResNo());
400 /// Add logical or fast math flag values to FoldingSetNodeID value.
401 static void AddNodeIDFlags(FoldingSetNodeID &ID, unsigned Opcode,
402 const SDNodeFlags *Flags) {
403 if (!Flags || !isBinOpWithFlags(Opcode))
406 unsigned RawFlags = Flags->getRawFlags();
407 // If no flags are set, do not alter the ID. We must match the ID of nodes
408 // that were created without explicitly specifying flags. This also saves time
409 // and allows a gradual increase in API usage of the optional optimization
412 ID.AddInteger(RawFlags);
415 static void AddNodeIDFlags(FoldingSetNodeID &ID, const SDNode *N) {
416 if (auto *Node = dyn_cast<BinaryWithFlagsSDNode>(N))
417 AddNodeIDFlags(ID, Node->getOpcode(), &Node->Flags);
420 static void AddNodeIDNode(FoldingSetNodeID &ID, unsigned short OpC,
421 SDVTList VTList, ArrayRef<SDValue> OpList) {
422 AddNodeIDOpcode(ID, OpC);
423 AddNodeIDValueTypes(ID, VTList);
424 AddNodeIDOperands(ID, OpList);
427 /// If this is an SDNode with special info, add this info to the NodeID data.
428 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
429 switch (N->getOpcode()) {
430 case ISD::TargetExternalSymbol:
431 case ISD::ExternalSymbol:
433 llvm_unreachable("Should only be used on nodes with operands");
434 default: break; // Normal nodes don't need extra info.
435 case ISD::TargetConstant:
436 case ISD::Constant: {
437 const ConstantSDNode *C = cast<ConstantSDNode>(N);
438 ID.AddPointer(C->getConstantIntValue());
439 ID.AddBoolean(C->isOpaque());
442 case ISD::TargetConstantFP:
443 case ISD::ConstantFP: {
444 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
447 case ISD::TargetGlobalAddress:
448 case ISD::GlobalAddress:
449 case ISD::TargetGlobalTLSAddress:
450 case ISD::GlobalTLSAddress: {
451 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
452 ID.AddPointer(GA->getGlobal());
453 ID.AddInteger(GA->getOffset());
454 ID.AddInteger(GA->getTargetFlags());
455 ID.AddInteger(GA->getAddressSpace());
458 case ISD::BasicBlock:
459 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
462 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
464 case ISD::RegisterMask:
465 ID.AddPointer(cast<RegisterMaskSDNode>(N)->getRegMask());
468 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
470 case ISD::FrameIndex:
471 case ISD::TargetFrameIndex:
472 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
475 case ISD::TargetJumpTable:
476 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
477 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
479 case ISD::ConstantPool:
480 case ISD::TargetConstantPool: {
481 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
482 ID.AddInteger(CP->getAlignment());
483 ID.AddInteger(CP->getOffset());
484 if (CP->isMachineConstantPoolEntry())
485 CP->getMachineCPVal()->addSelectionDAGCSEId(ID);
487 ID.AddPointer(CP->getConstVal());
488 ID.AddInteger(CP->getTargetFlags());
491 case ISD::TargetIndex: {
492 const TargetIndexSDNode *TI = cast<TargetIndexSDNode>(N);
493 ID.AddInteger(TI->getIndex());
494 ID.AddInteger(TI->getOffset());
495 ID.AddInteger(TI->getTargetFlags());
499 const LoadSDNode *LD = cast<LoadSDNode>(N);
500 ID.AddInteger(LD->getMemoryVT().getRawBits());
501 ID.AddInteger(LD->getRawSubclassData());
502 ID.AddInteger(LD->getPointerInfo().getAddrSpace());
506 const StoreSDNode *ST = cast<StoreSDNode>(N);
507 ID.AddInteger(ST->getMemoryVT().getRawBits());
508 ID.AddInteger(ST->getRawSubclassData());
509 ID.AddInteger(ST->getPointerInfo().getAddrSpace());
512 case ISD::ATOMIC_CMP_SWAP:
513 case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS:
514 case ISD::ATOMIC_SWAP:
515 case ISD::ATOMIC_LOAD_ADD:
516 case ISD::ATOMIC_LOAD_SUB:
517 case ISD::ATOMIC_LOAD_AND:
518 case ISD::ATOMIC_LOAD_OR:
519 case ISD::ATOMIC_LOAD_XOR:
520 case ISD::ATOMIC_LOAD_NAND:
521 case ISD::ATOMIC_LOAD_MIN:
522 case ISD::ATOMIC_LOAD_MAX:
523 case ISD::ATOMIC_LOAD_UMIN:
524 case ISD::ATOMIC_LOAD_UMAX:
525 case ISD::ATOMIC_LOAD:
526 case ISD::ATOMIC_STORE: {
527 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
528 ID.AddInteger(AT->getMemoryVT().getRawBits());
529 ID.AddInteger(AT->getRawSubclassData());
530 ID.AddInteger(AT->getPointerInfo().getAddrSpace());
533 case ISD::PREFETCH: {
534 const MemSDNode *PF = cast<MemSDNode>(N);
535 ID.AddInteger(PF->getPointerInfo().getAddrSpace());
538 case ISD::VECTOR_SHUFFLE: {
539 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
540 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
542 ID.AddInteger(SVN->getMaskElt(i));
545 case ISD::TargetBlockAddress:
546 case ISD::BlockAddress: {
547 const BlockAddressSDNode *BA = cast<BlockAddressSDNode>(N);
548 ID.AddPointer(BA->getBlockAddress());
549 ID.AddInteger(BA->getOffset());
550 ID.AddInteger(BA->getTargetFlags());
553 } // end switch (N->getOpcode())
555 AddNodeIDFlags(ID, N);
557 // Target specific memory nodes could also have address spaces to check.
558 if (N->isTargetMemoryOpcode())
559 ID.AddInteger(cast<MemSDNode>(N)->getPointerInfo().getAddrSpace());
562 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
564 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
565 AddNodeIDOpcode(ID, N->getOpcode());
566 // Add the return value info.
567 AddNodeIDValueTypes(ID, N->getVTList());
568 // Add the operand info.
569 AddNodeIDOperands(ID, N->ops());
571 // Handle SDNode leafs with special info.
572 AddNodeIDCustom(ID, N);
575 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
576 /// the CSE map that carries volatility, temporalness, indexing mode, and
577 /// extension/truncation information.
579 static inline unsigned
580 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile,
581 bool isNonTemporal, bool isInvariant) {
582 assert((ConvType & 3) == ConvType &&
583 "ConvType may not require more than 2 bits!");
584 assert((AM & 7) == AM &&
585 "AM may not require more than 3 bits!");
589 (isNonTemporal << 6) |
593 //===----------------------------------------------------------------------===//
594 // SelectionDAG Class
595 //===----------------------------------------------------------------------===//
597 /// doNotCSE - Return true if CSE should not be performed for this node.
598 static bool doNotCSE(SDNode *N) {
599 if (N->getValueType(0) == MVT::Glue)
600 return true; // Never CSE anything that produces a flag.
602 switch (N->getOpcode()) {
604 case ISD::HANDLENODE:
606 return true; // Never CSE these nodes.
609 // Check that remaining values produced are not flags.
610 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
611 if (N->getValueType(i) == MVT::Glue)
612 return true; // Never CSE anything that produces a flag.
617 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
619 void SelectionDAG::RemoveDeadNodes() {
620 // Create a dummy node (which is not added to allnodes), that adds a reference
621 // to the root node, preventing it from being deleted.
622 HandleSDNode Dummy(getRoot());
624 SmallVector<SDNode*, 128> DeadNodes;
626 // Add all obviously-dead nodes to the DeadNodes worklist.
627 for (SDNode &Node : allnodes())
628 if (Node.use_empty())
629 DeadNodes.push_back(&Node);
631 RemoveDeadNodes(DeadNodes);
633 // If the root changed (e.g. it was a dead load, update the root).
634 setRoot(Dummy.getValue());
637 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
638 /// given list, and any nodes that become unreachable as a result.
639 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes) {
641 // Process the worklist, deleting the nodes and adding their uses to the
643 while (!DeadNodes.empty()) {
644 SDNode *N = DeadNodes.pop_back_val();
646 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
647 DUL->NodeDeleted(N, nullptr);
649 // Take the node out of the appropriate CSE map.
650 RemoveNodeFromCSEMaps(N);
652 // Next, brutally remove the operand list. This is safe to do, as there are
653 // no cycles in the graph.
654 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
656 SDNode *Operand = Use.getNode();
659 // Now that we removed this operand, see if there are no uses of it left.
660 if (Operand->use_empty())
661 DeadNodes.push_back(Operand);
668 void SelectionDAG::RemoveDeadNode(SDNode *N){
669 SmallVector<SDNode*, 16> DeadNodes(1, N);
671 // Create a dummy node that adds a reference to the root node, preventing
672 // it from being deleted. (This matters if the root is an operand of the
674 HandleSDNode Dummy(getRoot());
676 RemoveDeadNodes(DeadNodes);
679 void SelectionDAG::DeleteNode(SDNode *N) {
680 // First take this out of the appropriate CSE map.
681 RemoveNodeFromCSEMaps(N);
683 // Finally, remove uses due to operands of this node, remove from the
684 // AllNodes list, and delete the node.
685 DeleteNodeNotInCSEMaps(N);
688 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
689 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
690 assert(N->use_empty() && "Cannot delete a node that is not dead!");
692 // Drop all of the operands and decrement used node's use counts.
698 void SDDbgInfo::erase(const SDNode *Node) {
699 DbgValMapType::iterator I = DbgValMap.find(Node);
700 if (I == DbgValMap.end())
702 for (auto &Val: I->second)
703 Val->setIsInvalidated();
707 void SelectionDAG::DeallocateNode(SDNode *N) {
708 if (N->OperandsNeedDelete)
709 delete[] N->OperandList;
711 // Set the opcode to DELETED_NODE to help catch bugs when node
712 // memory is reallocated.
713 N->NodeType = ISD::DELETED_NODE;
715 NodeAllocator.Deallocate(AllNodes.remove(N));
717 // If any of the SDDbgValue nodes refer to this SDNode, invalidate
718 // them and forget about that node.
723 /// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid.
724 static void VerifySDNode(SDNode *N) {
725 switch (N->getOpcode()) {
728 case ISD::BUILD_PAIR: {
729 EVT VT = N->getValueType(0);
730 assert(N->getNumValues() == 1 && "Too many results!");
731 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
732 "Wrong return type!");
733 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
734 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
735 "Mismatched operand types!");
736 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
737 "Wrong operand type!");
738 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
739 "Wrong return type size");
742 case ISD::BUILD_VECTOR: {
743 assert(N->getNumValues() == 1 && "Too many results!");
744 assert(N->getValueType(0).isVector() && "Wrong return type!");
745 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
746 "Wrong number of operands!");
747 EVT EltVT = N->getValueType(0).getVectorElementType();
748 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) {
749 assert((I->getValueType() == EltVT ||
750 (EltVT.isInteger() && I->getValueType().isInteger() &&
751 EltVT.bitsLE(I->getValueType()))) &&
752 "Wrong operand type!");
753 assert(I->getValueType() == N->getOperand(0).getValueType() &&
754 "Operands must all have the same type");
762 /// \brief Insert a newly allocated node into the DAG.
764 /// Handles insertion into the all nodes list and CSE map, as well as
765 /// verification and other common operations when a new node is allocated.
766 void SelectionDAG::InsertNode(SDNode *N) {
767 AllNodes.push_back(N);
773 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
774 /// correspond to it. This is useful when we're about to delete or repurpose
775 /// the node. We don't want future request for structurally identical nodes
776 /// to return N anymore.
777 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
779 switch (N->getOpcode()) {
780 case ISD::HANDLENODE: return false; // noop.
782 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
783 "Cond code doesn't exist!");
784 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != nullptr;
785 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = nullptr;
787 case ISD::ExternalSymbol:
788 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
790 case ISD::TargetExternalSymbol: {
791 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
792 Erased = TargetExternalSymbols.erase(
793 std::pair<std::string,unsigned char>(ESN->getSymbol(),
794 ESN->getTargetFlags()));
797 case ISD::MCSymbol: {
798 auto *MCSN = cast<MCSymbolSDNode>(N);
799 Erased = MCSymbols.erase(MCSN->getMCSymbol());
802 case ISD::VALUETYPE: {
803 EVT VT = cast<VTSDNode>(N)->getVT();
804 if (VT.isExtended()) {
805 Erased = ExtendedValueTypeNodes.erase(VT);
807 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != nullptr;
808 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = nullptr;
813 // Remove it from the CSE Map.
814 assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!");
815 assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!");
816 Erased = CSEMap.RemoveNode(N);
820 // Verify that the node was actually in one of the CSE maps, unless it has a
821 // flag result (which cannot be CSE'd) or is one of the special cases that are
822 // not subject to CSE.
823 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue &&
824 !N->isMachineOpcode() && !doNotCSE(N)) {
827 llvm_unreachable("Node is not in map!");
833 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
834 /// maps and modified in place. Add it back to the CSE maps, unless an identical
835 /// node already exists, in which case transfer all its users to the existing
836 /// node. This transfer can potentially trigger recursive merging.
839 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N) {
840 // For node types that aren't CSE'd, just act as if no identical node
843 SDNode *Existing = CSEMap.GetOrInsertNode(N);
845 // If there was already an existing matching node, use ReplaceAllUsesWith
846 // to replace the dead one with the existing one. This can cause
847 // recursive merging of other unrelated nodes down the line.
848 ReplaceAllUsesWith(N, Existing);
850 // N is now dead. Inform the listeners and delete it.
851 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
852 DUL->NodeDeleted(N, Existing);
853 DeleteNodeNotInCSEMaps(N);
858 // If the node doesn't already exist, we updated it. Inform listeners.
859 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
863 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
864 /// were replaced with those specified. If this node is never memoized,
865 /// return null, otherwise return a pointer to the slot it would take. If a
866 /// node already exists with these operands, the slot will be non-null.
867 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
872 SDValue Ops[] = { Op };
874 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops);
875 AddNodeIDCustom(ID, N);
876 SDNode *Node = FindNodeOrInsertPos(ID, N->getDebugLoc(), InsertPos);
880 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
881 /// were replaced with those specified. If this node is never memoized,
882 /// return null, otherwise return a pointer to the slot it would take. If a
883 /// node already exists with these operands, the slot will be non-null.
884 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
885 SDValue Op1, SDValue Op2,
890 SDValue Ops[] = { Op1, Op2 };
892 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops);
893 AddNodeIDCustom(ID, N);
894 SDNode *Node = FindNodeOrInsertPos(ID, N->getDebugLoc(), InsertPos);
899 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
900 /// were replaced with those specified. If this node is never memoized,
901 /// return null, otherwise return a pointer to the slot it would take. If a
902 /// node already exists with these operands, the slot will be non-null.
903 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, ArrayRef<SDValue> Ops,
909 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops);
910 AddNodeIDCustom(ID, N);
911 SDNode *Node = FindNodeOrInsertPos(ID, N->getDebugLoc(), InsertPos);
915 /// getEVTAlignment - Compute the default alignment value for the
918 unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
919 Type *Ty = VT == MVT::iPTR ?
920 PointerType::get(Type::getInt8Ty(*getContext()), 0) :
921 VT.getTypeForEVT(*getContext());
923 return getDataLayout().getABITypeAlignment(Ty);
926 // EntryNode could meaningfully have debug info if we can find it...
927 SelectionDAG::SelectionDAG(const TargetMachine &tm, CodeGenOpt::Level OL)
928 : TM(tm), TSI(nullptr), TLI(nullptr), OptLevel(OL),
929 EntryNode(ISD::EntryToken, 0, DebugLoc(), getVTList(MVT::Other)),
930 Root(getEntryNode()), NewNodesMustHaveLegalTypes(false),
931 UpdateListeners(nullptr) {
932 AllNodes.push_back(&EntryNode);
933 DbgInfo = new SDDbgInfo();
936 void SelectionDAG::init(MachineFunction &mf) {
938 TLI = getSubtarget().getTargetLowering();
939 TSI = getSubtarget().getSelectionDAGInfo();
940 Context = &mf.getFunction()->getContext();
943 SelectionDAG::~SelectionDAG() {
944 assert(!UpdateListeners && "Dangling registered DAGUpdateListeners");
949 void SelectionDAG::allnodes_clear() {
950 assert(&*AllNodes.begin() == &EntryNode);
951 AllNodes.remove(AllNodes.begin());
952 while (!AllNodes.empty())
953 DeallocateNode(AllNodes.begin());
956 BinarySDNode *SelectionDAG::GetBinarySDNode(unsigned Opcode, SDLoc DL,
957 SDVTList VTs, SDValue N1,
959 const SDNodeFlags *Flags) {
960 if (isBinOpWithFlags(Opcode)) {
961 // If no flags were passed in, use a default flags object.
963 if (Flags == nullptr)
966 BinaryWithFlagsSDNode *FN = new (NodeAllocator) BinaryWithFlagsSDNode(
967 Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs, N1, N2, *Flags);
972 BinarySDNode *N = new (NodeAllocator)
973 BinarySDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs, N1, N2);
977 SDNode *SelectionDAG::FindNodeOrInsertPos(const FoldingSetNodeID &ID,
979 SDNode *N = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
981 switch (N->getOpcode()) {
984 case ISD::ConstantFP:
985 llvm_unreachable("Querying for Constant and ConstantFP nodes requires "
986 "debug location. Use another overload.");
992 SDNode *SelectionDAG::FindNodeOrInsertPos(const FoldingSetNodeID &ID,
993 DebugLoc DL, void *&InsertPos) {
994 SDNode *N = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
996 switch (N->getOpcode()) {
997 default: break; // Process only regular (non-target) constant nodes.
999 case ISD::ConstantFP:
1000 // Erase debug location from the node if the node is used at several
1001 // different places to do not propagate one location to all uses as it
1002 // leads to incorrect debug info.
1003 if (N->getDebugLoc() != DL)
1004 N->setDebugLoc(DebugLoc());
1011 void SelectionDAG::clear() {
1013 OperandAllocator.Reset();
1016 ExtendedValueTypeNodes.clear();
1017 ExternalSymbols.clear();
1018 TargetExternalSymbols.clear();
1020 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
1021 static_cast<CondCodeSDNode*>(nullptr));
1022 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
1023 static_cast<SDNode*>(nullptr));
1025 EntryNode.UseList = nullptr;
1026 AllNodes.push_back(&EntryNode);
1027 Root = getEntryNode();
1031 SDValue SelectionDAG::getAnyExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) {
1032 return VT.bitsGT(Op.getValueType()) ?
1033 getNode(ISD::ANY_EXTEND, DL, VT, Op) :
1034 getNode(ISD::TRUNCATE, DL, VT, Op);
1037 SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) {
1038 return VT.bitsGT(Op.getValueType()) ?
1039 getNode(ISD::SIGN_EXTEND, DL, VT, Op) :
1040 getNode(ISD::TRUNCATE, DL, VT, Op);
1043 SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) {
1044 return VT.bitsGT(Op.getValueType()) ?
1045 getNode(ISD::ZERO_EXTEND, DL, VT, Op) :
1046 getNode(ISD::TRUNCATE, DL, VT, Op);
1049 SDValue SelectionDAG::getBoolExtOrTrunc(SDValue Op, SDLoc SL, EVT VT,
1051 if (VT.bitsLE(Op.getValueType()))
1052 return getNode(ISD::TRUNCATE, SL, VT, Op);
1054 TargetLowering::BooleanContent BType = TLI->getBooleanContents(OpVT);
1055 return getNode(TLI->getExtendForContent(BType), SL, VT, Op);
1058 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, SDLoc DL, EVT VT) {
1059 assert(!VT.isVector() &&
1060 "getZeroExtendInReg should use the vector element type instead of "
1061 "the vector type!");
1062 if (Op.getValueType() == VT) return Op;
1063 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1064 APInt Imm = APInt::getLowBitsSet(BitWidth,
1065 VT.getSizeInBits());
1066 return getNode(ISD::AND, DL, Op.getValueType(), Op,
1067 getConstant(Imm, DL, Op.getValueType()));
1070 SDValue SelectionDAG::getAnyExtendVectorInReg(SDValue Op, SDLoc DL, EVT VT) {
1071 assert(VT.isVector() && "This DAG node is restricted to vector types.");
1072 assert(VT.getSizeInBits() == Op.getValueType().getSizeInBits() &&
1073 "The sizes of the input and result must match in order to perform the "
1074 "extend in-register.");
1075 assert(VT.getVectorNumElements() < Op.getValueType().getVectorNumElements() &&
1076 "The destination vector type must have fewer lanes than the input.");
1077 return getNode(ISD::ANY_EXTEND_VECTOR_INREG, DL, VT, Op);
1080 SDValue SelectionDAG::getSignExtendVectorInReg(SDValue Op, SDLoc DL, EVT VT) {
1081 assert(VT.isVector() && "This DAG node is restricted to vector types.");
1082 assert(VT.getSizeInBits() == Op.getValueType().getSizeInBits() &&
1083 "The sizes of the input and result must match in order to perform the "
1084 "extend in-register.");
1085 assert(VT.getVectorNumElements() < Op.getValueType().getVectorNumElements() &&
1086 "The destination vector type must have fewer lanes than the input.");
1087 return getNode(ISD::SIGN_EXTEND_VECTOR_INREG, DL, VT, Op);
1090 SDValue SelectionDAG::getZeroExtendVectorInReg(SDValue Op, SDLoc DL, EVT VT) {
1091 assert(VT.isVector() && "This DAG node is restricted to vector types.");
1092 assert(VT.getSizeInBits() == Op.getValueType().getSizeInBits() &&
1093 "The sizes of the input and result must match in order to perform the "
1094 "extend in-register.");
1095 assert(VT.getVectorNumElements() < Op.getValueType().getVectorNumElements() &&
1096 "The destination vector type must have fewer lanes than the input.");
1097 return getNode(ISD::ZERO_EXTEND_VECTOR_INREG, DL, VT, Op);
1100 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
1102 SDValue SelectionDAG::getNOT(SDLoc DL, SDValue Val, EVT VT) {
1103 EVT EltVT = VT.getScalarType();
1105 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), DL, VT);
1106 return getNode(ISD::XOR, DL, VT, Val, NegOne);
1109 SDValue SelectionDAG::getLogicalNOT(SDLoc DL, SDValue Val, EVT VT) {
1110 EVT EltVT = VT.getScalarType();
1112 switch (TLI->getBooleanContents(VT)) {
1113 case TargetLowering::ZeroOrOneBooleanContent:
1114 case TargetLowering::UndefinedBooleanContent:
1115 TrueValue = getConstant(1, DL, VT);
1117 case TargetLowering::ZeroOrNegativeOneBooleanContent:
1118 TrueValue = getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), DL,
1122 return getNode(ISD::XOR, DL, VT, Val, TrueValue);
1125 SDValue SelectionDAG::getConstant(uint64_t Val, SDLoc DL, EVT VT, bool isT,
1127 EVT EltVT = VT.getScalarType();
1128 assert((EltVT.getSizeInBits() >= 64 ||
1129 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
1130 "getConstant with a uint64_t value that doesn't fit in the type!");
1131 return getConstant(APInt(EltVT.getSizeInBits(), Val), DL, VT, isT, isO);
1134 SDValue SelectionDAG::getConstant(const APInt &Val, SDLoc DL, EVT VT, bool isT,
1137 return getConstant(*ConstantInt::get(*Context, Val), DL, VT, isT, isO);
1140 SDValue SelectionDAG::getConstant(const ConstantInt &Val, SDLoc DL, EVT VT,
1141 bool isT, bool isO) {
1142 assert(VT.isInteger() && "Cannot create FP integer constant!");
1144 EVT EltVT = VT.getScalarType();
1145 const ConstantInt *Elt = &Val;
1147 // In some cases the vector type is legal but the element type is illegal and
1148 // needs to be promoted, for example v8i8 on ARM. In this case, promote the
1149 // inserted value (the type does not need to match the vector element type).
1150 // Any extra bits introduced will be truncated away.
1151 if (VT.isVector() && TLI->getTypeAction(*getContext(), EltVT) ==
1152 TargetLowering::TypePromoteInteger) {
1153 EltVT = TLI->getTypeToTransformTo(*getContext(), EltVT);
1154 APInt NewVal = Elt->getValue().zext(EltVT.getSizeInBits());
1155 Elt = ConstantInt::get(*getContext(), NewVal);
1157 // In other cases the element type is illegal and needs to be expanded, for
1158 // example v2i64 on MIPS32. In this case, find the nearest legal type, split
1159 // the value into n parts and use a vector type with n-times the elements.
1160 // Then bitcast to the type requested.
1161 // Legalizing constants too early makes the DAGCombiner's job harder so we
1162 // only legalize if the DAG tells us we must produce legal types.
1163 else if (NewNodesMustHaveLegalTypes && VT.isVector() &&
1164 TLI->getTypeAction(*getContext(), EltVT) ==
1165 TargetLowering::TypeExpandInteger) {
1166 APInt NewVal = Elt->getValue();
1167 EVT ViaEltVT = TLI->getTypeToTransformTo(*getContext(), EltVT);
1168 unsigned ViaEltSizeInBits = ViaEltVT.getSizeInBits();
1169 unsigned ViaVecNumElts = VT.getSizeInBits() / ViaEltSizeInBits;
1170 EVT ViaVecVT = EVT::getVectorVT(*getContext(), ViaEltVT, ViaVecNumElts);
1172 // Check the temporary vector is the correct size. If this fails then
1173 // getTypeToTransformTo() probably returned a type whose size (in bits)
1174 // isn't a power-of-2 factor of the requested type size.
1175 assert(ViaVecVT.getSizeInBits() == VT.getSizeInBits());
1177 SmallVector<SDValue, 2> EltParts;
1178 for (unsigned i = 0; i < ViaVecNumElts / VT.getVectorNumElements(); ++i) {
1179 EltParts.push_back(getConstant(NewVal.lshr(i * ViaEltSizeInBits)
1180 .trunc(ViaEltSizeInBits), DL,
1181 ViaEltVT, isT, isO));
1184 // EltParts is currently in little endian order. If we actually want
1185 // big-endian order then reverse it now.
1186 if (getDataLayout().isBigEndian())
1187 std::reverse(EltParts.begin(), EltParts.end());
1189 // The elements must be reversed when the element order is different
1190 // to the endianness of the elements (because the BITCAST is itself a
1191 // vector shuffle in this situation). However, we do not need any code to
1192 // perform this reversal because getConstant() is producing a vector
1194 // This situation occurs in MIPS MSA.
1196 SmallVector<SDValue, 8> Ops;
1197 for (unsigned i = 0; i < VT.getVectorNumElements(); ++i)
1198 Ops.insert(Ops.end(), EltParts.begin(), EltParts.end());
1200 SDValue Result = getNode(ISD::BITCAST, SDLoc(), VT,
1201 getNode(ISD::BUILD_VECTOR, SDLoc(), ViaVecVT,
1206 assert(Elt->getBitWidth() == EltVT.getSizeInBits() &&
1207 "APInt size does not match type size!");
1208 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
1209 FoldingSetNodeID ID;
1210 AddNodeIDNode(ID, Opc, getVTList(EltVT), None);
1214 SDNode *N = nullptr;
1215 if ((N = FindNodeOrInsertPos(ID, DL.getDebugLoc(), IP)))
1217 return SDValue(N, 0);
1220 N = new (NodeAllocator) ConstantSDNode(isT, isO, Elt, DL.getDebugLoc(),
1222 CSEMap.InsertNode(N, IP);
1226 SDValue Result(N, 0);
1227 if (VT.isVector()) {
1228 SmallVector<SDValue, 8> Ops;
1229 Ops.assign(VT.getVectorNumElements(), Result);
1230 Result = getNode(ISD::BUILD_VECTOR, SDLoc(), VT, Ops);
1235 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, SDLoc DL, bool isTarget) {
1236 return getConstant(Val, DL, TLI->getPointerTy(getDataLayout()), isTarget);
1239 SDValue SelectionDAG::getConstantFP(const APFloat& V, SDLoc DL, EVT VT,
1241 return getConstantFP(*ConstantFP::get(*getContext(), V), DL, VT, isTarget);
1244 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, SDLoc DL, EVT VT,
1246 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
1248 EVT EltVT = VT.getScalarType();
1250 // Do the map lookup using the actual bit pattern for the floating point
1251 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
1252 // we don't have issues with SNANs.
1253 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
1254 FoldingSetNodeID ID;
1255 AddNodeIDNode(ID, Opc, getVTList(EltVT), None);
1258 SDNode *N = nullptr;
1259 if ((N = FindNodeOrInsertPos(ID, DL.getDebugLoc(), IP)))
1261 return SDValue(N, 0);
1264 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, DL.getDebugLoc(),
1266 CSEMap.InsertNode(N, IP);
1270 SDValue Result(N, 0);
1271 if (VT.isVector()) {
1272 SmallVector<SDValue, 8> Ops;
1273 Ops.assign(VT.getVectorNumElements(), Result);
1274 Result = getNode(ISD::BUILD_VECTOR, SDLoc(), VT, Ops);
1279 SDValue SelectionDAG::getConstantFP(double Val, SDLoc DL, EVT VT,
1281 EVT EltVT = VT.getScalarType();
1282 if (EltVT==MVT::f32)
1283 return getConstantFP(APFloat((float)Val), DL, VT, isTarget);
1284 else if (EltVT==MVT::f64)
1285 return getConstantFP(APFloat(Val), DL, VT, isTarget);
1286 else if (EltVT==MVT::f80 || EltVT==MVT::f128 || EltVT==MVT::ppcf128 ||
1289 APFloat apf = APFloat(Val);
1290 apf.convert(EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven,
1292 return getConstantFP(apf, DL, VT, isTarget);
1294 llvm_unreachable("Unsupported type in getConstantFP");
1297 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, SDLoc DL,
1298 EVT VT, int64_t Offset,
1300 unsigned char TargetFlags) {
1301 assert((TargetFlags == 0 || isTargetGA) &&
1302 "Cannot set target flags on target-independent globals");
1304 // Truncate (with sign-extension) the offset value to the pointer size.
1305 unsigned BitWidth = getDataLayout().getPointerTypeSizeInBits(GV->getType());
1307 Offset = SignExtend64(Offset, BitWidth);
1310 if (GV->isThreadLocal())
1311 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
1313 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
1315 FoldingSetNodeID ID;
1316 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1318 ID.AddInteger(Offset);
1319 ID.AddInteger(TargetFlags);
1320 ID.AddInteger(GV->getType()->getAddressSpace());
1322 if (SDNode *E = FindNodeOrInsertPos(ID, DL.getDebugLoc(), IP))
1323 return SDValue(E, 0);
1325 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL.getIROrder(),
1326 DL.getDebugLoc(), GV, VT,
1327 Offset, TargetFlags);
1328 CSEMap.InsertNode(N, IP);
1330 return SDValue(N, 0);
1333 SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
1334 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1335 FoldingSetNodeID ID;
1336 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1339 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1340 return SDValue(E, 0);
1342 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget);
1343 CSEMap.InsertNode(N, IP);
1345 return SDValue(N, 0);
1348 SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
1349 unsigned char TargetFlags) {
1350 assert((TargetFlags == 0 || isTarget) &&
1351 "Cannot set target flags on target-independent jump tables");
1352 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1353 FoldingSetNodeID ID;
1354 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1356 ID.AddInteger(TargetFlags);
1358 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1359 return SDValue(E, 0);
1361 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget,
1363 CSEMap.InsertNode(N, IP);
1365 return SDValue(N, 0);
1368 SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT,
1369 unsigned Alignment, int Offset,
1371 unsigned char TargetFlags) {
1372 assert((TargetFlags == 0 || isTarget) &&
1373 "Cannot set target flags on target-independent globals");
1375 Alignment = getDataLayout().getPrefTypeAlignment(C->getType());
1376 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1377 FoldingSetNodeID ID;
1378 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1379 ID.AddInteger(Alignment);
1380 ID.AddInteger(Offset);
1382 ID.AddInteger(TargetFlags);
1384 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1385 return SDValue(E, 0);
1387 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1388 Alignment, TargetFlags);
1389 CSEMap.InsertNode(N, IP);
1391 return SDValue(N, 0);
1395 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
1396 unsigned Alignment, int Offset,
1398 unsigned char TargetFlags) {
1399 assert((TargetFlags == 0 || isTarget) &&
1400 "Cannot set target flags on target-independent globals");
1402 Alignment = getDataLayout().getPrefTypeAlignment(C->getType());
1403 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1404 FoldingSetNodeID ID;
1405 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1406 ID.AddInteger(Alignment);
1407 ID.AddInteger(Offset);
1408 C->addSelectionDAGCSEId(ID);
1409 ID.AddInteger(TargetFlags);
1411 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1412 return SDValue(E, 0);
1414 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1415 Alignment, TargetFlags);
1416 CSEMap.InsertNode(N, IP);
1418 return SDValue(N, 0);
1421 SDValue SelectionDAG::getTargetIndex(int Index, EVT VT, int64_t Offset,
1422 unsigned char TargetFlags) {
1423 FoldingSetNodeID ID;
1424 AddNodeIDNode(ID, ISD::TargetIndex, getVTList(VT), None);
1425 ID.AddInteger(Index);
1426 ID.AddInteger(Offset);
1427 ID.AddInteger(TargetFlags);
1429 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1430 return SDValue(E, 0);
1432 SDNode *N = new (NodeAllocator) TargetIndexSDNode(Index, VT, Offset,
1434 CSEMap.InsertNode(N, IP);
1436 return SDValue(N, 0);
1439 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1440 FoldingSetNodeID ID;
1441 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), None);
1444 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1445 return SDValue(E, 0);
1447 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB);
1448 CSEMap.InsertNode(N, IP);
1450 return SDValue(N, 0);
1453 SDValue SelectionDAG::getValueType(EVT VT) {
1454 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
1455 ValueTypeNodes.size())
1456 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
1458 SDNode *&N = VT.isExtended() ?
1459 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
1461 if (N) return SDValue(N, 0);
1462 N = new (NodeAllocator) VTSDNode(VT);
1464 return SDValue(N, 0);
1467 SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
1468 SDNode *&N = ExternalSymbols[Sym];
1469 if (N) return SDValue(N, 0);
1470 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT);
1472 return SDValue(N, 0);
1475 SDValue SelectionDAG::getMCSymbol(MCSymbol *Sym, EVT VT) {
1476 SDNode *&N = MCSymbols[Sym];
1478 return SDValue(N, 0);
1479 N = new (NodeAllocator) MCSymbolSDNode(Sym, VT);
1481 return SDValue(N, 0);
1484 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
1485 unsigned char TargetFlags) {
1487 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1489 if (N) return SDValue(N, 0);
1490 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1492 return SDValue(N, 0);
1495 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1496 if ((unsigned)Cond >= CondCodeNodes.size())
1497 CondCodeNodes.resize(Cond+1);
1499 if (!CondCodeNodes[Cond]) {
1500 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond);
1501 CondCodeNodes[Cond] = N;
1505 return SDValue(CondCodeNodes[Cond], 0);
1508 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1509 // the shuffle mask M that point at N1 to point at N2, and indices that point
1510 // N2 to point at N1.
1511 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1513 ShuffleVectorSDNode::commuteMask(M);
1516 SDValue SelectionDAG::getVectorShuffle(EVT VT, SDLoc dl, SDValue N1,
1517 SDValue N2, const int *Mask) {
1518 assert(VT == N1.getValueType() && VT == N2.getValueType() &&
1519 "Invalid VECTOR_SHUFFLE");
1521 // Canonicalize shuffle undef, undef -> undef
1522 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1523 return getUNDEF(VT);
1525 // Validate that all indices in Mask are within the range of the elements
1526 // input to the shuffle.
1527 unsigned NElts = VT.getVectorNumElements();
1528 SmallVector<int, 8> MaskVec;
1529 for (unsigned i = 0; i != NElts; ++i) {
1530 assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1531 MaskVec.push_back(Mask[i]);
1534 // Canonicalize shuffle v, v -> v, undef
1537 for (unsigned i = 0; i != NElts; ++i)
1538 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1541 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1542 if (N1.getOpcode() == ISD::UNDEF)
1543 commuteShuffle(N1, N2, MaskVec);
1545 // If shuffling a splat, try to blend the splat instead. We do this here so
1546 // that even when this arises during lowering we don't have to re-handle it.
1547 auto BlendSplat = [&](BuildVectorSDNode *BV, int Offset) {
1548 BitVector UndefElements;
1549 SDValue Splat = BV->getSplatValue(&UndefElements);
1553 for (int i = 0; i < (int)NElts; ++i) {
1554 if (MaskVec[i] < Offset || MaskVec[i] >= (Offset + (int)NElts))
1557 // If this input comes from undef, mark it as such.
1558 if (UndefElements[MaskVec[i] - Offset]) {
1563 // If we can blend a non-undef lane, use that instead.
1564 if (!UndefElements[i])
1565 MaskVec[i] = i + Offset;
1568 if (auto *N1BV = dyn_cast<BuildVectorSDNode>(N1))
1569 BlendSplat(N1BV, 0);
1570 if (auto *N2BV = dyn_cast<BuildVectorSDNode>(N2))
1571 BlendSplat(N2BV, NElts);
1573 // Canonicalize all index into lhs, -> shuffle lhs, undef
1574 // Canonicalize all index into rhs, -> shuffle rhs, undef
1575 bool AllLHS = true, AllRHS = true;
1576 bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1577 for (unsigned i = 0; i != NElts; ++i) {
1578 if (MaskVec[i] >= (int)NElts) {
1583 } else if (MaskVec[i] >= 0) {
1587 if (AllLHS && AllRHS)
1588 return getUNDEF(VT);
1589 if (AllLHS && !N2Undef)
1593 commuteShuffle(N1, N2, MaskVec);
1595 // Reset our undef status after accounting for the mask.
1596 N2Undef = N2.getOpcode() == ISD::UNDEF;
1597 // Re-check whether both sides ended up undef.
1598 if (N1.getOpcode() == ISD::UNDEF && N2Undef)
1599 return getUNDEF(VT);
1601 // If Identity shuffle return that node.
1602 bool Identity = true, AllSame = true;
1603 for (unsigned i = 0; i != NElts; ++i) {
1604 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1605 if (MaskVec[i] != MaskVec[0]) AllSame = false;
1607 if (Identity && NElts)
1610 // Shuffling a constant splat doesn't change the result.
1614 // Look through any bitcasts. We check that these don't change the number
1615 // (and size) of elements and just changes their types.
1616 while (V.getOpcode() == ISD::BITCAST)
1617 V = V->getOperand(0);
1619 // A splat should always show up as a build vector node.
1620 if (auto *BV = dyn_cast<BuildVectorSDNode>(V)) {
1621 BitVector UndefElements;
1622 SDValue Splat = BV->getSplatValue(&UndefElements);
1623 // If this is a splat of an undef, shuffling it is also undef.
1624 if (Splat && Splat.getOpcode() == ISD::UNDEF)
1625 return getUNDEF(VT);
1628 V.getValueType().getVectorNumElements() == VT.getVectorNumElements();
1630 // We only have a splat which can skip shuffles if there is a splatted
1631 // value and no undef lanes rearranged by the shuffle.
1632 if (Splat && UndefElements.none()) {
1633 // Splat of <x, x, ..., x>, return <x, x, ..., x>, provided that the
1634 // number of elements match or the value splatted is a zero constant.
1637 if (auto *C = dyn_cast<ConstantSDNode>(Splat))
1638 if (C->isNullValue())
1642 // If the shuffle itself creates a splat, build the vector directly.
1643 if (AllSame && SameNumElts) {
1644 const SDValue &Splatted = BV->getOperand(MaskVec[0]);
1645 SmallVector<SDValue, 8> Ops(NElts, Splatted);
1647 EVT BuildVT = BV->getValueType(0);
1648 SDValue NewBV = getNode(ISD::BUILD_VECTOR, dl, BuildVT, Ops);
1650 // We may have jumped through bitcasts, so the type of the
1651 // BUILD_VECTOR may not match the type of the shuffle.
1653 NewBV = getNode(ISD::BITCAST, dl, VT, NewBV);
1659 FoldingSetNodeID ID;
1660 SDValue Ops[2] = { N1, N2 };
1661 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops);
1662 for (unsigned i = 0; i != NElts; ++i)
1663 ID.AddInteger(MaskVec[i]);
1666 if (SDNode *E = FindNodeOrInsertPos(ID, dl.getDebugLoc(), IP))
1667 return SDValue(E, 0);
1669 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1670 // SDNode doesn't have access to it. This memory will be "leaked" when
1671 // the node is deallocated, but recovered when the NodeAllocator is released.
1672 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1673 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1675 ShuffleVectorSDNode *N =
1676 new (NodeAllocator) ShuffleVectorSDNode(VT, dl.getIROrder(),
1677 dl.getDebugLoc(), N1, N2,
1679 CSEMap.InsertNode(N, IP);
1681 return SDValue(N, 0);
1684 SDValue SelectionDAG::getCommutedVectorShuffle(const ShuffleVectorSDNode &SV) {
1685 MVT VT = SV.getSimpleValueType(0);
1686 SmallVector<int, 8> MaskVec(SV.getMask().begin(), SV.getMask().end());
1687 ShuffleVectorSDNode::commuteMask(MaskVec);
1689 SDValue Op0 = SV.getOperand(0);
1690 SDValue Op1 = SV.getOperand(1);
1691 return getVectorShuffle(VT, SDLoc(&SV), Op1, Op0, &MaskVec[0]);
1694 SDValue SelectionDAG::getConvertRndSat(EVT VT, SDLoc dl,
1695 SDValue Val, SDValue DTy,
1696 SDValue STy, SDValue Rnd, SDValue Sat,
1697 ISD::CvtCode Code) {
1698 // If the src and dest types are the same and the conversion is between
1699 // integer types of the same sign or two floats, no conversion is necessary.
1701 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1704 FoldingSetNodeID ID;
1705 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1706 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), Ops);
1708 if (SDNode *E = FindNodeOrInsertPos(ID, dl.getDebugLoc(), IP))
1709 return SDValue(E, 0);
1711 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl.getIROrder(),
1714 CSEMap.InsertNode(N, IP);
1716 return SDValue(N, 0);
1719 SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
1720 FoldingSetNodeID ID;
1721 AddNodeIDNode(ID, ISD::Register, getVTList(VT), None);
1722 ID.AddInteger(RegNo);
1724 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1725 return SDValue(E, 0);
1727 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT);
1728 CSEMap.InsertNode(N, IP);
1730 return SDValue(N, 0);
1733 SDValue SelectionDAG::getRegisterMask(const uint32_t *RegMask) {
1734 FoldingSetNodeID ID;
1735 AddNodeIDNode(ID, ISD::RegisterMask, getVTList(MVT::Untyped), None);
1736 ID.AddPointer(RegMask);
1738 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1739 return SDValue(E, 0);
1741 SDNode *N = new (NodeAllocator) RegisterMaskSDNode(RegMask);
1742 CSEMap.InsertNode(N, IP);
1744 return SDValue(N, 0);
1747 SDValue SelectionDAG::getEHLabel(SDLoc dl, SDValue Root, MCSymbol *Label) {
1748 FoldingSetNodeID ID;
1749 SDValue Ops[] = { Root };
1750 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), Ops);
1751 ID.AddPointer(Label);
1753 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1754 return SDValue(E, 0);
1756 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl.getIROrder(),
1757 dl.getDebugLoc(), Root, Label);
1758 CSEMap.InsertNode(N, IP);
1760 return SDValue(N, 0);
1764 SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT,
1767 unsigned char TargetFlags) {
1768 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress;
1770 FoldingSetNodeID ID;
1771 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1773 ID.AddInteger(Offset);
1774 ID.AddInteger(TargetFlags);
1776 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1777 return SDValue(E, 0);
1779 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, Offset,
1781 CSEMap.InsertNode(N, IP);
1783 return SDValue(N, 0);
1786 SDValue SelectionDAG::getSrcValue(const Value *V) {
1787 assert((!V || V->getType()->isPointerTy()) &&
1788 "SrcValue is not a pointer?");
1790 FoldingSetNodeID ID;
1791 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), None);
1795 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1796 return SDValue(E, 0);
1798 SDNode *N = new (NodeAllocator) SrcValueSDNode(V);
1799 CSEMap.InsertNode(N, IP);
1801 return SDValue(N, 0);
1804 /// getMDNode - Return an MDNodeSDNode which holds an MDNode.
1805 SDValue SelectionDAG::getMDNode(const MDNode *MD) {
1806 FoldingSetNodeID ID;
1807 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), None);
1811 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1812 return SDValue(E, 0);
1814 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD);
1815 CSEMap.InsertNode(N, IP);
1817 return SDValue(N, 0);
1820 SDValue SelectionDAG::getBitcast(EVT VT, SDValue V) {
1821 if (VT == V.getValueType())
1824 return getNode(ISD::BITCAST, SDLoc(V), VT, V);
1827 /// getAddrSpaceCast - Return an AddrSpaceCastSDNode.
1828 SDValue SelectionDAG::getAddrSpaceCast(SDLoc dl, EVT VT, SDValue Ptr,
1829 unsigned SrcAS, unsigned DestAS) {
1830 SDValue Ops[] = {Ptr};
1831 FoldingSetNodeID ID;
1832 AddNodeIDNode(ID, ISD::ADDRSPACECAST, getVTList(VT), Ops);
1833 ID.AddInteger(SrcAS);
1834 ID.AddInteger(DestAS);
1837 if (SDNode *E = FindNodeOrInsertPos(ID, dl.getDebugLoc(), IP))
1838 return SDValue(E, 0);
1840 SDNode *N = new (NodeAllocator) AddrSpaceCastSDNode(dl.getIROrder(),
1842 VT, Ptr, SrcAS, DestAS);
1843 CSEMap.InsertNode(N, IP);
1845 return SDValue(N, 0);
1848 /// getShiftAmountOperand - Return the specified value casted to
1849 /// the target's desired shift amount type.
1850 SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) {
1851 EVT OpTy = Op.getValueType();
1852 EVT ShTy = TLI->getShiftAmountTy(LHSTy, getDataLayout());
1853 if (OpTy == ShTy || OpTy.isVector()) return Op;
1855 return getZExtOrTrunc(Op, SDLoc(Op), ShTy);
1858 SDValue SelectionDAG::expandVAArg(SDNode *Node) {
1860 const TargetLowering &TLI = getTargetLoweringInfo();
1861 const Value *V = cast<SrcValueSDNode>(Node->getOperand(2))->getValue();
1862 EVT VT = Node->getValueType(0);
1863 SDValue Tmp1 = Node->getOperand(0);
1864 SDValue Tmp2 = Node->getOperand(1);
1865 unsigned Align = Node->getConstantOperandVal(3);
1867 SDValue VAListLoad =
1868 getLoad(TLI.getPointerTy(getDataLayout()), dl, Tmp1, Tmp2,
1869 MachinePointerInfo(V), false, false, false, 0);
1870 SDValue VAList = VAListLoad;
1872 if (Align > TLI.getMinStackArgumentAlignment()) {
1873 assert(((Align & (Align-1)) == 0) && "Expected Align to be a power of 2");
1875 VAList = getNode(ISD::ADD, dl, VAList.getValueType(), VAList,
1876 getConstant(Align - 1, dl, VAList.getValueType()));
1878 VAList = getNode(ISD::AND, dl, VAList.getValueType(), VAList,
1879 getConstant(-(int64_t)Align, dl, VAList.getValueType()));
1882 // Increment the pointer, VAList, to the next vaarg
1883 Tmp1 = getNode(ISD::ADD, dl, VAList.getValueType(), VAList,
1884 getConstant(getDataLayout().getTypeAllocSize(
1885 VT.getTypeForEVT(*getContext())),
1886 dl, VAList.getValueType()));
1887 // Store the incremented VAList to the legalized pointer
1888 Tmp1 = getStore(VAListLoad.getValue(1), dl, Tmp1, Tmp2,
1889 MachinePointerInfo(V), false, false, 0);
1890 // Load the actual argument out of the pointer VAList
1891 return getLoad(VT, dl, Tmp1, VAList, MachinePointerInfo(),
1892 false, false, false, 0);
1895 SDValue SelectionDAG::expandVACopy(SDNode *Node) {
1897 const TargetLowering &TLI = getTargetLoweringInfo();
1898 // This defaults to loading a pointer from the input and storing it to the
1899 // output, returning the chain.
1900 const Value *VD = cast<SrcValueSDNode>(Node->getOperand(3))->getValue();
1901 const Value *VS = cast<SrcValueSDNode>(Node->getOperand(4))->getValue();
1902 SDValue Tmp1 = getLoad(TLI.getPointerTy(getDataLayout()), dl,
1903 Node->getOperand(0), Node->getOperand(2),
1904 MachinePointerInfo(VS), false, false, false, 0);
1905 return getStore(Tmp1.getValue(1), dl, Tmp1, Node->getOperand(1),
1906 MachinePointerInfo(VD), false, false, 0);
1909 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1910 /// specified value type.
1911 SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
1912 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1913 unsigned ByteSize = VT.getStoreSize();
1914 Type *Ty = VT.getTypeForEVT(*getContext());
1915 unsigned StackAlign =
1916 std::max((unsigned)getDataLayout().getPrefTypeAlignment(Ty), minAlign);
1918 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false);
1919 return getFrameIndex(FrameIdx, TLI->getPointerTy(getDataLayout()));
1922 /// CreateStackTemporary - Create a stack temporary suitable for holding
1923 /// either of the specified value types.
1924 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
1925 unsigned Bytes = std::max(VT1.getStoreSize(), VT2.getStoreSize());
1926 Type *Ty1 = VT1.getTypeForEVT(*getContext());
1927 Type *Ty2 = VT2.getTypeForEVT(*getContext());
1928 const DataLayout &DL = getDataLayout();
1930 std::max(DL.getPrefTypeAlignment(Ty1), DL.getPrefTypeAlignment(Ty2));
1932 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1933 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false);
1934 return getFrameIndex(FrameIdx, TLI->getPointerTy(getDataLayout()));
1937 SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
1938 SDValue N2, ISD::CondCode Cond, SDLoc dl) {
1939 // These setcc operations always fold.
1943 case ISD::SETFALSE2: return getConstant(0, dl, VT);
1945 case ISD::SETTRUE2: {
1946 TargetLowering::BooleanContent Cnt =
1947 TLI->getBooleanContents(N1->getValueType(0));
1949 Cnt == TargetLowering::ZeroOrNegativeOneBooleanContent ? -1ULL : 1, dl,
1963 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1967 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2)) {
1968 const APInt &C2 = N2C->getAPIntValue();
1969 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1)) {
1970 const APInt &C1 = N1C->getAPIntValue();
1973 default: llvm_unreachable("Unknown integer setcc!");
1974 case ISD::SETEQ: return getConstant(C1 == C2, dl, VT);
1975 case ISD::SETNE: return getConstant(C1 != C2, dl, VT);
1976 case ISD::SETULT: return getConstant(C1.ult(C2), dl, VT);
1977 case ISD::SETUGT: return getConstant(C1.ugt(C2), dl, VT);
1978 case ISD::SETULE: return getConstant(C1.ule(C2), dl, VT);
1979 case ISD::SETUGE: return getConstant(C1.uge(C2), dl, VT);
1980 case ISD::SETLT: return getConstant(C1.slt(C2), dl, VT);
1981 case ISD::SETGT: return getConstant(C1.sgt(C2), dl, VT);
1982 case ISD::SETLE: return getConstant(C1.sle(C2), dl, VT);
1983 case ISD::SETGE: return getConstant(C1.sge(C2), dl, VT);
1987 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1)) {
1988 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2)) {
1989 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1992 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1993 return getUNDEF(VT);
1995 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, dl, VT);
1996 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1997 return getUNDEF(VT);
1999 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
2000 R==APFloat::cmpLessThan, dl, VT);
2001 case ISD::SETLT: if (R==APFloat::cmpUnordered)
2002 return getUNDEF(VT);
2004 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, dl, VT);
2005 case ISD::SETGT: if (R==APFloat::cmpUnordered)
2006 return getUNDEF(VT);
2008 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, dl, VT);
2009 case ISD::SETLE: if (R==APFloat::cmpUnordered)
2010 return getUNDEF(VT);
2012 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
2013 R==APFloat::cmpEqual, dl, VT);
2014 case ISD::SETGE: if (R==APFloat::cmpUnordered)
2015 return getUNDEF(VT);
2017 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
2018 R==APFloat::cmpEqual, dl, VT);
2019 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, dl, VT);
2020 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, dl, VT);
2021 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
2022 R==APFloat::cmpEqual, dl, VT);
2023 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, dl, VT);
2024 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
2025 R==APFloat::cmpLessThan, dl, VT);
2026 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
2027 R==APFloat::cmpUnordered, dl, VT);
2028 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, dl, VT);
2029 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, dl, VT);
2032 // Ensure that the constant occurs on the RHS.
2033 ISD::CondCode SwappedCond = ISD::getSetCCSwappedOperands(Cond);
2034 MVT CompVT = N1.getValueType().getSimpleVT();
2035 if (!TLI->isCondCodeLegal(SwappedCond, CompVT))
2038 return getSetCC(dl, VT, N2, N1, SwappedCond);
2042 // Could not fold it.
2046 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
2047 /// use this predicate to simplify operations downstream.
2048 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
2049 // This predicate is not safe for vector operations.
2050 if (Op.getValueType().isVector())
2053 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
2054 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
2057 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
2058 /// this predicate to simplify operations downstream. Mask is known to be zero
2059 /// for bits that V cannot have.
2060 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
2061 unsigned Depth) const {
2062 APInt KnownZero, KnownOne;
2063 computeKnownBits(Op, KnownZero, KnownOne, Depth);
2064 return (KnownZero & Mask) == Mask;
2067 /// Determine which bits of Op are known to be either zero or one and return
2068 /// them in the KnownZero/KnownOne bitsets.
2069 void SelectionDAG::computeKnownBits(SDValue Op, APInt &KnownZero,
2070 APInt &KnownOne, unsigned Depth) const {
2071 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
2073 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
2075 return; // Limit search depth.
2077 APInt KnownZero2, KnownOne2;
2079 switch (Op.getOpcode()) {
2081 // We know all of the bits for a constant!
2082 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue();
2083 KnownZero = ~KnownOne;
2086 // If either the LHS or the RHS are Zero, the result is zero.
2087 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
2088 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2090 // Output known-1 bits are only known if set in both the LHS & RHS.
2091 KnownOne &= KnownOne2;
2092 // Output known-0 are known to be clear if zero in either the LHS | RHS.
2093 KnownZero |= KnownZero2;
2096 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
2097 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2099 // Output known-0 bits are only known if clear in both the LHS & RHS.
2100 KnownZero &= KnownZero2;
2101 // Output known-1 are known to be set if set in either the LHS | RHS.
2102 KnownOne |= KnownOne2;
2105 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
2106 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2108 // Output known-0 bits are known if clear or set in both the LHS & RHS.
2109 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
2110 // Output known-1 are known to be set if set in only one of the LHS, RHS.
2111 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
2112 KnownZero = KnownZeroOut;
2116 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
2117 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2119 // If low bits are zero in either operand, output low known-0 bits.
2120 // Also compute a conserative estimate for high known-0 bits.
2121 // More trickiness is possible, but this is sufficient for the
2122 // interesting case of alignment computation.
2123 KnownOne.clearAllBits();
2124 unsigned TrailZ = KnownZero.countTrailingOnes() +
2125 KnownZero2.countTrailingOnes();
2126 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
2127 KnownZero2.countLeadingOnes(),
2128 BitWidth) - BitWidth;
2130 TrailZ = std::min(TrailZ, BitWidth);
2131 LeadZ = std::min(LeadZ, BitWidth);
2132 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
2133 APInt::getHighBitsSet(BitWidth, LeadZ);
2137 // For the purposes of computing leading zeros we can conservatively
2138 // treat a udiv as a logical right shift by the power of 2 known to
2139 // be less than the denominator.
2140 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2141 unsigned LeadZ = KnownZero2.countLeadingOnes();
2143 KnownOne2.clearAllBits();
2144 KnownZero2.clearAllBits();
2145 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2146 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
2147 if (RHSUnknownLeadingOnes != BitWidth)
2148 LeadZ = std::min(BitWidth,
2149 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
2151 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ);
2155 computeKnownBits(Op.getOperand(2), KnownZero, KnownOne, Depth+1);
2156 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2158 // Only known if known in both the LHS and RHS.
2159 KnownOne &= KnownOne2;
2160 KnownZero &= KnownZero2;
2162 case ISD::SELECT_CC:
2163 computeKnownBits(Op.getOperand(3), KnownZero, KnownOne, Depth+1);
2164 computeKnownBits(Op.getOperand(2), KnownZero2, KnownOne2, Depth+1);
2166 // Only known if known in both the LHS and RHS.
2167 KnownOne &= KnownOne2;
2168 KnownZero &= KnownZero2;
2176 if (Op.getResNo() != 1)
2178 // The boolean result conforms to getBooleanContents.
2179 // If we know the result of a setcc has the top bits zero, use this info.
2180 // We know that we have an integer-based boolean since these operations
2181 // are only available for integer.
2182 if (TLI->getBooleanContents(Op.getValueType().isVector(), false) ==
2183 TargetLowering::ZeroOrOneBooleanContent &&
2185 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
2188 // If we know the result of a setcc has the top bits zero, use this info.
2189 if (TLI->getBooleanContents(Op.getOperand(0).getValueType()) ==
2190 TargetLowering::ZeroOrOneBooleanContent &&
2192 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
2195 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
2196 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2197 unsigned ShAmt = SA->getZExtValue();
2199 // If the shift count is an invalid immediate, don't do anything.
2200 if (ShAmt >= BitWidth)
2203 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2204 KnownZero <<= ShAmt;
2206 // low bits known zero.
2207 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
2211 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
2212 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2213 unsigned ShAmt = SA->getZExtValue();
2215 // If the shift count is an invalid immediate, don't do anything.
2216 if (ShAmt >= BitWidth)
2219 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2220 KnownZero = KnownZero.lshr(ShAmt);
2221 KnownOne = KnownOne.lshr(ShAmt);
2223 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
2224 KnownZero |= HighBits; // High bits known zero.
2228 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2229 unsigned ShAmt = SA->getZExtValue();
2231 // If the shift count is an invalid immediate, don't do anything.
2232 if (ShAmt >= BitWidth)
2235 // If any of the demanded bits are produced by the sign extension, we also
2236 // demand the input sign bit.
2237 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
2239 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2240 KnownZero = KnownZero.lshr(ShAmt);
2241 KnownOne = KnownOne.lshr(ShAmt);
2243 // Handle the sign bits.
2244 APInt SignBit = APInt::getSignBit(BitWidth);
2245 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
2247 if (KnownZero.intersects(SignBit)) {
2248 KnownZero |= HighBits; // New bits are known zero.
2249 } else if (KnownOne.intersects(SignBit)) {
2250 KnownOne |= HighBits; // New bits are known one.
2254 case ISD::SIGN_EXTEND_INREG: {
2255 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
2256 unsigned EBits = EVT.getScalarType().getSizeInBits();
2258 // Sign extension. Compute the demanded bits in the result that are not
2259 // present in the input.
2260 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits);
2262 APInt InSignBit = APInt::getSignBit(EBits);
2263 APInt InputDemandedBits = APInt::getLowBitsSet(BitWidth, EBits);
2265 // If the sign extended bits are demanded, we know that the sign
2267 InSignBit = InSignBit.zext(BitWidth);
2268 if (NewBits.getBoolValue())
2269 InputDemandedBits |= InSignBit;
2271 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2272 KnownOne &= InputDemandedBits;
2273 KnownZero &= InputDemandedBits;
2275 // If the sign bit of the input is known set or clear, then we know the
2276 // top bits of the result.
2277 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
2278 KnownZero |= NewBits;
2279 KnownOne &= ~NewBits;
2280 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
2281 KnownOne |= NewBits;
2282 KnownZero &= ~NewBits;
2283 } else { // Input sign bit unknown
2284 KnownZero &= ~NewBits;
2285 KnownOne &= ~NewBits;
2290 case ISD::CTTZ_ZERO_UNDEF:
2292 case ISD::CTLZ_ZERO_UNDEF:
2294 unsigned LowBits = Log2_32(BitWidth)+1;
2295 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
2296 KnownOne.clearAllBits();
2300 LoadSDNode *LD = cast<LoadSDNode>(Op);
2301 // If this is a ZEXTLoad and we are looking at the loaded value.
2302 if (ISD::isZEXTLoad(Op.getNode()) && Op.getResNo() == 0) {
2303 EVT VT = LD->getMemoryVT();
2304 unsigned MemBits = VT.getScalarType().getSizeInBits();
2305 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits);
2306 } else if (const MDNode *Ranges = LD->getRanges()) {
2307 computeKnownBitsFromRangeMetadata(*Ranges, KnownZero);
2311 case ISD::ZERO_EXTEND: {
2312 EVT InVT = Op.getOperand(0).getValueType();
2313 unsigned InBits = InVT.getScalarType().getSizeInBits();
2314 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
2315 KnownZero = KnownZero.trunc(InBits);
2316 KnownOne = KnownOne.trunc(InBits);
2317 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2318 KnownZero = KnownZero.zext(BitWidth);
2319 KnownOne = KnownOne.zext(BitWidth);
2320 KnownZero |= NewBits;
2323 case ISD::SIGN_EXTEND: {
2324 EVT InVT = Op.getOperand(0).getValueType();
2325 unsigned InBits = InVT.getScalarType().getSizeInBits();
2326 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
2328 KnownZero = KnownZero.trunc(InBits);
2329 KnownOne = KnownOne.trunc(InBits);
2330 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2332 // Note if the sign bit is known to be zero or one.
2333 bool SignBitKnownZero = KnownZero.isNegative();
2334 bool SignBitKnownOne = KnownOne.isNegative();
2336 KnownZero = KnownZero.zext(BitWidth);
2337 KnownOne = KnownOne.zext(BitWidth);
2339 // If the sign bit is known zero or one, the top bits match.
2340 if (SignBitKnownZero)
2341 KnownZero |= NewBits;
2342 else if (SignBitKnownOne)
2343 KnownOne |= NewBits;
2346 case ISD::ANY_EXTEND: {
2347 EVT InVT = Op.getOperand(0).getValueType();
2348 unsigned InBits = InVT.getScalarType().getSizeInBits();
2349 KnownZero = KnownZero.trunc(InBits);
2350 KnownOne = KnownOne.trunc(InBits);
2351 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2352 KnownZero = KnownZero.zext(BitWidth);
2353 KnownOne = KnownOne.zext(BitWidth);
2356 case ISD::TRUNCATE: {
2357 EVT InVT = Op.getOperand(0).getValueType();
2358 unsigned InBits = InVT.getScalarType().getSizeInBits();
2359 KnownZero = KnownZero.zext(InBits);
2360 KnownOne = KnownOne.zext(InBits);
2361 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2362 KnownZero = KnownZero.trunc(BitWidth);
2363 KnownOne = KnownOne.trunc(BitWidth);
2366 case ISD::AssertZext: {
2367 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
2368 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
2369 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2370 KnownZero |= (~InMask);
2371 KnownOne &= (~KnownZero);
2375 // All bits are zero except the low bit.
2376 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
2380 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
2381 // We know that the top bits of C-X are clear if X contains less bits
2382 // than C (i.e. no wrap-around can happen). For example, 20-X is
2383 // positive if we can prove that X is >= 0 and < 16.
2384 if (CLHS->getAPIntValue().isNonNegative()) {
2385 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
2386 // NLZ can't be BitWidth with no sign bit
2387 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
2388 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2390 // If all of the MaskV bits are known to be zero, then we know the
2391 // output top bits are zero, because we now know that the output is
2393 if ((KnownZero2 & MaskV) == MaskV) {
2394 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
2395 // Top bits known zero.
2396 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2);
2404 // Output known-0 bits are known if clear or set in both the low clear bits
2405 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
2406 // low 3 bits clear.
2407 // Output known-0 bits are also known if the top bits of each input are
2408 // known to be clear. For example, if one input has the top 10 bits clear
2409 // and the other has the top 8 bits clear, we know the top 7 bits of the
2410 // output must be clear.
2411 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2412 unsigned KnownZeroHigh = KnownZero2.countLeadingOnes();
2413 unsigned KnownZeroLow = KnownZero2.countTrailingOnes();
2415 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2416 KnownZeroHigh = std::min(KnownZeroHigh,
2417 KnownZero2.countLeadingOnes());
2418 KnownZeroLow = std::min(KnownZeroLow,
2419 KnownZero2.countTrailingOnes());
2421 if (Op.getOpcode() == ISD::ADD) {
2422 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroLow);
2423 if (KnownZeroHigh > 1)
2424 KnownZero |= APInt::getHighBitsSet(BitWidth, KnownZeroHigh - 1);
2428 // With ADDE, a carry bit may be added in, so we can only use this
2429 // information if we know (at least) that the low two bits are clear. We
2430 // then return to the caller that the low bit is unknown but that other bits
2432 if (KnownZeroLow >= 2) // ADDE
2433 KnownZero |= APInt::getBitsSet(BitWidth, 1, KnownZeroLow);
2437 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2438 const APInt &RA = Rem->getAPIntValue().abs();
2439 if (RA.isPowerOf2()) {
2440 APInt LowBits = RA - 1;
2441 computeKnownBits(Op.getOperand(0), KnownZero2,KnownOne2,Depth+1);
2443 // The low bits of the first operand are unchanged by the srem.
2444 KnownZero = KnownZero2 & LowBits;
2445 KnownOne = KnownOne2 & LowBits;
2447 // If the first operand is non-negative or has all low bits zero, then
2448 // the upper bits are all zero.
2449 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
2450 KnownZero |= ~LowBits;
2452 // If the first operand is negative and not all low bits are zero, then
2453 // the upper bits are all one.
2454 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0))
2455 KnownOne |= ~LowBits;
2456 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2461 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2462 const APInt &RA = Rem->getAPIntValue();
2463 if (RA.isPowerOf2()) {
2464 APInt LowBits = (RA - 1);
2465 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth + 1);
2467 // The upper bits are all zero, the lower ones are unchanged.
2468 KnownZero = KnownZero2 | ~LowBits;
2469 KnownOne = KnownOne2 & LowBits;
2474 // Since the result is less than or equal to either operand, any leading
2475 // zero bits in either operand must also exist in the result.
2476 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2477 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2479 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
2480 KnownZero2.countLeadingOnes());
2481 KnownOne.clearAllBits();
2482 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders);
2485 case ISD::EXTRACT_ELEMENT: {
2486 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2487 const unsigned Index =
2488 cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();
2489 const unsigned BitWidth = Op.getValueType().getSizeInBits();
2491 // Remove low part of known bits mask
2492 KnownZero = KnownZero.getHiBits(KnownZero.getBitWidth() - Index * BitWidth);
2493 KnownOne = KnownOne.getHiBits(KnownOne.getBitWidth() - Index * BitWidth);
2495 // Remove high part of known bit mask
2496 KnownZero = KnownZero.trunc(BitWidth);
2497 KnownOne = KnownOne.trunc(BitWidth);
2504 APInt Op0Zero, Op0One;
2505 APInt Op1Zero, Op1One;
2506 computeKnownBits(Op.getOperand(0), Op0Zero, Op0One, Depth);
2507 computeKnownBits(Op.getOperand(1), Op1Zero, Op1One, Depth);
2509 KnownZero = Op0Zero & Op1Zero;
2510 KnownOne = Op0One & Op1One;
2513 case ISD::FrameIndex:
2514 case ISD::TargetFrameIndex:
2515 if (unsigned Align = InferPtrAlignment(Op)) {
2516 // The low bits are known zero if the pointer is aligned.
2517 KnownZero = APInt::getLowBitsSet(BitWidth, Log2_32(Align));
2523 if (Op.getOpcode() < ISD::BUILTIN_OP_END)
2526 case ISD::INTRINSIC_WO_CHAIN:
2527 case ISD::INTRINSIC_W_CHAIN:
2528 case ISD::INTRINSIC_VOID:
2529 // Allow the target to implement this method for its nodes.
2530 TLI->computeKnownBitsForTargetNode(Op, KnownZero, KnownOne, *this, Depth);
2534 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
2537 /// ComputeNumSignBits - Return the number of times the sign bit of the
2538 /// register is replicated into the other bits. We know that at least 1 bit
2539 /// is always equal to the sign bit (itself), but other cases can give us
2540 /// information. For example, immediately after an "SRA X, 2", we know that
2541 /// the top 3 bits are all equal to each other, so we return 3.
2542 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
2543 EVT VT = Op.getValueType();
2544 assert(VT.isInteger() && "Invalid VT!");
2545 unsigned VTBits = VT.getScalarType().getSizeInBits();
2547 unsigned FirstAnswer = 1;
2550 return 1; // Limit search depth.
2552 switch (Op.getOpcode()) {
2554 case ISD::AssertSext:
2555 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2556 return VTBits-Tmp+1;
2557 case ISD::AssertZext:
2558 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2561 case ISD::Constant: {
2562 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2563 return Val.getNumSignBits();
2566 case ISD::SIGN_EXTEND:
2568 VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
2569 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2571 case ISD::SIGN_EXTEND_INREG:
2572 // Max of the input and what this extends.
2574 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits();
2577 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2578 return std::max(Tmp, Tmp2);
2581 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2582 // SRA X, C -> adds C sign bits.
2583 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2584 Tmp += C->getZExtValue();
2585 if (Tmp > VTBits) Tmp = VTBits;
2589 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2590 // shl destroys sign bits.
2591 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2592 if (C->getZExtValue() >= VTBits || // Bad shift.
2593 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
2594 return Tmp - C->getZExtValue();
2599 case ISD::XOR: // NOT is handled here.
2600 // Logical binary ops preserve the number of sign bits at the worst.
2601 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2603 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2604 FirstAnswer = std::min(Tmp, Tmp2);
2605 // We computed what we know about the sign bits as our first
2606 // answer. Now proceed to the generic code that uses
2607 // computeKnownBits, and pick whichever answer is better.
2612 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2613 if (Tmp == 1) return 1; // Early out.
2614 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2615 return std::min(Tmp, Tmp2);
2620 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth + 1);
2622 return 1; // Early out.
2623 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth + 1);
2624 return std::min(Tmp, Tmp2);
2631 if (Op.getResNo() != 1)
2633 // The boolean result conforms to getBooleanContents. Fall through.
2634 // If setcc returns 0/-1, all bits are sign bits.
2635 // We know that we have an integer-based boolean since these operations
2636 // are only available for integer.
2637 if (TLI->getBooleanContents(Op.getValueType().isVector(), false) ==
2638 TargetLowering::ZeroOrNegativeOneBooleanContent)
2642 // If setcc returns 0/-1, all bits are sign bits.
2643 if (TLI->getBooleanContents(Op.getOperand(0).getValueType()) ==
2644 TargetLowering::ZeroOrNegativeOneBooleanContent)
2649 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2650 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2652 // Handle rotate right by N like a rotate left by 32-N.
2653 if (Op.getOpcode() == ISD::ROTR)
2654 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2656 // If we aren't rotating out all of the known-in sign bits, return the
2657 // number that are left. This handles rotl(sext(x), 1) for example.
2658 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2659 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2663 // Add can have at most one carry bit. Thus we know that the output
2664 // is, at worst, one more bit than the inputs.
2665 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2666 if (Tmp == 1) return 1; // Early out.
2668 // Special case decrementing a value (ADD X, -1):
2669 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2670 if (CRHS->isAllOnesValue()) {
2671 APInt KnownZero, KnownOne;
2672 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2674 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2676 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue())
2679 // If we are subtracting one from a positive number, there is no carry
2680 // out of the result.
2681 if (KnownZero.isNegative())
2685 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2686 if (Tmp2 == 1) return 1;
2687 return std::min(Tmp, Tmp2)-1;
2690 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2691 if (Tmp2 == 1) return 1;
2694 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2695 if (CLHS->isNullValue()) {
2696 APInt KnownZero, KnownOne;
2697 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
2698 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2700 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue())
2703 // If the input is known to be positive (the sign bit is known clear),
2704 // the output of the NEG has the same number of sign bits as the input.
2705 if (KnownZero.isNegative())
2708 // Otherwise, we treat this like a SUB.
2711 // Sub can have at most one carry bit. Thus we know that the output
2712 // is, at worst, one more bit than the inputs.
2713 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2714 if (Tmp == 1) return 1; // Early out.
2715 return std::min(Tmp, Tmp2)-1;
2717 // FIXME: it's tricky to do anything useful for this, but it is an important
2718 // case for targets like X86.
2720 case ISD::EXTRACT_ELEMENT: {
2721 const int KnownSign = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2722 const int BitWidth = Op.getValueType().getSizeInBits();
2724 Op.getOperand(0).getValueType().getSizeInBits() / BitWidth;
2726 // Get reverse index (starting from 1), Op1 value indexes elements from
2727 // little end. Sign starts at big end.
2728 const int rIndex = Items - 1 -
2729 cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();
2731 // If the sign portion ends in our element the subtraction gives correct
2732 // result. Otherwise it gives either negative or > bitwidth result
2733 return std::max(std::min(KnownSign - rIndex * BitWidth, BitWidth), 0);
2737 // If we are looking at the loaded value of the SDNode.
2738 if (Op.getResNo() == 0) {
2739 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2740 if (LoadSDNode *LD = dyn_cast<LoadSDNode>(Op)) {
2741 unsigned ExtType = LD->getExtensionType();
2744 case ISD::SEXTLOAD: // '17' bits known
2745 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2746 return VTBits-Tmp+1;
2747 case ISD::ZEXTLOAD: // '16' bits known
2748 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2754 // Allow the target to implement this method for its nodes.
2755 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2756 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2757 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2758 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2759 unsigned NumBits = TLI->ComputeNumSignBitsForTargetNode(Op, *this, Depth);
2760 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2763 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2764 // use this information.
2765 APInt KnownZero, KnownOne;
2766 computeKnownBits(Op, KnownZero, KnownOne, Depth);
2769 if (KnownZero.isNegative()) { // sign bit is 0
2771 } else if (KnownOne.isNegative()) { // sign bit is 1;
2778 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2779 // the number of identical bits in the top of the input value.
2781 Mask <<= Mask.getBitWidth()-VTBits;
2782 // Return # leading zeros. We use 'min' here in case Val was zero before
2783 // shifting. We don't want to return '64' as for an i32 "0".
2784 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2787 /// isBaseWithConstantOffset - Return true if the specified operand is an
2788 /// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an
2789 /// ISD::OR with a ConstantSDNode that is guaranteed to have the same
2790 /// semantics as an ADD. This handles the equivalence:
2791 /// X|Cst == X+Cst iff X&Cst = 0.
2792 bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const {
2793 if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) ||
2794 !isa<ConstantSDNode>(Op.getOperand(1)))
2797 if (Op.getOpcode() == ISD::OR &&
2798 !MaskedValueIsZero(Op.getOperand(0),
2799 cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue()))
2806 bool SelectionDAG::isKnownNeverNaN(SDValue Op) const {
2807 // If we're told that NaNs won't happen, assume they won't.
2808 if (getTarget().Options.NoNaNsFPMath)
2811 // If the value is a constant, we can obviously see if it is a NaN or not.
2812 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2813 return !C->getValueAPF().isNaN();
2815 // TODO: Recognize more cases here.
2820 bool SelectionDAG::isKnownNeverZero(SDValue Op) const {
2821 // If the value is a constant, we can obviously see if it is a zero or not.
2822 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2823 return !C->isZero();
2825 // TODO: Recognize more cases here.
2826 switch (Op.getOpcode()) {
2829 if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2830 return !C->isNullValue();
2837 bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const {
2838 // Check the obvious case.
2839 if (A == B) return true;
2841 // For for negative and positive zero.
2842 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A))
2843 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B))
2844 if (CA->isZero() && CB->isZero()) return true;
2846 // Otherwise they may not be equal.
2850 /// getNode - Gets or creates the specified node.
2852 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT) {
2853 FoldingSetNodeID ID;
2854 AddNodeIDNode(ID, Opcode, getVTList(VT), None);
2856 if (SDNode *E = FindNodeOrInsertPos(ID, DL.getDebugLoc(), IP))
2857 return SDValue(E, 0);
2859 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(),
2860 DL.getDebugLoc(), getVTList(VT));
2861 CSEMap.InsertNode(N, IP);
2864 return SDValue(N, 0);
2867 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL,
2868 EVT VT, SDValue Operand) {
2869 // Constant fold unary operations with an integer constant operand. Even
2870 // opaque constant will be folded, because the folding of unary operations
2871 // doesn't create new constants with different values. Nevertheless, the
2872 // opaque flag is preserved during folding to prevent future folding with
2874 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand)) {
2875 const APInt &Val = C->getAPIntValue();
2878 case ISD::SIGN_EXTEND:
2879 return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), DL, VT,
2880 C->isTargetOpcode(), C->isOpaque());
2881 case ISD::ANY_EXTEND:
2882 case ISD::ZERO_EXTEND:
2884 return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), DL, VT,
2885 C->isTargetOpcode(), C->isOpaque());
2886 case ISD::UINT_TO_FP:
2887 case ISD::SINT_TO_FP: {
2888 APFloat apf(EVTToAPFloatSemantics(VT),
2889 APInt::getNullValue(VT.getSizeInBits()));
2890 (void)apf.convertFromAPInt(Val,
2891 Opcode==ISD::SINT_TO_FP,
2892 APFloat::rmNearestTiesToEven);
2893 return getConstantFP(apf, DL, VT);
2896 if (VT == MVT::f16 && C->getValueType(0) == MVT::i16)
2897 return getConstantFP(APFloat(APFloat::IEEEhalf, Val), DL, VT);
2898 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2899 return getConstantFP(APFloat(APFloat::IEEEsingle, Val), DL, VT);
2900 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2901 return getConstantFP(APFloat(APFloat::IEEEdouble, Val), DL, VT);
2904 return getConstant(Val.byteSwap(), DL, VT, C->isTargetOpcode(),
2907 return getConstant(Val.countPopulation(), DL, VT, C->isTargetOpcode(),
2910 case ISD::CTLZ_ZERO_UNDEF:
2911 return getConstant(Val.countLeadingZeros(), DL, VT, C->isTargetOpcode(),
2914 case ISD::CTTZ_ZERO_UNDEF:
2915 return getConstant(Val.countTrailingZeros(), DL, VT, C->isTargetOpcode(),
2920 // Constant fold unary operations with a floating point constant operand.
2921 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand)) {
2922 APFloat V = C->getValueAPF(); // make copy
2926 return getConstantFP(V, DL, VT);
2929 return getConstantFP(V, DL, VT);
2931 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardPositive);
2932 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2933 return getConstantFP(V, DL, VT);
2937 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardZero);
2938 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2939 return getConstantFP(V, DL, VT);
2943 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardNegative);
2944 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2945 return getConstantFP(V, DL, VT);
2948 case ISD::FP_EXTEND: {
2950 // This can return overflow, underflow, or inexact; we don't care.
2951 // FIXME need to be more flexible about rounding mode.
2952 (void)V.convert(EVTToAPFloatSemantics(VT),
2953 APFloat::rmNearestTiesToEven, &ignored);
2954 return getConstantFP(V, DL, VT);
2956 case ISD::FP_TO_SINT:
2957 case ISD::FP_TO_UINT: {
2960 static_assert(integerPartWidth >= 64, "APFloat parts too small!");
2961 // FIXME need to be more flexible about rounding mode.
2962 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2963 Opcode==ISD::FP_TO_SINT,
2964 APFloat::rmTowardZero, &ignored);
2965 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2967 APInt api(VT.getSizeInBits(), x);
2968 return getConstant(api, DL, VT);
2971 if (VT == MVT::i16 && C->getValueType(0) == MVT::f16)
2972 return getConstant((uint16_t)V.bitcastToAPInt().getZExtValue(), DL, VT);
2973 else if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2974 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), DL, VT);
2975 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2976 return getConstant(V.bitcastToAPInt().getZExtValue(), DL, VT);
2981 // Constant fold unary operations with a vector integer or float operand.
2982 if (BuildVectorSDNode *BV = dyn_cast<BuildVectorSDNode>(Operand)) {
2983 if (BV->isConstant()) {
2986 // FIXME: Entirely reasonable to perform folding of other unary
2987 // operations here as the need arises.
2994 case ISD::FP_EXTEND:
2995 case ISD::FP_TO_SINT:
2996 case ISD::FP_TO_UINT:
2998 case ISD::UINT_TO_FP:
2999 case ISD::SINT_TO_FP:
3002 case ISD::CTLZ_ZERO_UNDEF:
3004 case ISD::CTTZ_ZERO_UNDEF:
3006 EVT SVT = VT.getScalarType();
3007 EVT InVT = BV->getValueType(0);
3008 EVT InSVT = InVT.getScalarType();
3010 // Find legal integer scalar type for constant promotion and
3011 // ensure that its scalar size is at least as large as source.
3013 if (SVT.isInteger()) {
3014 LegalSVT = TLI->getTypeToTransformTo(*getContext(), SVT);
3015 if (LegalSVT.bitsLT(SVT)) break;
3018 // Let the above scalar folding handle the folding of each element.
3019 SmallVector<SDValue, 8> Ops;
3020 for (int i = 0, e = VT.getVectorNumElements(); i != e; ++i) {
3021 SDValue OpN = BV->getOperand(i);
3022 EVT OpVT = OpN.getValueType();
3024 // Build vector (integer) scalar operands may need implicit
3025 // truncation - do this before constant folding.
3026 if (OpVT.isInteger() && OpVT.bitsGT(InSVT))
3027 OpN = getNode(ISD::TRUNCATE, DL, InSVT, OpN);
3029 OpN = getNode(Opcode, DL, SVT, OpN);
3031 // Legalize the (integer) scalar constant if necessary.
3032 if (LegalSVT != SVT)
3033 OpN = getNode(ISD::ANY_EXTEND, DL, LegalSVT, OpN);
3035 if (OpN.getOpcode() != ISD::UNDEF &&
3036 OpN.getOpcode() != ISD::Constant &&
3037 OpN.getOpcode() != ISD::ConstantFP)
3041 if (Ops.size() == VT.getVectorNumElements())
3042 return getNode(ISD::BUILD_VECTOR, DL, VT, Ops);
3049 unsigned OpOpcode = Operand.getNode()->getOpcode();
3051 case ISD::TokenFactor:
3052 case ISD::MERGE_VALUES:
3053 case ISD::CONCAT_VECTORS:
3054 return Operand; // Factor, merge or concat of one node? No need.
3055 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
3056 case ISD::FP_EXTEND:
3057 assert(VT.isFloatingPoint() &&
3058 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
3059 if (Operand.getValueType() == VT) return Operand; // noop conversion.
3060 assert((!VT.isVector() ||
3061 VT.getVectorNumElements() ==
3062 Operand.getValueType().getVectorNumElements()) &&
3063 "Vector element count mismatch!");
3064 assert(Operand.getValueType().bitsLT(VT) &&
3065 "Invalid fpext node, dst < src!");
3066 if (Operand.getOpcode() == ISD::UNDEF)
3067 return getUNDEF(VT);
3069 case ISD::SIGN_EXTEND:
3070 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
3071 "Invalid SIGN_EXTEND!");
3072 if (Operand.getValueType() == VT) return Operand; // noop extension
3073 assert((!VT.isVector() ||
3074 VT.getVectorNumElements() ==
3075 Operand.getValueType().getVectorNumElements()) &&
3076 "Vector element count mismatch!");
3077 assert(Operand.getValueType().bitsLT(VT) &&
3078 "Invalid sext node, dst < src!");
3079 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
3080 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
3081 else if (OpOpcode == ISD::UNDEF)
3082 // sext(undef) = 0, because the top bits will all be the same.
3083 return getConstant(0, DL, VT);
3085 case ISD::ZERO_EXTEND:
3086 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
3087 "Invalid ZERO_EXTEND!");
3088 if (Operand.getValueType() == VT) return Operand; // noop extension
3089 assert((!VT.isVector() ||
3090 VT.getVectorNumElements() ==
3091 Operand.getValueType().getVectorNumElements()) &&
3092 "Vector element count mismatch!");
3093 assert(Operand.getValueType().bitsLT(VT) &&
3094 "Invalid zext node, dst < src!");
3095 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
3096 return getNode(ISD::ZERO_EXTEND, DL, VT,
3097 Operand.getNode()->getOperand(0));
3098 else if (OpOpcode == ISD::UNDEF)
3099 // zext(undef) = 0, because the top bits will be zero.
3100 return getConstant(0, DL, VT);
3102 case ISD::ANY_EXTEND:
3103 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
3104 "Invalid ANY_EXTEND!");
3105 if (Operand.getValueType() == VT) return Operand; // noop extension
3106 assert((!VT.isVector() ||
3107 VT.getVectorNumElements() ==
3108 Operand.getValueType().getVectorNumElements()) &&
3109 "Vector element count mismatch!");
3110 assert(Operand.getValueType().bitsLT(VT) &&
3111 "Invalid anyext node, dst < src!");
3113 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
3114 OpOpcode == ISD::ANY_EXTEND)
3115 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
3116 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
3117 else if (OpOpcode == ISD::UNDEF)
3118 return getUNDEF(VT);
3120 // (ext (trunx x)) -> x
3121 if (OpOpcode == ISD::TRUNCATE) {
3122 SDValue OpOp = Operand.getNode()->getOperand(0);
3123 if (OpOp.getValueType() == VT)
3128 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
3129 "Invalid TRUNCATE!");
3130 if (Operand.getValueType() == VT) return Operand; // noop truncate
3131 assert((!VT.isVector() ||
3132 VT.getVectorNumElements() ==
3133 Operand.getValueType().getVectorNumElements()) &&
3134 "Vector element count mismatch!");
3135 assert(Operand.getValueType().bitsGT(VT) &&
3136 "Invalid truncate node, src < dst!");
3137 if (OpOpcode == ISD::TRUNCATE)
3138 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
3139 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
3140 OpOpcode == ISD::ANY_EXTEND) {
3141 // If the source is smaller than the dest, we still need an extend.
3142 if (Operand.getNode()->getOperand(0).getValueType().getScalarType()
3143 .bitsLT(VT.getScalarType()))
3144 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
3145 if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
3146 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
3147 return Operand.getNode()->getOperand(0);
3149 if (OpOpcode == ISD::UNDEF)
3150 return getUNDEF(VT);
3153 assert(VT.isInteger() && VT == Operand.getValueType() &&
3155 assert((VT.getScalarSizeInBits() % 16 == 0) &&
3156 "BSWAP types must be a multiple of 16 bits!");
3157 if (OpOpcode == ISD::UNDEF)
3158 return getUNDEF(VT);
3161 // Basic sanity checking.
3162 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
3163 && "Cannot BITCAST between types of different sizes!");
3164 if (VT == Operand.getValueType()) return Operand; // noop conversion.
3165 if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x)
3166 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0));
3167 if (OpOpcode == ISD::UNDEF)
3168 return getUNDEF(VT);
3170 case ISD::SCALAR_TO_VECTOR:
3171 assert(VT.isVector() && !Operand.getValueType().isVector() &&
3172 (VT.getVectorElementType() == Operand.getValueType() ||
3173 (VT.getVectorElementType().isInteger() &&
3174 Operand.getValueType().isInteger() &&
3175 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
3176 "Illegal SCALAR_TO_VECTOR node!");
3177 if (OpOpcode == ISD::UNDEF)
3178 return getUNDEF(VT);
3179 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
3180 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
3181 isa<ConstantSDNode>(Operand.getOperand(1)) &&
3182 Operand.getConstantOperandVal(1) == 0 &&
3183 Operand.getOperand(0).getValueType() == VT)
3184 return Operand.getOperand(0);
3187 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
3188 if (getTarget().Options.UnsafeFPMath && OpOpcode == ISD::FSUB)
3189 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
3190 Operand.getNode()->getOperand(0));
3191 if (OpOpcode == ISD::FNEG) // --X -> X
3192 return Operand.getNode()->getOperand(0);
3195 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
3196 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
3201 SDVTList VTs = getVTList(VT);
3202 if (VT != MVT::Glue) { // Don't CSE flag producing nodes
3203 FoldingSetNodeID ID;
3204 SDValue Ops[1] = { Operand };
3205 AddNodeIDNode(ID, Opcode, VTs, Ops);
3207 if (SDNode *E = FindNodeOrInsertPos(ID, DL.getDebugLoc(), IP))
3208 return SDValue(E, 0);
3210 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(),
3211 DL.getDebugLoc(), VTs, Operand);
3212 CSEMap.InsertNode(N, IP);
3214 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(),
3215 DL.getDebugLoc(), VTs, Operand);
3219 return SDValue(N, 0);
3222 static std::pair<APInt, bool> FoldValue(unsigned Opcode, const APInt &C1,
3225 case ISD::ADD: return std::make_pair(C1 + C2, true);
3226 case ISD::SUB: return std::make_pair(C1 - C2, true);
3227 case ISD::MUL: return std::make_pair(C1 * C2, true);
3228 case ISD::AND: return std::make_pair(C1 & C2, true);
3229 case ISD::OR: return std::make_pair(C1 | C2, true);
3230 case ISD::XOR: return std::make_pair(C1 ^ C2, true);
3231 case ISD::SHL: return std::make_pair(C1 << C2, true);
3232 case ISD::SRL: return std::make_pair(C1.lshr(C2), true);
3233 case ISD::SRA: return std::make_pair(C1.ashr(C2), true);
3234 case ISD::ROTL: return std::make_pair(C1.rotl(C2), true);
3235 case ISD::ROTR: return std::make_pair(C1.rotr(C2), true);
3236 case ISD::SMIN: return std::make_pair(C1.sle(C2) ? C1 : C2, true);
3237 case ISD::SMAX: return std::make_pair(C1.sge(C2) ? C1 : C2, true);
3238 case ISD::UMIN: return std::make_pair(C1.ule(C2) ? C1 : C2, true);
3239 case ISD::UMAX: return std::make_pair(C1.uge(C2) ? C1 : C2, true);
3241 if (!C2.getBoolValue())
3243 return std::make_pair(C1.udiv(C2), true);
3245 if (!C2.getBoolValue())
3247 return std::make_pair(C1.urem(C2), true);
3249 if (!C2.getBoolValue())
3251 return std::make_pair(C1.sdiv(C2), true);
3253 if (!C2.getBoolValue())
3255 return std::make_pair(C1.srem(C2), true);
3257 return std::make_pair(APInt(1, 0), false);
3260 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, SDLoc DL, EVT VT,
3261 const ConstantSDNode *Cst1,
3262 const ConstantSDNode *Cst2) {
3263 if (Cst1->isOpaque() || Cst2->isOpaque())
3266 std::pair<APInt, bool> Folded = FoldValue(Opcode, Cst1->getAPIntValue(),
3267 Cst2->getAPIntValue());
3270 return getConstant(Folded.first, DL, VT);
3273 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, SDLoc DL, EVT VT,
3274 SDNode *Cst1, SDNode *Cst2) {
3275 // If the opcode is a target-specific ISD node, there's nothing we can
3276 // do here and the operand rules may not line up with the below, so
3278 if (Opcode >= ISD::BUILTIN_OP_END)
3281 // Handle the case of two scalars.
3282 if (const ConstantSDNode *Scalar1 = dyn_cast<ConstantSDNode>(Cst1)) {
3283 if (const ConstantSDNode *Scalar2 = dyn_cast<ConstantSDNode>(Cst2)) {
3284 if (SDValue Folded =
3285 FoldConstantArithmetic(Opcode, DL, VT, Scalar1, Scalar2)) {
3288 SmallVector<SDValue, 4> Outputs;
3289 // We may have a vector type but a scalar result. Create a splat.
3290 Outputs.resize(VT.getVectorNumElements(), Outputs.back());
3291 // Build a big vector out of the scalar elements we generated.
3292 return getNode(ISD::BUILD_VECTOR, SDLoc(), VT, Outputs);
3299 // For vectors extract each constant element into Inputs so we can constant
3300 // fold them individually.
3301 BuildVectorSDNode *BV1 = dyn_cast<BuildVectorSDNode>(Cst1);
3302 BuildVectorSDNode *BV2 = dyn_cast<BuildVectorSDNode>(Cst2);
3306 assert(BV1->getNumOperands() == BV2->getNumOperands() && "Out of sync!");
3308 EVT SVT = VT.getScalarType();
3309 SmallVector<SDValue, 4> Outputs;
3310 for (unsigned I = 0, E = BV1->getNumOperands(); I != E; ++I) {
3311 ConstantSDNode *V1 = dyn_cast<ConstantSDNode>(BV1->getOperand(I));
3312 ConstantSDNode *V2 = dyn_cast<ConstantSDNode>(BV2->getOperand(I));
3313 if (!V1 || !V2) // Not a constant, bail.
3316 if (V1->isOpaque() || V2->isOpaque())
3319 // Avoid BUILD_VECTOR nodes that perform implicit truncation.
3320 // FIXME: This is valid and could be handled by truncating the APInts.
3321 if (V1->getValueType(0) != SVT || V2->getValueType(0) != SVT)
3324 // Fold one vector element.
3325 std::pair<APInt, bool> Folded = FoldValue(Opcode, V1->getAPIntValue(),
3326 V2->getAPIntValue());
3329 Outputs.push_back(getConstant(Folded.first, DL, SVT));
3332 assert(VT.getVectorNumElements() == Outputs.size() &&
3333 "Vector size mismatch!");
3335 // We may have a vector type but a scalar result. Create a splat.
3336 Outputs.resize(VT.getVectorNumElements(), Outputs.back());
3338 // Build a big vector out of the scalar elements we generated.
3339 return getNode(ISD::BUILD_VECTOR, SDLoc(), VT, Outputs);
3342 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT, SDValue N1,
3343 SDValue N2, const SDNodeFlags *Flags) {
3344 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
3345 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2);
3348 case ISD::TokenFactor:
3349 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
3350 N2.getValueType() == MVT::Other && "Invalid token factor!");
3351 // Fold trivial token factors.
3352 if (N1.getOpcode() == ISD::EntryToken) return N2;
3353 if (N2.getOpcode() == ISD::EntryToken) return N1;
3354 if (N1 == N2) return N1;
3356 case ISD::CONCAT_VECTORS:
3357 // Concat of UNDEFs is UNDEF.
3358 if (N1.getOpcode() == ISD::UNDEF &&
3359 N2.getOpcode() == ISD::UNDEF)
3360 return getUNDEF(VT);
3362 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
3363 // one big BUILD_VECTOR.
3364 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
3365 N2.getOpcode() == ISD::BUILD_VECTOR) {
3366 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
3367 N1.getNode()->op_end());
3368 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
3370 // BUILD_VECTOR requires all inputs to be of the same type, find the
3371 // maximum type and extend them all.
3372 EVT SVT = VT.getScalarType();
3373 for (SDValue Op : Elts)
3374 SVT = (SVT.bitsLT(Op.getValueType()) ? Op.getValueType() : SVT);
3375 if (SVT.bitsGT(VT.getScalarType()))
3376 for (SDValue &Op : Elts)
3377 Op = TLI->isZExtFree(Op.getValueType(), SVT)
3378 ? getZExtOrTrunc(Op, DL, SVT)
3379 : getSExtOrTrunc(Op, DL, SVT);
3381 return getNode(ISD::BUILD_VECTOR, DL, VT, Elts);
3385 assert(VT.isInteger() && "This operator does not apply to FP types!");
3386 assert(N1.getValueType() == N2.getValueType() &&
3387 N1.getValueType() == VT && "Binary operator types must match!");
3388 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
3389 // worth handling here.
3390 if (N2C && N2C->isNullValue())
3392 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
3399 assert(VT.isInteger() && "This operator does not apply to FP types!");
3400 assert(N1.getValueType() == N2.getValueType() &&
3401 N1.getValueType() == VT && "Binary operator types must match!");
3402 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
3403 // it's worth handling here.
3404 if (N2C && N2C->isNullValue())
3418 assert(VT.isInteger() && "This operator does not apply to FP types!");
3419 assert(N1.getValueType() == N2.getValueType() &&
3420 N1.getValueType() == VT && "Binary operator types must match!");
3427 if (getTarget().Options.UnsafeFPMath) {
3428 if (Opcode == ISD::FADD) {
3430 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
3431 if (CFP->getValueAPF().isZero())
3434 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
3435 if (CFP->getValueAPF().isZero())
3437 } else if (Opcode == ISD::FSUB) {
3439 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
3440 if (CFP->getValueAPF().isZero())
3442 } else if (Opcode == ISD::FMUL) {
3443 ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1);
3446 // If the first operand isn't the constant, try the second
3448 CFP = dyn_cast<ConstantFPSDNode>(N2);
3455 return SDValue(CFP,0);
3457 if (CFP->isExactlyValue(1.0))
3462 assert(VT.isFloatingPoint() && "This operator only applies to FP types!");
3463 assert(N1.getValueType() == N2.getValueType() &&
3464 N1.getValueType() == VT && "Binary operator types must match!");
3466 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
3467 assert(N1.getValueType() == VT &&
3468 N1.getValueType().isFloatingPoint() &&
3469 N2.getValueType().isFloatingPoint() &&
3470 "Invalid FCOPYSIGN!");
3477 assert(VT == N1.getValueType() &&
3478 "Shift operators return type must be the same as their first arg");
3479 assert(VT.isInteger() && N2.getValueType().isInteger() &&
3480 "Shifts only work on integers");
3481 assert((!VT.isVector() || VT == N2.getValueType()) &&
3482 "Vector shift amounts must be in the same as their first arg");
3483 // Verify that the shift amount VT is bit enough to hold valid shift
3484 // amounts. This catches things like trying to shift an i1024 value by an
3485 // i8, which is easy to fall into in generic code that uses
3486 // TLI.getShiftAmount().
3487 assert(N2.getValueType().getSizeInBits() >=
3488 Log2_32_Ceil(N1.getValueType().getSizeInBits()) &&
3489 "Invalid use of small shift amount with oversized value!");
3491 // Always fold shifts of i1 values so the code generator doesn't need to
3492 // handle them. Since we know the size of the shift has to be less than the
3493 // size of the value, the shift/rotate count is guaranteed to be zero.
3496 if (N2C && N2C->isNullValue())
3499 case ISD::FP_ROUND_INREG: {
3500 EVT EVT = cast<VTSDNode>(N2)->getVT();
3501 assert(VT == N1.getValueType() && "Not an inreg round!");
3502 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
3503 "Cannot FP_ROUND_INREG integer types");
3504 assert(EVT.isVector() == VT.isVector() &&
3505 "FP_ROUND_INREG type should be vector iff the operand "
3507 assert((!EVT.isVector() ||
3508 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
3509 "Vector element counts must match in FP_ROUND_INREG");
3510 assert(EVT.bitsLE(VT) && "Not rounding down!");
3512 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
3516 assert(VT.isFloatingPoint() &&
3517 N1.getValueType().isFloatingPoint() &&
3518 VT.bitsLE(N1.getValueType()) &&
3519 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
3520 if (N1.getValueType() == VT) return N1; // noop conversion.
3522 case ISD::AssertSext:
3523 case ISD::AssertZext: {
3524 EVT EVT = cast<VTSDNode>(N2)->getVT();
3525 assert(VT == N1.getValueType() && "Not an inreg extend!");
3526 assert(VT.isInteger() && EVT.isInteger() &&
3527 "Cannot *_EXTEND_INREG FP types");
3528 assert(!EVT.isVector() &&
3529 "AssertSExt/AssertZExt type should be the vector element type "
3530 "rather than the vector type!");
3531 assert(EVT.bitsLE(VT) && "Not extending!");
3532 if (VT == EVT) return N1; // noop assertion.
3535 case ISD::SIGN_EXTEND_INREG: {
3536 EVT EVT = cast<VTSDNode>(N2)->getVT();
3537 assert(VT == N1.getValueType() && "Not an inreg extend!");
3538 assert(VT.isInteger() && EVT.isInteger() &&
3539 "Cannot *_EXTEND_INREG FP types");
3540 assert(EVT.isVector() == VT.isVector() &&
3541 "SIGN_EXTEND_INREG type should be vector iff the operand "
3543 assert((!EVT.isVector() ||
3544 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
3545 "Vector element counts must match in SIGN_EXTEND_INREG");
3546 assert(EVT.bitsLE(VT) && "Not extending!");
3547 if (EVT == VT) return N1; // Not actually extending
3549 auto SignExtendInReg = [&](APInt Val) {
3550 unsigned FromBits = EVT.getScalarType().getSizeInBits();
3551 Val <<= Val.getBitWidth() - FromBits;
3552 Val = Val.ashr(Val.getBitWidth() - FromBits);
3553 return getConstant(Val, DL, VT.getScalarType());
3557 APInt Val = N1C->getAPIntValue();
3558 return SignExtendInReg(Val);
3560 if (ISD::isBuildVectorOfConstantSDNodes(N1.getNode())) {
3561 SmallVector<SDValue, 8> Ops;
3562 for (int i = 0, e = VT.getVectorNumElements(); i != e; ++i) {
3563 SDValue Op = N1.getOperand(i);
3564 if (Op.getValueType() != VT.getScalarType()) break;
3565 if (Op.getOpcode() == ISD::UNDEF) {
3569 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op)) {
3570 APInt Val = C->getAPIntValue();
3571 Ops.push_back(SignExtendInReg(Val));
3576 if (Ops.size() == VT.getVectorNumElements())
3577 return getNode(ISD::BUILD_VECTOR, DL, VT, Ops);
3581 case ISD::EXTRACT_VECTOR_ELT:
3582 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
3583 if (N1.getOpcode() == ISD::UNDEF)
3584 return getUNDEF(VT);
3586 // EXTRACT_VECTOR_ELT of out-of-bounds element is an UNDEF
3587 if (N2C && N2C->getZExtValue() >= N1.getValueType().getVectorNumElements())
3588 return getUNDEF(VT);
3590 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
3591 // expanding copies of large vectors from registers.
3593 N1.getOpcode() == ISD::CONCAT_VECTORS &&
3594 N1.getNumOperands() > 0) {
3596 N1.getOperand(0).getValueType().getVectorNumElements();
3597 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
3598 N1.getOperand(N2C->getZExtValue() / Factor),
3599 getConstant(N2C->getZExtValue() % Factor, DL,
3600 N2.getValueType()));
3603 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
3604 // expanding large vector constants.
3605 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
3606 SDValue Elt = N1.getOperand(N2C->getZExtValue());
3608 if (VT != Elt.getValueType())
3609 // If the vector element type is not legal, the BUILD_VECTOR operands
3610 // are promoted and implicitly truncated, and the result implicitly
3611 // extended. Make that explicit here.
3612 Elt = getAnyExtOrTrunc(Elt, DL, VT);
3617 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
3618 // operations are lowered to scalars.
3619 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
3620 // If the indices are the same, return the inserted element else
3621 // if the indices are known different, extract the element from
3622 // the original vector.
3623 SDValue N1Op2 = N1.getOperand(2);
3624 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2);
3626 if (N1Op2C && N2C) {
3627 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) {
3628 if (VT == N1.getOperand(1).getValueType())
3629 return N1.getOperand(1);
3631 return getSExtOrTrunc(N1.getOperand(1), DL, VT);
3634 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
3638 case ISD::EXTRACT_ELEMENT:
3639 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
3640 assert(!N1.getValueType().isVector() && !VT.isVector() &&
3641 (N1.getValueType().isInteger() == VT.isInteger()) &&
3642 N1.getValueType() != VT &&
3643 "Wrong types for EXTRACT_ELEMENT!");
3645 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
3646 // 64-bit integers into 32-bit parts. Instead of building the extract of
3647 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
3648 if (N1.getOpcode() == ISD::BUILD_PAIR)
3649 return N1.getOperand(N2C->getZExtValue());
3651 // EXTRACT_ELEMENT of a constant int is also very common.
3652 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
3653 unsigned ElementSize = VT.getSizeInBits();
3654 unsigned Shift = ElementSize * N2C->getZExtValue();
3655 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
3656 return getConstant(ShiftedVal.trunc(ElementSize), DL, VT);
3659 case ISD::EXTRACT_SUBVECTOR: {
3661 if (VT.isSimple() && N1.getValueType().isSimple()) {
3662 assert(VT.isVector() && N1.getValueType().isVector() &&
3663 "Extract subvector VTs must be a vectors!");
3664 assert(VT.getVectorElementType() ==
3665 N1.getValueType().getVectorElementType() &&
3666 "Extract subvector VTs must have the same element type!");
3667 assert(VT.getSimpleVT() <= N1.getSimpleValueType() &&
3668 "Extract subvector must be from larger vector to smaller vector!");
3670 if (isa<ConstantSDNode>(Index)) {
3671 assert((VT.getVectorNumElements() +
3672 cast<ConstantSDNode>(Index)->getZExtValue()
3673 <= N1.getValueType().getVectorNumElements())
3674 && "Extract subvector overflow!");
3677 // Trivial extraction.
3678 if (VT.getSimpleVT() == N1.getSimpleValueType())
3685 // Perform trivial constant folding.
3687 FoldConstantArithmetic(Opcode, DL, VT, N1.getNode(), N2.getNode()))
3690 // Canonicalize constant to RHS if commutative.
3691 if (N1C && !N2C && isCommutativeBinOp(Opcode)) {
3692 std::swap(N1C, N2C);
3696 // Constant fold FP operations.
3697 bool HasFPExceptions = TLI->hasFloatingPointExceptions();
3698 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1);
3699 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2);
3701 if (!N2CFP && isCommutativeBinOp(Opcode)) {
3702 // Canonicalize constant to RHS if commutative.
3703 std::swap(N1CFP, N2CFP);
3706 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
3707 APFloat::opStatus s;
3710 s = V1.add(V2, APFloat::rmNearestTiesToEven);
3711 if (!HasFPExceptions || s != APFloat::opInvalidOp)
3712 return getConstantFP(V1, DL, VT);
3715 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
3716 if (!HasFPExceptions || s!=APFloat::opInvalidOp)
3717 return getConstantFP(V1, DL, VT);
3720 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
3721 if (!HasFPExceptions || s!=APFloat::opInvalidOp)
3722 return getConstantFP(V1, DL, VT);
3725 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
3726 if (!HasFPExceptions || (s!=APFloat::opInvalidOp &&
3727 s!=APFloat::opDivByZero)) {
3728 return getConstantFP(V1, DL, VT);
3732 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
3733 if (!HasFPExceptions || (s!=APFloat::opInvalidOp &&
3734 s!=APFloat::opDivByZero)) {
3735 return getConstantFP(V1, DL, VT);
3738 case ISD::FCOPYSIGN:
3740 return getConstantFP(V1, DL, VT);
3745 if (Opcode == ISD::FP_ROUND) {
3746 APFloat V = N1CFP->getValueAPF(); // make copy
3748 // This can return overflow, underflow, or inexact; we don't care.
3749 // FIXME need to be more flexible about rounding mode.
3750 (void)V.convert(EVTToAPFloatSemantics(VT),
3751 APFloat::rmNearestTiesToEven, &ignored);
3752 return getConstantFP(V, DL, VT);
3756 // Canonicalize an UNDEF to the RHS, even over a constant.
3757 if (N1.getOpcode() == ISD::UNDEF) {
3758 if (isCommutativeBinOp(Opcode)) {
3762 case ISD::FP_ROUND_INREG:
3763 case ISD::SIGN_EXTEND_INREG:
3769 return N1; // fold op(undef, arg2) -> undef
3777 return getConstant(0, DL, VT); // fold op(undef, arg2) -> 0
3778 // For vectors, we can't easily build an all zero vector, just return
3785 // Fold a bunch of operators when the RHS is undef.
3786 if (N2.getOpcode() == ISD::UNDEF) {
3789 if (N1.getOpcode() == ISD::UNDEF)
3790 // Handle undef ^ undef -> 0 special case. This is a common
3792 return getConstant(0, DL, VT);
3802 return N2; // fold op(arg1, undef) -> undef
3808 if (getTarget().Options.UnsafeFPMath)
3816 return getConstant(0, DL, VT); // fold op(arg1, undef) -> 0
3817 // For vectors, we can't easily build an all zero vector, just return
3822 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), DL, VT);
3823 // For vectors, we can't easily build an all one vector, just return
3831 // Memoize this node if possible.
3833 SDVTList VTs = getVTList(VT);
3834 if (VT != MVT::Glue) {
3835 SDValue Ops[] = {N1, N2};
3836 FoldingSetNodeID ID;
3837 AddNodeIDNode(ID, Opcode, VTs, Ops);
3838 AddNodeIDFlags(ID, Opcode, Flags);
3840 if (SDNode *E = FindNodeOrInsertPos(ID, DL.getDebugLoc(), IP))
3841 return SDValue(E, 0);
3843 N = GetBinarySDNode(Opcode, DL, VTs, N1, N2, Flags);
3845 CSEMap.InsertNode(N, IP);
3847 N = GetBinarySDNode(Opcode, DL, VTs, N1, N2, Flags);
3851 return SDValue(N, 0);
3854 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
3855 SDValue N1, SDValue N2, SDValue N3) {
3856 // Perform various simplifications.
3857 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
3860 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1);
3861 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2);
3862 ConstantFPSDNode *N3CFP = dyn_cast<ConstantFPSDNode>(N3);
3863 if (N1CFP && N2CFP && N3CFP) {
3864 APFloat V1 = N1CFP->getValueAPF();
3865 const APFloat &V2 = N2CFP->getValueAPF();
3866 const APFloat &V3 = N3CFP->getValueAPF();
3867 APFloat::opStatus s =
3868 V1.fusedMultiplyAdd(V2, V3, APFloat::rmNearestTiesToEven);
3869 if (!TLI->hasFloatingPointExceptions() || s != APFloat::opInvalidOp)
3870 return getConstantFP(V1, DL, VT);
3874 case ISD::CONCAT_VECTORS:
3875 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
3876 // one big BUILD_VECTOR.
3877 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
3878 N2.getOpcode() == ISD::BUILD_VECTOR &&
3879 N3.getOpcode() == ISD::BUILD_VECTOR) {
3880 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
3881 N1.getNode()->op_end());
3882 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
3883 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end());
3884 return getNode(ISD::BUILD_VECTOR, DL, VT, Elts);
3888 // Use FoldSetCC to simplify SETCC's.
3889 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
3890 if (Simp.getNode()) return Simp;
3895 if (N1C->getZExtValue())
3896 return N2; // select true, X, Y -> X
3897 return N3; // select false, X, Y -> Y
3900 if (N2 == N3) return N2; // select C, X, X -> X
3902 case ISD::VECTOR_SHUFFLE:
3903 llvm_unreachable("should use getVectorShuffle constructor!");
3904 case ISD::INSERT_SUBVECTOR: {
3906 if (VT.isSimple() && N1.getValueType().isSimple()
3907 && N2.getValueType().isSimple()) {
3908 assert(VT.isVector() && N1.getValueType().isVector() &&
3909 N2.getValueType().isVector() &&
3910 "Insert subvector VTs must be a vectors");
3911 assert(VT == N1.getValueType() &&
3912 "Dest and insert subvector source types must match!");
3913 assert(N2.getSimpleValueType() <= N1.getSimpleValueType() &&
3914 "Insert subvector must be from smaller vector to larger vector!");
3915 if (isa<ConstantSDNode>(Index)) {
3916 assert((N2.getValueType().getVectorNumElements() +
3917 cast<ConstantSDNode>(Index)->getZExtValue()
3918 <= VT.getVectorNumElements())
3919 && "Insert subvector overflow!");
3922 // Trivial insertion.
3923 if (VT.getSimpleVT() == N2.getSimpleValueType())
3929 // Fold bit_convert nodes from a type to themselves.
3930 if (N1.getValueType() == VT)
3935 // Memoize node if it doesn't produce a flag.
3937 SDVTList VTs = getVTList(VT);
3938 if (VT != MVT::Glue) {
3939 SDValue Ops[] = { N1, N2, N3 };
3940 FoldingSetNodeID ID;
3941 AddNodeIDNode(ID, Opcode, VTs, Ops);
3943 if (SDNode *E = FindNodeOrInsertPos(ID, DL.getDebugLoc(), IP))
3944 return SDValue(E, 0);
3946 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(),
3947 DL.getDebugLoc(), VTs, N1, N2, N3);
3948 CSEMap.InsertNode(N, IP);
3950 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(),
3951 DL.getDebugLoc(), VTs, N1, N2, N3);
3955 return SDValue(N, 0);
3958 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
3959 SDValue N1, SDValue N2, SDValue N3,
3961 SDValue Ops[] = { N1, N2, N3, N4 };
3962 return getNode(Opcode, DL, VT, Ops);
3965 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
3966 SDValue N1, SDValue N2, SDValue N3,
3967 SDValue N4, SDValue N5) {
3968 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3969 return getNode(Opcode, DL, VT, Ops);
3972 /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
3973 /// the incoming stack arguments to be loaded from the stack.
3974 SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) {
3975 SmallVector<SDValue, 8> ArgChains;
3977 // Include the original chain at the beginning of the list. When this is
3978 // used by target LowerCall hooks, this helps legalize find the
3979 // CALLSEQ_BEGIN node.
3980 ArgChains.push_back(Chain);
3982 // Add a chain value for each stack argument.
3983 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
3984 UE = getEntryNode().getNode()->use_end(); U != UE; ++U)
3985 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
3986 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
3987 if (FI->getIndex() < 0)
3988 ArgChains.push_back(SDValue(L, 1));
3990 // Build a tokenfactor for all the chains.
3991 return getNode(ISD::TokenFactor, SDLoc(Chain), MVT::Other, ArgChains);
3994 /// getMemsetValue - Vectorized representation of the memset value
3996 static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
3998 assert(Value.getOpcode() != ISD::UNDEF);
4000 unsigned NumBits = VT.getScalarType().getSizeInBits();
4001 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
4002 assert(C->getAPIntValue().getBitWidth() == 8);
4003 APInt Val = APInt::getSplat(NumBits, C->getAPIntValue());
4005 return DAG.getConstant(Val, dl, VT);
4006 return DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(VT), Val), dl,
4010 assert(Value.getValueType() == MVT::i8 && "memset with non-byte fill value?");
4011 EVT IntVT = VT.getScalarType();
4012 if (!IntVT.isInteger())
4013 IntVT = EVT::getIntegerVT(*DAG.getContext(), IntVT.getSizeInBits());
4015 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, IntVT, Value);
4017 // Use a multiplication with 0x010101... to extend the input to the
4019 APInt Magic = APInt::getSplat(NumBits, APInt(8, 0x01));
4020 Value = DAG.getNode(ISD::MUL, dl, IntVT, Value,
4021 DAG.getConstant(Magic, dl, IntVT));
4024 if (VT != Value.getValueType() && !VT.isInteger())
4025 Value = DAG.getNode(ISD::BITCAST, dl, VT.getScalarType(), Value);
4026 if (VT != Value.getValueType()) {
4027 assert(VT.getVectorElementType() == Value.getValueType() &&
4028 "value type should be one vector element here");
4029 SmallVector<SDValue, 8> BVOps(VT.getVectorNumElements(), Value);
4030 Value = DAG.getNode(ISD::BUILD_VECTOR, dl, VT, BVOps);
4036 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
4037 /// used when a memcpy is turned into a memset when the source is a constant
4039 static SDValue getMemsetStringVal(EVT VT, SDLoc dl, SelectionDAG &DAG,
4040 const TargetLowering &TLI, StringRef Str) {
4041 // Handle vector with all elements zero.
4044 return DAG.getConstant(0, dl, VT);
4045 else if (VT == MVT::f32 || VT == MVT::f64 || VT == MVT::f128)
4046 return DAG.getConstantFP(0.0, dl, VT);
4047 else if (VT.isVector()) {
4048 unsigned NumElts = VT.getVectorNumElements();
4049 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
4050 return DAG.getNode(ISD::BITCAST, dl, VT,
4051 DAG.getConstant(0, dl,
4052 EVT::getVectorVT(*DAG.getContext(),
4055 llvm_unreachable("Expected type!");
4058 assert(!VT.isVector() && "Can't handle vector type here!");
4059 unsigned NumVTBits = VT.getSizeInBits();
4060 unsigned NumVTBytes = NumVTBits / 8;
4061 unsigned NumBytes = std::min(NumVTBytes, unsigned(Str.size()));
4063 APInt Val(NumVTBits, 0);
4064 if (DAG.getDataLayout().isLittleEndian()) {
4065 for (unsigned i = 0; i != NumBytes; ++i)
4066 Val |= (uint64_t)(unsigned char)Str[i] << i*8;
4068 for (unsigned i = 0; i != NumBytes; ++i)
4069 Val |= (uint64_t)(unsigned char)Str[i] << (NumVTBytes-i-1)*8;
4072 // If the "cost" of materializing the integer immediate is less than the cost
4073 // of a load, then it is cost effective to turn the load into the immediate.
4074 Type *Ty = VT.getTypeForEVT(*DAG.getContext());
4075 if (TLI.shouldConvertConstantLoadToIntImm(Val, Ty))
4076 return DAG.getConstant(Val, dl, VT);
4077 return SDValue(nullptr, 0);
4080 /// getMemBasePlusOffset - Returns base and offset node for the
4082 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, SDLoc dl,
4083 SelectionDAG &DAG) {
4084 EVT VT = Base.getValueType();
4085 return DAG.getNode(ISD::ADD, dl,
4086 VT, Base, DAG.getConstant(Offset, dl, VT));
4089 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
4091 static bool isMemSrcFromString(SDValue Src, StringRef &Str) {
4092 unsigned SrcDelta = 0;
4093 GlobalAddressSDNode *G = nullptr;
4094 if (Src.getOpcode() == ISD::GlobalAddress)
4095 G = cast<GlobalAddressSDNode>(Src);
4096 else if (Src.getOpcode() == ISD::ADD &&
4097 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
4098 Src.getOperand(1).getOpcode() == ISD::Constant) {
4099 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
4100 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
4105 return getConstantStringInfo(G->getGlobal(), Str, SrcDelta, false);
4108 /// Determines the optimal series of memory ops to replace the memset / memcpy.
4109 /// Return true if the number of memory ops is below the threshold (Limit).
4110 /// It returns the types of the sequence of memory ops to perform
4111 /// memset / memcpy by reference.
4112 static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps,
4113 unsigned Limit, uint64_t Size,
4114 unsigned DstAlign, unsigned SrcAlign,
4120 const TargetLowering &TLI) {
4121 assert((SrcAlign == 0 || SrcAlign >= DstAlign) &&
4122 "Expecting memcpy / memset source to meet alignment requirement!");
4123 // If 'SrcAlign' is zero, that means the memory operation does not need to
4124 // load the value, i.e. memset or memcpy from constant string. Otherwise,
4125 // it's the inferred alignment of the source. 'DstAlign', on the other hand,
4126 // is the specified alignment of the memory operation. If it is zero, that
4127 // means it's possible to change the alignment of the destination.
4128 // 'MemcpyStrSrc' indicates whether the memcpy source is constant so it does
4129 // not need to be loaded.
4130 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign,
4131 IsMemset, ZeroMemset, MemcpyStrSrc,
4132 DAG.getMachineFunction());
4134 if (VT == MVT::Other) {
4136 if (DstAlign >= DAG.getDataLayout().getPointerPrefAlignment(AS) ||
4137 TLI.allowsMisalignedMemoryAccesses(VT, AS, DstAlign)) {
4138 VT = TLI.getPointerTy(DAG.getDataLayout());
4140 switch (DstAlign & 7) {
4141 case 0: VT = MVT::i64; break;
4142 case 4: VT = MVT::i32; break;
4143 case 2: VT = MVT::i16; break;
4144 default: VT = MVT::i8; break;
4149 while (!TLI.isTypeLegal(LVT))
4150 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1);
4151 assert(LVT.isInteger());
4157 unsigned NumMemOps = 0;
4159 unsigned VTSize = VT.getSizeInBits() / 8;
4160 while (VTSize > Size) {
4161 // For now, only use non-vector load / store's for the left-over pieces.
4166 if (VT.isVector() || VT.isFloatingPoint()) {
4167 NewVT = (VT.getSizeInBits() > 64) ? MVT::i64 : MVT::i32;
4168 if (TLI.isOperationLegalOrCustom(ISD::STORE, NewVT) &&
4169 TLI.isSafeMemOpType(NewVT.getSimpleVT()))
4171 else if (NewVT == MVT::i64 &&
4172 TLI.isOperationLegalOrCustom(ISD::STORE, MVT::f64) &&
4173 TLI.isSafeMemOpType(MVT::f64)) {
4174 // i64 is usually not legal on 32-bit targets, but f64 may be.
4182 NewVT = (MVT::SimpleValueType)(NewVT.getSimpleVT().SimpleTy - 1);
4183 if (NewVT == MVT::i8)
4185 } while (!TLI.isSafeMemOpType(NewVT.getSimpleVT()));
4187 NewVTSize = NewVT.getSizeInBits() / 8;
4189 // If the new VT cannot cover all of the remaining bits, then consider
4190 // issuing a (or a pair of) unaligned and overlapping load / store.
4191 // FIXME: Only does this for 64-bit or more since we don't have proper
4192 // cost model for unaligned load / store.
4195 if (NumMemOps && AllowOverlap &&
4196 VTSize >= 8 && NewVTSize < Size &&
4197 TLI.allowsMisalignedMemoryAccesses(VT, AS, DstAlign, &Fast) && Fast)
4205 if (++NumMemOps > Limit)
4208 MemOps.push_back(VT);
4215 static bool shouldLowerMemFuncForSize(const MachineFunction &MF) {
4216 // On Darwin, -Os means optimize for size without hurting performance, so
4217 // only really optimize for size when -Oz (MinSize) is used.
4218 if (MF.getTarget().getTargetTriple().isOSDarwin())
4219 return MF.getFunction()->optForMinSize();
4220 return MF.getFunction()->optForSize();
4223 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, SDLoc dl,
4224 SDValue Chain, SDValue Dst,
4225 SDValue Src, uint64_t Size,
4226 unsigned Align, bool isVol,
4228 MachinePointerInfo DstPtrInfo,
4229 MachinePointerInfo SrcPtrInfo) {
4230 // Turn a memcpy of undef to nop.
4231 if (Src.getOpcode() == ISD::UNDEF)
4234 // Expand memcpy to a series of load and store ops if the size operand falls
4235 // below a certain threshold.
4236 // TODO: In the AlwaysInline case, if the size is big then generate a loop
4237 // rather than maybe a humongous number of loads and stores.
4238 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
4239 std::vector<EVT> MemOps;
4240 bool DstAlignCanChange = false;
4241 MachineFunction &MF = DAG.getMachineFunction();
4242 MachineFrameInfo *MFI = MF.getFrameInfo();
4243 bool OptSize = shouldLowerMemFuncForSize(MF);
4244 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
4245 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
4246 DstAlignCanChange = true;
4247 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
4248 if (Align > SrcAlign)
4251 bool CopyFromStr = isMemSrcFromString(Src, Str);
4252 bool isZeroStr = CopyFromStr && Str.empty();
4253 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(OptSize);
4255 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
4256 (DstAlignCanChange ? 0 : Align),
4257 (isZeroStr ? 0 : SrcAlign),
4258 false, false, CopyFromStr, true, DAG, TLI))
4261 if (DstAlignCanChange) {
4262 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
4263 unsigned NewAlign = (unsigned)DAG.getDataLayout().getABITypeAlignment(Ty);
4265 // Don't promote to an alignment that would require dynamic stack
4267 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
4268 if (!TRI->needsStackRealignment(MF))
4269 while (NewAlign > Align &&
4270 DAG.getDataLayout().exceedsNaturalStackAlignment(NewAlign))
4273 if (NewAlign > Align) {
4274 // Give the stack frame object a larger alignment if needed.
4275 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
4276 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
4281 SmallVector<SDValue, 8> OutChains;
4282 unsigned NumMemOps = MemOps.size();
4283 uint64_t SrcOff = 0, DstOff = 0;
4284 for (unsigned i = 0; i != NumMemOps; ++i) {
4286 unsigned VTSize = VT.getSizeInBits() / 8;
4287 SDValue Value, Store;
4289 if (VTSize > Size) {
4290 // Issuing an unaligned load / store pair that overlaps with the previous
4291 // pair. Adjust the offset accordingly.
4292 assert(i == NumMemOps-1 && i != 0);
4293 SrcOff -= VTSize - Size;
4294 DstOff -= VTSize - Size;
4298 (isZeroStr || (VT.isInteger() && !VT.isVector()))) {
4299 // It's unlikely a store of a vector immediate can be done in a single
4300 // instruction. It would require a load from a constantpool first.
4301 // We only handle zero vectors here.
4302 // FIXME: Handle other cases where store of vector immediate is done in
4303 // a single instruction.
4304 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str.substr(SrcOff));
4305 if (Value.getNode())
4306 Store = DAG.getStore(Chain, dl, Value,
4307 getMemBasePlusOffset(Dst, DstOff, dl, DAG),
4308 DstPtrInfo.getWithOffset(DstOff), isVol,
4312 if (!Store.getNode()) {
4313 // The type might not be legal for the target. This should only happen
4314 // if the type is smaller than a legal type, as on PPC, so the right
4315 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify
4316 // to Load/Store if NVT==VT.
4317 // FIXME does the case above also need this?
4318 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
4319 assert(NVT.bitsGE(VT));
4320 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain,
4321 getMemBasePlusOffset(Src, SrcOff, dl, DAG),
4322 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false,
4323 false, MinAlign(SrcAlign, SrcOff));
4324 Store = DAG.getTruncStore(Chain, dl, Value,
4325 getMemBasePlusOffset(Dst, DstOff, dl, DAG),
4326 DstPtrInfo.getWithOffset(DstOff), VT, isVol,
4329 OutChains.push_back(Store);
4335 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains);
4338 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, SDLoc dl,
4339 SDValue Chain, SDValue Dst,
4340 SDValue Src, uint64_t Size,
4341 unsigned Align, bool isVol,
4343 MachinePointerInfo DstPtrInfo,
4344 MachinePointerInfo SrcPtrInfo) {
4345 // Turn a memmove of undef to nop.
4346 if (Src.getOpcode() == ISD::UNDEF)
4349 // Expand memmove to a series of load and store ops if the size operand falls
4350 // below a certain threshold.
4351 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
4352 std::vector<EVT> MemOps;
4353 bool DstAlignCanChange = false;
4354 MachineFunction &MF = DAG.getMachineFunction();
4355 MachineFrameInfo *MFI = MF.getFrameInfo();
4356 bool OptSize = shouldLowerMemFuncForSize(MF);
4357 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
4358 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
4359 DstAlignCanChange = true;
4360 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
4361 if (Align > SrcAlign)
4363 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(OptSize);
4365 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
4366 (DstAlignCanChange ? 0 : Align), SrcAlign,
4367 false, false, false, false, DAG, TLI))
4370 if (DstAlignCanChange) {
4371 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
4372 unsigned NewAlign = (unsigned)DAG.getDataLayout().getABITypeAlignment(Ty);
4373 if (NewAlign > Align) {
4374 // Give the stack frame object a larger alignment if needed.
4375 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
4376 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
4381 uint64_t SrcOff = 0, DstOff = 0;
4382 SmallVector<SDValue, 8> LoadValues;
4383 SmallVector<SDValue, 8> LoadChains;
4384 SmallVector<SDValue, 8> OutChains;
4385 unsigned NumMemOps = MemOps.size();
4386 for (unsigned i = 0; i < NumMemOps; i++) {
4388 unsigned VTSize = VT.getSizeInBits() / 8;
4391 Value = DAG.getLoad(VT, dl, Chain,
4392 getMemBasePlusOffset(Src, SrcOff, dl, DAG),
4393 SrcPtrInfo.getWithOffset(SrcOff), isVol,
4394 false, false, SrcAlign);
4395 LoadValues.push_back(Value);
4396 LoadChains.push_back(Value.getValue(1));
4399 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, LoadChains);
4401 for (unsigned i = 0; i < NumMemOps; i++) {
4403 unsigned VTSize = VT.getSizeInBits() / 8;
4406 Store = DAG.getStore(Chain, dl, LoadValues[i],
4407 getMemBasePlusOffset(Dst, DstOff, dl, DAG),
4408 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align);
4409 OutChains.push_back(Store);
4413 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains);
4416 /// \brief Lower the call to 'memset' intrinsic function into a series of store
4419 /// \param DAG Selection DAG where lowered code is placed.
4420 /// \param dl Link to corresponding IR location.
4421 /// \param Chain Control flow dependency.
4422 /// \param Dst Pointer to destination memory location.
4423 /// \param Src Value of byte to write into the memory.
4424 /// \param Size Number of bytes to write.
4425 /// \param Align Alignment of the destination in bytes.
4426 /// \param isVol True if destination is volatile.
4427 /// \param DstPtrInfo IR information on the memory pointer.
4428 /// \returns New head in the control flow, if lowering was successful, empty
4429 /// SDValue otherwise.
4431 /// The function tries to replace 'llvm.memset' intrinsic with several store
4432 /// operations and value calculation code. This is usually profitable for small
4434 static SDValue getMemsetStores(SelectionDAG &DAG, SDLoc dl,
4435 SDValue Chain, SDValue Dst,
4436 SDValue Src, uint64_t Size,
4437 unsigned Align, bool isVol,
4438 MachinePointerInfo DstPtrInfo) {
4439 // Turn a memset of undef to nop.
4440 if (Src.getOpcode() == ISD::UNDEF)
4443 // Expand memset to a series of load/store ops if the size operand
4444 // falls below a certain threshold.
4445 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
4446 std::vector<EVT> MemOps;
4447 bool DstAlignCanChange = false;
4448 MachineFunction &MF = DAG.getMachineFunction();
4449 MachineFrameInfo *MFI = MF.getFrameInfo();
4450 bool OptSize = shouldLowerMemFuncForSize(MF);
4451 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
4452 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
4453 DstAlignCanChange = true;
4455 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue();
4456 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(OptSize),
4457 Size, (DstAlignCanChange ? 0 : Align), 0,
4458 true, IsZeroVal, false, true, DAG, TLI))
4461 if (DstAlignCanChange) {
4462 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
4463 unsigned NewAlign = (unsigned)DAG.getDataLayout().getABITypeAlignment(Ty);
4464 if (NewAlign > Align) {
4465 // Give the stack frame object a larger alignment if needed.
4466 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
4467 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
4472 SmallVector<SDValue, 8> OutChains;
4473 uint64_t DstOff = 0;
4474 unsigned NumMemOps = MemOps.size();
4476 // Find the largest store and generate the bit pattern for it.
4477 EVT LargestVT = MemOps[0];
4478 for (unsigned i = 1; i < NumMemOps; i++)
4479 if (MemOps[i].bitsGT(LargestVT))
4480 LargestVT = MemOps[i];
4481 SDValue MemSetValue = getMemsetValue(Src, LargestVT, DAG, dl);
4483 for (unsigned i = 0; i < NumMemOps; i++) {
4485 unsigned VTSize = VT.getSizeInBits() / 8;
4486 if (VTSize > Size) {
4487 // Issuing an unaligned load / store pair that overlaps with the previous
4488 // pair. Adjust the offset accordingly.
4489 assert(i == NumMemOps-1 && i != 0);
4490 DstOff -= VTSize - Size;
4493 // If this store is smaller than the largest store see whether we can get
4494 // the smaller value for free with a truncate.
4495 SDValue Value = MemSetValue;
4496 if (VT.bitsLT(LargestVT)) {
4497 if (!LargestVT.isVector() && !VT.isVector() &&
4498 TLI.isTruncateFree(LargestVT, VT))
4499 Value = DAG.getNode(ISD::TRUNCATE, dl, VT, MemSetValue);
4501 Value = getMemsetValue(Src, VT, DAG, dl);
4503 assert(Value.getValueType() == VT && "Value with wrong type.");
4504 SDValue Store = DAG.getStore(Chain, dl, Value,
4505 getMemBasePlusOffset(Dst, DstOff, dl, DAG),
4506 DstPtrInfo.getWithOffset(DstOff),
4507 isVol, false, Align);
4508 OutChains.push_back(Store);
4509 DstOff += VT.getSizeInBits() / 8;
4513 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains);
4516 SDValue SelectionDAG::getMemcpy(SDValue Chain, SDLoc dl, SDValue Dst,
4517 SDValue Src, SDValue Size,
4518 unsigned Align, bool isVol, bool AlwaysInline,
4519 bool isTailCall, MachinePointerInfo DstPtrInfo,
4520 MachinePointerInfo SrcPtrInfo) {
4521 assert(Align && "The SDAG layer expects explicit alignment and reserves 0");
4523 // Check to see if we should lower the memcpy to loads and stores first.
4524 // For cases within the target-specified limits, this is the best choice.
4525 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
4527 // Memcpy with size zero? Just return the original chain.
4528 if (ConstantSize->isNullValue())
4531 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
4532 ConstantSize->getZExtValue(),Align,
4533 isVol, false, DstPtrInfo, SrcPtrInfo);
4534 if (Result.getNode())
4538 // Then check to see if we should lower the memcpy with target-specific
4539 // code. If the target chooses to do this, this is the next best.
4541 SDValue Result = TSI->EmitTargetCodeForMemcpy(
4542 *this, dl, Chain, Dst, Src, Size, Align, isVol, AlwaysInline,
4543 DstPtrInfo, SrcPtrInfo);
4544 if (Result.getNode())
4548 // If we really need inline code and the target declined to provide it,
4549 // use a (potentially long) sequence of loads and stores.
4551 assert(ConstantSize && "AlwaysInline requires a constant size!");
4552 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
4553 ConstantSize->getZExtValue(), Align, isVol,
4554 true, DstPtrInfo, SrcPtrInfo);
4557 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc
4558 // memcpy is not guaranteed to be safe. libc memcpys aren't required to
4559 // respect volatile, so they may do things like read or write memory
4560 // beyond the given memory regions. But fixing this isn't easy, and most
4561 // people don't care.
4563 // Emit a library call.
4564 TargetLowering::ArgListTy Args;
4565 TargetLowering::ArgListEntry Entry;
4566 Entry.Ty = getDataLayout().getIntPtrType(*getContext());
4567 Entry.Node = Dst; Args.push_back(Entry);
4568 Entry.Node = Src; Args.push_back(Entry);
4569 Entry.Node = Size; Args.push_back(Entry);
4570 // FIXME: pass in SDLoc
4571 TargetLowering::CallLoweringInfo CLI(*this);
4574 .setCallee(TLI->getLibcallCallingConv(RTLIB::MEMCPY),
4575 Type::getVoidTy(*getContext()),
4576 getExternalSymbol(TLI->getLibcallName(RTLIB::MEMCPY),
4577 TLI->getPointerTy(getDataLayout())),
4580 .setTailCall(isTailCall);
4582 std::pair<SDValue,SDValue> CallResult = TLI->LowerCallTo(CLI);
4583 return CallResult.second;
4586 SDValue SelectionDAG::getMemmove(SDValue Chain, SDLoc dl, SDValue Dst,
4587 SDValue Src, SDValue Size,
4588 unsigned Align, bool isVol, bool isTailCall,
4589 MachinePointerInfo DstPtrInfo,
4590 MachinePointerInfo SrcPtrInfo) {
4591 assert(Align && "The SDAG layer expects explicit alignment and reserves 0");
4593 // Check to see if we should lower the memmove to loads and stores first.
4594 // For cases within the target-specified limits, this is the best choice.
4595 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
4597 // Memmove with size zero? Just return the original chain.
4598 if (ConstantSize->isNullValue())
4602 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
4603 ConstantSize->getZExtValue(), Align, isVol,
4604 false, DstPtrInfo, SrcPtrInfo);
4605 if (Result.getNode())
4609 // Then check to see if we should lower the memmove with target-specific
4610 // code. If the target chooses to do this, this is the next best.
4612 SDValue Result = TSI->EmitTargetCodeForMemmove(
4613 *this, dl, Chain, Dst, Src, Size, Align, isVol, DstPtrInfo, SrcPtrInfo);
4614 if (Result.getNode())
4618 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may
4619 // not be safe. See memcpy above for more details.
4621 // Emit a library call.
4622 TargetLowering::ArgListTy Args;
4623 TargetLowering::ArgListEntry Entry;
4624 Entry.Ty = getDataLayout().getIntPtrType(*getContext());
4625 Entry.Node = Dst; Args.push_back(Entry);
4626 Entry.Node = Src; Args.push_back(Entry);
4627 Entry.Node = Size; Args.push_back(Entry);
4628 // FIXME: pass in SDLoc
4629 TargetLowering::CallLoweringInfo CLI(*this);
4632 .setCallee(TLI->getLibcallCallingConv(RTLIB::MEMMOVE),
4633 Type::getVoidTy(*getContext()),
4634 getExternalSymbol(TLI->getLibcallName(RTLIB::MEMMOVE),
4635 TLI->getPointerTy(getDataLayout())),
4638 .setTailCall(isTailCall);
4640 std::pair<SDValue,SDValue> CallResult = TLI->LowerCallTo(CLI);
4641 return CallResult.second;
4644 SDValue SelectionDAG::getMemset(SDValue Chain, SDLoc dl, SDValue Dst,
4645 SDValue Src, SDValue Size,
4646 unsigned Align, bool isVol, bool isTailCall,
4647 MachinePointerInfo DstPtrInfo) {
4648 assert(Align && "The SDAG layer expects explicit alignment and reserves 0");
4650 // Check to see if we should lower the memset to stores first.
4651 // For cases within the target-specified limits, this is the best choice.
4652 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
4654 // Memset with size zero? Just return the original chain.
4655 if (ConstantSize->isNullValue())
4659 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
4660 Align, isVol, DstPtrInfo);
4662 if (Result.getNode())
4666 // Then check to see if we should lower the memset with target-specific
4667 // code. If the target chooses to do this, this is the next best.
4669 SDValue Result = TSI->EmitTargetCodeForMemset(
4670 *this, dl, Chain, Dst, Src, Size, Align, isVol, DstPtrInfo);
4671 if (Result.getNode())
4675 // Emit a library call.
4676 Type *IntPtrTy = getDataLayout().getIntPtrType(*getContext());
4677 TargetLowering::ArgListTy Args;
4678 TargetLowering::ArgListEntry Entry;
4679 Entry.Node = Dst; Entry.Ty = IntPtrTy;
4680 Args.push_back(Entry);
4682 Entry.Ty = Src.getValueType().getTypeForEVT(*getContext());
4683 Args.push_back(Entry);
4685 Entry.Ty = IntPtrTy;
4686 Args.push_back(Entry);
4688 // FIXME: pass in SDLoc
4689 TargetLowering::CallLoweringInfo CLI(*this);
4692 .setCallee(TLI->getLibcallCallingConv(RTLIB::MEMSET),
4693 Type::getVoidTy(*getContext()),
4694 getExternalSymbol(TLI->getLibcallName(RTLIB::MEMSET),
4695 TLI->getPointerTy(getDataLayout())),
4698 .setTailCall(isTailCall);
4700 std::pair<SDValue,SDValue> CallResult = TLI->LowerCallTo(CLI);
4701 return CallResult.second;
4704 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4705 SDVTList VTList, ArrayRef<SDValue> Ops,
4706 MachineMemOperand *MMO,
4707 AtomicOrdering SuccessOrdering,
4708 AtomicOrdering FailureOrdering,
4709 SynchronizationScope SynchScope) {
4710 FoldingSetNodeID ID;
4711 ID.AddInteger(MemVT.getRawBits());
4712 AddNodeIDNode(ID, Opcode, VTList, Ops);
4713 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4715 if (SDNode *E = FindNodeOrInsertPos(ID, dl.getDebugLoc(), IP)) {
4716 cast<AtomicSDNode>(E)->refineAlignment(MMO);
4717 return SDValue(E, 0);
4720 // Allocate the operands array for the node out of the BumpPtrAllocator, since
4721 // SDNode doesn't have access to it. This memory will be "leaked" when
4722 // the node is deallocated, but recovered when the allocator is released.
4723 // If the number of operands is less than 5 we use AtomicSDNode's internal
4725 unsigned NumOps = Ops.size();
4726 SDUse *DynOps = NumOps > 4 ? OperandAllocator.Allocate<SDUse>(NumOps)
4729 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl.getIROrder(),
4730 dl.getDebugLoc(), VTList, MemVT,
4731 Ops.data(), DynOps, NumOps, MMO,
4732 SuccessOrdering, FailureOrdering,
4734 CSEMap.InsertNode(N, IP);
4736 return SDValue(N, 0);
4739 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4740 SDVTList VTList, ArrayRef<SDValue> Ops,
4741 MachineMemOperand *MMO,
4742 AtomicOrdering Ordering,
4743 SynchronizationScope SynchScope) {
4744 return getAtomic(Opcode, dl, MemVT, VTList, Ops, MMO, Ordering,
4745 Ordering, SynchScope);
4748 SDValue SelectionDAG::getAtomicCmpSwap(
4749 unsigned Opcode, SDLoc dl, EVT MemVT, SDVTList VTs, SDValue Chain,
4750 SDValue Ptr, SDValue Cmp, SDValue Swp, MachinePointerInfo PtrInfo,
4751 unsigned Alignment, AtomicOrdering SuccessOrdering,
4752 AtomicOrdering FailureOrdering, SynchronizationScope SynchScope) {
4753 assert(Opcode == ISD::ATOMIC_CMP_SWAP ||
4754 Opcode == ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS);
4755 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
4757 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4758 Alignment = getEVTAlignment(MemVT);
4760 MachineFunction &MF = getMachineFunction();
4762 // FIXME: Volatile isn't really correct; we should keep track of atomic
4763 // orderings in the memoperand.
4764 unsigned Flags = MachineMemOperand::MOVolatile;
4765 Flags |= MachineMemOperand::MOLoad;
4766 Flags |= MachineMemOperand::MOStore;
4768 MachineMemOperand *MMO =
4769 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment);
4771 return getAtomicCmpSwap(Opcode, dl, MemVT, VTs, Chain, Ptr, Cmp, Swp, MMO,
4772 SuccessOrdering, FailureOrdering, SynchScope);
4775 SDValue SelectionDAG::getAtomicCmpSwap(unsigned Opcode, SDLoc dl, EVT MemVT,
4776 SDVTList VTs, SDValue Chain, SDValue Ptr,
4777 SDValue Cmp, SDValue Swp,
4778 MachineMemOperand *MMO,
4779 AtomicOrdering SuccessOrdering,
4780 AtomicOrdering FailureOrdering,
4781 SynchronizationScope SynchScope) {
4782 assert(Opcode == ISD::ATOMIC_CMP_SWAP ||
4783 Opcode == ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS);
4784 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
4786 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
4787 return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO,
4788 SuccessOrdering, FailureOrdering, SynchScope);
4791 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4793 SDValue Ptr, SDValue Val,
4794 const Value* PtrVal,
4796 AtomicOrdering Ordering,
4797 SynchronizationScope SynchScope) {
4798 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4799 Alignment = getEVTAlignment(MemVT);
4801 MachineFunction &MF = getMachineFunction();
4802 // An atomic store does not load. An atomic load does not store.
4803 // (An atomicrmw obviously both loads and stores.)
4804 // For now, atomics are considered to be volatile always, and they are
4806 // FIXME: Volatile isn't really correct; we should keep track of atomic
4807 // orderings in the memoperand.
4808 unsigned Flags = MachineMemOperand::MOVolatile;
4809 if (Opcode != ISD::ATOMIC_STORE)
4810 Flags |= MachineMemOperand::MOLoad;
4811 if (Opcode != ISD::ATOMIC_LOAD)
4812 Flags |= MachineMemOperand::MOStore;
4814 MachineMemOperand *MMO =
4815 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
4816 MemVT.getStoreSize(), Alignment);
4818 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO,
4819 Ordering, SynchScope);
4822 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4824 SDValue Ptr, SDValue Val,
4825 MachineMemOperand *MMO,
4826 AtomicOrdering Ordering,
4827 SynchronizationScope SynchScope) {
4828 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
4829 Opcode == ISD::ATOMIC_LOAD_SUB ||
4830 Opcode == ISD::ATOMIC_LOAD_AND ||
4831 Opcode == ISD::ATOMIC_LOAD_OR ||
4832 Opcode == ISD::ATOMIC_LOAD_XOR ||
4833 Opcode == ISD::ATOMIC_LOAD_NAND ||
4834 Opcode == ISD::ATOMIC_LOAD_MIN ||
4835 Opcode == ISD::ATOMIC_LOAD_MAX ||
4836 Opcode == ISD::ATOMIC_LOAD_UMIN ||
4837 Opcode == ISD::ATOMIC_LOAD_UMAX ||
4838 Opcode == ISD::ATOMIC_SWAP ||
4839 Opcode == ISD::ATOMIC_STORE) &&
4840 "Invalid Atomic Op");
4842 EVT VT = Val.getValueType();
4844 SDVTList VTs = Opcode == ISD::ATOMIC_STORE ? getVTList(MVT::Other) :
4845 getVTList(VT, MVT::Other);
4846 SDValue Ops[] = {Chain, Ptr, Val};
4847 return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO, Ordering, SynchScope);
4850 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4851 EVT VT, SDValue Chain,
4853 MachineMemOperand *MMO,
4854 AtomicOrdering Ordering,
4855 SynchronizationScope SynchScope) {
4856 assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op");
4858 SDVTList VTs = getVTList(VT, MVT::Other);
4859 SDValue Ops[] = {Chain, Ptr};
4860 return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO, Ordering, SynchScope);
4863 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
4864 SDValue SelectionDAG::getMergeValues(ArrayRef<SDValue> Ops, SDLoc dl) {
4865 if (Ops.size() == 1)
4868 SmallVector<EVT, 4> VTs;
4869 VTs.reserve(Ops.size());
4870 for (unsigned i = 0; i < Ops.size(); ++i)
4871 VTs.push_back(Ops[i].getValueType());
4872 return getNode(ISD::MERGE_VALUES, dl, getVTList(VTs), Ops);
4876 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDLoc dl, SDVTList VTList,
4877 ArrayRef<SDValue> Ops,
4878 EVT MemVT, MachinePointerInfo PtrInfo,
4879 unsigned Align, bool Vol,
4880 bool ReadMem, bool WriteMem, unsigned Size) {
4881 if (Align == 0) // Ensure that codegen never sees alignment 0
4882 Align = getEVTAlignment(MemVT);
4884 MachineFunction &MF = getMachineFunction();
4887 Flags |= MachineMemOperand::MOStore;
4889 Flags |= MachineMemOperand::MOLoad;
4891 Flags |= MachineMemOperand::MOVolatile;
4893 Size = MemVT.getStoreSize();
4894 MachineMemOperand *MMO =
4895 MF.getMachineMemOperand(PtrInfo, Flags, Size, Align);
4897 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, MemVT, MMO);
4901 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDLoc dl, SDVTList VTList,
4902 ArrayRef<SDValue> Ops, EVT MemVT,
4903 MachineMemOperand *MMO) {
4904 assert((Opcode == ISD::INTRINSIC_VOID ||
4905 Opcode == ISD::INTRINSIC_W_CHAIN ||
4906 Opcode == ISD::PREFETCH ||
4907 Opcode == ISD::LIFETIME_START ||
4908 Opcode == ISD::LIFETIME_END ||
4909 (Opcode <= INT_MAX &&
4910 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) &&
4911 "Opcode is not a memory-accessing opcode!");
4913 // Memoize the node unless it returns a flag.
4914 MemIntrinsicSDNode *N;
4915 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
4916 FoldingSetNodeID ID;
4917 AddNodeIDNode(ID, Opcode, VTList, Ops);
4918 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4920 if (SDNode *E = FindNodeOrInsertPos(ID, dl.getDebugLoc(), IP)) {
4921 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO);
4922 return SDValue(E, 0);
4925 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl.getIROrder(),
4926 dl.getDebugLoc(), VTList, Ops,
4928 CSEMap.InsertNode(N, IP);
4930 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl.getIROrder(),
4931 dl.getDebugLoc(), VTList, Ops,
4935 return SDValue(N, 0);
4938 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4939 /// MachinePointerInfo record from it. This is particularly useful because the
4940 /// code generator has many cases where it doesn't bother passing in a
4941 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4942 static MachinePointerInfo InferPointerInfo(SelectionDAG &DAG, SDValue Ptr,
4943 int64_t Offset = 0) {
4944 // If this is FI+Offset, we can model it.
4945 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr))
4946 return MachinePointerInfo::getFixedStack(DAG.getMachineFunction(),
4947 FI->getIndex(), Offset);
4949 // If this is (FI+Offset1)+Offset2, we can model it.
4950 if (Ptr.getOpcode() != ISD::ADD ||
4951 !isa<ConstantSDNode>(Ptr.getOperand(1)) ||
4952 !isa<FrameIndexSDNode>(Ptr.getOperand(0)))
4953 return MachinePointerInfo();
4955 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
4956 return MachinePointerInfo::getFixedStack(
4957 DAG.getMachineFunction(), FI,
4958 Offset + cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue());
4961 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4962 /// MachinePointerInfo record from it. This is particularly useful because the
4963 /// code generator has many cases where it doesn't bother passing in a
4964 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4965 static MachinePointerInfo InferPointerInfo(SelectionDAG &DAG, SDValue Ptr,
4967 // If the 'Offset' value isn't a constant, we can't handle this.
4968 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp))
4969 return InferPointerInfo(DAG, Ptr, OffsetNode->getSExtValue());
4970 if (OffsetOp.getOpcode() == ISD::UNDEF)
4971 return InferPointerInfo(DAG, Ptr);
4972 return MachinePointerInfo();
4977 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4978 EVT VT, SDLoc dl, SDValue Chain,
4979 SDValue Ptr, SDValue Offset,
4980 MachinePointerInfo PtrInfo, EVT MemVT,
4981 bool isVolatile, bool isNonTemporal, bool isInvariant,
4982 unsigned Alignment, const AAMDNodes &AAInfo,
4983 const MDNode *Ranges) {
4984 assert(Chain.getValueType() == MVT::Other &&
4985 "Invalid chain type");
4986 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4987 Alignment = getEVTAlignment(VT);
4989 unsigned Flags = MachineMemOperand::MOLoad;
4991 Flags |= MachineMemOperand::MOVolatile;
4993 Flags |= MachineMemOperand::MONonTemporal;
4995 Flags |= MachineMemOperand::MOInvariant;
4997 // If we don't have a PtrInfo, infer the trivial frame index case to simplify
4999 if (PtrInfo.V.isNull())
5000 PtrInfo = InferPointerInfo(*this, Ptr, Offset);
5002 MachineFunction &MF = getMachineFunction();
5003 MachineMemOperand *MMO =
5004 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment,
5006 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO);
5010 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
5011 EVT VT, SDLoc dl, SDValue Chain,
5012 SDValue Ptr, SDValue Offset, EVT MemVT,
5013 MachineMemOperand *MMO) {
5015 ExtType = ISD::NON_EXTLOAD;
5016 } else if (ExtType == ISD::NON_EXTLOAD) {
5017 assert(VT == MemVT && "Non-extending load from different memory type!");
5020 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) &&
5021 "Should only be an extending load, not truncating!");
5022 assert(VT.isInteger() == MemVT.isInteger() &&
5023 "Cannot convert from FP to Int or Int -> FP!");
5024 assert(VT.isVector() == MemVT.isVector() &&
5025 "Cannot use an ext load to convert to or from a vector!");
5026 assert((!VT.isVector() ||
5027 VT.getVectorNumElements() == MemVT.getVectorNumElements()) &&
5028 "Cannot use an ext load to change the number of vector elements!");
5031 bool Indexed = AM != ISD::UNINDEXED;
5032 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
5033 "Unindexed load with an offset!");
5035 SDVTList VTs = Indexed ?
5036 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
5037 SDValue Ops[] = { Chain, Ptr, Offset };
5038 FoldingSetNodeID ID;
5039 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops);
5040 ID.AddInteger(MemVT.getRawBits());
5041 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(),
5042 MMO->isNonTemporal(),
5043 MMO->isInvariant()));
5044 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
5046 if (SDNode *E = FindNodeOrInsertPos(ID, dl.getDebugLoc(), IP)) {
5047 cast<LoadSDNode>(E)->refineAlignment(MMO);
5048 return SDValue(E, 0);
5050 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl.getIROrder(),
5051 dl.getDebugLoc(), VTs, AM, ExtType,
5053 CSEMap.InsertNode(N, IP);
5055 return SDValue(N, 0);
5058 SDValue SelectionDAG::getLoad(EVT VT, SDLoc dl,
5059 SDValue Chain, SDValue Ptr,
5060 MachinePointerInfo PtrInfo,
5061 bool isVolatile, bool isNonTemporal,
5062 bool isInvariant, unsigned Alignment,
5063 const AAMDNodes &AAInfo,
5064 const MDNode *Ranges) {
5065 SDValue Undef = getUNDEF(Ptr.getValueType());
5066 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
5067 PtrInfo, VT, isVolatile, isNonTemporal, isInvariant, Alignment,
5071 SDValue SelectionDAG::getLoad(EVT VT, SDLoc dl,
5072 SDValue Chain, SDValue Ptr,
5073 MachineMemOperand *MMO) {
5074 SDValue Undef = getUNDEF(Ptr.getValueType());
5075 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
5079 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, SDLoc dl, EVT VT,
5080 SDValue Chain, SDValue Ptr,
5081 MachinePointerInfo PtrInfo, EVT MemVT,
5082 bool isVolatile, bool isNonTemporal,
5083 bool isInvariant, unsigned Alignment,
5084 const AAMDNodes &AAInfo) {
5085 SDValue Undef = getUNDEF(Ptr.getValueType());
5086 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
5087 PtrInfo, MemVT, isVolatile, isNonTemporal, isInvariant,
5092 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, SDLoc dl, EVT VT,
5093 SDValue Chain, SDValue Ptr, EVT MemVT,
5094 MachineMemOperand *MMO) {
5095 SDValue Undef = getUNDEF(Ptr.getValueType());
5096 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
5101 SelectionDAG::getIndexedLoad(SDValue OrigLoad, SDLoc dl, SDValue Base,
5102 SDValue Offset, ISD::MemIndexedMode AM) {
5103 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
5104 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
5105 "Load is already a indexed load!");
5106 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl,
5107 LD->getChain(), Base, Offset, LD->getPointerInfo(),
5108 LD->getMemoryVT(), LD->isVolatile(), LD->isNonTemporal(),
5109 false, LD->getAlignment());
5112 SDValue SelectionDAG::getStore(SDValue Chain, SDLoc dl, SDValue Val,
5113 SDValue Ptr, MachinePointerInfo PtrInfo,
5114 bool isVolatile, bool isNonTemporal,
5115 unsigned Alignment, const AAMDNodes &AAInfo) {
5116 assert(Chain.getValueType() == MVT::Other &&
5117 "Invalid chain type");
5118 if (Alignment == 0) // Ensure that codegen never sees alignment 0
5119 Alignment = getEVTAlignment(Val.getValueType());
5121 unsigned Flags = MachineMemOperand::MOStore;
5123 Flags |= MachineMemOperand::MOVolatile;
5125 Flags |= MachineMemOperand::MONonTemporal;
5127 if (PtrInfo.V.isNull())
5128 PtrInfo = InferPointerInfo(*this, Ptr);
5130 MachineFunction &MF = getMachineFunction();
5131 MachineMemOperand *MMO =
5132 MF.getMachineMemOperand(PtrInfo, Flags,
5133 Val.getValueType().getStoreSize(), Alignment,
5136 return getStore(Chain, dl, Val, Ptr, MMO);
5139 SDValue SelectionDAG::getStore(SDValue Chain, SDLoc dl, SDValue Val,
5140 SDValue Ptr, MachineMemOperand *MMO) {
5141 assert(Chain.getValueType() == MVT::Other &&
5142 "Invalid chain type");
5143 EVT VT = Val.getValueType();
5144 SDVTList VTs = getVTList(MVT::Other);
5145 SDValue Undef = getUNDEF(Ptr.getValueType());
5146 SDValue Ops[] = { Chain, Val, Ptr, Undef };
5147 FoldingSetNodeID ID;
5148 AddNodeIDNode(ID, ISD::STORE, VTs, Ops);
5149 ID.AddInteger(VT.getRawBits());
5150 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
5151 MMO->isNonTemporal(), MMO->isInvariant()));
5152 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
5154 if (SDNode *E = FindNodeOrInsertPos(ID, dl.getDebugLoc(), IP)) {
5155 cast<StoreSDNode>(E)->refineAlignment(MMO);
5156 return SDValue(E, 0);
5158 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl.getIROrder(),
5159 dl.getDebugLoc(), VTs,
5160 ISD::UNINDEXED, false, VT, MMO);
5161 CSEMap.InsertNode(N, IP);
5163 return SDValue(N, 0);
5166 SDValue SelectionDAG::getTruncStore(SDValue Chain, SDLoc dl, SDValue Val,
5167 SDValue Ptr, MachinePointerInfo PtrInfo,
5168 EVT SVT,bool isVolatile, bool isNonTemporal,
5170 const AAMDNodes &AAInfo) {
5171 assert(Chain.getValueType() == MVT::Other &&
5172 "Invalid chain type");
5173 if (Alignment == 0) // Ensure that codegen never sees alignment 0
5174 Alignment = getEVTAlignment(SVT);
5176 unsigned Flags = MachineMemOperand::MOStore;
5178 Flags |= MachineMemOperand::MOVolatile;
5180 Flags |= MachineMemOperand::MONonTemporal;
5182 if (PtrInfo.V.isNull())
5183 PtrInfo = InferPointerInfo(*this, Ptr);
5185 MachineFunction &MF = getMachineFunction();
5186 MachineMemOperand *MMO =
5187 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment,
5190 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO);
5193 SDValue SelectionDAG::getTruncStore(SDValue Chain, SDLoc dl, SDValue Val,
5194 SDValue Ptr, EVT SVT,
5195 MachineMemOperand *MMO) {
5196 EVT VT = Val.getValueType();
5198 assert(Chain.getValueType() == MVT::Other &&
5199 "Invalid chain type");
5201 return getStore(Chain, dl, Val, Ptr, MMO);
5203 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) &&
5204 "Should only be a truncating store, not extending!");
5205 assert(VT.isInteger() == SVT.isInteger() &&
5206 "Can't do FP-INT conversion!");
5207 assert(VT.isVector() == SVT.isVector() &&
5208 "Cannot use trunc store to convert to or from a vector!");
5209 assert((!VT.isVector() ||
5210 VT.getVectorNumElements() == SVT.getVectorNumElements()) &&
5211 "Cannot use trunc store to change the number of vector elements!");
5213 SDVTList VTs = getVTList(MVT::Other);
5214 SDValue Undef = getUNDEF(Ptr.getValueType());
5215 SDValue Ops[] = { Chain, Val, Ptr, Undef };
5216 FoldingSetNodeID ID;
5217 AddNodeIDNode(ID, ISD::STORE, VTs, Ops);
5218 ID.AddInteger(SVT.getRawBits());
5219 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(),
5220 MMO->isNonTemporal(), MMO->isInvariant()));
5221 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
5223 if (SDNode *E = FindNodeOrInsertPos(ID, dl.getDebugLoc(), IP)) {
5224 cast<StoreSDNode>(E)->refineAlignment(MMO);
5225 return SDValue(E, 0);
5227 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl.getIROrder(),
5228 dl.getDebugLoc(), VTs,
5229 ISD::UNINDEXED, true, SVT, MMO);
5230 CSEMap.InsertNode(N, IP);
5232 return SDValue(N, 0);
5236 SelectionDAG::getIndexedStore(SDValue OrigStore, SDLoc dl, SDValue Base,
5237 SDValue Offset, ISD::MemIndexedMode AM) {
5238 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
5239 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
5240 "Store is already a indexed store!");
5241 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
5242 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
5243 FoldingSetNodeID ID;
5244 AddNodeIDNode(ID, ISD::STORE, VTs, Ops);
5245 ID.AddInteger(ST->getMemoryVT().getRawBits());
5246 ID.AddInteger(ST->getRawSubclassData());
5247 ID.AddInteger(ST->getPointerInfo().getAddrSpace());
5249 if (SDNode *E = FindNodeOrInsertPos(ID, dl.getDebugLoc(), IP))
5250 return SDValue(E, 0);
5252 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl.getIROrder(),
5253 dl.getDebugLoc(), VTs, AM,
5254 ST->isTruncatingStore(),
5256 ST->getMemOperand());
5257 CSEMap.InsertNode(N, IP);
5259 return SDValue(N, 0);
5263 SelectionDAG::getMaskedLoad(EVT VT, SDLoc dl, SDValue Chain,
5264 SDValue Ptr, SDValue Mask, SDValue Src0, EVT MemVT,
5265 MachineMemOperand *MMO, ISD::LoadExtType ExtTy) {
5267 SDVTList VTs = getVTList(VT, MVT::Other);
5268 SDValue Ops[] = { Chain, Ptr, Mask, Src0 };
5269 FoldingSetNodeID ID;
5270 AddNodeIDNode(ID, ISD::MLOAD, VTs, Ops);
5271 ID.AddInteger(VT.getRawBits());
5272 ID.AddInteger(encodeMemSDNodeFlags(ExtTy, ISD::UNINDEXED,
5274 MMO->isNonTemporal(),
5275 MMO->isInvariant()));
5276 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
5278 if (SDNode *E = FindNodeOrInsertPos(ID, dl.getDebugLoc(), IP)) {
5279 cast<MaskedLoadSDNode>(E)->refineAlignment(MMO);
5280 return SDValue(E, 0);
5282 SDNode *N = new (NodeAllocator) MaskedLoadSDNode(dl.getIROrder(),
5283 dl.getDebugLoc(), Ops, 4, VTs,
5285 CSEMap.InsertNode(N, IP);
5287 return SDValue(N, 0);
5290 SDValue SelectionDAG::getMaskedStore(SDValue Chain, SDLoc dl, SDValue Val,
5291 SDValue Ptr, SDValue Mask, EVT MemVT,
5292 MachineMemOperand *MMO, bool isTrunc) {
5293 assert(Chain.getValueType() == MVT::Other &&
5294 "Invalid chain type");
5295 EVT VT = Val.getValueType();
5296 SDVTList VTs = getVTList(MVT::Other);
5297 SDValue Ops[] = { Chain, Ptr, Mask, Val };
5298 FoldingSetNodeID ID;
5299 AddNodeIDNode(ID, ISD::MSTORE, VTs, Ops);
5300 ID.AddInteger(VT.getRawBits());
5301 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
5302 MMO->isNonTemporal(), MMO->isInvariant()));
5303 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
5305 if (SDNode *E = FindNodeOrInsertPos(ID, dl.getDebugLoc(), IP)) {
5306 cast<MaskedStoreSDNode>(E)->refineAlignment(MMO);
5307 return SDValue(E, 0);
5309 SDNode *N = new (NodeAllocator) MaskedStoreSDNode(dl.getIROrder(),
5310 dl.getDebugLoc(), Ops, 4,
5311 VTs, isTrunc, MemVT, MMO);
5312 CSEMap.InsertNode(N, IP);
5314 return SDValue(N, 0);
5318 SelectionDAG::getMaskedGather(SDVTList VTs, EVT VT, SDLoc dl,
5319 ArrayRef<SDValue> Ops,
5320 MachineMemOperand *MMO) {
5322 FoldingSetNodeID ID;
5323 AddNodeIDNode(ID, ISD::MGATHER, VTs, Ops);
5324 ID.AddInteger(VT.getRawBits());
5325 ID.AddInteger(encodeMemSDNodeFlags(ISD::NON_EXTLOAD, ISD::UNINDEXED,
5327 MMO->isNonTemporal(),
5328 MMO->isInvariant()));
5329 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
5331 if (SDNode *E = FindNodeOrInsertPos(ID, dl.getDebugLoc(), IP)) {
5332 cast<MaskedGatherSDNode>(E)->refineAlignment(MMO);
5333 return SDValue(E, 0);
5335 MaskedGatherSDNode *N =
5336 new (NodeAllocator) MaskedGatherSDNode(dl.getIROrder(), dl.getDebugLoc(),
5338 CSEMap.InsertNode(N, IP);
5340 return SDValue(N, 0);
5343 SDValue SelectionDAG::getMaskedScatter(SDVTList VTs, EVT VT, SDLoc dl,
5344 ArrayRef<SDValue> Ops,
5345 MachineMemOperand *MMO) {
5346 FoldingSetNodeID ID;
5347 AddNodeIDNode(ID, ISD::MSCATTER, VTs, Ops);
5348 ID.AddInteger(VT.getRawBits());
5349 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
5350 MMO->isNonTemporal(),
5351 MMO->isInvariant()));
5352 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
5354 if (SDNode *E = FindNodeOrInsertPos(ID, dl.getDebugLoc(), IP)) {
5355 cast<MaskedScatterSDNode>(E)->refineAlignment(MMO);
5356 return SDValue(E, 0);
5359 new (NodeAllocator) MaskedScatterSDNode(dl.getIROrder(), dl.getDebugLoc(),
5361 CSEMap.InsertNode(N, IP);
5363 return SDValue(N, 0);
5366 SDValue SelectionDAG::getVAArg(EVT VT, SDLoc dl,
5367 SDValue Chain, SDValue Ptr,
5370 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, dl, MVT::i32) };
5371 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops);
5374 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
5375 ArrayRef<SDUse> Ops) {
5376 switch (Ops.size()) {
5377 case 0: return getNode(Opcode, DL, VT);
5378 case 1: return getNode(Opcode, DL, VT, static_cast<const SDValue>(Ops[0]));
5379 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
5380 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
5384 // Copy from an SDUse array into an SDValue array for use with
5385 // the regular getNode logic.
5386 SmallVector<SDValue, 8> NewOps(Ops.begin(), Ops.end());
5387 return getNode(Opcode, DL, VT, NewOps);
5390 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
5391 ArrayRef<SDValue> Ops) {
5392 unsigned NumOps = Ops.size();
5394 case 0: return getNode(Opcode, DL, VT);
5395 case 1: return getNode(Opcode, DL, VT, Ops[0]);
5396 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
5397 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
5403 case ISD::SELECT_CC: {
5404 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
5405 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
5406 "LHS and RHS of condition must have same type!");
5407 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
5408 "True and False arms of SelectCC must have same type!");
5409 assert(Ops[2].getValueType() == VT &&
5410 "select_cc node must be of same type as true and false value!");
5414 assert(NumOps == 5 && "BR_CC takes 5 operands!");
5415 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
5416 "LHS/RHS of comparison should match types!");
5423 SDVTList VTs = getVTList(VT);
5425 if (VT != MVT::Glue) {
5426 FoldingSetNodeID ID;
5427 AddNodeIDNode(ID, Opcode, VTs, Ops);
5430 if (SDNode *E = FindNodeOrInsertPos(ID, DL.getDebugLoc(), IP))
5431 return SDValue(E, 0);
5433 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
5435 CSEMap.InsertNode(N, IP);
5437 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
5442 return SDValue(N, 0);
5445 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL,
5446 ArrayRef<EVT> ResultTys, ArrayRef<SDValue> Ops) {
5447 return getNode(Opcode, DL, getVTList(ResultTys), Ops);
5450 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5451 ArrayRef<SDValue> Ops) {
5452 if (VTList.NumVTs == 1)
5453 return getNode(Opcode, DL, VTList.VTs[0], Ops);
5457 // FIXME: figure out how to safely handle things like
5458 // int foo(int x) { return 1 << (x & 255); }
5459 // int bar() { return foo(256); }
5460 case ISD::SRA_PARTS:
5461 case ISD::SRL_PARTS:
5462 case ISD::SHL_PARTS:
5463 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
5464 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
5465 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
5466 else if (N3.getOpcode() == ISD::AND)
5467 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
5468 // If the and is only masking out bits that cannot effect the shift,
5469 // eliminate the and.
5470 unsigned NumBits = VT.getScalarType().getSizeInBits()*2;
5471 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
5472 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
5478 // Memoize the node unless it returns a flag.
5480 unsigned NumOps = Ops.size();
5481 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
5482 FoldingSetNodeID ID;
5483 AddNodeIDNode(ID, Opcode, VTList, Ops);
5485 if (SDNode *E = FindNodeOrInsertPos(ID, DL.getDebugLoc(), IP))
5486 return SDValue(E, 0);
5489 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(),
5490 DL.getDebugLoc(), VTList, Ops[0]);
5491 } else if (NumOps == 2) {
5492 N = new (NodeAllocator) BinarySDNode(Opcode, DL.getIROrder(),
5493 DL.getDebugLoc(), VTList, Ops[0],
5495 } else if (NumOps == 3) {
5496 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(),
5497 DL.getDebugLoc(), VTList, Ops[0],
5500 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
5503 CSEMap.InsertNode(N, IP);
5506 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(),
5507 DL.getDebugLoc(), VTList, Ops[0]);
5508 } else if (NumOps == 2) {
5509 N = new (NodeAllocator) BinarySDNode(Opcode, DL.getIROrder(),
5510 DL.getDebugLoc(), VTList, Ops[0],
5512 } else if (NumOps == 3) {
5513 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(),
5514 DL.getDebugLoc(), VTList, Ops[0],
5517 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
5522 return SDValue(N, 0);
5525 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList) {
5526 return getNode(Opcode, DL, VTList, None);
5529 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5531 SDValue Ops[] = { N1 };
5532 return getNode(Opcode, DL, VTList, Ops);
5535 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5536 SDValue N1, SDValue N2) {
5537 SDValue Ops[] = { N1, N2 };
5538 return getNode(Opcode, DL, VTList, Ops);
5541 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5542 SDValue N1, SDValue N2, SDValue N3) {
5543 SDValue Ops[] = { N1, N2, N3 };
5544 return getNode(Opcode, DL, VTList, Ops);
5547 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5548 SDValue N1, SDValue N2, SDValue N3,
5550 SDValue Ops[] = { N1, N2, N3, N4 };
5551 return getNode(Opcode, DL, VTList, Ops);
5554 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5555 SDValue N1, SDValue N2, SDValue N3,
5556 SDValue N4, SDValue N5) {
5557 SDValue Ops[] = { N1, N2, N3, N4, N5 };
5558 return getNode(Opcode, DL, VTList, Ops);
5561 SDVTList SelectionDAG::getVTList(EVT VT) {
5562 return makeVTList(SDNode::getValueTypeList(VT), 1);
5565 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
5566 FoldingSetNodeID ID;
5568 ID.AddInteger(VT1.getRawBits());
5569 ID.AddInteger(VT2.getRawBits());
5572 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5574 EVT *Array = Allocator.Allocate<EVT>(2);
5577 Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, 2);
5578 VTListMap.InsertNode(Result, IP);
5580 return Result->getSDVTList();
5583 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
5584 FoldingSetNodeID ID;
5586 ID.AddInteger(VT1.getRawBits());
5587 ID.AddInteger(VT2.getRawBits());
5588 ID.AddInteger(VT3.getRawBits());
5591 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5593 EVT *Array = Allocator.Allocate<EVT>(3);
5597 Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, 3);
5598 VTListMap.InsertNode(Result, IP);
5600 return Result->getSDVTList();
5603 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
5604 FoldingSetNodeID ID;
5606 ID.AddInteger(VT1.getRawBits());
5607 ID.AddInteger(VT2.getRawBits());
5608 ID.AddInteger(VT3.getRawBits());
5609 ID.AddInteger(VT4.getRawBits());
5612 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5614 EVT *Array = Allocator.Allocate<EVT>(4);
5619 Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, 4);
5620 VTListMap.InsertNode(Result, IP);
5622 return Result->getSDVTList();
5625 SDVTList SelectionDAG::getVTList(ArrayRef<EVT> VTs) {
5626 unsigned NumVTs = VTs.size();
5627 FoldingSetNodeID ID;
5628 ID.AddInteger(NumVTs);
5629 for (unsigned index = 0; index < NumVTs; index++) {
5630 ID.AddInteger(VTs[index].getRawBits());
5634 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5636 EVT *Array = Allocator.Allocate<EVT>(NumVTs);
5637 std::copy(VTs.begin(), VTs.end(), Array);
5638 Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, NumVTs);
5639 VTListMap.InsertNode(Result, IP);
5641 return Result->getSDVTList();
5645 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
5646 /// specified operands. If the resultant node already exists in the DAG,
5647 /// this does not modify the specified node, instead it returns the node that
5648 /// already exists. If the resultant node does not exist in the DAG, the
5649 /// input node is returned. As a degenerate case, if you specify the same
5650 /// input operands as the node already has, the input node is returned.
5651 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) {
5652 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
5654 // Check to see if there is no change.
5655 if (Op == N->getOperand(0)) return N;
5657 // See if the modified node already exists.
5658 void *InsertPos = nullptr;
5659 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
5662 // Nope it doesn't. Remove the node from its current place in the maps.
5664 if (!RemoveNodeFromCSEMaps(N))
5665 InsertPos = nullptr;
5667 // Now we update the operands.
5668 N->OperandList[0].set(Op);
5670 // If this gets put into a CSE map, add it.
5671 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
5675 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) {
5676 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
5678 // Check to see if there is no change.
5679 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
5680 return N; // No operands changed, just return the input node.
5682 // See if the modified node already exists.
5683 void *InsertPos = nullptr;
5684 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
5687 // Nope it doesn't. Remove the node from its current place in the maps.
5689 if (!RemoveNodeFromCSEMaps(N))
5690 InsertPos = nullptr;
5692 // Now we update the operands.
5693 if (N->OperandList[0] != Op1)
5694 N->OperandList[0].set(Op1);
5695 if (N->OperandList[1] != Op2)
5696 N->OperandList[1].set(Op2);
5698 // If this gets put into a CSE map, add it.
5699 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
5703 SDNode *SelectionDAG::
5704 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) {
5705 SDValue Ops[] = { Op1, Op2, Op3 };
5706 return UpdateNodeOperands(N, Ops);
5709 SDNode *SelectionDAG::
5710 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
5711 SDValue Op3, SDValue Op4) {
5712 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
5713 return UpdateNodeOperands(N, Ops);
5716 SDNode *SelectionDAG::
5717 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
5718 SDValue Op3, SDValue Op4, SDValue Op5) {
5719 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
5720 return UpdateNodeOperands(N, Ops);
5723 SDNode *SelectionDAG::
5724 UpdateNodeOperands(SDNode *N, ArrayRef<SDValue> Ops) {
5725 unsigned NumOps = Ops.size();
5726 assert(N->getNumOperands() == NumOps &&
5727 "Update with wrong number of operands");
5729 // If no operands changed just return the input node.
5730 if (std::equal(Ops.begin(), Ops.end(), N->op_begin()))
5733 // See if the modified node already exists.
5734 void *InsertPos = nullptr;
5735 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, InsertPos))
5738 // Nope it doesn't. Remove the node from its current place in the maps.
5740 if (!RemoveNodeFromCSEMaps(N))
5741 InsertPos = nullptr;
5743 // Now we update the operands.
5744 for (unsigned i = 0; i != NumOps; ++i)
5745 if (N->OperandList[i] != Ops[i])
5746 N->OperandList[i].set(Ops[i]);
5748 // If this gets put into a CSE map, add it.
5749 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
5753 /// DropOperands - Release the operands and set this node to have
5755 void SDNode::DropOperands() {
5756 // Unlike the code in MorphNodeTo that does this, we don't need to
5757 // watch for dead nodes here.
5758 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
5764 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
5767 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5769 SDVTList VTs = getVTList(VT);
5770 return SelectNodeTo(N, MachineOpc, VTs, None);
5773 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5774 EVT VT, SDValue Op1) {
5775 SDVTList VTs = getVTList(VT);
5776 SDValue Ops[] = { Op1 };
5777 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5780 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5781 EVT VT, SDValue Op1,
5783 SDVTList VTs = getVTList(VT);
5784 SDValue Ops[] = { Op1, Op2 };
5785 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5788 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5789 EVT VT, SDValue Op1,
5790 SDValue Op2, SDValue Op3) {
5791 SDVTList VTs = getVTList(VT);
5792 SDValue Ops[] = { Op1, Op2, Op3 };
5793 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5796 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5797 EVT VT, ArrayRef<SDValue> Ops) {
5798 SDVTList VTs = getVTList(VT);
5799 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5802 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5803 EVT VT1, EVT VT2, ArrayRef<SDValue> Ops) {
5804 SDVTList VTs = getVTList(VT1, VT2);
5805 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5808 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5810 SDVTList VTs = getVTList(VT1, VT2);
5811 return SelectNodeTo(N, MachineOpc, VTs, None);
5814 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5815 EVT VT1, EVT VT2, EVT VT3,
5816 ArrayRef<SDValue> Ops) {
5817 SDVTList VTs = getVTList(VT1, VT2, VT3);
5818 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5821 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5822 EVT VT1, EVT VT2, EVT VT3, EVT VT4,
5823 ArrayRef<SDValue> Ops) {
5824 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
5825 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5828 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5831 SDVTList VTs = getVTList(VT1, VT2);
5832 SDValue Ops[] = { Op1 };
5833 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5836 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5838 SDValue Op1, SDValue Op2) {
5839 SDVTList VTs = getVTList(VT1, VT2);
5840 SDValue Ops[] = { Op1, Op2 };
5841 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5844 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5846 SDValue Op1, SDValue Op2,
5848 SDVTList VTs = getVTList(VT1, VT2);
5849 SDValue Ops[] = { Op1, Op2, Op3 };
5850 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5853 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5854 EVT VT1, EVT VT2, EVT VT3,
5855 SDValue Op1, SDValue Op2,
5857 SDVTList VTs = getVTList(VT1, VT2, VT3);
5858 SDValue Ops[] = { Op1, Op2, Op3 };
5859 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5862 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5863 SDVTList VTs,ArrayRef<SDValue> Ops) {
5864 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops);
5865 // Reset the NodeID to -1.
5870 /// UpdadeSDLocOnMergedSDNode - If the opt level is -O0 then it throws away
5871 /// the line number information on the merged node since it is not possible to
5872 /// preserve the information that operation is associated with multiple lines.
5873 /// This will make the debugger working better at -O0, were there is a higher
5874 /// probability having other instructions associated with that line.
5876 /// For IROrder, we keep the smaller of the two
5877 SDNode *SelectionDAG::UpdadeSDLocOnMergedSDNode(SDNode *N, SDLoc OLoc) {
5878 DebugLoc NLoc = N->getDebugLoc();
5879 if (NLoc && OptLevel == CodeGenOpt::None && OLoc.getDebugLoc() != NLoc) {
5880 N->setDebugLoc(DebugLoc());
5882 unsigned Order = std::min(N->getIROrder(), OLoc.getIROrder());
5883 N->setIROrder(Order);
5887 /// MorphNodeTo - This *mutates* the specified node to have the specified
5888 /// return type, opcode, and operands.
5890 /// Note that MorphNodeTo returns the resultant node. If there is already a
5891 /// node of the specified opcode and operands, it returns that node instead of
5892 /// the current one. Note that the SDLoc need not be the same.
5894 /// Using MorphNodeTo is faster than creating a new node and swapping it in
5895 /// with ReplaceAllUsesWith both because it often avoids allocating a new
5896 /// node, and because it doesn't require CSE recalculation for any of
5897 /// the node's users.
5899 /// However, note that MorphNodeTo recursively deletes dead nodes from the DAG.
5900 /// As a consequence it isn't appropriate to use from within the DAG combiner or
5901 /// the legalizer which maintain worklists that would need to be updated when
5902 /// deleting things.
5903 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
5904 SDVTList VTs, ArrayRef<SDValue> Ops) {
5905 unsigned NumOps = Ops.size();
5906 // If an identical node already exists, use it.
5908 if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) {
5909 FoldingSetNodeID ID;
5910 AddNodeIDNode(ID, Opc, VTs, Ops);
5911 if (SDNode *ON = FindNodeOrInsertPos(ID, N->getDebugLoc(), IP))
5912 return UpdadeSDLocOnMergedSDNode(ON, SDLoc(N));
5915 if (!RemoveNodeFromCSEMaps(N))
5918 // Start the morphing.
5920 N->ValueList = VTs.VTs;
5921 N->NumValues = VTs.NumVTs;
5923 // Clear the operands list, updating used nodes to remove this from their
5924 // use list. Keep track of any operands that become dead as a result.
5925 SmallPtrSet<SDNode*, 16> DeadNodeSet;
5926 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
5928 SDNode *Used = Use.getNode();
5930 if (Used->use_empty())
5931 DeadNodeSet.insert(Used);
5934 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) {
5935 // Initialize the memory references information.
5936 MN->setMemRefs(nullptr, nullptr);
5937 // If NumOps is larger than the # of operands we can have in a
5938 // MachineSDNode, reallocate the operand list.
5939 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) {
5940 if (MN->OperandsNeedDelete)
5941 delete[] MN->OperandList;
5942 if (NumOps > array_lengthof(MN->LocalOperands))
5943 // We're creating a final node that will live unmorphed for the
5944 // remainder of the current SelectionDAG iteration, so we can allocate
5945 // the operands directly out of a pool with no recycling metadata.
5946 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
5947 Ops.data(), NumOps);
5949 MN->InitOperands(MN->LocalOperands, Ops.data(), NumOps);
5950 MN->OperandsNeedDelete = false;
5952 MN->InitOperands(MN->OperandList, Ops.data(), NumOps);
5954 // If NumOps is larger than the # of operands we currently have, reallocate
5955 // the operand list.
5956 if (NumOps > N->NumOperands) {
5957 if (N->OperandsNeedDelete)
5958 delete[] N->OperandList;
5959 N->InitOperands(new SDUse[NumOps], Ops.data(), NumOps);
5960 N->OperandsNeedDelete = true;
5962 N->InitOperands(N->OperandList, Ops.data(), NumOps);
5965 // Delete any nodes that are still dead after adding the uses for the
5967 if (!DeadNodeSet.empty()) {
5968 SmallVector<SDNode *, 16> DeadNodes;
5969 for (SDNode *N : DeadNodeSet)
5971 DeadNodes.push_back(N);
5972 RemoveDeadNodes(DeadNodes);
5976 CSEMap.InsertNode(N, IP); // Memoize the new node.
5981 /// getMachineNode - These are used for target selectors to create a new node
5982 /// with specified return type(s), MachineInstr opcode, and operands.
5984 /// Note that getMachineNode returns the resultant node. If there is already a
5985 /// node of the specified opcode and operands, it returns that node instead of
5986 /// the current one.
5988 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT) {
5989 SDVTList VTs = getVTList(VT);
5990 return getMachineNode(Opcode, dl, VTs, None);
5994 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT, SDValue Op1) {
5995 SDVTList VTs = getVTList(VT);
5996 SDValue Ops[] = { Op1 };
5997 return getMachineNode(Opcode, dl, VTs, Ops);
6001 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT,
6002 SDValue Op1, SDValue Op2) {
6003 SDVTList VTs = getVTList(VT);
6004 SDValue Ops[] = { Op1, Op2 };
6005 return getMachineNode(Opcode, dl, VTs, Ops);
6009 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT,
6010 SDValue Op1, SDValue Op2, SDValue Op3) {
6011 SDVTList VTs = getVTList(VT);
6012 SDValue Ops[] = { Op1, Op2, Op3 };
6013 return getMachineNode(Opcode, dl, VTs, Ops);
6017 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT,
6018 ArrayRef<SDValue> Ops) {
6019 SDVTList VTs = getVTList(VT);
6020 return getMachineNode(Opcode, dl, VTs, Ops);
6024 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1, EVT VT2) {
6025 SDVTList VTs = getVTList(VT1, VT2);
6026 return getMachineNode(Opcode, dl, VTs, None);
6030 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
6031 EVT VT1, EVT VT2, SDValue Op1) {
6032 SDVTList VTs = getVTList(VT1, VT2);
6033 SDValue Ops[] = { Op1 };
6034 return getMachineNode(Opcode, dl, VTs, Ops);
6038 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
6039 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) {
6040 SDVTList VTs = getVTList(VT1, VT2);
6041 SDValue Ops[] = { Op1, Op2 };
6042 return getMachineNode(Opcode, dl, VTs, Ops);
6046 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
6047 EVT VT1, EVT VT2, SDValue Op1,
6048 SDValue Op2, SDValue Op3) {
6049 SDVTList VTs = getVTList(VT1, VT2);
6050 SDValue Ops[] = { Op1, Op2, Op3 };
6051 return getMachineNode(Opcode, dl, VTs, Ops);
6055 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
6057 ArrayRef<SDValue> Ops) {
6058 SDVTList VTs = getVTList(VT1, VT2);
6059 return getMachineNode(Opcode, dl, VTs, Ops);
6063 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
6064 EVT VT1, EVT VT2, EVT VT3,
6065 SDValue Op1, SDValue Op2) {
6066 SDVTList VTs = getVTList(VT1, VT2, VT3);
6067 SDValue Ops[] = { Op1, Op2 };
6068 return getMachineNode(Opcode, dl, VTs, Ops);
6072 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
6073 EVT VT1, EVT VT2, EVT VT3,
6074 SDValue Op1, SDValue Op2, SDValue Op3) {
6075 SDVTList VTs = getVTList(VT1, VT2, VT3);
6076 SDValue Ops[] = { Op1, Op2, Op3 };
6077 return getMachineNode(Opcode, dl, VTs, Ops);
6081 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
6082 EVT VT1, EVT VT2, EVT VT3,
6083 ArrayRef<SDValue> Ops) {
6084 SDVTList VTs = getVTList(VT1, VT2, VT3);
6085 return getMachineNode(Opcode, dl, VTs, Ops);
6089 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1,
6090 EVT VT2, EVT VT3, EVT VT4,
6091 ArrayRef<SDValue> Ops) {
6092 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
6093 return getMachineNode(Opcode, dl, VTs, Ops);
6097 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
6098 ArrayRef<EVT> ResultTys,
6099 ArrayRef<SDValue> Ops) {
6100 SDVTList VTs = getVTList(ResultTys);
6101 return getMachineNode(Opcode, dl, VTs, Ops);
6105 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc DL, SDVTList VTs,
6106 ArrayRef<SDValue> OpsArray) {
6107 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue;
6110 const SDValue *Ops = OpsArray.data();
6111 unsigned NumOps = OpsArray.size();
6114 FoldingSetNodeID ID;
6115 AddNodeIDNode(ID, ~Opcode, VTs, OpsArray);
6117 if (SDNode *E = FindNodeOrInsertPos(ID, DL.getDebugLoc(), IP)) {
6118 return cast<MachineSDNode>(UpdadeSDLocOnMergedSDNode(E, DL));
6122 // Allocate a new MachineSDNode.
6123 N = new (NodeAllocator) MachineSDNode(~Opcode, DL.getIROrder(),
6124 DL.getDebugLoc(), VTs);
6126 // Initialize the operands list.
6127 if (NumOps > array_lengthof(N->LocalOperands))
6128 // We're creating a final node that will live unmorphed for the
6129 // remainder of the current SelectionDAG iteration, so we can allocate
6130 // the operands directly out of a pool with no recycling metadata.
6131 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
6134 N->InitOperands(N->LocalOperands, Ops, NumOps);
6135 N->OperandsNeedDelete = false;
6138 CSEMap.InsertNode(N, IP);
6144 /// getTargetExtractSubreg - A convenience function for creating
6145 /// TargetOpcode::EXTRACT_SUBREG nodes.
6147 SelectionDAG::getTargetExtractSubreg(int SRIdx, SDLoc DL, EVT VT,
6149 SDValue SRIdxVal = getTargetConstant(SRIdx, DL, MVT::i32);
6150 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL,
6151 VT, Operand, SRIdxVal);
6152 return SDValue(Subreg, 0);
6155 /// getTargetInsertSubreg - A convenience function for creating
6156 /// TargetOpcode::INSERT_SUBREG nodes.
6158 SelectionDAG::getTargetInsertSubreg(int SRIdx, SDLoc DL, EVT VT,
6159 SDValue Operand, SDValue Subreg) {
6160 SDValue SRIdxVal = getTargetConstant(SRIdx, DL, MVT::i32);
6161 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL,
6162 VT, Operand, Subreg, SRIdxVal);
6163 return SDValue(Result, 0);
6166 /// getNodeIfExists - Get the specified node if it's already available, or
6167 /// else return NULL.
6168 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
6169 ArrayRef<SDValue> Ops,
6170 const SDNodeFlags *Flags) {
6171 if (VTList.VTs[VTList.NumVTs - 1] != MVT::Glue) {
6172 FoldingSetNodeID ID;
6173 AddNodeIDNode(ID, Opcode, VTList, Ops);
6174 AddNodeIDFlags(ID, Opcode, Flags);
6176 if (SDNode *E = FindNodeOrInsertPos(ID, DebugLoc(), IP))
6182 /// getDbgValue - Creates a SDDbgValue node.
6185 SDDbgValue *SelectionDAG::getDbgValue(MDNode *Var, MDNode *Expr, SDNode *N,
6186 unsigned R, bool IsIndirect, uint64_t Off,
6187 DebugLoc DL, unsigned O) {
6188 assert(cast<DILocalVariable>(Var)->isValidLocationForIntrinsic(DL) &&
6189 "Expected inlined-at fields to agree");
6190 return new (DbgInfo->getAlloc())
6191 SDDbgValue(Var, Expr, N, R, IsIndirect, Off, DL, O);
6195 SDDbgValue *SelectionDAG::getConstantDbgValue(MDNode *Var, MDNode *Expr,
6196 const Value *C, uint64_t Off,
6197 DebugLoc DL, unsigned O) {
6198 assert(cast<DILocalVariable>(Var)->isValidLocationForIntrinsic(DL) &&
6199 "Expected inlined-at fields to agree");
6200 return new (DbgInfo->getAlloc()) SDDbgValue(Var, Expr, C, Off, DL, O);
6204 SDDbgValue *SelectionDAG::getFrameIndexDbgValue(MDNode *Var, MDNode *Expr,
6205 unsigned FI, uint64_t Off,
6206 DebugLoc DL, unsigned O) {
6207 assert(cast<DILocalVariable>(Var)->isValidLocationForIntrinsic(DL) &&
6208 "Expected inlined-at fields to agree");
6209 return new (DbgInfo->getAlloc()) SDDbgValue(Var, Expr, FI, Off, DL, O);
6214 /// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node
6215 /// pointed to by a use iterator is deleted, increment the use iterator
6216 /// so that it doesn't dangle.
6218 class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener {
6219 SDNode::use_iterator &UI;
6220 SDNode::use_iterator &UE;
6222 void NodeDeleted(SDNode *N, SDNode *E) override {
6223 // Increment the iterator as needed.
6224 while (UI != UE && N == *UI)
6229 RAUWUpdateListener(SelectionDAG &d,
6230 SDNode::use_iterator &ui,
6231 SDNode::use_iterator &ue)
6232 : SelectionDAG::DAGUpdateListener(d), UI(ui), UE(ue) {}
6237 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
6238 /// This can cause recursive merging of nodes in the DAG.
6240 /// This version assumes From has a single result value.
6242 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To) {
6243 SDNode *From = FromN.getNode();
6244 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
6245 "Cannot replace with this method!");
6246 assert(From != To.getNode() && "Cannot replace uses of with self");
6248 // Iterate over all the existing uses of From. New uses will be added
6249 // to the beginning of the use list, which we avoid visiting.
6250 // This specifically avoids visiting uses of From that arise while the
6251 // replacement is happening, because any such uses would be the result
6252 // of CSE: If an existing node looks like From after one of its operands
6253 // is replaced by To, we don't want to replace of all its users with To
6254 // too. See PR3018 for more info.
6255 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
6256 RAUWUpdateListener Listener(*this, UI, UE);
6260 // This node is about to morph, remove its old self from the CSE maps.
6261 RemoveNodeFromCSEMaps(User);
6263 // A user can appear in a use list multiple times, and when this
6264 // happens the uses are usually next to each other in the list.
6265 // To help reduce the number of CSE recomputations, process all
6266 // the uses of this user that we can find this way.
6268 SDUse &Use = UI.getUse();
6271 } while (UI != UE && *UI == User);
6273 // Now that we have modified User, add it back to the CSE maps. If it
6274 // already exists there, recursively merge the results together.
6275 AddModifiedNodeToCSEMaps(User);
6278 // If we just RAUW'd the root, take note.
6279 if (FromN == getRoot())
6283 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
6284 /// This can cause recursive merging of nodes in the DAG.
6286 /// This version assumes that for each value of From, there is a
6287 /// corresponding value in To in the same position with the same type.
6289 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To) {
6291 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
6292 assert((!From->hasAnyUseOfValue(i) ||
6293 From->getValueType(i) == To->getValueType(i)) &&
6294 "Cannot use this version of ReplaceAllUsesWith!");
6297 // Handle the trivial case.
6301 // Iterate over just the existing users of From. See the comments in
6302 // the ReplaceAllUsesWith above.
6303 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
6304 RAUWUpdateListener Listener(*this, UI, UE);
6308 // This node is about to morph, remove its old self from the CSE maps.
6309 RemoveNodeFromCSEMaps(User);
6311 // A user can appear in a use list multiple times, and when this
6312 // happens the uses are usually next to each other in the list.
6313 // To help reduce the number of CSE recomputations, process all
6314 // the uses of this user that we can find this way.
6316 SDUse &Use = UI.getUse();
6319 } while (UI != UE && *UI == User);
6321 // Now that we have modified User, add it back to the CSE maps. If it
6322 // already exists there, recursively merge the results together.
6323 AddModifiedNodeToCSEMaps(User);
6326 // If we just RAUW'd the root, take note.
6327 if (From == getRoot().getNode())
6328 setRoot(SDValue(To, getRoot().getResNo()));
6331 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
6332 /// This can cause recursive merging of nodes in the DAG.
6334 /// This version can replace From with any result values. To must match the
6335 /// number and types of values returned by From.
6336 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, const SDValue *To) {
6337 if (From->getNumValues() == 1) // Handle the simple case efficiently.
6338 return ReplaceAllUsesWith(SDValue(From, 0), To[0]);
6340 // Iterate over just the existing users of From. See the comments in
6341 // the ReplaceAllUsesWith above.
6342 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
6343 RAUWUpdateListener Listener(*this, UI, UE);
6347 // This node is about to morph, remove its old self from the CSE maps.
6348 RemoveNodeFromCSEMaps(User);
6350 // A user can appear in a use list multiple times, and when this
6351 // happens the uses are usually next to each other in the list.
6352 // To help reduce the number of CSE recomputations, process all
6353 // the uses of this user that we can find this way.
6355 SDUse &Use = UI.getUse();
6356 const SDValue &ToOp = To[Use.getResNo()];
6359 } while (UI != UE && *UI == User);
6361 // Now that we have modified User, add it back to the CSE maps. If it
6362 // already exists there, recursively merge the results together.
6363 AddModifiedNodeToCSEMaps(User);
6366 // If we just RAUW'd the root, take note.
6367 if (From == getRoot().getNode())
6368 setRoot(SDValue(To[getRoot().getResNo()]));
6371 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
6372 /// uses of other values produced by From.getNode() alone. The Deleted
6373 /// vector is handled the same way as for ReplaceAllUsesWith.
6374 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To){
6375 // Handle the really simple, really trivial case efficiently.
6376 if (From == To) return;
6378 // Handle the simple, trivial, case efficiently.
6379 if (From.getNode()->getNumValues() == 1) {
6380 ReplaceAllUsesWith(From, To);
6384 // Iterate over just the existing users of From. See the comments in
6385 // the ReplaceAllUsesWith above.
6386 SDNode::use_iterator UI = From.getNode()->use_begin(),
6387 UE = From.getNode()->use_end();
6388 RAUWUpdateListener Listener(*this, UI, UE);
6391 bool UserRemovedFromCSEMaps = false;
6393 // A user can appear in a use list multiple times, and when this
6394 // happens the uses are usually next to each other in the list.
6395 // To help reduce the number of CSE recomputations, process all
6396 // the uses of this user that we can find this way.
6398 SDUse &Use = UI.getUse();
6400 // Skip uses of different values from the same node.
6401 if (Use.getResNo() != From.getResNo()) {
6406 // If this node hasn't been modified yet, it's still in the CSE maps,
6407 // so remove its old self from the CSE maps.
6408 if (!UserRemovedFromCSEMaps) {
6409 RemoveNodeFromCSEMaps(User);
6410 UserRemovedFromCSEMaps = true;
6415 } while (UI != UE && *UI == User);
6417 // We are iterating over all uses of the From node, so if a use
6418 // doesn't use the specific value, no changes are made.
6419 if (!UserRemovedFromCSEMaps)
6422 // Now that we have modified User, add it back to the CSE maps. If it
6423 // already exists there, recursively merge the results together.
6424 AddModifiedNodeToCSEMaps(User);
6427 // If we just RAUW'd the root, take note.
6428 if (From == getRoot())
6433 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
6434 /// to record information about a use.
6441 /// operator< - Sort Memos by User.
6442 bool operator<(const UseMemo &L, const UseMemo &R) {
6443 return (intptr_t)L.User < (intptr_t)R.User;
6447 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
6448 /// uses of other values produced by From.getNode() alone. The same value
6449 /// may appear in both the From and To list. The Deleted vector is
6450 /// handled the same way as for ReplaceAllUsesWith.
6451 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
6454 // Handle the simple, trivial case efficiently.
6456 return ReplaceAllUsesOfValueWith(*From, *To);
6458 // Read up all the uses and make records of them. This helps
6459 // processing new uses that are introduced during the
6460 // replacement process.
6461 SmallVector<UseMemo, 4> Uses;
6462 for (unsigned i = 0; i != Num; ++i) {
6463 unsigned FromResNo = From[i].getResNo();
6464 SDNode *FromNode = From[i].getNode();
6465 for (SDNode::use_iterator UI = FromNode->use_begin(),
6466 E = FromNode->use_end(); UI != E; ++UI) {
6467 SDUse &Use = UI.getUse();
6468 if (Use.getResNo() == FromResNo) {
6469 UseMemo Memo = { *UI, i, &Use };
6470 Uses.push_back(Memo);
6475 // Sort the uses, so that all the uses from a given User are together.
6476 std::sort(Uses.begin(), Uses.end());
6478 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
6479 UseIndex != UseIndexEnd; ) {
6480 // We know that this user uses some value of From. If it is the right
6481 // value, update it.
6482 SDNode *User = Uses[UseIndex].User;
6484 // This node is about to morph, remove its old self from the CSE maps.
6485 RemoveNodeFromCSEMaps(User);
6487 // The Uses array is sorted, so all the uses for a given User
6488 // are next to each other in the list.
6489 // To help reduce the number of CSE recomputations, process all
6490 // the uses of this user that we can find this way.
6492 unsigned i = Uses[UseIndex].Index;
6493 SDUse &Use = *Uses[UseIndex].Use;
6497 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
6499 // Now that we have modified User, add it back to the CSE maps. If it
6500 // already exists there, recursively merge the results together.
6501 AddModifiedNodeToCSEMaps(User);
6505 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
6506 /// based on their topological order. It returns the maximum id and a vector
6507 /// of the SDNodes* in assigned order by reference.
6508 unsigned SelectionDAG::AssignTopologicalOrder() {
6510 unsigned DAGSize = 0;
6512 // SortedPos tracks the progress of the algorithm. Nodes before it are
6513 // sorted, nodes after it are unsorted. When the algorithm completes
6514 // it is at the end of the list.
6515 allnodes_iterator SortedPos = allnodes_begin();
6517 // Visit all the nodes. Move nodes with no operands to the front of
6518 // the list immediately. Annotate nodes that do have operands with their
6519 // operand count. Before we do this, the Node Id fields of the nodes
6520 // may contain arbitrary values. After, the Node Id fields for nodes
6521 // before SortedPos will contain the topological sort index, and the
6522 // Node Id fields for nodes At SortedPos and after will contain the
6523 // count of outstanding operands.
6524 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
6526 checkForCycles(N, this);
6527 unsigned Degree = N->getNumOperands();
6529 // A node with no uses, add it to the result array immediately.
6530 N->setNodeId(DAGSize++);
6531 allnodes_iterator Q = N;
6533 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
6534 assert(SortedPos != AllNodes.end() && "Overran node list");
6537 // Temporarily use the Node Id as scratch space for the degree count.
6538 N->setNodeId(Degree);
6542 // Visit all the nodes. As we iterate, move nodes into sorted order,
6543 // such that by the time the end is reached all nodes will be sorted.
6544 for (SDNode &Node : allnodes()) {
6546 checkForCycles(N, this);
6547 // N is in sorted position, so all its uses have one less operand
6548 // that needs to be sorted.
6549 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
6552 unsigned Degree = P->getNodeId();
6553 assert(Degree != 0 && "Invalid node degree");
6556 // All of P's operands are sorted, so P may sorted now.
6557 P->setNodeId(DAGSize++);
6559 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
6560 assert(SortedPos != AllNodes.end() && "Overran node list");
6563 // Update P's outstanding operand count.
6564 P->setNodeId(Degree);
6567 if (&Node == SortedPos) {
6569 allnodes_iterator I = N;
6571 dbgs() << "Overran sorted position:\n";
6572 S->dumprFull(this); dbgs() << "\n";
6573 dbgs() << "Checking if this is due to cycles\n";
6574 checkForCycles(this, true);
6576 llvm_unreachable(nullptr);
6580 assert(SortedPos == AllNodes.end() &&
6581 "Topological sort incomplete!");
6582 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
6583 "First node in topological sort is not the entry token!");
6584 assert(AllNodes.front().getNodeId() == 0 &&
6585 "First node in topological sort has non-zero id!");
6586 assert(AllNodes.front().getNumOperands() == 0 &&
6587 "First node in topological sort has operands!");
6588 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
6589 "Last node in topologic sort has unexpected id!");
6590 assert(AllNodes.back().use_empty() &&
6591 "Last node in topologic sort has users!");
6592 assert(DAGSize == allnodes_size() && "Node count mismatch!");
6596 /// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the
6597 /// value is produced by SD.
6598 void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) {
6600 assert(DbgInfo->getSDDbgValues(SD).empty() || SD->getHasDebugValue());
6601 SD->setHasDebugValue(true);
6603 DbgInfo->add(DB, SD, isParameter);
6606 /// TransferDbgValues - Transfer SDDbgValues.
6607 void SelectionDAG::TransferDbgValues(SDValue From, SDValue To) {
6608 if (From == To || !From.getNode()->getHasDebugValue())
6610 SDNode *FromNode = From.getNode();
6611 SDNode *ToNode = To.getNode();
6612 ArrayRef<SDDbgValue *> DVs = GetDbgValues(FromNode);
6613 SmallVector<SDDbgValue *, 2> ClonedDVs;
6614 for (ArrayRef<SDDbgValue *>::iterator I = DVs.begin(), E = DVs.end();
6616 SDDbgValue *Dbg = *I;
6617 if (Dbg->getKind() == SDDbgValue::SDNODE) {
6619 getDbgValue(Dbg->getVariable(), Dbg->getExpression(), ToNode,
6620 To.getResNo(), Dbg->isIndirect(), Dbg->getOffset(),
6621 Dbg->getDebugLoc(), Dbg->getOrder());
6622 ClonedDVs.push_back(Clone);
6625 for (SmallVectorImpl<SDDbgValue *>::iterator I = ClonedDVs.begin(),
6626 E = ClonedDVs.end(); I != E; ++I)
6627 AddDbgValue(*I, ToNode, false);
6630 //===----------------------------------------------------------------------===//
6632 //===----------------------------------------------------------------------===//
6634 HandleSDNode::~HandleSDNode() {
6638 GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, unsigned Order,
6639 DebugLoc DL, const GlobalValue *GA,
6640 EVT VT, int64_t o, unsigned char TF)
6641 : SDNode(Opc, Order, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) {
6645 AddrSpaceCastSDNode::AddrSpaceCastSDNode(unsigned Order, DebugLoc dl, EVT VT,
6646 SDValue X, unsigned SrcAS,
6648 : UnarySDNode(ISD::ADDRSPACECAST, Order, dl, getSDVTList(VT), X),
6649 SrcAddrSpace(SrcAS), DestAddrSpace(DestAS) {}
6651 MemSDNode::MemSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs,
6652 EVT memvt, MachineMemOperand *mmo)
6653 : SDNode(Opc, Order, dl, VTs), MemoryVT(memvt), MMO(mmo) {
6654 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
6655 MMO->isNonTemporal(), MMO->isInvariant());
6656 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
6657 assert(isNonTemporal() == MMO->isNonTemporal() &&
6658 "Non-temporal encoding error!");
6659 // We check here that the size of the memory operand fits within the size of
6660 // the MMO. This is because the MMO might indicate only a possible address
6661 // range instead of specifying the affected memory addresses precisely.
6662 assert(memvt.getStoreSize() <= MMO->getSize() && "Size mismatch!");
6665 MemSDNode::MemSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs,
6666 ArrayRef<SDValue> Ops, EVT memvt, MachineMemOperand *mmo)
6667 : SDNode(Opc, Order, dl, VTs, Ops),
6668 MemoryVT(memvt), MMO(mmo) {
6669 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
6670 MMO->isNonTemporal(), MMO->isInvariant());
6671 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
6672 assert(memvt.getStoreSize() <= MMO->getSize() && "Size mismatch!");
6675 /// Profile - Gather unique data for the node.
6677 void SDNode::Profile(FoldingSetNodeID &ID) const {
6678 AddNodeIDNode(ID, this);
6683 std::vector<EVT> VTs;
6686 VTs.reserve(MVT::LAST_VALUETYPE);
6687 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i)
6688 VTs.push_back(MVT((MVT::SimpleValueType)i));
6693 static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs;
6694 static ManagedStatic<EVTArray> SimpleVTArray;
6695 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
6697 /// getValueTypeList - Return a pointer to the specified value type.
6699 const EVT *SDNode::getValueTypeList(EVT VT) {
6700 if (VT.isExtended()) {
6701 sys::SmartScopedLock<true> Lock(*VTMutex);
6702 return &(*EVTs->insert(VT).first);
6704 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE &&
6705 "Value type out of range!");
6706 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy];
6710 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
6711 /// indicated value. This method ignores uses of other values defined by this
6713 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
6714 assert(Value < getNumValues() && "Bad value!");
6716 // TODO: Only iterate over uses of a given value of the node
6717 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
6718 if (UI.getUse().getResNo() == Value) {
6725 // Found exactly the right number of uses?
6730 /// hasAnyUseOfValue - Return true if there are any use of the indicated
6731 /// value. This method ignores uses of other values defined by this operation.
6732 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
6733 assert(Value < getNumValues() && "Bad value!");
6735 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
6736 if (UI.getUse().getResNo() == Value)
6743 /// isOnlyUserOf - Return true if this node is the only use of N.
6745 bool SDNode::isOnlyUserOf(const SDNode *N) const {
6747 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
6758 /// isOperand - Return true if this node is an operand of N.
6760 bool SDValue::isOperandOf(const SDNode *N) const {
6761 for (const SDValue &Op : N->op_values())
6767 bool SDNode::isOperandOf(const SDNode *N) const {
6768 for (const SDValue &Op : N->op_values())
6769 if (this == Op.getNode())
6774 /// reachesChainWithoutSideEffects - Return true if this operand (which must
6775 /// be a chain) reaches the specified operand without crossing any
6776 /// side-effecting instructions on any chain path. In practice, this looks
6777 /// through token factors and non-volatile loads. In order to remain efficient,
6778 /// this only looks a couple of nodes in, it does not do an exhaustive search.
6779 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
6780 unsigned Depth) const {
6781 if (*this == Dest) return true;
6783 // Don't search too deeply, we just want to be able to see through
6784 // TokenFactor's etc.
6785 if (Depth == 0) return false;
6787 // If this is a token factor, all inputs to the TF happen in parallel. If any
6788 // of the operands of the TF does not reach dest, then we cannot do the xform.
6789 if (getOpcode() == ISD::TokenFactor) {
6790 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
6791 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
6796 // Loads don't have side effects, look through them.
6797 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
6798 if (!Ld->isVolatile())
6799 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
6804 /// hasPredecessor - Return true if N is a predecessor of this node.
6805 /// N is either an operand of this node, or can be reached by recursively
6806 /// traversing up the operands.
6807 /// NOTE: This is an expensive method. Use it carefully.
6808 bool SDNode::hasPredecessor(const SDNode *N) const {
6809 SmallPtrSet<const SDNode *, 32> Visited;
6810 SmallVector<const SDNode *, 16> Worklist;
6811 return hasPredecessorHelper(N, Visited, Worklist);
6815 SDNode::hasPredecessorHelper(const SDNode *N,
6816 SmallPtrSetImpl<const SDNode *> &Visited,
6817 SmallVectorImpl<const SDNode *> &Worklist) const {
6818 if (Visited.empty()) {
6819 Worklist.push_back(this);
6821 // Take a look in the visited set. If we've already encountered this node
6822 // we needn't search further.
6823 if (Visited.count(N))
6827 // Haven't visited N yet. Continue the search.
6828 while (!Worklist.empty()) {
6829 const SDNode *M = Worklist.pop_back_val();
6830 for (const SDValue &OpV : M->op_values()) {
6831 SDNode *Op = OpV.getNode();
6832 if (Visited.insert(Op).second)
6833 Worklist.push_back(Op);
6842 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
6843 assert(Num < NumOperands && "Invalid child # of SDNode!");
6844 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
6847 SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
6848 assert(N->getNumValues() == 1 &&
6849 "Can't unroll a vector with multiple results!");
6851 EVT VT = N->getValueType(0);
6852 unsigned NE = VT.getVectorNumElements();
6853 EVT EltVT = VT.getVectorElementType();
6856 SmallVector<SDValue, 8> Scalars;
6857 SmallVector<SDValue, 4> Operands(N->getNumOperands());
6859 // If ResNE is 0, fully unroll the vector op.
6862 else if (NE > ResNE)
6866 for (i= 0; i != NE; ++i) {
6867 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) {
6868 SDValue Operand = N->getOperand(j);
6869 EVT OperandVT = Operand.getValueType();
6870 if (OperandVT.isVector()) {
6871 // A vector operand; extract a single element.
6872 EVT OperandEltVT = OperandVT.getVectorElementType();
6874 getNode(ISD::EXTRACT_VECTOR_ELT, dl, OperandEltVT, Operand,
6875 getConstant(i, dl, TLI->getVectorIdxTy(getDataLayout())));
6877 // A scalar operand; just use it as is.
6878 Operands[j] = Operand;
6882 switch (N->getOpcode()) {
6884 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands));
6887 Scalars.push_back(getNode(ISD::SELECT, dl, EltVT, Operands));
6894 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0],
6895 getShiftAmountOperand(Operands[0].getValueType(),
6898 case ISD::SIGN_EXTEND_INREG:
6899 case ISD::FP_ROUND_INREG: {
6900 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType();
6901 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6903 getValueType(ExtVT)));
6908 for (; i < ResNE; ++i)
6909 Scalars.push_back(getUNDEF(EltVT));
6911 return getNode(ISD::BUILD_VECTOR, dl,
6912 EVT::getVectorVT(*getContext(), EltVT, ResNE), Scalars);
6916 /// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a
6917 /// location that is 'Dist' units away from the location that the 'Base' load
6918 /// is loading from.
6919 bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base,
6920 unsigned Bytes, int Dist) const {
6921 if (LD->getChain() != Base->getChain())
6923 EVT VT = LD->getValueType(0);
6924 if (VT.getSizeInBits() / 8 != Bytes)
6927 SDValue Loc = LD->getOperand(1);
6928 SDValue BaseLoc = Base->getOperand(1);
6929 if (Loc.getOpcode() == ISD::FrameIndex) {
6930 if (BaseLoc.getOpcode() != ISD::FrameIndex)
6932 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo();
6933 int FI = cast<FrameIndexSDNode>(Loc)->getIndex();
6934 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex();
6935 int FS = MFI->getObjectSize(FI);
6936 int BFS = MFI->getObjectSize(BFI);
6937 if (FS != BFS || FS != (int)Bytes) return false;
6938 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes);
6942 if (isBaseWithConstantOffset(Loc)) {
6943 int64_t LocOffset = cast<ConstantSDNode>(Loc.getOperand(1))->getSExtValue();
6944 if (Loc.getOperand(0) == BaseLoc) {
6945 // If the base location is a simple address with no offset itself, then
6946 // the second load's first add operand should be the base address.
6947 if (LocOffset == Dist * (int)Bytes)
6949 } else if (isBaseWithConstantOffset(BaseLoc)) {
6950 // The base location itself has an offset, so subtract that value from the
6951 // second load's offset before comparing to distance * size.
6953 cast<ConstantSDNode>(BaseLoc.getOperand(1))->getSExtValue();
6954 if (Loc.getOperand(0) == BaseLoc.getOperand(0)) {
6955 if ((LocOffset - BOffset) == Dist * (int)Bytes)
6960 const GlobalValue *GV1 = nullptr;
6961 const GlobalValue *GV2 = nullptr;
6962 int64_t Offset1 = 0;
6963 int64_t Offset2 = 0;
6964 bool isGA1 = TLI->isGAPlusOffset(Loc.getNode(), GV1, Offset1);
6965 bool isGA2 = TLI->isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2);
6966 if (isGA1 && isGA2 && GV1 == GV2)
6967 return Offset1 == (Offset2 + Dist*Bytes);
6972 /// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if
6973 /// it cannot be inferred.
6974 unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const {
6975 // If this is a GlobalAddress + cst, return the alignment.
6976 const GlobalValue *GV;
6977 int64_t GVOffset = 0;
6978 if (TLI->isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) {
6979 unsigned PtrWidth = getDataLayout().getPointerTypeSizeInBits(GV->getType());
6980 APInt KnownZero(PtrWidth, 0), KnownOne(PtrWidth, 0);
6981 llvm::computeKnownBits(const_cast<GlobalValue *>(GV), KnownZero, KnownOne,
6983 unsigned AlignBits = KnownZero.countTrailingOnes();
6984 unsigned Align = AlignBits ? 1 << std::min(31U, AlignBits) : 0;
6986 return MinAlign(Align, GVOffset);
6989 // If this is a direct reference to a stack slot, use information about the
6990 // stack slot's alignment.
6991 int FrameIdx = 1 << 31;
6992 int64_t FrameOffset = 0;
6993 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) {
6994 FrameIdx = FI->getIndex();
6995 } else if (isBaseWithConstantOffset(Ptr) &&
6996 isa<FrameIndexSDNode>(Ptr.getOperand(0))) {
6998 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
6999 FrameOffset = Ptr.getConstantOperandVal(1);
7002 if (FrameIdx != (1 << 31)) {
7003 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo();
7004 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx),
7012 /// GetSplitDestVTs - Compute the VTs needed for the low/hi parts of a type
7013 /// which is split (or expanded) into two not necessarily identical pieces.
7014 std::pair<EVT, EVT> SelectionDAG::GetSplitDestVTs(const EVT &VT) const {
7015 // Currently all types are split in half.
7017 if (!VT.isVector()) {
7018 LoVT = HiVT = TLI->getTypeToTransformTo(*getContext(), VT);
7020 unsigned NumElements = VT.getVectorNumElements();
7021 assert(!(NumElements & 1) && "Splitting vector, but not in half!");
7022 LoVT = HiVT = EVT::getVectorVT(*getContext(), VT.getVectorElementType(),
7025 return std::make_pair(LoVT, HiVT);
7028 /// SplitVector - Split the vector with EXTRACT_SUBVECTOR and return the
7030 std::pair<SDValue, SDValue>
7031 SelectionDAG::SplitVector(const SDValue &N, const SDLoc &DL, const EVT &LoVT,
7033 assert(LoVT.getVectorNumElements() + HiVT.getVectorNumElements() <=
7034 N.getValueType().getVectorNumElements() &&
7035 "More vector elements requested than available!");
7037 Lo = getNode(ISD::EXTRACT_SUBVECTOR, DL, LoVT, N,
7038 getConstant(0, DL, TLI->getVectorIdxTy(getDataLayout())));
7039 Hi = getNode(ISD::EXTRACT_SUBVECTOR, DL, HiVT, N,
7040 getConstant(LoVT.getVectorNumElements(), DL,
7041 TLI->getVectorIdxTy(getDataLayout())));
7042 return std::make_pair(Lo, Hi);
7045 void SelectionDAG::ExtractVectorElements(SDValue Op,
7046 SmallVectorImpl<SDValue> &Args,
7047 unsigned Start, unsigned Count) {
7048 EVT VT = Op.getValueType();
7050 Count = VT.getVectorNumElements();
7052 EVT EltVT = VT.getVectorElementType();
7053 EVT IdxTy = TLI->getVectorIdxTy(getDataLayout());
7055 for (unsigned i = Start, e = Start + Count; i != e; ++i) {
7056 Args.push_back(getNode(ISD::EXTRACT_VECTOR_ELT, SL, EltVT,
7057 Op, getConstant(i, SL, IdxTy)));
7061 // getAddressSpace - Return the address space this GlobalAddress belongs to.
7062 unsigned GlobalAddressSDNode::getAddressSpace() const {
7063 return getGlobal()->getType()->getAddressSpace();
7067 Type *ConstantPoolSDNode::getType() const {
7068 if (isMachineConstantPoolEntry())
7069 return Val.MachineCPVal->getType();
7070 return Val.ConstVal->getType();
7073 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
7075 unsigned &SplatBitSize,
7077 unsigned MinSplatBits,
7078 bool isBigEndian) const {
7079 EVT VT = getValueType(0);
7080 assert(VT.isVector() && "Expected a vector type");
7081 unsigned sz = VT.getSizeInBits();
7082 if (MinSplatBits > sz)
7085 SplatValue = APInt(sz, 0);
7086 SplatUndef = APInt(sz, 0);
7088 // Get the bits. Bits with undefined values (when the corresponding element
7089 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
7090 // in SplatValue. If any of the values are not constant, give up and return
7092 unsigned int nOps = getNumOperands();
7093 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
7094 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
7096 for (unsigned j = 0; j < nOps; ++j) {
7097 unsigned i = isBigEndian ? nOps-1-j : j;
7098 SDValue OpVal = getOperand(i);
7099 unsigned BitPos = j * EltBitSize;
7101 if (OpVal.getOpcode() == ISD::UNDEF)
7102 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize);
7103 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
7104 SplatValue |= CN->getAPIntValue().zextOrTrunc(EltBitSize).
7105 zextOrTrunc(sz) << BitPos;
7106 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
7107 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
7112 // The build_vector is all constants or undefs. Find the smallest element
7113 // size that splats the vector.
7115 HasAnyUndefs = (SplatUndef != 0);
7118 unsigned HalfSize = sz / 2;
7119 APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize);
7120 APInt LowValue = SplatValue.trunc(HalfSize);
7121 APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize);
7122 APInt LowUndef = SplatUndef.trunc(HalfSize);
7124 // If the two halves do not match (ignoring undef bits), stop here.
7125 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
7126 MinSplatBits > HalfSize)
7129 SplatValue = HighValue | LowValue;
7130 SplatUndef = HighUndef & LowUndef;
7139 SDValue BuildVectorSDNode::getSplatValue(BitVector *UndefElements) const {
7140 if (UndefElements) {
7141 UndefElements->clear();
7142 UndefElements->resize(getNumOperands());
7145 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
7146 SDValue Op = getOperand(i);
7147 if (Op.getOpcode() == ISD::UNDEF) {
7149 (*UndefElements)[i] = true;
7150 } else if (!Splatted) {
7152 } else if (Splatted != Op) {
7158 assert(getOperand(0).getOpcode() == ISD::UNDEF &&
7159 "Can only have a splat without a constant for all undefs.");
7160 return getOperand(0);
7167 BuildVectorSDNode::getConstantSplatNode(BitVector *UndefElements) const {
7168 return dyn_cast_or_null<ConstantSDNode>(getSplatValue(UndefElements));
7172 BuildVectorSDNode::getConstantFPSplatNode(BitVector *UndefElements) const {
7173 return dyn_cast_or_null<ConstantFPSDNode>(getSplatValue(UndefElements));
7176 bool BuildVectorSDNode::isConstant() const {
7177 for (const SDValue &Op : op_values()) {
7178 unsigned Opc = Op.getOpcode();
7179 if (Opc != ISD::UNDEF && Opc != ISD::Constant && Opc != ISD::ConstantFP)
7185 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
7186 // Find the first non-undef value in the shuffle mask.
7188 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
7191 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
7193 // Make sure all remaining elements are either undef or the same as the first
7195 for (int Idx = Mask[i]; i != e; ++i)
7196 if (Mask[i] >= 0 && Mask[i] != Idx)
7202 static void checkForCyclesHelper(const SDNode *N,
7203 SmallPtrSetImpl<const SDNode*> &Visited,
7204 SmallPtrSetImpl<const SDNode*> &Checked,
7205 const llvm::SelectionDAG *DAG) {
7206 // If this node has already been checked, don't check it again.
7207 if (Checked.count(N))
7210 // If a node has already been visited on this depth-first walk, reject it as
7212 if (!Visited.insert(N).second) {
7213 errs() << "Detected cycle in SelectionDAG\n";
7214 dbgs() << "Offending node:\n";
7215 N->dumprFull(DAG); dbgs() << "\n";
7219 for (const SDValue &Op : N->op_values())
7220 checkForCyclesHelper(Op.getNode(), Visited, Checked, DAG);
7227 void llvm::checkForCycles(const llvm::SDNode *N,
7228 const llvm::SelectionDAG *DAG,
7236 assert(N && "Checking nonexistent SDNode");
7237 SmallPtrSet<const SDNode*, 32> visited;
7238 SmallPtrSet<const SDNode*, 32> checked;
7239 checkForCyclesHelper(N, visited, checked, DAG);
7244 void llvm::checkForCycles(const llvm::SelectionDAG *DAG, bool force) {
7245 checkForCycles(DAG->getRoot().getNode(), DAG, force);