1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
13 #include "llvm/CodeGen/SelectionDAG.h"
14 #include "llvm/Constants.h"
15 #include "llvm/Analysis/ValueTracking.h"
16 #include "llvm/GlobalAlias.h"
17 #include "llvm/GlobalVariable.h"
18 #include "llvm/Intrinsics.h"
19 #include "llvm/DerivedTypes.h"
20 #include "llvm/Assembly/Writer.h"
21 #include "llvm/CallingConv.h"
22 #include "llvm/CodeGen/MachineBasicBlock.h"
23 #include "llvm/CodeGen/MachineConstantPool.h"
24 #include "llvm/CodeGen/MachineFrameInfo.h"
25 #include "llvm/CodeGen/MachineModuleInfo.h"
26 #include "llvm/CodeGen/PseudoSourceValue.h"
27 #include "llvm/Target/TargetRegisterInfo.h"
28 #include "llvm/Target/TargetData.h"
29 #include "llvm/Target/TargetLowering.h"
30 #include "llvm/Target/TargetOptions.h"
31 #include "llvm/Target/TargetInstrInfo.h"
32 #include "llvm/Target/TargetMachine.h"
33 #include "llvm/Support/CommandLine.h"
34 #include "llvm/Support/MathExtras.h"
35 #include "llvm/Support/raw_ostream.h"
36 #include "llvm/ADT/SetVector.h"
37 #include "llvm/ADT/SmallPtrSet.h"
38 #include "llvm/ADT/SmallSet.h"
39 #include "llvm/ADT/SmallVector.h"
40 #include "llvm/ADT/StringExtras.h"
45 /// makeVTList - Return an instance of the SDVTList struct initialized with the
46 /// specified members.
47 static SDVTList makeVTList(const MVT *VTs, unsigned NumVTs) {
48 SDVTList Res = {VTs, NumVTs};
52 static const fltSemantics *MVTToAPFloatSemantics(MVT VT) {
53 switch (VT.getSimpleVT()) {
54 default: assert(0 && "Unknown FP format");
55 case MVT::f32: return &APFloat::IEEEsingle;
56 case MVT::f64: return &APFloat::IEEEdouble;
57 case MVT::f80: return &APFloat::x87DoubleExtended;
58 case MVT::f128: return &APFloat::IEEEquad;
59 case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
63 SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {}
65 //===----------------------------------------------------------------------===//
66 // ConstantFPSDNode Class
67 //===----------------------------------------------------------------------===//
69 /// isExactlyValue - We don't rely on operator== working on double values, as
70 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
71 /// As such, this method can be used to do an exact bit-for-bit comparison of
72 /// two floating point values.
73 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
74 return getValueAPF().bitwiseIsEqual(V);
77 bool ConstantFPSDNode::isValueValidForType(MVT VT,
79 assert(VT.isFloatingPoint() && "Can only convert between FP types");
81 // PPC long double cannot be converted to any other type.
82 if (VT == MVT::ppcf128 ||
83 &Val.getSemantics() == &APFloat::PPCDoubleDouble)
86 // convert modifies in place, so make a copy.
87 APFloat Val2 = APFloat(Val);
89 (void) Val2.convert(*MVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
94 //===----------------------------------------------------------------------===//
96 //===----------------------------------------------------------------------===//
98 /// isBuildVectorAllOnes - Return true if the specified node is a
99 /// BUILD_VECTOR where all of the elements are ~0 or undef.
100 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
101 // Look through a bit convert.
102 if (N->getOpcode() == ISD::BIT_CONVERT)
103 N = N->getOperand(0).getNode();
105 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
107 unsigned i = 0, e = N->getNumOperands();
109 // Skip over all of the undef values.
110 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
113 // Do not accept an all-undef vector.
114 if (i == e) return false;
116 // Do not accept build_vectors that aren't all constants or which have non-~0
118 SDValue NotZero = N->getOperand(i);
119 if (isa<ConstantSDNode>(NotZero)) {
120 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue())
122 } else if (isa<ConstantFPSDNode>(NotZero)) {
123 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF().
124 bitcastToAPInt().isAllOnesValue())
129 // Okay, we have at least one ~0 value, check to see if the rest match or are
131 for (++i; i != e; ++i)
132 if (N->getOperand(i) != NotZero &&
133 N->getOperand(i).getOpcode() != ISD::UNDEF)
139 /// isBuildVectorAllZeros - Return true if the specified node is a
140 /// BUILD_VECTOR where all of the elements are 0 or undef.
141 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
142 // Look through a bit convert.
143 if (N->getOpcode() == ISD::BIT_CONVERT)
144 N = N->getOperand(0).getNode();
146 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
148 unsigned i = 0, e = N->getNumOperands();
150 // Skip over all of the undef values.
151 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
154 // Do not accept an all-undef vector.
155 if (i == e) return false;
157 // Do not accept build_vectors that aren't all constants or which have non-~0
159 SDValue Zero = N->getOperand(i);
160 if (isa<ConstantSDNode>(Zero)) {
161 if (!cast<ConstantSDNode>(Zero)->isNullValue())
163 } else if (isa<ConstantFPSDNode>(Zero)) {
164 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero())
169 // Okay, we have at least one ~0 value, check to see if the rest match or are
171 for (++i; i != e; ++i)
172 if (N->getOperand(i) != Zero &&
173 N->getOperand(i).getOpcode() != ISD::UNDEF)
178 /// isScalarToVector - Return true if the specified node is a
179 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
180 /// element is not an undef.
181 bool ISD::isScalarToVector(const SDNode *N) {
182 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
185 if (N->getOpcode() != ISD::BUILD_VECTOR)
187 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
189 unsigned NumElems = N->getNumOperands();
190 for (unsigned i = 1; i < NumElems; ++i) {
191 SDValue V = N->getOperand(i);
192 if (V.getOpcode() != ISD::UNDEF)
199 /// isDebugLabel - Return true if the specified node represents a debug
200 /// label (i.e. ISD::DBG_LABEL or TargetInstrInfo::DBG_LABEL node).
201 bool ISD::isDebugLabel(const SDNode *N) {
203 if (N->getOpcode() == ISD::DBG_LABEL)
205 if (N->isMachineOpcode() &&
206 N->getMachineOpcode() == TargetInstrInfo::DBG_LABEL)
211 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
212 /// when given the operation for (X op Y).
213 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
214 // To perform this operation, we just need to swap the L and G bits of the
216 unsigned OldL = (Operation >> 2) & 1;
217 unsigned OldG = (Operation >> 1) & 1;
218 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
219 (OldL << 1) | // New G bit
220 (OldG << 2)); // New L bit.
223 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
224 /// 'op' is a valid SetCC operation.
225 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
226 unsigned Operation = Op;
228 Operation ^= 7; // Flip L, G, E bits, but not U.
230 Operation ^= 15; // Flip all of the condition bits.
232 if (Operation > ISD::SETTRUE2)
233 Operation &= ~8; // Don't let N and U bits get set.
235 return ISD::CondCode(Operation);
239 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
240 /// signed operation and 2 if the result is an unsigned comparison. Return zero
241 /// if the operation does not depend on the sign of the input (setne and seteq).
242 static int isSignedOp(ISD::CondCode Opcode) {
244 default: assert(0 && "Illegal integer setcc operation!");
246 case ISD::SETNE: return 0;
250 case ISD::SETGE: return 1;
254 case ISD::SETUGE: return 2;
258 /// getSetCCOrOperation - Return the result of a logical OR between different
259 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
260 /// returns SETCC_INVALID if it is not possible to represent the resultant
262 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
264 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
265 // Cannot fold a signed integer setcc with an unsigned integer setcc.
266 return ISD::SETCC_INVALID;
268 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
270 // If the N and U bits get set then the resultant comparison DOES suddenly
271 // care about orderedness, and is true when ordered.
272 if (Op > ISD::SETTRUE2)
273 Op &= ~16; // Clear the U bit if the N bit is set.
275 // Canonicalize illegal integer setcc's.
276 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
279 return ISD::CondCode(Op);
282 /// getSetCCAndOperation - Return the result of a logical AND between different
283 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
284 /// function returns zero if it is not possible to represent the resultant
286 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
288 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
289 // Cannot fold a signed setcc with an unsigned setcc.
290 return ISD::SETCC_INVALID;
292 // Combine all of the condition bits.
293 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
295 // Canonicalize illegal integer setcc's.
299 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
300 case ISD::SETOEQ: // SETEQ & SETU[LG]E
301 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
302 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
303 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
310 const TargetMachine &SelectionDAG::getTarget() const {
311 return MF->getTarget();
314 //===----------------------------------------------------------------------===//
315 // SDNode Profile Support
316 //===----------------------------------------------------------------------===//
318 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
320 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
324 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
325 /// solely with their pointer.
326 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
327 ID.AddPointer(VTList.VTs);
330 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
332 static void AddNodeIDOperands(FoldingSetNodeID &ID,
333 const SDValue *Ops, unsigned NumOps) {
334 for (; NumOps; --NumOps, ++Ops) {
335 ID.AddPointer(Ops->getNode());
336 ID.AddInteger(Ops->getResNo());
340 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
342 static void AddNodeIDOperands(FoldingSetNodeID &ID,
343 const SDUse *Ops, unsigned NumOps) {
344 for (; NumOps; --NumOps, ++Ops) {
345 ID.AddPointer(Ops->getNode());
346 ID.AddInteger(Ops->getResNo());
350 static void AddNodeIDNode(FoldingSetNodeID &ID,
351 unsigned short OpC, SDVTList VTList,
352 const SDValue *OpList, unsigned N) {
353 AddNodeIDOpcode(ID, OpC);
354 AddNodeIDValueTypes(ID, VTList);
355 AddNodeIDOperands(ID, OpList, N);
358 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
360 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
361 switch (N->getOpcode()) {
362 default: break; // Normal nodes don't need extra info.
364 ID.AddInteger(cast<ARG_FLAGSSDNode>(N)->getArgFlags().getRawBits());
366 case ISD::TargetConstant:
368 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
370 case ISD::TargetConstantFP:
371 case ISD::ConstantFP: {
372 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
375 case ISD::TargetGlobalAddress:
376 case ISD::GlobalAddress:
377 case ISD::TargetGlobalTLSAddress:
378 case ISD::GlobalTLSAddress: {
379 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
380 ID.AddPointer(GA->getGlobal());
381 ID.AddInteger(GA->getOffset());
384 case ISD::BasicBlock:
385 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
388 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
390 case ISD::DBG_STOPPOINT: {
391 const DbgStopPointSDNode *DSP = cast<DbgStopPointSDNode>(N);
392 ID.AddInteger(DSP->getLine());
393 ID.AddInteger(DSP->getColumn());
394 ID.AddPointer(DSP->getCompileUnit());
398 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
400 case ISD::MEMOPERAND: {
401 const MachineMemOperand &MO = cast<MemOperandSDNode>(N)->MO;
405 case ISD::FrameIndex:
406 case ISD::TargetFrameIndex:
407 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
410 case ISD::TargetJumpTable:
411 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
413 case ISD::ConstantPool:
414 case ISD::TargetConstantPool: {
415 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
416 ID.AddInteger(CP->getAlignment());
417 ID.AddInteger(CP->getOffset());
418 if (CP->isMachineConstantPoolEntry())
419 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID);
421 ID.AddPointer(CP->getConstVal());
425 const CallSDNode *Call = cast<CallSDNode>(N);
426 ID.AddInteger(Call->getCallingConv());
427 ID.AddInteger(Call->isVarArg());
431 const LoadSDNode *LD = cast<LoadSDNode>(N);
432 ID.AddInteger(LD->getMemoryVT().getRawBits());
433 ID.AddInteger(LD->getRawSubclassData());
437 const StoreSDNode *ST = cast<StoreSDNode>(N);
438 ID.AddInteger(ST->getMemoryVT().getRawBits());
439 ID.AddInteger(ST->getRawSubclassData());
442 case ISD::ATOMIC_CMP_SWAP:
443 case ISD::ATOMIC_SWAP:
444 case ISD::ATOMIC_LOAD_ADD:
445 case ISD::ATOMIC_LOAD_SUB:
446 case ISD::ATOMIC_LOAD_AND:
447 case ISD::ATOMIC_LOAD_OR:
448 case ISD::ATOMIC_LOAD_XOR:
449 case ISD::ATOMIC_LOAD_NAND:
450 case ISD::ATOMIC_LOAD_MIN:
451 case ISD::ATOMIC_LOAD_MAX:
452 case ISD::ATOMIC_LOAD_UMIN:
453 case ISD::ATOMIC_LOAD_UMAX: {
454 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
455 ID.AddInteger(AT->getMemoryVT().getRawBits());
456 ID.AddInteger(AT->getRawSubclassData());
459 } // end switch (N->getOpcode())
462 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
464 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
465 AddNodeIDOpcode(ID, N->getOpcode());
466 // Add the return value info.
467 AddNodeIDValueTypes(ID, N->getVTList());
468 // Add the operand info.
469 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
471 // Handle SDNode leafs with special info.
472 AddNodeIDCustom(ID, N);
475 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
476 /// the CSE map that carries alignment, volatility, indexing mode, and
477 /// extension/truncation information.
479 static inline unsigned
480 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM,
481 bool isVolatile, unsigned Alignment) {
482 assert((ConvType & 3) == ConvType &&
483 "ConvType may not require more than 2 bits!");
484 assert((AM & 7) == AM &&
485 "AM may not require more than 3 bits!");
489 ((Log2_32(Alignment) + 1) << 6);
492 //===----------------------------------------------------------------------===//
493 // SelectionDAG Class
494 //===----------------------------------------------------------------------===//
496 /// doNotCSE - Return true if CSE should not be performed for this node.
497 static bool doNotCSE(SDNode *N) {
498 if (N->getValueType(0) == MVT::Flag)
499 return true; // Never CSE anything that produces a flag.
501 switch (N->getOpcode()) {
503 case ISD::HANDLENODE:
505 case ISD::DBG_STOPPOINT:
508 return true; // Never CSE these nodes.
511 // Check that remaining values produced are not flags.
512 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
513 if (N->getValueType(i) == MVT::Flag)
514 return true; // Never CSE anything that produces a flag.
519 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
521 void SelectionDAG::RemoveDeadNodes() {
522 // Create a dummy node (which is not added to allnodes), that adds a reference
523 // to the root node, preventing it from being deleted.
524 HandleSDNode Dummy(getRoot());
526 SmallVector<SDNode*, 128> DeadNodes;
528 // Add all obviously-dead nodes to the DeadNodes worklist.
529 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
531 DeadNodes.push_back(I);
533 RemoveDeadNodes(DeadNodes);
535 // If the root changed (e.g. it was a dead load, update the root).
536 setRoot(Dummy.getValue());
539 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
540 /// given list, and any nodes that become unreachable as a result.
541 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes,
542 DAGUpdateListener *UpdateListener) {
544 // Process the worklist, deleting the nodes and adding their uses to the
546 while (!DeadNodes.empty()) {
547 SDNode *N = DeadNodes.pop_back_val();
550 UpdateListener->NodeDeleted(N, 0);
552 // Take the node out of the appropriate CSE map.
553 RemoveNodeFromCSEMaps(N);
555 // Next, brutally remove the operand list. This is safe to do, as there are
556 // no cycles in the graph.
557 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
559 SDNode *Operand = Use.getNode();
562 // Now that we removed this operand, see if there are no uses of it left.
563 if (Operand->use_empty())
564 DeadNodes.push_back(Operand);
571 void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){
572 SmallVector<SDNode*, 16> DeadNodes(1, N);
573 RemoveDeadNodes(DeadNodes, UpdateListener);
576 void SelectionDAG::DeleteNode(SDNode *N) {
577 // First take this out of the appropriate CSE map.
578 RemoveNodeFromCSEMaps(N);
580 // Finally, remove uses due to operands of this node, remove from the
581 // AllNodes list, and delete the node.
582 DeleteNodeNotInCSEMaps(N);
585 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
586 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
587 assert(N->use_empty() && "Cannot delete a node that is not dead!");
589 // Drop all of the operands and decrement used node's use counts.
595 void SelectionDAG::DeallocateNode(SDNode *N) {
596 if (N->OperandsNeedDelete)
597 delete[] N->OperandList;
599 // Set the opcode to DELETED_NODE to help catch bugs when node
600 // memory is reallocated.
601 N->NodeType = ISD::DELETED_NODE;
603 NodeAllocator.Deallocate(AllNodes.remove(N));
606 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
607 /// correspond to it. This is useful when we're about to delete or repurpose
608 /// the node. We don't want future request for structurally identical nodes
609 /// to return N anymore.
610 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
612 switch (N->getOpcode()) {
613 case ISD::EntryToken:
614 assert(0 && "EntryToken should not be in CSEMaps!");
616 case ISD::HANDLENODE: return false; // noop.
618 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
619 "Cond code doesn't exist!");
620 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
621 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
623 case ISD::ExternalSymbol:
624 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
626 case ISD::TargetExternalSymbol:
628 TargetExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
630 case ISD::VALUETYPE: {
631 MVT VT = cast<VTSDNode>(N)->getVT();
632 if (VT.isExtended()) {
633 Erased = ExtendedValueTypeNodes.erase(VT);
635 Erased = ValueTypeNodes[VT.getSimpleVT()] != 0;
636 ValueTypeNodes[VT.getSimpleVT()] = 0;
641 // Remove it from the CSE Map.
642 Erased = CSEMap.RemoveNode(N);
646 // Verify that the node was actually in one of the CSE maps, unless it has a
647 // flag result (which cannot be CSE'd) or is one of the special cases that are
648 // not subject to CSE.
649 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag &&
650 !N->isMachineOpcode() && !doNotCSE(N)) {
653 assert(0 && "Node is not in map!");
659 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
660 /// maps and modified in place. Add it back to the CSE maps, unless an identical
661 /// node already exists, in which case transfer all its users to the existing
662 /// node. This transfer can potentially trigger recursive merging.
665 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N,
666 DAGUpdateListener *UpdateListener) {
667 // For node types that aren't CSE'd, just act as if no identical node
670 SDNode *Existing = CSEMap.GetOrInsertNode(N);
672 // If there was already an existing matching node, use ReplaceAllUsesWith
673 // to replace the dead one with the existing one. This can cause
674 // recursive merging of other unrelated nodes down the line.
675 ReplaceAllUsesWith(N, Existing, UpdateListener);
677 // N is now dead. Inform the listener if it exists and delete it.
679 UpdateListener->NodeDeleted(N, Existing);
680 DeleteNodeNotInCSEMaps(N);
685 // If the node doesn't already exist, we updated it. Inform a listener if
688 UpdateListener->NodeUpdated(N);
691 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
692 /// were replaced with those specified. If this node is never memoized,
693 /// return null, otherwise return a pointer to the slot it would take. If a
694 /// node already exists with these operands, the slot will be non-null.
695 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
700 SDValue Ops[] = { Op };
702 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
703 AddNodeIDCustom(ID, N);
704 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
707 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
708 /// were replaced with those specified. If this node is never memoized,
709 /// return null, otherwise return a pointer to the slot it would take. If a
710 /// node already exists with these operands, the slot will be non-null.
711 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
712 SDValue Op1, SDValue Op2,
717 SDValue Ops[] = { Op1, Op2 };
719 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
720 AddNodeIDCustom(ID, N);
721 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
725 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
726 /// were replaced with those specified. If this node is never memoized,
727 /// return null, otherwise return a pointer to the slot it would take. If a
728 /// node already exists with these operands, the slot will be non-null.
729 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
730 const SDValue *Ops,unsigned NumOps,
736 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
737 AddNodeIDCustom(ID, N);
738 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
741 /// VerifyNode - Sanity check the given node. Aborts if it is invalid.
742 void SelectionDAG::VerifyNode(SDNode *N) {
743 switch (N->getOpcode()) {
746 case ISD::BUILD_PAIR: {
747 MVT VT = N->getValueType(0);
748 assert(N->getNumValues() == 1 && "Too many results!");
749 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
750 "Wrong return type!");
751 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
752 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
753 "Mismatched operand types!");
754 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
755 "Wrong operand type!");
756 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
757 "Wrong return type size");
760 case ISD::BUILD_VECTOR: {
761 assert(N->getNumValues() == 1 && "Too many results!");
762 assert(N->getValueType(0).isVector() && "Wrong return type!");
763 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
764 "Wrong number of operands!");
765 // FIXME: Change vector_shuffle to a variadic node with mask elements being
766 // operands of the node. Currently the mask is a BUILD_VECTOR passed as an
767 // operand, and it is not always possible to legalize it. Turning off the
768 // following checks at least makes it possible to legalize most of the time.
769 // MVT EltVT = N->getValueType(0).getVectorElementType();
770 // for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I)
771 // assert(I->getValueType() == EltVT &&
772 // "Wrong operand type!");
778 /// getMVTAlignment - Compute the default alignment value for the
781 unsigned SelectionDAG::getMVTAlignment(MVT VT) const {
782 const Type *Ty = VT == MVT::iPTR ?
783 PointerType::get(Type::Int8Ty, 0) :
786 return TLI.getTargetData()->getABITypeAlignment(Ty);
789 SelectionDAG::SelectionDAG(TargetLowering &tli, FunctionLoweringInfo &fli)
790 : TLI(tli), FLI(fli), DW(0),
791 EntryNode(ISD::EntryToken, getVTList(MVT::Other)),
792 Root(getEntryNode()) {
793 AllNodes.push_back(&EntryNode);
796 void SelectionDAG::init(MachineFunction &mf, MachineModuleInfo *mmi,
803 SelectionDAG::~SelectionDAG() {
807 void SelectionDAG::allnodes_clear() {
808 assert(&*AllNodes.begin() == &EntryNode);
809 AllNodes.remove(AllNodes.begin());
810 while (!AllNodes.empty())
811 DeallocateNode(AllNodes.begin());
814 void SelectionDAG::clear() {
816 OperandAllocator.Reset();
819 ExtendedValueTypeNodes.clear();
820 ExternalSymbols.clear();
821 TargetExternalSymbols.clear();
822 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
823 static_cast<CondCodeSDNode*>(0));
824 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
825 static_cast<SDNode*>(0));
827 EntryNode.UseList = 0;
828 AllNodes.push_back(&EntryNode);
829 Root = getEntryNode();
832 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, MVT VT) {
833 if (Op.getValueType() == VT) return Op;
834 APInt Imm = APInt::getLowBitsSet(Op.getValueSizeInBits(),
836 return getNode(ISD::AND, Op.getValueType(), Op,
837 getConstant(Imm, Op.getValueType()));
840 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, MVT VT) {
841 if (Op.getValueType() == VT) return Op;
842 APInt Imm = APInt::getLowBitsSet(Op.getValueSizeInBits(),
844 return getNode(ISD::AND, DL, Op.getValueType(), Op,
845 getConstant(Imm, Op.getValueType()));
848 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
850 SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, MVT VT) {
853 MVT EltVT = VT.getVectorElementType();
855 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), EltVT);
856 std::vector<SDValue> NegOnes(VT.getVectorNumElements(), NegOneElt);
857 NegOne = getNode(ISD::BUILD_VECTOR, DL, VT, &NegOnes[0], NegOnes.size());
859 NegOne = getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
861 return getNode(ISD::XOR, DL, VT, Val, NegOne);
864 SDValue SelectionDAG::getConstant(uint64_t Val, MVT VT, bool isT) {
865 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
866 assert((EltVT.getSizeInBits() >= 64 ||
867 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
868 "getConstant with a uint64_t value that doesn't fit in the type!");
869 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
872 SDValue SelectionDAG::getConstant(const APInt &Val, MVT VT, bool isT) {
873 return getConstant(*ConstantInt::get(Val), VT, isT);
876 SDValue SelectionDAG::getConstant(const ConstantInt &Val, MVT VT, bool isT) {
877 assert(VT.isInteger() && "Cannot create FP integer constant!");
879 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
880 assert(Val.getBitWidth() == EltVT.getSizeInBits() &&
881 "APInt size does not match type size!");
883 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
885 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
889 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
891 return SDValue(N, 0);
893 N = NodeAllocator.Allocate<ConstantSDNode>();
894 new (N) ConstantSDNode(isT, &Val, EltVT);
895 CSEMap.InsertNode(N, IP);
896 AllNodes.push_back(N);
899 SDValue Result(N, 0);
901 SmallVector<SDValue, 8> Ops;
902 Ops.assign(VT.getVectorNumElements(), Result);
903 Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size());
908 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
909 return getConstant(Val, TLI.getPointerTy(), isTarget);
913 SDValue SelectionDAG::getConstantFP(const APFloat& V, MVT VT, bool isTarget) {
914 return getConstantFP(*ConstantFP::get(V), VT, isTarget);
917 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, MVT VT, bool isTarget){
918 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
921 VT.isVector() ? VT.getVectorElementType() : VT;
923 // Do the map lookup using the actual bit pattern for the floating point
924 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
925 // we don't have issues with SNANs.
926 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
928 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
932 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
934 return SDValue(N, 0);
936 N = NodeAllocator.Allocate<ConstantFPSDNode>();
937 new (N) ConstantFPSDNode(isTarget, &V, EltVT);
938 CSEMap.InsertNode(N, IP);
939 AllNodes.push_back(N);
942 SDValue Result(N, 0);
944 SmallVector<SDValue, 8> Ops;
945 Ops.assign(VT.getVectorNumElements(), Result);
946 Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size());
951 SDValue SelectionDAG::getConstantFP(double Val, MVT VT, bool isTarget) {
953 VT.isVector() ? VT.getVectorElementType() : VT;
955 return getConstantFP(APFloat((float)Val), VT, isTarget);
957 return getConstantFP(APFloat(Val), VT, isTarget);
960 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV,
961 MVT VT, int64_t Offset,
965 // Truncate (with sign-extension) the offset value to the pointer size.
966 unsigned BitWidth = TLI.getPointerTy().getSizeInBits();
968 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth));
970 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
972 // If GV is an alias then use the aliasee for determining thread-localness.
973 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
974 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
977 if (GVar && GVar->isThreadLocal())
978 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
980 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
983 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
985 ID.AddInteger(Offset);
987 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
988 return SDValue(E, 0);
989 SDNode *N = NodeAllocator.Allocate<GlobalAddressSDNode>();
990 new (N) GlobalAddressSDNode(isTargetGA, GV, VT, Offset);
991 CSEMap.InsertNode(N, IP);
992 AllNodes.push_back(N);
993 return SDValue(N, 0);
996 SDValue SelectionDAG::getFrameIndex(int FI, MVT VT, bool isTarget) {
997 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
999 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1002 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1003 return SDValue(E, 0);
1004 SDNode *N = NodeAllocator.Allocate<FrameIndexSDNode>();
1005 new (N) FrameIndexSDNode(FI, VT, isTarget);
1006 CSEMap.InsertNode(N, IP);
1007 AllNodes.push_back(N);
1008 return SDValue(N, 0);
1011 SDValue SelectionDAG::getJumpTable(int JTI, MVT VT, bool isTarget){
1012 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1013 FoldingSetNodeID ID;
1014 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1017 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1018 return SDValue(E, 0);
1019 SDNode *N = NodeAllocator.Allocate<JumpTableSDNode>();
1020 new (N) JumpTableSDNode(JTI, VT, isTarget);
1021 CSEMap.InsertNode(N, IP);
1022 AllNodes.push_back(N);
1023 return SDValue(N, 0);
1026 SDValue SelectionDAG::getConstantPool(Constant *C, MVT VT,
1027 unsigned Alignment, int Offset,
1031 TLI.getTargetData()->getPreferredTypeAlignmentShift(C->getType());
1032 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1033 FoldingSetNodeID ID;
1034 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1035 ID.AddInteger(Alignment);
1036 ID.AddInteger(Offset);
1039 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1040 return SDValue(E, 0);
1041 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>();
1042 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment);
1043 CSEMap.InsertNode(N, IP);
1044 AllNodes.push_back(N);
1045 return SDValue(N, 0);
1049 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, MVT VT,
1050 unsigned Alignment, int Offset,
1054 TLI.getTargetData()->getPreferredTypeAlignmentShift(C->getType());
1055 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1056 FoldingSetNodeID ID;
1057 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1058 ID.AddInteger(Alignment);
1059 ID.AddInteger(Offset);
1060 C->AddSelectionDAGCSEId(ID);
1062 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1063 return SDValue(E, 0);
1064 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>();
1065 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment);
1066 CSEMap.InsertNode(N, IP);
1067 AllNodes.push_back(N);
1068 return SDValue(N, 0);
1072 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1073 FoldingSetNodeID ID;
1074 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1077 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1078 return SDValue(E, 0);
1079 SDNode *N = NodeAllocator.Allocate<BasicBlockSDNode>();
1080 new (N) BasicBlockSDNode(MBB);
1081 CSEMap.InsertNode(N, IP);
1082 AllNodes.push_back(N);
1083 return SDValue(N, 0);
1086 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB, DebugLoc dl) {
1087 FoldingSetNodeID ID;
1088 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1091 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1092 return SDValue(E, 0);
1093 SDNode *N = NodeAllocator.Allocate<BasicBlockSDNode>();
1094 new (N) BasicBlockSDNode(MBB, dl);
1095 CSEMap.InsertNode(N, IP);
1096 AllNodes.push_back(N);
1097 return SDValue(N, 0);
1100 SDValue SelectionDAG::getArgFlags(ISD::ArgFlagsTy Flags) {
1101 FoldingSetNodeID ID;
1102 AddNodeIDNode(ID, ISD::ARG_FLAGS, getVTList(MVT::Other), 0, 0);
1103 ID.AddInteger(Flags.getRawBits());
1105 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1106 return SDValue(E, 0);
1107 SDNode *N = NodeAllocator.Allocate<ARG_FLAGSSDNode>();
1108 new (N) ARG_FLAGSSDNode(Flags);
1109 CSEMap.InsertNode(N, IP);
1110 AllNodes.push_back(N);
1111 return SDValue(N, 0);
1114 SDValue SelectionDAG::getValueType(MVT VT) {
1115 if (VT.isSimple() && (unsigned)VT.getSimpleVT() >= ValueTypeNodes.size())
1116 ValueTypeNodes.resize(VT.getSimpleVT()+1);
1118 SDNode *&N = VT.isExtended() ?
1119 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT()];
1121 if (N) return SDValue(N, 0);
1122 N = NodeAllocator.Allocate<VTSDNode>();
1123 new (N) VTSDNode(VT);
1124 AllNodes.push_back(N);
1125 return SDValue(N, 0);
1128 SDValue SelectionDAG::getExternalSymbol(const char *Sym, MVT VT) {
1129 SDNode *&N = ExternalSymbols[Sym];
1130 if (N) return SDValue(N, 0);
1131 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1132 new (N) ExternalSymbolSDNode(false, Sym, VT);
1133 AllNodes.push_back(N);
1134 return SDValue(N, 0);
1137 SDValue SelectionDAG::getExternalSymbol(const char *Sym, DebugLoc dl, MVT VT) {
1138 SDNode *&N = ExternalSymbols[Sym];
1139 if (N) return SDValue(N, 0);
1140 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1141 new (N) ExternalSymbolSDNode(false, dl, Sym, VT);
1142 AllNodes.push_back(N);
1143 return SDValue(N, 0);
1146 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, MVT VT) {
1147 SDNode *&N = TargetExternalSymbols[Sym];
1148 if (N) return SDValue(N, 0);
1149 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1150 new (N) ExternalSymbolSDNode(true, Sym, VT);
1151 AllNodes.push_back(N);
1152 return SDValue(N, 0);
1155 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, DebugLoc dl,
1157 SDNode *&N = TargetExternalSymbols[Sym];
1158 if (N) return SDValue(N, 0);
1159 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1160 new (N) ExternalSymbolSDNode(true, dl, Sym, VT);
1161 AllNodes.push_back(N);
1162 return SDValue(N, 0);
1165 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1166 if ((unsigned)Cond >= CondCodeNodes.size())
1167 CondCodeNodes.resize(Cond+1);
1169 if (CondCodeNodes[Cond] == 0) {
1170 CondCodeSDNode *N = NodeAllocator.Allocate<CondCodeSDNode>();
1171 new (N) CondCodeSDNode(Cond);
1172 CondCodeNodes[Cond] = N;
1173 AllNodes.push_back(N);
1175 return SDValue(CondCodeNodes[Cond], 0);
1178 SDValue SelectionDAG::getConvertRndSat(MVT VT,
1179 SDValue Val, SDValue DTy,
1180 SDValue STy, SDValue Rnd, SDValue Sat,
1181 ISD::CvtCode Code) {
1182 // If the src and dest types are the same, no conversion is necessary.
1186 FoldingSetNodeID ID;
1188 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1189 return SDValue(E, 0);
1190 CvtRndSatSDNode *N = NodeAllocator.Allocate<CvtRndSatSDNode>();
1191 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1192 new (N) CvtRndSatSDNode(VT, Ops, 5, Code);
1193 CSEMap.InsertNode(N, IP);
1194 AllNodes.push_back(N);
1195 return SDValue(N, 0);
1198 SDValue SelectionDAG::getConvertRndSat(MVT VT, DebugLoc dl,
1199 SDValue Val, SDValue DTy,
1200 SDValue STy, SDValue Rnd, SDValue Sat,
1201 ISD::CvtCode Code) {
1202 // If the src and dest types are the same, no conversion is necessary.
1206 FoldingSetNodeID ID;
1208 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1209 return SDValue(E, 0);
1210 CvtRndSatSDNode *N = NodeAllocator.Allocate<CvtRndSatSDNode>();
1211 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1212 new (N) CvtRndSatSDNode(VT, dl, Ops, 5, Code);
1213 CSEMap.InsertNode(N, IP);
1214 AllNodes.push_back(N);
1215 return SDValue(N, 0);
1218 SDValue SelectionDAG::getRegister(unsigned RegNo, MVT VT) {
1219 FoldingSetNodeID ID;
1220 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1221 ID.AddInteger(RegNo);
1223 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1224 return SDValue(E, 0);
1225 SDNode *N = NodeAllocator.Allocate<RegisterSDNode>();
1226 new (N) RegisterSDNode(RegNo, VT);
1227 CSEMap.InsertNode(N, IP);
1228 AllNodes.push_back(N);
1229 return SDValue(N, 0);
1232 SDValue SelectionDAG::getDbgStopPoint(SDValue Root,
1233 unsigned Line, unsigned Col,
1235 SDNode *N = NodeAllocator.Allocate<DbgStopPointSDNode>();
1236 new (N) DbgStopPointSDNode(Root, Line, Col, CU);
1237 AllNodes.push_back(N);
1238 return SDValue(N, 0);
1241 SDValue SelectionDAG::getLabel(unsigned Opcode,
1244 FoldingSetNodeID ID;
1245 SDValue Ops[] = { Root };
1246 AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), &Ops[0], 1);
1247 ID.AddInteger(LabelID);
1249 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1250 return SDValue(E, 0);
1251 SDNode *N = NodeAllocator.Allocate<LabelSDNode>();
1252 new (N) LabelSDNode(Opcode, Root, LabelID);
1253 CSEMap.InsertNode(N, IP);
1254 AllNodes.push_back(N);
1255 return SDValue(N, 0);
1258 SDValue SelectionDAG::getLabel(unsigned Opcode, DebugLoc dl,
1261 FoldingSetNodeID ID;
1262 SDValue Ops[] = { Root };
1263 AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), &Ops[0], 1);
1264 ID.AddInteger(LabelID);
1266 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1267 return SDValue(E, 0);
1268 SDNode *N = NodeAllocator.Allocate<LabelSDNode>();
1269 new (N) LabelSDNode(Opcode, dl, Root, LabelID);
1270 CSEMap.InsertNode(N, IP);
1271 AllNodes.push_back(N);
1272 return SDValue(N, 0);
1275 SDValue SelectionDAG::getSrcValue(const Value *V) {
1276 assert((!V || isa<PointerType>(V->getType())) &&
1277 "SrcValue is not a pointer?");
1279 FoldingSetNodeID ID;
1280 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1284 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1285 return SDValue(E, 0);
1287 SDNode *N = NodeAllocator.Allocate<SrcValueSDNode>();
1288 new (N) SrcValueSDNode(V);
1289 CSEMap.InsertNode(N, IP);
1290 AllNodes.push_back(N);
1291 return SDValue(N, 0);
1294 SDValue SelectionDAG::getMemOperand(const MachineMemOperand &MO) {
1296 const Value *v = MO.getValue();
1297 assert((!v || isa<PointerType>(v->getType())) &&
1298 "SrcValue is not a pointer?");
1301 FoldingSetNodeID ID;
1302 AddNodeIDNode(ID, ISD::MEMOPERAND, getVTList(MVT::Other), 0, 0);
1306 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1307 return SDValue(E, 0);
1309 SDNode *N = NodeAllocator.Allocate<MemOperandSDNode>();
1310 new (N) MemOperandSDNode(MO);
1311 CSEMap.InsertNode(N, IP);
1312 AllNodes.push_back(N);
1313 return SDValue(N, 0);
1316 /// getShiftAmountOperand - Return the specified value casted to
1317 /// the target's desired shift amount type.
1318 SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) {
1319 MVT OpTy = Op.getValueType();
1320 MVT ShTy = TLI.getShiftAmountTy();
1321 if (OpTy == ShTy || OpTy.isVector()) return Op;
1323 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1324 return getNode(Opcode, ShTy, Op);
1327 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1328 /// specified value type.
1329 SDValue SelectionDAG::CreateStackTemporary(MVT VT, unsigned minAlign) {
1330 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1331 unsigned ByteSize = VT.getStoreSizeInBits()/8;
1332 const Type *Ty = VT.getTypeForMVT();
1333 unsigned StackAlign =
1334 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign);
1336 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign);
1337 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1340 /// CreateStackTemporary - Create a stack temporary suitable for holding
1341 /// either of the specified value types.
1342 SDValue SelectionDAG::CreateStackTemporary(MVT VT1, MVT VT2) {
1343 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1344 VT2.getStoreSizeInBits())/8;
1345 const Type *Ty1 = VT1.getTypeForMVT();
1346 const Type *Ty2 = VT2.getTypeForMVT();
1347 const TargetData *TD = TLI.getTargetData();
1348 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1349 TD->getPrefTypeAlignment(Ty2));
1351 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1352 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align);
1353 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1356 SDValue SelectionDAG::FoldSetCC(MVT VT, SDValue N1,
1357 SDValue N2, ISD::CondCode Cond, DebugLoc dl) {
1358 // These setcc operations always fold.
1362 case ISD::SETFALSE2: return getConstant(0, VT);
1364 case ISD::SETTRUE2: return getConstant(1, VT);
1376 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1380 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1381 const APInt &C2 = N2C->getAPIntValue();
1382 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1383 const APInt &C1 = N1C->getAPIntValue();
1386 default: assert(0 && "Unknown integer setcc!");
1387 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1388 case ISD::SETNE: return getConstant(C1 != C2, VT);
1389 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1390 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1391 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1392 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1393 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1394 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1395 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1396 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1400 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1401 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1402 // No compile time operations on this type yet.
1403 if (N1C->getValueType(0) == MVT::ppcf128)
1406 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1409 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1410 return getNode(ISD::UNDEF, dl, VT);
1412 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1413 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1414 return getNode(ISD::UNDEF, dl, VT);
1416 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1417 R==APFloat::cmpLessThan, VT);
1418 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1419 return getNode(ISD::UNDEF, dl, VT);
1421 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1422 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1423 return getNode(ISD::UNDEF, dl, VT);
1425 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1426 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1427 return getNode(ISD::UNDEF, dl, VT);
1429 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1430 R==APFloat::cmpEqual, VT);
1431 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1432 return getNode(ISD::UNDEF, dl, VT);
1434 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1435 R==APFloat::cmpEqual, VT);
1436 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1437 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1438 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1439 R==APFloat::cmpEqual, VT);
1440 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1441 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1442 R==APFloat::cmpLessThan, VT);
1443 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1444 R==APFloat::cmpUnordered, VT);
1445 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1446 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1449 // Ensure that the constant occurs on the RHS.
1450 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1454 // Could not fold it.
1458 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1459 /// use this predicate to simplify operations downstream.
1460 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1461 unsigned BitWidth = Op.getValueSizeInBits();
1462 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1465 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1466 /// this predicate to simplify operations downstream. Mask is known to be zero
1467 /// for bits that V cannot have.
1468 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1469 unsigned Depth) const {
1470 APInt KnownZero, KnownOne;
1471 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
1472 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1473 return (KnownZero & Mask) == Mask;
1476 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1477 /// known to be either zero or one and return them in the KnownZero/KnownOne
1478 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1480 void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask,
1481 APInt &KnownZero, APInt &KnownOne,
1482 unsigned Depth) const {
1483 unsigned BitWidth = Mask.getBitWidth();
1484 assert(BitWidth == Op.getValueType().getSizeInBits() &&
1485 "Mask size mismatches value type size!");
1487 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1488 if (Depth == 6 || Mask == 0)
1489 return; // Limit search depth.
1491 APInt KnownZero2, KnownOne2;
1493 switch (Op.getOpcode()) {
1495 // We know all of the bits for a constant!
1496 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask;
1497 KnownZero = ~KnownOne & Mask;
1500 // If either the LHS or the RHS are Zero, the result is zero.
1501 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1502 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero,
1503 KnownZero2, KnownOne2, Depth+1);
1504 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1505 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1507 // Output known-1 bits are only known if set in both the LHS & RHS.
1508 KnownOne &= KnownOne2;
1509 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1510 KnownZero |= KnownZero2;
1513 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1514 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne,
1515 KnownZero2, KnownOne2, Depth+1);
1516 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1517 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1519 // Output known-0 bits are only known if clear in both the LHS & RHS.
1520 KnownZero &= KnownZero2;
1521 // Output known-1 are known to be set if set in either the LHS | RHS.
1522 KnownOne |= KnownOne2;
1525 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1526 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
1527 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1528 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1530 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1531 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1532 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1533 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1534 KnownZero = KnownZeroOut;
1538 APInt Mask2 = APInt::getAllOnesValue(BitWidth);
1539 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1);
1540 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1541 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1542 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1544 // If low bits are zero in either operand, output low known-0 bits.
1545 // Also compute a conserative estimate for high known-0 bits.
1546 // More trickiness is possible, but this is sufficient for the
1547 // interesting case of alignment computation.
1549 unsigned TrailZ = KnownZero.countTrailingOnes() +
1550 KnownZero2.countTrailingOnes();
1551 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1552 KnownZero2.countLeadingOnes(),
1553 BitWidth) - BitWidth;
1555 TrailZ = std::min(TrailZ, BitWidth);
1556 LeadZ = std::min(LeadZ, BitWidth);
1557 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1558 APInt::getHighBitsSet(BitWidth, LeadZ);
1563 // For the purposes of computing leading zeros we can conservatively
1564 // treat a udiv as a logical right shift by the power of 2 known to
1565 // be less than the denominator.
1566 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1567 ComputeMaskedBits(Op.getOperand(0),
1568 AllOnes, KnownZero2, KnownOne2, Depth+1);
1569 unsigned LeadZ = KnownZero2.countLeadingOnes();
1573 ComputeMaskedBits(Op.getOperand(1),
1574 AllOnes, KnownZero2, KnownOne2, Depth+1);
1575 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1576 if (RHSUnknownLeadingOnes != BitWidth)
1577 LeadZ = std::min(BitWidth,
1578 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1580 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask;
1584 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1);
1585 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1);
1586 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1587 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1589 // Only known if known in both the LHS and RHS.
1590 KnownOne &= KnownOne2;
1591 KnownZero &= KnownZero2;
1593 case ISD::SELECT_CC:
1594 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1);
1595 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1);
1596 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1597 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1599 // Only known if known in both the LHS and RHS.
1600 KnownOne &= KnownOne2;
1601 KnownZero &= KnownZero2;
1609 if (Op.getResNo() != 1)
1611 // The boolean result conforms to getBooleanContents. Fall through.
1613 // If we know the result of a setcc has the top bits zero, use this info.
1614 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent &&
1616 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1619 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1620 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1621 unsigned ShAmt = SA->getZExtValue();
1623 // If the shift count is an invalid immediate, don't do anything.
1624 if (ShAmt >= BitWidth)
1627 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt),
1628 KnownZero, KnownOne, Depth+1);
1629 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1630 KnownZero <<= ShAmt;
1632 // low bits known zero.
1633 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1637 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1638 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1639 unsigned ShAmt = SA->getZExtValue();
1641 // If the shift count is an invalid immediate, don't do anything.
1642 if (ShAmt >= BitWidth)
1645 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt),
1646 KnownZero, KnownOne, Depth+1);
1647 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1648 KnownZero = KnownZero.lshr(ShAmt);
1649 KnownOne = KnownOne.lshr(ShAmt);
1651 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1652 KnownZero |= HighBits; // High bits known zero.
1656 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1657 unsigned ShAmt = SA->getZExtValue();
1659 // If the shift count is an invalid immediate, don't do anything.
1660 if (ShAmt >= BitWidth)
1663 APInt InDemandedMask = (Mask << ShAmt);
1664 // If any of the demanded bits are produced by the sign extension, we also
1665 // demand the input sign bit.
1666 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1667 if (HighBits.getBoolValue())
1668 InDemandedMask |= APInt::getSignBit(BitWidth);
1670 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne,
1672 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1673 KnownZero = KnownZero.lshr(ShAmt);
1674 KnownOne = KnownOne.lshr(ShAmt);
1676 // Handle the sign bits.
1677 APInt SignBit = APInt::getSignBit(BitWidth);
1678 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1680 if (KnownZero.intersects(SignBit)) {
1681 KnownZero |= HighBits; // New bits are known zero.
1682 } else if (KnownOne.intersects(SignBit)) {
1683 KnownOne |= HighBits; // New bits are known one.
1687 case ISD::SIGN_EXTEND_INREG: {
1688 MVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1689 unsigned EBits = EVT.getSizeInBits();
1691 // Sign extension. Compute the demanded bits in the result that are not
1692 // present in the input.
1693 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask;
1695 APInt InSignBit = APInt::getSignBit(EBits);
1696 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits);
1698 // If the sign extended bits are demanded, we know that the sign
1700 InSignBit.zext(BitWidth);
1701 if (NewBits.getBoolValue())
1702 InputDemandedBits |= InSignBit;
1704 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits,
1705 KnownZero, KnownOne, Depth+1);
1706 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1708 // If the sign bit of the input is known set or clear, then we know the
1709 // top bits of the result.
1710 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1711 KnownZero |= NewBits;
1712 KnownOne &= ~NewBits;
1713 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1714 KnownOne |= NewBits;
1715 KnownZero &= ~NewBits;
1716 } else { // Input sign bit unknown
1717 KnownZero &= ~NewBits;
1718 KnownOne &= ~NewBits;
1725 unsigned LowBits = Log2_32(BitWidth)+1;
1726 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1731 if (ISD::isZEXTLoad(Op.getNode())) {
1732 LoadSDNode *LD = cast<LoadSDNode>(Op);
1733 MVT VT = LD->getMemoryVT();
1734 unsigned MemBits = VT.getSizeInBits();
1735 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask;
1739 case ISD::ZERO_EXTEND: {
1740 MVT InVT = Op.getOperand(0).getValueType();
1741 unsigned InBits = InVT.getSizeInBits();
1742 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1743 APInt InMask = Mask;
1744 InMask.trunc(InBits);
1745 KnownZero.trunc(InBits);
1746 KnownOne.trunc(InBits);
1747 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1748 KnownZero.zext(BitWidth);
1749 KnownOne.zext(BitWidth);
1750 KnownZero |= NewBits;
1753 case ISD::SIGN_EXTEND: {
1754 MVT InVT = Op.getOperand(0).getValueType();
1755 unsigned InBits = InVT.getSizeInBits();
1756 APInt InSignBit = APInt::getSignBit(InBits);
1757 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1758 APInt InMask = Mask;
1759 InMask.trunc(InBits);
1761 // If any of the sign extended bits are demanded, we know that the sign
1762 // bit is demanded. Temporarily set this bit in the mask for our callee.
1763 if (NewBits.getBoolValue())
1764 InMask |= InSignBit;
1766 KnownZero.trunc(InBits);
1767 KnownOne.trunc(InBits);
1768 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1770 // Note if the sign bit is known to be zero or one.
1771 bool SignBitKnownZero = KnownZero.isNegative();
1772 bool SignBitKnownOne = KnownOne.isNegative();
1773 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1774 "Sign bit can't be known to be both zero and one!");
1776 // If the sign bit wasn't actually demanded by our caller, we don't
1777 // want it set in the KnownZero and KnownOne result values. Reset the
1778 // mask and reapply it to the result values.
1780 InMask.trunc(InBits);
1781 KnownZero &= InMask;
1784 KnownZero.zext(BitWidth);
1785 KnownOne.zext(BitWidth);
1787 // If the sign bit is known zero or one, the top bits match.
1788 if (SignBitKnownZero)
1789 KnownZero |= NewBits;
1790 else if (SignBitKnownOne)
1791 KnownOne |= NewBits;
1794 case ISD::ANY_EXTEND: {
1795 MVT InVT = Op.getOperand(0).getValueType();
1796 unsigned InBits = InVT.getSizeInBits();
1797 APInt InMask = Mask;
1798 InMask.trunc(InBits);
1799 KnownZero.trunc(InBits);
1800 KnownOne.trunc(InBits);
1801 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1802 KnownZero.zext(BitWidth);
1803 KnownOne.zext(BitWidth);
1806 case ISD::TRUNCATE: {
1807 MVT InVT = Op.getOperand(0).getValueType();
1808 unsigned InBits = InVT.getSizeInBits();
1809 APInt InMask = Mask;
1810 InMask.zext(InBits);
1811 KnownZero.zext(InBits);
1812 KnownOne.zext(InBits);
1813 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1814 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1815 KnownZero.trunc(BitWidth);
1816 KnownOne.trunc(BitWidth);
1819 case ISD::AssertZext: {
1820 MVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1821 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1822 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
1824 KnownZero |= (~InMask) & Mask;
1828 // All bits are zero except the low bit.
1829 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1833 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
1834 // We know that the top bits of C-X are clear if X contains less bits
1835 // than C (i.e. no wrap-around can happen). For example, 20-X is
1836 // positive if we can prove that X is >= 0 and < 16.
1837 if (CLHS->getAPIntValue().isNonNegative()) {
1838 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
1839 // NLZ can't be BitWidth with no sign bit
1840 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
1841 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2,
1844 // If all of the MaskV bits are known to be zero, then we know the
1845 // output top bits are zero, because we now know that the output is
1847 if ((KnownZero2 & MaskV) == MaskV) {
1848 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
1849 // Top bits known zero.
1850 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask;
1857 // Output known-0 bits are known if clear or set in both the low clear bits
1858 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
1859 // low 3 bits clear.
1860 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes());
1861 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1862 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1863 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
1865 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1);
1866 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1867 KnownZeroOut = std::min(KnownZeroOut,
1868 KnownZero2.countTrailingOnes());
1870 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
1874 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1875 const APInt &RA = Rem->getAPIntValue();
1876 if (RA.isPowerOf2() || (-RA).isPowerOf2()) {
1877 APInt LowBits = RA.isStrictlyPositive() ? (RA - 1) : ~RA;
1878 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
1879 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1);
1881 // If the sign bit of the first operand is zero, the sign bit of
1882 // the result is zero. If the first operand has no one bits below
1883 // the second operand's single 1 bit, its sign will be zero.
1884 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
1885 KnownZero2 |= ~LowBits;
1887 KnownZero |= KnownZero2 & Mask;
1889 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1894 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1895 const APInt &RA = Rem->getAPIntValue();
1896 if (RA.isPowerOf2()) {
1897 APInt LowBits = (RA - 1);
1898 APInt Mask2 = LowBits & Mask;
1899 KnownZero |= ~LowBits & Mask;
1900 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1);
1901 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1906 // Since the result is less than or equal to either operand, any leading
1907 // zero bits in either operand must also exist in the result.
1908 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1909 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne,
1911 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2,
1914 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
1915 KnownZero2.countLeadingOnes());
1917 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
1921 // Allow the target to implement this method for its nodes.
1922 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) {
1923 case ISD::INTRINSIC_WO_CHAIN:
1924 case ISD::INTRINSIC_W_CHAIN:
1925 case ISD::INTRINSIC_VOID:
1926 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this);
1932 /// ComputeNumSignBits - Return the number of times the sign bit of the
1933 /// register is replicated into the other bits. We know that at least 1 bit
1934 /// is always equal to the sign bit (itself), but other cases can give us
1935 /// information. For example, immediately after an "SRA X, 2", we know that
1936 /// the top 3 bits are all equal to each other, so we return 3.
1937 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
1938 MVT VT = Op.getValueType();
1939 assert(VT.isInteger() && "Invalid VT!");
1940 unsigned VTBits = VT.getSizeInBits();
1942 unsigned FirstAnswer = 1;
1945 return 1; // Limit search depth.
1947 switch (Op.getOpcode()) {
1949 case ISD::AssertSext:
1950 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1951 return VTBits-Tmp+1;
1952 case ISD::AssertZext:
1953 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1956 case ISD::Constant: {
1957 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
1958 // If negative, return # leading ones.
1959 if (Val.isNegative())
1960 return Val.countLeadingOnes();
1962 // Return # leading zeros.
1963 return Val.countLeadingZeros();
1966 case ISD::SIGN_EXTEND:
1967 Tmp = VTBits-Op.getOperand(0).getValueType().getSizeInBits();
1968 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
1970 case ISD::SIGN_EXTEND_INREG:
1971 // Max of the input and what this extends.
1972 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1975 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1976 return std::max(Tmp, Tmp2);
1979 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1980 // SRA X, C -> adds C sign bits.
1981 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1982 Tmp += C->getZExtValue();
1983 if (Tmp > VTBits) Tmp = VTBits;
1987 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1988 // shl destroys sign bits.
1989 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1990 if (C->getZExtValue() >= VTBits || // Bad shift.
1991 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
1992 return Tmp - C->getZExtValue();
1997 case ISD::XOR: // NOT is handled here.
1998 // Logical binary ops preserve the number of sign bits at the worst.
1999 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2001 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2002 FirstAnswer = std::min(Tmp, Tmp2);
2003 // We computed what we know about the sign bits as our first
2004 // answer. Now proceed to the generic code that uses
2005 // ComputeMaskedBits, and pick whichever answer is better.
2010 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2011 if (Tmp == 1) return 1; // Early out.
2012 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2013 return std::min(Tmp, Tmp2);
2021 if (Op.getResNo() != 1)
2023 // The boolean result conforms to getBooleanContents. Fall through.
2025 // If setcc returns 0/-1, all bits are sign bits.
2026 if (TLI.getBooleanContents() ==
2027 TargetLowering::ZeroOrNegativeOneBooleanContent)
2032 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2033 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2035 // Handle rotate right by N like a rotate left by 32-N.
2036 if (Op.getOpcode() == ISD::ROTR)
2037 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2039 // If we aren't rotating out all of the known-in sign bits, return the
2040 // number that are left. This handles rotl(sext(x), 1) for example.
2041 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2042 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2046 // Add can have at most one carry bit. Thus we know that the output
2047 // is, at worst, one more bit than the inputs.
2048 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2049 if (Tmp == 1) return 1; // Early out.
2051 // Special case decrementing a value (ADD X, -1):
2052 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2053 if (CRHS->isAllOnesValue()) {
2054 APInt KnownZero, KnownOne;
2055 APInt Mask = APInt::getAllOnesValue(VTBits);
2056 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
2058 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2060 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2063 // If we are subtracting one from a positive number, there is no carry
2064 // out of the result.
2065 if (KnownZero.isNegative())
2069 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2070 if (Tmp2 == 1) return 1;
2071 return std::min(Tmp, Tmp2)-1;
2075 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2076 if (Tmp2 == 1) return 1;
2079 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2080 if (CLHS->isNullValue()) {
2081 APInt KnownZero, KnownOne;
2082 APInt Mask = APInt::getAllOnesValue(VTBits);
2083 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
2084 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2086 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2089 // If the input is known to be positive (the sign bit is known clear),
2090 // the output of the NEG has the same number of sign bits as the input.
2091 if (KnownZero.isNegative())
2094 // Otherwise, we treat this like a SUB.
2097 // Sub can have at most one carry bit. Thus we know that the output
2098 // is, at worst, one more bit than the inputs.
2099 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2100 if (Tmp == 1) return 1; // Early out.
2101 return std::min(Tmp, Tmp2)-1;
2104 // FIXME: it's tricky to do anything useful for this, but it is an important
2105 // case for targets like X86.
2109 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2110 if (Op.getOpcode() == ISD::LOAD) {
2111 LoadSDNode *LD = cast<LoadSDNode>(Op);
2112 unsigned ExtType = LD->getExtensionType();
2115 case ISD::SEXTLOAD: // '17' bits known
2116 Tmp = LD->getMemoryVT().getSizeInBits();
2117 return VTBits-Tmp+1;
2118 case ISD::ZEXTLOAD: // '16' bits known
2119 Tmp = LD->getMemoryVT().getSizeInBits();
2124 // Allow the target to implement this method for its nodes.
2125 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2126 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2127 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2128 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2129 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2130 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2133 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2134 // use this information.
2135 APInt KnownZero, KnownOne;
2136 APInt Mask = APInt::getAllOnesValue(VTBits);
2137 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
2139 if (KnownZero.isNegative()) { // sign bit is 0
2141 } else if (KnownOne.isNegative()) { // sign bit is 1;
2148 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2149 // the number of identical bits in the top of the input value.
2151 Mask <<= Mask.getBitWidth()-VTBits;
2152 // Return # leading zeros. We use 'min' here in case Val was zero before
2153 // shifting. We don't want to return '64' as for an i32 "0".
2154 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2158 bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const {
2159 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op);
2160 if (!GA) return false;
2161 if (GA->getOffset() != 0) return false;
2162 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal());
2163 if (!GV) return false;
2164 MachineModuleInfo *MMI = getMachineModuleInfo();
2165 return MMI && MMI->hasDebugInfo();
2169 /// getShuffleScalarElt - Returns the scalar element that will make up the ith
2170 /// element of the result of the vector shuffle.
2171 SDValue SelectionDAG::getShuffleScalarElt(const SDNode *N, unsigned i) {
2172 MVT VT = N->getValueType(0);
2173 DebugLoc dl = N->getDebugLoc();
2174 SDValue PermMask = N->getOperand(2);
2175 SDValue Idx = PermMask.getOperand(i);
2176 if (Idx.getOpcode() == ISD::UNDEF)
2177 return getNode(ISD::UNDEF, dl, VT.getVectorElementType());
2178 unsigned Index = cast<ConstantSDNode>(Idx)->getZExtValue();
2179 unsigned NumElems = PermMask.getNumOperands();
2180 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1);
2183 if (V.getOpcode() == ISD::BIT_CONVERT) {
2184 V = V.getOperand(0);
2185 MVT VVT = V.getValueType();
2186 if (!VVT.isVector() || VVT.getVectorNumElements() != NumElems)
2189 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR)
2190 return (Index == 0) ? V.getOperand(0)
2191 : getNode(ISD::UNDEF, dl, VT.getVectorElementType());
2192 if (V.getOpcode() == ISD::BUILD_VECTOR)
2193 return V.getOperand(Index);
2194 if (V.getOpcode() == ISD::VECTOR_SHUFFLE)
2195 return getShuffleScalarElt(V.getNode(), Index);
2200 /// getNode - Gets or creates the specified node.
2202 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT) {
2203 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT);
2206 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT) {
2207 FoldingSetNodeID ID;
2208 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2210 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2211 return SDValue(E, 0);
2212 SDNode *N = NodeAllocator.Allocate<SDNode>();
2213 new (N) SDNode(Opcode, DL, SDNode::getSDVTList(VT));
2214 CSEMap.InsertNode(N, IP);
2216 AllNodes.push_back(N);
2220 return SDValue(N, 0);
2223 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, SDValue Operand) {
2224 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, Operand);
2227 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
2228 MVT VT, SDValue Operand) {
2229 // Constant fold unary operations with an integer constant operand.
2230 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2231 const APInt &Val = C->getAPIntValue();
2232 unsigned BitWidth = VT.getSizeInBits();
2235 case ISD::SIGN_EXTEND:
2236 return getConstant(APInt(Val).sextOrTrunc(BitWidth), VT);
2237 case ISD::ANY_EXTEND:
2238 case ISD::ZERO_EXTEND:
2240 return getConstant(APInt(Val).zextOrTrunc(BitWidth), VT);
2241 case ISD::UINT_TO_FP:
2242 case ISD::SINT_TO_FP: {
2243 const uint64_t zero[] = {0, 0};
2244 // No compile time operations on this type.
2245 if (VT==MVT::ppcf128)
2247 APFloat apf = APFloat(APInt(BitWidth, 2, zero));
2248 (void)apf.convertFromAPInt(Val,
2249 Opcode==ISD::SINT_TO_FP,
2250 APFloat::rmNearestTiesToEven);
2251 return getConstantFP(apf, VT);
2253 case ISD::BIT_CONVERT:
2254 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2255 return getConstantFP(Val.bitsToFloat(), VT);
2256 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2257 return getConstantFP(Val.bitsToDouble(), VT);
2260 return getConstant(Val.byteSwap(), VT);
2262 return getConstant(Val.countPopulation(), VT);
2264 return getConstant(Val.countLeadingZeros(), VT);
2266 return getConstant(Val.countTrailingZeros(), VT);
2270 // Constant fold unary operations with a floating point constant operand.
2271 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2272 APFloat V = C->getValueAPF(); // make copy
2273 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) {
2277 return getConstantFP(V, VT);
2280 return getConstantFP(V, VT);
2282 case ISD::FP_EXTEND: {
2284 // This can return overflow, underflow, or inexact; we don't care.
2285 // FIXME need to be more flexible about rounding mode.
2286 (void)V.convert(*MVTToAPFloatSemantics(VT),
2287 APFloat::rmNearestTiesToEven, &ignored);
2288 return getConstantFP(V, VT);
2290 case ISD::FP_TO_SINT:
2291 case ISD::FP_TO_UINT: {
2294 assert(integerPartWidth >= 64);
2295 // FIXME need to be more flexible about rounding mode.
2296 APFloat::opStatus s = V.convertToInteger(&x, 64U,
2297 Opcode==ISD::FP_TO_SINT,
2298 APFloat::rmTowardZero, &ignored);
2299 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2301 return getConstant(x, VT);
2303 case ISD::BIT_CONVERT:
2304 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2305 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2306 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2307 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2313 unsigned OpOpcode = Operand.getNode()->getOpcode();
2315 case ISD::TokenFactor:
2316 case ISD::MERGE_VALUES:
2317 case ISD::CONCAT_VECTORS:
2318 return Operand; // Factor, merge or concat of one node? No need.
2319 case ISD::FP_ROUND: assert(0 && "Invalid method to make FP_ROUND node");
2320 case ISD::FP_EXTEND:
2321 assert(VT.isFloatingPoint() &&
2322 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2323 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2324 if (Operand.getOpcode() == ISD::UNDEF)
2325 return getNode(ISD::UNDEF, DL, VT);
2327 case ISD::SIGN_EXTEND:
2328 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2329 "Invalid SIGN_EXTEND!");
2330 if (Operand.getValueType() == VT) return Operand; // noop extension
2331 assert(Operand.getValueType().bitsLT(VT)
2332 && "Invalid sext node, dst < src!");
2333 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2334 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2336 case ISD::ZERO_EXTEND:
2337 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2338 "Invalid ZERO_EXTEND!");
2339 if (Operand.getValueType() == VT) return Operand; // noop extension
2340 assert(Operand.getValueType().bitsLT(VT)
2341 && "Invalid zext node, dst < src!");
2342 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2343 return getNode(ISD::ZERO_EXTEND, DL, VT,
2344 Operand.getNode()->getOperand(0));
2346 case ISD::ANY_EXTEND:
2347 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2348 "Invalid ANY_EXTEND!");
2349 if (Operand.getValueType() == VT) return Operand; // noop extension
2350 assert(Operand.getValueType().bitsLT(VT)
2351 && "Invalid anyext node, dst < src!");
2352 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND)
2353 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2354 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2357 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2358 "Invalid TRUNCATE!");
2359 if (Operand.getValueType() == VT) return Operand; // noop truncate
2360 assert(Operand.getValueType().bitsGT(VT)
2361 && "Invalid truncate node, src < dst!");
2362 if (OpOpcode == ISD::TRUNCATE)
2363 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2364 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2365 OpOpcode == ISD::ANY_EXTEND) {
2366 // If the source is smaller than the dest, we still need an extend.
2367 if (Operand.getNode()->getOperand(0).getValueType().bitsLT(VT))
2368 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2369 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2370 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2372 return Operand.getNode()->getOperand(0);
2375 case ISD::BIT_CONVERT:
2376 // Basic sanity checking.
2377 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2378 && "Cannot BIT_CONVERT between types of different sizes!");
2379 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2380 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x)
2381 return getNode(ISD::BIT_CONVERT, DL, VT, Operand.getOperand(0));
2382 if (OpOpcode == ISD::UNDEF)
2383 return getNode(ISD::UNDEF, DL, VT);
2385 case ISD::SCALAR_TO_VECTOR:
2386 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2387 VT.getVectorElementType() == Operand.getValueType() &&
2388 "Illegal SCALAR_TO_VECTOR node!");
2389 if (OpOpcode == ISD::UNDEF)
2390 return getNode(ISD::UNDEF, DL, VT);
2391 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2392 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2393 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2394 Operand.getConstantOperandVal(1) == 0 &&
2395 Operand.getOperand(0).getValueType() == VT)
2396 return Operand.getOperand(0);
2399 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
2400 if (UnsafeFPMath && OpOpcode == ISD::FSUB)
2401 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
2402 Operand.getNode()->getOperand(0));
2403 if (OpOpcode == ISD::FNEG) // --X -> X
2404 return Operand.getNode()->getOperand(0);
2407 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2408 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
2413 SDVTList VTs = getVTList(VT);
2414 if (VT != MVT::Flag) { // Don't CSE flag producing nodes
2415 FoldingSetNodeID ID;
2416 SDValue Ops[1] = { Operand };
2417 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2419 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2420 return SDValue(E, 0);
2421 N = NodeAllocator.Allocate<UnarySDNode>();
2422 new (N) UnarySDNode(Opcode, DL, VTs, Operand);
2423 CSEMap.InsertNode(N, IP);
2425 N = NodeAllocator.Allocate<UnarySDNode>();
2426 new (N) UnarySDNode(Opcode, DL, VTs, Operand);
2429 AllNodes.push_back(N);
2433 return SDValue(N, 0);
2436 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2438 ConstantSDNode *Cst1,
2439 ConstantSDNode *Cst2) {
2440 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
2443 case ISD::ADD: return getConstant(C1 + C2, VT);
2444 case ISD::SUB: return getConstant(C1 - C2, VT);
2445 case ISD::MUL: return getConstant(C1 * C2, VT);
2447 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2450 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2453 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2456 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2458 case ISD::AND: return getConstant(C1 & C2, VT);
2459 case ISD::OR: return getConstant(C1 | C2, VT);
2460 case ISD::XOR: return getConstant(C1 ^ C2, VT);
2461 case ISD::SHL: return getConstant(C1 << C2, VT);
2462 case ISD::SRL: return getConstant(C1.lshr(C2), VT);
2463 case ISD::SRA: return getConstant(C1.ashr(C2), VT);
2464 case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2465 case ISD::ROTR: return getConstant(C1.rotr(C2), VT);
2472 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
2473 SDValue N1, SDValue N2) {
2474 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, N1, N2);
2477 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
2478 SDValue N1, SDValue N2) {
2479 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2480 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2483 case ISD::TokenFactor:
2484 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2485 N2.getValueType() == MVT::Other && "Invalid token factor!");
2486 // Fold trivial token factors.
2487 if (N1.getOpcode() == ISD::EntryToken) return N2;
2488 if (N2.getOpcode() == ISD::EntryToken) return N1;
2489 if (N1 == N2) return N1;
2491 case ISD::CONCAT_VECTORS:
2492 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2493 // one big BUILD_VECTOR.
2494 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2495 N2.getOpcode() == ISD::BUILD_VECTOR) {
2496 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2497 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2498 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2502 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2503 N1.getValueType() == VT && "Binary operator types must match!");
2504 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2505 // worth handling here.
2506 if (N2C && N2C->isNullValue())
2508 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2515 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2516 N1.getValueType() == VT && "Binary operator types must match!");
2517 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2518 // it's worth handling here.
2519 if (N2C && N2C->isNullValue())
2529 assert(VT.isInteger() && "This operator does not apply to FP types!");
2537 if (Opcode == ISD::FADD) {
2539 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
2540 if (CFP->getValueAPF().isZero())
2543 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2544 if (CFP->getValueAPF().isZero())
2546 } else if (Opcode == ISD::FSUB) {
2548 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2549 if (CFP->getValueAPF().isZero())
2553 assert(N1.getValueType() == N2.getValueType() &&
2554 N1.getValueType() == VT && "Binary operator types must match!");
2556 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2557 assert(N1.getValueType() == VT &&
2558 N1.getValueType().isFloatingPoint() &&
2559 N2.getValueType().isFloatingPoint() &&
2560 "Invalid FCOPYSIGN!");
2567 assert(VT == N1.getValueType() &&
2568 "Shift operators return type must be the same as their first arg");
2569 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2570 "Shifts only work on integers");
2572 // Always fold shifts of i1 values so the code generator doesn't need to
2573 // handle them. Since we know the size of the shift has to be less than the
2574 // size of the value, the shift/rotate count is guaranteed to be zero.
2578 case ISD::FP_ROUND_INREG: {
2579 MVT EVT = cast<VTSDNode>(N2)->getVT();
2580 assert(VT == N1.getValueType() && "Not an inreg round!");
2581 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2582 "Cannot FP_ROUND_INREG integer types");
2583 assert(EVT.bitsLE(VT) && "Not rounding down!");
2584 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2588 assert(VT.isFloatingPoint() &&
2589 N1.getValueType().isFloatingPoint() &&
2590 VT.bitsLE(N1.getValueType()) &&
2591 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2592 if (N1.getValueType() == VT) return N1; // noop conversion.
2594 case ISD::AssertSext:
2595 case ISD::AssertZext: {
2596 MVT EVT = cast<VTSDNode>(N2)->getVT();
2597 assert(VT == N1.getValueType() && "Not an inreg extend!");
2598 assert(VT.isInteger() && EVT.isInteger() &&
2599 "Cannot *_EXTEND_INREG FP types");
2600 assert(EVT.bitsLE(VT) && "Not extending!");
2601 if (VT == EVT) return N1; // noop assertion.
2604 case ISD::SIGN_EXTEND_INREG: {
2605 MVT EVT = cast<VTSDNode>(N2)->getVT();
2606 assert(VT == N1.getValueType() && "Not an inreg extend!");
2607 assert(VT.isInteger() && EVT.isInteger() &&
2608 "Cannot *_EXTEND_INREG FP types");
2609 assert(EVT.bitsLE(VT) && "Not extending!");
2610 if (EVT == VT) return N1; // Not actually extending
2613 APInt Val = N1C->getAPIntValue();
2614 unsigned FromBits = cast<VTSDNode>(N2)->getVT().getSizeInBits();
2615 Val <<= Val.getBitWidth()-FromBits;
2616 Val = Val.ashr(Val.getBitWidth()-FromBits);
2617 return getConstant(Val, VT);
2621 case ISD::EXTRACT_VECTOR_ELT:
2622 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2623 if (N1.getOpcode() == ISD::UNDEF)
2624 return getNode(ISD::UNDEF, DL, VT);
2626 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2627 // expanding copies of large vectors from registers.
2629 N1.getOpcode() == ISD::CONCAT_VECTORS &&
2630 N1.getNumOperands() > 0) {
2632 N1.getOperand(0).getValueType().getVectorNumElements();
2633 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
2634 N1.getOperand(N2C->getZExtValue() / Factor),
2635 getConstant(N2C->getZExtValue() % Factor,
2636 N2.getValueType()));
2639 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2640 // expanding large vector constants.
2641 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR)
2642 return N1.getOperand(N2C->getZExtValue());
2644 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2645 // operations are lowered to scalars.
2646 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2647 // If the indices are the same, return the inserted element.
2648 if (N1.getOperand(2) == N2)
2649 return N1.getOperand(1);
2650 // If the indices are known different, extract the element from
2651 // the original vector.
2652 else if (isa<ConstantSDNode>(N1.getOperand(2)) &&
2653 isa<ConstantSDNode>(N2))
2654 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
2657 case ISD::EXTRACT_ELEMENT:
2658 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
2659 assert(!N1.getValueType().isVector() && !VT.isVector() &&
2660 (N1.getValueType().isInteger() == VT.isInteger()) &&
2661 "Wrong types for EXTRACT_ELEMENT!");
2663 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2664 // 64-bit integers into 32-bit parts. Instead of building the extract of
2665 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2666 if (N1.getOpcode() == ISD::BUILD_PAIR)
2667 return N1.getOperand(N2C->getZExtValue());
2669 // EXTRACT_ELEMENT of a constant int is also very common.
2670 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2671 unsigned ElementSize = VT.getSizeInBits();
2672 unsigned Shift = ElementSize * N2C->getZExtValue();
2673 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2674 return getConstant(ShiftedVal.trunc(ElementSize), VT);
2677 case ISD::EXTRACT_SUBVECTOR:
2678 if (N1.getValueType() == VT) // Trivial extraction.
2685 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
2686 if (SV.getNode()) return SV;
2687 } else { // Cannonicalize constant to RHS if commutative
2688 if (isCommutativeBinOp(Opcode)) {
2689 std::swap(N1C, N2C);
2695 // Constant fold FP operations.
2696 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
2697 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
2699 if (!N2CFP && isCommutativeBinOp(Opcode)) {
2700 // Cannonicalize constant to RHS if commutative
2701 std::swap(N1CFP, N2CFP);
2703 } else if (N2CFP && VT != MVT::ppcf128) {
2704 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
2705 APFloat::opStatus s;
2708 s = V1.add(V2, APFloat::rmNearestTiesToEven);
2709 if (s != APFloat::opInvalidOp)
2710 return getConstantFP(V1, VT);
2713 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
2714 if (s!=APFloat::opInvalidOp)
2715 return getConstantFP(V1, VT);
2718 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
2719 if (s!=APFloat::opInvalidOp)
2720 return getConstantFP(V1, VT);
2723 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
2724 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2725 return getConstantFP(V1, VT);
2728 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
2729 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2730 return getConstantFP(V1, VT);
2732 case ISD::FCOPYSIGN:
2734 return getConstantFP(V1, VT);
2740 // Canonicalize an UNDEF to the RHS, even over a constant.
2741 if (N1.getOpcode() == ISD::UNDEF) {
2742 if (isCommutativeBinOp(Opcode)) {
2746 case ISD::FP_ROUND_INREG:
2747 case ISD::SIGN_EXTEND_INREG:
2753 return N1; // fold op(undef, arg2) -> undef
2761 return getConstant(0, VT); // fold op(undef, arg2) -> 0
2762 // For vectors, we can't easily build an all zero vector, just return
2769 // Fold a bunch of operators when the RHS is undef.
2770 if (N2.getOpcode() == ISD::UNDEF) {
2773 if (N1.getOpcode() == ISD::UNDEF)
2774 // Handle undef ^ undef -> 0 special case. This is a common
2776 return getConstant(0, VT);
2791 return N2; // fold op(arg1, undef) -> undef
2797 return getConstant(0, VT); // fold op(arg1, undef) -> 0
2798 // For vectors, we can't easily build an all zero vector, just return
2803 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
2804 // For vectors, we can't easily build an all one vector, just return
2812 // Memoize this node if possible.
2814 SDVTList VTs = getVTList(VT);
2815 if (VT != MVT::Flag) {
2816 SDValue Ops[] = { N1, N2 };
2817 FoldingSetNodeID ID;
2818 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
2820 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2821 return SDValue(E, 0);
2822 N = NodeAllocator.Allocate<BinarySDNode>();
2823 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2);
2824 CSEMap.InsertNode(N, IP);
2826 N = NodeAllocator.Allocate<BinarySDNode>();
2827 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2);
2830 AllNodes.push_back(N);
2834 return SDValue(N, 0);
2837 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
2838 SDValue N1, SDValue N2, SDValue N3) {
2839 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, N1, N2, N3);
2842 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
2843 SDValue N1, SDValue N2, SDValue N3) {
2844 // Perform various simplifications.
2845 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2846 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2848 case ISD::CONCAT_VECTORS:
2849 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2850 // one big BUILD_VECTOR.
2851 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2852 N2.getOpcode() == ISD::BUILD_VECTOR &&
2853 N3.getOpcode() == ISD::BUILD_VECTOR) {
2854 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2855 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2856 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end());
2857 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2861 // Use FoldSetCC to simplify SETCC's.
2862 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
2863 if (Simp.getNode()) return Simp;
2868 if (N1C->getZExtValue())
2869 return N2; // select true, X, Y -> X
2871 return N3; // select false, X, Y -> Y
2874 if (N2 == N3) return N2; // select C, X, X -> X
2878 if (N2C->getZExtValue()) // Unconditional branch
2879 return getNode(ISD::BR, DL, MVT::Other, N1, N3);
2881 return N1; // Never-taken branch
2884 case ISD::VECTOR_SHUFFLE:
2885 assert(N1.getValueType() == N2.getValueType() &&
2886 N1.getValueType().isVector() &&
2887 VT.isVector() && N3.getValueType().isVector() &&
2888 N3.getOpcode() == ISD::BUILD_VECTOR &&
2889 VT.getVectorNumElements() == N3.getNumOperands() &&
2890 "Illegal VECTOR_SHUFFLE node!");
2892 case ISD::BIT_CONVERT:
2893 // Fold bit_convert nodes from a type to themselves.
2894 if (N1.getValueType() == VT)
2899 // Memoize node if it doesn't produce a flag.
2901 SDVTList VTs = getVTList(VT);
2902 if (VT != MVT::Flag) {
2903 SDValue Ops[] = { N1, N2, N3 };
2904 FoldingSetNodeID ID;
2905 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
2907 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2908 return SDValue(E, 0);
2909 N = NodeAllocator.Allocate<TernarySDNode>();
2910 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
2911 CSEMap.InsertNode(N, IP);
2913 N = NodeAllocator.Allocate<TernarySDNode>();
2914 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
2916 AllNodes.push_back(N);
2920 return SDValue(N, 0);
2923 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
2924 SDValue N1, SDValue N2, SDValue N3,
2926 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, N1, N2, N3, N4);
2929 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
2930 SDValue N1, SDValue N2, SDValue N3,
2932 SDValue Ops[] = { N1, N2, N3, N4 };
2933 return getNode(Opcode, DL, VT, Ops, 4);
2936 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
2937 SDValue N1, SDValue N2, SDValue N3,
2938 SDValue N4, SDValue N5) {
2939 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, N1, N2, N3, N4, N5);
2942 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
2943 SDValue N1, SDValue N2, SDValue N3,
2944 SDValue N4, SDValue N5) {
2945 SDValue Ops[] = { N1, N2, N3, N4, N5 };
2946 return getNode(Opcode, DL, VT, Ops, 5);
2949 /// getMemsetValue - Vectorized representation of the memset value
2951 static SDValue getMemsetValue(SDValue Value, MVT VT, SelectionDAG &DAG,
2953 unsigned NumBits = VT.isVector() ?
2954 VT.getVectorElementType().getSizeInBits() : VT.getSizeInBits();
2955 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
2956 APInt Val = APInt(NumBits, C->getZExtValue() & 255);
2958 for (unsigned i = NumBits; i > 8; i >>= 1) {
2959 Val = (Val << Shift) | Val;
2963 return DAG.getConstant(Val, VT);
2964 return DAG.getConstantFP(APFloat(Val), VT);
2967 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
2968 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value);
2970 for (unsigned i = NumBits; i > 8; i >>= 1) {
2971 Value = DAG.getNode(ISD::OR, dl, VT,
2972 DAG.getNode(ISD::SHL, dl, VT, Value,
2973 DAG.getConstant(Shift,
2974 TLI.getShiftAmountTy())),
2982 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
2983 /// used when a memcpy is turned into a memset when the source is a constant
2985 static SDValue getMemsetStringVal(MVT VT, DebugLoc dl, SelectionDAG &DAG,
2986 const TargetLowering &TLI,
2987 std::string &Str, unsigned Offset) {
2988 // Handle vector with all elements zero.
2991 return DAG.getConstant(0, VT);
2992 unsigned NumElts = VT.getVectorNumElements();
2993 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
2994 return DAG.getNode(ISD::BIT_CONVERT, dl, VT,
2995 DAG.getConstant(0, MVT::getVectorVT(EltVT, NumElts)));
2998 assert(!VT.isVector() && "Can't handle vector type here!");
2999 unsigned NumBits = VT.getSizeInBits();
3000 unsigned MSB = NumBits / 8;
3002 if (TLI.isLittleEndian())
3003 Offset = Offset + MSB - 1;
3004 for (unsigned i = 0; i != MSB; ++i) {
3005 Val = (Val << 8) | (unsigned char)Str[Offset];
3006 Offset += TLI.isLittleEndian() ? -1 : 1;
3008 return DAG.getConstant(Val, VT);
3011 /// getMemBasePlusOffset - Returns base and offset node for the
3013 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
3014 SelectionDAG &DAG) {
3015 MVT VT = Base.getValueType();
3016 return DAG.getNode(ISD::ADD, Base.getNode()->getDebugLoc(),
3017 VT, Base, DAG.getConstant(Offset, VT));
3020 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
3022 static bool isMemSrcFromString(SDValue Src, std::string &Str) {
3023 unsigned SrcDelta = 0;
3024 GlobalAddressSDNode *G = NULL;
3025 if (Src.getOpcode() == ISD::GlobalAddress)
3026 G = cast<GlobalAddressSDNode>(Src);
3027 else if (Src.getOpcode() == ISD::ADD &&
3028 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
3029 Src.getOperand(1).getOpcode() == ISD::Constant) {
3030 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
3031 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
3036 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal());
3037 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false))
3043 /// MeetsMaxMemopRequirement - Determines if the number of memory ops required
3044 /// to replace the memset / memcpy is below the threshold. It also returns the
3045 /// types of the sequence of memory ops to perform memset / memcpy.
3047 bool MeetsMaxMemopRequirement(std::vector<MVT> &MemOps,
3048 SDValue Dst, SDValue Src,
3049 unsigned Limit, uint64_t Size, unsigned &Align,
3050 std::string &Str, bool &isSrcStr,
3052 const TargetLowering &TLI) {
3053 isSrcStr = isMemSrcFromString(Src, Str);
3054 bool isSrcConst = isa<ConstantSDNode>(Src);
3055 bool AllowUnalign = TLI.allowsUnalignedMemoryAccesses();
3056 MVT VT = TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr);
3057 if (VT != MVT::iAny) {
3058 unsigned NewAlign = (unsigned)
3059 TLI.getTargetData()->getABITypeAlignment(VT.getTypeForMVT());
3060 // If source is a string constant, this will require an unaligned load.
3061 if (NewAlign > Align && (isSrcConst || AllowUnalign)) {
3062 if (Dst.getOpcode() != ISD::FrameIndex) {
3063 // Can't change destination alignment. It requires a unaligned store.
3067 int FI = cast<FrameIndexSDNode>(Dst)->getIndex();
3068 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
3069 if (MFI->isFixedObjectIndex(FI)) {
3070 // Can't change destination alignment. It requires a unaligned store.
3074 // Give the stack frame object a larger alignment if needed.
3075 if (MFI->getObjectAlignment(FI) < NewAlign)
3076 MFI->setObjectAlignment(FI, NewAlign);
3083 if (VT == MVT::iAny) {
3087 switch (Align & 7) {
3088 case 0: VT = MVT::i64; break;
3089 case 4: VT = MVT::i32; break;
3090 case 2: VT = MVT::i16; break;
3091 default: VT = MVT::i8; break;
3096 while (!TLI.isTypeLegal(LVT))
3097 LVT = (MVT::SimpleValueType)(LVT.getSimpleVT() - 1);
3098 assert(LVT.isInteger());
3104 unsigned NumMemOps = 0;
3106 unsigned VTSize = VT.getSizeInBits() / 8;
3107 while (VTSize > Size) {
3108 // For now, only use non-vector load / store's for the left-over pieces.
3109 if (VT.isVector()) {
3111 while (!TLI.isTypeLegal(VT))
3112 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1);
3113 VTSize = VT.getSizeInBits() / 8;
3115 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1);
3120 if (++NumMemOps > Limit)
3122 MemOps.push_back(VT);
3129 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3130 SDValue Chain, SDValue Dst,
3131 SDValue Src, uint64_t Size,
3132 unsigned Align, bool AlwaysInline,
3133 const Value *DstSV, uint64_t DstSVOff,
3134 const Value *SrcSV, uint64_t SrcSVOff){
3135 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3137 // Expand memcpy to a series of load and store ops if the size operand falls
3138 // below a certain threshold.
3139 std::vector<MVT> MemOps;
3140 uint64_t Limit = -1ULL;
3142 Limit = TLI.getMaxStoresPerMemcpy();
3143 unsigned DstAlign = Align; // Destination alignment can change.
3146 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
3147 Str, CopyFromStr, DAG, TLI))
3151 bool isZeroStr = CopyFromStr && Str.empty();
3152 SmallVector<SDValue, 8> OutChains;
3153 unsigned NumMemOps = MemOps.size();
3154 uint64_t SrcOff = 0, DstOff = 0;
3155 for (unsigned i = 0; i < NumMemOps; i++) {
3157 unsigned VTSize = VT.getSizeInBits() / 8;
3158 SDValue Value, Store;
3160 if (CopyFromStr && (isZeroStr || !VT.isVector())) {
3161 // It's unlikely a store of a vector immediate can be done in a single
3162 // instruction. It would require a load from a constantpool first.
3163 // We also handle store a vector with all zero's.
3164 // FIXME: Handle other cases where store of vector immediate is done in
3165 // a single instruction.
3166 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff);
3167 Store = DAG.getStore(Chain, dl, Value,
3168 getMemBasePlusOffset(Dst, DstOff, DAG),
3169 DstSV, DstSVOff + DstOff, false, DstAlign);
3171 Value = DAG.getLoad(VT, dl, Chain,
3172 getMemBasePlusOffset(Src, SrcOff, DAG),
3173 SrcSV, SrcSVOff + SrcOff, false, Align);
3174 Store = DAG.getStore(Chain, dl, Value,
3175 getMemBasePlusOffset(Dst, DstOff, DAG),
3176 DstSV, DstSVOff + DstOff, false, DstAlign);
3178 OutChains.push_back(Store);
3183 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3184 &OutChains[0], OutChains.size());
3187 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3188 SDValue Chain, SDValue Dst,
3189 SDValue Src, uint64_t Size,
3190 unsigned Align, bool AlwaysInline,
3191 const Value *DstSV, uint64_t DstSVOff,
3192 const Value *SrcSV, uint64_t SrcSVOff){
3193 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3195 // Expand memmove to a series of load and store ops if the size operand falls
3196 // below a certain threshold.
3197 std::vector<MVT> MemOps;
3198 uint64_t Limit = -1ULL;
3200 Limit = TLI.getMaxStoresPerMemmove();
3201 unsigned DstAlign = Align; // Destination alignment can change.
3204 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
3205 Str, CopyFromStr, DAG, TLI))
3208 uint64_t SrcOff = 0, DstOff = 0;
3210 SmallVector<SDValue, 8> LoadValues;
3211 SmallVector<SDValue, 8> LoadChains;
3212 SmallVector<SDValue, 8> OutChains;
3213 unsigned NumMemOps = MemOps.size();
3214 for (unsigned i = 0; i < NumMemOps; i++) {
3216 unsigned VTSize = VT.getSizeInBits() / 8;
3217 SDValue Value, Store;
3219 Value = DAG.getLoad(VT, dl, Chain,
3220 getMemBasePlusOffset(Src, SrcOff, DAG),
3221 SrcSV, SrcSVOff + SrcOff, false, Align);
3222 LoadValues.push_back(Value);
3223 LoadChains.push_back(Value.getValue(1));
3226 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3227 &LoadChains[0], LoadChains.size());
3229 for (unsigned i = 0; i < NumMemOps; i++) {
3231 unsigned VTSize = VT.getSizeInBits() / 8;
3232 SDValue Value, Store;
3234 Store = DAG.getStore(Chain, dl, LoadValues[i],
3235 getMemBasePlusOffset(Dst, DstOff, DAG),
3236 DstSV, DstSVOff + DstOff, false, DstAlign);
3237 OutChains.push_back(Store);
3241 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3242 &OutChains[0], OutChains.size());
3245 static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl,
3246 SDValue Chain, SDValue Dst,
3247 SDValue Src, uint64_t Size,
3249 const Value *DstSV, uint64_t DstSVOff) {
3250 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3252 // Expand memset to a series of load/store ops if the size operand
3253 // falls below a certain threshold.
3254 std::vector<MVT> MemOps;
3257 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, TLI.getMaxStoresPerMemset(),
3258 Size, Align, Str, CopyFromStr, DAG, TLI))
3261 SmallVector<SDValue, 8> OutChains;
3262 uint64_t DstOff = 0;
3264 unsigned NumMemOps = MemOps.size();
3265 for (unsigned i = 0; i < NumMemOps; i++) {
3267 unsigned VTSize = VT.getSizeInBits() / 8;
3268 SDValue Value = getMemsetValue(Src, VT, DAG, dl);
3269 SDValue Store = DAG.getStore(Chain, dl, Value,
3270 getMemBasePlusOffset(Dst, DstOff, DAG),
3271 DstSV, DstSVOff + DstOff);
3272 OutChains.push_back(Store);
3276 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3277 &OutChains[0], OutChains.size());
3280 SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst,
3281 SDValue Src, SDValue Size,
3282 unsigned Align, bool AlwaysInline,
3283 const Value *DstSV, uint64_t DstSVOff,
3284 const Value *SrcSV, uint64_t SrcSVOff) {
3286 // Check to see if we should lower the memcpy to loads and stores first.
3287 // For cases within the target-specified limits, this is the best choice.
3288 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3290 // Memcpy with size zero? Just return the original chain.
3291 if (ConstantSize->isNullValue())
3295 getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3296 ConstantSize->getZExtValue(),
3297 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3298 if (Result.getNode())
3302 // Then check to see if we should lower the memcpy with target-specific
3303 // code. If the target chooses to do this, this is the next best.
3305 TLI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align,
3307 DstSV, DstSVOff, SrcSV, SrcSVOff);
3308 if (Result.getNode())
3311 // If we really need inline code and the target declined to provide it,
3312 // use a (potentially long) sequence of loads and stores.
3314 assert(ConstantSize && "AlwaysInline requires a constant size!");
3315 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3316 ConstantSize->getZExtValue(), Align, true,
3317 DstSV, DstSVOff, SrcSV, SrcSVOff);
3320 // Emit a library call.
3321 TargetLowering::ArgListTy Args;
3322 TargetLowering::ArgListEntry Entry;
3323 Entry.Ty = TLI.getTargetData()->getIntPtrType();
3324 Entry.Node = Dst; Args.push_back(Entry);
3325 Entry.Node = Src; Args.push_back(Entry);
3326 Entry.Node = Size; Args.push_back(Entry);
3327 // FIXME: pass in DebugLoc
3328 std::pair<SDValue,SDValue> CallResult =
3329 TLI.LowerCallTo(Chain, Type::VoidTy,
3330 false, false, false, false, CallingConv::C, false,
3331 getExternalSymbol("memcpy", TLI.getPointerTy()),
3333 return CallResult.second;
3336 SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst,
3337 SDValue Src, SDValue Size,
3339 const Value *DstSV, uint64_t DstSVOff,
3340 const Value *SrcSV, uint64_t SrcSVOff) {
3342 // Check to see if we should lower the memmove to loads and stores first.
3343 // For cases within the target-specified limits, this is the best choice.
3344 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3346 // Memmove with size zero? Just return the original chain.
3347 if (ConstantSize->isNullValue())
3351 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
3352 ConstantSize->getZExtValue(),
3353 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3354 if (Result.getNode())
3358 // Then check to see if we should lower the memmove with target-specific
3359 // code. If the target chooses to do this, this is the next best.
3361 TLI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align,
3362 DstSV, DstSVOff, SrcSV, SrcSVOff);
3363 if (Result.getNode())
3366 // Emit a library call.
3367 TargetLowering::ArgListTy Args;
3368 TargetLowering::ArgListEntry Entry;
3369 Entry.Ty = TLI.getTargetData()->getIntPtrType();
3370 Entry.Node = Dst; Args.push_back(Entry);
3371 Entry.Node = Src; Args.push_back(Entry);
3372 Entry.Node = Size; Args.push_back(Entry);
3373 // FIXME: pass in DebugLoc
3374 std::pair<SDValue,SDValue> CallResult =
3375 TLI.LowerCallTo(Chain, Type::VoidTy,
3376 false, false, false, false, CallingConv::C, false,
3377 getExternalSymbol("memmove", TLI.getPointerTy()),
3379 return CallResult.second;
3382 SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst,
3383 SDValue Src, SDValue Size,
3385 const Value *DstSV, uint64_t DstSVOff) {
3387 // Check to see if we should lower the memset to stores first.
3388 // For cases within the target-specified limits, this is the best choice.
3389 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3391 // Memset with size zero? Just return the original chain.
3392 if (ConstantSize->isNullValue())
3396 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
3397 Align, DstSV, DstSVOff);
3398 if (Result.getNode())
3402 // Then check to see if we should lower the memset with target-specific
3403 // code. If the target chooses to do this, this is the next best.
3405 TLI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align,
3407 if (Result.getNode())
3410 // Emit a library call.
3411 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType();
3412 TargetLowering::ArgListTy Args;
3413 TargetLowering::ArgListEntry Entry;
3414 Entry.Node = Dst; Entry.Ty = IntPtrTy;
3415 Args.push_back(Entry);
3416 // Extend or truncate the argument to be an i32 value for the call.
3417 if (Src.getValueType().bitsGT(MVT::i32))
3418 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
3420 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
3421 Entry.Node = Src; Entry.Ty = Type::Int32Ty; Entry.isSExt = true;
3422 Args.push_back(Entry);
3423 Entry.Node = Size; Entry.Ty = IntPtrTy; Entry.isSExt = false;
3424 Args.push_back(Entry);
3425 // FIXME: pass in DebugLoc
3426 std::pair<SDValue,SDValue> CallResult =
3427 TLI.LowerCallTo(Chain, Type::VoidTy,
3428 false, false, false, false, CallingConv::C, false,
3429 getExternalSymbol("memset", TLI.getPointerTy()),
3431 return CallResult.second;
3434 SDValue SelectionDAG::getAtomic(unsigned Opcode, MVT MemVT,
3436 SDValue Ptr, SDValue Cmp,
3437 SDValue Swp, const Value* PtrVal,
3438 unsigned Alignment) {
3439 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
3440 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3442 MVT VT = Cmp.getValueType();
3444 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3445 Alignment = getMVTAlignment(MemVT);
3447 SDVTList VTs = getVTList(VT, MVT::Other);
3448 FoldingSetNodeID ID;
3449 ID.AddInteger(MemVT.getRawBits());
3450 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3451 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3453 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3454 return SDValue(E, 0);
3455 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3456 new (N) AtomicSDNode(Opcode, VTs, MemVT,
3457 Chain, Ptr, Cmp, Swp, PtrVal, Alignment);
3458 CSEMap.InsertNode(N, IP);
3459 AllNodes.push_back(N);
3460 return SDValue(N, 0);
3463 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, MVT MemVT,
3465 SDValue Ptr, SDValue Cmp,
3466 SDValue Swp, const Value* PtrVal,
3467 unsigned Alignment) {
3468 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
3469 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3471 MVT VT = Cmp.getValueType();
3473 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3474 Alignment = getMVTAlignment(MemVT);
3476 SDVTList VTs = getVTList(VT, MVT::Other);
3477 FoldingSetNodeID ID;
3478 ID.AddInteger(MemVT.getRawBits());
3479 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3480 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3482 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3483 return SDValue(E, 0);
3484 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3485 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT,
3486 Chain, Ptr, Cmp, Swp, PtrVal, Alignment);
3487 CSEMap.InsertNode(N, IP);
3488 AllNodes.push_back(N);
3489 return SDValue(N, 0);
3492 SDValue SelectionDAG::getAtomic(unsigned Opcode, MVT MemVT,
3494 SDValue Ptr, SDValue Val,
3495 const Value* PtrVal,
3496 unsigned Alignment) {
3497 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
3498 Opcode == ISD::ATOMIC_LOAD_SUB ||
3499 Opcode == ISD::ATOMIC_LOAD_AND ||
3500 Opcode == ISD::ATOMIC_LOAD_OR ||
3501 Opcode == ISD::ATOMIC_LOAD_XOR ||
3502 Opcode == ISD::ATOMIC_LOAD_NAND ||
3503 Opcode == ISD::ATOMIC_LOAD_MIN ||
3504 Opcode == ISD::ATOMIC_LOAD_MAX ||
3505 Opcode == ISD::ATOMIC_LOAD_UMIN ||
3506 Opcode == ISD::ATOMIC_LOAD_UMAX ||
3507 Opcode == ISD::ATOMIC_SWAP) &&
3508 "Invalid Atomic Op");
3510 MVT VT = Val.getValueType();
3512 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3513 Alignment = getMVTAlignment(MemVT);
3515 SDVTList VTs = getVTList(VT, MVT::Other);
3516 FoldingSetNodeID ID;
3517 ID.AddInteger(MemVT.getRawBits());
3518 SDValue Ops[] = {Chain, Ptr, Val};
3519 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3521 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3522 return SDValue(E, 0);
3523 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3524 new (N) AtomicSDNode(Opcode, VTs, MemVT,
3525 Chain, Ptr, Val, PtrVal, Alignment);
3526 CSEMap.InsertNode(N, IP);
3527 AllNodes.push_back(N);
3528 return SDValue(N, 0);
3531 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, MVT MemVT,
3533 SDValue Ptr, SDValue Val,
3534 const Value* PtrVal,
3535 unsigned Alignment) {
3536 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
3537 Opcode == ISD::ATOMIC_LOAD_SUB ||
3538 Opcode == ISD::ATOMIC_LOAD_AND ||
3539 Opcode == ISD::ATOMIC_LOAD_OR ||
3540 Opcode == ISD::ATOMIC_LOAD_XOR ||
3541 Opcode == ISD::ATOMIC_LOAD_NAND ||
3542 Opcode == ISD::ATOMIC_LOAD_MIN ||
3543 Opcode == ISD::ATOMIC_LOAD_MAX ||
3544 Opcode == ISD::ATOMIC_LOAD_UMIN ||
3545 Opcode == ISD::ATOMIC_LOAD_UMAX ||
3546 Opcode == ISD::ATOMIC_SWAP) &&
3547 "Invalid Atomic Op");
3549 MVT VT = Val.getValueType();
3551 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3552 Alignment = getMVTAlignment(MemVT);
3554 SDVTList VTs = getVTList(VT, MVT::Other);
3555 FoldingSetNodeID ID;
3556 ID.AddInteger(MemVT.getRawBits());
3557 SDValue Ops[] = {Chain, Ptr, Val};
3558 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3560 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3561 return SDValue(E, 0);
3562 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3563 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT,
3564 Chain, Ptr, Val, PtrVal, Alignment);
3565 CSEMap.InsertNode(N, IP);
3566 AllNodes.push_back(N);
3567 return SDValue(N, 0);
3570 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
3571 /// Allowed to return something different (and simpler) if Simplify is true.
3572 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps) {
3576 SmallVector<MVT, 4> VTs;
3577 VTs.reserve(NumOps);
3578 for (unsigned i = 0; i < NumOps; ++i)
3579 VTs.push_back(Ops[i].getValueType());
3580 return getNode(ISD::MERGE_VALUES, getVTList(&VTs[0], NumOps), Ops, NumOps);
3583 /// DebugLoc-aware version.
3584 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps,
3589 SmallVector<MVT, 4> VTs;
3590 VTs.reserve(NumOps);
3591 for (unsigned i = 0; i < NumOps; ++i)
3592 VTs.push_back(Ops[i].getValueType());
3593 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps),
3598 SelectionDAG::getMemIntrinsicNode(unsigned Opcode,
3599 const MVT *VTs, unsigned NumVTs,
3600 const SDValue *Ops, unsigned NumOps,
3601 MVT MemVT, const Value *srcValue, int SVOff,
3602 unsigned Align, bool Vol,
3603 bool ReadMem, bool WriteMem) {
3604 return getMemIntrinsicNode(Opcode, makeVTList(VTs, NumVTs), Ops, NumOps,
3605 MemVT, srcValue, SVOff, Align, Vol,
3610 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl,
3611 const MVT *VTs, unsigned NumVTs,
3612 const SDValue *Ops, unsigned NumOps,
3613 MVT MemVT, const Value *srcValue, int SVOff,
3614 unsigned Align, bool Vol,
3615 bool ReadMem, bool WriteMem) {
3616 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps,
3617 MemVT, srcValue, SVOff, Align, Vol,
3622 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDVTList VTList,
3623 const SDValue *Ops, unsigned NumOps,
3624 MVT MemVT, const Value *srcValue, int SVOff,
3625 unsigned Align, bool Vol,
3626 bool ReadMem, bool WriteMem) {
3627 // Memoize the node unless it returns a flag.
3628 MemIntrinsicSDNode *N;
3629 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3630 FoldingSetNodeID ID;
3631 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3633 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3634 return SDValue(E, 0);
3636 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3637 new (N) MemIntrinsicSDNode(Opcode, VTList, Ops, NumOps, MemVT,
3638 srcValue, SVOff, Align, Vol, ReadMem, WriteMem);
3639 CSEMap.InsertNode(N, IP);
3641 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3642 new (N) MemIntrinsicSDNode(Opcode, VTList, Ops, NumOps, MemVT,
3643 srcValue, SVOff, Align, Vol, ReadMem, WriteMem);
3645 AllNodes.push_back(N);
3646 return SDValue(N, 0);
3650 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
3651 const SDValue *Ops, unsigned NumOps,
3652 MVT MemVT, const Value *srcValue, int SVOff,
3653 unsigned Align, bool Vol,
3654 bool ReadMem, bool WriteMem) {
3655 // Memoize the node unless it returns a flag.
3656 MemIntrinsicSDNode *N;
3657 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3658 FoldingSetNodeID ID;
3659 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3661 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3662 return SDValue(E, 0);
3664 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3665 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT,
3666 srcValue, SVOff, Align, Vol, ReadMem, WriteMem);
3667 CSEMap.InsertNode(N, IP);
3669 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3670 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT,
3671 srcValue, SVOff, Align, Vol, ReadMem, WriteMem);
3673 AllNodes.push_back(N);
3674 return SDValue(N, 0);
3678 SelectionDAG::getCall(unsigned CallingConv, bool IsVarArgs, bool IsTailCall,
3679 bool IsInreg, SDVTList VTs,
3680 const SDValue *Operands, unsigned NumOperands) {
3681 // Do not include isTailCall in the folding set profile.
3682 FoldingSetNodeID ID;
3683 AddNodeIDNode(ID, ISD::CALL, VTs, Operands, NumOperands);
3684 ID.AddInteger(CallingConv);
3685 ID.AddInteger(IsVarArgs);
3687 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3688 // Instead of including isTailCall in the folding set, we just
3689 // set the flag of the existing node.
3691 cast<CallSDNode>(E)->setNotTailCall();
3692 return SDValue(E, 0);
3694 SDNode *N = NodeAllocator.Allocate<CallSDNode>();
3695 new (N) CallSDNode(CallingConv, IsVarArgs, IsTailCall, IsInreg,
3696 VTs, Operands, NumOperands);
3697 CSEMap.InsertNode(N, IP);
3698 AllNodes.push_back(N);
3699 return SDValue(N, 0);
3703 SelectionDAG::getCall(unsigned CallingConv, DebugLoc dl, bool IsVarArgs,
3704 bool IsTailCall, bool IsInreg, SDVTList VTs,
3705 const SDValue *Operands, unsigned NumOperands) {
3706 // Do not include isTailCall in the folding set profile.
3707 FoldingSetNodeID ID;
3708 AddNodeIDNode(ID, ISD::CALL, VTs, Operands, NumOperands);
3709 ID.AddInteger(CallingConv);
3710 ID.AddInteger(IsVarArgs);
3712 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3713 // Instead of including isTailCall in the folding set, we just
3714 // set the flag of the existing node.
3716 cast<CallSDNode>(E)->setNotTailCall();
3717 return SDValue(E, 0);
3719 SDNode *N = NodeAllocator.Allocate<CallSDNode>();
3720 new (N) CallSDNode(CallingConv, dl, IsVarArgs, IsTailCall, IsInreg,
3721 VTs, Operands, NumOperands);
3722 CSEMap.InsertNode(N, IP);
3723 AllNodes.push_back(N);
3724 return SDValue(N, 0);
3728 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
3729 MVT VT, SDValue Chain,
3730 SDValue Ptr, SDValue Offset,
3731 const Value *SV, int SVOffset, MVT EVT,
3732 bool isVolatile, unsigned Alignment) {
3733 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3734 Alignment = getMVTAlignment(VT);
3737 ExtType = ISD::NON_EXTLOAD;
3738 } else if (ExtType == ISD::NON_EXTLOAD) {
3739 assert(VT == EVT && "Non-extending load from different memory type!");
3743 assert(EVT.getVectorNumElements() == VT.getVectorNumElements() &&
3744 "Invalid vector extload!");
3746 assert(EVT.bitsLT(VT) &&
3747 "Should only be an extending load, not truncating!");
3748 assert((ExtType == ISD::EXTLOAD || VT.isInteger()) &&
3749 "Cannot sign/zero extend a FP/Vector load!");
3750 assert(VT.isInteger() == EVT.isInteger() &&
3751 "Cannot convert from FP to Int or Int -> FP!");
3754 bool Indexed = AM != ISD::UNINDEXED;
3755 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
3756 "Unindexed load with an offset!");
3758 SDVTList VTs = Indexed ?
3759 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
3760 SDValue Ops[] = { Chain, Ptr, Offset };
3761 FoldingSetNodeID ID;
3762 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
3763 ID.AddInteger(EVT.getRawBits());
3764 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, isVolatile, Alignment));
3766 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3767 return SDValue(E, 0);
3768 SDNode *N = NodeAllocator.Allocate<LoadSDNode>();
3769 new (N) LoadSDNode(Ops, VTs, AM, ExtType, EVT, SV, SVOffset,
3770 Alignment, isVolatile);
3771 CSEMap.InsertNode(N, IP);
3772 AllNodes.push_back(N);
3773 return SDValue(N, 0);
3777 SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl,
3778 ISD::LoadExtType ExtType, MVT VT, SDValue Chain,
3779 SDValue Ptr, SDValue Offset,
3780 const Value *SV, int SVOffset, MVT EVT,
3781 bool isVolatile, unsigned Alignment) {
3782 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3783 Alignment = getMVTAlignment(VT);
3786 ExtType = ISD::NON_EXTLOAD;
3787 } else if (ExtType == ISD::NON_EXTLOAD) {
3788 assert(VT == EVT && "Non-extending load from different memory type!");
3792 assert(EVT.getVectorNumElements() == VT.getVectorNumElements() &&
3793 "Invalid vector extload!");
3795 assert(EVT.bitsLT(VT) &&
3796 "Should only be an extending load, not truncating!");
3797 assert((ExtType == ISD::EXTLOAD || VT.isInteger()) &&
3798 "Cannot sign/zero extend a FP/Vector load!");
3799 assert(VT.isInteger() == EVT.isInteger() &&
3800 "Cannot convert from FP to Int or Int -> FP!");
3803 bool Indexed = AM != ISD::UNINDEXED;
3804 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
3805 "Unindexed load with an offset!");
3807 SDVTList VTs = Indexed ?
3808 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
3809 SDValue Ops[] = { Chain, Ptr, Offset };
3810 FoldingSetNodeID ID;
3811 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
3812 ID.AddInteger(EVT.getRawBits());
3813 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, isVolatile, Alignment));
3815 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3816 return SDValue(E, 0);
3817 SDNode *N = NodeAllocator.Allocate<LoadSDNode>();
3818 new (N) LoadSDNode(Ops, dl, VTs, AM, ExtType, EVT, SV, SVOffset,
3819 Alignment, isVolatile);
3820 CSEMap.InsertNode(N, IP);
3821 AllNodes.push_back(N);
3822 return SDValue(N, 0);
3825 SDValue SelectionDAG::getLoad(MVT VT,
3826 SDValue Chain, SDValue Ptr,
3827 const Value *SV, int SVOffset,
3828 bool isVolatile, unsigned Alignment) {
3829 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3830 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef,
3831 SV, SVOffset, VT, isVolatile, Alignment);
3834 SDValue SelectionDAG::getLoad(MVT VT, DebugLoc dl,
3835 SDValue Chain, SDValue Ptr,
3836 const Value *SV, int SVOffset,
3837 bool isVolatile, unsigned Alignment) {
3838 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3839 return getLoad(ISD::UNINDEXED, dl, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef,
3840 SV, SVOffset, VT, isVolatile, Alignment);
3843 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, MVT VT,
3844 SDValue Chain, SDValue Ptr,
3846 int SVOffset, MVT EVT,
3847 bool isVolatile, unsigned Alignment) {
3848 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3849 return getLoad(ISD::UNINDEXED, ExtType, VT, Chain, Ptr, Undef,
3850 SV, SVOffset, EVT, isVolatile, Alignment);
3853 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, MVT VT,
3854 SDValue Chain, SDValue Ptr,
3856 int SVOffset, MVT EVT,
3857 bool isVolatile, unsigned Alignment) {
3858 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3859 return getLoad(ISD::UNINDEXED, dl, ExtType, VT, Chain, Ptr, Undef,
3860 SV, SVOffset, EVT, isVolatile, Alignment);
3864 SelectionDAG::getIndexedLoad(SDValue OrigLoad, SDValue Base,
3865 SDValue Offset, ISD::MemIndexedMode AM) {
3866 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
3867 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
3868 "Load is already a indexed load!");
3869 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(),
3870 LD->getChain(), Base, Offset, LD->getSrcValue(),
3871 LD->getSrcValueOffset(), LD->getMemoryVT(),
3872 LD->isVolatile(), LD->getAlignment());
3876 SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base,
3877 SDValue Offset, ISD::MemIndexedMode AM) {
3878 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
3879 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
3880 "Load is already a indexed load!");
3881 return getLoad(AM, dl, LD->getExtensionType(), OrigLoad.getValueType(),
3882 LD->getChain(), Base, Offset, LD->getSrcValue(),
3883 LD->getSrcValueOffset(), LD->getMemoryVT(),
3884 LD->isVolatile(), LD->getAlignment());
3887 SDValue SelectionDAG::getStore(SDValue Chain, SDValue Val,
3888 SDValue Ptr, const Value *SV, int SVOffset,
3889 bool isVolatile, unsigned Alignment) {
3890 MVT VT = Val.getValueType();
3892 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3893 Alignment = getMVTAlignment(VT);
3895 SDVTList VTs = getVTList(MVT::Other);
3896 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3897 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3898 FoldingSetNodeID ID;
3899 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3900 ID.AddInteger(VT.getRawBits());
3901 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED,
3902 isVolatile, Alignment));
3904 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3905 return SDValue(E, 0);
3906 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3907 new (N) StoreSDNode(Ops, VTs, ISD::UNINDEXED, false,
3908 VT, SV, SVOffset, Alignment, isVolatile);
3909 CSEMap.InsertNode(N, IP);
3910 AllNodes.push_back(N);
3911 return SDValue(N, 0);
3914 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
3915 SDValue Ptr, const Value *SV, int SVOffset,
3916 bool isVolatile, unsigned Alignment) {
3917 MVT VT = Val.getValueType();
3919 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3920 Alignment = getMVTAlignment(VT);
3922 SDVTList VTs = getVTList(MVT::Other);
3923 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3924 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3925 FoldingSetNodeID ID;
3926 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3927 ID.AddInteger(VT.getRawBits());
3928 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED,
3929 isVolatile, Alignment));
3931 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3932 return SDValue(E, 0);
3933 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3934 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, false,
3935 VT, SV, SVOffset, Alignment, isVolatile);
3936 CSEMap.InsertNode(N, IP);
3937 AllNodes.push_back(N);
3938 return SDValue(N, 0);
3941 SDValue SelectionDAG::getTruncStore(SDValue Chain, SDValue Val,
3942 SDValue Ptr, const Value *SV,
3943 int SVOffset, MVT SVT,
3944 bool isVolatile, unsigned Alignment) {
3945 MVT VT = Val.getValueType();
3948 return getStore(Chain, Val, Ptr, SV, SVOffset, isVolatile, Alignment);
3950 assert(VT.bitsGT(SVT) && "Not a truncation?");
3951 assert(VT.isInteger() == SVT.isInteger() &&
3952 "Can't do FP-INT conversion!");
3954 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3955 Alignment = getMVTAlignment(VT);
3957 SDVTList VTs = getVTList(MVT::Other);
3958 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3959 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3960 FoldingSetNodeID ID;
3961 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3962 ID.AddInteger(SVT.getRawBits());
3963 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED,
3964 isVolatile, Alignment));
3966 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3967 return SDValue(E, 0);
3968 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3969 new (N) StoreSDNode(Ops, VTs, ISD::UNINDEXED, true,
3970 SVT, SV, SVOffset, Alignment, isVolatile);
3971 CSEMap.InsertNode(N, IP);
3972 AllNodes.push_back(N);
3973 return SDValue(N, 0);
3976 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
3977 SDValue Ptr, const Value *SV,
3978 int SVOffset, MVT SVT,
3979 bool isVolatile, unsigned Alignment) {
3980 MVT VT = Val.getValueType();
3983 return getStore(Chain, dl, Val, Ptr, SV, SVOffset, isVolatile, Alignment);
3985 assert(VT.bitsGT(SVT) && "Not a truncation?");
3986 assert(VT.isInteger() == SVT.isInteger() &&
3987 "Can't do FP-INT conversion!");
3989 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3990 Alignment = getMVTAlignment(VT);
3992 SDVTList VTs = getVTList(MVT::Other);
3993 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3994 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3995 FoldingSetNodeID ID;
3996 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3997 ID.AddInteger(SVT.getRawBits());
3998 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED,
3999 isVolatile, Alignment));
4001 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4002 return SDValue(E, 0);
4003 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
4004 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, true,
4005 SVT, SV, SVOffset, Alignment, isVolatile);
4006 CSEMap.InsertNode(N, IP);
4007 AllNodes.push_back(N);
4008 return SDValue(N, 0);
4012 SelectionDAG::getIndexedStore(SDValue OrigStore, SDValue Base,
4013 SDValue Offset, ISD::MemIndexedMode AM) {
4014 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
4015 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
4016 "Store is already a indexed store!");
4017 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
4018 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
4019 FoldingSetNodeID ID;
4020 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4021 ID.AddInteger(ST->getMemoryVT().getRawBits());
4022 ID.AddInteger(ST->getRawSubclassData());
4024 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4025 return SDValue(E, 0);
4026 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
4027 new (N) StoreSDNode(Ops, VTs, AM,
4028 ST->isTruncatingStore(), ST->getMemoryVT(),
4029 ST->getSrcValue(), ST->getSrcValueOffset(),
4030 ST->getAlignment(), ST->isVolatile());
4031 CSEMap.InsertNode(N, IP);
4032 AllNodes.push_back(N);
4033 return SDValue(N, 0);
4037 SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base,
4038 SDValue Offset, ISD::MemIndexedMode AM) {
4039 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
4040 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
4041 "Store is already a indexed store!");
4042 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
4043 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
4044 FoldingSetNodeID ID;
4045 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4046 ID.AddInteger(ST->getMemoryVT().getRawBits());
4047 ID.AddInteger(ST->getRawSubclassData());
4049 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4050 return SDValue(E, 0);
4051 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
4052 new (N) StoreSDNode(Ops, dl, VTs, AM,
4053 ST->isTruncatingStore(), ST->getMemoryVT(),
4054 ST->getSrcValue(), ST->getSrcValueOffset(),
4055 ST->getAlignment(), ST->isVolatile());
4056 CSEMap.InsertNode(N, IP);
4057 AllNodes.push_back(N);
4058 return SDValue(N, 0);
4061 SDValue SelectionDAG::getVAArg(MVT VT,
4062 SDValue Chain, SDValue Ptr,
4064 SDValue Ops[] = { Chain, Ptr, SV };
4065 return getNode(ISD::VAARG, getVTList(VT, MVT::Other), Ops, 3);
4068 SDValue SelectionDAG::getVAArg(MVT VT, DebugLoc dl,
4069 SDValue Chain, SDValue Ptr,
4071 SDValue Ops[] = { Chain, Ptr, SV };
4072 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 3);
4075 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
4076 const SDUse *Ops, unsigned NumOps) {
4077 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, Ops, NumOps);
4080 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
4081 const SDUse *Ops, unsigned NumOps) {
4083 case 0: return getNode(Opcode, DL, VT);
4084 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4085 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4086 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4090 // Copy from an SDUse array into an SDValue array for use with
4091 // the regular getNode logic.
4092 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
4093 return getNode(Opcode, DL, VT, &NewOps[0], NumOps);
4096 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
4097 const SDValue *Ops, unsigned NumOps) {
4098 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, Ops, NumOps);
4101 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
4102 const SDValue *Ops, unsigned NumOps) {
4104 case 0: return getNode(Opcode, DL, VT);
4105 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4106 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4107 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4113 case ISD::SELECT_CC: {
4114 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
4115 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
4116 "LHS and RHS of condition must have same type!");
4117 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4118 "True and False arms of SelectCC must have same type!");
4119 assert(Ops[2].getValueType() == VT &&
4120 "select_cc node must be of same type as true and false value!");
4124 assert(NumOps == 5 && "BR_CC takes 5 operands!");
4125 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4126 "LHS/RHS of comparison should match types!");
4133 SDVTList VTs = getVTList(VT);
4135 if (VT != MVT::Flag) {
4136 FoldingSetNodeID ID;
4137 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
4140 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4141 return SDValue(E, 0);
4143 N = NodeAllocator.Allocate<SDNode>();
4144 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps);
4145 CSEMap.InsertNode(N, IP);
4147 N = NodeAllocator.Allocate<SDNode>();
4148 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps);
4151 AllNodes.push_back(N);
4155 return SDValue(N, 0);
4158 SDValue SelectionDAG::getNode(unsigned Opcode,
4159 const std::vector<MVT> &ResultTys,
4160 const SDValue *Ops, unsigned NumOps) {
4161 return getNode(Opcode, DebugLoc::getUnknownLoc(), ResultTys, Ops, NumOps);
4164 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4165 const std::vector<MVT> &ResultTys,
4166 const SDValue *Ops, unsigned NumOps) {
4167 return getNode(Opcode, DL, getNodeValueTypes(ResultTys), ResultTys.size(),
4171 SDValue SelectionDAG::getNode(unsigned Opcode,
4172 const MVT *VTs, unsigned NumVTs,
4173 const SDValue *Ops, unsigned NumOps) {
4174 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTs, NumVTs, Ops, NumOps);
4177 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4178 const MVT *VTs, unsigned NumVTs,
4179 const SDValue *Ops, unsigned NumOps) {
4181 return getNode(Opcode, DL, VTs[0], Ops, NumOps);
4182 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps);
4185 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
4186 const SDValue *Ops, unsigned NumOps) {
4187 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList, Ops, NumOps);
4190 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4191 const SDValue *Ops, unsigned NumOps) {
4192 if (VTList.NumVTs == 1)
4193 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps);
4196 // FIXME: figure out how to safely handle things like
4197 // int foo(int x) { return 1 << (x & 255); }
4198 // int bar() { return foo(256); }
4200 case ISD::SRA_PARTS:
4201 case ISD::SRL_PARTS:
4202 case ISD::SHL_PARTS:
4203 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
4204 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
4205 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4206 else if (N3.getOpcode() == ISD::AND)
4207 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
4208 // If the and is only masking out bits that cannot effect the shift,
4209 // eliminate the and.
4210 unsigned NumBits = VT.getSizeInBits()*2;
4211 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
4212 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4218 // Memoize the node unless it returns a flag.
4220 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4221 FoldingSetNodeID ID;
4222 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4224 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4225 return SDValue(E, 0);
4227 N = NodeAllocator.Allocate<UnarySDNode>();
4228 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4229 } else if (NumOps == 2) {
4230 N = NodeAllocator.Allocate<BinarySDNode>();
4231 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4232 } else if (NumOps == 3) {
4233 N = NodeAllocator.Allocate<TernarySDNode>();
4234 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]);
4236 N = NodeAllocator.Allocate<SDNode>();
4237 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps);
4239 CSEMap.InsertNode(N, IP);
4242 N = NodeAllocator.Allocate<UnarySDNode>();
4243 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4244 } else if (NumOps == 2) {
4245 N = NodeAllocator.Allocate<BinarySDNode>();
4246 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4247 } else if (NumOps == 3) {
4248 N = NodeAllocator.Allocate<TernarySDNode>();
4249 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]);
4251 N = NodeAllocator.Allocate<SDNode>();
4252 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps);
4255 AllNodes.push_back(N);
4259 return SDValue(N, 0);
4262 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList) {
4263 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList);
4266 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) {
4267 return getNode(Opcode, DL, VTList, 0, 0);
4270 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
4272 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList, N1);
4275 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4277 SDValue Ops[] = { N1 };
4278 return getNode(Opcode, DL, VTList, Ops, 1);
4281 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
4282 SDValue N1, SDValue N2) {
4283 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList, N1, N2);
4286 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4287 SDValue N1, SDValue N2) {
4288 SDValue Ops[] = { N1, N2 };
4289 return getNode(Opcode, DL, VTList, Ops, 2);
4292 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
4293 SDValue N1, SDValue N2, SDValue N3) {
4294 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList, N1, N2, N3);
4297 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4298 SDValue N1, SDValue N2, SDValue N3) {
4299 SDValue Ops[] = { N1, N2, N3 };
4300 return getNode(Opcode, DL, VTList, Ops, 3);
4303 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
4304 SDValue N1, SDValue N2, SDValue N3,
4306 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList, N1, N2, N3, N4);
4309 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4310 SDValue N1, SDValue N2, SDValue N3,
4312 SDValue Ops[] = { N1, N2, N3, N4 };
4313 return getNode(Opcode, DL, VTList, Ops, 4);
4316 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
4317 SDValue N1, SDValue N2, SDValue N3,
4318 SDValue N4, SDValue N5) {
4319 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList, N1, N2, N3, N4, N5);
4322 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4323 SDValue N1, SDValue N2, SDValue N3,
4324 SDValue N4, SDValue N5) {
4325 SDValue Ops[] = { N1, N2, N3, N4, N5 };
4326 return getNode(Opcode, DL, VTList, Ops, 5);
4329 SDVTList SelectionDAG::getVTList(MVT VT) {
4330 return makeVTList(SDNode::getValueTypeList(VT), 1);
4333 SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2) {
4334 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4335 E = VTList.rend(); I != E; ++I)
4336 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
4339 MVT *Array = Allocator.Allocate<MVT>(2);
4342 SDVTList Result = makeVTList(Array, 2);
4343 VTList.push_back(Result);
4347 SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2, MVT VT3) {
4348 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4349 E = VTList.rend(); I != E; ++I)
4350 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4354 MVT *Array = Allocator.Allocate<MVT>(3);
4358 SDVTList Result = makeVTList(Array, 3);
4359 VTList.push_back(Result);
4363 SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2, MVT VT3, MVT VT4) {
4364 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4365 E = VTList.rend(); I != E; ++I)
4366 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4367 I->VTs[2] == VT3 && I->VTs[3] == VT4)
4370 MVT *Array = Allocator.Allocate<MVT>(3);
4375 SDVTList Result = makeVTList(Array, 4);
4376 VTList.push_back(Result);
4380 SDVTList SelectionDAG::getVTList(const MVT *VTs, unsigned NumVTs) {
4382 case 0: assert(0 && "Cannot have nodes without results!");
4383 case 1: return getVTList(VTs[0]);
4384 case 2: return getVTList(VTs[0], VTs[1]);
4385 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
4389 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4390 E = VTList.rend(); I != E; ++I) {
4391 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
4394 bool NoMatch = false;
4395 for (unsigned i = 2; i != NumVTs; ++i)
4396 if (VTs[i] != I->VTs[i]) {
4404 MVT *Array = Allocator.Allocate<MVT>(NumVTs);
4405 std::copy(VTs, VTs+NumVTs, Array);
4406 SDVTList Result = makeVTList(Array, NumVTs);
4407 VTList.push_back(Result);
4412 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
4413 /// specified operands. If the resultant node already exists in the DAG,
4414 /// this does not modify the specified node, instead it returns the node that
4415 /// already exists. If the resultant node does not exist in the DAG, the
4416 /// input node is returned. As a degenerate case, if you specify the same
4417 /// input operands as the node already has, the input node is returned.
4418 SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) {
4419 SDNode *N = InN.getNode();
4420 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
4422 // Check to see if there is no change.
4423 if (Op == N->getOperand(0)) return InN;
4425 // See if the modified node already exists.
4426 void *InsertPos = 0;
4427 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
4428 return SDValue(Existing, InN.getResNo());
4430 // Nope it doesn't. Remove the node from its current place in the maps.
4432 if (!RemoveNodeFromCSEMaps(N))
4435 // Now we update the operands.
4436 N->OperandList[0].set(Op);
4438 // If this gets put into a CSE map, add it.
4439 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4443 SDValue SelectionDAG::
4444 UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) {
4445 SDNode *N = InN.getNode();
4446 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
4448 // Check to see if there is no change.
4449 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
4450 return InN; // No operands changed, just return the input node.
4452 // See if the modified node already exists.
4453 void *InsertPos = 0;
4454 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
4455 return SDValue(Existing, InN.getResNo());
4457 // Nope it doesn't. Remove the node from its current place in the maps.
4459 if (!RemoveNodeFromCSEMaps(N))
4462 // Now we update the operands.
4463 if (N->OperandList[0] != Op1)
4464 N->OperandList[0].set(Op1);
4465 if (N->OperandList[1] != Op2)
4466 N->OperandList[1].set(Op2);
4468 // If this gets put into a CSE map, add it.
4469 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4473 SDValue SelectionDAG::
4474 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) {
4475 SDValue Ops[] = { Op1, Op2, Op3 };
4476 return UpdateNodeOperands(N, Ops, 3);
4479 SDValue SelectionDAG::
4480 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
4481 SDValue Op3, SDValue Op4) {
4482 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
4483 return UpdateNodeOperands(N, Ops, 4);
4486 SDValue SelectionDAG::
4487 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
4488 SDValue Op3, SDValue Op4, SDValue Op5) {
4489 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
4490 return UpdateNodeOperands(N, Ops, 5);
4493 SDValue SelectionDAG::
4494 UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) {
4495 SDNode *N = InN.getNode();
4496 assert(N->getNumOperands() == NumOps &&
4497 "Update with wrong number of operands");
4499 // Check to see if there is no change.
4500 bool AnyChange = false;
4501 for (unsigned i = 0; i != NumOps; ++i) {
4502 if (Ops[i] != N->getOperand(i)) {
4508 // No operands changed, just return the input node.
4509 if (!AnyChange) return InN;
4511 // See if the modified node already exists.
4512 void *InsertPos = 0;
4513 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
4514 return SDValue(Existing, InN.getResNo());
4516 // Nope it doesn't. Remove the node from its current place in the maps.
4518 if (!RemoveNodeFromCSEMaps(N))
4521 // Now we update the operands.
4522 for (unsigned i = 0; i != NumOps; ++i)
4523 if (N->OperandList[i] != Ops[i])
4524 N->OperandList[i].set(Ops[i]);
4526 // If this gets put into a CSE map, add it.
4527 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4531 /// DropOperands - Release the operands and set this node to have
4533 void SDNode::DropOperands() {
4534 // Unlike the code in MorphNodeTo that does this, we don't need to
4535 // watch for dead nodes here.
4536 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
4542 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
4545 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4547 SDVTList VTs = getVTList(VT);
4548 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
4551 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4552 MVT VT, SDValue Op1) {
4553 SDVTList VTs = getVTList(VT);
4554 SDValue Ops[] = { Op1 };
4555 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4558 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4559 MVT VT, SDValue Op1,
4561 SDVTList VTs = getVTList(VT);
4562 SDValue Ops[] = { Op1, Op2 };
4563 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4566 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4567 MVT VT, SDValue Op1,
4568 SDValue Op2, SDValue Op3) {
4569 SDVTList VTs = getVTList(VT);
4570 SDValue Ops[] = { Op1, Op2, Op3 };
4571 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4574 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4575 MVT VT, const SDValue *Ops,
4577 SDVTList VTs = getVTList(VT);
4578 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4581 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4582 MVT VT1, MVT VT2, const SDValue *Ops,
4584 SDVTList VTs = getVTList(VT1, VT2);
4585 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4588 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4590 SDVTList VTs = getVTList(VT1, VT2);
4591 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
4594 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4595 MVT VT1, MVT VT2, MVT VT3,
4596 const SDValue *Ops, unsigned NumOps) {
4597 SDVTList VTs = getVTList(VT1, VT2, VT3);
4598 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4601 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4602 MVT VT1, MVT VT2, MVT VT3, MVT VT4,
4603 const SDValue *Ops, unsigned NumOps) {
4604 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4605 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4608 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4611 SDVTList VTs = getVTList(VT1, VT2);
4612 SDValue Ops[] = { Op1 };
4613 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4616 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4618 SDValue Op1, SDValue Op2) {
4619 SDVTList VTs = getVTList(VT1, VT2);
4620 SDValue Ops[] = { Op1, Op2 };
4621 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4624 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4626 SDValue Op1, SDValue Op2,
4628 SDVTList VTs = getVTList(VT1, VT2);
4629 SDValue Ops[] = { Op1, Op2, Op3 };
4630 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4633 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4634 MVT VT1, MVT VT2, MVT VT3,
4635 SDValue Op1, SDValue Op2,
4637 SDVTList VTs = getVTList(VT1, VT2, VT3);
4638 SDValue Ops[] = { Op1, Op2, Op3 };
4639 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4642 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4643 SDVTList VTs, const SDValue *Ops,
4645 return MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
4648 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4650 SDVTList VTs = getVTList(VT);
4651 return MorphNodeTo(N, Opc, VTs, 0, 0);
4654 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4655 MVT VT, SDValue Op1) {
4656 SDVTList VTs = getVTList(VT);
4657 SDValue Ops[] = { Op1 };
4658 return MorphNodeTo(N, Opc, VTs, Ops, 1);
4661 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4662 MVT VT, SDValue Op1,
4664 SDVTList VTs = getVTList(VT);
4665 SDValue Ops[] = { Op1, Op2 };
4666 return MorphNodeTo(N, Opc, VTs, Ops, 2);
4669 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4670 MVT VT, SDValue Op1,
4671 SDValue Op2, SDValue Op3) {
4672 SDVTList VTs = getVTList(VT);
4673 SDValue Ops[] = { Op1, Op2, Op3 };
4674 return MorphNodeTo(N, Opc, VTs, Ops, 3);
4677 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4678 MVT VT, const SDValue *Ops,
4680 SDVTList VTs = getVTList(VT);
4681 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4684 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4685 MVT VT1, MVT VT2, const SDValue *Ops,
4687 SDVTList VTs = getVTList(VT1, VT2);
4688 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4691 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4693 SDVTList VTs = getVTList(VT1, VT2);
4694 return MorphNodeTo(N, Opc, VTs, (SDValue *)0, 0);
4697 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4698 MVT VT1, MVT VT2, MVT VT3,
4699 const SDValue *Ops, unsigned NumOps) {
4700 SDVTList VTs = getVTList(VT1, VT2, VT3);
4701 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4704 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4707 SDVTList VTs = getVTList(VT1, VT2);
4708 SDValue Ops[] = { Op1 };
4709 return MorphNodeTo(N, Opc, VTs, Ops, 1);
4712 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4714 SDValue Op1, SDValue Op2) {
4715 SDVTList VTs = getVTList(VT1, VT2);
4716 SDValue Ops[] = { Op1, Op2 };
4717 return MorphNodeTo(N, Opc, VTs, Ops, 2);
4720 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4722 SDValue Op1, SDValue Op2,
4724 SDVTList VTs = getVTList(VT1, VT2);
4725 SDValue Ops[] = { Op1, Op2, Op3 };
4726 return MorphNodeTo(N, Opc, VTs, Ops, 3);
4729 /// MorphNodeTo - These *mutate* the specified node to have the specified
4730 /// return type, opcode, and operands.
4732 /// Note that MorphNodeTo returns the resultant node. If there is already a
4733 /// node of the specified opcode and operands, it returns that node instead of
4734 /// the current one.
4736 /// Using MorphNodeTo is faster than creating a new node and swapping it in
4737 /// with ReplaceAllUsesWith both because it often avoids allocating a new
4738 /// node, and because it doesn't require CSE recalculation for any of
4739 /// the node's users.
4741 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4742 SDVTList VTs, const SDValue *Ops,
4744 // If an identical node already exists, use it.
4746 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) {
4747 FoldingSetNodeID ID;
4748 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
4749 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
4753 if (!RemoveNodeFromCSEMaps(N))
4756 // Start the morphing.
4758 N->ValueList = VTs.VTs;
4759 N->NumValues = VTs.NumVTs;
4761 // Clear the operands list, updating used nodes to remove this from their
4762 // use list. Keep track of any operands that become dead as a result.
4763 SmallPtrSet<SDNode*, 16> DeadNodeSet;
4764 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
4766 SDNode *Used = Use.getNode();
4768 if (Used->use_empty())
4769 DeadNodeSet.insert(Used);
4772 // If NumOps is larger than the # of operands we currently have, reallocate
4773 // the operand list.
4774 if (NumOps > N->NumOperands) {
4775 if (N->OperandsNeedDelete)
4776 delete[] N->OperandList;
4778 if (N->isMachineOpcode()) {
4779 // We're creating a final node that will live unmorphed for the
4780 // remainder of the current SelectionDAG iteration, so we can allocate
4781 // the operands directly out of a pool with no recycling metadata.
4782 N->OperandList = OperandAllocator.Allocate<SDUse>(NumOps);
4783 N->OperandsNeedDelete = false;
4785 N->OperandList = new SDUse[NumOps];
4786 N->OperandsNeedDelete = true;
4790 // Assign the new operands.
4791 N->NumOperands = NumOps;
4792 for (unsigned i = 0, e = NumOps; i != e; ++i) {
4793 N->OperandList[i].setUser(N);
4794 N->OperandList[i].setInitial(Ops[i]);
4797 // Delete any nodes that are still dead after adding the uses for the
4799 SmallVector<SDNode *, 16> DeadNodes;
4800 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
4801 E = DeadNodeSet.end(); I != E; ++I)
4802 if ((*I)->use_empty())
4803 DeadNodes.push_back(*I);
4804 RemoveDeadNodes(DeadNodes);
4807 CSEMap.InsertNode(N, IP); // Memoize the new node.
4812 /// getTargetNode - These are used for target selectors to create a new node
4813 /// with specified return type(s), target opcode, and operands.
4815 /// Note that getTargetNode returns the resultant node. If there is already a
4816 /// node of the specified opcode and operands, it returns that node instead of
4817 /// the current one.
4818 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT) {
4819 return getNode(~Opcode, VT).getNode();
4821 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT) {
4822 return getNode(~Opcode, dl, VT).getNode();
4825 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, SDValue Op1) {
4826 return getNode(~Opcode, VT, Op1).getNode();
4828 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT,
4830 return getNode(~Opcode, dl, VT, Op1).getNode();
4833 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT,
4834 SDValue Op1, SDValue Op2) {
4835 return getNode(~Opcode, VT, Op1, Op2).getNode();
4837 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT,
4838 SDValue Op1, SDValue Op2) {
4839 return getNode(~Opcode, dl, VT, Op1, Op2).getNode();
4842 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT,
4843 SDValue Op1, SDValue Op2,
4845 return getNode(~Opcode, VT, Op1, Op2, Op3).getNode();
4847 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT,
4848 SDValue Op1, SDValue Op2,
4850 return getNode(~Opcode, dl, VT, Op1, Op2, Op3).getNode();
4853 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT,
4854 const SDValue *Ops, unsigned NumOps) {
4855 return getNode(~Opcode, VT, Ops, NumOps).getNode();
4857 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT,
4858 const SDValue *Ops, unsigned NumOps) {
4859 return getNode(~Opcode, dl, VT, Ops, NumOps).getNode();
4862 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2) {
4863 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4865 return getNode(~Opcode, VTs, 2, &Op, 0).getNode();
4867 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4869 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4871 return getNode(~Opcode, dl, VTs, 2, &Op, 0).getNode();
4874 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
4875 MVT VT2, SDValue Op1) {
4876 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4877 return getNode(~Opcode, VTs, 2, &Op1, 1).getNode();
4879 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1,
4880 MVT VT2, SDValue Op1) {
4881 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4882 return getNode(~Opcode, dl, VTs, 2, &Op1, 1).getNode();
4885 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
4886 MVT VT2, SDValue Op1,
4888 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4889 SDValue Ops[] = { Op1, Op2 };
4890 return getNode(~Opcode, VTs, 2, Ops, 2).getNode();
4892 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1,
4893 MVT VT2, SDValue Op1,
4895 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4896 SDValue Ops[] = { Op1, Op2 };
4897 return getNode(~Opcode, dl, VTs, 2, Ops, 2).getNode();
4900 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
4901 MVT VT2, SDValue Op1,
4902 SDValue Op2, SDValue Op3) {
4903 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4904 SDValue Ops[] = { Op1, Op2, Op3 };
4905 return getNode(~Opcode, VTs, 2, Ops, 3).getNode();
4907 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1,
4908 MVT VT2, SDValue Op1,
4909 SDValue Op2, SDValue Op3) {
4910 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4911 SDValue Ops[] = { Op1, Op2, Op3 };
4912 return getNode(~Opcode, dl, VTs, 2, Ops, 3).getNode();
4915 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2,
4916 const SDValue *Ops, unsigned NumOps) {
4917 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4918 return getNode(~Opcode, VTs, 2, Ops, NumOps).getNode();
4920 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4922 const SDValue *Ops, unsigned NumOps) {
4923 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4924 return getNode(~Opcode, dl, VTs, 2, Ops, NumOps).getNode();
4927 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
4928 SDValue Op1, SDValue Op2) {
4929 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4930 SDValue Ops[] = { Op1, Op2 };
4931 return getNode(~Opcode, VTs, 3, Ops, 2).getNode();
4933 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4934 MVT VT1, MVT VT2, MVT VT3,
4935 SDValue Op1, SDValue Op2) {
4936 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4937 SDValue Ops[] = { Op1, Op2 };
4938 return getNode(~Opcode, dl, VTs, 3, Ops, 2).getNode();
4941 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
4942 SDValue Op1, SDValue Op2,
4944 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4945 SDValue Ops[] = { Op1, Op2, Op3 };
4946 return getNode(~Opcode, VTs, 3, Ops, 3).getNode();
4948 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4949 MVT VT1, MVT VT2, MVT VT3,
4950 SDValue Op1, SDValue Op2,
4952 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4953 SDValue Ops[] = { Op1, Op2, Op3 };
4954 return getNode(~Opcode, dl, VTs, 3, Ops, 3).getNode();
4957 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
4958 const SDValue *Ops, unsigned NumOps) {
4959 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4960 return getNode(~Opcode, VTs, 3, Ops, NumOps).getNode();
4962 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4963 MVT VT1, MVT VT2, MVT VT3,
4964 const SDValue *Ops, unsigned NumOps) {
4965 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4966 return getNode(~Opcode, dl, VTs, 3, Ops, NumOps).getNode();
4969 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
4970 MVT VT2, MVT VT3, MVT VT4,
4971 const SDValue *Ops, unsigned NumOps) {
4972 std::vector<MVT> VTList;
4973 VTList.push_back(VT1);
4974 VTList.push_back(VT2);
4975 VTList.push_back(VT3);
4976 VTList.push_back(VT4);
4977 const MVT *VTs = getNodeValueTypes(VTList);
4978 return getNode(~Opcode, VTs, 4, Ops, NumOps).getNode();
4980 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1,
4981 MVT VT2, MVT VT3, MVT VT4,
4982 const SDValue *Ops, unsigned NumOps) {
4983 std::vector<MVT> VTList;
4984 VTList.push_back(VT1);
4985 VTList.push_back(VT2);
4986 VTList.push_back(VT3);
4987 VTList.push_back(VT4);
4988 const MVT *VTs = getNodeValueTypes(VTList);
4989 return getNode(~Opcode, dl, VTs, 4, Ops, NumOps).getNode();
4992 SDNode *SelectionDAG::getTargetNode(unsigned Opcode,
4993 const std::vector<MVT> &ResultTys,
4994 const SDValue *Ops, unsigned NumOps) {
4995 const MVT *VTs = getNodeValueTypes(ResultTys);
4996 return getNode(~Opcode, VTs, ResultTys.size(),
4997 Ops, NumOps).getNode();
4999 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
5000 const std::vector<MVT> &ResultTys,
5001 const SDValue *Ops, unsigned NumOps) {
5002 const MVT *VTs = getNodeValueTypes(ResultTys);
5003 return getNode(~Opcode, dl, VTs, ResultTys.size(),
5004 Ops, NumOps).getNode();
5007 /// getNodeIfExists - Get the specified node if it's already available, or
5008 /// else return NULL.
5009 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
5010 const SDValue *Ops, unsigned NumOps) {
5011 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
5012 FoldingSetNodeID ID;
5013 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
5015 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
5021 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5022 /// This can cause recursive merging of nodes in the DAG.
5024 /// This version assumes From has a single result value.
5026 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To,
5027 DAGUpdateListener *UpdateListener) {
5028 SDNode *From = FromN.getNode();
5029 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
5030 "Cannot replace with this method!");
5031 assert(From != To.getNode() && "Cannot replace uses of with self");
5033 // Iterate over all the existing uses of From. New uses will be added
5034 // to the beginning of the use list, which we avoid visiting.
5035 // This specifically avoids visiting uses of From that arise while the
5036 // replacement is happening, because any such uses would be the result
5037 // of CSE: If an existing node looks like From after one of its operands
5038 // is replaced by To, we don't want to replace of all its users with To
5039 // too. See PR3018 for more info.
5040 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5044 // This node is about to morph, remove its old self from the CSE maps.
5045 RemoveNodeFromCSEMaps(User);
5047 // A user can appear in a use list multiple times, and when this
5048 // happens the uses are usually next to each other in the list.
5049 // To help reduce the number of CSE recomputations, process all
5050 // the uses of this user that we can find this way.
5052 SDUse &Use = UI.getUse();
5055 } while (UI != UE && *UI == User);
5057 // Now that we have modified User, add it back to the CSE maps. If it
5058 // already exists there, recursively merge the results together.
5059 AddModifiedNodeToCSEMaps(User, UpdateListener);
5063 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5064 /// This can cause recursive merging of nodes in the DAG.
5066 /// This version assumes From/To have matching types and numbers of result
5069 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To,
5070 DAGUpdateListener *UpdateListener) {
5071 assert(From->getVTList().VTs == To->getVTList().VTs &&
5072 From->getNumValues() == To->getNumValues() &&
5073 "Cannot use this version of ReplaceAllUsesWith!");
5075 // Handle the trivial case.
5079 // Iterate over just the existing users of From. See the comments in
5080 // the ReplaceAllUsesWith above.
5081 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5085 // This node is about to morph, remove its old self from the CSE maps.
5086 RemoveNodeFromCSEMaps(User);
5088 // A user can appear in a use list multiple times, and when this
5089 // happens the uses are usually next to each other in the list.
5090 // To help reduce the number of CSE recomputations, process all
5091 // the uses of this user that we can find this way.
5093 SDUse &Use = UI.getUse();
5096 } while (UI != UE && *UI == User);
5098 // Now that we have modified User, add it back to the CSE maps. If it
5099 // already exists there, recursively merge the results together.
5100 AddModifiedNodeToCSEMaps(User, UpdateListener);
5104 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5105 /// This can cause recursive merging of nodes in the DAG.
5107 /// This version can replace From with any result values. To must match the
5108 /// number and types of values returned by From.
5109 void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
5111 DAGUpdateListener *UpdateListener) {
5112 if (From->getNumValues() == 1) // Handle the simple case efficiently.
5113 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener);
5115 // Iterate over just the existing users of From. See the comments in
5116 // the ReplaceAllUsesWith above.
5117 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5121 // This node is about to morph, remove its old self from the CSE maps.
5122 RemoveNodeFromCSEMaps(User);
5124 // A user can appear in a use list multiple times, and when this
5125 // happens the uses are usually next to each other in the list.
5126 // To help reduce the number of CSE recomputations, process all
5127 // the uses of this user that we can find this way.
5129 SDUse &Use = UI.getUse();
5130 const SDValue &ToOp = To[Use.getResNo()];
5133 } while (UI != UE && *UI == User);
5135 // Now that we have modified User, add it back to the CSE maps. If it
5136 // already exists there, recursively merge the results together.
5137 AddModifiedNodeToCSEMaps(User, UpdateListener);
5141 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
5142 /// uses of other values produced by From.getNode() alone. The Deleted
5143 /// vector is handled the same way as for ReplaceAllUsesWith.
5144 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To,
5145 DAGUpdateListener *UpdateListener){
5146 // Handle the really simple, really trivial case efficiently.
5147 if (From == To) return;
5149 // Handle the simple, trivial, case efficiently.
5150 if (From.getNode()->getNumValues() == 1) {
5151 ReplaceAllUsesWith(From, To, UpdateListener);
5155 // Iterate over just the existing users of From. See the comments in
5156 // the ReplaceAllUsesWith above.
5157 SDNode::use_iterator UI = From.getNode()->use_begin(),
5158 UE = From.getNode()->use_end();
5161 bool UserRemovedFromCSEMaps = false;
5163 // A user can appear in a use list multiple times, and when this
5164 // happens the uses are usually next to each other in the list.
5165 // To help reduce the number of CSE recomputations, process all
5166 // the uses of this user that we can find this way.
5168 SDUse &Use = UI.getUse();
5170 // Skip uses of different values from the same node.
5171 if (Use.getResNo() != From.getResNo()) {
5176 // If this node hasn't been modified yet, it's still in the CSE maps,
5177 // so remove its old self from the CSE maps.
5178 if (!UserRemovedFromCSEMaps) {
5179 RemoveNodeFromCSEMaps(User);
5180 UserRemovedFromCSEMaps = true;
5185 } while (UI != UE && *UI == User);
5187 // We are iterating over all uses of the From node, so if a use
5188 // doesn't use the specific value, no changes are made.
5189 if (!UserRemovedFromCSEMaps)
5192 // Now that we have modified User, add it back to the CSE maps. If it
5193 // already exists there, recursively merge the results together.
5194 AddModifiedNodeToCSEMaps(User, UpdateListener);
5199 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
5200 /// to record information about a use.
5207 /// operator< - Sort Memos by User.
5208 bool operator<(const UseMemo &L, const UseMemo &R) {
5209 return (intptr_t)L.User < (intptr_t)R.User;
5213 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
5214 /// uses of other values produced by From.getNode() alone. The same value
5215 /// may appear in both the From and To list. The Deleted vector is
5216 /// handled the same way as for ReplaceAllUsesWith.
5217 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
5220 DAGUpdateListener *UpdateListener){
5221 // Handle the simple, trivial case efficiently.
5223 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener);
5225 // Read up all the uses and make records of them. This helps
5226 // processing new uses that are introduced during the
5227 // replacement process.
5228 SmallVector<UseMemo, 4> Uses;
5229 for (unsigned i = 0; i != Num; ++i) {
5230 unsigned FromResNo = From[i].getResNo();
5231 SDNode *FromNode = From[i].getNode();
5232 for (SDNode::use_iterator UI = FromNode->use_begin(),
5233 E = FromNode->use_end(); UI != E; ++UI) {
5234 SDUse &Use = UI.getUse();
5235 if (Use.getResNo() == FromResNo) {
5236 UseMemo Memo = { *UI, i, &Use };
5237 Uses.push_back(Memo);
5242 // Sort the uses, so that all the uses from a given User are together.
5243 std::sort(Uses.begin(), Uses.end());
5245 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
5246 UseIndex != UseIndexEnd; ) {
5247 // We know that this user uses some value of From. If it is the right
5248 // value, update it.
5249 SDNode *User = Uses[UseIndex].User;
5251 // This node is about to morph, remove its old self from the CSE maps.
5252 RemoveNodeFromCSEMaps(User);
5254 // The Uses array is sorted, so all the uses for a given User
5255 // are next to each other in the list.
5256 // To help reduce the number of CSE recomputations, process all
5257 // the uses of this user that we can find this way.
5259 unsigned i = Uses[UseIndex].Index;
5260 SDUse &Use = *Uses[UseIndex].Use;
5264 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
5266 // Now that we have modified User, add it back to the CSE maps. If it
5267 // already exists there, recursively merge the results together.
5268 AddModifiedNodeToCSEMaps(User, UpdateListener);
5272 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
5273 /// based on their topological order. It returns the maximum id and a vector
5274 /// of the SDNodes* in assigned order by reference.
5275 unsigned SelectionDAG::AssignTopologicalOrder() {
5277 unsigned DAGSize = 0;
5279 // SortedPos tracks the progress of the algorithm. Nodes before it are
5280 // sorted, nodes after it are unsorted. When the algorithm completes
5281 // it is at the end of the list.
5282 allnodes_iterator SortedPos = allnodes_begin();
5284 // Visit all the nodes. Move nodes with no operands to the front of
5285 // the list immediately. Annotate nodes that do have operands with their
5286 // operand count. Before we do this, the Node Id fields of the nodes
5287 // may contain arbitrary values. After, the Node Id fields for nodes
5288 // before SortedPos will contain the topological sort index, and the
5289 // Node Id fields for nodes At SortedPos and after will contain the
5290 // count of outstanding operands.
5291 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
5293 unsigned Degree = N->getNumOperands();
5295 // A node with no uses, add it to the result array immediately.
5296 N->setNodeId(DAGSize++);
5297 allnodes_iterator Q = N;
5299 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
5302 // Temporarily use the Node Id as scratch space for the degree count.
5303 N->setNodeId(Degree);
5307 // Visit all the nodes. As we iterate, moves nodes into sorted order,
5308 // such that by the time the end is reached all nodes will be sorted.
5309 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
5311 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
5314 unsigned Degree = P->getNodeId();
5317 // All of P's operands are sorted, so P may sorted now.
5318 P->setNodeId(DAGSize++);
5320 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
5323 // Update P's outstanding operand count.
5324 P->setNodeId(Degree);
5329 assert(SortedPos == AllNodes.end() &&
5330 "Topological sort incomplete!");
5331 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
5332 "First node in topological sort is not the entry token!");
5333 assert(AllNodes.front().getNodeId() == 0 &&
5334 "First node in topological sort has non-zero id!");
5335 assert(AllNodes.front().getNumOperands() == 0 &&
5336 "First node in topological sort has operands!");
5337 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
5338 "Last node in topologic sort has unexpected id!");
5339 assert(AllNodes.back().use_empty() &&
5340 "Last node in topologic sort has users!");
5341 assert(DAGSize == allnodes_size() && "Node count mismatch!");
5347 //===----------------------------------------------------------------------===//
5349 //===----------------------------------------------------------------------===//
5351 HandleSDNode::~HandleSDNode() {
5355 GlobalAddressSDNode::GlobalAddressSDNode(bool isTarget, const GlobalValue *GA,
5357 : SDNode(isa<GlobalVariable>(GA) &&
5358 cast<GlobalVariable>(GA)->isThreadLocal() ?
5360 (isTarget ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress) :
5362 (isTarget ? ISD::TargetGlobalAddress : ISD::GlobalAddress),
5363 getSDVTList(VT)), Offset(o) {
5364 TheGlobal = const_cast<GlobalValue*>(GA);
5367 MemSDNode::MemSDNode(unsigned Opc, SDVTList VTs, MVT memvt,
5368 const Value *srcValue, int SVO,
5369 unsigned alignment, bool vol)
5370 : SDNode(Opc, VTs), MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO) {
5371 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, vol, alignment);
5372 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
5373 assert(getAlignment() == alignment && "Alignment representation error!");
5374 assert(isVolatile() == vol && "Volatile representation error!");
5377 MemSDNode::MemSDNode(unsigned Opc, SDVTList VTs, const SDValue *Ops,
5378 unsigned NumOps, MVT memvt, const Value *srcValue,
5379 int SVO, unsigned alignment, bool vol)
5380 : SDNode(Opc, VTs, Ops, NumOps),
5381 MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO) {
5382 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, vol, alignment);
5383 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
5384 assert(getAlignment() == alignment && "Alignment representation error!");
5385 assert(isVolatile() == vol && "Volatile representation error!");
5388 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, MVT memvt,
5389 const Value *srcValue, int SVO,
5390 unsigned alignment, bool vol)
5391 : SDNode(Opc, dl, VTs), MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO) {
5392 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, vol, alignment);
5393 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
5394 assert(getAlignment() == alignment && "Alignment representation error!");
5395 assert(isVolatile() == vol && "Volatile representation error!");
5398 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs,
5400 unsigned NumOps, MVT memvt, const Value *srcValue,
5401 int SVO, unsigned alignment, bool vol)
5402 : SDNode(Opc, dl, VTs, Ops, NumOps),
5403 MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO) {
5404 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, vol, alignment);
5405 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
5406 assert(getAlignment() == alignment && "Alignment representation error!");
5407 assert(isVolatile() == vol && "Volatile representation error!");
5410 /// getMemOperand - Return a MachineMemOperand object describing the memory
5411 /// reference performed by this memory reference.
5412 MachineMemOperand MemSDNode::getMemOperand() const {
5414 if (isa<LoadSDNode>(this))
5415 Flags = MachineMemOperand::MOLoad;
5416 else if (isa<StoreSDNode>(this))
5417 Flags = MachineMemOperand::MOStore;
5418 else if (isa<AtomicSDNode>(this)) {
5419 Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
5422 const MemIntrinsicSDNode* MemIntrinNode = dyn_cast<MemIntrinsicSDNode>(this);
5423 assert(MemIntrinNode && "Unknown MemSDNode opcode!");
5424 if (MemIntrinNode->readMem()) Flags |= MachineMemOperand::MOLoad;
5425 if (MemIntrinNode->writeMem()) Flags |= MachineMemOperand::MOStore;
5428 int Size = (getMemoryVT().getSizeInBits() + 7) >> 3;
5429 if (isVolatile()) Flags |= MachineMemOperand::MOVolatile;
5431 // Check if the memory reference references a frame index
5432 const FrameIndexSDNode *FI =
5433 dyn_cast<const FrameIndexSDNode>(getBasePtr().getNode());
5434 if (!getSrcValue() && FI)
5435 return MachineMemOperand(PseudoSourceValue::getFixedStack(FI->getIndex()),
5436 Flags, 0, Size, getAlignment());
5438 return MachineMemOperand(getSrcValue(), Flags, getSrcValueOffset(),
5439 Size, getAlignment());
5442 /// Profile - Gather unique data for the node.
5444 void SDNode::Profile(FoldingSetNodeID &ID) const {
5445 AddNodeIDNode(ID, this);
5448 /// getValueTypeList - Return a pointer to the specified value type.
5450 const MVT *SDNode::getValueTypeList(MVT VT) {
5451 if (VT.isExtended()) {
5452 static std::set<MVT, MVT::compareRawBits> EVTs;
5453 return &(*EVTs.insert(VT).first);
5455 static MVT VTs[MVT::LAST_VALUETYPE];
5456 VTs[VT.getSimpleVT()] = VT;
5457 return &VTs[VT.getSimpleVT()];
5461 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
5462 /// indicated value. This method ignores uses of other values defined by this
5464 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
5465 assert(Value < getNumValues() && "Bad value!");
5467 // TODO: Only iterate over uses of a given value of the node
5468 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
5469 if (UI.getUse().getResNo() == Value) {
5476 // Found exactly the right number of uses?
5481 /// hasAnyUseOfValue - Return true if there are any use of the indicated
5482 /// value. This method ignores uses of other values defined by this operation.
5483 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
5484 assert(Value < getNumValues() && "Bad value!");
5486 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
5487 if (UI.getUse().getResNo() == Value)
5494 /// isOnlyUserOf - Return true if this node is the only use of N.
5496 bool SDNode::isOnlyUserOf(SDNode *N) const {
5498 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
5509 /// isOperand - Return true if this node is an operand of N.
5511 bool SDValue::isOperandOf(SDNode *N) const {
5512 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5513 if (*this == N->getOperand(i))
5518 bool SDNode::isOperandOf(SDNode *N) const {
5519 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
5520 if (this == N->OperandList[i].getNode())
5525 /// reachesChainWithoutSideEffects - Return true if this operand (which must
5526 /// be a chain) reaches the specified operand without crossing any
5527 /// side-effecting instructions. In practice, this looks through token
5528 /// factors and non-volatile loads. In order to remain efficient, this only
5529 /// looks a couple of nodes in, it does not do an exhaustive search.
5530 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
5531 unsigned Depth) const {
5532 if (*this == Dest) return true;
5534 // Don't search too deeply, we just want to be able to see through
5535 // TokenFactor's etc.
5536 if (Depth == 0) return false;
5538 // If this is a token factor, all inputs to the TF happen in parallel. If any
5539 // of the operands of the TF reach dest, then we can do the xform.
5540 if (getOpcode() == ISD::TokenFactor) {
5541 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
5542 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
5547 // Loads don't have side effects, look through them.
5548 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
5549 if (!Ld->isVolatile())
5550 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
5556 static void findPredecessor(SDNode *N, const SDNode *P, bool &found,
5557 SmallPtrSet<SDNode *, 32> &Visited) {
5558 if (found || !Visited.insert(N))
5561 for (unsigned i = 0, e = N->getNumOperands(); !found && i != e; ++i) {
5562 SDNode *Op = N->getOperand(i).getNode();
5567 findPredecessor(Op, P, found, Visited);
5571 /// isPredecessorOf - Return true if this node is a predecessor of N. This node
5572 /// is either an operand of N or it can be reached by recursively traversing
5573 /// up the operands.
5574 /// NOTE: this is an expensive method. Use it carefully.
5575 bool SDNode::isPredecessorOf(SDNode *N) const {
5576 SmallPtrSet<SDNode *, 32> Visited;
5578 findPredecessor(N, this, found, Visited);
5582 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
5583 assert(Num < NumOperands && "Invalid child # of SDNode!");
5584 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
5587 std::string SDNode::getOperationName(const SelectionDAG *G) const {
5588 switch (getOpcode()) {
5590 if (getOpcode() < ISD::BUILTIN_OP_END)
5591 return "<<Unknown DAG Node>>";
5592 if (isMachineOpcode()) {
5594 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo())
5595 if (getMachineOpcode() < TII->getNumOpcodes())
5596 return TII->get(getMachineOpcode()).getName();
5597 return "<<Unknown Machine Node>>";
5600 const TargetLowering &TLI = G->getTargetLoweringInfo();
5601 const char *Name = TLI.getTargetNodeName(getOpcode());
5602 if (Name) return Name;
5603 return "<<Unknown Target Node>>";
5605 return "<<Unknown Node>>";
5608 case ISD::DELETED_NODE:
5609 return "<<Deleted Node!>>";
5611 case ISD::PREFETCH: return "Prefetch";
5612 case ISD::MEMBARRIER: return "MemBarrier";
5613 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
5614 case ISD::ATOMIC_SWAP: return "AtomicSwap";
5615 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
5616 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
5617 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
5618 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
5619 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
5620 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
5621 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
5622 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
5623 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
5624 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
5625 case ISD::PCMARKER: return "PCMarker";
5626 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
5627 case ISD::SRCVALUE: return "SrcValue";
5628 case ISD::MEMOPERAND: return "MemOperand";
5629 case ISD::EntryToken: return "EntryToken";
5630 case ISD::TokenFactor: return "TokenFactor";
5631 case ISD::AssertSext: return "AssertSext";
5632 case ISD::AssertZext: return "AssertZext";
5634 case ISD::BasicBlock: return "BasicBlock";
5635 case ISD::ARG_FLAGS: return "ArgFlags";
5636 case ISD::VALUETYPE: return "ValueType";
5637 case ISD::Register: return "Register";
5639 case ISD::Constant: return "Constant";
5640 case ISD::ConstantFP: return "ConstantFP";
5641 case ISD::GlobalAddress: return "GlobalAddress";
5642 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
5643 case ISD::FrameIndex: return "FrameIndex";
5644 case ISD::JumpTable: return "JumpTable";
5645 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
5646 case ISD::RETURNADDR: return "RETURNADDR";
5647 case ISD::FRAMEADDR: return "FRAMEADDR";
5648 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
5649 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR";
5650 case ISD::EHSELECTION: return "EHSELECTION";
5651 case ISD::EH_RETURN: return "EH_RETURN";
5652 case ISD::ConstantPool: return "ConstantPool";
5653 case ISD::ExternalSymbol: return "ExternalSymbol";
5654 case ISD::INTRINSIC_WO_CHAIN: {
5655 unsigned IID = cast<ConstantSDNode>(getOperand(0))->getZExtValue();
5656 return Intrinsic::getName((Intrinsic::ID)IID);
5658 case ISD::INTRINSIC_VOID:
5659 case ISD::INTRINSIC_W_CHAIN: {
5660 unsigned IID = cast<ConstantSDNode>(getOperand(1))->getZExtValue();
5661 return Intrinsic::getName((Intrinsic::ID)IID);
5664 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
5665 case ISD::TargetConstant: return "TargetConstant";
5666 case ISD::TargetConstantFP:return "TargetConstantFP";
5667 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
5668 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
5669 case ISD::TargetFrameIndex: return "TargetFrameIndex";
5670 case ISD::TargetJumpTable: return "TargetJumpTable";
5671 case ISD::TargetConstantPool: return "TargetConstantPool";
5672 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
5674 case ISD::CopyToReg: return "CopyToReg";
5675 case ISD::CopyFromReg: return "CopyFromReg";
5676 case ISD::UNDEF: return "undef";
5677 case ISD::MERGE_VALUES: return "merge_values";
5678 case ISD::INLINEASM: return "inlineasm";
5679 case ISD::DBG_LABEL: return "dbg_label";
5680 case ISD::EH_LABEL: return "eh_label";
5681 case ISD::DECLARE: return "declare";
5682 case ISD::HANDLENODE: return "handlenode";
5683 case ISD::FORMAL_ARGUMENTS: return "formal_arguments";
5684 case ISD::CALL: return "call";
5687 case ISD::FABS: return "fabs";
5688 case ISD::FNEG: return "fneg";
5689 case ISD::FSQRT: return "fsqrt";
5690 case ISD::FSIN: return "fsin";
5691 case ISD::FCOS: return "fcos";
5692 case ISD::FPOWI: return "fpowi";
5693 case ISD::FPOW: return "fpow";
5694 case ISD::FTRUNC: return "ftrunc";
5695 case ISD::FFLOOR: return "ffloor";
5696 case ISD::FCEIL: return "fceil";
5697 case ISD::FRINT: return "frint";
5698 case ISD::FNEARBYINT: return "fnearbyint";
5701 case ISD::ADD: return "add";
5702 case ISD::SUB: return "sub";
5703 case ISD::MUL: return "mul";
5704 case ISD::MULHU: return "mulhu";
5705 case ISD::MULHS: return "mulhs";
5706 case ISD::SDIV: return "sdiv";
5707 case ISD::UDIV: return "udiv";
5708 case ISD::SREM: return "srem";
5709 case ISD::UREM: return "urem";
5710 case ISD::SMUL_LOHI: return "smul_lohi";
5711 case ISD::UMUL_LOHI: return "umul_lohi";
5712 case ISD::SDIVREM: return "sdivrem";
5713 case ISD::UDIVREM: return "udivrem";
5714 case ISD::AND: return "and";
5715 case ISD::OR: return "or";
5716 case ISD::XOR: return "xor";
5717 case ISD::SHL: return "shl";
5718 case ISD::SRA: return "sra";
5719 case ISD::SRL: return "srl";
5720 case ISD::ROTL: return "rotl";
5721 case ISD::ROTR: return "rotr";
5722 case ISD::FADD: return "fadd";
5723 case ISD::FSUB: return "fsub";
5724 case ISD::FMUL: return "fmul";
5725 case ISD::FDIV: return "fdiv";
5726 case ISD::FREM: return "frem";
5727 case ISD::FCOPYSIGN: return "fcopysign";
5728 case ISD::FGETSIGN: return "fgetsign";
5730 case ISD::SETCC: return "setcc";
5731 case ISD::VSETCC: return "vsetcc";
5732 case ISD::SELECT: return "select";
5733 case ISD::SELECT_CC: return "select_cc";
5734 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
5735 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
5736 case ISD::CONCAT_VECTORS: return "concat_vectors";
5737 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
5738 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
5739 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
5740 case ISD::CARRY_FALSE: return "carry_false";
5741 case ISD::ADDC: return "addc";
5742 case ISD::ADDE: return "adde";
5743 case ISD::SADDO: return "saddo";
5744 case ISD::UADDO: return "uaddo";
5745 case ISD::SSUBO: return "ssubo";
5746 case ISD::USUBO: return "usubo";
5747 case ISD::SMULO: return "smulo";
5748 case ISD::UMULO: return "umulo";
5749 case ISD::SUBC: return "subc";
5750 case ISD::SUBE: return "sube";
5751 case ISD::SHL_PARTS: return "shl_parts";
5752 case ISD::SRA_PARTS: return "sra_parts";
5753 case ISD::SRL_PARTS: return "srl_parts";
5755 case ISD::EXTRACT_SUBREG: return "extract_subreg";
5756 case ISD::INSERT_SUBREG: return "insert_subreg";
5758 // Conversion operators.
5759 case ISD::SIGN_EXTEND: return "sign_extend";
5760 case ISD::ZERO_EXTEND: return "zero_extend";
5761 case ISD::ANY_EXTEND: return "any_extend";
5762 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
5763 case ISD::TRUNCATE: return "truncate";
5764 case ISD::FP_ROUND: return "fp_round";
5765 case ISD::FLT_ROUNDS_: return "flt_rounds";
5766 case ISD::FP_ROUND_INREG: return "fp_round_inreg";
5767 case ISD::FP_EXTEND: return "fp_extend";
5769 case ISD::SINT_TO_FP: return "sint_to_fp";
5770 case ISD::UINT_TO_FP: return "uint_to_fp";
5771 case ISD::FP_TO_SINT: return "fp_to_sint";
5772 case ISD::FP_TO_UINT: return "fp_to_uint";
5773 case ISD::BIT_CONVERT: return "bit_convert";
5775 case ISD::CONVERT_RNDSAT: {
5776 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) {
5777 default: assert(0 && "Unknown cvt code!");
5778 case ISD::CVT_FF: return "cvt_ff";
5779 case ISD::CVT_FS: return "cvt_fs";
5780 case ISD::CVT_FU: return "cvt_fu";
5781 case ISD::CVT_SF: return "cvt_sf";
5782 case ISD::CVT_UF: return "cvt_uf";
5783 case ISD::CVT_SS: return "cvt_ss";
5784 case ISD::CVT_SU: return "cvt_su";
5785 case ISD::CVT_US: return "cvt_us";
5786 case ISD::CVT_UU: return "cvt_uu";
5790 // Control flow instructions
5791 case ISD::BR: return "br";
5792 case ISD::BRIND: return "brind";
5793 case ISD::BR_JT: return "br_jt";
5794 case ISD::BRCOND: return "brcond";
5795 case ISD::BR_CC: return "br_cc";
5796 case ISD::RET: return "ret";
5797 case ISD::CALLSEQ_START: return "callseq_start";
5798 case ISD::CALLSEQ_END: return "callseq_end";
5801 case ISD::LOAD: return "load";
5802 case ISD::STORE: return "store";
5803 case ISD::VAARG: return "vaarg";
5804 case ISD::VACOPY: return "vacopy";
5805 case ISD::VAEND: return "vaend";
5806 case ISD::VASTART: return "vastart";
5807 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
5808 case ISD::EXTRACT_ELEMENT: return "extract_element";
5809 case ISD::BUILD_PAIR: return "build_pair";
5810 case ISD::STACKSAVE: return "stacksave";
5811 case ISD::STACKRESTORE: return "stackrestore";
5812 case ISD::TRAP: return "trap";
5815 case ISD::BSWAP: return "bswap";
5816 case ISD::CTPOP: return "ctpop";
5817 case ISD::CTTZ: return "cttz";
5818 case ISD::CTLZ: return "ctlz";
5821 case ISD::DBG_STOPPOINT: return "dbg_stoppoint";
5822 case ISD::DEBUG_LOC: return "debug_loc";
5825 case ISD::TRAMPOLINE: return "trampoline";
5828 switch (cast<CondCodeSDNode>(this)->get()) {
5829 default: assert(0 && "Unknown setcc condition!");
5830 case ISD::SETOEQ: return "setoeq";
5831 case ISD::SETOGT: return "setogt";
5832 case ISD::SETOGE: return "setoge";
5833 case ISD::SETOLT: return "setolt";
5834 case ISD::SETOLE: return "setole";
5835 case ISD::SETONE: return "setone";
5837 case ISD::SETO: return "seto";
5838 case ISD::SETUO: return "setuo";
5839 case ISD::SETUEQ: return "setue";
5840 case ISD::SETUGT: return "setugt";
5841 case ISD::SETUGE: return "setuge";
5842 case ISD::SETULT: return "setult";
5843 case ISD::SETULE: return "setule";
5844 case ISD::SETUNE: return "setune";
5846 case ISD::SETEQ: return "seteq";
5847 case ISD::SETGT: return "setgt";
5848 case ISD::SETGE: return "setge";
5849 case ISD::SETLT: return "setlt";
5850 case ISD::SETLE: return "setle";
5851 case ISD::SETNE: return "setne";
5856 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
5865 return "<post-inc>";
5867 return "<post-dec>";
5871 std::string ISD::ArgFlagsTy::getArgFlagsString() {
5872 std::string S = "< ";
5886 if (getByValAlign())
5887 S += "byval-align:" + utostr(getByValAlign()) + " ";
5889 S += "orig-align:" + utostr(getOrigAlign()) + " ";
5891 S += "byval-size:" + utostr(getByValSize()) + " ";
5895 void SDNode::dump() const { dump(0); }
5896 void SDNode::dump(const SelectionDAG *G) const {
5901 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
5902 OS << (void*)this << ": ";
5904 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
5906 if (getValueType(i) == MVT::Other)
5909 OS << getValueType(i).getMVTString();
5911 OS << " = " << getOperationName(G);
5914 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
5916 OS << (void*)getOperand(i).getNode();
5917 if (unsigned RN = getOperand(i).getResNo())
5921 if (!isTargetOpcode() && getOpcode() == ISD::VECTOR_SHUFFLE) {
5922 SDNode *Mask = getOperand(2).getNode();
5924 for (unsigned i = 0, e = Mask->getNumOperands(); i != e; ++i) {
5926 if (Mask->getOperand(i).getOpcode() == ISD::UNDEF)
5929 OS << cast<ConstantSDNode>(Mask->getOperand(i))->getZExtValue();
5934 if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
5935 OS << '<' << CSDN->getAPIntValue() << '>';
5936 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
5937 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle)
5938 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
5939 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble)
5940 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
5943 CSDN->getValueAPF().bitcastToAPInt().dump();
5946 } else if (const GlobalAddressSDNode *GADN =
5947 dyn_cast<GlobalAddressSDNode>(this)) {
5948 int64_t offset = GADN->getOffset();
5950 WriteAsOperand(OS, GADN->getGlobal());
5953 OS << " + " << offset;
5955 OS << " " << offset;
5956 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
5957 OS << "<" << FIDN->getIndex() << ">";
5958 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
5959 OS << "<" << JTDN->getIndex() << ">";
5960 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
5961 int offset = CP->getOffset();
5962 if (CP->isMachineConstantPoolEntry())
5963 OS << "<" << *CP->getMachineCPVal() << ">";
5965 OS << "<" << *CP->getConstVal() << ">";
5967 OS << " + " << offset;
5969 OS << " " << offset;
5970 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
5972 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
5974 OS << LBB->getName() << " ";
5975 OS << (const void*)BBDN->getBasicBlock() << ">";
5976 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
5977 if (G && R->getReg() &&
5978 TargetRegisterInfo::isPhysicalRegister(R->getReg())) {
5979 OS << " " << G->getTarget().getRegisterInfo()->getName(R->getReg());
5981 OS << " #" << R->getReg();
5983 } else if (const ExternalSymbolSDNode *ES =
5984 dyn_cast<ExternalSymbolSDNode>(this)) {
5985 OS << "'" << ES->getSymbol() << "'";
5986 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
5988 OS << "<" << M->getValue() << ">";
5991 } else if (const MemOperandSDNode *M = dyn_cast<MemOperandSDNode>(this)) {
5992 if (M->MO.getValue())
5993 OS << "<" << M->MO.getValue() << ":" << M->MO.getOffset() << ">";
5995 OS << "<null:" << M->MO.getOffset() << ">";
5996 } else if (const ARG_FLAGSSDNode *N = dyn_cast<ARG_FLAGSSDNode>(this)) {
5997 OS << N->getArgFlags().getArgFlagsString();
5998 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
5999 OS << ":" << N->getVT().getMVTString();
6001 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
6002 const Value *SrcValue = LD->getSrcValue();
6003 int SrcOffset = LD->getSrcValueOffset();
6009 OS << ":" << SrcOffset << ">";
6012 switch (LD->getExtensionType()) {
6013 default: doExt = false; break;
6014 case ISD::EXTLOAD: OS << " <anyext "; break;
6015 case ISD::SEXTLOAD: OS << " <sext "; break;
6016 case ISD::ZEXTLOAD: OS << " <zext "; break;
6019 OS << LD->getMemoryVT().getMVTString() << ">";
6021 const char *AM = getIndexedModeName(LD->getAddressingMode());
6024 if (LD->isVolatile())
6025 OS << " <volatile>";
6026 OS << " alignment=" << LD->getAlignment();
6027 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
6028 const Value *SrcValue = ST->getSrcValue();
6029 int SrcOffset = ST->getSrcValueOffset();
6035 OS << ":" << SrcOffset << ">";
6037 if (ST->isTruncatingStore())
6038 OS << " <trunc " << ST->getMemoryVT().getMVTString() << ">";
6040 const char *AM = getIndexedModeName(ST->getAddressingMode());
6043 if (ST->isVolatile())
6044 OS << " <volatile>";
6045 OS << " alignment=" << ST->getAlignment();
6046 } else if (const AtomicSDNode* AT = dyn_cast<AtomicSDNode>(this)) {
6047 const Value *SrcValue = AT->getSrcValue();
6048 int SrcOffset = AT->getSrcValueOffset();
6054 OS << ":" << SrcOffset << ">";
6055 if (AT->isVolatile())
6056 OS << " <volatile>";
6057 OS << " alignment=" << AT->getAlignment();
6061 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
6062 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6063 if (N->getOperand(i).getNode()->hasOneUse())
6064 DumpNodes(N->getOperand(i).getNode(), indent+2, G);
6066 cerr << "\n" << std::string(indent+2, ' ')
6067 << (void*)N->getOperand(i).getNode() << ": <multiple use>";
6070 cerr << "\n" << std::string(indent, ' ');
6074 void SelectionDAG::dump() const {
6075 cerr << "SelectionDAG has " << AllNodes.size() << " nodes:";
6077 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end();
6079 const SDNode *N = I;
6080 if (!N->hasOneUse() && N != getRoot().getNode())
6081 DumpNodes(N, 2, this);
6084 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
6089 const Type *ConstantPoolSDNode::getType() const {
6090 if (isMachineConstantPoolEntry())
6091 return Val.MachineCPVal->getType();
6092 return Val.ConstVal->getType();