1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "SDNodeOrdering.h"
16 #include "SDNodeDbgValue.h"
17 #include "llvm/Constants.h"
18 #include "llvm/Analysis/DebugInfo.h"
19 #include "llvm/Analysis/ValueTracking.h"
20 #include "llvm/Function.h"
21 #include "llvm/GlobalAlias.h"
22 #include "llvm/GlobalVariable.h"
23 #include "llvm/Intrinsics.h"
24 #include "llvm/DerivedTypes.h"
25 #include "llvm/Assembly/Writer.h"
26 #include "llvm/CallingConv.h"
27 #include "llvm/CodeGen/MachineBasicBlock.h"
28 #include "llvm/CodeGen/MachineConstantPool.h"
29 #include "llvm/CodeGen/MachineFrameInfo.h"
30 #include "llvm/CodeGen/MachineModuleInfo.h"
31 #include "llvm/CodeGen/PseudoSourceValue.h"
32 #include "llvm/Target/TargetRegisterInfo.h"
33 #include "llvm/Target/TargetData.h"
34 #include "llvm/Target/TargetFrameInfo.h"
35 #include "llvm/Target/TargetLowering.h"
36 #include "llvm/Target/TargetSelectionDAGInfo.h"
37 #include "llvm/Target/TargetOptions.h"
38 #include "llvm/Target/TargetInstrInfo.h"
39 #include "llvm/Target/TargetIntrinsicInfo.h"
40 #include "llvm/Target/TargetMachine.h"
41 #include "llvm/Support/CommandLine.h"
42 #include "llvm/Support/Debug.h"
43 #include "llvm/Support/ErrorHandling.h"
44 #include "llvm/Support/ManagedStatic.h"
45 #include "llvm/Support/MathExtras.h"
46 #include "llvm/Support/raw_ostream.h"
47 #include "llvm/System/Mutex.h"
48 #include "llvm/ADT/SetVector.h"
49 #include "llvm/ADT/SmallPtrSet.h"
50 #include "llvm/ADT/SmallSet.h"
51 #include "llvm/ADT/SmallVector.h"
52 #include "llvm/ADT/StringExtras.h"
57 /// makeVTList - Return an instance of the SDVTList struct initialized with the
58 /// specified members.
59 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
60 SDVTList Res = {VTs, NumVTs};
64 static const fltSemantics *EVTToAPFloatSemantics(EVT VT) {
65 switch (VT.getSimpleVT().SimpleTy) {
66 default: llvm_unreachable("Unknown FP format");
67 case MVT::f32: return &APFloat::IEEEsingle;
68 case MVT::f64: return &APFloat::IEEEdouble;
69 case MVT::f80: return &APFloat::x87DoubleExtended;
70 case MVT::f128: return &APFloat::IEEEquad;
71 case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
75 SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {}
77 //===----------------------------------------------------------------------===//
78 // ConstantFPSDNode Class
79 //===----------------------------------------------------------------------===//
81 /// isExactlyValue - We don't rely on operator== working on double values, as
82 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
83 /// As such, this method can be used to do an exact bit-for-bit comparison of
84 /// two floating point values.
85 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
86 return getValueAPF().bitwiseIsEqual(V);
89 bool ConstantFPSDNode::isValueValidForType(EVT VT,
91 assert(VT.isFloatingPoint() && "Can only convert between FP types");
93 // PPC long double cannot be converted to any other type.
94 if (VT == MVT::ppcf128 ||
95 &Val.getSemantics() == &APFloat::PPCDoubleDouble)
98 // convert modifies in place, so make a copy.
99 APFloat Val2 = APFloat(Val);
101 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
106 //===----------------------------------------------------------------------===//
108 //===----------------------------------------------------------------------===//
110 /// isBuildVectorAllOnes - Return true if the specified node is a
111 /// BUILD_VECTOR where all of the elements are ~0 or undef.
112 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
113 // Look through a bit convert.
114 if (N->getOpcode() == ISD::BIT_CONVERT)
115 N = N->getOperand(0).getNode();
117 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
119 unsigned i = 0, e = N->getNumOperands();
121 // Skip over all of the undef values.
122 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
125 // Do not accept an all-undef vector.
126 if (i == e) return false;
128 // Do not accept build_vectors that aren't all constants or which have non-~0
130 SDValue NotZero = N->getOperand(i);
131 if (isa<ConstantSDNode>(NotZero)) {
132 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue())
134 } else if (isa<ConstantFPSDNode>(NotZero)) {
135 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF().
136 bitcastToAPInt().isAllOnesValue())
141 // Okay, we have at least one ~0 value, check to see if the rest match or are
143 for (++i; i != e; ++i)
144 if (N->getOperand(i) != NotZero &&
145 N->getOperand(i).getOpcode() != ISD::UNDEF)
151 /// isBuildVectorAllZeros - Return true if the specified node is a
152 /// BUILD_VECTOR where all of the elements are 0 or undef.
153 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
154 // Look through a bit convert.
155 if (N->getOpcode() == ISD::BIT_CONVERT)
156 N = N->getOperand(0).getNode();
158 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
160 unsigned i = 0, e = N->getNumOperands();
162 // Skip over all of the undef values.
163 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
166 // Do not accept an all-undef vector.
167 if (i == e) return false;
169 // Do not accept build_vectors that aren't all constants or which have non-0
171 SDValue Zero = N->getOperand(i);
172 if (isa<ConstantSDNode>(Zero)) {
173 if (!cast<ConstantSDNode>(Zero)->isNullValue())
175 } else if (isa<ConstantFPSDNode>(Zero)) {
176 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero())
181 // Okay, we have at least one 0 value, check to see if the rest match or are
183 for (++i; i != e; ++i)
184 if (N->getOperand(i) != Zero &&
185 N->getOperand(i).getOpcode() != ISD::UNDEF)
190 /// isScalarToVector - Return true if the specified node is a
191 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
192 /// element is not an undef.
193 bool ISD::isScalarToVector(const SDNode *N) {
194 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
197 if (N->getOpcode() != ISD::BUILD_VECTOR)
199 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
201 unsigned NumElems = N->getNumOperands();
204 for (unsigned i = 1; i < NumElems; ++i) {
205 SDValue V = N->getOperand(i);
206 if (V.getOpcode() != ISD::UNDEF)
212 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
213 /// when given the operation for (X op Y).
214 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
215 // To perform this operation, we just need to swap the L and G bits of the
217 unsigned OldL = (Operation >> 2) & 1;
218 unsigned OldG = (Operation >> 1) & 1;
219 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
220 (OldL << 1) | // New G bit
221 (OldG << 2)); // New L bit.
224 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
225 /// 'op' is a valid SetCC operation.
226 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
227 unsigned Operation = Op;
229 Operation ^= 7; // Flip L, G, E bits, but not U.
231 Operation ^= 15; // Flip all of the condition bits.
233 if (Operation > ISD::SETTRUE2)
234 Operation &= ~8; // Don't let N and U bits get set.
236 return ISD::CondCode(Operation);
240 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
241 /// signed operation and 2 if the result is an unsigned comparison. Return zero
242 /// if the operation does not depend on the sign of the input (setne and seteq).
243 static int isSignedOp(ISD::CondCode Opcode) {
245 default: llvm_unreachable("Illegal integer setcc operation!");
247 case ISD::SETNE: return 0;
251 case ISD::SETGE: return 1;
255 case ISD::SETUGE: return 2;
259 /// getSetCCOrOperation - Return the result of a logical OR between different
260 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
261 /// returns SETCC_INVALID if it is not possible to represent the resultant
263 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
265 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
266 // Cannot fold a signed integer setcc with an unsigned integer setcc.
267 return ISD::SETCC_INVALID;
269 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
271 // If the N and U bits get set then the resultant comparison DOES suddenly
272 // care about orderedness, and is true when ordered.
273 if (Op > ISD::SETTRUE2)
274 Op &= ~16; // Clear the U bit if the N bit is set.
276 // Canonicalize illegal integer setcc's.
277 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
280 return ISD::CondCode(Op);
283 /// getSetCCAndOperation - Return the result of a logical AND between different
284 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
285 /// function returns zero if it is not possible to represent the resultant
287 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
289 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
290 // Cannot fold a signed setcc with an unsigned setcc.
291 return ISD::SETCC_INVALID;
293 // Combine all of the condition bits.
294 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
296 // Canonicalize illegal integer setcc's.
300 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
301 case ISD::SETOEQ: // SETEQ & SETU[LG]E
302 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
303 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
304 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
311 //===----------------------------------------------------------------------===//
312 // SDNode Profile Support
313 //===----------------------------------------------------------------------===//
315 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
317 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
321 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
322 /// solely with their pointer.
323 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
324 ID.AddPointer(VTList.VTs);
327 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
329 static void AddNodeIDOperands(FoldingSetNodeID &ID,
330 const SDValue *Ops, unsigned NumOps) {
331 for (; NumOps; --NumOps, ++Ops) {
332 ID.AddPointer(Ops->getNode());
333 ID.AddInteger(Ops->getResNo());
337 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
339 static void AddNodeIDOperands(FoldingSetNodeID &ID,
340 const SDUse *Ops, unsigned NumOps) {
341 for (; NumOps; --NumOps, ++Ops) {
342 ID.AddPointer(Ops->getNode());
343 ID.AddInteger(Ops->getResNo());
347 static void AddNodeIDNode(FoldingSetNodeID &ID,
348 unsigned short OpC, SDVTList VTList,
349 const SDValue *OpList, unsigned N) {
350 AddNodeIDOpcode(ID, OpC);
351 AddNodeIDValueTypes(ID, VTList);
352 AddNodeIDOperands(ID, OpList, N);
355 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
357 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
358 switch (N->getOpcode()) {
359 case ISD::TargetExternalSymbol:
360 case ISD::ExternalSymbol:
361 llvm_unreachable("Should only be used on nodes with operands");
362 default: break; // Normal nodes don't need extra info.
363 case ISD::TargetConstant:
365 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
367 case ISD::TargetConstantFP:
368 case ISD::ConstantFP: {
369 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
372 case ISD::TargetGlobalAddress:
373 case ISD::GlobalAddress:
374 case ISD::TargetGlobalTLSAddress:
375 case ISD::GlobalTLSAddress: {
376 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
377 ID.AddPointer(GA->getGlobal());
378 ID.AddInteger(GA->getOffset());
379 ID.AddInteger(GA->getTargetFlags());
382 case ISD::BasicBlock:
383 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
386 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
390 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
392 case ISD::FrameIndex:
393 case ISD::TargetFrameIndex:
394 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
397 case ISD::TargetJumpTable:
398 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
399 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
401 case ISD::ConstantPool:
402 case ISD::TargetConstantPool: {
403 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
404 ID.AddInteger(CP->getAlignment());
405 ID.AddInteger(CP->getOffset());
406 if (CP->isMachineConstantPoolEntry())
407 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID);
409 ID.AddPointer(CP->getConstVal());
410 ID.AddInteger(CP->getTargetFlags());
414 const LoadSDNode *LD = cast<LoadSDNode>(N);
415 ID.AddInteger(LD->getMemoryVT().getRawBits());
416 ID.AddInteger(LD->getRawSubclassData());
420 const StoreSDNode *ST = cast<StoreSDNode>(N);
421 ID.AddInteger(ST->getMemoryVT().getRawBits());
422 ID.AddInteger(ST->getRawSubclassData());
425 case ISD::ATOMIC_CMP_SWAP:
426 case ISD::ATOMIC_SWAP:
427 case ISD::ATOMIC_LOAD_ADD:
428 case ISD::ATOMIC_LOAD_SUB:
429 case ISD::ATOMIC_LOAD_AND:
430 case ISD::ATOMIC_LOAD_OR:
431 case ISD::ATOMIC_LOAD_XOR:
432 case ISD::ATOMIC_LOAD_NAND:
433 case ISD::ATOMIC_LOAD_MIN:
434 case ISD::ATOMIC_LOAD_MAX:
435 case ISD::ATOMIC_LOAD_UMIN:
436 case ISD::ATOMIC_LOAD_UMAX: {
437 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
438 ID.AddInteger(AT->getMemoryVT().getRawBits());
439 ID.AddInteger(AT->getRawSubclassData());
442 case ISD::VECTOR_SHUFFLE: {
443 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
444 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
446 ID.AddInteger(SVN->getMaskElt(i));
449 case ISD::TargetBlockAddress:
450 case ISD::BlockAddress: {
451 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress());
452 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags());
455 } // end switch (N->getOpcode())
458 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
460 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
461 AddNodeIDOpcode(ID, N->getOpcode());
462 // Add the return value info.
463 AddNodeIDValueTypes(ID, N->getVTList());
464 // Add the operand info.
465 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
467 // Handle SDNode leafs with special info.
468 AddNodeIDCustom(ID, N);
471 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
472 /// the CSE map that carries volatility, temporalness, indexing mode, and
473 /// extension/truncation information.
475 static inline unsigned
476 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile,
477 bool isNonTemporal) {
478 assert((ConvType & 3) == ConvType &&
479 "ConvType may not require more than 2 bits!");
480 assert((AM & 7) == AM &&
481 "AM may not require more than 3 bits!");
485 (isNonTemporal << 6);
488 //===----------------------------------------------------------------------===//
489 // SelectionDAG Class
490 //===----------------------------------------------------------------------===//
492 /// doNotCSE - Return true if CSE should not be performed for this node.
493 static bool doNotCSE(SDNode *N) {
494 if (N->getValueType(0) == MVT::Flag)
495 return true; // Never CSE anything that produces a flag.
497 switch (N->getOpcode()) {
499 case ISD::HANDLENODE:
501 return true; // Never CSE these nodes.
504 // Check that remaining values produced are not flags.
505 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
506 if (N->getValueType(i) == MVT::Flag)
507 return true; // Never CSE anything that produces a flag.
512 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
514 void SelectionDAG::RemoveDeadNodes() {
515 // Create a dummy node (which is not added to allnodes), that adds a reference
516 // to the root node, preventing it from being deleted.
517 HandleSDNode Dummy(getRoot());
519 SmallVector<SDNode*, 128> DeadNodes;
521 // Add all obviously-dead nodes to the DeadNodes worklist.
522 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
524 DeadNodes.push_back(I);
526 RemoveDeadNodes(DeadNodes);
528 // If the root changed (e.g. it was a dead load, update the root).
529 setRoot(Dummy.getValue());
532 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
533 /// given list, and any nodes that become unreachable as a result.
534 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes,
535 DAGUpdateListener *UpdateListener) {
537 // Process the worklist, deleting the nodes and adding their uses to the
539 while (!DeadNodes.empty()) {
540 SDNode *N = DeadNodes.pop_back_val();
543 UpdateListener->NodeDeleted(N, 0);
545 // Take the node out of the appropriate CSE map.
546 RemoveNodeFromCSEMaps(N);
548 // Next, brutally remove the operand list. This is safe to do, as there are
549 // no cycles in the graph.
550 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
552 SDNode *Operand = Use.getNode();
555 // Now that we removed this operand, see if there are no uses of it left.
556 if (Operand->use_empty())
557 DeadNodes.push_back(Operand);
564 void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){
565 SmallVector<SDNode*, 16> DeadNodes(1, N);
566 RemoveDeadNodes(DeadNodes, UpdateListener);
569 void SelectionDAG::DeleteNode(SDNode *N) {
570 // First take this out of the appropriate CSE map.
571 RemoveNodeFromCSEMaps(N);
573 // Finally, remove uses due to operands of this node, remove from the
574 // AllNodes list, and delete the node.
575 DeleteNodeNotInCSEMaps(N);
578 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
579 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
580 assert(N->use_empty() && "Cannot delete a node that is not dead!");
582 // Drop all of the operands and decrement used node's use counts.
588 void SelectionDAG::DeallocateNode(SDNode *N) {
589 if (N->OperandsNeedDelete)
590 delete[] N->OperandList;
592 // Set the opcode to DELETED_NODE to help catch bugs when node
593 // memory is reallocated.
594 N->NodeType = ISD::DELETED_NODE;
596 NodeAllocator.Deallocate(AllNodes.remove(N));
598 // Remove the ordering of this node.
601 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them.
602 SmallVector<SDDbgValue*, 2> &DbgVals = DbgInfo->getSDDbgValues(N);
603 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i)
604 DbgVals[i]->setIsInvalidated();
607 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
608 /// correspond to it. This is useful when we're about to delete or repurpose
609 /// the node. We don't want future request for structurally identical nodes
610 /// to return N anymore.
611 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
613 switch (N->getOpcode()) {
614 case ISD::EntryToken:
615 llvm_unreachable("EntryToken should not be in CSEMaps!");
617 case ISD::HANDLENODE: return false; // noop.
619 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
620 "Cond code doesn't exist!");
621 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
622 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
624 case ISD::ExternalSymbol:
625 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
627 case ISD::TargetExternalSymbol: {
628 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
629 Erased = TargetExternalSymbols.erase(
630 std::pair<std::string,unsigned char>(ESN->getSymbol(),
631 ESN->getTargetFlags()));
634 case ISD::VALUETYPE: {
635 EVT VT = cast<VTSDNode>(N)->getVT();
636 if (VT.isExtended()) {
637 Erased = ExtendedValueTypeNodes.erase(VT);
639 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0;
640 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0;
645 // Remove it from the CSE Map.
646 Erased = CSEMap.RemoveNode(N);
650 // Verify that the node was actually in one of the CSE maps, unless it has a
651 // flag result (which cannot be CSE'd) or is one of the special cases that are
652 // not subject to CSE.
653 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag &&
654 !N->isMachineOpcode() && !doNotCSE(N)) {
657 llvm_unreachable("Node is not in map!");
663 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
664 /// maps and modified in place. Add it back to the CSE maps, unless an identical
665 /// node already exists, in which case transfer all its users to the existing
666 /// node. This transfer can potentially trigger recursive merging.
669 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N,
670 DAGUpdateListener *UpdateListener) {
671 // For node types that aren't CSE'd, just act as if no identical node
674 SDNode *Existing = CSEMap.GetOrInsertNode(N);
676 // If there was already an existing matching node, use ReplaceAllUsesWith
677 // to replace the dead one with the existing one. This can cause
678 // recursive merging of other unrelated nodes down the line.
679 ReplaceAllUsesWith(N, Existing, UpdateListener);
681 // N is now dead. Inform the listener if it exists and delete it.
683 UpdateListener->NodeDeleted(N, Existing);
684 DeleteNodeNotInCSEMaps(N);
689 // If the node doesn't already exist, we updated it. Inform a listener if
692 UpdateListener->NodeUpdated(N);
695 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
696 /// were replaced with those specified. If this node is never memoized,
697 /// return null, otherwise return a pointer to the slot it would take. If a
698 /// node already exists with these operands, the slot will be non-null.
699 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
704 SDValue Ops[] = { Op };
706 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
707 AddNodeIDCustom(ID, N);
708 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
712 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
713 /// were replaced with those specified. If this node is never memoized,
714 /// return null, otherwise return a pointer to the slot it would take. If a
715 /// node already exists with these operands, the slot will be non-null.
716 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
717 SDValue Op1, SDValue Op2,
722 SDValue Ops[] = { Op1, Op2 };
724 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
725 AddNodeIDCustom(ID, N);
726 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
731 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
732 /// were replaced with those specified. If this node is never memoized,
733 /// return null, otherwise return a pointer to the slot it would take. If a
734 /// node already exists with these operands, the slot will be non-null.
735 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
736 const SDValue *Ops,unsigned NumOps,
742 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
743 AddNodeIDCustom(ID, N);
744 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
748 /// VerifyNodeCommon - Sanity check the given node. Aborts if it is invalid.
749 static void VerifyNodeCommon(SDNode *N) {
750 switch (N->getOpcode()) {
753 case ISD::BUILD_PAIR: {
754 EVT VT = N->getValueType(0);
755 assert(N->getNumValues() == 1 && "Too many results!");
756 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
757 "Wrong return type!");
758 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
759 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
760 "Mismatched operand types!");
761 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
762 "Wrong operand type!");
763 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
764 "Wrong return type size");
767 case ISD::BUILD_VECTOR: {
768 assert(N->getNumValues() == 1 && "Too many results!");
769 assert(N->getValueType(0).isVector() && "Wrong return type!");
770 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
771 "Wrong number of operands!");
772 EVT EltVT = N->getValueType(0).getVectorElementType();
773 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I)
774 assert((I->getValueType() == EltVT ||
775 (EltVT.isInteger() && I->getValueType().isInteger() &&
776 EltVT.bitsLE(I->getValueType()))) &&
777 "Wrong operand type!");
783 /// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid.
784 static void VerifySDNode(SDNode *N) {
785 // The SDNode allocators cannot be used to allocate nodes with fields that are
786 // not present in an SDNode!
787 assert(!isa<MemSDNode>(N) && "Bad MemSDNode!");
788 assert(!isa<ShuffleVectorSDNode>(N) && "Bad ShuffleVectorSDNode!");
789 assert(!isa<ConstantSDNode>(N) && "Bad ConstantSDNode!");
790 assert(!isa<ConstantFPSDNode>(N) && "Bad ConstantFPSDNode!");
791 assert(!isa<GlobalAddressSDNode>(N) && "Bad GlobalAddressSDNode!");
792 assert(!isa<FrameIndexSDNode>(N) && "Bad FrameIndexSDNode!");
793 assert(!isa<JumpTableSDNode>(N) && "Bad JumpTableSDNode!");
794 assert(!isa<ConstantPoolSDNode>(N) && "Bad ConstantPoolSDNode!");
795 assert(!isa<BasicBlockSDNode>(N) && "Bad BasicBlockSDNode!");
796 assert(!isa<SrcValueSDNode>(N) && "Bad SrcValueSDNode!");
797 assert(!isa<MDNodeSDNode>(N) && "Bad MDNodeSDNode!");
798 assert(!isa<RegisterSDNode>(N) && "Bad RegisterSDNode!");
799 assert(!isa<BlockAddressSDNode>(N) && "Bad BlockAddressSDNode!");
800 assert(!isa<EHLabelSDNode>(N) && "Bad EHLabelSDNode!");
801 assert(!isa<ExternalSymbolSDNode>(N) && "Bad ExternalSymbolSDNode!");
802 assert(!isa<CondCodeSDNode>(N) && "Bad CondCodeSDNode!");
803 assert(!isa<CvtRndSatSDNode>(N) && "Bad CvtRndSatSDNode!");
804 assert(!isa<VTSDNode>(N) && "Bad VTSDNode!");
805 assert(!isa<MachineSDNode>(N) && "Bad MachineSDNode!");
810 /// VerifyMachineNode - Sanity check the given MachineNode. Aborts if it is
812 static void VerifyMachineNode(SDNode *N) {
813 // The MachineNode allocators cannot be used to allocate nodes with fields
814 // that are not present in a MachineNode!
815 // Currently there are no such nodes.
820 /// getEVTAlignment - Compute the default alignment value for the
823 unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
824 const Type *Ty = VT == MVT::iPTR ?
825 PointerType::get(Type::getInt8Ty(*getContext()), 0) :
826 VT.getTypeForEVT(*getContext());
828 return TLI.getTargetData()->getABITypeAlignment(Ty);
831 // EntryNode could meaningfully have debug info if we can find it...
832 SelectionDAG::SelectionDAG(const TargetMachine &tm)
833 : TM(tm), TLI(*tm.getTargetLowering()), TSI(*tm.getSelectionDAGInfo()),
834 EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Other)),
835 Root(getEntryNode()), Ordering(0) {
836 AllNodes.push_back(&EntryNode);
837 Ordering = new SDNodeOrdering();
838 DbgInfo = new SDDbgInfo();
841 void SelectionDAG::init(MachineFunction &mf) {
843 Context = &mf.getFunction()->getContext();
846 SelectionDAG::~SelectionDAG() {
852 void SelectionDAG::allnodes_clear() {
853 assert(&*AllNodes.begin() == &EntryNode);
854 AllNodes.remove(AllNodes.begin());
855 while (!AllNodes.empty())
856 DeallocateNode(AllNodes.begin());
859 void SelectionDAG::clear() {
861 OperandAllocator.Reset();
864 ExtendedValueTypeNodes.clear();
865 ExternalSymbols.clear();
866 TargetExternalSymbols.clear();
867 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
868 static_cast<CondCodeSDNode*>(0));
869 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
870 static_cast<SDNode*>(0));
872 EntryNode.UseList = 0;
873 AllNodes.push_back(&EntryNode);
874 Root = getEntryNode();
879 SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
880 return VT.bitsGT(Op.getValueType()) ?
881 getNode(ISD::SIGN_EXTEND, DL, VT, Op) :
882 getNode(ISD::TRUNCATE, DL, VT, Op);
885 SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
886 return VT.bitsGT(Op.getValueType()) ?
887 getNode(ISD::ZERO_EXTEND, DL, VT, Op) :
888 getNode(ISD::TRUNCATE, DL, VT, Op);
891 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) {
892 assert(!VT.isVector() &&
893 "getZeroExtendInReg should use the vector element type instead of "
895 if (Op.getValueType() == VT) return Op;
896 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
897 APInt Imm = APInt::getLowBitsSet(BitWidth,
899 return getNode(ISD::AND, DL, Op.getValueType(), Op,
900 getConstant(Imm, Op.getValueType()));
903 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
905 SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) {
906 EVT EltVT = VT.getScalarType();
908 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT);
909 return getNode(ISD::XOR, DL, VT, Val, NegOne);
912 SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) {
913 EVT EltVT = VT.getScalarType();
914 assert((EltVT.getSizeInBits() >= 64 ||
915 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
916 "getConstant with a uint64_t value that doesn't fit in the type!");
917 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
920 SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) {
921 return getConstant(*ConstantInt::get(*Context, Val), VT, isT);
924 SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) {
925 assert(VT.isInteger() && "Cannot create FP integer constant!");
927 EVT EltVT = VT.getScalarType();
928 assert(Val.getBitWidth() == EltVT.getSizeInBits() &&
929 "APInt size does not match type size!");
931 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
933 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
937 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
939 return SDValue(N, 0);
942 N = new (NodeAllocator) ConstantSDNode(isT, &Val, EltVT);
943 CSEMap.InsertNode(N, IP);
944 AllNodes.push_back(N);
947 SDValue Result(N, 0);
949 SmallVector<SDValue, 8> Ops;
950 Ops.assign(VT.getVectorNumElements(), Result);
951 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
956 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
957 return getConstant(Val, TLI.getPointerTy(), isTarget);
961 SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) {
962 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget);
965 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){
966 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
968 EVT EltVT = VT.getScalarType();
970 // Do the map lookup using the actual bit pattern for the floating point
971 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
972 // we don't have issues with SNANs.
973 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
975 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
979 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
981 return SDValue(N, 0);
984 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT);
985 CSEMap.InsertNode(N, IP);
986 AllNodes.push_back(N);
989 SDValue Result(N, 0);
991 SmallVector<SDValue, 8> Ops;
992 Ops.assign(VT.getVectorNumElements(), Result);
993 // FIXME DebugLoc info might be appropriate here
994 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
999 SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) {
1000 EVT EltVT = VT.getScalarType();
1001 if (EltVT==MVT::f32)
1002 return getConstantFP(APFloat((float)Val), VT, isTarget);
1003 else if (EltVT==MVT::f64)
1004 return getConstantFP(APFloat(Val), VT, isTarget);
1005 else if (EltVT==MVT::f80 || EltVT==MVT::f128) {
1007 APFloat apf = APFloat(Val);
1008 apf.convert(*EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven,
1010 return getConstantFP(apf, VT, isTarget);
1012 assert(0 && "Unsupported type in getConstantFP");
1017 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, DebugLoc DL,
1018 EVT VT, int64_t Offset,
1020 unsigned char TargetFlags) {
1021 assert((TargetFlags == 0 || isTargetGA) &&
1022 "Cannot set target flags on target-independent globals");
1024 // Truncate (with sign-extension) the offset value to the pointer size.
1025 EVT PTy = TLI.getPointerTy();
1026 unsigned BitWidth = PTy.getSizeInBits();
1028 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth));
1030 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
1032 // If GV is an alias then use the aliasee for determining thread-localness.
1033 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
1034 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
1038 if (GVar && GVar->isThreadLocal())
1039 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
1041 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
1043 FoldingSetNodeID ID;
1044 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1046 ID.AddInteger(Offset);
1047 ID.AddInteger(TargetFlags);
1049 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1050 return SDValue(E, 0);
1052 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL, GV, VT,
1053 Offset, TargetFlags);
1054 CSEMap.InsertNode(N, IP);
1055 AllNodes.push_back(N);
1056 return SDValue(N, 0);
1059 SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
1060 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1061 FoldingSetNodeID ID;
1062 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1065 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1066 return SDValue(E, 0);
1068 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget);
1069 CSEMap.InsertNode(N, IP);
1070 AllNodes.push_back(N);
1071 return SDValue(N, 0);
1074 SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
1075 unsigned char TargetFlags) {
1076 assert((TargetFlags == 0 || isTarget) &&
1077 "Cannot set target flags on target-independent jump tables");
1078 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1079 FoldingSetNodeID ID;
1080 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1082 ID.AddInteger(TargetFlags);
1084 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1085 return SDValue(E, 0);
1087 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget,
1089 CSEMap.InsertNode(N, IP);
1090 AllNodes.push_back(N);
1091 return SDValue(N, 0);
1094 SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT,
1095 unsigned Alignment, int Offset,
1097 unsigned char TargetFlags) {
1098 assert((TargetFlags == 0 || isTarget) &&
1099 "Cannot set target flags on target-independent globals");
1101 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1102 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1103 FoldingSetNodeID ID;
1104 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1105 ID.AddInteger(Alignment);
1106 ID.AddInteger(Offset);
1108 ID.AddInteger(TargetFlags);
1110 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1111 return SDValue(E, 0);
1113 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1114 Alignment, TargetFlags);
1115 CSEMap.InsertNode(N, IP);
1116 AllNodes.push_back(N);
1117 return SDValue(N, 0);
1121 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
1122 unsigned Alignment, int Offset,
1124 unsigned char TargetFlags) {
1125 assert((TargetFlags == 0 || isTarget) &&
1126 "Cannot set target flags on target-independent globals");
1128 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1129 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1130 FoldingSetNodeID ID;
1131 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1132 ID.AddInteger(Alignment);
1133 ID.AddInteger(Offset);
1134 C->AddSelectionDAGCSEId(ID);
1135 ID.AddInteger(TargetFlags);
1137 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1138 return SDValue(E, 0);
1140 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1141 Alignment, TargetFlags);
1142 CSEMap.InsertNode(N, IP);
1143 AllNodes.push_back(N);
1144 return SDValue(N, 0);
1147 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1148 FoldingSetNodeID ID;
1149 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1152 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1153 return SDValue(E, 0);
1155 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB);
1156 CSEMap.InsertNode(N, IP);
1157 AllNodes.push_back(N);
1158 return SDValue(N, 0);
1161 SDValue SelectionDAG::getValueType(EVT VT) {
1162 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
1163 ValueTypeNodes.size())
1164 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
1166 SDNode *&N = VT.isExtended() ?
1167 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
1169 if (N) return SDValue(N, 0);
1170 N = new (NodeAllocator) VTSDNode(VT);
1171 AllNodes.push_back(N);
1172 return SDValue(N, 0);
1175 SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
1176 SDNode *&N = ExternalSymbols[Sym];
1177 if (N) return SDValue(N, 0);
1178 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT);
1179 AllNodes.push_back(N);
1180 return SDValue(N, 0);
1183 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
1184 unsigned char TargetFlags) {
1186 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1188 if (N) return SDValue(N, 0);
1189 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1190 AllNodes.push_back(N);
1191 return SDValue(N, 0);
1194 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1195 if ((unsigned)Cond >= CondCodeNodes.size())
1196 CondCodeNodes.resize(Cond+1);
1198 if (CondCodeNodes[Cond] == 0) {
1199 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond);
1200 CondCodeNodes[Cond] = N;
1201 AllNodes.push_back(N);
1204 return SDValue(CondCodeNodes[Cond], 0);
1207 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1208 // the shuffle mask M that point at N1 to point at N2, and indices that point
1209 // N2 to point at N1.
1210 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1212 int NElts = M.size();
1213 for (int i = 0; i != NElts; ++i) {
1221 SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1,
1222 SDValue N2, const int *Mask) {
1223 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE");
1224 assert(VT.isVector() && N1.getValueType().isVector() &&
1225 "Vector Shuffle VTs must be a vectors");
1226 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType()
1227 && "Vector Shuffle VTs must have same element type");
1229 // Canonicalize shuffle undef, undef -> undef
1230 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1231 return getUNDEF(VT);
1233 // Validate that all indices in Mask are within the range of the elements
1234 // input to the shuffle.
1235 unsigned NElts = VT.getVectorNumElements();
1236 SmallVector<int, 8> MaskVec;
1237 for (unsigned i = 0; i != NElts; ++i) {
1238 assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1239 MaskVec.push_back(Mask[i]);
1242 // Canonicalize shuffle v, v -> v, undef
1245 for (unsigned i = 0; i != NElts; ++i)
1246 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1249 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1250 if (N1.getOpcode() == ISD::UNDEF)
1251 commuteShuffle(N1, N2, MaskVec);
1253 // Canonicalize all index into lhs, -> shuffle lhs, undef
1254 // Canonicalize all index into rhs, -> shuffle rhs, undef
1255 bool AllLHS = true, AllRHS = true;
1256 bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1257 for (unsigned i = 0; i != NElts; ++i) {
1258 if (MaskVec[i] >= (int)NElts) {
1263 } else if (MaskVec[i] >= 0) {
1267 if (AllLHS && AllRHS)
1268 return getUNDEF(VT);
1269 if (AllLHS && !N2Undef)
1273 commuteShuffle(N1, N2, MaskVec);
1276 // If Identity shuffle, or all shuffle in to undef, return that node.
1277 bool AllUndef = true;
1278 bool Identity = true;
1279 for (unsigned i = 0; i != NElts; ++i) {
1280 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1281 if (MaskVec[i] >= 0) AllUndef = false;
1283 if (Identity && NElts == N1.getValueType().getVectorNumElements())
1286 return getUNDEF(VT);
1288 FoldingSetNodeID ID;
1289 SDValue Ops[2] = { N1, N2 };
1290 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2);
1291 for (unsigned i = 0; i != NElts; ++i)
1292 ID.AddInteger(MaskVec[i]);
1295 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1296 return SDValue(E, 0);
1298 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1299 // SDNode doesn't have access to it. This memory will be "leaked" when
1300 // the node is deallocated, but recovered when the NodeAllocator is released.
1301 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1302 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1304 ShuffleVectorSDNode *N =
1305 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc);
1306 CSEMap.InsertNode(N, IP);
1307 AllNodes.push_back(N);
1308 return SDValue(N, 0);
1311 SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl,
1312 SDValue Val, SDValue DTy,
1313 SDValue STy, SDValue Rnd, SDValue Sat,
1314 ISD::CvtCode Code) {
1315 // If the src and dest types are the same and the conversion is between
1316 // integer types of the same sign or two floats, no conversion is necessary.
1318 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1321 FoldingSetNodeID ID;
1322 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1323 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5);
1325 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1326 return SDValue(E, 0);
1328 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5,
1330 CSEMap.InsertNode(N, IP);
1331 AllNodes.push_back(N);
1332 return SDValue(N, 0);
1335 SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
1336 FoldingSetNodeID ID;
1337 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1338 ID.AddInteger(RegNo);
1340 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1341 return SDValue(E, 0);
1343 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT);
1344 CSEMap.InsertNode(N, IP);
1345 AllNodes.push_back(N);
1346 return SDValue(N, 0);
1349 SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) {
1350 FoldingSetNodeID ID;
1351 SDValue Ops[] = { Root };
1352 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1);
1353 ID.AddPointer(Label);
1355 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1356 return SDValue(E, 0);
1358 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label);
1359 CSEMap.InsertNode(N, IP);
1360 AllNodes.push_back(N);
1361 return SDValue(N, 0);
1365 SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT,
1367 unsigned char TargetFlags) {
1368 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress;
1370 FoldingSetNodeID ID;
1371 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1373 ID.AddInteger(TargetFlags);
1375 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1376 return SDValue(E, 0);
1378 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, TargetFlags);
1379 CSEMap.InsertNode(N, IP);
1380 AllNodes.push_back(N);
1381 return SDValue(N, 0);
1384 SDValue SelectionDAG::getSrcValue(const Value *V) {
1385 assert((!V || V->getType()->isPointerTy()) &&
1386 "SrcValue is not a pointer?");
1388 FoldingSetNodeID ID;
1389 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1393 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1394 return SDValue(E, 0);
1396 SDNode *N = new (NodeAllocator) SrcValueSDNode(V);
1397 CSEMap.InsertNode(N, IP);
1398 AllNodes.push_back(N);
1399 return SDValue(N, 0);
1402 /// getMDNode - Return an MDNodeSDNode which holds an MDNode.
1403 SDValue SelectionDAG::getMDNode(const MDNode *MD) {
1404 FoldingSetNodeID ID;
1405 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0);
1409 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1410 return SDValue(E, 0);
1412 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD);
1413 CSEMap.InsertNode(N, IP);
1414 AllNodes.push_back(N);
1415 return SDValue(N, 0);
1419 /// getShiftAmountOperand - Return the specified value casted to
1420 /// the target's desired shift amount type.
1421 SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) {
1422 EVT OpTy = Op.getValueType();
1423 MVT ShTy = TLI.getShiftAmountTy();
1424 if (OpTy == ShTy || OpTy.isVector()) return Op;
1426 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1427 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op);
1430 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1431 /// specified value type.
1432 SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
1433 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1434 unsigned ByteSize = VT.getStoreSize();
1435 const Type *Ty = VT.getTypeForEVT(*getContext());
1436 unsigned StackAlign =
1437 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign);
1439 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false);
1440 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1443 /// CreateStackTemporary - Create a stack temporary suitable for holding
1444 /// either of the specified value types.
1445 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
1446 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1447 VT2.getStoreSizeInBits())/8;
1448 const Type *Ty1 = VT1.getTypeForEVT(*getContext());
1449 const Type *Ty2 = VT2.getTypeForEVT(*getContext());
1450 const TargetData *TD = TLI.getTargetData();
1451 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1452 TD->getPrefTypeAlignment(Ty2));
1454 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1455 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false);
1456 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1459 SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
1460 SDValue N2, ISD::CondCode Cond, DebugLoc dl) {
1461 // These setcc operations always fold.
1465 case ISD::SETFALSE2: return getConstant(0, VT);
1467 case ISD::SETTRUE2: return getConstant(1, VT);
1479 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1483 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1484 const APInt &C2 = N2C->getAPIntValue();
1485 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1486 const APInt &C1 = N1C->getAPIntValue();
1489 default: llvm_unreachable("Unknown integer setcc!");
1490 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1491 case ISD::SETNE: return getConstant(C1 != C2, VT);
1492 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1493 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1494 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1495 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1496 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1497 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1498 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1499 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1503 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1504 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1505 // No compile time operations on this type yet.
1506 if (N1C->getValueType(0) == MVT::ppcf128)
1509 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1512 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1513 return getUNDEF(VT);
1515 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1516 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1517 return getUNDEF(VT);
1519 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1520 R==APFloat::cmpLessThan, VT);
1521 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1522 return getUNDEF(VT);
1524 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1525 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1526 return getUNDEF(VT);
1528 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1529 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1530 return getUNDEF(VT);
1532 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1533 R==APFloat::cmpEqual, VT);
1534 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1535 return getUNDEF(VT);
1537 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1538 R==APFloat::cmpEqual, VT);
1539 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1540 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1541 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1542 R==APFloat::cmpEqual, VT);
1543 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1544 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1545 R==APFloat::cmpLessThan, VT);
1546 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1547 R==APFloat::cmpUnordered, VT);
1548 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1549 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1552 // Ensure that the constant occurs on the RHS.
1553 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1557 // Could not fold it.
1561 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1562 /// use this predicate to simplify operations downstream.
1563 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1564 // This predicate is not safe for vector operations.
1565 if (Op.getValueType().isVector())
1568 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1569 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1572 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1573 /// this predicate to simplify operations downstream. Mask is known to be zero
1574 /// for bits that V cannot have.
1575 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1576 unsigned Depth) const {
1577 APInt KnownZero, KnownOne;
1578 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
1579 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1580 return (KnownZero & Mask) == Mask;
1583 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1584 /// known to be either zero or one and return them in the KnownZero/KnownOne
1585 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1587 void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask,
1588 APInt &KnownZero, APInt &KnownOne,
1589 unsigned Depth) const {
1590 unsigned BitWidth = Mask.getBitWidth();
1591 assert(BitWidth == Op.getValueType().getScalarType().getSizeInBits() &&
1592 "Mask size mismatches value type size!");
1594 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1595 if (Depth == 6 || Mask == 0)
1596 return; // Limit search depth.
1598 APInt KnownZero2, KnownOne2;
1600 switch (Op.getOpcode()) {
1602 // We know all of the bits for a constant!
1603 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask;
1604 KnownZero = ~KnownOne & Mask;
1607 // If either the LHS or the RHS are Zero, the result is zero.
1608 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1609 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero,
1610 KnownZero2, KnownOne2, Depth+1);
1611 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1612 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1614 // Output known-1 bits are only known if set in both the LHS & RHS.
1615 KnownOne &= KnownOne2;
1616 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1617 KnownZero |= KnownZero2;
1620 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1621 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne,
1622 KnownZero2, KnownOne2, Depth+1);
1623 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1624 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1626 // Output known-0 bits are only known if clear in both the LHS & RHS.
1627 KnownZero &= KnownZero2;
1628 // Output known-1 are known to be set if set in either the LHS | RHS.
1629 KnownOne |= KnownOne2;
1632 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1633 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
1634 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1635 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1637 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1638 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1639 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1640 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1641 KnownZero = KnownZeroOut;
1645 APInt Mask2 = APInt::getAllOnesValue(BitWidth);
1646 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1);
1647 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1648 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1649 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1651 // If low bits are zero in either operand, output low known-0 bits.
1652 // Also compute a conserative estimate for high known-0 bits.
1653 // More trickiness is possible, but this is sufficient for the
1654 // interesting case of alignment computation.
1656 unsigned TrailZ = KnownZero.countTrailingOnes() +
1657 KnownZero2.countTrailingOnes();
1658 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1659 KnownZero2.countLeadingOnes(),
1660 BitWidth) - BitWidth;
1662 TrailZ = std::min(TrailZ, BitWidth);
1663 LeadZ = std::min(LeadZ, BitWidth);
1664 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1665 APInt::getHighBitsSet(BitWidth, LeadZ);
1670 // For the purposes of computing leading zeros we can conservatively
1671 // treat a udiv as a logical right shift by the power of 2 known to
1672 // be less than the denominator.
1673 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1674 ComputeMaskedBits(Op.getOperand(0),
1675 AllOnes, KnownZero2, KnownOne2, Depth+1);
1676 unsigned LeadZ = KnownZero2.countLeadingOnes();
1680 ComputeMaskedBits(Op.getOperand(1),
1681 AllOnes, KnownZero2, KnownOne2, Depth+1);
1682 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1683 if (RHSUnknownLeadingOnes != BitWidth)
1684 LeadZ = std::min(BitWidth,
1685 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1687 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask;
1691 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1);
1692 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1);
1693 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1694 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1696 // Only known if known in both the LHS and RHS.
1697 KnownOne &= KnownOne2;
1698 KnownZero &= KnownZero2;
1700 case ISD::SELECT_CC:
1701 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1);
1702 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1);
1703 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1704 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1706 // Only known if known in both the LHS and RHS.
1707 KnownOne &= KnownOne2;
1708 KnownZero &= KnownZero2;
1716 if (Op.getResNo() != 1)
1718 // The boolean result conforms to getBooleanContents. Fall through.
1720 // If we know the result of a setcc has the top bits zero, use this info.
1721 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent &&
1723 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1726 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1727 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1728 unsigned ShAmt = SA->getZExtValue();
1730 // If the shift count is an invalid immediate, don't do anything.
1731 if (ShAmt >= BitWidth)
1734 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt),
1735 KnownZero, KnownOne, Depth+1);
1736 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1737 KnownZero <<= ShAmt;
1739 // low bits known zero.
1740 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1744 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1745 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1746 unsigned ShAmt = SA->getZExtValue();
1748 // If the shift count is an invalid immediate, don't do anything.
1749 if (ShAmt >= BitWidth)
1752 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt),
1753 KnownZero, KnownOne, Depth+1);
1754 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1755 KnownZero = KnownZero.lshr(ShAmt);
1756 KnownOne = KnownOne.lshr(ShAmt);
1758 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1759 KnownZero |= HighBits; // High bits known zero.
1763 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1764 unsigned ShAmt = SA->getZExtValue();
1766 // If the shift count is an invalid immediate, don't do anything.
1767 if (ShAmt >= BitWidth)
1770 APInt InDemandedMask = (Mask << ShAmt);
1771 // If any of the demanded bits are produced by the sign extension, we also
1772 // demand the input sign bit.
1773 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1774 if (HighBits.getBoolValue())
1775 InDemandedMask |= APInt::getSignBit(BitWidth);
1777 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne,
1779 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1780 KnownZero = KnownZero.lshr(ShAmt);
1781 KnownOne = KnownOne.lshr(ShAmt);
1783 // Handle the sign bits.
1784 APInt SignBit = APInt::getSignBit(BitWidth);
1785 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1787 if (KnownZero.intersects(SignBit)) {
1788 KnownZero |= HighBits; // New bits are known zero.
1789 } else if (KnownOne.intersects(SignBit)) {
1790 KnownOne |= HighBits; // New bits are known one.
1794 case ISD::SIGN_EXTEND_INREG: {
1795 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1796 unsigned EBits = EVT.getScalarType().getSizeInBits();
1798 // Sign extension. Compute the demanded bits in the result that are not
1799 // present in the input.
1800 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask;
1802 APInt InSignBit = APInt::getSignBit(EBits);
1803 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits);
1805 // If the sign extended bits are demanded, we know that the sign
1807 InSignBit.zext(BitWidth);
1808 if (NewBits.getBoolValue())
1809 InputDemandedBits |= InSignBit;
1811 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits,
1812 KnownZero, KnownOne, Depth+1);
1813 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1815 // If the sign bit of the input is known set or clear, then we know the
1816 // top bits of the result.
1817 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1818 KnownZero |= NewBits;
1819 KnownOne &= ~NewBits;
1820 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1821 KnownOne |= NewBits;
1822 KnownZero &= ~NewBits;
1823 } else { // Input sign bit unknown
1824 KnownZero &= ~NewBits;
1825 KnownOne &= ~NewBits;
1832 unsigned LowBits = Log2_32(BitWidth)+1;
1833 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1838 if (ISD::isZEXTLoad(Op.getNode())) {
1839 LoadSDNode *LD = cast<LoadSDNode>(Op);
1840 EVT VT = LD->getMemoryVT();
1841 unsigned MemBits = VT.getScalarType().getSizeInBits();
1842 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask;
1846 case ISD::ZERO_EXTEND: {
1847 EVT InVT = Op.getOperand(0).getValueType();
1848 unsigned InBits = InVT.getScalarType().getSizeInBits();
1849 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1850 APInt InMask = Mask;
1851 InMask.trunc(InBits);
1852 KnownZero.trunc(InBits);
1853 KnownOne.trunc(InBits);
1854 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1855 KnownZero.zext(BitWidth);
1856 KnownOne.zext(BitWidth);
1857 KnownZero |= NewBits;
1860 case ISD::SIGN_EXTEND: {
1861 EVT InVT = Op.getOperand(0).getValueType();
1862 unsigned InBits = InVT.getScalarType().getSizeInBits();
1863 APInt InSignBit = APInt::getSignBit(InBits);
1864 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1865 APInt InMask = Mask;
1866 InMask.trunc(InBits);
1868 // If any of the sign extended bits are demanded, we know that the sign
1869 // bit is demanded. Temporarily set this bit in the mask for our callee.
1870 if (NewBits.getBoolValue())
1871 InMask |= InSignBit;
1873 KnownZero.trunc(InBits);
1874 KnownOne.trunc(InBits);
1875 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1877 // Note if the sign bit is known to be zero or one.
1878 bool SignBitKnownZero = KnownZero.isNegative();
1879 bool SignBitKnownOne = KnownOne.isNegative();
1880 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1881 "Sign bit can't be known to be both zero and one!");
1883 // If the sign bit wasn't actually demanded by our caller, we don't
1884 // want it set in the KnownZero and KnownOne result values. Reset the
1885 // mask and reapply it to the result values.
1887 InMask.trunc(InBits);
1888 KnownZero &= InMask;
1891 KnownZero.zext(BitWidth);
1892 KnownOne.zext(BitWidth);
1894 // If the sign bit is known zero or one, the top bits match.
1895 if (SignBitKnownZero)
1896 KnownZero |= NewBits;
1897 else if (SignBitKnownOne)
1898 KnownOne |= NewBits;
1901 case ISD::ANY_EXTEND: {
1902 EVT InVT = Op.getOperand(0).getValueType();
1903 unsigned InBits = InVT.getScalarType().getSizeInBits();
1904 APInt InMask = Mask;
1905 InMask.trunc(InBits);
1906 KnownZero.trunc(InBits);
1907 KnownOne.trunc(InBits);
1908 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1909 KnownZero.zext(BitWidth);
1910 KnownOne.zext(BitWidth);
1913 case ISD::TRUNCATE: {
1914 EVT InVT = Op.getOperand(0).getValueType();
1915 unsigned InBits = InVT.getScalarType().getSizeInBits();
1916 APInt InMask = Mask;
1917 InMask.zext(InBits);
1918 KnownZero.zext(InBits);
1919 KnownOne.zext(InBits);
1920 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1921 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1922 KnownZero.trunc(BitWidth);
1923 KnownOne.trunc(BitWidth);
1926 case ISD::AssertZext: {
1927 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1928 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1929 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
1931 KnownZero |= (~InMask) & Mask;
1935 // All bits are zero except the low bit.
1936 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1940 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
1941 // We know that the top bits of C-X are clear if X contains less bits
1942 // than C (i.e. no wrap-around can happen). For example, 20-X is
1943 // positive if we can prove that X is >= 0 and < 16.
1944 if (CLHS->getAPIntValue().isNonNegative()) {
1945 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
1946 // NLZ can't be BitWidth with no sign bit
1947 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
1948 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2,
1951 // If all of the MaskV bits are known to be zero, then we know the
1952 // output top bits are zero, because we now know that the output is
1954 if ((KnownZero2 & MaskV) == MaskV) {
1955 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
1956 // Top bits known zero.
1957 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask;
1964 // Output known-0 bits are known if clear or set in both the low clear bits
1965 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
1966 // low 3 bits clear.
1967 APInt Mask2 = APInt::getLowBitsSet(BitWidth,
1968 BitWidth - Mask.countLeadingZeros());
1969 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1970 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1971 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
1973 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1);
1974 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1975 KnownZeroOut = std::min(KnownZeroOut,
1976 KnownZero2.countTrailingOnes());
1978 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
1982 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1983 const APInt &RA = Rem->getAPIntValue().abs();
1984 if (RA.isPowerOf2()) {
1985 APInt LowBits = RA - 1;
1986 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
1987 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1);
1989 // The low bits of the first operand are unchanged by the srem.
1990 KnownZero = KnownZero2 & LowBits;
1991 KnownOne = KnownOne2 & LowBits;
1993 // If the first operand is non-negative or has all low bits zero, then
1994 // the upper bits are all zero.
1995 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
1996 KnownZero |= ~LowBits;
1998 // If the first operand is negative and not all low bits are zero, then
1999 // the upper bits are all one.
2000 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0))
2001 KnownOne |= ~LowBits;
2006 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2011 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2012 const APInt &RA = Rem->getAPIntValue();
2013 if (RA.isPowerOf2()) {
2014 APInt LowBits = (RA - 1);
2015 APInt Mask2 = LowBits & Mask;
2016 KnownZero |= ~LowBits & Mask;
2017 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1);
2018 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2023 // Since the result is less than or equal to either operand, any leading
2024 // zero bits in either operand must also exist in the result.
2025 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
2026 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne,
2028 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2,
2031 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
2032 KnownZero2.countLeadingOnes());
2034 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
2038 // Allow the target to implement this method for its nodes.
2039 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) {
2040 case ISD::INTRINSIC_WO_CHAIN:
2041 case ISD::INTRINSIC_W_CHAIN:
2042 case ISD::INTRINSIC_VOID:
2043 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this,
2050 /// ComputeNumSignBits - Return the number of times the sign bit of the
2051 /// register is replicated into the other bits. We know that at least 1 bit
2052 /// is always equal to the sign bit (itself), but other cases can give us
2053 /// information. For example, immediately after an "SRA X, 2", we know that
2054 /// the top 3 bits are all equal to each other, so we return 3.
2055 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
2056 EVT VT = Op.getValueType();
2057 assert(VT.isInteger() && "Invalid VT!");
2058 unsigned VTBits = VT.getScalarType().getSizeInBits();
2060 unsigned FirstAnswer = 1;
2063 return 1; // Limit search depth.
2065 switch (Op.getOpcode()) {
2067 case ISD::AssertSext:
2068 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2069 return VTBits-Tmp+1;
2070 case ISD::AssertZext:
2071 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2074 case ISD::Constant: {
2075 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2076 // If negative, return # leading ones.
2077 if (Val.isNegative())
2078 return Val.countLeadingOnes();
2080 // Return # leading zeros.
2081 return Val.countLeadingZeros();
2084 case ISD::SIGN_EXTEND:
2085 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
2086 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2088 case ISD::SIGN_EXTEND_INREG:
2089 // Max of the input and what this extends.
2091 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits();
2094 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2095 return std::max(Tmp, Tmp2);
2098 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2099 // SRA X, C -> adds C sign bits.
2100 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2101 Tmp += C->getZExtValue();
2102 if (Tmp > VTBits) Tmp = VTBits;
2106 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2107 // shl destroys sign bits.
2108 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2109 if (C->getZExtValue() >= VTBits || // Bad shift.
2110 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
2111 return Tmp - C->getZExtValue();
2116 case ISD::XOR: // NOT is handled here.
2117 // Logical binary ops preserve the number of sign bits at the worst.
2118 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2120 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2121 FirstAnswer = std::min(Tmp, Tmp2);
2122 // We computed what we know about the sign bits as our first
2123 // answer. Now proceed to the generic code that uses
2124 // ComputeMaskedBits, and pick whichever answer is better.
2129 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2130 if (Tmp == 1) return 1; // Early out.
2131 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2132 return std::min(Tmp, Tmp2);
2140 if (Op.getResNo() != 1)
2142 // The boolean result conforms to getBooleanContents. Fall through.
2144 // If setcc returns 0/-1, all bits are sign bits.
2145 if (TLI.getBooleanContents() ==
2146 TargetLowering::ZeroOrNegativeOneBooleanContent)
2151 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2152 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2154 // Handle rotate right by N like a rotate left by 32-N.
2155 if (Op.getOpcode() == ISD::ROTR)
2156 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2158 // If we aren't rotating out all of the known-in sign bits, return the
2159 // number that are left. This handles rotl(sext(x), 1) for example.
2160 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2161 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2165 // Add can have at most one carry bit. Thus we know that the output
2166 // is, at worst, one more bit than the inputs.
2167 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2168 if (Tmp == 1) return 1; // Early out.
2170 // Special case decrementing a value (ADD X, -1):
2171 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2172 if (CRHS->isAllOnesValue()) {
2173 APInt KnownZero, KnownOne;
2174 APInt Mask = APInt::getAllOnesValue(VTBits);
2175 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
2177 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2179 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2182 // If we are subtracting one from a positive number, there is no carry
2183 // out of the result.
2184 if (KnownZero.isNegative())
2188 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2189 if (Tmp2 == 1) return 1;
2190 return std::min(Tmp, Tmp2)-1;
2194 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2195 if (Tmp2 == 1) return 1;
2198 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2199 if (CLHS->isNullValue()) {
2200 APInt KnownZero, KnownOne;
2201 APInt Mask = APInt::getAllOnesValue(VTBits);
2202 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
2203 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2205 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2208 // If the input is known to be positive (the sign bit is known clear),
2209 // the output of the NEG has the same number of sign bits as the input.
2210 if (KnownZero.isNegative())
2213 // Otherwise, we treat this like a SUB.
2216 // Sub can have at most one carry bit. Thus we know that the output
2217 // is, at worst, one more bit than the inputs.
2218 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2219 if (Tmp == 1) return 1; // Early out.
2220 return std::min(Tmp, Tmp2)-1;
2223 // FIXME: it's tricky to do anything useful for this, but it is an important
2224 // case for targets like X86.
2228 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2229 if (Op.getOpcode() == ISD::LOAD) {
2230 LoadSDNode *LD = cast<LoadSDNode>(Op);
2231 unsigned ExtType = LD->getExtensionType();
2234 case ISD::SEXTLOAD: // '17' bits known
2235 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2236 return VTBits-Tmp+1;
2237 case ISD::ZEXTLOAD: // '16' bits known
2238 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2243 // Allow the target to implement this method for its nodes.
2244 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2245 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2246 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2247 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2248 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2249 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2252 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2253 // use this information.
2254 APInt KnownZero, KnownOne;
2255 APInt Mask = APInt::getAllOnesValue(VTBits);
2256 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
2258 if (KnownZero.isNegative()) { // sign bit is 0
2260 } else if (KnownOne.isNegative()) { // sign bit is 1;
2267 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2268 // the number of identical bits in the top of the input value.
2270 Mask <<= Mask.getBitWidth()-VTBits;
2271 // Return # leading zeros. We use 'min' here in case Val was zero before
2272 // shifting. We don't want to return '64' as for an i32 "0".
2273 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2276 bool SelectionDAG::isKnownNeverNaN(SDValue Op) const {
2277 // If we're told that NaNs won't happen, assume they won't.
2281 // If the value is a constant, we can obviously see if it is a NaN or not.
2282 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2283 return !C->getValueAPF().isNaN();
2285 // TODO: Recognize more cases here.
2290 bool SelectionDAG::isKnownNeverZero(SDValue Op) const {
2291 // If the value is a constant, we can obviously see if it is a zero or not.
2292 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2293 return !C->isZero();
2295 // TODO: Recognize more cases here.
2300 bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const {
2301 // Check the obvious case.
2302 if (A == B) return true;
2304 // For for negative and positive zero.
2305 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A))
2306 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B))
2307 if (CA->isZero() && CB->isZero()) return true;
2309 // Otherwise they may not be equal.
2313 bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const {
2314 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op);
2315 if (!GA) return false;
2316 if (GA->getOffset() != 0) return false;
2317 const GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal());
2318 if (!GV) return false;
2319 return MF->getMMI().hasDebugInfo();
2323 /// getNode - Gets or creates the specified node.
2325 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) {
2326 FoldingSetNodeID ID;
2327 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2329 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2330 return SDValue(E, 0);
2332 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT));
2333 CSEMap.InsertNode(N, IP);
2335 AllNodes.push_back(N);
2339 return SDValue(N, 0);
2342 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
2343 EVT VT, SDValue Operand) {
2344 // Constant fold unary operations with an integer constant operand.
2345 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2346 const APInt &Val = C->getAPIntValue();
2349 case ISD::SIGN_EXTEND:
2350 return getConstant(APInt(Val).sextOrTrunc(VT.getSizeInBits()), VT);
2351 case ISD::ANY_EXTEND:
2352 case ISD::ZERO_EXTEND:
2354 return getConstant(APInt(Val).zextOrTrunc(VT.getSizeInBits()), VT);
2355 case ISD::UINT_TO_FP:
2356 case ISD::SINT_TO_FP: {
2357 const uint64_t zero[] = {0, 0};
2358 // No compile time operations on ppcf128.
2359 if (VT == MVT::ppcf128) break;
2360 APFloat apf = APFloat(APInt(VT.getSizeInBits(), 2, zero));
2361 (void)apf.convertFromAPInt(Val,
2362 Opcode==ISD::SINT_TO_FP,
2363 APFloat::rmNearestTiesToEven);
2364 return getConstantFP(apf, VT);
2366 case ISD::BIT_CONVERT:
2367 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2368 return getConstantFP(Val.bitsToFloat(), VT);
2369 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2370 return getConstantFP(Val.bitsToDouble(), VT);
2373 return getConstant(Val.byteSwap(), VT);
2375 return getConstant(Val.countPopulation(), VT);
2377 return getConstant(Val.countLeadingZeros(), VT);
2379 return getConstant(Val.countTrailingZeros(), VT);
2383 // Constant fold unary operations with a floating point constant operand.
2384 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2385 APFloat V = C->getValueAPF(); // make copy
2386 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) {
2390 return getConstantFP(V, VT);
2393 return getConstantFP(V, VT);
2395 case ISD::FP_EXTEND: {
2397 // This can return overflow, underflow, or inexact; we don't care.
2398 // FIXME need to be more flexible about rounding mode.
2399 (void)V.convert(*EVTToAPFloatSemantics(VT),
2400 APFloat::rmNearestTiesToEven, &ignored);
2401 return getConstantFP(V, VT);
2403 case ISD::FP_TO_SINT:
2404 case ISD::FP_TO_UINT: {
2407 assert(integerPartWidth >= 64);
2408 // FIXME need to be more flexible about rounding mode.
2409 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2410 Opcode==ISD::FP_TO_SINT,
2411 APFloat::rmTowardZero, &ignored);
2412 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2414 APInt api(VT.getSizeInBits(), 2, x);
2415 return getConstant(api, VT);
2417 case ISD::BIT_CONVERT:
2418 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2419 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2420 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2421 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2427 unsigned OpOpcode = Operand.getNode()->getOpcode();
2429 case ISD::TokenFactor:
2430 case ISD::MERGE_VALUES:
2431 case ISD::CONCAT_VECTORS:
2432 return Operand; // Factor, merge or concat of one node? No need.
2433 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
2434 case ISD::FP_EXTEND:
2435 assert(VT.isFloatingPoint() &&
2436 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2437 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2438 assert((!VT.isVector() ||
2439 VT.getVectorNumElements() ==
2440 Operand.getValueType().getVectorNumElements()) &&
2441 "Vector element count mismatch!");
2442 if (Operand.getOpcode() == ISD::UNDEF)
2443 return getUNDEF(VT);
2445 case ISD::SIGN_EXTEND:
2446 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2447 "Invalid SIGN_EXTEND!");
2448 if (Operand.getValueType() == VT) return Operand; // noop extension
2449 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2450 "Invalid sext node, dst < src!");
2451 assert((!VT.isVector() ||
2452 VT.getVectorNumElements() ==
2453 Operand.getValueType().getVectorNumElements()) &&
2454 "Vector element count mismatch!");
2455 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2456 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2458 case ISD::ZERO_EXTEND:
2459 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2460 "Invalid ZERO_EXTEND!");
2461 if (Operand.getValueType() == VT) return Operand; // noop extension
2462 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2463 "Invalid zext node, dst < src!");
2464 assert((!VT.isVector() ||
2465 VT.getVectorNumElements() ==
2466 Operand.getValueType().getVectorNumElements()) &&
2467 "Vector element count mismatch!");
2468 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2469 return getNode(ISD::ZERO_EXTEND, DL, VT,
2470 Operand.getNode()->getOperand(0));
2472 case ISD::ANY_EXTEND:
2473 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2474 "Invalid ANY_EXTEND!");
2475 if (Operand.getValueType() == VT) return Operand; // noop extension
2476 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2477 "Invalid anyext node, dst < src!");
2478 assert((!VT.isVector() ||
2479 VT.getVectorNumElements() ==
2480 Operand.getValueType().getVectorNumElements()) &&
2481 "Vector element count mismatch!");
2483 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2484 OpOpcode == ISD::ANY_EXTEND)
2485 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2486 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2488 // (ext (trunx x)) -> x
2489 if (OpOpcode == ISD::TRUNCATE) {
2490 SDValue OpOp = Operand.getNode()->getOperand(0);
2491 if (OpOp.getValueType() == VT)
2496 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2497 "Invalid TRUNCATE!");
2498 if (Operand.getValueType() == VT) return Operand; // noop truncate
2499 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) &&
2500 "Invalid truncate node, src < dst!");
2501 assert((!VT.isVector() ||
2502 VT.getVectorNumElements() ==
2503 Operand.getValueType().getVectorNumElements()) &&
2504 "Vector element count mismatch!");
2505 if (OpOpcode == ISD::TRUNCATE)
2506 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2507 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2508 OpOpcode == ISD::ANY_EXTEND) {
2509 // If the source is smaller than the dest, we still need an extend.
2510 if (Operand.getNode()->getOperand(0).getValueType().getScalarType()
2511 .bitsLT(VT.getScalarType()))
2512 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2513 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2514 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2516 return Operand.getNode()->getOperand(0);
2519 case ISD::BIT_CONVERT:
2520 // Basic sanity checking.
2521 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2522 && "Cannot BIT_CONVERT between types of different sizes!");
2523 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2524 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x)
2525 return getNode(ISD::BIT_CONVERT, DL, VT, Operand.getOperand(0));
2526 if (OpOpcode == ISD::UNDEF)
2527 return getUNDEF(VT);
2529 case ISD::SCALAR_TO_VECTOR:
2530 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2531 (VT.getVectorElementType() == Operand.getValueType() ||
2532 (VT.getVectorElementType().isInteger() &&
2533 Operand.getValueType().isInteger() &&
2534 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
2535 "Illegal SCALAR_TO_VECTOR node!");
2536 if (OpOpcode == ISD::UNDEF)
2537 return getUNDEF(VT);
2538 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2539 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2540 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2541 Operand.getConstantOperandVal(1) == 0 &&
2542 Operand.getOperand(0).getValueType() == VT)
2543 return Operand.getOperand(0);
2546 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
2547 if (UnsafeFPMath && OpOpcode == ISD::FSUB)
2548 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
2549 Operand.getNode()->getOperand(0));
2550 if (OpOpcode == ISD::FNEG) // --X -> X
2551 return Operand.getNode()->getOperand(0);
2554 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2555 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
2560 SDVTList VTs = getVTList(VT);
2561 if (VT != MVT::Flag) { // Don't CSE flag producing nodes
2562 FoldingSetNodeID ID;
2563 SDValue Ops[1] = { Operand };
2564 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2566 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2567 return SDValue(E, 0);
2569 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2570 CSEMap.InsertNode(N, IP);
2572 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2575 AllNodes.push_back(N);
2579 return SDValue(N, 0);
2582 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2584 ConstantSDNode *Cst1,
2585 ConstantSDNode *Cst2) {
2586 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
2589 case ISD::ADD: return getConstant(C1 + C2, VT);
2590 case ISD::SUB: return getConstant(C1 - C2, VT);
2591 case ISD::MUL: return getConstant(C1 * C2, VT);
2593 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2596 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2599 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2602 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2604 case ISD::AND: return getConstant(C1 & C2, VT);
2605 case ISD::OR: return getConstant(C1 | C2, VT);
2606 case ISD::XOR: return getConstant(C1 ^ C2, VT);
2607 case ISD::SHL: return getConstant(C1 << C2, VT);
2608 case ISD::SRL: return getConstant(C1.lshr(C2), VT);
2609 case ISD::SRA: return getConstant(C1.ashr(C2), VT);
2610 case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2611 case ISD::ROTR: return getConstant(C1.rotr(C2), VT);
2618 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2619 SDValue N1, SDValue N2) {
2620 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2621 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2624 case ISD::TokenFactor:
2625 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2626 N2.getValueType() == MVT::Other && "Invalid token factor!");
2627 // Fold trivial token factors.
2628 if (N1.getOpcode() == ISD::EntryToken) return N2;
2629 if (N2.getOpcode() == ISD::EntryToken) return N1;
2630 if (N1 == N2) return N1;
2632 case ISD::CONCAT_VECTORS:
2633 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2634 // one big BUILD_VECTOR.
2635 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2636 N2.getOpcode() == ISD::BUILD_VECTOR) {
2637 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
2638 N1.getNode()->op_end());
2639 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
2640 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2644 assert(VT.isInteger() && "This operator does not apply to FP types!");
2645 assert(N1.getValueType() == N2.getValueType() &&
2646 N1.getValueType() == VT && "Binary operator types must match!");
2647 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2648 // worth handling here.
2649 if (N2C && N2C->isNullValue())
2651 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2658 assert(VT.isInteger() && "This operator does not apply to FP types!");
2659 assert(N1.getValueType() == N2.getValueType() &&
2660 N1.getValueType() == VT && "Binary operator types must match!");
2661 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2662 // it's worth handling here.
2663 if (N2C && N2C->isNullValue())
2673 assert(VT.isInteger() && "This operator does not apply to FP types!");
2674 assert(N1.getValueType() == N2.getValueType() &&
2675 N1.getValueType() == VT && "Binary operator types must match!");
2683 if (Opcode == ISD::FADD) {
2685 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
2686 if (CFP->getValueAPF().isZero())
2689 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2690 if (CFP->getValueAPF().isZero())
2692 } else if (Opcode == ISD::FSUB) {
2694 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2695 if (CFP->getValueAPF().isZero())
2699 assert(VT.isFloatingPoint() && "This operator only applies to FP types!");
2700 assert(N1.getValueType() == N2.getValueType() &&
2701 N1.getValueType() == VT && "Binary operator types must match!");
2703 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2704 assert(N1.getValueType() == VT &&
2705 N1.getValueType().isFloatingPoint() &&
2706 N2.getValueType().isFloatingPoint() &&
2707 "Invalid FCOPYSIGN!");
2714 assert(VT == N1.getValueType() &&
2715 "Shift operators return type must be the same as their first arg");
2716 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2717 "Shifts only work on integers");
2719 // Always fold shifts of i1 values so the code generator doesn't need to
2720 // handle them. Since we know the size of the shift has to be less than the
2721 // size of the value, the shift/rotate count is guaranteed to be zero.
2724 if (N2C && N2C->isNullValue())
2727 case ISD::FP_ROUND_INREG: {
2728 EVT EVT = cast<VTSDNode>(N2)->getVT();
2729 assert(VT == N1.getValueType() && "Not an inreg round!");
2730 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2731 "Cannot FP_ROUND_INREG integer types");
2732 assert(EVT.isVector() == VT.isVector() &&
2733 "FP_ROUND_INREG type should be vector iff the operand "
2735 assert((!EVT.isVector() ||
2736 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2737 "Vector element counts must match in FP_ROUND_INREG");
2738 assert(EVT.bitsLE(VT) && "Not rounding down!");
2739 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2743 assert(VT.isFloatingPoint() &&
2744 N1.getValueType().isFloatingPoint() &&
2745 VT.bitsLE(N1.getValueType()) &&
2746 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2747 if (N1.getValueType() == VT) return N1; // noop conversion.
2749 case ISD::AssertSext:
2750 case ISD::AssertZext: {
2751 EVT EVT = cast<VTSDNode>(N2)->getVT();
2752 assert(VT == N1.getValueType() && "Not an inreg extend!");
2753 assert(VT.isInteger() && EVT.isInteger() &&
2754 "Cannot *_EXTEND_INREG FP types");
2755 assert(!EVT.isVector() &&
2756 "AssertSExt/AssertZExt type should be the vector element type "
2757 "rather than the vector type!");
2758 assert(EVT.bitsLE(VT) && "Not extending!");
2759 if (VT == EVT) return N1; // noop assertion.
2762 case ISD::SIGN_EXTEND_INREG: {
2763 EVT EVT = cast<VTSDNode>(N2)->getVT();
2764 assert(VT == N1.getValueType() && "Not an inreg extend!");
2765 assert(VT.isInteger() && EVT.isInteger() &&
2766 "Cannot *_EXTEND_INREG FP types");
2767 assert(EVT.isVector() == VT.isVector() &&
2768 "SIGN_EXTEND_INREG type should be vector iff the operand "
2770 assert((!EVT.isVector() ||
2771 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2772 "Vector element counts must match in SIGN_EXTEND_INREG");
2773 assert(EVT.bitsLE(VT) && "Not extending!");
2774 if (EVT == VT) return N1; // Not actually extending
2777 APInt Val = N1C->getAPIntValue();
2778 unsigned FromBits = EVT.getScalarType().getSizeInBits();
2779 Val <<= Val.getBitWidth()-FromBits;
2780 Val = Val.ashr(Val.getBitWidth()-FromBits);
2781 return getConstant(Val, VT);
2785 case ISD::EXTRACT_VECTOR_ELT:
2786 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2787 if (N1.getOpcode() == ISD::UNDEF)
2788 return getUNDEF(VT);
2790 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2791 // expanding copies of large vectors from registers.
2793 N1.getOpcode() == ISD::CONCAT_VECTORS &&
2794 N1.getNumOperands() > 0) {
2796 N1.getOperand(0).getValueType().getVectorNumElements();
2797 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
2798 N1.getOperand(N2C->getZExtValue() / Factor),
2799 getConstant(N2C->getZExtValue() % Factor,
2800 N2.getValueType()));
2803 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2804 // expanding large vector constants.
2805 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
2806 SDValue Elt = N1.getOperand(N2C->getZExtValue());
2807 EVT VEltTy = N1.getValueType().getVectorElementType();
2808 if (Elt.getValueType() != VEltTy) {
2809 // If the vector element type is not legal, the BUILD_VECTOR operands
2810 // are promoted and implicitly truncated. Make that explicit here.
2811 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt);
2814 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT
2815 // result is implicitly extended.
2816 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt);
2821 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2822 // operations are lowered to scalars.
2823 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2824 // If the indices are the same, return the inserted element else
2825 // if the indices are known different, extract the element from
2826 // the original vector.
2827 SDValue N1Op2 = N1.getOperand(2);
2828 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode());
2830 if (N1Op2C && N2C) {
2831 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) {
2832 if (VT == N1.getOperand(1).getValueType())
2833 return N1.getOperand(1);
2835 return getSExtOrTrunc(N1.getOperand(1), DL, VT);
2838 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
2842 case ISD::EXTRACT_ELEMENT:
2843 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
2844 assert(!N1.getValueType().isVector() && !VT.isVector() &&
2845 (N1.getValueType().isInteger() == VT.isInteger()) &&
2846 "Wrong types for EXTRACT_ELEMENT!");
2848 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2849 // 64-bit integers into 32-bit parts. Instead of building the extract of
2850 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2851 if (N1.getOpcode() == ISD::BUILD_PAIR)
2852 return N1.getOperand(N2C->getZExtValue());
2854 // EXTRACT_ELEMENT of a constant int is also very common.
2855 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2856 unsigned ElementSize = VT.getSizeInBits();
2857 unsigned Shift = ElementSize * N2C->getZExtValue();
2858 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2859 return getConstant(ShiftedVal.trunc(ElementSize), VT);
2862 case ISD::EXTRACT_SUBVECTOR:
2863 if (N1.getValueType() == VT) // Trivial extraction.
2870 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
2871 if (SV.getNode()) return SV;
2872 } else { // Cannonicalize constant to RHS if commutative
2873 if (isCommutativeBinOp(Opcode)) {
2874 std::swap(N1C, N2C);
2880 // Constant fold FP operations.
2881 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
2882 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
2884 if (!N2CFP && isCommutativeBinOp(Opcode)) {
2885 // Cannonicalize constant to RHS if commutative
2886 std::swap(N1CFP, N2CFP);
2888 } else if (N2CFP && VT != MVT::ppcf128) {
2889 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
2890 APFloat::opStatus s;
2893 s = V1.add(V2, APFloat::rmNearestTiesToEven);
2894 if (s != APFloat::opInvalidOp)
2895 return getConstantFP(V1, VT);
2898 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
2899 if (s!=APFloat::opInvalidOp)
2900 return getConstantFP(V1, VT);
2903 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
2904 if (s!=APFloat::opInvalidOp)
2905 return getConstantFP(V1, VT);
2908 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
2909 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2910 return getConstantFP(V1, VT);
2913 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
2914 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2915 return getConstantFP(V1, VT);
2917 case ISD::FCOPYSIGN:
2919 return getConstantFP(V1, VT);
2925 // Canonicalize an UNDEF to the RHS, even over a constant.
2926 if (N1.getOpcode() == ISD::UNDEF) {
2927 if (isCommutativeBinOp(Opcode)) {
2931 case ISD::FP_ROUND_INREG:
2932 case ISD::SIGN_EXTEND_INREG:
2938 return N1; // fold op(undef, arg2) -> undef
2946 return getConstant(0, VT); // fold op(undef, arg2) -> 0
2947 // For vectors, we can't easily build an all zero vector, just return
2954 // Fold a bunch of operators when the RHS is undef.
2955 if (N2.getOpcode() == ISD::UNDEF) {
2958 if (N1.getOpcode() == ISD::UNDEF)
2959 // Handle undef ^ undef -> 0 special case. This is a common
2961 return getConstant(0, VT);
2971 return N2; // fold op(arg1, undef) -> undef
2985 return getConstant(0, VT); // fold op(arg1, undef) -> 0
2986 // For vectors, we can't easily build an all zero vector, just return
2991 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
2992 // For vectors, we can't easily build an all one vector, just return
3000 // Memoize this node if possible.
3002 SDVTList VTs = getVTList(VT);
3003 if (VT != MVT::Flag) {
3004 SDValue Ops[] = { N1, N2 };
3005 FoldingSetNodeID ID;
3006 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
3008 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3009 return SDValue(E, 0);
3011 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
3012 CSEMap.InsertNode(N, IP);
3014 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
3017 AllNodes.push_back(N);
3021 return SDValue(N, 0);
3024 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3025 SDValue N1, SDValue N2, SDValue N3) {
3026 // Perform various simplifications.
3027 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
3029 case ISD::CONCAT_VECTORS:
3030 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
3031 // one big BUILD_VECTOR.
3032 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
3033 N2.getOpcode() == ISD::BUILD_VECTOR &&
3034 N3.getOpcode() == ISD::BUILD_VECTOR) {
3035 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
3036 N1.getNode()->op_end());
3037 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
3038 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end());
3039 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
3043 // Use FoldSetCC to simplify SETCC's.
3044 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
3045 if (Simp.getNode()) return Simp;
3050 if (N1C->getZExtValue())
3051 return N2; // select true, X, Y -> X
3053 return N3; // select false, X, Y -> Y
3056 if (N2 == N3) return N2; // select C, X, X -> X
3058 case ISD::VECTOR_SHUFFLE:
3059 llvm_unreachable("should use getVectorShuffle constructor!");
3061 case ISD::BIT_CONVERT:
3062 // Fold bit_convert nodes from a type to themselves.
3063 if (N1.getValueType() == VT)
3068 // Memoize node if it doesn't produce a flag.
3070 SDVTList VTs = getVTList(VT);
3071 if (VT != MVT::Flag) {
3072 SDValue Ops[] = { N1, N2, N3 };
3073 FoldingSetNodeID ID;
3074 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3076 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3077 return SDValue(E, 0);
3079 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3080 CSEMap.InsertNode(N, IP);
3082 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3085 AllNodes.push_back(N);
3089 return SDValue(N, 0);
3092 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3093 SDValue N1, SDValue N2, SDValue N3,
3095 SDValue Ops[] = { N1, N2, N3, N4 };
3096 return getNode(Opcode, DL, VT, Ops, 4);
3099 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3100 SDValue N1, SDValue N2, SDValue N3,
3101 SDValue N4, SDValue N5) {
3102 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3103 return getNode(Opcode, DL, VT, Ops, 5);
3106 /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
3107 /// the incoming stack arguments to be loaded from the stack.
3108 SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) {
3109 SmallVector<SDValue, 8> ArgChains;
3111 // Include the original chain at the beginning of the list. When this is
3112 // used by target LowerCall hooks, this helps legalize find the
3113 // CALLSEQ_BEGIN node.
3114 ArgChains.push_back(Chain);
3116 // Add a chain value for each stack argument.
3117 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
3118 UE = getEntryNode().getNode()->use_end(); U != UE; ++U)
3119 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
3120 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
3121 if (FI->getIndex() < 0)
3122 ArgChains.push_back(SDValue(L, 1));
3124 // Build a tokenfactor for all the chains.
3125 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other,
3126 &ArgChains[0], ArgChains.size());
3129 /// getMemsetValue - Vectorized representation of the memset value
3131 static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
3133 assert(Value.getOpcode() != ISD::UNDEF);
3135 unsigned NumBits = VT.getScalarType().getSizeInBits();
3136 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
3137 APInt Val = APInt(NumBits, C->getZExtValue() & 255);
3139 for (unsigned i = NumBits; i > 8; i >>= 1) {
3140 Val = (Val << Shift) | Val;
3144 return DAG.getConstant(Val, VT);
3145 return DAG.getConstantFP(APFloat(Val), VT);
3148 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3149 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value);
3151 for (unsigned i = NumBits; i > 8; i >>= 1) {
3152 Value = DAG.getNode(ISD::OR, dl, VT,
3153 DAG.getNode(ISD::SHL, dl, VT, Value,
3154 DAG.getConstant(Shift,
3155 TLI.getShiftAmountTy())),
3163 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
3164 /// used when a memcpy is turned into a memset when the source is a constant
3166 static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG,
3167 const TargetLowering &TLI,
3168 std::string &Str, unsigned Offset) {
3169 // Handle vector with all elements zero.
3172 return DAG.getConstant(0, VT);
3173 else if (VT == MVT::f32 || VT == MVT::f64)
3174 return DAG.getConstantFP(0.0, VT);
3175 else if (VT.isVector()) {
3176 unsigned NumElts = VT.getVectorNumElements();
3177 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
3178 return DAG.getNode(ISD::BIT_CONVERT, dl, VT,
3179 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(),
3182 llvm_unreachable("Expected type!");
3185 assert(!VT.isVector() && "Can't handle vector type here!");
3186 unsigned NumBits = VT.getSizeInBits();
3187 unsigned MSB = NumBits / 8;
3189 if (TLI.isLittleEndian())
3190 Offset = Offset + MSB - 1;
3191 for (unsigned i = 0; i != MSB; ++i) {
3192 Val = (Val << 8) | (unsigned char)Str[Offset];
3193 Offset += TLI.isLittleEndian() ? -1 : 1;
3195 return DAG.getConstant(Val, VT);
3198 /// getMemBasePlusOffset - Returns base and offset node for the
3200 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
3201 SelectionDAG &DAG) {
3202 EVT VT = Base.getValueType();
3203 return DAG.getNode(ISD::ADD, Base.getDebugLoc(),
3204 VT, Base, DAG.getConstant(Offset, VT));
3207 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
3209 static bool isMemSrcFromString(SDValue Src, std::string &Str) {
3210 unsigned SrcDelta = 0;
3211 GlobalAddressSDNode *G = NULL;
3212 if (Src.getOpcode() == ISD::GlobalAddress)
3213 G = cast<GlobalAddressSDNode>(Src);
3214 else if (Src.getOpcode() == ISD::ADD &&
3215 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
3216 Src.getOperand(1).getOpcode() == ISD::Constant) {
3217 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
3218 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
3223 const GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal());
3224 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false))
3230 /// FindOptimalMemOpLowering - Determines the optimial series memory ops
3231 /// to replace the memset / memcpy. Return true if the number of memory ops
3232 /// is below the threshold. It returns the types of the sequence of
3233 /// memory ops to perform memset / memcpy by reference.
3234 static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps,
3235 unsigned Limit, uint64_t Size,
3236 unsigned DstAlign, unsigned SrcAlign,
3237 bool NonScalarIntSafe,
3240 const TargetLowering &TLI) {
3241 assert((SrcAlign == 0 || SrcAlign >= DstAlign) &&
3242 "Expecting memcpy / memset source to meet alignment requirement!");
3243 // If 'SrcAlign' is zero, that means the memory operation does not need load
3244 // the value, i.e. memset or memcpy from constant string. Otherwise, it's
3245 // the inferred alignment of the source. 'DstAlign', on the other hand, is the
3246 // specified alignment of the memory operation. If it is zero, that means
3247 // it's possible to change the alignment of the destination. 'MemcpyStrSrc'
3248 // indicates whether the memcpy source is constant so it does not need to be
3250 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign,
3251 NonScalarIntSafe, MemcpyStrSrc,
3252 DAG.getMachineFunction());
3254 if (VT == MVT::Other) {
3255 if (DstAlign >= TLI.getTargetData()->getPointerPrefAlignment() ||
3256 TLI.allowsUnalignedMemoryAccesses(VT)) {
3257 VT = TLI.getPointerTy();
3259 switch (DstAlign & 7) {
3260 case 0: VT = MVT::i64; break;
3261 case 4: VT = MVT::i32; break;
3262 case 2: VT = MVT::i16; break;
3263 default: VT = MVT::i8; break;
3268 while (!TLI.isTypeLegal(LVT))
3269 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1);
3270 assert(LVT.isInteger());
3276 // If we're optimizing for size, and there is a limit, bump the maximum number
3277 // of operations inserted down to 4. This is a wild guess that approximates
3278 // the size of a call to memcpy or memset (3 arguments + call).
3280 const Function *F = DAG.getMachineFunction().getFunction();
3281 if (F->hasFnAttr(Attribute::OptimizeForSize))
3285 unsigned NumMemOps = 0;
3287 unsigned VTSize = VT.getSizeInBits() / 8;
3288 while (VTSize > Size) {
3289 // For now, only use non-vector load / store's for the left-over pieces.
3290 if (VT.isVector() || VT.isFloatingPoint()) {
3292 while (!TLI.isTypeLegal(VT))
3293 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3294 VTSize = VT.getSizeInBits() / 8;
3296 // This can result in a type that is not legal on the target, e.g.
3297 // 1 or 2 bytes on PPC.
3298 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3303 if (++NumMemOps > Limit)
3305 MemOps.push_back(VT);
3312 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3313 SDValue Chain, SDValue Dst,
3314 SDValue Src, uint64_t Size,
3315 unsigned Align, bool isVol,
3317 MachinePointerInfo DstPtrInfo,
3318 MachinePointerInfo SrcPtrInfo) {
3319 // Turn a memcpy of undef to nop.
3320 if (Src.getOpcode() == ISD::UNDEF)
3323 // Expand memcpy to a series of load and store ops if the size operand falls
3324 // below a certain threshold.
3325 // TODO: In the AlwaysInline case, if the size is big then generate a loop
3326 // rather than maybe a humongous number of loads and stores.
3327 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3328 std::vector<EVT> MemOps;
3329 bool DstAlignCanChange = false;
3330 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
3331 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3332 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3333 DstAlignCanChange = true;
3334 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3335 if (Align > SrcAlign)
3338 bool CopyFromStr = isMemSrcFromString(Src, Str);
3339 bool isZeroStr = CopyFromStr && Str.empty();
3340 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy();
3342 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3343 (DstAlignCanChange ? 0 : Align),
3344 (isZeroStr ? 0 : SrcAlign),
3345 true, CopyFromStr, DAG, TLI))
3348 if (DstAlignCanChange) {
3349 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3350 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3351 if (NewAlign > Align) {
3352 // Give the stack frame object a larger alignment if needed.
3353 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3354 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3359 SmallVector<SDValue, 8> OutChains;
3360 unsigned NumMemOps = MemOps.size();
3361 uint64_t SrcOff = 0, DstOff = 0;
3362 for (unsigned i = 0; i != NumMemOps; ++i) {
3364 unsigned VTSize = VT.getSizeInBits() / 8;
3365 SDValue Value, Store;
3368 (isZeroStr || (VT.isInteger() && !VT.isVector()))) {
3369 // It's unlikely a store of a vector immediate can be done in a single
3370 // instruction. It would require a load from a constantpool first.
3371 // We only handle zero vectors here.
3372 // FIXME: Handle other cases where store of vector immediate is done in
3373 // a single instruction.
3374 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff);
3375 Store = DAG.getStore(Chain, dl, Value,
3376 getMemBasePlusOffset(Dst, DstOff, DAG),
3377 DstPtrInfo.getWithOffset(DstOff), isVol,
3380 // The type might not be legal for the target. This should only happen
3381 // if the type is smaller than a legal type, as on PPC, so the right
3382 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify
3383 // to Load/Store if NVT==VT.
3384 // FIXME does the case above also need this?
3385 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
3386 assert(NVT.bitsGE(VT));
3387 Value = DAG.getExtLoad(ISD::EXTLOAD, NVT, dl, Chain,
3388 getMemBasePlusOffset(Src, SrcOff, DAG),
3389 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false,
3390 MinAlign(SrcAlign, SrcOff));
3391 Store = DAG.getTruncStore(Chain, dl, Value,
3392 getMemBasePlusOffset(Dst, DstOff, DAG),
3393 DstPtrInfo.getWithOffset(DstOff), VT, isVol,
3396 OutChains.push_back(Store);
3401 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3402 &OutChains[0], OutChains.size());
3405 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3406 SDValue Chain, SDValue Dst,
3407 SDValue Src, uint64_t Size,
3408 unsigned Align, bool isVol,
3410 MachinePointerInfo DstPtrInfo,
3411 MachinePointerInfo SrcPtrInfo) {
3412 // Turn a memmove of undef to nop.
3413 if (Src.getOpcode() == ISD::UNDEF)
3416 // Expand memmove to a series of load and store ops if the size operand falls
3417 // below a certain threshold.
3418 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3419 std::vector<EVT> MemOps;
3420 bool DstAlignCanChange = false;
3421 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
3422 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3423 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3424 DstAlignCanChange = true;
3425 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3426 if (Align > SrcAlign)
3428 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove();
3430 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3431 (DstAlignCanChange ? 0 : Align),
3432 SrcAlign, true, false, DAG, TLI))
3435 if (DstAlignCanChange) {
3436 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3437 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3438 if (NewAlign > Align) {
3439 // Give the stack frame object a larger alignment if needed.
3440 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3441 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3446 uint64_t SrcOff = 0, DstOff = 0;
3447 SmallVector<SDValue, 8> LoadValues;
3448 SmallVector<SDValue, 8> LoadChains;
3449 SmallVector<SDValue, 8> OutChains;
3450 unsigned NumMemOps = MemOps.size();
3451 for (unsigned i = 0; i < NumMemOps; i++) {
3453 unsigned VTSize = VT.getSizeInBits() / 8;
3454 SDValue Value, Store;
3456 Value = DAG.getLoad(VT, dl, Chain,
3457 getMemBasePlusOffset(Src, SrcOff, DAG),
3458 SrcPtrInfo.getWithOffset(SrcOff), isVol,
3460 LoadValues.push_back(Value);
3461 LoadChains.push_back(Value.getValue(1));
3464 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3465 &LoadChains[0], LoadChains.size());
3467 for (unsigned i = 0; i < NumMemOps; i++) {
3469 unsigned VTSize = VT.getSizeInBits() / 8;
3470 SDValue Value, Store;
3472 Store = DAG.getStore(Chain, dl, LoadValues[i],
3473 getMemBasePlusOffset(Dst, DstOff, DAG),
3474 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align);
3475 OutChains.push_back(Store);
3479 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3480 &OutChains[0], OutChains.size());
3483 static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl,
3484 SDValue Chain, SDValue Dst,
3485 SDValue Src, uint64_t Size,
3486 unsigned Align, bool isVol,
3487 MachinePointerInfo DstPtrInfo) {
3488 // Turn a memset of undef to nop.
3489 if (Src.getOpcode() == ISD::UNDEF)
3492 // Expand memset to a series of load/store ops if the size operand
3493 // falls below a certain threshold.
3494 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3495 std::vector<EVT> MemOps;
3496 bool DstAlignCanChange = false;
3497 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
3498 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3499 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3500 DstAlignCanChange = true;
3501 bool NonScalarIntSafe =
3502 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue();
3503 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(),
3504 Size, (DstAlignCanChange ? 0 : Align), 0,
3505 NonScalarIntSafe, false, DAG, TLI))
3508 if (DstAlignCanChange) {
3509 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3510 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3511 if (NewAlign > Align) {
3512 // Give the stack frame object a larger alignment if needed.
3513 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3514 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3519 SmallVector<SDValue, 8> OutChains;
3520 uint64_t DstOff = 0;
3521 unsigned NumMemOps = MemOps.size();
3522 for (unsigned i = 0; i < NumMemOps; i++) {
3524 unsigned VTSize = VT.getSizeInBits() / 8;
3525 SDValue Value = getMemsetValue(Src, VT, DAG, dl);
3526 SDValue Store = DAG.getStore(Chain, dl, Value,
3527 getMemBasePlusOffset(Dst, DstOff, DAG),
3528 DstPtrInfo.getWithOffset(DstOff),
3529 isVol, false, Align);
3530 OutChains.push_back(Store);
3534 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3535 &OutChains[0], OutChains.size());
3538 SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst,
3539 SDValue Src, SDValue Size,
3540 unsigned Align, bool isVol, bool AlwaysInline,
3541 MachinePointerInfo DstPtrInfo,
3542 MachinePointerInfo SrcPtrInfo) {
3544 // Check to see if we should lower the memcpy to loads and stores first.
3545 // For cases within the target-specified limits, this is the best choice.
3546 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3548 // Memcpy with size zero? Just return the original chain.
3549 if (ConstantSize->isNullValue())
3552 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3553 ConstantSize->getZExtValue(),Align,
3554 isVol, false, DstPtrInfo, SrcPtrInfo);
3555 if (Result.getNode())
3559 // Then check to see if we should lower the memcpy with target-specific
3560 // code. If the target chooses to do this, this is the next best.
3562 TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align,
3563 isVol, AlwaysInline,
3564 DstPtrInfo, SrcPtrInfo);
3565 if (Result.getNode())
3568 // If we really need inline code and the target declined to provide it,
3569 // use a (potentially long) sequence of loads and stores.
3571 assert(ConstantSize && "AlwaysInline requires a constant size!");
3572 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3573 ConstantSize->getZExtValue(), Align, isVol,
3574 true, DstPtrInfo, SrcPtrInfo);
3577 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc
3578 // memcpy is not guaranteed to be safe. libc memcpys aren't required to
3579 // respect volatile, so they may do things like read or write memory
3580 // beyond the given memory regions. But fixing this isn't easy, and most
3581 // people don't care.
3583 // Emit a library call.
3584 TargetLowering::ArgListTy Args;
3585 TargetLowering::ArgListEntry Entry;
3586 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3587 Entry.Node = Dst; Args.push_back(Entry);
3588 Entry.Node = Src; Args.push_back(Entry);
3589 Entry.Node = Size; Args.push_back(Entry);
3590 // FIXME: pass in DebugLoc
3591 std::pair<SDValue,SDValue> CallResult =
3592 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3593 false, false, false, false, 0,
3594 TLI.getLibcallCallingConv(RTLIB::MEMCPY), false,
3595 /*isReturnValueUsed=*/false,
3596 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY),
3597 TLI.getPointerTy()),
3599 return CallResult.second;
3602 SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst,
3603 SDValue Src, SDValue Size,
3604 unsigned Align, bool isVol,
3605 MachinePointerInfo DstPtrInfo,
3606 MachinePointerInfo SrcPtrInfo) {
3608 // Check to see if we should lower the memmove to loads and stores first.
3609 // For cases within the target-specified limits, this is the best choice.
3610 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3612 // Memmove with size zero? Just return the original chain.
3613 if (ConstantSize->isNullValue())
3617 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
3618 ConstantSize->getZExtValue(), Align, isVol,
3619 false, DstPtrInfo, SrcPtrInfo);
3620 if (Result.getNode())
3624 // Then check to see if we should lower the memmove with target-specific
3625 // code. If the target chooses to do this, this is the next best.
3627 TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3628 DstPtrInfo, SrcPtrInfo);
3629 if (Result.getNode())
3632 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may
3633 // not be safe. See memcpy above for more details.
3635 // Emit a library call.
3636 TargetLowering::ArgListTy Args;
3637 TargetLowering::ArgListEntry Entry;
3638 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3639 Entry.Node = Dst; Args.push_back(Entry);
3640 Entry.Node = Src; Args.push_back(Entry);
3641 Entry.Node = Size; Args.push_back(Entry);
3642 // FIXME: pass in DebugLoc
3643 std::pair<SDValue,SDValue> CallResult =
3644 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3645 false, false, false, false, 0,
3646 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), false,
3647 /*isReturnValueUsed=*/false,
3648 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE),
3649 TLI.getPointerTy()),
3651 return CallResult.second;
3654 SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst,
3655 SDValue Src, SDValue Size,
3656 unsigned Align, bool isVol,
3657 MachinePointerInfo DstPtrInfo) {
3659 // Check to see if we should lower the memset to stores first.
3660 // For cases within the target-specified limits, this is the best choice.
3661 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3663 // Memset with size zero? Just return the original chain.
3664 if (ConstantSize->isNullValue())
3668 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
3669 Align, isVol, DstPtrInfo);
3671 if (Result.getNode())
3675 // Then check to see if we should lower the memset with target-specific
3676 // code. If the target chooses to do this, this is the next best.
3678 TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3680 if (Result.getNode())
3683 // Emit a library call.
3684 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext());
3685 TargetLowering::ArgListTy Args;
3686 TargetLowering::ArgListEntry Entry;
3687 Entry.Node = Dst; Entry.Ty = IntPtrTy;
3688 Args.push_back(Entry);
3689 // Extend or truncate the argument to be an i32 value for the call.
3690 if (Src.getValueType().bitsGT(MVT::i32))
3691 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
3693 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
3695 Entry.Ty = Type::getInt32Ty(*getContext());
3696 Entry.isSExt = true;
3697 Args.push_back(Entry);
3699 Entry.Ty = IntPtrTy;
3700 Entry.isSExt = false;
3701 Args.push_back(Entry);
3702 // FIXME: pass in DebugLoc
3703 std::pair<SDValue,SDValue> CallResult =
3704 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3705 false, false, false, false, 0,
3706 TLI.getLibcallCallingConv(RTLIB::MEMSET), false,
3707 /*isReturnValueUsed=*/false,
3708 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET),
3709 TLI.getPointerTy()),
3711 return CallResult.second;
3714 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3715 SDValue Chain, SDValue Ptr, SDValue Cmp,
3716 SDValue Swp, MachinePointerInfo PtrInfo,
3717 unsigned Alignment) {
3718 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3719 Alignment = getEVTAlignment(MemVT);
3721 MachineFunction &MF = getMachineFunction();
3722 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
3724 // For now, atomics are considered to be volatile always.
3725 Flags |= MachineMemOperand::MOVolatile;
3727 MachineMemOperand *MMO =
3728 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment);
3730 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO);
3733 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3735 SDValue Ptr, SDValue Cmp,
3736 SDValue Swp, MachineMemOperand *MMO) {
3737 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
3738 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3740 EVT VT = Cmp.getValueType();
3742 SDVTList VTs = getVTList(VT, MVT::Other);
3743 FoldingSetNodeID ID;
3744 ID.AddInteger(MemVT.getRawBits());
3745 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3746 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3748 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3749 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3750 return SDValue(E, 0);
3752 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
3753 Ptr, Cmp, Swp, MMO);
3754 CSEMap.InsertNode(N, IP);
3755 AllNodes.push_back(N);
3756 return SDValue(N, 0);
3759 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3761 SDValue Ptr, SDValue Val,
3762 const Value* PtrVal,
3763 unsigned Alignment) {
3764 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3765 Alignment = getEVTAlignment(MemVT);
3767 MachineFunction &MF = getMachineFunction();
3768 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
3770 // For now, atomics are considered to be volatile always.
3771 Flags |= MachineMemOperand::MOVolatile;
3773 MachineMemOperand *MMO =
3774 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
3775 MemVT.getStoreSize(), Alignment);
3777 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO);
3780 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3782 SDValue Ptr, SDValue Val,
3783 MachineMemOperand *MMO) {
3784 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
3785 Opcode == ISD::ATOMIC_LOAD_SUB ||
3786 Opcode == ISD::ATOMIC_LOAD_AND ||
3787 Opcode == ISD::ATOMIC_LOAD_OR ||
3788 Opcode == ISD::ATOMIC_LOAD_XOR ||
3789 Opcode == ISD::ATOMIC_LOAD_NAND ||
3790 Opcode == ISD::ATOMIC_LOAD_MIN ||
3791 Opcode == ISD::ATOMIC_LOAD_MAX ||
3792 Opcode == ISD::ATOMIC_LOAD_UMIN ||
3793 Opcode == ISD::ATOMIC_LOAD_UMAX ||
3794 Opcode == ISD::ATOMIC_SWAP) &&
3795 "Invalid Atomic Op");
3797 EVT VT = Val.getValueType();
3799 SDVTList VTs = getVTList(VT, MVT::Other);
3800 FoldingSetNodeID ID;
3801 ID.AddInteger(MemVT.getRawBits());
3802 SDValue Ops[] = {Chain, Ptr, Val};
3803 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3805 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3806 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3807 return SDValue(E, 0);
3809 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
3811 CSEMap.InsertNode(N, IP);
3812 AllNodes.push_back(N);
3813 return SDValue(N, 0);
3816 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
3817 /// Allowed to return something different (and simpler) if Simplify is true.
3818 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps,
3823 SmallVector<EVT, 4> VTs;
3824 VTs.reserve(NumOps);
3825 for (unsigned i = 0; i < NumOps; ++i)
3826 VTs.push_back(Ops[i].getValueType());
3827 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps),
3832 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl,
3833 const EVT *VTs, unsigned NumVTs,
3834 const SDValue *Ops, unsigned NumOps,
3835 EVT MemVT, MachinePointerInfo PtrInfo,
3836 unsigned Align, bool Vol,
3837 bool ReadMem, bool WriteMem) {
3838 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps,
3839 MemVT, PtrInfo, Align, Vol,
3844 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
3845 const SDValue *Ops, unsigned NumOps,
3846 EVT MemVT, MachinePointerInfo PtrInfo,
3847 unsigned Align, bool Vol,
3848 bool ReadMem, bool WriteMem) {
3849 if (Align == 0) // Ensure that codegen never sees alignment 0
3850 Align = getEVTAlignment(MemVT);
3852 MachineFunction &MF = getMachineFunction();
3855 Flags |= MachineMemOperand::MOStore;
3857 Flags |= MachineMemOperand::MOLoad;
3859 Flags |= MachineMemOperand::MOVolatile;
3860 MachineMemOperand *MMO =
3861 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Align);
3863 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO);
3867 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
3868 const SDValue *Ops, unsigned NumOps,
3869 EVT MemVT, MachineMemOperand *MMO) {
3870 assert((Opcode == ISD::INTRINSIC_VOID ||
3871 Opcode == ISD::INTRINSIC_W_CHAIN ||
3872 Opcode == ISD::PREFETCH ||
3873 (Opcode <= INT_MAX &&
3874 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) &&
3875 "Opcode is not a memory-accessing opcode!");
3877 // Memoize the node unless it returns a flag.
3878 MemIntrinsicSDNode *N;
3879 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3880 FoldingSetNodeID ID;
3881 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3883 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3884 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO);
3885 return SDValue(E, 0);
3888 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
3890 CSEMap.InsertNode(N, IP);
3892 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
3895 AllNodes.push_back(N);
3896 return SDValue(N, 0);
3899 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
3900 /// MachinePointerInfo record from it. This is particularly useful because the
3901 /// code generator has many cases where it doesn't bother passing in a
3902 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
3903 static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) {
3904 // If this is FI+Offset, we can model it.
3905 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr))
3906 return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset);
3908 // If this is (FI+Offset1)+Offset2, we can model it.
3909 if (Ptr.getOpcode() != ISD::ADD ||
3910 !isa<ConstantSDNode>(Ptr.getOperand(1)) ||
3911 !isa<FrameIndexSDNode>(Ptr.getOperand(0)))
3912 return MachinePointerInfo();
3914 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
3915 return MachinePointerInfo::getFixedStack(FI, Offset+
3916 cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue());
3919 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
3920 /// MachinePointerInfo record from it. This is particularly useful because the
3921 /// code generator has many cases where it doesn't bother passing in a
3922 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
3923 static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) {
3924 // If the 'Offset' value isn't a constant, we can't handle this.
3925 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp))
3926 return InferPointerInfo(Ptr, OffsetNode->getSExtValue());
3927 if (OffsetOp.getOpcode() == ISD::UNDEF)
3928 return InferPointerInfo(Ptr);
3929 return MachinePointerInfo();
3934 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
3935 EVT VT, DebugLoc dl, SDValue Chain,
3936 SDValue Ptr, SDValue Offset,
3937 MachinePointerInfo PtrInfo, EVT MemVT,
3938 bool isVolatile, bool isNonTemporal,
3939 unsigned Alignment, const MDNode *TBAAInfo) {
3940 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3941 Alignment = getEVTAlignment(VT);
3943 unsigned Flags = MachineMemOperand::MOLoad;
3945 Flags |= MachineMemOperand::MOVolatile;
3947 Flags |= MachineMemOperand::MONonTemporal;
3949 // If we don't have a PtrInfo, infer the trivial frame index case to simplify
3952 PtrInfo = InferPointerInfo(Ptr, Offset);
3954 MachineFunction &MF = getMachineFunction();
3955 MachineMemOperand *MMO =
3956 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment,
3958 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO);
3962 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
3963 EVT VT, DebugLoc dl, SDValue Chain,
3964 SDValue Ptr, SDValue Offset, EVT MemVT,
3965 MachineMemOperand *MMO) {
3967 ExtType = ISD::NON_EXTLOAD;
3968 } else if (ExtType == ISD::NON_EXTLOAD) {
3969 assert(VT == MemVT && "Non-extending load from different memory type!");
3972 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) &&
3973 "Should only be an extending load, not truncating!");
3974 assert(VT.isInteger() == MemVT.isInteger() &&
3975 "Cannot convert from FP to Int or Int -> FP!");
3976 assert(VT.isVector() == MemVT.isVector() &&
3977 "Cannot use trunc store to convert to or from a vector!");
3978 assert((!VT.isVector() ||
3979 VT.getVectorNumElements() == MemVT.getVectorNumElements()) &&
3980 "Cannot use trunc store to change the number of vector elements!");
3983 bool Indexed = AM != ISD::UNINDEXED;
3984 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
3985 "Unindexed load with an offset!");
3987 SDVTList VTs = Indexed ?
3988 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
3989 SDValue Ops[] = { Chain, Ptr, Offset };
3990 FoldingSetNodeID ID;
3991 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
3992 ID.AddInteger(MemVT.getRawBits());
3993 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(),
3994 MMO->isNonTemporal()));
3996 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3997 cast<LoadSDNode>(E)->refineAlignment(MMO);
3998 return SDValue(E, 0);
4000 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType,
4002 CSEMap.InsertNode(N, IP);
4003 AllNodes.push_back(N);
4004 return SDValue(N, 0);
4007 SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl,
4008 SDValue Chain, SDValue Ptr,
4009 MachinePointerInfo PtrInfo,
4010 bool isVolatile, bool isNonTemporal,
4011 unsigned Alignment, const MDNode *TBAAInfo) {
4012 SDValue Undef = getUNDEF(Ptr.getValueType());
4013 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
4014 PtrInfo, VT, isVolatile, isNonTemporal, Alignment, TBAAInfo);
4017 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, EVT VT, DebugLoc dl,
4018 SDValue Chain, SDValue Ptr,
4019 MachinePointerInfo PtrInfo, EVT MemVT,
4020 bool isVolatile, bool isNonTemporal,
4021 unsigned Alignment, const MDNode *TBAAInfo) {
4022 SDValue Undef = getUNDEF(Ptr.getValueType());
4023 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
4024 PtrInfo, MemVT, isVolatile, isNonTemporal, Alignment,
4030 SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base,
4031 SDValue Offset, ISD::MemIndexedMode AM) {
4032 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
4033 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
4034 "Load is already a indexed load!");
4035 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl,
4036 LD->getChain(), Base, Offset, LD->getPointerInfo(),
4038 LD->isVolatile(), LD->isNonTemporal(), LD->getAlignment());
4041 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4042 SDValue Ptr, MachinePointerInfo PtrInfo,
4043 bool isVolatile, bool isNonTemporal,
4044 unsigned Alignment, const MDNode *TBAAInfo) {
4045 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4046 Alignment = getEVTAlignment(Val.getValueType());
4048 unsigned Flags = MachineMemOperand::MOStore;
4050 Flags |= MachineMemOperand::MOVolatile;
4052 Flags |= MachineMemOperand::MONonTemporal;
4055 PtrInfo = InferPointerInfo(Ptr);
4057 MachineFunction &MF = getMachineFunction();
4058 MachineMemOperand *MMO =
4059 MF.getMachineMemOperand(PtrInfo, Flags,
4060 Val.getValueType().getStoreSize(), Alignment,
4063 return getStore(Chain, dl, Val, Ptr, MMO);
4066 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4067 SDValue Ptr, MachineMemOperand *MMO) {
4068 EVT VT = Val.getValueType();
4069 SDVTList VTs = getVTList(MVT::Other);
4070 SDValue Undef = getUNDEF(Ptr.getValueType());
4071 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4072 FoldingSetNodeID ID;
4073 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4074 ID.AddInteger(VT.getRawBits());
4075 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
4076 MMO->isNonTemporal()));
4078 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4079 cast<StoreSDNode>(E)->refineAlignment(MMO);
4080 return SDValue(E, 0);
4082 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4084 CSEMap.InsertNode(N, IP);
4085 AllNodes.push_back(N);
4086 return SDValue(N, 0);
4089 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4090 SDValue Ptr, MachinePointerInfo PtrInfo,
4091 EVT SVT,bool isVolatile, bool isNonTemporal,
4093 const MDNode *TBAAInfo) {
4094 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4095 Alignment = getEVTAlignment(SVT);
4097 unsigned Flags = MachineMemOperand::MOStore;
4099 Flags |= MachineMemOperand::MOVolatile;
4101 Flags |= MachineMemOperand::MONonTemporal;
4104 PtrInfo = InferPointerInfo(Ptr);
4106 MachineFunction &MF = getMachineFunction();
4107 MachineMemOperand *MMO =
4108 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment,
4111 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO);
4114 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4115 SDValue Ptr, EVT SVT,
4116 MachineMemOperand *MMO) {
4117 EVT VT = Val.getValueType();
4120 return getStore(Chain, dl, Val, Ptr, MMO);
4122 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) &&
4123 "Should only be a truncating store, not extending!");
4124 assert(VT.isInteger() == SVT.isInteger() &&
4125 "Can't do FP-INT conversion!");
4126 assert(VT.isVector() == SVT.isVector() &&
4127 "Cannot use trunc store to convert to or from a vector!");
4128 assert((!VT.isVector() ||
4129 VT.getVectorNumElements() == SVT.getVectorNumElements()) &&
4130 "Cannot use trunc store to change the number of vector elements!");
4132 SDVTList VTs = getVTList(MVT::Other);
4133 SDValue Undef = getUNDEF(Ptr.getValueType());
4134 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4135 FoldingSetNodeID ID;
4136 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4137 ID.AddInteger(SVT.getRawBits());
4138 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(),
4139 MMO->isNonTemporal()));
4141 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4142 cast<StoreSDNode>(E)->refineAlignment(MMO);
4143 return SDValue(E, 0);
4145 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4147 CSEMap.InsertNode(N, IP);
4148 AllNodes.push_back(N);
4149 return SDValue(N, 0);
4153 SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base,
4154 SDValue Offset, ISD::MemIndexedMode AM) {
4155 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
4156 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
4157 "Store is already a indexed store!");
4158 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
4159 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
4160 FoldingSetNodeID ID;
4161 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4162 ID.AddInteger(ST->getMemoryVT().getRawBits());
4163 ID.AddInteger(ST->getRawSubclassData());
4165 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4166 return SDValue(E, 0);
4168 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM,
4169 ST->isTruncatingStore(),
4171 ST->getMemOperand());
4172 CSEMap.InsertNode(N, IP);
4173 AllNodes.push_back(N);
4174 return SDValue(N, 0);
4177 SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl,
4178 SDValue Chain, SDValue Ptr,
4181 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) };
4182 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 4);
4185 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4186 const SDUse *Ops, unsigned NumOps) {
4188 case 0: return getNode(Opcode, DL, VT);
4189 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4190 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4191 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4195 // Copy from an SDUse array into an SDValue array for use with
4196 // the regular getNode logic.
4197 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
4198 return getNode(Opcode, DL, VT, &NewOps[0], NumOps);
4201 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4202 const SDValue *Ops, unsigned NumOps) {
4204 case 0: return getNode(Opcode, DL, VT);
4205 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4206 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4207 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4213 case ISD::SELECT_CC: {
4214 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
4215 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
4216 "LHS and RHS of condition must have same type!");
4217 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4218 "True and False arms of SelectCC must have same type!");
4219 assert(Ops[2].getValueType() == VT &&
4220 "select_cc node must be of same type as true and false value!");
4224 assert(NumOps == 5 && "BR_CC takes 5 operands!");
4225 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4226 "LHS/RHS of comparison should match types!");
4233 SDVTList VTs = getVTList(VT);
4235 if (VT != MVT::Flag) {
4236 FoldingSetNodeID ID;
4237 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
4240 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4241 return SDValue(E, 0);
4243 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4244 CSEMap.InsertNode(N, IP);
4246 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4249 AllNodes.push_back(N);
4253 return SDValue(N, 0);
4256 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4257 const std::vector<EVT> &ResultTys,
4258 const SDValue *Ops, unsigned NumOps) {
4259 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()),
4263 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4264 const EVT *VTs, unsigned NumVTs,
4265 const SDValue *Ops, unsigned NumOps) {
4267 return getNode(Opcode, DL, VTs[0], Ops, NumOps);
4268 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps);
4271 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4272 const SDValue *Ops, unsigned NumOps) {
4273 if (VTList.NumVTs == 1)
4274 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps);
4278 // FIXME: figure out how to safely handle things like
4279 // int foo(int x) { return 1 << (x & 255); }
4280 // int bar() { return foo(256); }
4281 case ISD::SRA_PARTS:
4282 case ISD::SRL_PARTS:
4283 case ISD::SHL_PARTS:
4284 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
4285 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
4286 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4287 else if (N3.getOpcode() == ISD::AND)
4288 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
4289 // If the and is only masking out bits that cannot effect the shift,
4290 // eliminate the and.
4291 unsigned NumBits = VT.getScalarType().getSizeInBits()*2;
4292 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
4293 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4299 // Memoize the node unless it returns a flag.
4301 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4302 FoldingSetNodeID ID;
4303 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4305 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4306 return SDValue(E, 0);
4309 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4310 } else if (NumOps == 2) {
4311 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4312 } else if (NumOps == 3) {
4313 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4316 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4318 CSEMap.InsertNode(N, IP);
4321 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4322 } else if (NumOps == 2) {
4323 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4324 } else if (NumOps == 3) {
4325 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4328 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4331 AllNodes.push_back(N);
4335 return SDValue(N, 0);
4338 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) {
4339 return getNode(Opcode, DL, VTList, 0, 0);
4342 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4344 SDValue Ops[] = { N1 };
4345 return getNode(Opcode, DL, VTList, Ops, 1);
4348 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4349 SDValue N1, SDValue N2) {
4350 SDValue Ops[] = { N1, N2 };
4351 return getNode(Opcode, DL, VTList, Ops, 2);
4354 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4355 SDValue N1, SDValue N2, SDValue N3) {
4356 SDValue Ops[] = { N1, N2, N3 };
4357 return getNode(Opcode, DL, VTList, Ops, 3);
4360 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4361 SDValue N1, SDValue N2, SDValue N3,
4363 SDValue Ops[] = { N1, N2, N3, N4 };
4364 return getNode(Opcode, DL, VTList, Ops, 4);
4367 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4368 SDValue N1, SDValue N2, SDValue N3,
4369 SDValue N4, SDValue N5) {
4370 SDValue Ops[] = { N1, N2, N3, N4, N5 };
4371 return getNode(Opcode, DL, VTList, Ops, 5);
4374 SDVTList SelectionDAG::getVTList(EVT VT) {
4375 return makeVTList(SDNode::getValueTypeList(VT), 1);
4378 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
4379 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4380 E = VTList.rend(); I != E; ++I)
4381 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
4384 EVT *Array = Allocator.Allocate<EVT>(2);
4387 SDVTList Result = makeVTList(Array, 2);
4388 VTList.push_back(Result);
4392 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
4393 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4394 E = VTList.rend(); I != E; ++I)
4395 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4399 EVT *Array = Allocator.Allocate<EVT>(3);
4403 SDVTList Result = makeVTList(Array, 3);
4404 VTList.push_back(Result);
4408 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
4409 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4410 E = VTList.rend(); I != E; ++I)
4411 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4412 I->VTs[2] == VT3 && I->VTs[3] == VT4)
4415 EVT *Array = Allocator.Allocate<EVT>(4);
4420 SDVTList Result = makeVTList(Array, 4);
4421 VTList.push_back(Result);
4425 SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) {
4427 case 0: llvm_unreachable("Cannot have nodes without results!");
4428 case 1: return getVTList(VTs[0]);
4429 case 2: return getVTList(VTs[0], VTs[1]);
4430 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
4431 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]);
4435 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4436 E = VTList.rend(); I != E; ++I) {
4437 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
4440 bool NoMatch = false;
4441 for (unsigned i = 2; i != NumVTs; ++i)
4442 if (VTs[i] != I->VTs[i]) {
4450 EVT *Array = Allocator.Allocate<EVT>(NumVTs);
4451 std::copy(VTs, VTs+NumVTs, Array);
4452 SDVTList Result = makeVTList(Array, NumVTs);
4453 VTList.push_back(Result);
4458 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
4459 /// specified operands. If the resultant node already exists in the DAG,
4460 /// this does not modify the specified node, instead it returns the node that
4461 /// already exists. If the resultant node does not exist in the DAG, the
4462 /// input node is returned. As a degenerate case, if you specify the same
4463 /// input operands as the node already has, the input node is returned.
4464 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) {
4465 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
4467 // Check to see if there is no change.
4468 if (Op == N->getOperand(0)) return N;
4470 // See if the modified node already exists.
4471 void *InsertPos = 0;
4472 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
4475 // Nope it doesn't. Remove the node from its current place in the maps.
4477 if (!RemoveNodeFromCSEMaps(N))
4480 // Now we update the operands.
4481 N->OperandList[0].set(Op);
4483 // If this gets put into a CSE map, add it.
4484 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4488 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) {
4489 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
4491 // Check to see if there is no change.
4492 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
4493 return N; // No operands changed, just return the input node.
4495 // See if the modified node already exists.
4496 void *InsertPos = 0;
4497 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
4500 // Nope it doesn't. Remove the node from its current place in the maps.
4502 if (!RemoveNodeFromCSEMaps(N))
4505 // Now we update the operands.
4506 if (N->OperandList[0] != Op1)
4507 N->OperandList[0].set(Op1);
4508 if (N->OperandList[1] != Op2)
4509 N->OperandList[1].set(Op2);
4511 // If this gets put into a CSE map, add it.
4512 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4516 SDNode *SelectionDAG::
4517 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) {
4518 SDValue Ops[] = { Op1, Op2, Op3 };
4519 return UpdateNodeOperands(N, Ops, 3);
4522 SDNode *SelectionDAG::
4523 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
4524 SDValue Op3, SDValue Op4) {
4525 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
4526 return UpdateNodeOperands(N, Ops, 4);
4529 SDNode *SelectionDAG::
4530 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
4531 SDValue Op3, SDValue Op4, SDValue Op5) {
4532 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
4533 return UpdateNodeOperands(N, Ops, 5);
4536 SDNode *SelectionDAG::
4537 UpdateNodeOperands(SDNode *N, const SDValue *Ops, unsigned NumOps) {
4538 assert(N->getNumOperands() == NumOps &&
4539 "Update with wrong number of operands");
4541 // Check to see if there is no change.
4542 bool AnyChange = false;
4543 for (unsigned i = 0; i != NumOps; ++i) {
4544 if (Ops[i] != N->getOperand(i)) {
4550 // No operands changed, just return the input node.
4551 if (!AnyChange) return N;
4553 // See if the modified node already exists.
4554 void *InsertPos = 0;
4555 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
4558 // Nope it doesn't. Remove the node from its current place in the maps.
4560 if (!RemoveNodeFromCSEMaps(N))
4563 // Now we update the operands.
4564 for (unsigned i = 0; i != NumOps; ++i)
4565 if (N->OperandList[i] != Ops[i])
4566 N->OperandList[i].set(Ops[i]);
4568 // If this gets put into a CSE map, add it.
4569 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4573 /// DropOperands - Release the operands and set this node to have
4575 void SDNode::DropOperands() {
4576 // Unlike the code in MorphNodeTo that does this, we don't need to
4577 // watch for dead nodes here.
4578 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
4584 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
4587 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4589 SDVTList VTs = getVTList(VT);
4590 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
4593 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4594 EVT VT, SDValue Op1) {
4595 SDVTList VTs = getVTList(VT);
4596 SDValue Ops[] = { Op1 };
4597 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4600 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4601 EVT VT, SDValue Op1,
4603 SDVTList VTs = getVTList(VT);
4604 SDValue Ops[] = { Op1, Op2 };
4605 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4608 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4609 EVT VT, SDValue Op1,
4610 SDValue Op2, SDValue Op3) {
4611 SDVTList VTs = getVTList(VT);
4612 SDValue Ops[] = { Op1, Op2, Op3 };
4613 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4616 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4617 EVT VT, const SDValue *Ops,
4619 SDVTList VTs = getVTList(VT);
4620 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4623 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4624 EVT VT1, EVT VT2, const SDValue *Ops,
4626 SDVTList VTs = getVTList(VT1, VT2);
4627 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4630 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4632 SDVTList VTs = getVTList(VT1, VT2);
4633 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
4636 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4637 EVT VT1, EVT VT2, EVT VT3,
4638 const SDValue *Ops, unsigned NumOps) {
4639 SDVTList VTs = getVTList(VT1, VT2, VT3);
4640 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4643 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4644 EVT VT1, EVT VT2, EVT VT3, EVT VT4,
4645 const SDValue *Ops, unsigned NumOps) {
4646 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4647 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4650 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4653 SDVTList VTs = getVTList(VT1, VT2);
4654 SDValue Ops[] = { Op1 };
4655 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4658 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4660 SDValue Op1, SDValue Op2) {
4661 SDVTList VTs = getVTList(VT1, VT2);
4662 SDValue Ops[] = { Op1, Op2 };
4663 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4666 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4668 SDValue Op1, SDValue Op2,
4670 SDVTList VTs = getVTList(VT1, VT2);
4671 SDValue Ops[] = { Op1, Op2, Op3 };
4672 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4675 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4676 EVT VT1, EVT VT2, EVT VT3,
4677 SDValue Op1, SDValue Op2,
4679 SDVTList VTs = getVTList(VT1, VT2, VT3);
4680 SDValue Ops[] = { Op1, Op2, Op3 };
4681 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4684 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4685 SDVTList VTs, const SDValue *Ops,
4687 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
4688 // Reset the NodeID to -1.
4693 /// MorphNodeTo - This *mutates* the specified node to have the specified
4694 /// return type, opcode, and operands.
4696 /// Note that MorphNodeTo returns the resultant node. If there is already a
4697 /// node of the specified opcode and operands, it returns that node instead of
4698 /// the current one. Note that the DebugLoc need not be the same.
4700 /// Using MorphNodeTo is faster than creating a new node and swapping it in
4701 /// with ReplaceAllUsesWith both because it often avoids allocating a new
4702 /// node, and because it doesn't require CSE recalculation for any of
4703 /// the node's users.
4705 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4706 SDVTList VTs, const SDValue *Ops,
4708 // If an identical node already exists, use it.
4710 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) {
4711 FoldingSetNodeID ID;
4712 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
4713 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
4717 if (!RemoveNodeFromCSEMaps(N))
4720 // Start the morphing.
4722 N->ValueList = VTs.VTs;
4723 N->NumValues = VTs.NumVTs;
4725 // Clear the operands list, updating used nodes to remove this from their
4726 // use list. Keep track of any operands that become dead as a result.
4727 SmallPtrSet<SDNode*, 16> DeadNodeSet;
4728 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
4730 SDNode *Used = Use.getNode();
4732 if (Used->use_empty())
4733 DeadNodeSet.insert(Used);
4736 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) {
4737 // Initialize the memory references information.
4738 MN->setMemRefs(0, 0);
4739 // If NumOps is larger than the # of operands we can have in a
4740 // MachineSDNode, reallocate the operand list.
4741 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) {
4742 if (MN->OperandsNeedDelete)
4743 delete[] MN->OperandList;
4744 if (NumOps > array_lengthof(MN->LocalOperands))
4745 // We're creating a final node that will live unmorphed for the
4746 // remainder of the current SelectionDAG iteration, so we can allocate
4747 // the operands directly out of a pool with no recycling metadata.
4748 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
4751 MN->InitOperands(MN->LocalOperands, Ops, NumOps);
4752 MN->OperandsNeedDelete = false;
4754 MN->InitOperands(MN->OperandList, Ops, NumOps);
4756 // If NumOps is larger than the # of operands we currently have, reallocate
4757 // the operand list.
4758 if (NumOps > N->NumOperands) {
4759 if (N->OperandsNeedDelete)
4760 delete[] N->OperandList;
4761 N->InitOperands(new SDUse[NumOps], Ops, NumOps);
4762 N->OperandsNeedDelete = true;
4764 N->InitOperands(N->OperandList, Ops, NumOps);
4767 // Delete any nodes that are still dead after adding the uses for the
4769 if (!DeadNodeSet.empty()) {
4770 SmallVector<SDNode *, 16> DeadNodes;
4771 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
4772 E = DeadNodeSet.end(); I != E; ++I)
4773 if ((*I)->use_empty())
4774 DeadNodes.push_back(*I);
4775 RemoveDeadNodes(DeadNodes);
4779 CSEMap.InsertNode(N, IP); // Memoize the new node.
4784 /// getMachineNode - These are used for target selectors to create a new node
4785 /// with specified return type(s), MachineInstr opcode, and operands.
4787 /// Note that getMachineNode returns the resultant node. If there is already a
4788 /// node of the specified opcode and operands, it returns that node instead of
4789 /// the current one.
4791 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) {
4792 SDVTList VTs = getVTList(VT);
4793 return getMachineNode(Opcode, dl, VTs, 0, 0);
4797 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) {
4798 SDVTList VTs = getVTList(VT);
4799 SDValue Ops[] = { Op1 };
4800 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4804 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4805 SDValue Op1, SDValue Op2) {
4806 SDVTList VTs = getVTList(VT);
4807 SDValue Ops[] = { Op1, Op2 };
4808 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4812 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4813 SDValue Op1, SDValue Op2, SDValue Op3) {
4814 SDVTList VTs = getVTList(VT);
4815 SDValue Ops[] = { Op1, Op2, Op3 };
4816 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4820 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4821 const SDValue *Ops, unsigned NumOps) {
4822 SDVTList VTs = getVTList(VT);
4823 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4827 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) {
4828 SDVTList VTs = getVTList(VT1, VT2);
4829 return getMachineNode(Opcode, dl, VTs, 0, 0);
4833 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4834 EVT VT1, EVT VT2, SDValue Op1) {
4835 SDVTList VTs = getVTList(VT1, VT2);
4836 SDValue Ops[] = { Op1 };
4837 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4841 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4842 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) {
4843 SDVTList VTs = getVTList(VT1, VT2);
4844 SDValue Ops[] = { Op1, Op2 };
4845 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4849 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4850 EVT VT1, EVT VT2, SDValue Op1,
4851 SDValue Op2, SDValue Op3) {
4852 SDVTList VTs = getVTList(VT1, VT2);
4853 SDValue Ops[] = { Op1, Op2, Op3 };
4854 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4858 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4860 const SDValue *Ops, unsigned NumOps) {
4861 SDVTList VTs = getVTList(VT1, VT2);
4862 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4866 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4867 EVT VT1, EVT VT2, EVT VT3,
4868 SDValue Op1, SDValue Op2) {
4869 SDVTList VTs = getVTList(VT1, VT2, VT3);
4870 SDValue Ops[] = { Op1, Op2 };
4871 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4875 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4876 EVT VT1, EVT VT2, EVT VT3,
4877 SDValue Op1, SDValue Op2, SDValue Op3) {
4878 SDVTList VTs = getVTList(VT1, VT2, VT3);
4879 SDValue Ops[] = { Op1, Op2, Op3 };
4880 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4884 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4885 EVT VT1, EVT VT2, EVT VT3,
4886 const SDValue *Ops, unsigned NumOps) {
4887 SDVTList VTs = getVTList(VT1, VT2, VT3);
4888 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4892 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1,
4893 EVT VT2, EVT VT3, EVT VT4,
4894 const SDValue *Ops, unsigned NumOps) {
4895 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4896 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4900 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4901 const std::vector<EVT> &ResultTys,
4902 const SDValue *Ops, unsigned NumOps) {
4903 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size());
4904 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4908 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs,
4909 const SDValue *Ops, unsigned NumOps) {
4910 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Flag;
4915 FoldingSetNodeID ID;
4916 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps);
4918 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4919 return cast<MachineSDNode>(E);
4922 // Allocate a new MachineSDNode.
4923 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs);
4925 // Initialize the operands list.
4926 if (NumOps > array_lengthof(N->LocalOperands))
4927 // We're creating a final node that will live unmorphed for the
4928 // remainder of the current SelectionDAG iteration, so we can allocate
4929 // the operands directly out of a pool with no recycling metadata.
4930 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
4933 N->InitOperands(N->LocalOperands, Ops, NumOps);
4934 N->OperandsNeedDelete = false;
4937 CSEMap.InsertNode(N, IP);
4939 AllNodes.push_back(N);
4941 VerifyMachineNode(N);
4946 /// getTargetExtractSubreg - A convenience function for creating
4947 /// TargetOpcode::EXTRACT_SUBREG nodes.
4949 SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT,
4951 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
4952 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL,
4953 VT, Operand, SRIdxVal);
4954 return SDValue(Subreg, 0);
4957 /// getTargetInsertSubreg - A convenience function for creating
4958 /// TargetOpcode::INSERT_SUBREG nodes.
4960 SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT,
4961 SDValue Operand, SDValue Subreg) {
4962 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
4963 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL,
4964 VT, Operand, Subreg, SRIdxVal);
4965 return SDValue(Result, 0);
4968 /// getNodeIfExists - Get the specified node if it's already available, or
4969 /// else return NULL.
4970 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
4971 const SDValue *Ops, unsigned NumOps) {
4972 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4973 FoldingSetNodeID ID;
4974 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4976 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4982 /// getDbgValue - Creates a SDDbgValue node.
4985 SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off,
4986 DebugLoc DL, unsigned O) {
4987 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O);
4991 SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off,
4992 DebugLoc DL, unsigned O) {
4993 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O);
4997 SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off,
4998 DebugLoc DL, unsigned O) {
4999 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O);
5004 /// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node
5005 /// pointed to by a use iterator is deleted, increment the use iterator
5006 /// so that it doesn't dangle.
5008 /// This class also manages a "downlink" DAGUpdateListener, to forward
5009 /// messages to ReplaceAllUsesWith's callers.
5011 class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener {
5012 SelectionDAG::DAGUpdateListener *DownLink;
5013 SDNode::use_iterator &UI;
5014 SDNode::use_iterator &UE;
5016 virtual void NodeDeleted(SDNode *N, SDNode *E) {
5017 // Increment the iterator as needed.
5018 while (UI != UE && N == *UI)
5021 // Then forward the message.
5022 if (DownLink) DownLink->NodeDeleted(N, E);
5025 virtual void NodeUpdated(SDNode *N) {
5026 // Just forward the message.
5027 if (DownLink) DownLink->NodeUpdated(N);
5031 RAUWUpdateListener(SelectionDAG::DAGUpdateListener *dl,
5032 SDNode::use_iterator &ui,
5033 SDNode::use_iterator &ue)
5034 : DownLink(dl), UI(ui), UE(ue) {}
5039 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5040 /// This can cause recursive merging of nodes in the DAG.
5042 /// This version assumes From has a single result value.
5044 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To,
5045 DAGUpdateListener *UpdateListener) {
5046 SDNode *From = FromN.getNode();
5047 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
5048 "Cannot replace with this method!");
5049 assert(From != To.getNode() && "Cannot replace uses of with self");
5051 // Iterate over all the existing uses of From. New uses will be added
5052 // to the beginning of the use list, which we avoid visiting.
5053 // This specifically avoids visiting uses of From that arise while the
5054 // replacement is happening, because any such uses would be the result
5055 // of CSE: If an existing node looks like From after one of its operands
5056 // is replaced by To, we don't want to replace of all its users with To
5057 // too. See PR3018 for more info.
5058 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5059 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5063 // This node is about to morph, remove its old self from the CSE maps.
5064 RemoveNodeFromCSEMaps(User);
5066 // A user can appear in a use list multiple times, and when this
5067 // happens the uses are usually next to each other in the list.
5068 // To help reduce the number of CSE recomputations, process all
5069 // the uses of this user that we can find this way.
5071 SDUse &Use = UI.getUse();
5074 } while (UI != UE && *UI == User);
5076 // Now that we have modified User, add it back to the CSE maps. If it
5077 // already exists there, recursively merge the results together.
5078 AddModifiedNodeToCSEMaps(User, &Listener);
5082 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5083 /// This can cause recursive merging of nodes in the DAG.
5085 /// This version assumes that for each value of From, there is a
5086 /// corresponding value in To in the same position with the same type.
5088 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To,
5089 DAGUpdateListener *UpdateListener) {
5091 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
5092 assert((!From->hasAnyUseOfValue(i) ||
5093 From->getValueType(i) == To->getValueType(i)) &&
5094 "Cannot use this version of ReplaceAllUsesWith!");
5097 // Handle the trivial case.
5101 // Iterate over just the existing users of From. See the comments in
5102 // the ReplaceAllUsesWith above.
5103 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5104 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5108 // This node is about to morph, remove its old self from the CSE maps.
5109 RemoveNodeFromCSEMaps(User);
5111 // A user can appear in a use list multiple times, and when this
5112 // happens the uses are usually next to each other in the list.
5113 // To help reduce the number of CSE recomputations, process all
5114 // the uses of this user that we can find this way.
5116 SDUse &Use = UI.getUse();
5119 } while (UI != UE && *UI == User);
5121 // Now that we have modified User, add it back to the CSE maps. If it
5122 // already exists there, recursively merge the results together.
5123 AddModifiedNodeToCSEMaps(User, &Listener);
5127 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5128 /// This can cause recursive merging of nodes in the DAG.
5130 /// This version can replace From with any result values. To must match the
5131 /// number and types of values returned by From.
5132 void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
5134 DAGUpdateListener *UpdateListener) {
5135 if (From->getNumValues() == 1) // Handle the simple case efficiently.
5136 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener);
5138 // Iterate over just the existing users of From. See the comments in
5139 // the ReplaceAllUsesWith above.
5140 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5141 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5145 // This node is about to morph, remove its old self from the CSE maps.
5146 RemoveNodeFromCSEMaps(User);
5148 // A user can appear in a use list multiple times, and when this
5149 // happens the uses are usually next to each other in the list.
5150 // To help reduce the number of CSE recomputations, process all
5151 // the uses of this user that we can find this way.
5153 SDUse &Use = UI.getUse();
5154 const SDValue &ToOp = To[Use.getResNo()];
5157 } while (UI != UE && *UI == User);
5159 // Now that we have modified User, add it back to the CSE maps. If it
5160 // already exists there, recursively merge the results together.
5161 AddModifiedNodeToCSEMaps(User, &Listener);
5165 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
5166 /// uses of other values produced by From.getNode() alone. The Deleted
5167 /// vector is handled the same way as for ReplaceAllUsesWith.
5168 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To,
5169 DAGUpdateListener *UpdateListener){
5170 // Handle the really simple, really trivial case efficiently.
5171 if (From == To) return;
5173 // Handle the simple, trivial, case efficiently.
5174 if (From.getNode()->getNumValues() == 1) {
5175 ReplaceAllUsesWith(From, To, UpdateListener);
5179 // Iterate over just the existing users of From. See the comments in
5180 // the ReplaceAllUsesWith above.
5181 SDNode::use_iterator UI = From.getNode()->use_begin(),
5182 UE = From.getNode()->use_end();
5183 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5186 bool UserRemovedFromCSEMaps = false;
5188 // A user can appear in a use list multiple times, and when this
5189 // happens the uses are usually next to each other in the list.
5190 // To help reduce the number of CSE recomputations, process all
5191 // the uses of this user that we can find this way.
5193 SDUse &Use = UI.getUse();
5195 // Skip uses of different values from the same node.
5196 if (Use.getResNo() != From.getResNo()) {
5201 // If this node hasn't been modified yet, it's still in the CSE maps,
5202 // so remove its old self from the CSE maps.
5203 if (!UserRemovedFromCSEMaps) {
5204 RemoveNodeFromCSEMaps(User);
5205 UserRemovedFromCSEMaps = true;
5210 } while (UI != UE && *UI == User);
5212 // We are iterating over all uses of the From node, so if a use
5213 // doesn't use the specific value, no changes are made.
5214 if (!UserRemovedFromCSEMaps)
5217 // Now that we have modified User, add it back to the CSE maps. If it
5218 // already exists there, recursively merge the results together.
5219 AddModifiedNodeToCSEMaps(User, &Listener);
5224 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
5225 /// to record information about a use.
5232 /// operator< - Sort Memos by User.
5233 bool operator<(const UseMemo &L, const UseMemo &R) {
5234 return (intptr_t)L.User < (intptr_t)R.User;
5238 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
5239 /// uses of other values produced by From.getNode() alone. The same value
5240 /// may appear in both the From and To list. The Deleted vector is
5241 /// handled the same way as for ReplaceAllUsesWith.
5242 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
5245 DAGUpdateListener *UpdateListener){
5246 // Handle the simple, trivial case efficiently.
5248 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener);
5250 // Read up all the uses and make records of them. This helps
5251 // processing new uses that are introduced during the
5252 // replacement process.
5253 SmallVector<UseMemo, 4> Uses;
5254 for (unsigned i = 0; i != Num; ++i) {
5255 unsigned FromResNo = From[i].getResNo();
5256 SDNode *FromNode = From[i].getNode();
5257 for (SDNode::use_iterator UI = FromNode->use_begin(),
5258 E = FromNode->use_end(); UI != E; ++UI) {
5259 SDUse &Use = UI.getUse();
5260 if (Use.getResNo() == FromResNo) {
5261 UseMemo Memo = { *UI, i, &Use };
5262 Uses.push_back(Memo);
5267 // Sort the uses, so that all the uses from a given User are together.
5268 std::sort(Uses.begin(), Uses.end());
5270 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
5271 UseIndex != UseIndexEnd; ) {
5272 // We know that this user uses some value of From. If it is the right
5273 // value, update it.
5274 SDNode *User = Uses[UseIndex].User;
5276 // This node is about to morph, remove its old self from the CSE maps.
5277 RemoveNodeFromCSEMaps(User);
5279 // The Uses array is sorted, so all the uses for a given User
5280 // are next to each other in the list.
5281 // To help reduce the number of CSE recomputations, process all
5282 // the uses of this user that we can find this way.
5284 unsigned i = Uses[UseIndex].Index;
5285 SDUse &Use = *Uses[UseIndex].Use;
5289 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
5291 // Now that we have modified User, add it back to the CSE maps. If it
5292 // already exists there, recursively merge the results together.
5293 AddModifiedNodeToCSEMaps(User, UpdateListener);
5297 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
5298 /// based on their topological order. It returns the maximum id and a vector
5299 /// of the SDNodes* in assigned order by reference.
5300 unsigned SelectionDAG::AssignTopologicalOrder() {
5302 unsigned DAGSize = 0;
5304 // SortedPos tracks the progress of the algorithm. Nodes before it are
5305 // sorted, nodes after it are unsorted. When the algorithm completes
5306 // it is at the end of the list.
5307 allnodes_iterator SortedPos = allnodes_begin();
5309 // Visit all the nodes. Move nodes with no operands to the front of
5310 // the list immediately. Annotate nodes that do have operands with their
5311 // operand count. Before we do this, the Node Id fields of the nodes
5312 // may contain arbitrary values. After, the Node Id fields for nodes
5313 // before SortedPos will contain the topological sort index, and the
5314 // Node Id fields for nodes At SortedPos and after will contain the
5315 // count of outstanding operands.
5316 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
5319 unsigned Degree = N->getNumOperands();
5321 // A node with no uses, add it to the result array immediately.
5322 N->setNodeId(DAGSize++);
5323 allnodes_iterator Q = N;
5325 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
5326 assert(SortedPos != AllNodes.end() && "Overran node list");
5329 // Temporarily use the Node Id as scratch space for the degree count.
5330 N->setNodeId(Degree);
5334 // Visit all the nodes. As we iterate, moves nodes into sorted order,
5335 // such that by the time the end is reached all nodes will be sorted.
5336 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
5339 // N is in sorted position, so all its uses have one less operand
5340 // that needs to be sorted.
5341 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
5344 unsigned Degree = P->getNodeId();
5345 assert(Degree != 0 && "Invalid node degree");
5348 // All of P's operands are sorted, so P may sorted now.
5349 P->setNodeId(DAGSize++);
5351 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
5352 assert(SortedPos != AllNodes.end() && "Overran node list");
5355 // Update P's outstanding operand count.
5356 P->setNodeId(Degree);
5359 if (I == SortedPos) {
5362 dbgs() << "Overran sorted position:\n";
5365 llvm_unreachable(0);
5369 assert(SortedPos == AllNodes.end() &&
5370 "Topological sort incomplete!");
5371 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
5372 "First node in topological sort is not the entry token!");
5373 assert(AllNodes.front().getNodeId() == 0 &&
5374 "First node in topological sort has non-zero id!");
5375 assert(AllNodes.front().getNumOperands() == 0 &&
5376 "First node in topological sort has operands!");
5377 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
5378 "Last node in topologic sort has unexpected id!");
5379 assert(AllNodes.back().use_empty() &&
5380 "Last node in topologic sort has users!");
5381 assert(DAGSize == allnodes_size() && "Node count mismatch!");
5385 /// AssignOrdering - Assign an order to the SDNode.
5386 void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) {
5387 assert(SD && "Trying to assign an order to a null node!");
5388 Ordering->add(SD, Order);
5391 /// GetOrdering - Get the order for the SDNode.
5392 unsigned SelectionDAG::GetOrdering(const SDNode *SD) const {
5393 assert(SD && "Trying to get the order of a null node!");
5394 return Ordering->getOrder(SD);
5397 /// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the
5398 /// value is produced by SD.
5399 void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) {
5400 DbgInfo->add(DB, SD, isParameter);
5402 SD->setHasDebugValue(true);
5405 //===----------------------------------------------------------------------===//
5407 //===----------------------------------------------------------------------===//
5409 HandleSDNode::~HandleSDNode() {
5413 GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, DebugLoc DL,
5414 const GlobalValue *GA,
5415 EVT VT, int64_t o, unsigned char TF)
5416 : SDNode(Opc, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) {
5420 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt,
5421 MachineMemOperand *mmo)
5422 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) {
5423 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5424 MMO->isNonTemporal());
5425 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5426 assert(isNonTemporal() == MMO->isNonTemporal() &&
5427 "Non-temporal encoding error!");
5428 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5431 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs,
5432 const SDValue *Ops, unsigned NumOps, EVT memvt,
5433 MachineMemOperand *mmo)
5434 : SDNode(Opc, dl, VTs, Ops, NumOps),
5435 MemoryVT(memvt), MMO(mmo) {
5436 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5437 MMO->isNonTemporal());
5438 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5439 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5442 /// Profile - Gather unique data for the node.
5444 void SDNode::Profile(FoldingSetNodeID &ID) const {
5445 AddNodeIDNode(ID, this);
5450 std::vector<EVT> VTs;
5453 VTs.reserve(MVT::LAST_VALUETYPE);
5454 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i)
5455 VTs.push_back(MVT((MVT::SimpleValueType)i));
5460 static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs;
5461 static ManagedStatic<EVTArray> SimpleVTArray;
5462 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
5464 /// getValueTypeList - Return a pointer to the specified value type.
5466 const EVT *SDNode::getValueTypeList(EVT VT) {
5467 if (VT.isExtended()) {
5468 sys::SmartScopedLock<true> Lock(*VTMutex);
5469 return &(*EVTs->insert(VT).first);
5471 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE &&
5472 "Value type out of range!");
5473 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy];
5477 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
5478 /// indicated value. This method ignores uses of other values defined by this
5480 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
5481 assert(Value < getNumValues() && "Bad value!");
5483 // TODO: Only iterate over uses of a given value of the node
5484 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
5485 if (UI.getUse().getResNo() == Value) {
5492 // Found exactly the right number of uses?
5497 /// hasAnyUseOfValue - Return true if there are any use of the indicated
5498 /// value. This method ignores uses of other values defined by this operation.
5499 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
5500 assert(Value < getNumValues() && "Bad value!");
5502 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
5503 if (UI.getUse().getResNo() == Value)
5510 /// isOnlyUserOf - Return true if this node is the only use of N.
5512 bool SDNode::isOnlyUserOf(SDNode *N) const {
5514 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
5525 /// isOperand - Return true if this node is an operand of N.
5527 bool SDValue::isOperandOf(SDNode *N) const {
5528 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5529 if (*this == N->getOperand(i))
5534 bool SDNode::isOperandOf(SDNode *N) const {
5535 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
5536 if (this == N->OperandList[i].getNode())
5541 /// reachesChainWithoutSideEffects - Return true if this operand (which must
5542 /// be a chain) reaches the specified operand without crossing any
5543 /// side-effecting instructions on any chain path. In practice, this looks
5544 /// through token factors and non-volatile loads. In order to remain efficient,
5545 /// this only looks a couple of nodes in, it does not do an exhaustive search.
5546 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
5547 unsigned Depth) const {
5548 if (*this == Dest) return true;
5550 // Don't search too deeply, we just want to be able to see through
5551 // TokenFactor's etc.
5552 if (Depth == 0) return false;
5554 // If this is a token factor, all inputs to the TF happen in parallel. If any
5555 // of the operands of the TF does not reach dest, then we cannot do the xform.
5556 if (getOpcode() == ISD::TokenFactor) {
5557 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
5558 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
5563 // Loads don't have side effects, look through them.
5564 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
5565 if (!Ld->isVolatile())
5566 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
5571 /// isPredecessorOf - Return true if this node is a predecessor of N. This node
5572 /// is either an operand of N or it can be reached by traversing up the operands.
5573 /// NOTE: this is an expensive method. Use it carefully.
5574 bool SDNode::isPredecessorOf(SDNode *N) const {
5575 SmallPtrSet<SDNode *, 32> Visited;
5576 SmallVector<SDNode *, 16> Worklist;
5577 Worklist.push_back(N);
5580 N = Worklist.pop_back_val();
5581 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
5582 SDNode *Op = N->getOperand(i).getNode();
5585 if (Visited.insert(Op))
5586 Worklist.push_back(Op);
5588 } while (!Worklist.empty());
5593 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
5594 assert(Num < NumOperands && "Invalid child # of SDNode!");
5595 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
5598 std::string SDNode::getOperationName(const SelectionDAG *G) const {
5599 switch (getOpcode()) {
5601 if (getOpcode() < ISD::BUILTIN_OP_END)
5602 return "<<Unknown DAG Node>>";
5603 if (isMachineOpcode()) {
5605 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo())
5606 if (getMachineOpcode() < TII->getNumOpcodes())
5607 return TII->get(getMachineOpcode()).getName();
5608 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>";
5611 const TargetLowering &TLI = G->getTargetLoweringInfo();
5612 const char *Name = TLI.getTargetNodeName(getOpcode());
5613 if (Name) return Name;
5614 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>";
5616 return "<<Unknown Node #" + utostr(getOpcode()) + ">>";
5619 case ISD::DELETED_NODE:
5620 return "<<Deleted Node!>>";
5622 case ISD::PREFETCH: return "Prefetch";
5623 case ISD::MEMBARRIER: return "MemBarrier";
5624 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
5625 case ISD::ATOMIC_SWAP: return "AtomicSwap";
5626 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
5627 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
5628 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
5629 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
5630 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
5631 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
5632 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
5633 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
5634 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
5635 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
5636 case ISD::PCMARKER: return "PCMarker";
5637 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
5638 case ISD::SRCVALUE: return "SrcValue";
5639 case ISD::MDNODE_SDNODE: return "MDNode";
5640 case ISD::EntryToken: return "EntryToken";
5641 case ISD::TokenFactor: return "TokenFactor";
5642 case ISD::AssertSext: return "AssertSext";
5643 case ISD::AssertZext: return "AssertZext";
5645 case ISD::BasicBlock: return "BasicBlock";
5646 case ISD::VALUETYPE: return "ValueType";
5647 case ISD::Register: return "Register";
5649 case ISD::Constant: return "Constant";
5650 case ISD::ConstantFP: return "ConstantFP";
5651 case ISD::GlobalAddress: return "GlobalAddress";
5652 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
5653 case ISD::FrameIndex: return "FrameIndex";
5654 case ISD::JumpTable: return "JumpTable";
5655 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
5656 case ISD::RETURNADDR: return "RETURNADDR";
5657 case ISD::FRAMEADDR: return "FRAMEADDR";
5658 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
5659 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR";
5660 case ISD::LSDAADDR: return "LSDAADDR";
5661 case ISD::EHSELECTION: return "EHSELECTION";
5662 case ISD::EH_RETURN: return "EH_RETURN";
5663 case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP";
5664 case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP";
5665 case ISD::EH_SJLJ_DISPATCHSETUP: return "EH_SJLJ_DISPATCHSETUP";
5666 case ISD::ConstantPool: return "ConstantPool";
5667 case ISD::ExternalSymbol: return "ExternalSymbol";
5668 case ISD::BlockAddress: return "BlockAddress";
5669 case ISD::INTRINSIC_WO_CHAIN:
5670 case ISD::INTRINSIC_VOID:
5671 case ISD::INTRINSIC_W_CHAIN: {
5672 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1;
5673 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue();
5674 if (IID < Intrinsic::num_intrinsics)
5675 return Intrinsic::getName((Intrinsic::ID)IID);
5676 else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo())
5677 return TII->getName(IID);
5678 llvm_unreachable("Invalid intrinsic ID");
5681 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
5682 case ISD::TargetConstant: return "TargetConstant";
5683 case ISD::TargetConstantFP:return "TargetConstantFP";
5684 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
5685 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
5686 case ISD::TargetFrameIndex: return "TargetFrameIndex";
5687 case ISD::TargetJumpTable: return "TargetJumpTable";
5688 case ISD::TargetConstantPool: return "TargetConstantPool";
5689 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
5690 case ISD::TargetBlockAddress: return "TargetBlockAddress";
5692 case ISD::CopyToReg: return "CopyToReg";
5693 case ISD::CopyFromReg: return "CopyFromReg";
5694 case ISD::UNDEF: return "undef";
5695 case ISD::MERGE_VALUES: return "merge_values";
5696 case ISD::INLINEASM: return "inlineasm";
5697 case ISD::EH_LABEL: return "eh_label";
5698 case ISD::HANDLENODE: return "handlenode";
5701 case ISD::FABS: return "fabs";
5702 case ISD::FNEG: return "fneg";
5703 case ISD::FSQRT: return "fsqrt";
5704 case ISD::FSIN: return "fsin";
5705 case ISD::FCOS: return "fcos";
5706 case ISD::FTRUNC: return "ftrunc";
5707 case ISD::FFLOOR: return "ffloor";
5708 case ISD::FCEIL: return "fceil";
5709 case ISD::FRINT: return "frint";
5710 case ISD::FNEARBYINT: return "fnearbyint";
5711 case ISD::FEXP: return "fexp";
5712 case ISD::FEXP2: return "fexp2";
5713 case ISD::FLOG: return "flog";
5714 case ISD::FLOG2: return "flog2";
5715 case ISD::FLOG10: return "flog10";
5718 case ISD::ADD: return "add";
5719 case ISD::SUB: return "sub";
5720 case ISD::MUL: return "mul";
5721 case ISD::MULHU: return "mulhu";
5722 case ISD::MULHS: return "mulhs";
5723 case ISD::SDIV: return "sdiv";
5724 case ISD::UDIV: return "udiv";
5725 case ISD::SREM: return "srem";
5726 case ISD::UREM: return "urem";
5727 case ISD::SMUL_LOHI: return "smul_lohi";
5728 case ISD::UMUL_LOHI: return "umul_lohi";
5729 case ISD::SDIVREM: return "sdivrem";
5730 case ISD::UDIVREM: return "udivrem";
5731 case ISD::AND: return "and";
5732 case ISD::OR: return "or";
5733 case ISD::XOR: return "xor";
5734 case ISD::SHL: return "shl";
5735 case ISD::SRA: return "sra";
5736 case ISD::SRL: return "srl";
5737 case ISD::ROTL: return "rotl";
5738 case ISD::ROTR: return "rotr";
5739 case ISD::FADD: return "fadd";
5740 case ISD::FSUB: return "fsub";
5741 case ISD::FMUL: return "fmul";
5742 case ISD::FDIV: return "fdiv";
5743 case ISD::FREM: return "frem";
5744 case ISD::FCOPYSIGN: return "fcopysign";
5745 case ISD::FGETSIGN: return "fgetsign";
5746 case ISD::FPOW: return "fpow";
5748 case ISD::FPOWI: return "fpowi";
5749 case ISD::SETCC: return "setcc";
5750 case ISD::VSETCC: return "vsetcc";
5751 case ISD::SELECT: return "select";
5752 case ISD::SELECT_CC: return "select_cc";
5753 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
5754 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
5755 case ISD::CONCAT_VECTORS: return "concat_vectors";
5756 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
5757 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
5758 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
5759 case ISD::CARRY_FALSE: return "carry_false";
5760 case ISD::ADDC: return "addc";
5761 case ISD::ADDE: return "adde";
5762 case ISD::SADDO: return "saddo";
5763 case ISD::UADDO: return "uaddo";
5764 case ISD::SSUBO: return "ssubo";
5765 case ISD::USUBO: return "usubo";
5766 case ISD::SMULO: return "smulo";
5767 case ISD::UMULO: return "umulo";
5768 case ISD::SUBC: return "subc";
5769 case ISD::SUBE: return "sube";
5770 case ISD::SHL_PARTS: return "shl_parts";
5771 case ISD::SRA_PARTS: return "sra_parts";
5772 case ISD::SRL_PARTS: return "srl_parts";
5774 // Conversion operators.
5775 case ISD::SIGN_EXTEND: return "sign_extend";
5776 case ISD::ZERO_EXTEND: return "zero_extend";
5777 case ISD::ANY_EXTEND: return "any_extend";
5778 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
5779 case ISD::TRUNCATE: return "truncate";
5780 case ISD::FP_ROUND: return "fp_round";
5781 case ISD::FLT_ROUNDS_: return "flt_rounds";
5782 case ISD::FP_ROUND_INREG: return "fp_round_inreg";
5783 case ISD::FP_EXTEND: return "fp_extend";
5785 case ISD::SINT_TO_FP: return "sint_to_fp";
5786 case ISD::UINT_TO_FP: return "uint_to_fp";
5787 case ISD::FP_TO_SINT: return "fp_to_sint";
5788 case ISD::FP_TO_UINT: return "fp_to_uint";
5789 case ISD::BIT_CONVERT: return "bit_convert";
5790 case ISD::FP16_TO_FP32: return "fp16_to_fp32";
5791 case ISD::FP32_TO_FP16: return "fp32_to_fp16";
5793 case ISD::CONVERT_RNDSAT: {
5794 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) {
5795 default: llvm_unreachable("Unknown cvt code!");
5796 case ISD::CVT_FF: return "cvt_ff";
5797 case ISD::CVT_FS: return "cvt_fs";
5798 case ISD::CVT_FU: return "cvt_fu";
5799 case ISD::CVT_SF: return "cvt_sf";
5800 case ISD::CVT_UF: return "cvt_uf";
5801 case ISD::CVT_SS: return "cvt_ss";
5802 case ISD::CVT_SU: return "cvt_su";
5803 case ISD::CVT_US: return "cvt_us";
5804 case ISD::CVT_UU: return "cvt_uu";
5808 // Control flow instructions
5809 case ISD::BR: return "br";
5810 case ISD::BRIND: return "brind";
5811 case ISD::BR_JT: return "br_jt";
5812 case ISD::BRCOND: return "brcond";
5813 case ISD::BR_CC: return "br_cc";
5814 case ISD::CALLSEQ_START: return "callseq_start";
5815 case ISD::CALLSEQ_END: return "callseq_end";
5818 case ISD::LOAD: return "load";
5819 case ISD::STORE: return "store";
5820 case ISD::VAARG: return "vaarg";
5821 case ISD::VACOPY: return "vacopy";
5822 case ISD::VAEND: return "vaend";
5823 case ISD::VASTART: return "vastart";
5824 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
5825 case ISD::EXTRACT_ELEMENT: return "extract_element";
5826 case ISD::BUILD_PAIR: return "build_pair";
5827 case ISD::STACKSAVE: return "stacksave";
5828 case ISD::STACKRESTORE: return "stackrestore";
5829 case ISD::TRAP: return "trap";
5832 case ISD::BSWAP: return "bswap";
5833 case ISD::CTPOP: return "ctpop";
5834 case ISD::CTTZ: return "cttz";
5835 case ISD::CTLZ: return "ctlz";
5838 case ISD::TRAMPOLINE: return "trampoline";
5841 switch (cast<CondCodeSDNode>(this)->get()) {
5842 default: llvm_unreachable("Unknown setcc condition!");
5843 case ISD::SETOEQ: return "setoeq";
5844 case ISD::SETOGT: return "setogt";
5845 case ISD::SETOGE: return "setoge";
5846 case ISD::SETOLT: return "setolt";
5847 case ISD::SETOLE: return "setole";
5848 case ISD::SETONE: return "setone";
5850 case ISD::SETO: return "seto";
5851 case ISD::SETUO: return "setuo";
5852 case ISD::SETUEQ: return "setue";
5853 case ISD::SETUGT: return "setugt";
5854 case ISD::SETUGE: return "setuge";
5855 case ISD::SETULT: return "setult";
5856 case ISD::SETULE: return "setule";
5857 case ISD::SETUNE: return "setune";
5859 case ISD::SETEQ: return "seteq";
5860 case ISD::SETGT: return "setgt";
5861 case ISD::SETGE: return "setge";
5862 case ISD::SETLT: return "setlt";
5863 case ISD::SETLE: return "setle";
5864 case ISD::SETNE: return "setne";
5869 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
5878 return "<post-inc>";
5880 return "<post-dec>";
5884 std::string ISD::ArgFlagsTy::getArgFlagsString() {
5885 std::string S = "< ";
5899 if (getByValAlign())
5900 S += "byval-align:" + utostr(getByValAlign()) + " ";
5902 S += "orig-align:" + utostr(getOrigAlign()) + " ";
5904 S += "byval-size:" + utostr(getByValSize()) + " ";
5908 void SDNode::dump() const { dump(0); }
5909 void SDNode::dump(const SelectionDAG *G) const {
5914 void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const {
5915 OS << (void*)this << ": ";
5917 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
5919 if (getValueType(i) == MVT::Other)
5922 OS << getValueType(i).getEVTString();
5924 OS << " = " << getOperationName(G);
5927 void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const {
5928 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) {
5929 if (!MN->memoperands_empty()) {
5932 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(),
5933 e = MN->memoperands_end(); i != e; ++i) {
5935 if (llvm::next(i) != e)
5940 } else if (const ShuffleVectorSDNode *SVN =
5941 dyn_cast<ShuffleVectorSDNode>(this)) {
5943 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
5944 int Idx = SVN->getMaskElt(i);
5952 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
5953 OS << '<' << CSDN->getAPIntValue() << '>';
5954 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
5955 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle)
5956 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
5957 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble)
5958 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
5961 CSDN->getValueAPF().bitcastToAPInt().dump();
5964 } else if (const GlobalAddressSDNode *GADN =
5965 dyn_cast<GlobalAddressSDNode>(this)) {
5966 int64_t offset = GADN->getOffset();
5968 WriteAsOperand(OS, GADN->getGlobal());
5971 OS << " + " << offset;
5973 OS << " " << offset;
5974 if (unsigned int TF = GADN->getTargetFlags())
5975 OS << " [TF=" << TF << ']';
5976 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
5977 OS << "<" << FIDN->getIndex() << ">";
5978 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
5979 OS << "<" << JTDN->getIndex() << ">";
5980 if (unsigned int TF = JTDN->getTargetFlags())
5981 OS << " [TF=" << TF << ']';
5982 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
5983 int offset = CP->getOffset();
5984 if (CP->isMachineConstantPoolEntry())
5985 OS << "<" << *CP->getMachineCPVal() << ">";
5987 OS << "<" << *CP->getConstVal() << ">";
5989 OS << " + " << offset;
5991 OS << " " << offset;
5992 if (unsigned int TF = CP->getTargetFlags())
5993 OS << " [TF=" << TF << ']';
5994 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
5996 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
5998 OS << LBB->getName() << " ";
5999 OS << (const void*)BBDN->getBasicBlock() << ">";
6000 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
6001 if (G && R->getReg() &&
6002 TargetRegisterInfo::isPhysicalRegister(R->getReg())) {
6003 OS << " %" << G->getTarget().getRegisterInfo()->getName(R->getReg());
6005 OS << " %reg" << R->getReg();
6007 } else if (const ExternalSymbolSDNode *ES =
6008 dyn_cast<ExternalSymbolSDNode>(this)) {
6009 OS << "'" << ES->getSymbol() << "'";
6010 if (unsigned int TF = ES->getTargetFlags())
6011 OS << " [TF=" << TF << ']';
6012 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
6014 OS << "<" << M->getValue() << ">";
6017 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) {
6019 OS << "<" << MD->getMD() << ">";
6022 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
6023 OS << ":" << N->getVT().getEVTString();
6025 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
6026 OS << "<" << *LD->getMemOperand();
6029 switch (LD->getExtensionType()) {
6030 default: doExt = false; break;
6031 case ISD::EXTLOAD: OS << ", anyext"; break;
6032 case ISD::SEXTLOAD: OS << ", sext"; break;
6033 case ISD::ZEXTLOAD: OS << ", zext"; break;
6036 OS << " from " << LD->getMemoryVT().getEVTString();
6038 const char *AM = getIndexedModeName(LD->getAddressingMode());
6043 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
6044 OS << "<" << *ST->getMemOperand();
6046 if (ST->isTruncatingStore())
6047 OS << ", trunc to " << ST->getMemoryVT().getEVTString();
6049 const char *AM = getIndexedModeName(ST->getAddressingMode());
6054 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) {
6055 OS << "<" << *M->getMemOperand() << ">";
6056 } else if (const BlockAddressSDNode *BA =
6057 dyn_cast<BlockAddressSDNode>(this)) {
6059 WriteAsOperand(OS, BA->getBlockAddress()->getFunction(), false);
6061 WriteAsOperand(OS, BA->getBlockAddress()->getBasicBlock(), false);
6063 if (unsigned int TF = BA->getTargetFlags())
6064 OS << " [TF=" << TF << ']';
6068 if (unsigned Order = G->GetOrdering(this))
6069 OS << " [ORD=" << Order << ']';
6071 if (getNodeId() != -1)
6072 OS << " [ID=" << getNodeId() << ']';
6074 DebugLoc dl = getDebugLoc();
6075 if (G && !dl.isUnknown()) {
6077 Scope(dl.getScope(G->getMachineFunction().getFunction()->getContext()));
6079 // Omit the directory, since it's usually long and uninteresting.
6081 OS << Scope.getFilename();
6084 OS << ':' << dl.getLine();
6085 if (dl.getCol() != 0)
6086 OS << ':' << dl.getCol();
6090 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
6092 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
6093 if (i) OS << ", "; else OS << " ";
6094 OS << (void*)getOperand(i).getNode();
6095 if (unsigned RN = getOperand(i).getResNo())
6098 print_details(OS, G);
6101 static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N,
6102 const SelectionDAG *G, unsigned depth,
6115 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6117 printrWithDepthHelper(OS, N->getOperand(i).getNode(), G, depth-1, indent+2);
6121 void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G,
6122 unsigned depth) const {
6123 printrWithDepthHelper(OS, this, G, depth, 0);
6126 void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const {
6127 // Don't print impossibly deep things.
6128 printrWithDepth(OS, G, 100);
6131 void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const {
6132 printrWithDepth(dbgs(), G, depth);
6135 void SDNode::dumprFull(const SelectionDAG *G) const {
6136 // Don't print impossibly deep things.
6137 dumprWithDepth(G, 100);
6140 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
6141 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6142 if (N->getOperand(i).getNode()->hasOneUse())
6143 DumpNodes(N->getOperand(i).getNode(), indent+2, G);
6145 dbgs() << "\n" << std::string(indent+2, ' ')
6146 << (void*)N->getOperand(i).getNode() << ": <multiple use>";
6150 dbgs().indent(indent);
6154 SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
6155 assert(N->getNumValues() == 1 &&
6156 "Can't unroll a vector with multiple results!");
6158 EVT VT = N->getValueType(0);
6159 unsigned NE = VT.getVectorNumElements();
6160 EVT EltVT = VT.getVectorElementType();
6161 DebugLoc dl = N->getDebugLoc();
6163 SmallVector<SDValue, 8> Scalars;
6164 SmallVector<SDValue, 4> Operands(N->getNumOperands());
6166 // If ResNE is 0, fully unroll the vector op.
6169 else if (NE > ResNE)
6173 for (i= 0; i != NE; ++i) {
6174 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) {
6175 SDValue Operand = N->getOperand(j);
6176 EVT OperandVT = Operand.getValueType();
6177 if (OperandVT.isVector()) {
6178 // A vector operand; extract a single element.
6179 EVT OperandEltVT = OperandVT.getVectorElementType();
6180 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl,
6183 getConstant(i, MVT::i32));
6185 // A scalar operand; just use it as is.
6186 Operands[j] = Operand;
6190 switch (N->getOpcode()) {
6192 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6193 &Operands[0], Operands.size()));
6200 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0],
6201 getShiftAmountOperand(Operands[1])));
6203 case ISD::SIGN_EXTEND_INREG:
6204 case ISD::FP_ROUND_INREG: {
6205 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType();
6206 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6208 getValueType(ExtVT)));
6213 for (; i < ResNE; ++i)
6214 Scalars.push_back(getUNDEF(EltVT));
6216 return getNode(ISD::BUILD_VECTOR, dl,
6217 EVT::getVectorVT(*getContext(), EltVT, ResNE),
6218 &Scalars[0], Scalars.size());
6222 /// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a
6223 /// location that is 'Dist' units away from the location that the 'Base' load
6224 /// is loading from.
6225 bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base,
6226 unsigned Bytes, int Dist) const {
6227 if (LD->getChain() != Base->getChain())
6229 EVT VT = LD->getValueType(0);
6230 if (VT.getSizeInBits() / 8 != Bytes)
6233 SDValue Loc = LD->getOperand(1);
6234 SDValue BaseLoc = Base->getOperand(1);
6235 if (Loc.getOpcode() == ISD::FrameIndex) {
6236 if (BaseLoc.getOpcode() != ISD::FrameIndex)
6238 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo();
6239 int FI = cast<FrameIndexSDNode>(Loc)->getIndex();
6240 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex();
6241 int FS = MFI->getObjectSize(FI);
6242 int BFS = MFI->getObjectSize(BFI);
6243 if (FS != BFS || FS != (int)Bytes) return false;
6244 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes);
6246 if (Loc.getOpcode() == ISD::ADD && Loc.getOperand(0) == BaseLoc) {
6247 ConstantSDNode *V = dyn_cast<ConstantSDNode>(Loc.getOperand(1));
6248 if (V && (V->getSExtValue() == Dist*Bytes))
6252 const GlobalValue *GV1 = NULL;
6253 const GlobalValue *GV2 = NULL;
6254 int64_t Offset1 = 0;
6255 int64_t Offset2 = 0;
6256 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1);
6257 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2);
6258 if (isGA1 && isGA2 && GV1 == GV2)
6259 return Offset1 == (Offset2 + Dist*Bytes);
6264 /// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if
6265 /// it cannot be inferred.
6266 unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const {
6267 // If this is a GlobalAddress + cst, return the alignment.
6268 const GlobalValue *GV;
6269 int64_t GVOffset = 0;
6270 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) {
6271 // If GV has specified alignment, then use it. Otherwise, use the preferred
6273 unsigned Align = GV->getAlignment();
6275 if (const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV)) {
6276 if (GVar->hasInitializer()) {
6277 const TargetData *TD = TLI.getTargetData();
6278 Align = TD->getPreferredAlignment(GVar);
6282 return MinAlign(Align, GVOffset);
6285 // If this is a direct reference to a stack slot, use information about the
6286 // stack slot's alignment.
6287 int FrameIdx = 1 << 31;
6288 int64_t FrameOffset = 0;
6289 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) {
6290 FrameIdx = FI->getIndex();
6291 } else if (Ptr.getOpcode() == ISD::ADD &&
6292 isa<ConstantSDNode>(Ptr.getOperand(1)) &&
6293 isa<FrameIndexSDNode>(Ptr.getOperand(0))) {
6294 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
6295 FrameOffset = Ptr.getConstantOperandVal(1);
6298 if (FrameIdx != (1 << 31)) {
6299 // FIXME: Handle FI+CST.
6300 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo();
6301 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx),
6309 void SelectionDAG::dump() const {
6310 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:";
6312 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end();
6314 const SDNode *N = I;
6315 if (!N->hasOneUse() && N != getRoot().getNode())
6316 DumpNodes(N, 2, this);
6319 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
6324 void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
6326 print_details(OS, G);
6329 typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet;
6330 static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
6331 const SelectionDAG *G, VisitedSDNodeSet &once) {
6332 if (!once.insert(N)) // If we've been here before, return now.
6335 // Dump the current SDNode, but don't end the line yet.
6336 OS << std::string(indent, ' ');
6339 // Having printed this SDNode, walk the children:
6340 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6341 const SDNode *child = N->getOperand(i).getNode();
6346 if (child->getNumOperands() == 0) {
6347 // This child has no grandchildren; print it inline right here.
6348 child->printr(OS, G);
6350 } else { // Just the address. FIXME: also print the child's opcode.
6352 if (unsigned RN = N->getOperand(i).getResNo())
6359 // Dump children that have grandchildren on their own line(s).
6360 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6361 const SDNode *child = N->getOperand(i).getNode();
6362 DumpNodesr(OS, child, indent+2, G, once);
6366 void SDNode::dumpr() const {
6367 VisitedSDNodeSet once;
6368 DumpNodesr(dbgs(), this, 0, 0, once);
6371 void SDNode::dumpr(const SelectionDAG *G) const {
6372 VisitedSDNodeSet once;
6373 DumpNodesr(dbgs(), this, 0, G, once);
6377 // getAddressSpace - Return the address space this GlobalAddress belongs to.
6378 unsigned GlobalAddressSDNode::getAddressSpace() const {
6379 return getGlobal()->getType()->getAddressSpace();
6383 const Type *ConstantPoolSDNode::getType() const {
6384 if (isMachineConstantPoolEntry())
6385 return Val.MachineCPVal->getType();
6386 return Val.ConstVal->getType();
6389 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
6391 unsigned &SplatBitSize,
6393 unsigned MinSplatBits,
6395 EVT VT = getValueType(0);
6396 assert(VT.isVector() && "Expected a vector type");
6397 unsigned sz = VT.getSizeInBits();
6398 if (MinSplatBits > sz)
6401 SplatValue = APInt(sz, 0);
6402 SplatUndef = APInt(sz, 0);
6404 // Get the bits. Bits with undefined values (when the corresponding element
6405 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
6406 // in SplatValue. If any of the values are not constant, give up and return
6408 unsigned int nOps = getNumOperands();
6409 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
6410 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
6412 for (unsigned j = 0; j < nOps; ++j) {
6413 unsigned i = isBigEndian ? nOps-1-j : j;
6414 SDValue OpVal = getOperand(i);
6415 unsigned BitPos = j * EltBitSize;
6417 if (OpVal.getOpcode() == ISD::UNDEF)
6418 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize);
6419 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
6420 SplatValue |= APInt(CN->getAPIntValue()).zextOrTrunc(EltBitSize).
6421 zextOrTrunc(sz) << BitPos;
6422 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
6423 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
6428 // The build_vector is all constants or undefs. Find the smallest element
6429 // size that splats the vector.
6431 HasAnyUndefs = (SplatUndef != 0);
6434 unsigned HalfSize = sz / 2;
6435 APInt HighValue = APInt(SplatValue).lshr(HalfSize).trunc(HalfSize);
6436 APInt LowValue = APInt(SplatValue).trunc(HalfSize);
6437 APInt HighUndef = APInt(SplatUndef).lshr(HalfSize).trunc(HalfSize);
6438 APInt LowUndef = APInt(SplatUndef).trunc(HalfSize);
6440 // If the two halves do not match (ignoring undef bits), stop here.
6441 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
6442 MinSplatBits > HalfSize)
6445 SplatValue = HighValue | LowValue;
6446 SplatUndef = HighUndef & LowUndef;
6455 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
6456 // Find the first non-undef value in the shuffle mask.
6458 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
6461 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
6463 // Make sure all remaining elements are either undef or the same as the first
6465 for (int Idx = Mask[i]; i != e; ++i)
6466 if (Mask[i] >= 0 && Mask[i] != Idx)
6472 static void checkForCyclesHelper(const SDNode *N,
6473 SmallPtrSet<const SDNode*, 32> &Visited,
6474 SmallPtrSet<const SDNode*, 32> &Checked) {
6475 // If this node has already been checked, don't check it again.
6476 if (Checked.count(N))
6479 // If a node has already been visited on this depth-first walk, reject it as
6481 if (!Visited.insert(N)) {
6482 dbgs() << "Offending node:\n";
6484 errs() << "Detected cycle in SelectionDAG\n";
6488 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6489 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked);
6496 void llvm::checkForCycles(const llvm::SDNode *N) {
6498 assert(N && "Checking nonexistant SDNode");
6499 SmallPtrSet<const SDNode*, 32> visited;
6500 SmallPtrSet<const SDNode*, 32> checked;
6501 checkForCyclesHelper(N, visited, checked);
6505 void llvm::checkForCycles(const llvm::SelectionDAG *DAG) {
6506 checkForCycles(DAG->getRoot().getNode());