1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
13 #include "llvm/CodeGen/SelectionDAG.h"
14 #include "llvm/Constants.h"
15 #include "llvm/Analysis/ValueTracking.h"
16 #include "llvm/Function.h"
17 #include "llvm/GlobalAlias.h"
18 #include "llvm/GlobalVariable.h"
19 #include "llvm/Intrinsics.h"
20 #include "llvm/DerivedTypes.h"
21 #include "llvm/Assembly/Writer.h"
22 #include "llvm/CallingConv.h"
23 #include "llvm/CodeGen/MachineBasicBlock.h"
24 #include "llvm/CodeGen/MachineConstantPool.h"
25 #include "llvm/CodeGen/MachineFrameInfo.h"
26 #include "llvm/CodeGen/MachineModuleInfo.h"
27 #include "llvm/CodeGen/PseudoSourceValue.h"
28 #include "llvm/Target/TargetRegisterInfo.h"
29 #include "llvm/Target/TargetData.h"
30 #include "llvm/Target/TargetLowering.h"
31 #include "llvm/Target/TargetOptions.h"
32 #include "llvm/Target/TargetInstrInfo.h"
33 #include "llvm/Target/TargetMachine.h"
34 #include "llvm/Support/CommandLine.h"
35 #include "llvm/Support/ErrorHandling.h"
36 #include "llvm/Support/ManagedStatic.h"
37 #include "llvm/Support/MathExtras.h"
38 #include "llvm/Support/raw_ostream.h"
39 #include "llvm/System/Mutex.h"
40 #include "llvm/ADT/SetVector.h"
41 #include "llvm/ADT/SmallPtrSet.h"
42 #include "llvm/ADT/SmallSet.h"
43 #include "llvm/ADT/SmallVector.h"
44 #include "llvm/ADT/StringExtras.h"
49 /// makeVTList - Return an instance of the SDVTList struct initialized with the
50 /// specified members.
51 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
52 SDVTList Res = {VTs, NumVTs};
56 static const fltSemantics *EVTToAPFloatSemantics(EVT VT) {
57 switch (VT.getSimpleVT().SimpleTy) {
58 default: llvm_unreachable("Unknown FP format");
59 case MVT::f32: return &APFloat::IEEEsingle;
60 case MVT::f64: return &APFloat::IEEEdouble;
61 case MVT::f80: return &APFloat::x87DoubleExtended;
62 case MVT::f128: return &APFloat::IEEEquad;
63 case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
67 SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {}
69 //===----------------------------------------------------------------------===//
70 // ConstantFPSDNode Class
71 //===----------------------------------------------------------------------===//
73 /// isExactlyValue - We don't rely on operator== working on double values, as
74 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
75 /// As such, this method can be used to do an exact bit-for-bit comparison of
76 /// two floating point values.
77 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
78 return getValueAPF().bitwiseIsEqual(V);
81 bool ConstantFPSDNode::isValueValidForType(EVT VT,
83 assert(VT.isFloatingPoint() && "Can only convert between FP types");
85 // PPC long double cannot be converted to any other type.
86 if (VT == MVT::ppcf128 ||
87 &Val.getSemantics() == &APFloat::PPCDoubleDouble)
90 // convert modifies in place, so make a copy.
91 APFloat Val2 = APFloat(Val);
93 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
98 //===----------------------------------------------------------------------===//
100 //===----------------------------------------------------------------------===//
102 /// isBuildVectorAllOnes - Return true if the specified node is a
103 /// BUILD_VECTOR where all of the elements are ~0 or undef.
104 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
105 // Look through a bit convert.
106 if (N->getOpcode() == ISD::BIT_CONVERT)
107 N = N->getOperand(0).getNode();
109 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
111 unsigned i = 0, e = N->getNumOperands();
113 // Skip over all of the undef values.
114 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
117 // Do not accept an all-undef vector.
118 if (i == e) return false;
120 // Do not accept build_vectors that aren't all constants or which have non-~0
122 SDValue NotZero = N->getOperand(i);
123 if (isa<ConstantSDNode>(NotZero)) {
124 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue())
126 } else if (isa<ConstantFPSDNode>(NotZero)) {
127 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF().
128 bitcastToAPInt().isAllOnesValue())
133 // Okay, we have at least one ~0 value, check to see if the rest match or are
135 for (++i; i != e; ++i)
136 if (N->getOperand(i) != NotZero &&
137 N->getOperand(i).getOpcode() != ISD::UNDEF)
143 /// isBuildVectorAllZeros - Return true if the specified node is a
144 /// BUILD_VECTOR where all of the elements are 0 or undef.
145 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
146 // Look through a bit convert.
147 if (N->getOpcode() == ISD::BIT_CONVERT)
148 N = N->getOperand(0).getNode();
150 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
152 unsigned i = 0, e = N->getNumOperands();
154 // Skip over all of the undef values.
155 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
158 // Do not accept an all-undef vector.
159 if (i == e) return false;
161 // Do not accept build_vectors that aren't all constants or which have non-0
163 SDValue Zero = N->getOperand(i);
164 if (isa<ConstantSDNode>(Zero)) {
165 if (!cast<ConstantSDNode>(Zero)->isNullValue())
167 } else if (isa<ConstantFPSDNode>(Zero)) {
168 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero())
173 // Okay, we have at least one 0 value, check to see if the rest match or are
175 for (++i; i != e; ++i)
176 if (N->getOperand(i) != Zero &&
177 N->getOperand(i).getOpcode() != ISD::UNDEF)
182 /// isScalarToVector - Return true if the specified node is a
183 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
184 /// element is not an undef.
185 bool ISD::isScalarToVector(const SDNode *N) {
186 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
189 if (N->getOpcode() != ISD::BUILD_VECTOR)
191 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
193 unsigned NumElems = N->getNumOperands();
194 for (unsigned i = 1; i < NumElems; ++i) {
195 SDValue V = N->getOperand(i);
196 if (V.getOpcode() != ISD::UNDEF)
203 /// isDebugLabel - Return true if the specified node represents a debug
204 /// label (i.e. ISD::DBG_LABEL or TargetInstrInfo::DBG_LABEL node).
205 bool ISD::isDebugLabel(const SDNode *N) {
207 if (N->getOpcode() == ISD::DBG_LABEL)
209 if (N->isMachineOpcode() &&
210 N->getMachineOpcode() == TargetInstrInfo::DBG_LABEL)
215 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
216 /// when given the operation for (X op Y).
217 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
218 // To perform this operation, we just need to swap the L and G bits of the
220 unsigned OldL = (Operation >> 2) & 1;
221 unsigned OldG = (Operation >> 1) & 1;
222 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
223 (OldL << 1) | // New G bit
224 (OldG << 2)); // New L bit.
227 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
228 /// 'op' is a valid SetCC operation.
229 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
230 unsigned Operation = Op;
232 Operation ^= 7; // Flip L, G, E bits, but not U.
234 Operation ^= 15; // Flip all of the condition bits.
236 if (Operation > ISD::SETTRUE2)
237 Operation &= ~8; // Don't let N and U bits get set.
239 return ISD::CondCode(Operation);
243 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
244 /// signed operation and 2 if the result is an unsigned comparison. Return zero
245 /// if the operation does not depend on the sign of the input (setne and seteq).
246 static int isSignedOp(ISD::CondCode Opcode) {
248 default: llvm_unreachable("Illegal integer setcc operation!");
250 case ISD::SETNE: return 0;
254 case ISD::SETGE: return 1;
258 case ISD::SETUGE: return 2;
262 /// getSetCCOrOperation - Return the result of a logical OR between different
263 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
264 /// returns SETCC_INVALID if it is not possible to represent the resultant
266 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
268 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
269 // Cannot fold a signed integer setcc with an unsigned integer setcc.
270 return ISD::SETCC_INVALID;
272 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
274 // If the N and U bits get set then the resultant comparison DOES suddenly
275 // care about orderedness, and is true when ordered.
276 if (Op > ISD::SETTRUE2)
277 Op &= ~16; // Clear the U bit if the N bit is set.
279 // Canonicalize illegal integer setcc's.
280 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
283 return ISD::CondCode(Op);
286 /// getSetCCAndOperation - Return the result of a logical AND between different
287 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
288 /// function returns zero if it is not possible to represent the resultant
290 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
292 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
293 // Cannot fold a signed setcc with an unsigned setcc.
294 return ISD::SETCC_INVALID;
296 // Combine all of the condition bits.
297 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
299 // Canonicalize illegal integer setcc's.
303 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
304 case ISD::SETOEQ: // SETEQ & SETU[LG]E
305 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
306 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
307 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
314 const TargetMachine &SelectionDAG::getTarget() const {
315 return MF->getTarget();
318 //===----------------------------------------------------------------------===//
319 // SDNode Profile Support
320 //===----------------------------------------------------------------------===//
322 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
324 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
328 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
329 /// solely with their pointer.
330 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
331 ID.AddPointer(VTList.VTs);
334 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
336 static void AddNodeIDOperands(FoldingSetNodeID &ID,
337 const SDValue *Ops, unsigned NumOps) {
338 for (; NumOps; --NumOps, ++Ops) {
339 ID.AddPointer(Ops->getNode());
340 ID.AddInteger(Ops->getResNo());
344 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
346 static void AddNodeIDOperands(FoldingSetNodeID &ID,
347 const SDUse *Ops, unsigned NumOps) {
348 for (; NumOps; --NumOps, ++Ops) {
349 ID.AddPointer(Ops->getNode());
350 ID.AddInteger(Ops->getResNo());
354 static void AddNodeIDNode(FoldingSetNodeID &ID,
355 unsigned short OpC, SDVTList VTList,
356 const SDValue *OpList, unsigned N) {
357 AddNodeIDOpcode(ID, OpC);
358 AddNodeIDValueTypes(ID, VTList);
359 AddNodeIDOperands(ID, OpList, N);
362 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
364 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
365 switch (N->getOpcode()) {
366 case ISD::TargetExternalSymbol:
367 case ISD::ExternalSymbol:
368 llvm_unreachable("Should only be used on nodes with operands");
369 default: break; // Normal nodes don't need extra info.
370 case ISD::TargetConstant:
372 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
374 case ISD::TargetConstantFP:
375 case ISD::ConstantFP: {
376 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
379 case ISD::TargetGlobalAddress:
380 case ISD::GlobalAddress:
381 case ISD::TargetGlobalTLSAddress:
382 case ISD::GlobalTLSAddress: {
383 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
384 ID.AddPointer(GA->getGlobal());
385 ID.AddInteger(GA->getOffset());
386 ID.AddInteger(GA->getTargetFlags());
389 case ISD::BasicBlock:
390 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
393 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
395 case ISD::DBG_STOPPOINT: {
396 const DbgStopPointSDNode *DSP = cast<DbgStopPointSDNode>(N);
397 ID.AddInteger(DSP->getLine());
398 ID.AddInteger(DSP->getColumn());
399 ID.AddPointer(DSP->getCompileUnit());
403 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
405 case ISD::MEMOPERAND: {
406 const MachineMemOperand &MO = cast<MemOperandSDNode>(N)->MO;
410 case ISD::FrameIndex:
411 case ISD::TargetFrameIndex:
412 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
415 case ISD::TargetJumpTable:
416 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
417 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
419 case ISD::ConstantPool:
420 case ISD::TargetConstantPool: {
421 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
422 ID.AddInteger(CP->getAlignment());
423 ID.AddInteger(CP->getOffset());
424 if (CP->isMachineConstantPoolEntry())
425 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID);
427 ID.AddPointer(CP->getConstVal());
428 ID.AddInteger(CP->getTargetFlags());
432 const LoadSDNode *LD = cast<LoadSDNode>(N);
433 ID.AddInteger(LD->getMemoryVT().getRawBits());
434 ID.AddInteger(LD->getRawSubclassData());
438 const StoreSDNode *ST = cast<StoreSDNode>(N);
439 ID.AddInteger(ST->getMemoryVT().getRawBits());
440 ID.AddInteger(ST->getRawSubclassData());
443 case ISD::ATOMIC_CMP_SWAP:
444 case ISD::ATOMIC_SWAP:
445 case ISD::ATOMIC_LOAD_ADD:
446 case ISD::ATOMIC_LOAD_SUB:
447 case ISD::ATOMIC_LOAD_AND:
448 case ISD::ATOMIC_LOAD_OR:
449 case ISD::ATOMIC_LOAD_XOR:
450 case ISD::ATOMIC_LOAD_NAND:
451 case ISD::ATOMIC_LOAD_MIN:
452 case ISD::ATOMIC_LOAD_MAX:
453 case ISD::ATOMIC_LOAD_UMIN:
454 case ISD::ATOMIC_LOAD_UMAX: {
455 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
456 ID.AddInteger(AT->getMemoryVT().getRawBits());
457 ID.AddInteger(AT->getRawSubclassData());
460 case ISD::VECTOR_SHUFFLE: {
461 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
462 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
464 ID.AddInteger(SVN->getMaskElt(i));
467 } // end switch (N->getOpcode())
470 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
472 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
473 AddNodeIDOpcode(ID, N->getOpcode());
474 // Add the return value info.
475 AddNodeIDValueTypes(ID, N->getVTList());
476 // Add the operand info.
477 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
479 // Handle SDNode leafs with special info.
480 AddNodeIDCustom(ID, N);
483 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
484 /// the CSE map that carries alignment, volatility, indexing mode, and
485 /// extension/truncation information.
487 static inline unsigned
488 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM,
489 bool isVolatile, unsigned Alignment) {
490 assert((ConvType & 3) == ConvType &&
491 "ConvType may not require more than 2 bits!");
492 assert((AM & 7) == AM &&
493 "AM may not require more than 3 bits!");
497 ((Log2_32(Alignment) + 1) << 6);
500 //===----------------------------------------------------------------------===//
501 // SelectionDAG Class
502 //===----------------------------------------------------------------------===//
504 /// doNotCSE - Return true if CSE should not be performed for this node.
505 static bool doNotCSE(SDNode *N) {
506 if (N->getValueType(0) == MVT::Flag)
507 return true; // Never CSE anything that produces a flag.
509 switch (N->getOpcode()) {
511 case ISD::HANDLENODE:
513 case ISD::DBG_STOPPOINT:
516 return true; // Never CSE these nodes.
519 // Check that remaining values produced are not flags.
520 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
521 if (N->getValueType(i) == MVT::Flag)
522 return true; // Never CSE anything that produces a flag.
527 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
529 void SelectionDAG::RemoveDeadNodes() {
530 // Create a dummy node (which is not added to allnodes), that adds a reference
531 // to the root node, preventing it from being deleted.
532 HandleSDNode Dummy(getRoot());
534 SmallVector<SDNode*, 128> DeadNodes;
536 // Add all obviously-dead nodes to the DeadNodes worklist.
537 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
539 DeadNodes.push_back(I);
541 RemoveDeadNodes(DeadNodes);
543 // If the root changed (e.g. it was a dead load, update the root).
544 setRoot(Dummy.getValue());
547 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
548 /// given list, and any nodes that become unreachable as a result.
549 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes,
550 DAGUpdateListener *UpdateListener) {
552 // Process the worklist, deleting the nodes and adding their uses to the
554 while (!DeadNodes.empty()) {
555 SDNode *N = DeadNodes.pop_back_val();
558 UpdateListener->NodeDeleted(N, 0);
560 // Take the node out of the appropriate CSE map.
561 RemoveNodeFromCSEMaps(N);
563 // Next, brutally remove the operand list. This is safe to do, as there are
564 // no cycles in the graph.
565 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
567 SDNode *Operand = Use.getNode();
570 // Now that we removed this operand, see if there are no uses of it left.
571 if (Operand->use_empty())
572 DeadNodes.push_back(Operand);
579 void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){
580 SmallVector<SDNode*, 16> DeadNodes(1, N);
581 RemoveDeadNodes(DeadNodes, UpdateListener);
584 void SelectionDAG::DeleteNode(SDNode *N) {
585 // First take this out of the appropriate CSE map.
586 RemoveNodeFromCSEMaps(N);
588 // Finally, remove uses due to operands of this node, remove from the
589 // AllNodes list, and delete the node.
590 DeleteNodeNotInCSEMaps(N);
593 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
594 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
595 assert(N->use_empty() && "Cannot delete a node that is not dead!");
597 // Drop all of the operands and decrement used node's use counts.
603 void SelectionDAG::DeallocateNode(SDNode *N) {
604 if (N->OperandsNeedDelete)
605 delete[] N->OperandList;
607 // Set the opcode to DELETED_NODE to help catch bugs when node
608 // memory is reallocated.
609 N->NodeType = ISD::DELETED_NODE;
611 NodeAllocator.Deallocate(AllNodes.remove(N));
614 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
615 /// correspond to it. This is useful when we're about to delete or repurpose
616 /// the node. We don't want future request for structurally identical nodes
617 /// to return N anymore.
618 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
620 switch (N->getOpcode()) {
621 case ISD::EntryToken:
622 llvm_unreachable("EntryToken should not be in CSEMaps!");
624 case ISD::HANDLENODE: return false; // noop.
626 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
627 "Cond code doesn't exist!");
628 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
629 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
631 case ISD::ExternalSymbol:
632 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
634 case ISD::TargetExternalSymbol: {
635 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
636 Erased = TargetExternalSymbols.erase(
637 std::pair<std::string,unsigned char>(ESN->getSymbol(),
638 ESN->getTargetFlags()));
641 case ISD::VALUETYPE: {
642 EVT VT = cast<VTSDNode>(N)->getVT();
643 if (VT.isExtended()) {
644 Erased = ExtendedValueTypeNodes.erase(VT);
646 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0;
647 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0;
652 // Remove it from the CSE Map.
653 Erased = CSEMap.RemoveNode(N);
657 // Verify that the node was actually in one of the CSE maps, unless it has a
658 // flag result (which cannot be CSE'd) or is one of the special cases that are
659 // not subject to CSE.
660 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag &&
661 !N->isMachineOpcode() && !doNotCSE(N)) {
664 llvm_unreachable("Node is not in map!");
670 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
671 /// maps and modified in place. Add it back to the CSE maps, unless an identical
672 /// node already exists, in which case transfer all its users to the existing
673 /// node. This transfer can potentially trigger recursive merging.
676 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N,
677 DAGUpdateListener *UpdateListener) {
678 // For node types that aren't CSE'd, just act as if no identical node
681 SDNode *Existing = CSEMap.GetOrInsertNode(N);
683 // If there was already an existing matching node, use ReplaceAllUsesWith
684 // to replace the dead one with the existing one. This can cause
685 // recursive merging of other unrelated nodes down the line.
686 ReplaceAllUsesWith(N, Existing, UpdateListener);
688 // N is now dead. Inform the listener if it exists and delete it.
690 UpdateListener->NodeDeleted(N, Existing);
691 DeleteNodeNotInCSEMaps(N);
696 // If the node doesn't already exist, we updated it. Inform a listener if
699 UpdateListener->NodeUpdated(N);
702 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
703 /// were replaced with those specified. If this node is never memoized,
704 /// return null, otherwise return a pointer to the slot it would take. If a
705 /// node already exists with these operands, the slot will be non-null.
706 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
711 SDValue Ops[] = { Op };
713 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
714 AddNodeIDCustom(ID, N);
715 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
718 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
719 /// were replaced with those specified. If this node is never memoized,
720 /// return null, otherwise return a pointer to the slot it would take. If a
721 /// node already exists with these operands, the slot will be non-null.
722 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
723 SDValue Op1, SDValue Op2,
728 SDValue Ops[] = { Op1, Op2 };
730 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
731 AddNodeIDCustom(ID, N);
732 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
736 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
737 /// were replaced with those specified. If this node is never memoized,
738 /// return null, otherwise return a pointer to the slot it would take. If a
739 /// node already exists with these operands, the slot will be non-null.
740 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
741 const SDValue *Ops,unsigned NumOps,
747 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
748 AddNodeIDCustom(ID, N);
749 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
752 /// VerifyNode - Sanity check the given node. Aborts if it is invalid.
753 void SelectionDAG::VerifyNode(SDNode *N) {
754 switch (N->getOpcode()) {
757 case ISD::BUILD_PAIR: {
758 EVT VT = N->getValueType(0);
759 assert(N->getNumValues() == 1 && "Too many results!");
760 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
761 "Wrong return type!");
762 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
763 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
764 "Mismatched operand types!");
765 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
766 "Wrong operand type!");
767 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
768 "Wrong return type size");
771 case ISD::BUILD_VECTOR: {
772 assert(N->getNumValues() == 1 && "Too many results!");
773 assert(N->getValueType(0).isVector() && "Wrong return type!");
774 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
775 "Wrong number of operands!");
776 EVT EltVT = N->getValueType(0).getVectorElementType();
777 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I)
778 assert((I->getValueType() == EltVT ||
779 (EltVT.isInteger() && I->getValueType().isInteger() &&
780 EltVT.bitsLE(I->getValueType()))) &&
781 "Wrong operand type!");
787 /// getEVTAlignment - Compute the default alignment value for the
790 unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
791 const Type *Ty = VT == MVT::iPTR ?
792 PointerType::get(Type::Int8Ty, 0) :
795 return TLI.getTargetData()->getABITypeAlignment(Ty);
798 // EntryNode could meaningfully have debug info if we can find it...
799 SelectionDAG::SelectionDAG(TargetLowering &tli, FunctionLoweringInfo &fli)
800 : TLI(tli), FLI(fli), DW(0),
801 EntryNode(ISD::EntryToken, DebugLoc::getUnknownLoc(),
802 getVTList(MVT::Other)), Root(getEntryNode()) {
803 AllNodes.push_back(&EntryNode);
806 void SelectionDAG::init(MachineFunction &mf, MachineModuleInfo *mmi,
811 Context = &mf.getFunction()->getContext();
814 SelectionDAG::~SelectionDAG() {
818 void SelectionDAG::allnodes_clear() {
819 assert(&*AllNodes.begin() == &EntryNode);
820 AllNodes.remove(AllNodes.begin());
821 while (!AllNodes.empty())
822 DeallocateNode(AllNodes.begin());
825 void SelectionDAG::clear() {
827 OperandAllocator.Reset();
830 ExtendedValueTypeNodes.clear();
831 ExternalSymbols.clear();
832 TargetExternalSymbols.clear();
833 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
834 static_cast<CondCodeSDNode*>(0));
835 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
836 static_cast<SDNode*>(0));
838 EntryNode.UseList = 0;
839 AllNodes.push_back(&EntryNode);
840 Root = getEntryNode();
843 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) {
844 if (Op.getValueType() == VT) return Op;
845 APInt Imm = APInt::getLowBitsSet(Op.getValueSizeInBits(),
847 return getNode(ISD::AND, DL, Op.getValueType(), Op,
848 getConstant(Imm, Op.getValueType()));
851 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
853 SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) {
854 EVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
856 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT);
857 return getNode(ISD::XOR, DL, VT, Val, NegOne);
860 SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) {
861 EVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
862 assert((EltVT.getSizeInBits() >= 64 ||
863 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
864 "getConstant with a uint64_t value that doesn't fit in the type!");
865 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
868 SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) {
869 return getConstant(*ConstantInt::get(*Context, Val), VT, isT);
872 SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) {
873 assert(VT.isInteger() && "Cannot create FP integer constant!");
875 EVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
876 assert(Val.getBitWidth() == EltVT.getSizeInBits() &&
877 "APInt size does not match type size!");
879 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
881 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
885 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
887 return SDValue(N, 0);
889 N = NodeAllocator.Allocate<ConstantSDNode>();
890 new (N) ConstantSDNode(isT, &Val, EltVT);
891 CSEMap.InsertNode(N, IP);
892 AllNodes.push_back(N);
895 SDValue Result(N, 0);
897 SmallVector<SDValue, 8> Ops;
898 Ops.assign(VT.getVectorNumElements(), Result);
899 Result = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(),
900 VT, &Ops[0], Ops.size());
905 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
906 return getConstant(Val, TLI.getPointerTy(), isTarget);
910 SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) {
911 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget);
914 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){
915 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
918 VT.isVector() ? VT.getVectorElementType() : VT;
920 // Do the map lookup using the actual bit pattern for the floating point
921 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
922 // we don't have issues with SNANs.
923 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
925 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
929 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
931 return SDValue(N, 0);
933 N = NodeAllocator.Allocate<ConstantFPSDNode>();
934 new (N) ConstantFPSDNode(isTarget, &V, EltVT);
935 CSEMap.InsertNode(N, IP);
936 AllNodes.push_back(N);
939 SDValue Result(N, 0);
941 SmallVector<SDValue, 8> Ops;
942 Ops.assign(VT.getVectorNumElements(), Result);
943 // FIXME DebugLoc info might be appropriate here
944 Result = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(),
945 VT, &Ops[0], Ops.size());
950 SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) {
952 VT.isVector() ? VT.getVectorElementType() : VT;
954 return getConstantFP(APFloat((float)Val), VT, isTarget);
956 return getConstantFP(APFloat(Val), VT, isTarget);
959 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV,
960 EVT VT, int64_t Offset,
962 unsigned char TargetFlags) {
963 assert((TargetFlags == 0 || isTargetGA) &&
964 "Cannot set target flags on target-independent globals");
966 // Truncate (with sign-extension) the offset value to the pointer size.
967 EVT PTy = TLI.getPointerTy();
968 unsigned BitWidth = PTy.getSizeInBits();
970 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth));
972 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
974 // If GV is an alias then use the aliasee for determining thread-localness.
975 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
976 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
980 if (GVar && GVar->isThreadLocal())
981 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
983 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
986 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
988 ID.AddInteger(Offset);
989 ID.AddInteger(TargetFlags);
991 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
992 return SDValue(E, 0);
993 SDNode *N = NodeAllocator.Allocate<GlobalAddressSDNode>();
994 new (N) GlobalAddressSDNode(Opc, GV, VT, Offset, TargetFlags);
995 CSEMap.InsertNode(N, IP);
996 AllNodes.push_back(N);
997 return SDValue(N, 0);
1000 SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
1001 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1002 FoldingSetNodeID ID;
1003 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1006 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1007 return SDValue(E, 0);
1008 SDNode *N = NodeAllocator.Allocate<FrameIndexSDNode>();
1009 new (N) FrameIndexSDNode(FI, VT, isTarget);
1010 CSEMap.InsertNode(N, IP);
1011 AllNodes.push_back(N);
1012 return SDValue(N, 0);
1015 SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
1016 unsigned char TargetFlags) {
1017 assert((TargetFlags == 0 || isTarget) &&
1018 "Cannot set target flags on target-independent jump tables");
1019 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1020 FoldingSetNodeID ID;
1021 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1023 ID.AddInteger(TargetFlags);
1025 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1026 return SDValue(E, 0);
1027 SDNode *N = NodeAllocator.Allocate<JumpTableSDNode>();
1028 new (N) JumpTableSDNode(JTI, VT, isTarget, TargetFlags);
1029 CSEMap.InsertNode(N, IP);
1030 AllNodes.push_back(N);
1031 return SDValue(N, 0);
1034 SDValue SelectionDAG::getConstantPool(Constant *C, EVT VT,
1035 unsigned Alignment, int Offset,
1037 unsigned char TargetFlags) {
1038 assert((TargetFlags == 0 || isTarget) &&
1039 "Cannot set target flags on target-independent globals");
1041 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1042 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1043 FoldingSetNodeID ID;
1044 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1045 ID.AddInteger(Alignment);
1046 ID.AddInteger(Offset);
1048 ID.AddInteger(TargetFlags);
1050 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1051 return SDValue(E, 0);
1052 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>();
1053 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment, TargetFlags);
1054 CSEMap.InsertNode(N, IP);
1055 AllNodes.push_back(N);
1056 return SDValue(N, 0);
1060 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
1061 unsigned Alignment, int Offset,
1063 unsigned char TargetFlags) {
1064 assert((TargetFlags == 0 || isTarget) &&
1065 "Cannot set target flags on target-independent globals");
1067 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1068 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1069 FoldingSetNodeID ID;
1070 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1071 ID.AddInteger(Alignment);
1072 ID.AddInteger(Offset);
1073 C->AddSelectionDAGCSEId(ID);
1074 ID.AddInteger(TargetFlags);
1076 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1077 return SDValue(E, 0);
1078 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>();
1079 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment, TargetFlags);
1080 CSEMap.InsertNode(N, IP);
1081 AllNodes.push_back(N);
1082 return SDValue(N, 0);
1085 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1086 FoldingSetNodeID ID;
1087 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1090 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1091 return SDValue(E, 0);
1092 SDNode *N = NodeAllocator.Allocate<BasicBlockSDNode>();
1093 new (N) BasicBlockSDNode(MBB);
1094 CSEMap.InsertNode(N, IP);
1095 AllNodes.push_back(N);
1096 return SDValue(N, 0);
1099 SDValue SelectionDAG::getValueType(EVT VT) {
1100 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
1101 ValueTypeNodes.size())
1102 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
1104 SDNode *&N = VT.isExtended() ?
1105 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
1107 if (N) return SDValue(N, 0);
1108 N = NodeAllocator.Allocate<VTSDNode>();
1109 new (N) VTSDNode(VT);
1110 AllNodes.push_back(N);
1111 return SDValue(N, 0);
1114 SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
1115 SDNode *&N = ExternalSymbols[Sym];
1116 if (N) return SDValue(N, 0);
1117 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1118 new (N) ExternalSymbolSDNode(false, Sym, 0, VT);
1119 AllNodes.push_back(N);
1120 return SDValue(N, 0);
1123 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
1124 unsigned char TargetFlags) {
1126 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1128 if (N) return SDValue(N, 0);
1129 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1130 new (N) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1131 AllNodes.push_back(N);
1132 return SDValue(N, 0);
1135 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1136 if ((unsigned)Cond >= CondCodeNodes.size())
1137 CondCodeNodes.resize(Cond+1);
1139 if (CondCodeNodes[Cond] == 0) {
1140 CondCodeSDNode *N = NodeAllocator.Allocate<CondCodeSDNode>();
1141 new (N) CondCodeSDNode(Cond);
1142 CondCodeNodes[Cond] = N;
1143 AllNodes.push_back(N);
1145 return SDValue(CondCodeNodes[Cond], 0);
1148 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1149 // the shuffle mask M that point at N1 to point at N2, and indices that point
1150 // N2 to point at N1.
1151 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1153 int NElts = M.size();
1154 for (int i = 0; i != NElts; ++i) {
1162 SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1,
1163 SDValue N2, const int *Mask) {
1164 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE");
1165 assert(VT.isVector() && N1.getValueType().isVector() &&
1166 "Vector Shuffle VTs must be a vectors");
1167 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType()
1168 && "Vector Shuffle VTs must have same element type");
1170 // Canonicalize shuffle undef, undef -> undef
1171 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1172 return getUNDEF(VT);
1174 // Validate that all indices in Mask are within the range of the elements
1175 // input to the shuffle.
1176 unsigned NElts = VT.getVectorNumElements();
1177 SmallVector<int, 8> MaskVec;
1178 for (unsigned i = 0; i != NElts; ++i) {
1179 assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1180 MaskVec.push_back(Mask[i]);
1183 // Canonicalize shuffle v, v -> v, undef
1186 for (unsigned i = 0; i != NElts; ++i)
1187 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1190 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1191 if (N1.getOpcode() == ISD::UNDEF)
1192 commuteShuffle(N1, N2, MaskVec);
1194 // Canonicalize all index into lhs, -> shuffle lhs, undef
1195 // Canonicalize all index into rhs, -> shuffle rhs, undef
1196 bool AllLHS = true, AllRHS = true;
1197 bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1198 for (unsigned i = 0; i != NElts; ++i) {
1199 if (MaskVec[i] >= (int)NElts) {
1204 } else if (MaskVec[i] >= 0) {
1208 if (AllLHS && AllRHS)
1209 return getUNDEF(VT);
1210 if (AllLHS && !N2Undef)
1214 commuteShuffle(N1, N2, MaskVec);
1217 // If Identity shuffle, or all shuffle in to undef, return that node.
1218 bool AllUndef = true;
1219 bool Identity = true;
1220 for (unsigned i = 0; i != NElts; ++i) {
1221 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1222 if (MaskVec[i] >= 0) AllUndef = false;
1224 if (Identity && NElts == N1.getValueType().getVectorNumElements())
1227 return getUNDEF(VT);
1229 FoldingSetNodeID ID;
1230 SDValue Ops[2] = { N1, N2 };
1231 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2);
1232 for (unsigned i = 0; i != NElts; ++i)
1233 ID.AddInteger(MaskVec[i]);
1236 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1237 return SDValue(E, 0);
1239 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1240 // SDNode doesn't have access to it. This memory will be "leaked" when
1241 // the node is deallocated, but recovered when the NodeAllocator is released.
1242 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1243 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1245 ShuffleVectorSDNode *N = NodeAllocator.Allocate<ShuffleVectorSDNode>();
1246 new (N) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc);
1247 CSEMap.InsertNode(N, IP);
1248 AllNodes.push_back(N);
1249 return SDValue(N, 0);
1252 SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl,
1253 SDValue Val, SDValue DTy,
1254 SDValue STy, SDValue Rnd, SDValue Sat,
1255 ISD::CvtCode Code) {
1256 // If the src and dest types are the same and the conversion is between
1257 // integer types of the same sign or two floats, no conversion is necessary.
1259 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1262 FoldingSetNodeID ID;
1264 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1265 return SDValue(E, 0);
1266 CvtRndSatSDNode *N = NodeAllocator.Allocate<CvtRndSatSDNode>();
1267 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1268 new (N) CvtRndSatSDNode(VT, dl, Ops, 5, Code);
1269 CSEMap.InsertNode(N, IP);
1270 AllNodes.push_back(N);
1271 return SDValue(N, 0);
1274 SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
1275 FoldingSetNodeID ID;
1276 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1277 ID.AddInteger(RegNo);
1279 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1280 return SDValue(E, 0);
1281 SDNode *N = NodeAllocator.Allocate<RegisterSDNode>();
1282 new (N) RegisterSDNode(RegNo, VT);
1283 CSEMap.InsertNode(N, IP);
1284 AllNodes.push_back(N);
1285 return SDValue(N, 0);
1288 SDValue SelectionDAG::getDbgStopPoint(DebugLoc DL, SDValue Root,
1289 unsigned Line, unsigned Col,
1291 SDNode *N = NodeAllocator.Allocate<DbgStopPointSDNode>();
1292 new (N) DbgStopPointSDNode(Root, Line, Col, CU);
1294 AllNodes.push_back(N);
1295 return SDValue(N, 0);
1298 SDValue SelectionDAG::getLabel(unsigned Opcode, DebugLoc dl,
1301 FoldingSetNodeID ID;
1302 SDValue Ops[] = { Root };
1303 AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), &Ops[0], 1);
1304 ID.AddInteger(LabelID);
1306 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1307 return SDValue(E, 0);
1308 SDNode *N = NodeAllocator.Allocate<LabelSDNode>();
1309 new (N) LabelSDNode(Opcode, dl, Root, LabelID);
1310 CSEMap.InsertNode(N, IP);
1311 AllNodes.push_back(N);
1312 return SDValue(N, 0);
1315 SDValue SelectionDAG::getSrcValue(const Value *V) {
1316 assert((!V || isa<PointerType>(V->getType())) &&
1317 "SrcValue is not a pointer?");
1319 FoldingSetNodeID ID;
1320 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1324 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1325 return SDValue(E, 0);
1327 SDNode *N = NodeAllocator.Allocate<SrcValueSDNode>();
1328 new (N) SrcValueSDNode(V);
1329 CSEMap.InsertNode(N, IP);
1330 AllNodes.push_back(N);
1331 return SDValue(N, 0);
1334 SDValue SelectionDAG::getMemOperand(const MachineMemOperand &MO) {
1336 const Value *v = MO.getValue();
1337 assert((!v || isa<PointerType>(v->getType())) &&
1338 "SrcValue is not a pointer?");
1341 FoldingSetNodeID ID;
1342 AddNodeIDNode(ID, ISD::MEMOPERAND, getVTList(MVT::Other), 0, 0);
1346 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1347 return SDValue(E, 0);
1349 SDNode *N = NodeAllocator.Allocate<MemOperandSDNode>();
1350 new (N) MemOperandSDNode(MO);
1351 CSEMap.InsertNode(N, IP);
1352 AllNodes.push_back(N);
1353 return SDValue(N, 0);
1356 /// getShiftAmountOperand - Return the specified value casted to
1357 /// the target's desired shift amount type.
1358 SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) {
1359 EVT OpTy = Op.getValueType();
1360 EVT ShTy = TLI.getShiftAmountTy();
1361 if (OpTy == ShTy || OpTy.isVector()) return Op;
1363 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1364 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op);
1367 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1368 /// specified value type.
1369 SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
1370 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1371 unsigned ByteSize = VT.getStoreSizeInBits()/8;
1372 const Type *Ty = VT.getTypeForEVT();
1373 unsigned StackAlign =
1374 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign);
1376 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign);
1377 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1380 /// CreateStackTemporary - Create a stack temporary suitable for holding
1381 /// either of the specified value types.
1382 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
1383 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1384 VT2.getStoreSizeInBits())/8;
1385 const Type *Ty1 = VT1.getTypeForEVT();
1386 const Type *Ty2 = VT2.getTypeForEVT();
1387 const TargetData *TD = TLI.getTargetData();
1388 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1389 TD->getPrefTypeAlignment(Ty2));
1391 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1392 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align);
1393 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1396 SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
1397 SDValue N2, ISD::CondCode Cond, DebugLoc dl) {
1398 // These setcc operations always fold.
1402 case ISD::SETFALSE2: return getConstant(0, VT);
1404 case ISD::SETTRUE2: return getConstant(1, VT);
1416 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1420 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1421 const APInt &C2 = N2C->getAPIntValue();
1422 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1423 const APInt &C1 = N1C->getAPIntValue();
1426 default: llvm_unreachable("Unknown integer setcc!");
1427 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1428 case ISD::SETNE: return getConstant(C1 != C2, VT);
1429 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1430 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1431 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1432 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1433 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1434 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1435 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1436 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1440 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1441 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1442 // No compile time operations on this type yet.
1443 if (N1C->getValueType(0) == MVT::ppcf128)
1446 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1449 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1450 return getUNDEF(VT);
1452 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1453 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1454 return getUNDEF(VT);
1456 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1457 R==APFloat::cmpLessThan, VT);
1458 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1459 return getUNDEF(VT);
1461 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1462 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1463 return getUNDEF(VT);
1465 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1466 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1467 return getUNDEF(VT);
1469 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1470 R==APFloat::cmpEqual, VT);
1471 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1472 return getUNDEF(VT);
1474 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1475 R==APFloat::cmpEqual, VT);
1476 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1477 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1478 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1479 R==APFloat::cmpEqual, VT);
1480 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1481 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1482 R==APFloat::cmpLessThan, VT);
1483 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1484 R==APFloat::cmpUnordered, VT);
1485 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1486 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1489 // Ensure that the constant occurs on the RHS.
1490 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1494 // Could not fold it.
1498 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1499 /// use this predicate to simplify operations downstream.
1500 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1501 // This predicate is not safe for vector operations.
1502 if (Op.getValueType().isVector())
1505 unsigned BitWidth = Op.getValueSizeInBits();
1506 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1509 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1510 /// this predicate to simplify operations downstream. Mask is known to be zero
1511 /// for bits that V cannot have.
1512 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1513 unsigned Depth) const {
1514 APInt KnownZero, KnownOne;
1515 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
1516 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1517 return (KnownZero & Mask) == Mask;
1520 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1521 /// known to be either zero or one and return them in the KnownZero/KnownOne
1522 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1524 void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask,
1525 APInt &KnownZero, APInt &KnownOne,
1526 unsigned Depth) const {
1527 unsigned BitWidth = Mask.getBitWidth();
1528 assert(BitWidth == Op.getValueType().getSizeInBits() &&
1529 "Mask size mismatches value type size!");
1531 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1532 if (Depth == 6 || Mask == 0)
1533 return; // Limit search depth.
1535 APInt KnownZero2, KnownOne2;
1537 switch (Op.getOpcode()) {
1539 // We know all of the bits for a constant!
1540 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask;
1541 KnownZero = ~KnownOne & Mask;
1544 // If either the LHS or the RHS are Zero, the result is zero.
1545 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1546 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero,
1547 KnownZero2, KnownOne2, Depth+1);
1548 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1549 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1551 // Output known-1 bits are only known if set in both the LHS & RHS.
1552 KnownOne &= KnownOne2;
1553 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1554 KnownZero |= KnownZero2;
1557 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1558 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne,
1559 KnownZero2, KnownOne2, Depth+1);
1560 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1561 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1563 // Output known-0 bits are only known if clear in both the LHS & RHS.
1564 KnownZero &= KnownZero2;
1565 // Output known-1 are known to be set if set in either the LHS | RHS.
1566 KnownOne |= KnownOne2;
1569 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1570 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
1571 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1572 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1574 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1575 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1576 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1577 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1578 KnownZero = KnownZeroOut;
1582 APInt Mask2 = APInt::getAllOnesValue(BitWidth);
1583 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1);
1584 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1585 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1586 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1588 // If low bits are zero in either operand, output low known-0 bits.
1589 // Also compute a conserative estimate for high known-0 bits.
1590 // More trickiness is possible, but this is sufficient for the
1591 // interesting case of alignment computation.
1593 unsigned TrailZ = KnownZero.countTrailingOnes() +
1594 KnownZero2.countTrailingOnes();
1595 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1596 KnownZero2.countLeadingOnes(),
1597 BitWidth) - BitWidth;
1599 TrailZ = std::min(TrailZ, BitWidth);
1600 LeadZ = std::min(LeadZ, BitWidth);
1601 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1602 APInt::getHighBitsSet(BitWidth, LeadZ);
1607 // For the purposes of computing leading zeros we can conservatively
1608 // treat a udiv as a logical right shift by the power of 2 known to
1609 // be less than the denominator.
1610 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1611 ComputeMaskedBits(Op.getOperand(0),
1612 AllOnes, KnownZero2, KnownOne2, Depth+1);
1613 unsigned LeadZ = KnownZero2.countLeadingOnes();
1617 ComputeMaskedBits(Op.getOperand(1),
1618 AllOnes, KnownZero2, KnownOne2, Depth+1);
1619 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1620 if (RHSUnknownLeadingOnes != BitWidth)
1621 LeadZ = std::min(BitWidth,
1622 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1624 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask;
1628 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1);
1629 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1);
1630 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1631 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1633 // Only known if known in both the LHS and RHS.
1634 KnownOne &= KnownOne2;
1635 KnownZero &= KnownZero2;
1637 case ISD::SELECT_CC:
1638 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1);
1639 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1);
1640 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1641 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1643 // Only known if known in both the LHS and RHS.
1644 KnownOne &= KnownOne2;
1645 KnownZero &= KnownZero2;
1653 if (Op.getResNo() != 1)
1655 // The boolean result conforms to getBooleanContents. Fall through.
1657 // If we know the result of a setcc has the top bits zero, use this info.
1658 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent &&
1660 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1663 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1664 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1665 unsigned ShAmt = SA->getZExtValue();
1667 // If the shift count is an invalid immediate, don't do anything.
1668 if (ShAmt >= BitWidth)
1671 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt),
1672 KnownZero, KnownOne, Depth+1);
1673 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1674 KnownZero <<= ShAmt;
1676 // low bits known zero.
1677 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1681 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1682 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1683 unsigned ShAmt = SA->getZExtValue();
1685 // If the shift count is an invalid immediate, don't do anything.
1686 if (ShAmt >= BitWidth)
1689 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt),
1690 KnownZero, KnownOne, Depth+1);
1691 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1692 KnownZero = KnownZero.lshr(ShAmt);
1693 KnownOne = KnownOne.lshr(ShAmt);
1695 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1696 KnownZero |= HighBits; // High bits known zero.
1700 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1701 unsigned ShAmt = SA->getZExtValue();
1703 // If the shift count is an invalid immediate, don't do anything.
1704 if (ShAmt >= BitWidth)
1707 APInt InDemandedMask = (Mask << ShAmt);
1708 // If any of the demanded bits are produced by the sign extension, we also
1709 // demand the input sign bit.
1710 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1711 if (HighBits.getBoolValue())
1712 InDemandedMask |= APInt::getSignBit(BitWidth);
1714 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne,
1716 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1717 KnownZero = KnownZero.lshr(ShAmt);
1718 KnownOne = KnownOne.lshr(ShAmt);
1720 // Handle the sign bits.
1721 APInt SignBit = APInt::getSignBit(BitWidth);
1722 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1724 if (KnownZero.intersects(SignBit)) {
1725 KnownZero |= HighBits; // New bits are known zero.
1726 } else if (KnownOne.intersects(SignBit)) {
1727 KnownOne |= HighBits; // New bits are known one.
1731 case ISD::SIGN_EXTEND_INREG: {
1732 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1733 unsigned EBits = EVT.getSizeInBits();
1735 // Sign extension. Compute the demanded bits in the result that are not
1736 // present in the input.
1737 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask;
1739 APInt InSignBit = APInt::getSignBit(EBits);
1740 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits);
1742 // If the sign extended bits are demanded, we know that the sign
1744 InSignBit.zext(BitWidth);
1745 if (NewBits.getBoolValue())
1746 InputDemandedBits |= InSignBit;
1748 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits,
1749 KnownZero, KnownOne, Depth+1);
1750 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1752 // If the sign bit of the input is known set or clear, then we know the
1753 // top bits of the result.
1754 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1755 KnownZero |= NewBits;
1756 KnownOne &= ~NewBits;
1757 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1758 KnownOne |= NewBits;
1759 KnownZero &= ~NewBits;
1760 } else { // Input sign bit unknown
1761 KnownZero &= ~NewBits;
1762 KnownOne &= ~NewBits;
1769 unsigned LowBits = Log2_32(BitWidth)+1;
1770 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1775 if (ISD::isZEXTLoad(Op.getNode())) {
1776 LoadSDNode *LD = cast<LoadSDNode>(Op);
1777 EVT VT = LD->getMemoryVT();
1778 unsigned MemBits = VT.getSizeInBits();
1779 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask;
1783 case ISD::ZERO_EXTEND: {
1784 EVT InVT = Op.getOperand(0).getValueType();
1785 unsigned InBits = InVT.getSizeInBits();
1786 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1787 APInt InMask = Mask;
1788 InMask.trunc(InBits);
1789 KnownZero.trunc(InBits);
1790 KnownOne.trunc(InBits);
1791 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1792 KnownZero.zext(BitWidth);
1793 KnownOne.zext(BitWidth);
1794 KnownZero |= NewBits;
1797 case ISD::SIGN_EXTEND: {
1798 EVT InVT = Op.getOperand(0).getValueType();
1799 unsigned InBits = InVT.getSizeInBits();
1800 APInt InSignBit = APInt::getSignBit(InBits);
1801 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1802 APInt InMask = Mask;
1803 InMask.trunc(InBits);
1805 // If any of the sign extended bits are demanded, we know that the sign
1806 // bit is demanded. Temporarily set this bit in the mask for our callee.
1807 if (NewBits.getBoolValue())
1808 InMask |= InSignBit;
1810 KnownZero.trunc(InBits);
1811 KnownOne.trunc(InBits);
1812 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1814 // Note if the sign bit is known to be zero or one.
1815 bool SignBitKnownZero = KnownZero.isNegative();
1816 bool SignBitKnownOne = KnownOne.isNegative();
1817 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1818 "Sign bit can't be known to be both zero and one!");
1820 // If the sign bit wasn't actually demanded by our caller, we don't
1821 // want it set in the KnownZero and KnownOne result values. Reset the
1822 // mask and reapply it to the result values.
1824 InMask.trunc(InBits);
1825 KnownZero &= InMask;
1828 KnownZero.zext(BitWidth);
1829 KnownOne.zext(BitWidth);
1831 // If the sign bit is known zero or one, the top bits match.
1832 if (SignBitKnownZero)
1833 KnownZero |= NewBits;
1834 else if (SignBitKnownOne)
1835 KnownOne |= NewBits;
1838 case ISD::ANY_EXTEND: {
1839 EVT InVT = Op.getOperand(0).getValueType();
1840 unsigned InBits = InVT.getSizeInBits();
1841 APInt InMask = Mask;
1842 InMask.trunc(InBits);
1843 KnownZero.trunc(InBits);
1844 KnownOne.trunc(InBits);
1845 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1846 KnownZero.zext(BitWidth);
1847 KnownOne.zext(BitWidth);
1850 case ISD::TRUNCATE: {
1851 EVT InVT = Op.getOperand(0).getValueType();
1852 unsigned InBits = InVT.getSizeInBits();
1853 APInt InMask = Mask;
1854 InMask.zext(InBits);
1855 KnownZero.zext(InBits);
1856 KnownOne.zext(InBits);
1857 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1858 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1859 KnownZero.trunc(BitWidth);
1860 KnownOne.trunc(BitWidth);
1863 case ISD::AssertZext: {
1864 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1865 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1866 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
1868 KnownZero |= (~InMask) & Mask;
1872 // All bits are zero except the low bit.
1873 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1877 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
1878 // We know that the top bits of C-X are clear if X contains less bits
1879 // than C (i.e. no wrap-around can happen). For example, 20-X is
1880 // positive if we can prove that X is >= 0 and < 16.
1881 if (CLHS->getAPIntValue().isNonNegative()) {
1882 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
1883 // NLZ can't be BitWidth with no sign bit
1884 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
1885 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2,
1888 // If all of the MaskV bits are known to be zero, then we know the
1889 // output top bits are zero, because we now know that the output is
1891 if ((KnownZero2 & MaskV) == MaskV) {
1892 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
1893 // Top bits known zero.
1894 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask;
1901 // Output known-0 bits are known if clear or set in both the low clear bits
1902 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
1903 // low 3 bits clear.
1904 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes());
1905 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1906 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1907 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
1909 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1);
1910 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1911 KnownZeroOut = std::min(KnownZeroOut,
1912 KnownZero2.countTrailingOnes());
1914 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
1918 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1919 const APInt &RA = Rem->getAPIntValue();
1920 if (RA.isPowerOf2() || (-RA).isPowerOf2()) {
1921 APInt LowBits = RA.isStrictlyPositive() ? (RA - 1) : ~RA;
1922 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
1923 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1);
1925 // If the sign bit of the first operand is zero, the sign bit of
1926 // the result is zero. If the first operand has no one bits below
1927 // the second operand's single 1 bit, its sign will be zero.
1928 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
1929 KnownZero2 |= ~LowBits;
1931 KnownZero |= KnownZero2 & Mask;
1933 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1938 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1939 const APInt &RA = Rem->getAPIntValue();
1940 if (RA.isPowerOf2()) {
1941 APInt LowBits = (RA - 1);
1942 APInt Mask2 = LowBits & Mask;
1943 KnownZero |= ~LowBits & Mask;
1944 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1);
1945 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1950 // Since the result is less than or equal to either operand, any leading
1951 // zero bits in either operand must also exist in the result.
1952 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1953 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne,
1955 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2,
1958 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
1959 KnownZero2.countLeadingOnes());
1961 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
1965 // Allow the target to implement this method for its nodes.
1966 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) {
1967 case ISD::INTRINSIC_WO_CHAIN:
1968 case ISD::INTRINSIC_W_CHAIN:
1969 case ISD::INTRINSIC_VOID:
1970 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this,
1977 /// ComputeNumSignBits - Return the number of times the sign bit of the
1978 /// register is replicated into the other bits. We know that at least 1 bit
1979 /// is always equal to the sign bit (itself), but other cases can give us
1980 /// information. For example, immediately after an "SRA X, 2", we know that
1981 /// the top 3 bits are all equal to each other, so we return 3.
1982 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
1983 EVT VT = Op.getValueType();
1984 assert(VT.isInteger() && "Invalid VT!");
1985 unsigned VTBits = VT.getSizeInBits();
1987 unsigned FirstAnswer = 1;
1990 return 1; // Limit search depth.
1992 switch (Op.getOpcode()) {
1994 case ISD::AssertSext:
1995 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1996 return VTBits-Tmp+1;
1997 case ISD::AssertZext:
1998 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2001 case ISD::Constant: {
2002 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2003 // If negative, return # leading ones.
2004 if (Val.isNegative())
2005 return Val.countLeadingOnes();
2007 // Return # leading zeros.
2008 return Val.countLeadingZeros();
2011 case ISD::SIGN_EXTEND:
2012 Tmp = VTBits-Op.getOperand(0).getValueType().getSizeInBits();
2013 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2015 case ISD::SIGN_EXTEND_INREG:
2016 // Max of the input and what this extends.
2017 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2020 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2021 return std::max(Tmp, Tmp2);
2024 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2025 // SRA X, C -> adds C sign bits.
2026 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2027 Tmp += C->getZExtValue();
2028 if (Tmp > VTBits) Tmp = VTBits;
2032 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2033 // shl destroys sign bits.
2034 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2035 if (C->getZExtValue() >= VTBits || // Bad shift.
2036 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
2037 return Tmp - C->getZExtValue();
2042 case ISD::XOR: // NOT is handled here.
2043 // Logical binary ops preserve the number of sign bits at the worst.
2044 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2046 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2047 FirstAnswer = std::min(Tmp, Tmp2);
2048 // We computed what we know about the sign bits as our first
2049 // answer. Now proceed to the generic code that uses
2050 // ComputeMaskedBits, and pick whichever answer is better.
2055 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2056 if (Tmp == 1) return 1; // Early out.
2057 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2058 return std::min(Tmp, Tmp2);
2066 if (Op.getResNo() != 1)
2068 // The boolean result conforms to getBooleanContents. Fall through.
2070 // If setcc returns 0/-1, all bits are sign bits.
2071 if (TLI.getBooleanContents() ==
2072 TargetLowering::ZeroOrNegativeOneBooleanContent)
2077 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2078 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2080 // Handle rotate right by N like a rotate left by 32-N.
2081 if (Op.getOpcode() == ISD::ROTR)
2082 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2084 // If we aren't rotating out all of the known-in sign bits, return the
2085 // number that are left. This handles rotl(sext(x), 1) for example.
2086 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2087 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2091 // Add can have at most one carry bit. Thus we know that the output
2092 // is, at worst, one more bit than the inputs.
2093 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2094 if (Tmp == 1) return 1; // Early out.
2096 // Special case decrementing a value (ADD X, -1):
2097 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2098 if (CRHS->isAllOnesValue()) {
2099 APInt KnownZero, KnownOne;
2100 APInt Mask = APInt::getAllOnesValue(VTBits);
2101 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
2103 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2105 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2108 // If we are subtracting one from a positive number, there is no carry
2109 // out of the result.
2110 if (KnownZero.isNegative())
2114 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2115 if (Tmp2 == 1) return 1;
2116 return std::min(Tmp, Tmp2)-1;
2120 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2121 if (Tmp2 == 1) return 1;
2124 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2125 if (CLHS->isNullValue()) {
2126 APInt KnownZero, KnownOne;
2127 APInt Mask = APInt::getAllOnesValue(VTBits);
2128 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
2129 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2131 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2134 // If the input is known to be positive (the sign bit is known clear),
2135 // the output of the NEG has the same number of sign bits as the input.
2136 if (KnownZero.isNegative())
2139 // Otherwise, we treat this like a SUB.
2142 // Sub can have at most one carry bit. Thus we know that the output
2143 // is, at worst, one more bit than the inputs.
2144 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2145 if (Tmp == 1) return 1; // Early out.
2146 return std::min(Tmp, Tmp2)-1;
2149 // FIXME: it's tricky to do anything useful for this, but it is an important
2150 // case for targets like X86.
2154 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2155 if (Op.getOpcode() == ISD::LOAD) {
2156 LoadSDNode *LD = cast<LoadSDNode>(Op);
2157 unsigned ExtType = LD->getExtensionType();
2160 case ISD::SEXTLOAD: // '17' bits known
2161 Tmp = LD->getMemoryVT().getSizeInBits();
2162 return VTBits-Tmp+1;
2163 case ISD::ZEXTLOAD: // '16' bits known
2164 Tmp = LD->getMemoryVT().getSizeInBits();
2169 // Allow the target to implement this method for its nodes.
2170 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2171 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2172 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2173 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2174 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2175 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2178 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2179 // use this information.
2180 APInt KnownZero, KnownOne;
2181 APInt Mask = APInt::getAllOnesValue(VTBits);
2182 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
2184 if (KnownZero.isNegative()) { // sign bit is 0
2186 } else if (KnownOne.isNegative()) { // sign bit is 1;
2193 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2194 // the number of identical bits in the top of the input value.
2196 Mask <<= Mask.getBitWidth()-VTBits;
2197 // Return # leading zeros. We use 'min' here in case Val was zero before
2198 // shifting. We don't want to return '64' as for an i32 "0".
2199 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2203 bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const {
2204 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op);
2205 if (!GA) return false;
2206 if (GA->getOffset() != 0) return false;
2207 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal());
2208 if (!GV) return false;
2209 MachineModuleInfo *MMI = getMachineModuleInfo();
2210 return MMI && MMI->hasDebugInfo();
2214 /// getShuffleScalarElt - Returns the scalar element that will make up the ith
2215 /// element of the result of the vector shuffle.
2216 SDValue SelectionDAG::getShuffleScalarElt(const ShuffleVectorSDNode *N,
2218 EVT VT = N->getValueType(0);
2219 DebugLoc dl = N->getDebugLoc();
2220 if (N->getMaskElt(i) < 0)
2221 return getUNDEF(VT.getVectorElementType());
2222 unsigned Index = N->getMaskElt(i);
2223 unsigned NumElems = VT.getVectorNumElements();
2224 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1);
2227 if (V.getOpcode() == ISD::BIT_CONVERT) {
2228 V = V.getOperand(0);
2229 EVT VVT = V.getValueType();
2230 if (!VVT.isVector() || VVT.getVectorNumElements() != (unsigned)NumElems)
2233 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR)
2234 return (Index == 0) ? V.getOperand(0)
2235 : getUNDEF(VT.getVectorElementType());
2236 if (V.getOpcode() == ISD::BUILD_VECTOR)
2237 return V.getOperand(Index);
2238 if (const ShuffleVectorSDNode *SVN = dyn_cast<ShuffleVectorSDNode>(V))
2239 return getShuffleScalarElt(SVN, Index);
2244 /// getNode - Gets or creates the specified node.
2246 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) {
2247 FoldingSetNodeID ID;
2248 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2250 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2251 return SDValue(E, 0);
2252 SDNode *N = NodeAllocator.Allocate<SDNode>();
2253 new (N) SDNode(Opcode, DL, getVTList(VT));
2254 CSEMap.InsertNode(N, IP);
2256 AllNodes.push_back(N);
2260 return SDValue(N, 0);
2263 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
2264 EVT VT, SDValue Operand) {
2265 // Constant fold unary operations with an integer constant operand.
2266 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2267 const APInt &Val = C->getAPIntValue();
2268 unsigned BitWidth = VT.getSizeInBits();
2271 case ISD::SIGN_EXTEND:
2272 return getConstant(APInt(Val).sextOrTrunc(BitWidth), VT);
2273 case ISD::ANY_EXTEND:
2274 case ISD::ZERO_EXTEND:
2276 return getConstant(APInt(Val).zextOrTrunc(BitWidth), VT);
2277 case ISD::UINT_TO_FP:
2278 case ISD::SINT_TO_FP: {
2279 const uint64_t zero[] = {0, 0};
2280 // No compile time operations on this type.
2281 if (VT==MVT::ppcf128)
2283 APFloat apf = APFloat(APInt(BitWidth, 2, zero));
2284 (void)apf.convertFromAPInt(Val,
2285 Opcode==ISD::SINT_TO_FP,
2286 APFloat::rmNearestTiesToEven);
2287 return getConstantFP(apf, VT);
2289 case ISD::BIT_CONVERT:
2290 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2291 return getConstantFP(Val.bitsToFloat(), VT);
2292 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2293 return getConstantFP(Val.bitsToDouble(), VT);
2296 return getConstant(Val.byteSwap(), VT);
2298 return getConstant(Val.countPopulation(), VT);
2300 return getConstant(Val.countLeadingZeros(), VT);
2302 return getConstant(Val.countTrailingZeros(), VT);
2306 // Constant fold unary operations with a floating point constant operand.
2307 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2308 APFloat V = C->getValueAPF(); // make copy
2309 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) {
2313 return getConstantFP(V, VT);
2316 return getConstantFP(V, VT);
2318 case ISD::FP_EXTEND: {
2320 // This can return overflow, underflow, or inexact; we don't care.
2321 // FIXME need to be more flexible about rounding mode.
2322 (void)V.convert(*EVTToAPFloatSemantics(VT),
2323 APFloat::rmNearestTiesToEven, &ignored);
2324 return getConstantFP(V, VT);
2326 case ISD::FP_TO_SINT:
2327 case ISD::FP_TO_UINT: {
2330 assert(integerPartWidth >= 64);
2331 // FIXME need to be more flexible about rounding mode.
2332 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2333 Opcode==ISD::FP_TO_SINT,
2334 APFloat::rmTowardZero, &ignored);
2335 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2337 APInt api(VT.getSizeInBits(), 2, x);
2338 return getConstant(api, VT);
2340 case ISD::BIT_CONVERT:
2341 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2342 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2343 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2344 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2350 unsigned OpOpcode = Operand.getNode()->getOpcode();
2352 case ISD::TokenFactor:
2353 case ISD::MERGE_VALUES:
2354 case ISD::CONCAT_VECTORS:
2355 return Operand; // Factor, merge or concat of one node? No need.
2356 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
2357 case ISD::FP_EXTEND:
2358 assert(VT.isFloatingPoint() &&
2359 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2360 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2361 if (Operand.getOpcode() == ISD::UNDEF)
2362 return getUNDEF(VT);
2364 case ISD::SIGN_EXTEND:
2365 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2366 "Invalid SIGN_EXTEND!");
2367 if (Operand.getValueType() == VT) return Operand; // noop extension
2368 assert(Operand.getValueType().bitsLT(VT)
2369 && "Invalid sext node, dst < src!");
2370 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2371 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2373 case ISD::ZERO_EXTEND:
2374 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2375 "Invalid ZERO_EXTEND!");
2376 if (Operand.getValueType() == VT) return Operand; // noop extension
2377 assert(Operand.getValueType().bitsLT(VT)
2378 && "Invalid zext node, dst < src!");
2379 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2380 return getNode(ISD::ZERO_EXTEND, DL, VT,
2381 Operand.getNode()->getOperand(0));
2383 case ISD::ANY_EXTEND:
2384 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2385 "Invalid ANY_EXTEND!");
2386 if (Operand.getValueType() == VT) return Operand; // noop extension
2387 assert(Operand.getValueType().bitsLT(VT)
2388 && "Invalid anyext node, dst < src!");
2389 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND)
2390 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2391 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2394 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2395 "Invalid TRUNCATE!");
2396 if (Operand.getValueType() == VT) return Operand; // noop truncate
2397 assert(Operand.getValueType().bitsGT(VT)
2398 && "Invalid truncate node, src < dst!");
2399 if (OpOpcode == ISD::TRUNCATE)
2400 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2401 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2402 OpOpcode == ISD::ANY_EXTEND) {
2403 // If the source is smaller than the dest, we still need an extend.
2404 if (Operand.getNode()->getOperand(0).getValueType().bitsLT(VT))
2405 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2406 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2407 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2409 return Operand.getNode()->getOperand(0);
2412 case ISD::BIT_CONVERT:
2413 // Basic sanity checking.
2414 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2415 && "Cannot BIT_CONVERT between types of different sizes!");
2416 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2417 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x)
2418 return getNode(ISD::BIT_CONVERT, DL, VT, Operand.getOperand(0));
2419 if (OpOpcode == ISD::UNDEF)
2420 return getUNDEF(VT);
2422 case ISD::SCALAR_TO_VECTOR:
2423 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2424 (VT.getVectorElementType() == Operand.getValueType() ||
2425 (VT.getVectorElementType().isInteger() &&
2426 Operand.getValueType().isInteger() &&
2427 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
2428 "Illegal SCALAR_TO_VECTOR node!");
2429 if (OpOpcode == ISD::UNDEF)
2430 return getUNDEF(VT);
2431 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2432 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2433 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2434 Operand.getConstantOperandVal(1) == 0 &&
2435 Operand.getOperand(0).getValueType() == VT)
2436 return Operand.getOperand(0);
2439 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
2440 if (UnsafeFPMath && OpOpcode == ISD::FSUB)
2441 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
2442 Operand.getNode()->getOperand(0));
2443 if (OpOpcode == ISD::FNEG) // --X -> X
2444 return Operand.getNode()->getOperand(0);
2447 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2448 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
2453 SDVTList VTs = getVTList(VT);
2454 if (VT != MVT::Flag) { // Don't CSE flag producing nodes
2455 FoldingSetNodeID ID;
2456 SDValue Ops[1] = { Operand };
2457 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2459 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2460 return SDValue(E, 0);
2461 N = NodeAllocator.Allocate<UnarySDNode>();
2462 new (N) UnarySDNode(Opcode, DL, VTs, Operand);
2463 CSEMap.InsertNode(N, IP);
2465 N = NodeAllocator.Allocate<UnarySDNode>();
2466 new (N) UnarySDNode(Opcode, DL, VTs, Operand);
2469 AllNodes.push_back(N);
2473 return SDValue(N, 0);
2476 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2478 ConstantSDNode *Cst1,
2479 ConstantSDNode *Cst2) {
2480 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
2483 case ISD::ADD: return getConstant(C1 + C2, VT);
2484 case ISD::SUB: return getConstant(C1 - C2, VT);
2485 case ISD::MUL: return getConstant(C1 * C2, VT);
2487 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2490 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2493 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2496 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2498 case ISD::AND: return getConstant(C1 & C2, VT);
2499 case ISD::OR: return getConstant(C1 | C2, VT);
2500 case ISD::XOR: return getConstant(C1 ^ C2, VT);
2501 case ISD::SHL: return getConstant(C1 << C2, VT);
2502 case ISD::SRL: return getConstant(C1.lshr(C2), VT);
2503 case ISD::SRA: return getConstant(C1.ashr(C2), VT);
2504 case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2505 case ISD::ROTR: return getConstant(C1.rotr(C2), VT);
2512 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2513 SDValue N1, SDValue N2) {
2514 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2515 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2518 case ISD::TokenFactor:
2519 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2520 N2.getValueType() == MVT::Other && "Invalid token factor!");
2521 // Fold trivial token factors.
2522 if (N1.getOpcode() == ISD::EntryToken) return N2;
2523 if (N2.getOpcode() == ISD::EntryToken) return N1;
2524 if (N1 == N2) return N1;
2526 case ISD::CONCAT_VECTORS:
2527 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2528 // one big BUILD_VECTOR.
2529 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2530 N2.getOpcode() == ISD::BUILD_VECTOR) {
2531 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2532 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2533 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2537 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2538 N1.getValueType() == VT && "Binary operator types must match!");
2539 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2540 // worth handling here.
2541 if (N2C && N2C->isNullValue())
2543 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2550 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2551 N1.getValueType() == VT && "Binary operator types must match!");
2552 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2553 // it's worth handling here.
2554 if (N2C && N2C->isNullValue())
2564 assert(VT.isInteger() && "This operator does not apply to FP types!");
2572 if (Opcode == ISD::FADD) {
2574 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
2575 if (CFP->getValueAPF().isZero())
2578 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2579 if (CFP->getValueAPF().isZero())
2581 } else if (Opcode == ISD::FSUB) {
2583 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2584 if (CFP->getValueAPF().isZero())
2588 assert(N1.getValueType() == N2.getValueType() &&
2589 N1.getValueType() == VT && "Binary operator types must match!");
2591 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2592 assert(N1.getValueType() == VT &&
2593 N1.getValueType().isFloatingPoint() &&
2594 N2.getValueType().isFloatingPoint() &&
2595 "Invalid FCOPYSIGN!");
2602 assert(VT == N1.getValueType() &&
2603 "Shift operators return type must be the same as their first arg");
2604 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2605 "Shifts only work on integers");
2607 // Always fold shifts of i1 values so the code generator doesn't need to
2608 // handle them. Since we know the size of the shift has to be less than the
2609 // size of the value, the shift/rotate count is guaranteed to be zero.
2613 case ISD::FP_ROUND_INREG: {
2614 EVT EVT = cast<VTSDNode>(N2)->getVT();
2615 assert(VT == N1.getValueType() && "Not an inreg round!");
2616 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2617 "Cannot FP_ROUND_INREG integer types");
2618 assert(EVT.bitsLE(VT) && "Not rounding down!");
2619 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2623 assert(VT.isFloatingPoint() &&
2624 N1.getValueType().isFloatingPoint() &&
2625 VT.bitsLE(N1.getValueType()) &&
2626 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2627 if (N1.getValueType() == VT) return N1; // noop conversion.
2629 case ISD::AssertSext:
2630 case ISD::AssertZext: {
2631 EVT EVT = cast<VTSDNode>(N2)->getVT();
2632 assert(VT == N1.getValueType() && "Not an inreg extend!");
2633 assert(VT.isInteger() && EVT.isInteger() &&
2634 "Cannot *_EXTEND_INREG FP types");
2635 assert(EVT.bitsLE(VT) && "Not extending!");
2636 if (VT == EVT) return N1; // noop assertion.
2639 case ISD::SIGN_EXTEND_INREG: {
2640 EVT EVT = cast<VTSDNode>(N2)->getVT();
2641 assert(VT == N1.getValueType() && "Not an inreg extend!");
2642 assert(VT.isInteger() && EVT.isInteger() &&
2643 "Cannot *_EXTEND_INREG FP types");
2644 assert(EVT.bitsLE(VT) && "Not extending!");
2645 if (EVT == VT) return N1; // Not actually extending
2648 APInt Val = N1C->getAPIntValue();
2649 unsigned FromBits = cast<VTSDNode>(N2)->getVT().getSizeInBits();
2650 Val <<= Val.getBitWidth()-FromBits;
2651 Val = Val.ashr(Val.getBitWidth()-FromBits);
2652 return getConstant(Val, VT);
2656 case ISD::EXTRACT_VECTOR_ELT:
2657 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2658 if (N1.getOpcode() == ISD::UNDEF)
2659 return getUNDEF(VT);
2661 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2662 // expanding copies of large vectors from registers.
2664 N1.getOpcode() == ISD::CONCAT_VECTORS &&
2665 N1.getNumOperands() > 0) {
2667 N1.getOperand(0).getValueType().getVectorNumElements();
2668 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
2669 N1.getOperand(N2C->getZExtValue() / Factor),
2670 getConstant(N2C->getZExtValue() % Factor,
2671 N2.getValueType()));
2674 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2675 // expanding large vector constants.
2676 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
2677 SDValue Elt = N1.getOperand(N2C->getZExtValue());
2678 EVT VEltTy = N1.getValueType().getVectorElementType();
2679 if (Elt.getValueType() != VEltTy) {
2680 // If the vector element type is not legal, the BUILD_VECTOR operands
2681 // are promoted and implicitly truncated. Make that explicit here.
2682 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt);
2685 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT
2686 // result is implicitly extended.
2687 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt);
2692 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2693 // operations are lowered to scalars.
2694 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2695 // If the indices are the same, return the inserted element.
2696 if (N1.getOperand(2) == N2)
2697 return N1.getOperand(1);
2698 // If the indices are known different, extract the element from
2699 // the original vector.
2700 else if (isa<ConstantSDNode>(N1.getOperand(2)) &&
2701 isa<ConstantSDNode>(N2))
2702 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
2705 case ISD::EXTRACT_ELEMENT:
2706 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
2707 assert(!N1.getValueType().isVector() && !VT.isVector() &&
2708 (N1.getValueType().isInteger() == VT.isInteger()) &&
2709 "Wrong types for EXTRACT_ELEMENT!");
2711 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2712 // 64-bit integers into 32-bit parts. Instead of building the extract of
2713 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2714 if (N1.getOpcode() == ISD::BUILD_PAIR)
2715 return N1.getOperand(N2C->getZExtValue());
2717 // EXTRACT_ELEMENT of a constant int is also very common.
2718 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2719 unsigned ElementSize = VT.getSizeInBits();
2720 unsigned Shift = ElementSize * N2C->getZExtValue();
2721 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2722 return getConstant(ShiftedVal.trunc(ElementSize), VT);
2725 case ISD::EXTRACT_SUBVECTOR:
2726 if (N1.getValueType() == VT) // Trivial extraction.
2733 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
2734 if (SV.getNode()) return SV;
2735 } else { // Cannonicalize constant to RHS if commutative
2736 if (isCommutativeBinOp(Opcode)) {
2737 std::swap(N1C, N2C);
2743 // Constant fold FP operations.
2744 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
2745 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
2747 if (!N2CFP && isCommutativeBinOp(Opcode)) {
2748 // Cannonicalize constant to RHS if commutative
2749 std::swap(N1CFP, N2CFP);
2751 } else if (N2CFP && VT != MVT::ppcf128) {
2752 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
2753 APFloat::opStatus s;
2756 s = V1.add(V2, APFloat::rmNearestTiesToEven);
2757 if (s != APFloat::opInvalidOp)
2758 return getConstantFP(V1, VT);
2761 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
2762 if (s!=APFloat::opInvalidOp)
2763 return getConstantFP(V1, VT);
2766 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
2767 if (s!=APFloat::opInvalidOp)
2768 return getConstantFP(V1, VT);
2771 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
2772 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2773 return getConstantFP(V1, VT);
2776 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
2777 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2778 return getConstantFP(V1, VT);
2780 case ISD::FCOPYSIGN:
2782 return getConstantFP(V1, VT);
2788 // Canonicalize an UNDEF to the RHS, even over a constant.
2789 if (N1.getOpcode() == ISD::UNDEF) {
2790 if (isCommutativeBinOp(Opcode)) {
2794 case ISD::FP_ROUND_INREG:
2795 case ISD::SIGN_EXTEND_INREG:
2801 return N1; // fold op(undef, arg2) -> undef
2809 return getConstant(0, VT); // fold op(undef, arg2) -> 0
2810 // For vectors, we can't easily build an all zero vector, just return
2817 // Fold a bunch of operators when the RHS is undef.
2818 if (N2.getOpcode() == ISD::UNDEF) {
2821 if (N1.getOpcode() == ISD::UNDEF)
2822 // Handle undef ^ undef -> 0 special case. This is a common
2824 return getConstant(0, VT);
2834 return N2; // fold op(arg1, undef) -> undef
2848 return getConstant(0, VT); // fold op(arg1, undef) -> 0
2849 // For vectors, we can't easily build an all zero vector, just return
2854 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
2855 // For vectors, we can't easily build an all one vector, just return
2863 // Memoize this node if possible.
2865 SDVTList VTs = getVTList(VT);
2866 if (VT != MVT::Flag) {
2867 SDValue Ops[] = { N1, N2 };
2868 FoldingSetNodeID ID;
2869 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
2871 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2872 return SDValue(E, 0);
2873 N = NodeAllocator.Allocate<BinarySDNode>();
2874 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2);
2875 CSEMap.InsertNode(N, IP);
2877 N = NodeAllocator.Allocate<BinarySDNode>();
2878 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2);
2881 AllNodes.push_back(N);
2885 return SDValue(N, 0);
2888 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2889 SDValue N1, SDValue N2, SDValue N3) {
2890 // Perform various simplifications.
2891 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2892 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2894 case ISD::CONCAT_VECTORS:
2895 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2896 // one big BUILD_VECTOR.
2897 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2898 N2.getOpcode() == ISD::BUILD_VECTOR &&
2899 N3.getOpcode() == ISD::BUILD_VECTOR) {
2900 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2901 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2902 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end());
2903 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2907 // Use FoldSetCC to simplify SETCC's.
2908 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
2909 if (Simp.getNode()) return Simp;
2914 if (N1C->getZExtValue())
2915 return N2; // select true, X, Y -> X
2917 return N3; // select false, X, Y -> Y
2920 if (N2 == N3) return N2; // select C, X, X -> X
2924 if (N2C->getZExtValue()) // Unconditional branch
2925 return getNode(ISD::BR, DL, MVT::Other, N1, N3);
2927 return N1; // Never-taken branch
2930 case ISD::VECTOR_SHUFFLE:
2931 llvm_unreachable("should use getVectorShuffle constructor!");
2933 case ISD::BIT_CONVERT:
2934 // Fold bit_convert nodes from a type to themselves.
2935 if (N1.getValueType() == VT)
2940 // Memoize node if it doesn't produce a flag.
2942 SDVTList VTs = getVTList(VT);
2943 if (VT != MVT::Flag) {
2944 SDValue Ops[] = { N1, N2, N3 };
2945 FoldingSetNodeID ID;
2946 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
2948 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2949 return SDValue(E, 0);
2950 N = NodeAllocator.Allocate<TernarySDNode>();
2951 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
2952 CSEMap.InsertNode(N, IP);
2954 N = NodeAllocator.Allocate<TernarySDNode>();
2955 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
2957 AllNodes.push_back(N);
2961 return SDValue(N, 0);
2964 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2965 SDValue N1, SDValue N2, SDValue N3,
2967 SDValue Ops[] = { N1, N2, N3, N4 };
2968 return getNode(Opcode, DL, VT, Ops, 4);
2971 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2972 SDValue N1, SDValue N2, SDValue N3,
2973 SDValue N4, SDValue N5) {
2974 SDValue Ops[] = { N1, N2, N3, N4, N5 };
2975 return getNode(Opcode, DL, VT, Ops, 5);
2978 /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
2979 /// the incoming stack arguments to be loaded from the stack.
2980 SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) {
2981 SmallVector<SDValue, 8> ArgChains;
2983 // Include the original chain at the beginning of the list. When this is
2984 // used by target LowerCall hooks, this helps legalize find the
2985 // CALLSEQ_BEGIN node.
2986 ArgChains.push_back(Chain);
2988 // Add a chain value for each stack argument.
2989 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
2990 UE = getEntryNode().getNode()->use_end(); U != UE; ++U)
2991 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
2992 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
2993 if (FI->getIndex() < 0)
2994 ArgChains.push_back(SDValue(L, 1));
2996 // Build a tokenfactor for all the chains.
2997 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other,
2998 &ArgChains[0], ArgChains.size());
3001 /// getMemsetValue - Vectorized representation of the memset value
3003 static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
3005 unsigned NumBits = VT.isVector() ?
3006 VT.getVectorElementType().getSizeInBits() : VT.getSizeInBits();
3007 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
3008 APInt Val = APInt(NumBits, C->getZExtValue() & 255);
3010 for (unsigned i = NumBits; i > 8; i >>= 1) {
3011 Val = (Val << Shift) | Val;
3015 return DAG.getConstant(Val, VT);
3016 return DAG.getConstantFP(APFloat(Val), VT);
3019 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3020 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value);
3022 for (unsigned i = NumBits; i > 8; i >>= 1) {
3023 Value = DAG.getNode(ISD::OR, dl, VT,
3024 DAG.getNode(ISD::SHL, dl, VT, Value,
3025 DAG.getConstant(Shift,
3026 TLI.getShiftAmountTy())),
3034 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
3035 /// used when a memcpy is turned into a memset when the source is a constant
3037 static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG,
3038 const TargetLowering &TLI,
3039 std::string &Str, unsigned Offset) {
3040 // Handle vector with all elements zero.
3043 return DAG.getConstant(0, VT);
3044 unsigned NumElts = VT.getVectorNumElements();
3045 EVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
3046 return DAG.getNode(ISD::BIT_CONVERT, dl, VT,
3047 DAG.getConstant(0, EVT::getVectorVT(EltVT, NumElts)));
3050 assert(!VT.isVector() && "Can't handle vector type here!");
3051 unsigned NumBits = VT.getSizeInBits();
3052 unsigned MSB = NumBits / 8;
3054 if (TLI.isLittleEndian())
3055 Offset = Offset + MSB - 1;
3056 for (unsigned i = 0; i != MSB; ++i) {
3057 Val = (Val << 8) | (unsigned char)Str[Offset];
3058 Offset += TLI.isLittleEndian() ? -1 : 1;
3060 return DAG.getConstant(Val, VT);
3063 /// getMemBasePlusOffset - Returns base and offset node for the
3065 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
3066 SelectionDAG &DAG) {
3067 EVT VT = Base.getValueType();
3068 return DAG.getNode(ISD::ADD, Base.getDebugLoc(),
3069 VT, Base, DAG.getConstant(Offset, VT));
3072 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
3074 static bool isMemSrcFromString(SDValue Src, std::string &Str) {
3075 unsigned SrcDelta = 0;
3076 GlobalAddressSDNode *G = NULL;
3077 if (Src.getOpcode() == ISD::GlobalAddress)
3078 G = cast<GlobalAddressSDNode>(Src);
3079 else if (Src.getOpcode() == ISD::ADD &&
3080 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
3081 Src.getOperand(1).getOpcode() == ISD::Constant) {
3082 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
3083 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
3088 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal());
3089 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false))
3095 /// MeetsMaxMemopRequirement - Determines if the number of memory ops required
3096 /// to replace the memset / memcpy is below the threshold. It also returns the
3097 /// types of the sequence of memory ops to perform memset / memcpy.
3099 bool MeetsMaxMemopRequirement(std::vector<EVT> &MemOps,
3100 SDValue Dst, SDValue Src,
3101 unsigned Limit, uint64_t Size, unsigned &Align,
3102 std::string &Str, bool &isSrcStr,
3104 const TargetLowering &TLI) {
3105 isSrcStr = isMemSrcFromString(Src, Str);
3106 bool isSrcConst = isa<ConstantSDNode>(Src);
3107 bool AllowUnalign = TLI.allowsUnalignedMemoryAccesses();
3108 EVT VT = TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr, DAG);
3109 if (VT != MVT::iAny) {
3110 unsigned NewAlign = (unsigned)
3111 TLI.getTargetData()->getABITypeAlignment(VT.getTypeForEVT());
3112 // If source is a string constant, this will require an unaligned load.
3113 if (NewAlign > Align && (isSrcConst || AllowUnalign)) {
3114 if (Dst.getOpcode() != ISD::FrameIndex) {
3115 // Can't change destination alignment. It requires a unaligned store.
3119 int FI = cast<FrameIndexSDNode>(Dst)->getIndex();
3120 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
3121 if (MFI->isFixedObjectIndex(FI)) {
3122 // Can't change destination alignment. It requires a unaligned store.
3126 // Give the stack frame object a larger alignment if needed.
3127 if (MFI->getObjectAlignment(FI) < NewAlign)
3128 MFI->setObjectAlignment(FI, NewAlign);
3135 if (VT == MVT::iAny) {
3139 switch (Align & 7) {
3140 case 0: VT = MVT::i64; break;
3141 case 4: VT = MVT::i32; break;
3142 case 2: VT = MVT::i16; break;
3143 default: VT = MVT::i8; break;
3148 while (!TLI.isTypeLegal(LVT))
3149 LVT = (MVT::SimpleValueType)(LVT.getSimpleVT().SimpleTy - 1);
3150 assert(LVT.isInteger());
3156 unsigned NumMemOps = 0;
3158 unsigned VTSize = VT.getSizeInBits() / 8;
3159 while (VTSize > Size) {
3160 // For now, only use non-vector load / store's for the left-over pieces.
3161 if (VT.isVector()) {
3163 while (!TLI.isTypeLegal(VT))
3164 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3165 VTSize = VT.getSizeInBits() / 8;
3167 // This can result in a type that is not legal on the target, e.g.
3168 // 1 or 2 bytes on PPC.
3169 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3174 if (++NumMemOps > Limit)
3176 MemOps.push_back(VT);
3183 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3184 SDValue Chain, SDValue Dst,
3185 SDValue Src, uint64_t Size,
3186 unsigned Align, bool AlwaysInline,
3187 const Value *DstSV, uint64_t DstSVOff,
3188 const Value *SrcSV, uint64_t SrcSVOff){
3189 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3191 // Expand memcpy to a series of load and store ops if the size operand falls
3192 // below a certain threshold.
3193 std::vector<EVT> MemOps;
3194 uint64_t Limit = -1ULL;
3196 Limit = TLI.getMaxStoresPerMemcpy();
3197 unsigned DstAlign = Align; // Destination alignment can change.
3200 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
3201 Str, CopyFromStr, DAG, TLI))
3205 bool isZeroStr = CopyFromStr && Str.empty();
3206 SmallVector<SDValue, 8> OutChains;
3207 unsigned NumMemOps = MemOps.size();
3208 uint64_t SrcOff = 0, DstOff = 0;
3209 for (unsigned i = 0; i < NumMemOps; i++) {
3211 unsigned VTSize = VT.getSizeInBits() / 8;
3212 SDValue Value, Store;
3214 if (CopyFromStr && (isZeroStr || !VT.isVector())) {
3215 // It's unlikely a store of a vector immediate can be done in a single
3216 // instruction. It would require a load from a constantpool first.
3217 // We also handle store a vector with all zero's.
3218 // FIXME: Handle other cases where store of vector immediate is done in
3219 // a single instruction.
3220 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff);
3221 Store = DAG.getStore(Chain, dl, Value,
3222 getMemBasePlusOffset(Dst, DstOff, DAG),
3223 DstSV, DstSVOff + DstOff, false, DstAlign);
3225 // The type might not be legal for the target. This should only happen
3226 // if the type is smaller than a legal type, as on PPC, so the right
3227 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify
3228 // to Load/Store if NVT==VT.
3229 // FIXME does the case above also need this?
3230 EVT NVT = TLI.getTypeToTransformTo(VT);
3231 assert(NVT.bitsGE(VT));
3232 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain,
3233 getMemBasePlusOffset(Src, SrcOff, DAG),
3234 SrcSV, SrcSVOff + SrcOff, VT, false, Align);
3235 Store = DAG.getTruncStore(Chain, dl, Value,
3236 getMemBasePlusOffset(Dst, DstOff, DAG),
3237 DstSV, DstSVOff + DstOff, VT, false, DstAlign);
3239 OutChains.push_back(Store);
3244 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3245 &OutChains[0], OutChains.size());
3248 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3249 SDValue Chain, SDValue Dst,
3250 SDValue Src, uint64_t Size,
3251 unsigned Align, bool AlwaysInline,
3252 const Value *DstSV, uint64_t DstSVOff,
3253 const Value *SrcSV, uint64_t SrcSVOff){
3254 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3256 // Expand memmove to a series of load and store ops if the size operand falls
3257 // below a certain threshold.
3258 std::vector<EVT> MemOps;
3259 uint64_t Limit = -1ULL;
3261 Limit = TLI.getMaxStoresPerMemmove();
3262 unsigned DstAlign = Align; // Destination alignment can change.
3265 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
3266 Str, CopyFromStr, DAG, TLI))
3269 uint64_t SrcOff = 0, DstOff = 0;
3271 SmallVector<SDValue, 8> LoadValues;
3272 SmallVector<SDValue, 8> LoadChains;
3273 SmallVector<SDValue, 8> OutChains;
3274 unsigned NumMemOps = MemOps.size();
3275 for (unsigned i = 0; i < NumMemOps; i++) {
3277 unsigned VTSize = VT.getSizeInBits() / 8;
3278 SDValue Value, Store;
3280 Value = DAG.getLoad(VT, dl, Chain,
3281 getMemBasePlusOffset(Src, SrcOff, DAG),
3282 SrcSV, SrcSVOff + SrcOff, false, Align);
3283 LoadValues.push_back(Value);
3284 LoadChains.push_back(Value.getValue(1));
3287 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3288 &LoadChains[0], LoadChains.size());
3290 for (unsigned i = 0; i < NumMemOps; i++) {
3292 unsigned VTSize = VT.getSizeInBits() / 8;
3293 SDValue Value, Store;
3295 Store = DAG.getStore(Chain, dl, LoadValues[i],
3296 getMemBasePlusOffset(Dst, DstOff, DAG),
3297 DstSV, DstSVOff + DstOff, false, DstAlign);
3298 OutChains.push_back(Store);
3302 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3303 &OutChains[0], OutChains.size());
3306 static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl,
3307 SDValue Chain, SDValue Dst,
3308 SDValue Src, uint64_t Size,
3310 const Value *DstSV, uint64_t DstSVOff) {
3311 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3313 // Expand memset to a series of load/store ops if the size operand
3314 // falls below a certain threshold.
3315 std::vector<EVT> MemOps;
3318 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, TLI.getMaxStoresPerMemset(),
3319 Size, Align, Str, CopyFromStr, DAG, TLI))
3322 SmallVector<SDValue, 8> OutChains;
3323 uint64_t DstOff = 0;
3325 unsigned NumMemOps = MemOps.size();
3326 for (unsigned i = 0; i < NumMemOps; i++) {
3328 unsigned VTSize = VT.getSizeInBits() / 8;
3329 SDValue Value = getMemsetValue(Src, VT, DAG, dl);
3330 SDValue Store = DAG.getStore(Chain, dl, Value,
3331 getMemBasePlusOffset(Dst, DstOff, DAG),
3332 DstSV, DstSVOff + DstOff);
3333 OutChains.push_back(Store);
3337 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3338 &OutChains[0], OutChains.size());
3341 SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst,
3342 SDValue Src, SDValue Size,
3343 unsigned Align, bool AlwaysInline,
3344 const Value *DstSV, uint64_t DstSVOff,
3345 const Value *SrcSV, uint64_t SrcSVOff) {
3347 // Check to see if we should lower the memcpy to loads and stores first.
3348 // For cases within the target-specified limits, this is the best choice.
3349 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3351 // Memcpy with size zero? Just return the original chain.
3352 if (ConstantSize->isNullValue())
3356 getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3357 ConstantSize->getZExtValue(),
3358 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3359 if (Result.getNode())
3363 // Then check to see if we should lower the memcpy with target-specific
3364 // code. If the target chooses to do this, this is the next best.
3366 TLI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align,
3368 DstSV, DstSVOff, SrcSV, SrcSVOff);
3369 if (Result.getNode())
3372 // If we really need inline code and the target declined to provide it,
3373 // use a (potentially long) sequence of loads and stores.
3375 assert(ConstantSize && "AlwaysInline requires a constant size!");
3376 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3377 ConstantSize->getZExtValue(), Align, true,
3378 DstSV, DstSVOff, SrcSV, SrcSVOff);
3381 // Emit a library call.
3382 TargetLowering::ArgListTy Args;
3383 TargetLowering::ArgListEntry Entry;
3384 Entry.Ty = TLI.getTargetData()->getIntPtrType();
3385 Entry.Node = Dst; Args.push_back(Entry);
3386 Entry.Node = Src; Args.push_back(Entry);
3387 Entry.Node = Size; Args.push_back(Entry);
3388 // FIXME: pass in DebugLoc
3389 std::pair<SDValue,SDValue> CallResult =
3390 TLI.LowerCallTo(Chain, Type::VoidTy,
3391 false, false, false, false, 0, CallingConv::C, false,
3392 /*isReturnValueUsed=*/false,
3393 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY),
3394 TLI.getPointerTy()),
3396 return CallResult.second;
3399 SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst,
3400 SDValue Src, SDValue Size,
3402 const Value *DstSV, uint64_t DstSVOff,
3403 const Value *SrcSV, uint64_t SrcSVOff) {
3405 // Check to see if we should lower the memmove to loads and stores first.
3406 // For cases within the target-specified limits, this is the best choice.
3407 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3409 // Memmove with size zero? Just return the original chain.
3410 if (ConstantSize->isNullValue())
3414 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
3415 ConstantSize->getZExtValue(),
3416 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3417 if (Result.getNode())
3421 // Then check to see if we should lower the memmove with target-specific
3422 // code. If the target chooses to do this, this is the next best.
3424 TLI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align,
3425 DstSV, DstSVOff, SrcSV, SrcSVOff);
3426 if (Result.getNode())
3429 // Emit a library call.
3430 TargetLowering::ArgListTy Args;
3431 TargetLowering::ArgListEntry Entry;
3432 Entry.Ty = TLI.getTargetData()->getIntPtrType();
3433 Entry.Node = Dst; Args.push_back(Entry);
3434 Entry.Node = Src; Args.push_back(Entry);
3435 Entry.Node = Size; Args.push_back(Entry);
3436 // FIXME: pass in DebugLoc
3437 std::pair<SDValue,SDValue> CallResult =
3438 TLI.LowerCallTo(Chain, Type::VoidTy,
3439 false, false, false, false, 0, CallingConv::C, false,
3440 /*isReturnValueUsed=*/false,
3441 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE),
3442 TLI.getPointerTy()),
3444 return CallResult.second;
3447 SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst,
3448 SDValue Src, SDValue Size,
3450 const Value *DstSV, uint64_t DstSVOff) {
3452 // Check to see if we should lower the memset to stores first.
3453 // For cases within the target-specified limits, this is the best choice.
3454 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3456 // Memset with size zero? Just return the original chain.
3457 if (ConstantSize->isNullValue())
3461 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
3462 Align, DstSV, DstSVOff);
3463 if (Result.getNode())
3467 // Then check to see if we should lower the memset with target-specific
3468 // code. If the target chooses to do this, this is the next best.
3470 TLI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align,
3472 if (Result.getNode())
3475 // Emit a library call.
3476 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType();
3477 TargetLowering::ArgListTy Args;
3478 TargetLowering::ArgListEntry Entry;
3479 Entry.Node = Dst; Entry.Ty = IntPtrTy;
3480 Args.push_back(Entry);
3481 // Extend or truncate the argument to be an i32 value for the call.
3482 if (Src.getValueType().bitsGT(MVT::i32))
3483 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
3485 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
3486 Entry.Node = Src; Entry.Ty = Type::Int32Ty; Entry.isSExt = true;
3487 Args.push_back(Entry);
3488 Entry.Node = Size; Entry.Ty = IntPtrTy; Entry.isSExt = false;
3489 Args.push_back(Entry);
3490 // FIXME: pass in DebugLoc
3491 std::pair<SDValue,SDValue> CallResult =
3492 TLI.LowerCallTo(Chain, Type::VoidTy,
3493 false, false, false, false, 0, CallingConv::C, false,
3494 /*isReturnValueUsed=*/false,
3495 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET),
3496 TLI.getPointerTy()),
3498 return CallResult.second;
3501 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3503 SDValue Ptr, SDValue Cmp,
3504 SDValue Swp, const Value* PtrVal,
3505 unsigned Alignment) {
3506 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
3507 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3509 EVT VT = Cmp.getValueType();
3511 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3512 Alignment = getEVTAlignment(MemVT);
3514 SDVTList VTs = getVTList(VT, MVT::Other);
3515 FoldingSetNodeID ID;
3516 ID.AddInteger(MemVT.getRawBits());
3517 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3518 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3520 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3521 return SDValue(E, 0);
3522 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3523 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT,
3524 Chain, Ptr, Cmp, Swp, PtrVal, Alignment);
3525 CSEMap.InsertNode(N, IP);
3526 AllNodes.push_back(N);
3527 return SDValue(N, 0);
3530 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3532 SDValue Ptr, SDValue Val,
3533 const Value* PtrVal,
3534 unsigned Alignment) {
3535 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
3536 Opcode == ISD::ATOMIC_LOAD_SUB ||
3537 Opcode == ISD::ATOMIC_LOAD_AND ||
3538 Opcode == ISD::ATOMIC_LOAD_OR ||
3539 Opcode == ISD::ATOMIC_LOAD_XOR ||
3540 Opcode == ISD::ATOMIC_LOAD_NAND ||
3541 Opcode == ISD::ATOMIC_LOAD_MIN ||
3542 Opcode == ISD::ATOMIC_LOAD_MAX ||
3543 Opcode == ISD::ATOMIC_LOAD_UMIN ||
3544 Opcode == ISD::ATOMIC_LOAD_UMAX ||
3545 Opcode == ISD::ATOMIC_SWAP) &&
3546 "Invalid Atomic Op");
3548 EVT VT = Val.getValueType();
3550 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3551 Alignment = getEVTAlignment(MemVT);
3553 SDVTList VTs = getVTList(VT, MVT::Other);
3554 FoldingSetNodeID ID;
3555 ID.AddInteger(MemVT.getRawBits());
3556 SDValue Ops[] = {Chain, Ptr, Val};
3557 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3559 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3560 return SDValue(E, 0);
3561 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3562 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT,
3563 Chain, Ptr, Val, PtrVal, Alignment);
3564 CSEMap.InsertNode(N, IP);
3565 AllNodes.push_back(N);
3566 return SDValue(N, 0);
3569 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
3570 /// Allowed to return something different (and simpler) if Simplify is true.
3571 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps,
3576 SmallVector<EVT, 4> VTs;
3577 VTs.reserve(NumOps);
3578 for (unsigned i = 0; i < NumOps; ++i)
3579 VTs.push_back(Ops[i].getValueType());
3580 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps),
3585 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl,
3586 const EVT *VTs, unsigned NumVTs,
3587 const SDValue *Ops, unsigned NumOps,
3588 EVT MemVT, const Value *srcValue, int SVOff,
3589 unsigned Align, bool Vol,
3590 bool ReadMem, bool WriteMem) {
3591 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps,
3592 MemVT, srcValue, SVOff, Align, Vol,
3597 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
3598 const SDValue *Ops, unsigned NumOps,
3599 EVT MemVT, const Value *srcValue, int SVOff,
3600 unsigned Align, bool Vol,
3601 bool ReadMem, bool WriteMem) {
3602 // Memoize the node unless it returns a flag.
3603 MemIntrinsicSDNode *N;
3604 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3605 FoldingSetNodeID ID;
3606 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3608 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3609 return SDValue(E, 0);
3611 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3612 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT,
3613 srcValue, SVOff, Align, Vol, ReadMem, WriteMem);
3614 CSEMap.InsertNode(N, IP);
3616 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3617 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT,
3618 srcValue, SVOff, Align, Vol, ReadMem, WriteMem);
3620 AllNodes.push_back(N);
3621 return SDValue(N, 0);
3625 SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl,
3626 ISD::LoadExtType ExtType, EVT VT, SDValue Chain,
3627 SDValue Ptr, SDValue Offset,
3628 const Value *SV, int SVOffset, EVT EVT,
3629 bool isVolatile, unsigned Alignment) {
3630 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3631 Alignment = getEVTAlignment(VT);
3634 ExtType = ISD::NON_EXTLOAD;
3635 } else if (ExtType == ISD::NON_EXTLOAD) {
3636 assert(VT == EVT && "Non-extending load from different memory type!");
3640 assert(EVT.getVectorNumElements() == VT.getVectorNumElements() &&
3641 "Invalid vector extload!");
3643 assert(EVT.bitsLT(VT) &&
3644 "Should only be an extending load, not truncating!");
3645 assert((ExtType == ISD::EXTLOAD || VT.isInteger()) &&
3646 "Cannot sign/zero extend a FP/Vector load!");
3647 assert(VT.isInteger() == EVT.isInteger() &&
3648 "Cannot convert from FP to Int or Int -> FP!");
3651 bool Indexed = AM != ISD::UNINDEXED;
3652 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
3653 "Unindexed load with an offset!");
3655 SDVTList VTs = Indexed ?
3656 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
3657 SDValue Ops[] = { Chain, Ptr, Offset };
3658 FoldingSetNodeID ID;
3659 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
3660 ID.AddInteger(EVT.getRawBits());
3661 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, isVolatile, Alignment));
3663 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3664 return SDValue(E, 0);
3665 SDNode *N = NodeAllocator.Allocate<LoadSDNode>();
3666 new (N) LoadSDNode(Ops, dl, VTs, AM, ExtType, EVT, SV, SVOffset,
3667 Alignment, isVolatile);
3668 CSEMap.InsertNode(N, IP);
3669 AllNodes.push_back(N);
3670 return SDValue(N, 0);
3673 SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl,
3674 SDValue Chain, SDValue Ptr,
3675 const Value *SV, int SVOffset,
3676 bool isVolatile, unsigned Alignment) {
3677 SDValue Undef = getUNDEF(Ptr.getValueType());
3678 return getLoad(ISD::UNINDEXED, dl, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef,
3679 SV, SVOffset, VT, isVolatile, Alignment);
3682 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT,
3683 SDValue Chain, SDValue Ptr,
3685 int SVOffset, EVT EVT,
3686 bool isVolatile, unsigned Alignment) {
3687 SDValue Undef = getUNDEF(Ptr.getValueType());
3688 return getLoad(ISD::UNINDEXED, dl, ExtType, VT, Chain, Ptr, Undef,
3689 SV, SVOffset, EVT, isVolatile, Alignment);
3693 SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base,
3694 SDValue Offset, ISD::MemIndexedMode AM) {
3695 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
3696 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
3697 "Load is already a indexed load!");
3698 return getLoad(AM, dl, LD->getExtensionType(), OrigLoad.getValueType(),
3699 LD->getChain(), Base, Offset, LD->getSrcValue(),
3700 LD->getSrcValueOffset(), LD->getMemoryVT(),
3701 LD->isVolatile(), LD->getAlignment());
3704 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
3705 SDValue Ptr, const Value *SV, int SVOffset,
3706 bool isVolatile, unsigned Alignment) {
3707 EVT VT = Val.getValueType();
3709 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3710 Alignment = getEVTAlignment(VT);
3712 SDVTList VTs = getVTList(MVT::Other);
3713 SDValue Undef = getUNDEF(Ptr.getValueType());
3714 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3715 FoldingSetNodeID ID;
3716 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3717 ID.AddInteger(VT.getRawBits());
3718 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED,
3719 isVolatile, Alignment));
3721 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3722 return SDValue(E, 0);
3723 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3724 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, false,
3725 VT, SV, SVOffset, Alignment, isVolatile);
3726 CSEMap.InsertNode(N, IP);
3727 AllNodes.push_back(N);
3728 return SDValue(N, 0);
3731 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
3732 SDValue Ptr, const Value *SV,
3733 int SVOffset, EVT SVT,
3734 bool isVolatile, unsigned Alignment) {
3735 EVT VT = Val.getValueType();
3738 return getStore(Chain, dl, Val, Ptr, SV, SVOffset, isVolatile, Alignment);
3740 assert(VT.bitsGT(SVT) && "Not a truncation?");
3741 assert(VT.isInteger() == SVT.isInteger() &&
3742 "Can't do FP-INT conversion!");
3744 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3745 Alignment = getEVTAlignment(VT);
3747 SDVTList VTs = getVTList(MVT::Other);
3748 SDValue Undef = getUNDEF(Ptr.getValueType());
3749 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3750 FoldingSetNodeID ID;
3751 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3752 ID.AddInteger(SVT.getRawBits());
3753 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED,
3754 isVolatile, Alignment));
3756 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3757 return SDValue(E, 0);
3758 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3759 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, true,
3760 SVT, SV, SVOffset, Alignment, isVolatile);
3761 CSEMap.InsertNode(N, IP);
3762 AllNodes.push_back(N);
3763 return SDValue(N, 0);
3767 SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base,
3768 SDValue Offset, ISD::MemIndexedMode AM) {
3769 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
3770 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
3771 "Store is already a indexed store!");
3772 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
3773 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
3774 FoldingSetNodeID ID;
3775 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3776 ID.AddInteger(ST->getMemoryVT().getRawBits());
3777 ID.AddInteger(ST->getRawSubclassData());
3779 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3780 return SDValue(E, 0);
3781 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3782 new (N) StoreSDNode(Ops, dl, VTs, AM,
3783 ST->isTruncatingStore(), ST->getMemoryVT(),
3784 ST->getSrcValue(), ST->getSrcValueOffset(),
3785 ST->getAlignment(), ST->isVolatile());
3786 CSEMap.InsertNode(N, IP);
3787 AllNodes.push_back(N);
3788 return SDValue(N, 0);
3791 SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl,
3792 SDValue Chain, SDValue Ptr,
3794 SDValue Ops[] = { Chain, Ptr, SV };
3795 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 3);
3798 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3799 const SDUse *Ops, unsigned NumOps) {
3801 case 0: return getNode(Opcode, DL, VT);
3802 case 1: return getNode(Opcode, DL, VT, Ops[0]);
3803 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
3804 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
3808 // Copy from an SDUse array into an SDValue array for use with
3809 // the regular getNode logic.
3810 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
3811 return getNode(Opcode, DL, VT, &NewOps[0], NumOps);
3814 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3815 const SDValue *Ops, unsigned NumOps) {
3817 case 0: return getNode(Opcode, DL, VT);
3818 case 1: return getNode(Opcode, DL, VT, Ops[0]);
3819 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
3820 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
3826 case ISD::SELECT_CC: {
3827 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
3828 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
3829 "LHS and RHS of condition must have same type!");
3830 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
3831 "True and False arms of SelectCC must have same type!");
3832 assert(Ops[2].getValueType() == VT &&
3833 "select_cc node must be of same type as true and false value!");
3837 assert(NumOps == 5 && "BR_CC takes 5 operands!");
3838 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
3839 "LHS/RHS of comparison should match types!");
3846 SDVTList VTs = getVTList(VT);
3848 if (VT != MVT::Flag) {
3849 FoldingSetNodeID ID;
3850 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
3853 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3854 return SDValue(E, 0);
3856 N = NodeAllocator.Allocate<SDNode>();
3857 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps);
3858 CSEMap.InsertNode(N, IP);
3860 N = NodeAllocator.Allocate<SDNode>();
3861 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps);
3864 AllNodes.push_back(N);
3868 return SDValue(N, 0);
3871 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
3872 const std::vector<EVT> &ResultTys,
3873 const SDValue *Ops, unsigned NumOps) {
3874 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()),
3878 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
3879 const EVT *VTs, unsigned NumVTs,
3880 const SDValue *Ops, unsigned NumOps) {
3882 return getNode(Opcode, DL, VTs[0], Ops, NumOps);
3883 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps);
3886 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
3887 const SDValue *Ops, unsigned NumOps) {
3888 if (VTList.NumVTs == 1)
3889 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps);
3893 // FIXME: figure out how to safely handle things like
3894 // int foo(int x) { return 1 << (x & 255); }
3895 // int bar() { return foo(256); }
3896 case ISD::SRA_PARTS:
3897 case ISD::SRL_PARTS:
3898 case ISD::SHL_PARTS:
3899 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
3900 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
3901 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
3902 else if (N3.getOpcode() == ISD::AND)
3903 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
3904 // If the and is only masking out bits that cannot effect the shift,
3905 // eliminate the and.
3906 unsigned NumBits = VT.getSizeInBits()*2;
3907 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
3908 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
3914 // Memoize the node unless it returns a flag.
3916 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3917 FoldingSetNodeID ID;
3918 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3920 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3921 return SDValue(E, 0);
3923 N = NodeAllocator.Allocate<UnarySDNode>();
3924 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]);
3925 } else if (NumOps == 2) {
3926 N = NodeAllocator.Allocate<BinarySDNode>();
3927 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
3928 } else if (NumOps == 3) {
3929 N = NodeAllocator.Allocate<TernarySDNode>();
3930 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]);
3932 N = NodeAllocator.Allocate<SDNode>();
3933 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps);
3935 CSEMap.InsertNode(N, IP);
3938 N = NodeAllocator.Allocate<UnarySDNode>();
3939 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]);
3940 } else if (NumOps == 2) {
3941 N = NodeAllocator.Allocate<BinarySDNode>();
3942 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
3943 } else if (NumOps == 3) {
3944 N = NodeAllocator.Allocate<TernarySDNode>();
3945 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]);
3947 N = NodeAllocator.Allocate<SDNode>();
3948 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps);
3951 AllNodes.push_back(N);
3955 return SDValue(N, 0);
3958 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) {
3959 return getNode(Opcode, DL, VTList, 0, 0);
3962 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
3964 SDValue Ops[] = { N1 };
3965 return getNode(Opcode, DL, VTList, Ops, 1);
3968 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
3969 SDValue N1, SDValue N2) {
3970 SDValue Ops[] = { N1, N2 };
3971 return getNode(Opcode, DL, VTList, Ops, 2);
3974 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
3975 SDValue N1, SDValue N2, SDValue N3) {
3976 SDValue Ops[] = { N1, N2, N3 };
3977 return getNode(Opcode, DL, VTList, Ops, 3);
3980 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
3981 SDValue N1, SDValue N2, SDValue N3,
3983 SDValue Ops[] = { N1, N2, N3, N4 };
3984 return getNode(Opcode, DL, VTList, Ops, 4);
3987 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
3988 SDValue N1, SDValue N2, SDValue N3,
3989 SDValue N4, SDValue N5) {
3990 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3991 return getNode(Opcode, DL, VTList, Ops, 5);
3994 SDVTList SelectionDAG::getVTList(EVT VT) {
3995 return makeVTList(SDNode::getValueTypeList(VT), 1);
3998 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
3999 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4000 E = VTList.rend(); I != E; ++I)
4001 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
4004 EVT *Array = Allocator.Allocate<EVT>(2);
4007 SDVTList Result = makeVTList(Array, 2);
4008 VTList.push_back(Result);
4012 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
4013 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4014 E = VTList.rend(); I != E; ++I)
4015 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4019 EVT *Array = Allocator.Allocate<EVT>(3);
4023 SDVTList Result = makeVTList(Array, 3);
4024 VTList.push_back(Result);
4028 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
4029 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4030 E = VTList.rend(); I != E; ++I)
4031 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4032 I->VTs[2] == VT3 && I->VTs[3] == VT4)
4035 EVT *Array = Allocator.Allocate<EVT>(3);
4040 SDVTList Result = makeVTList(Array, 4);
4041 VTList.push_back(Result);
4045 SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) {
4047 case 0: llvm_unreachable("Cannot have nodes without results!");
4048 case 1: return getVTList(VTs[0]);
4049 case 2: return getVTList(VTs[0], VTs[1]);
4050 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
4054 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4055 E = VTList.rend(); I != E; ++I) {
4056 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
4059 bool NoMatch = false;
4060 for (unsigned i = 2; i != NumVTs; ++i)
4061 if (VTs[i] != I->VTs[i]) {
4069 EVT *Array = Allocator.Allocate<EVT>(NumVTs);
4070 std::copy(VTs, VTs+NumVTs, Array);
4071 SDVTList Result = makeVTList(Array, NumVTs);
4072 VTList.push_back(Result);
4077 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
4078 /// specified operands. If the resultant node already exists in the DAG,
4079 /// this does not modify the specified node, instead it returns the node that
4080 /// already exists. If the resultant node does not exist in the DAG, the
4081 /// input node is returned. As a degenerate case, if you specify the same
4082 /// input operands as the node already has, the input node is returned.
4083 SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) {
4084 SDNode *N = InN.getNode();
4085 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
4087 // Check to see if there is no change.
4088 if (Op == N->getOperand(0)) return InN;
4090 // See if the modified node already exists.
4091 void *InsertPos = 0;
4092 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
4093 return SDValue(Existing, InN.getResNo());
4095 // Nope it doesn't. Remove the node from its current place in the maps.
4097 if (!RemoveNodeFromCSEMaps(N))
4100 // Now we update the operands.
4101 N->OperandList[0].set(Op);
4103 // If this gets put into a CSE map, add it.
4104 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4108 SDValue SelectionDAG::
4109 UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) {
4110 SDNode *N = InN.getNode();
4111 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
4113 // Check to see if there is no change.
4114 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
4115 return InN; // No operands changed, just return the input node.
4117 // See if the modified node already exists.
4118 void *InsertPos = 0;
4119 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
4120 return SDValue(Existing, InN.getResNo());
4122 // Nope it doesn't. Remove the node from its current place in the maps.
4124 if (!RemoveNodeFromCSEMaps(N))
4127 // Now we update the operands.
4128 if (N->OperandList[0] != Op1)
4129 N->OperandList[0].set(Op1);
4130 if (N->OperandList[1] != Op2)
4131 N->OperandList[1].set(Op2);
4133 // If this gets put into a CSE map, add it.
4134 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4138 SDValue SelectionDAG::
4139 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) {
4140 SDValue Ops[] = { Op1, Op2, Op3 };
4141 return UpdateNodeOperands(N, Ops, 3);
4144 SDValue SelectionDAG::
4145 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
4146 SDValue Op3, SDValue Op4) {
4147 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
4148 return UpdateNodeOperands(N, Ops, 4);
4151 SDValue SelectionDAG::
4152 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
4153 SDValue Op3, SDValue Op4, SDValue Op5) {
4154 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
4155 return UpdateNodeOperands(N, Ops, 5);
4158 SDValue SelectionDAG::
4159 UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) {
4160 SDNode *N = InN.getNode();
4161 assert(N->getNumOperands() == NumOps &&
4162 "Update with wrong number of operands");
4164 // Check to see if there is no change.
4165 bool AnyChange = false;
4166 for (unsigned i = 0; i != NumOps; ++i) {
4167 if (Ops[i] != N->getOperand(i)) {
4173 // No operands changed, just return the input node.
4174 if (!AnyChange) return InN;
4176 // See if the modified node already exists.
4177 void *InsertPos = 0;
4178 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
4179 return SDValue(Existing, InN.getResNo());
4181 // Nope it doesn't. Remove the node from its current place in the maps.
4183 if (!RemoveNodeFromCSEMaps(N))
4186 // Now we update the operands.
4187 for (unsigned i = 0; i != NumOps; ++i)
4188 if (N->OperandList[i] != Ops[i])
4189 N->OperandList[i].set(Ops[i]);
4191 // If this gets put into a CSE map, add it.
4192 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4196 /// DropOperands - Release the operands and set this node to have
4198 void SDNode::DropOperands() {
4199 // Unlike the code in MorphNodeTo that does this, we don't need to
4200 // watch for dead nodes here.
4201 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
4207 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
4210 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4212 SDVTList VTs = getVTList(VT);
4213 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
4216 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4217 EVT VT, SDValue Op1) {
4218 SDVTList VTs = getVTList(VT);
4219 SDValue Ops[] = { Op1 };
4220 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4223 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4224 EVT VT, SDValue Op1,
4226 SDVTList VTs = getVTList(VT);
4227 SDValue Ops[] = { Op1, Op2 };
4228 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4231 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4232 EVT VT, SDValue Op1,
4233 SDValue Op2, SDValue Op3) {
4234 SDVTList VTs = getVTList(VT);
4235 SDValue Ops[] = { Op1, Op2, Op3 };
4236 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4239 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4240 EVT VT, const SDValue *Ops,
4242 SDVTList VTs = getVTList(VT);
4243 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4246 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4247 EVT VT1, EVT VT2, const SDValue *Ops,
4249 SDVTList VTs = getVTList(VT1, VT2);
4250 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4253 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4255 SDVTList VTs = getVTList(VT1, VT2);
4256 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
4259 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4260 EVT VT1, EVT VT2, EVT VT3,
4261 const SDValue *Ops, unsigned NumOps) {
4262 SDVTList VTs = getVTList(VT1, VT2, VT3);
4263 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4266 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4267 EVT VT1, EVT VT2, EVT VT3, EVT VT4,
4268 const SDValue *Ops, unsigned NumOps) {
4269 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4270 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4273 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4276 SDVTList VTs = getVTList(VT1, VT2);
4277 SDValue Ops[] = { Op1 };
4278 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4281 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4283 SDValue Op1, SDValue Op2) {
4284 SDVTList VTs = getVTList(VT1, VT2);
4285 SDValue Ops[] = { Op1, Op2 };
4286 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4289 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4291 SDValue Op1, SDValue Op2,
4293 SDVTList VTs = getVTList(VT1, VT2);
4294 SDValue Ops[] = { Op1, Op2, Op3 };
4295 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4298 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4299 EVT VT1, EVT VT2, EVT VT3,
4300 SDValue Op1, SDValue Op2,
4302 SDVTList VTs = getVTList(VT1, VT2, VT3);
4303 SDValue Ops[] = { Op1, Op2, Op3 };
4304 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4307 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4308 SDVTList VTs, const SDValue *Ops,
4310 return MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
4313 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4315 SDVTList VTs = getVTList(VT);
4316 return MorphNodeTo(N, Opc, VTs, 0, 0);
4319 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4320 EVT VT, SDValue Op1) {
4321 SDVTList VTs = getVTList(VT);
4322 SDValue Ops[] = { Op1 };
4323 return MorphNodeTo(N, Opc, VTs, Ops, 1);
4326 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4327 EVT VT, SDValue Op1,
4329 SDVTList VTs = getVTList(VT);
4330 SDValue Ops[] = { Op1, Op2 };
4331 return MorphNodeTo(N, Opc, VTs, Ops, 2);
4334 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4335 EVT VT, SDValue Op1,
4336 SDValue Op2, SDValue Op3) {
4337 SDVTList VTs = getVTList(VT);
4338 SDValue Ops[] = { Op1, Op2, Op3 };
4339 return MorphNodeTo(N, Opc, VTs, Ops, 3);
4342 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4343 EVT VT, const SDValue *Ops,
4345 SDVTList VTs = getVTList(VT);
4346 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4349 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4350 EVT VT1, EVT VT2, const SDValue *Ops,
4352 SDVTList VTs = getVTList(VT1, VT2);
4353 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4356 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4358 SDVTList VTs = getVTList(VT1, VT2);
4359 return MorphNodeTo(N, Opc, VTs, (SDValue *)0, 0);
4362 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4363 EVT VT1, EVT VT2, EVT VT3,
4364 const SDValue *Ops, unsigned NumOps) {
4365 SDVTList VTs = getVTList(VT1, VT2, VT3);
4366 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4369 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4372 SDVTList VTs = getVTList(VT1, VT2);
4373 SDValue Ops[] = { Op1 };
4374 return MorphNodeTo(N, Opc, VTs, Ops, 1);
4377 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4379 SDValue Op1, SDValue Op2) {
4380 SDVTList VTs = getVTList(VT1, VT2);
4381 SDValue Ops[] = { Op1, Op2 };
4382 return MorphNodeTo(N, Opc, VTs, Ops, 2);
4385 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4387 SDValue Op1, SDValue Op2,
4389 SDVTList VTs = getVTList(VT1, VT2);
4390 SDValue Ops[] = { Op1, Op2, Op3 };
4391 return MorphNodeTo(N, Opc, VTs, Ops, 3);
4394 /// MorphNodeTo - These *mutate* the specified node to have the specified
4395 /// return type, opcode, and operands.
4397 /// Note that MorphNodeTo returns the resultant node. If there is already a
4398 /// node of the specified opcode and operands, it returns that node instead of
4399 /// the current one. Note that the DebugLoc need not be the same.
4401 /// Using MorphNodeTo is faster than creating a new node and swapping it in
4402 /// with ReplaceAllUsesWith both because it often avoids allocating a new
4403 /// node, and because it doesn't require CSE recalculation for any of
4404 /// the node's users.
4406 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4407 SDVTList VTs, const SDValue *Ops,
4409 // If an identical node already exists, use it.
4411 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) {
4412 FoldingSetNodeID ID;
4413 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
4414 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
4418 if (!RemoveNodeFromCSEMaps(N))
4421 // Start the morphing.
4423 N->ValueList = VTs.VTs;
4424 N->NumValues = VTs.NumVTs;
4426 // Clear the operands list, updating used nodes to remove this from their
4427 // use list. Keep track of any operands that become dead as a result.
4428 SmallPtrSet<SDNode*, 16> DeadNodeSet;
4429 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
4431 SDNode *Used = Use.getNode();
4433 if (Used->use_empty())
4434 DeadNodeSet.insert(Used);
4437 // If NumOps is larger than the # of operands we currently have, reallocate
4438 // the operand list.
4439 if (NumOps > N->NumOperands) {
4440 if (N->OperandsNeedDelete)
4441 delete[] N->OperandList;
4443 if (N->isMachineOpcode()) {
4444 // We're creating a final node that will live unmorphed for the
4445 // remainder of the current SelectionDAG iteration, so we can allocate
4446 // the operands directly out of a pool with no recycling metadata.
4447 N->OperandList = OperandAllocator.Allocate<SDUse>(NumOps);
4448 N->OperandsNeedDelete = false;
4450 N->OperandList = new SDUse[NumOps];
4451 N->OperandsNeedDelete = true;
4455 // Assign the new operands.
4456 N->NumOperands = NumOps;
4457 for (unsigned i = 0, e = NumOps; i != e; ++i) {
4458 N->OperandList[i].setUser(N);
4459 N->OperandList[i].setInitial(Ops[i]);
4462 // Delete any nodes that are still dead after adding the uses for the
4464 SmallVector<SDNode *, 16> DeadNodes;
4465 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
4466 E = DeadNodeSet.end(); I != E; ++I)
4467 if ((*I)->use_empty())
4468 DeadNodes.push_back(*I);
4469 RemoveDeadNodes(DeadNodes);
4472 CSEMap.InsertNode(N, IP); // Memoize the new node.
4477 /// getTargetNode - These are used for target selectors to create a new node
4478 /// with specified return type(s), target opcode, and operands.
4480 /// Note that getTargetNode returns the resultant node. If there is already a
4481 /// node of the specified opcode and operands, it returns that node instead of
4482 /// the current one.
4483 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT) {
4484 return getNode(~Opcode, dl, VT).getNode();
4487 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT,
4489 return getNode(~Opcode, dl, VT, Op1).getNode();
4492 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT,
4493 SDValue Op1, SDValue Op2) {
4494 return getNode(~Opcode, dl, VT, Op1, Op2).getNode();
4497 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT,
4498 SDValue Op1, SDValue Op2,
4500 return getNode(~Opcode, dl, VT, Op1, Op2, Op3).getNode();
4503 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT,
4504 const SDValue *Ops, unsigned NumOps) {
4505 return getNode(~Opcode, dl, VT, Ops, NumOps).getNode();
4508 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4510 SDVTList VTs = getVTList(VT1, VT2);
4512 return getNode(~Opcode, dl, VTs, &Op, 0).getNode();
4515 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT1,
4516 EVT VT2, SDValue Op1) {
4517 SDVTList VTs = getVTList(VT1, VT2);
4518 return getNode(~Opcode, dl, VTs, &Op1, 1).getNode();
4521 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT1,
4522 EVT VT2, SDValue Op1,
4524 SDVTList VTs = getVTList(VT1, VT2);
4525 SDValue Ops[] = { Op1, Op2 };
4526 return getNode(~Opcode, dl, VTs, Ops, 2).getNode();
4529 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT1,
4530 EVT VT2, SDValue Op1,
4531 SDValue Op2, SDValue Op3) {
4532 SDVTList VTs = getVTList(VT1, VT2);
4533 SDValue Ops[] = { Op1, Op2, Op3 };
4534 return getNode(~Opcode, dl, VTs, Ops, 3).getNode();
4537 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4539 const SDValue *Ops, unsigned NumOps) {
4540 SDVTList VTs = getVTList(VT1, VT2);
4541 return getNode(~Opcode, dl, VTs, Ops, NumOps).getNode();
4544 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4545 EVT VT1, EVT VT2, EVT VT3,
4546 SDValue Op1, SDValue Op2) {
4547 SDVTList VTs = getVTList(VT1, VT2, VT3);
4548 SDValue Ops[] = { Op1, Op2 };
4549 return getNode(~Opcode, dl, VTs, Ops, 2).getNode();
4552 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4553 EVT VT1, EVT VT2, EVT VT3,
4554 SDValue Op1, SDValue Op2,
4556 SDVTList VTs = getVTList(VT1, VT2, VT3);
4557 SDValue Ops[] = { Op1, Op2, Op3 };
4558 return getNode(~Opcode, dl, VTs, Ops, 3).getNode();
4561 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4562 EVT VT1, EVT VT2, EVT VT3,
4563 const SDValue *Ops, unsigned NumOps) {
4564 SDVTList VTs = getVTList(VT1, VT2, VT3);
4565 return getNode(~Opcode, dl, VTs, Ops, NumOps).getNode();
4568 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT1,
4569 EVT VT2, EVT VT3, EVT VT4,
4570 const SDValue *Ops, unsigned NumOps) {
4571 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4572 return getNode(~Opcode, dl, VTs, Ops, NumOps).getNode();
4575 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
4576 const std::vector<EVT> &ResultTys,
4577 const SDValue *Ops, unsigned NumOps) {
4578 return getNode(~Opcode, dl, ResultTys, Ops, NumOps).getNode();
4581 /// getNodeIfExists - Get the specified node if it's already available, or
4582 /// else return NULL.
4583 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
4584 const SDValue *Ops, unsigned NumOps) {
4585 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4586 FoldingSetNodeID ID;
4587 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4589 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4595 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4596 /// This can cause recursive merging of nodes in the DAG.
4598 /// This version assumes From has a single result value.
4600 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To,
4601 DAGUpdateListener *UpdateListener) {
4602 SDNode *From = FromN.getNode();
4603 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
4604 "Cannot replace with this method!");
4605 assert(From != To.getNode() && "Cannot replace uses of with self");
4607 // Iterate over all the existing uses of From. New uses will be added
4608 // to the beginning of the use list, which we avoid visiting.
4609 // This specifically avoids visiting uses of From that arise while the
4610 // replacement is happening, because any such uses would be the result
4611 // of CSE: If an existing node looks like From after one of its operands
4612 // is replaced by To, we don't want to replace of all its users with To
4613 // too. See PR3018 for more info.
4614 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
4618 // This node is about to morph, remove its old self from the CSE maps.
4619 RemoveNodeFromCSEMaps(User);
4621 // A user can appear in a use list multiple times, and when this
4622 // happens the uses are usually next to each other in the list.
4623 // To help reduce the number of CSE recomputations, process all
4624 // the uses of this user that we can find this way.
4626 SDUse &Use = UI.getUse();
4629 } while (UI != UE && *UI == User);
4631 // Now that we have modified User, add it back to the CSE maps. If it
4632 // already exists there, recursively merge the results together.
4633 AddModifiedNodeToCSEMaps(User, UpdateListener);
4637 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4638 /// This can cause recursive merging of nodes in the DAG.
4640 /// This version assumes that for each value of From, there is a
4641 /// corresponding value in To in the same position with the same type.
4643 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To,
4644 DAGUpdateListener *UpdateListener) {
4646 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
4647 assert((!From->hasAnyUseOfValue(i) ||
4648 From->getValueType(i) == To->getValueType(i)) &&
4649 "Cannot use this version of ReplaceAllUsesWith!");
4652 // Handle the trivial case.
4656 // Iterate over just the existing users of From. See the comments in
4657 // the ReplaceAllUsesWith above.
4658 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
4662 // This node is about to morph, remove its old self from the CSE maps.
4663 RemoveNodeFromCSEMaps(User);
4665 // A user can appear in a use list multiple times, and when this
4666 // happens the uses are usually next to each other in the list.
4667 // To help reduce the number of CSE recomputations, process all
4668 // the uses of this user that we can find this way.
4670 SDUse &Use = UI.getUse();
4673 } while (UI != UE && *UI == User);
4675 // Now that we have modified User, add it back to the CSE maps. If it
4676 // already exists there, recursively merge the results together.
4677 AddModifiedNodeToCSEMaps(User, UpdateListener);
4681 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4682 /// This can cause recursive merging of nodes in the DAG.
4684 /// This version can replace From with any result values. To must match the
4685 /// number and types of values returned by From.
4686 void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
4688 DAGUpdateListener *UpdateListener) {
4689 if (From->getNumValues() == 1) // Handle the simple case efficiently.
4690 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener);
4692 // Iterate over just the existing users of From. See the comments in
4693 // the ReplaceAllUsesWith above.
4694 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
4698 // This node is about to morph, remove its old self from the CSE maps.
4699 RemoveNodeFromCSEMaps(User);
4701 // A user can appear in a use list multiple times, and when this
4702 // happens the uses are usually next to each other in the list.
4703 // To help reduce the number of CSE recomputations, process all
4704 // the uses of this user that we can find this way.
4706 SDUse &Use = UI.getUse();
4707 const SDValue &ToOp = To[Use.getResNo()];
4710 } while (UI != UE && *UI == User);
4712 // Now that we have modified User, add it back to the CSE maps. If it
4713 // already exists there, recursively merge the results together.
4714 AddModifiedNodeToCSEMaps(User, UpdateListener);
4718 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
4719 /// uses of other values produced by From.getNode() alone. The Deleted
4720 /// vector is handled the same way as for ReplaceAllUsesWith.
4721 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To,
4722 DAGUpdateListener *UpdateListener){
4723 // Handle the really simple, really trivial case efficiently.
4724 if (From == To) return;
4726 // Handle the simple, trivial, case efficiently.
4727 if (From.getNode()->getNumValues() == 1) {
4728 ReplaceAllUsesWith(From, To, UpdateListener);
4732 // Iterate over just the existing users of From. See the comments in
4733 // the ReplaceAllUsesWith above.
4734 SDNode::use_iterator UI = From.getNode()->use_begin(),
4735 UE = From.getNode()->use_end();
4738 bool UserRemovedFromCSEMaps = false;
4740 // A user can appear in a use list multiple times, and when this
4741 // happens the uses are usually next to each other in the list.
4742 // To help reduce the number of CSE recomputations, process all
4743 // the uses of this user that we can find this way.
4745 SDUse &Use = UI.getUse();
4747 // Skip uses of different values from the same node.
4748 if (Use.getResNo() != From.getResNo()) {
4753 // If this node hasn't been modified yet, it's still in the CSE maps,
4754 // so remove its old self from the CSE maps.
4755 if (!UserRemovedFromCSEMaps) {
4756 RemoveNodeFromCSEMaps(User);
4757 UserRemovedFromCSEMaps = true;
4762 } while (UI != UE && *UI == User);
4764 // We are iterating over all uses of the From node, so if a use
4765 // doesn't use the specific value, no changes are made.
4766 if (!UserRemovedFromCSEMaps)
4769 // Now that we have modified User, add it back to the CSE maps. If it
4770 // already exists there, recursively merge the results together.
4771 AddModifiedNodeToCSEMaps(User, UpdateListener);
4776 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
4777 /// to record information about a use.
4784 /// operator< - Sort Memos by User.
4785 bool operator<(const UseMemo &L, const UseMemo &R) {
4786 return (intptr_t)L.User < (intptr_t)R.User;
4790 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
4791 /// uses of other values produced by From.getNode() alone. The same value
4792 /// may appear in both the From and To list. The Deleted vector is
4793 /// handled the same way as for ReplaceAllUsesWith.
4794 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
4797 DAGUpdateListener *UpdateListener){
4798 // Handle the simple, trivial case efficiently.
4800 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener);
4802 // Read up all the uses and make records of them. This helps
4803 // processing new uses that are introduced during the
4804 // replacement process.
4805 SmallVector<UseMemo, 4> Uses;
4806 for (unsigned i = 0; i != Num; ++i) {
4807 unsigned FromResNo = From[i].getResNo();
4808 SDNode *FromNode = From[i].getNode();
4809 for (SDNode::use_iterator UI = FromNode->use_begin(),
4810 E = FromNode->use_end(); UI != E; ++UI) {
4811 SDUse &Use = UI.getUse();
4812 if (Use.getResNo() == FromResNo) {
4813 UseMemo Memo = { *UI, i, &Use };
4814 Uses.push_back(Memo);
4819 // Sort the uses, so that all the uses from a given User are together.
4820 std::sort(Uses.begin(), Uses.end());
4822 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
4823 UseIndex != UseIndexEnd; ) {
4824 // We know that this user uses some value of From. If it is the right
4825 // value, update it.
4826 SDNode *User = Uses[UseIndex].User;
4828 // This node is about to morph, remove its old self from the CSE maps.
4829 RemoveNodeFromCSEMaps(User);
4831 // The Uses array is sorted, so all the uses for a given User
4832 // are next to each other in the list.
4833 // To help reduce the number of CSE recomputations, process all
4834 // the uses of this user that we can find this way.
4836 unsigned i = Uses[UseIndex].Index;
4837 SDUse &Use = *Uses[UseIndex].Use;
4841 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
4843 // Now that we have modified User, add it back to the CSE maps. If it
4844 // already exists there, recursively merge the results together.
4845 AddModifiedNodeToCSEMaps(User, UpdateListener);
4849 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
4850 /// based on their topological order. It returns the maximum id and a vector
4851 /// of the SDNodes* in assigned order by reference.
4852 unsigned SelectionDAG::AssignTopologicalOrder() {
4854 unsigned DAGSize = 0;
4856 // SortedPos tracks the progress of the algorithm. Nodes before it are
4857 // sorted, nodes after it are unsorted. When the algorithm completes
4858 // it is at the end of the list.
4859 allnodes_iterator SortedPos = allnodes_begin();
4861 // Visit all the nodes. Move nodes with no operands to the front of
4862 // the list immediately. Annotate nodes that do have operands with their
4863 // operand count. Before we do this, the Node Id fields of the nodes
4864 // may contain arbitrary values. After, the Node Id fields for nodes
4865 // before SortedPos will contain the topological sort index, and the
4866 // Node Id fields for nodes At SortedPos and after will contain the
4867 // count of outstanding operands.
4868 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
4870 unsigned Degree = N->getNumOperands();
4872 // A node with no uses, add it to the result array immediately.
4873 N->setNodeId(DAGSize++);
4874 allnodes_iterator Q = N;
4876 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
4879 // Temporarily use the Node Id as scratch space for the degree count.
4880 N->setNodeId(Degree);
4884 // Visit all the nodes. As we iterate, moves nodes into sorted order,
4885 // such that by the time the end is reached all nodes will be sorted.
4886 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
4888 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
4891 unsigned Degree = P->getNodeId();
4894 // All of P's operands are sorted, so P may sorted now.
4895 P->setNodeId(DAGSize++);
4897 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
4900 // Update P's outstanding operand count.
4901 P->setNodeId(Degree);
4906 assert(SortedPos == AllNodes.end() &&
4907 "Topological sort incomplete!");
4908 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
4909 "First node in topological sort is not the entry token!");
4910 assert(AllNodes.front().getNodeId() == 0 &&
4911 "First node in topological sort has non-zero id!");
4912 assert(AllNodes.front().getNumOperands() == 0 &&
4913 "First node in topological sort has operands!");
4914 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
4915 "Last node in topologic sort has unexpected id!");
4916 assert(AllNodes.back().use_empty() &&
4917 "Last node in topologic sort has users!");
4918 assert(DAGSize == allnodes_size() && "Node count mismatch!");
4924 //===----------------------------------------------------------------------===//
4926 //===----------------------------------------------------------------------===//
4928 HandleSDNode::~HandleSDNode() {
4932 GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, const GlobalValue *GA,
4933 EVT VT, int64_t o, unsigned char TF)
4934 : SDNode(Opc, DebugLoc::getUnknownLoc(), getSDVTList(VT)),
4935 Offset(o), TargetFlags(TF) {
4936 TheGlobal = const_cast<GlobalValue*>(GA);
4939 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt,
4940 const Value *srcValue, int SVO,
4941 unsigned alignment, bool vol)
4942 : SDNode(Opc, dl, VTs), MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO) {
4943 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, vol, alignment);
4944 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
4945 assert(getAlignment() == alignment && "Alignment representation error!");
4946 assert(isVolatile() == vol && "Volatile representation error!");
4949 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs,
4951 unsigned NumOps, EVT memvt, const Value *srcValue,
4952 int SVO, unsigned alignment, bool vol)
4953 : SDNode(Opc, dl, VTs, Ops, NumOps),
4954 MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO) {
4955 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, vol, alignment);
4956 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
4957 assert(getAlignment() == alignment && "Alignment representation error!");
4958 assert(isVolatile() == vol && "Volatile representation error!");
4961 /// getMemOperand - Return a MachineMemOperand object describing the memory
4962 /// reference performed by this memory reference.
4963 MachineMemOperand MemSDNode::getMemOperand() const {
4965 if (isa<LoadSDNode>(this))
4966 Flags = MachineMemOperand::MOLoad;
4967 else if (isa<StoreSDNode>(this))
4968 Flags = MachineMemOperand::MOStore;
4969 else if (isa<AtomicSDNode>(this)) {
4970 Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
4973 const MemIntrinsicSDNode* MemIntrinNode = dyn_cast<MemIntrinsicSDNode>(this);
4974 assert(MemIntrinNode && "Unknown MemSDNode opcode!");
4975 if (MemIntrinNode->readMem()) Flags |= MachineMemOperand::MOLoad;
4976 if (MemIntrinNode->writeMem()) Flags |= MachineMemOperand::MOStore;
4979 int Size = (getMemoryVT().getSizeInBits() + 7) >> 3;
4980 if (isVolatile()) Flags |= MachineMemOperand::MOVolatile;
4982 // Check if the memory reference references a frame index
4983 const FrameIndexSDNode *FI =
4984 dyn_cast<const FrameIndexSDNode>(getBasePtr().getNode());
4985 if (!getSrcValue() && FI)
4986 return MachineMemOperand(PseudoSourceValue::getFixedStack(FI->getIndex()),
4987 Flags, 0, Size, getAlignment());
4989 return MachineMemOperand(getSrcValue(), Flags, getSrcValueOffset(),
4990 Size, getAlignment());
4993 /// Profile - Gather unique data for the node.
4995 void SDNode::Profile(FoldingSetNodeID &ID) const {
4996 AddNodeIDNode(ID, this);
4999 static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs;
5000 static EVT VTs[MVT::LAST_VALUETYPE];
5001 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
5003 /// getValueTypeList - Return a pointer to the specified value type.
5005 const EVT *SDNode::getValueTypeList(EVT VT) {
5006 sys::SmartScopedLock<true> Lock(*VTMutex);
5007 if (VT.isExtended()) {
5008 return &(*EVTs->insert(VT).first);
5010 VTs[VT.getSimpleVT().SimpleTy] = VT;
5011 return &VTs[VT.getSimpleVT().SimpleTy];
5015 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
5016 /// indicated value. This method ignores uses of other values defined by this
5018 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
5019 assert(Value < getNumValues() && "Bad value!");
5021 // TODO: Only iterate over uses of a given value of the node
5022 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
5023 if (UI.getUse().getResNo() == Value) {
5030 // Found exactly the right number of uses?
5035 /// hasAnyUseOfValue - Return true if there are any use of the indicated
5036 /// value. This method ignores uses of other values defined by this operation.
5037 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
5038 assert(Value < getNumValues() && "Bad value!");
5040 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
5041 if (UI.getUse().getResNo() == Value)
5048 /// isOnlyUserOf - Return true if this node is the only use of N.
5050 bool SDNode::isOnlyUserOf(SDNode *N) const {
5052 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
5063 /// isOperand - Return true if this node is an operand of N.
5065 bool SDValue::isOperandOf(SDNode *N) const {
5066 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5067 if (*this == N->getOperand(i))
5072 bool SDNode::isOperandOf(SDNode *N) const {
5073 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
5074 if (this == N->OperandList[i].getNode())
5079 /// reachesChainWithoutSideEffects - Return true if this operand (which must
5080 /// be a chain) reaches the specified operand without crossing any
5081 /// side-effecting instructions. In practice, this looks through token
5082 /// factors and non-volatile loads. In order to remain efficient, this only
5083 /// looks a couple of nodes in, it does not do an exhaustive search.
5084 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
5085 unsigned Depth) const {
5086 if (*this == Dest) return true;
5088 // Don't search too deeply, we just want to be able to see through
5089 // TokenFactor's etc.
5090 if (Depth == 0) return false;
5092 // If this is a token factor, all inputs to the TF happen in parallel. If any
5093 // of the operands of the TF reach dest, then we can do the xform.
5094 if (getOpcode() == ISD::TokenFactor) {
5095 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
5096 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
5101 // Loads don't have side effects, look through them.
5102 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
5103 if (!Ld->isVolatile())
5104 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
5110 static void findPredecessor(SDNode *N, const SDNode *P, bool &found,
5111 SmallPtrSet<SDNode *, 32> &Visited) {
5112 if (found || !Visited.insert(N))
5115 for (unsigned i = 0, e = N->getNumOperands(); !found && i != e; ++i) {
5116 SDNode *Op = N->getOperand(i).getNode();
5121 findPredecessor(Op, P, found, Visited);
5125 /// isPredecessorOf - Return true if this node is a predecessor of N. This node
5126 /// is either an operand of N or it can be reached by recursively traversing
5127 /// up the operands.
5128 /// NOTE: this is an expensive method. Use it carefully.
5129 bool SDNode::isPredecessorOf(SDNode *N) const {
5130 SmallPtrSet<SDNode *, 32> Visited;
5132 findPredecessor(N, this, found, Visited);
5136 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
5137 assert(Num < NumOperands && "Invalid child # of SDNode!");
5138 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
5141 std::string SDNode::getOperationName(const SelectionDAG *G) const {
5142 switch (getOpcode()) {
5144 if (getOpcode() < ISD::BUILTIN_OP_END)
5145 return "<<Unknown DAG Node>>";
5146 if (isMachineOpcode()) {
5148 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo())
5149 if (getMachineOpcode() < TII->getNumOpcodes())
5150 return TII->get(getMachineOpcode()).getName();
5151 return "<<Unknown Machine Node>>";
5154 const TargetLowering &TLI = G->getTargetLoweringInfo();
5155 const char *Name = TLI.getTargetNodeName(getOpcode());
5156 if (Name) return Name;
5157 return "<<Unknown Target Node>>";
5159 return "<<Unknown Node>>";
5162 case ISD::DELETED_NODE:
5163 return "<<Deleted Node!>>";
5165 case ISD::PREFETCH: return "Prefetch";
5166 case ISD::MEMBARRIER: return "MemBarrier";
5167 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
5168 case ISD::ATOMIC_SWAP: return "AtomicSwap";
5169 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
5170 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
5171 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
5172 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
5173 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
5174 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
5175 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
5176 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
5177 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
5178 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
5179 case ISD::PCMARKER: return "PCMarker";
5180 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
5181 case ISD::SRCVALUE: return "SrcValue";
5182 case ISD::MEMOPERAND: return "MemOperand";
5183 case ISD::EntryToken: return "EntryToken";
5184 case ISD::TokenFactor: return "TokenFactor";
5185 case ISD::AssertSext: return "AssertSext";
5186 case ISD::AssertZext: return "AssertZext";
5188 case ISD::BasicBlock: return "BasicBlock";
5189 case ISD::VALUETYPE: return "ValueType";
5190 case ISD::Register: return "Register";
5192 case ISD::Constant: return "Constant";
5193 case ISD::ConstantFP: return "ConstantFP";
5194 case ISD::GlobalAddress: return "GlobalAddress";
5195 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
5196 case ISD::FrameIndex: return "FrameIndex";
5197 case ISD::JumpTable: return "JumpTable";
5198 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
5199 case ISD::RETURNADDR: return "RETURNADDR";
5200 case ISD::FRAMEADDR: return "FRAMEADDR";
5201 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
5202 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR";
5203 case ISD::LSDAADDR: return "LSDAADDR";
5204 case ISD::EHSELECTION: return "EHSELECTION";
5205 case ISD::EH_RETURN: return "EH_RETURN";
5206 case ISD::ConstantPool: return "ConstantPool";
5207 case ISD::ExternalSymbol: return "ExternalSymbol";
5208 case ISD::INTRINSIC_WO_CHAIN: {
5209 unsigned IID = cast<ConstantSDNode>(getOperand(0))->getZExtValue();
5210 return Intrinsic::getName((Intrinsic::ID)IID);
5212 case ISD::INTRINSIC_VOID:
5213 case ISD::INTRINSIC_W_CHAIN: {
5214 unsigned IID = cast<ConstantSDNode>(getOperand(1))->getZExtValue();
5215 return Intrinsic::getName((Intrinsic::ID)IID);
5218 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
5219 case ISD::TargetConstant: return "TargetConstant";
5220 case ISD::TargetConstantFP:return "TargetConstantFP";
5221 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
5222 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
5223 case ISD::TargetFrameIndex: return "TargetFrameIndex";
5224 case ISD::TargetJumpTable: return "TargetJumpTable";
5225 case ISD::TargetConstantPool: return "TargetConstantPool";
5226 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
5228 case ISD::CopyToReg: return "CopyToReg";
5229 case ISD::CopyFromReg: return "CopyFromReg";
5230 case ISD::UNDEF: return "undef";
5231 case ISD::MERGE_VALUES: return "merge_values";
5232 case ISD::INLINEASM: return "inlineasm";
5233 case ISD::DBG_LABEL: return "dbg_label";
5234 case ISD::EH_LABEL: return "eh_label";
5235 case ISD::DECLARE: return "declare";
5236 case ISD::HANDLENODE: return "handlenode";
5239 case ISD::FABS: return "fabs";
5240 case ISD::FNEG: return "fneg";
5241 case ISD::FSQRT: return "fsqrt";
5242 case ISD::FSIN: return "fsin";
5243 case ISD::FCOS: return "fcos";
5244 case ISD::FPOWI: return "fpowi";
5245 case ISD::FPOW: return "fpow";
5246 case ISD::FTRUNC: return "ftrunc";
5247 case ISD::FFLOOR: return "ffloor";
5248 case ISD::FCEIL: return "fceil";
5249 case ISD::FRINT: return "frint";
5250 case ISD::FNEARBYINT: return "fnearbyint";
5253 case ISD::ADD: return "add";
5254 case ISD::SUB: return "sub";
5255 case ISD::MUL: return "mul";
5256 case ISD::MULHU: return "mulhu";
5257 case ISD::MULHS: return "mulhs";
5258 case ISD::SDIV: return "sdiv";
5259 case ISD::UDIV: return "udiv";
5260 case ISD::SREM: return "srem";
5261 case ISD::UREM: return "urem";
5262 case ISD::SMUL_LOHI: return "smul_lohi";
5263 case ISD::UMUL_LOHI: return "umul_lohi";
5264 case ISD::SDIVREM: return "sdivrem";
5265 case ISD::UDIVREM: return "udivrem";
5266 case ISD::AND: return "and";
5267 case ISD::OR: return "or";
5268 case ISD::XOR: return "xor";
5269 case ISD::SHL: return "shl";
5270 case ISD::SRA: return "sra";
5271 case ISD::SRL: return "srl";
5272 case ISD::ROTL: return "rotl";
5273 case ISD::ROTR: return "rotr";
5274 case ISD::FADD: return "fadd";
5275 case ISD::FSUB: return "fsub";
5276 case ISD::FMUL: return "fmul";
5277 case ISD::FDIV: return "fdiv";
5278 case ISD::FREM: return "frem";
5279 case ISD::FCOPYSIGN: return "fcopysign";
5280 case ISD::FGETSIGN: return "fgetsign";
5282 case ISD::SETCC: return "setcc";
5283 case ISD::VSETCC: return "vsetcc";
5284 case ISD::SELECT: return "select";
5285 case ISD::SELECT_CC: return "select_cc";
5286 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
5287 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
5288 case ISD::CONCAT_VECTORS: return "concat_vectors";
5289 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
5290 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
5291 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
5292 case ISD::CARRY_FALSE: return "carry_false";
5293 case ISD::ADDC: return "addc";
5294 case ISD::ADDE: return "adde";
5295 case ISD::SADDO: return "saddo";
5296 case ISD::UADDO: return "uaddo";
5297 case ISD::SSUBO: return "ssubo";
5298 case ISD::USUBO: return "usubo";
5299 case ISD::SMULO: return "smulo";
5300 case ISD::UMULO: return "umulo";
5301 case ISD::SUBC: return "subc";
5302 case ISD::SUBE: return "sube";
5303 case ISD::SHL_PARTS: return "shl_parts";
5304 case ISD::SRA_PARTS: return "sra_parts";
5305 case ISD::SRL_PARTS: return "srl_parts";
5307 // Conversion operators.
5308 case ISD::SIGN_EXTEND: return "sign_extend";
5309 case ISD::ZERO_EXTEND: return "zero_extend";
5310 case ISD::ANY_EXTEND: return "any_extend";
5311 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
5312 case ISD::TRUNCATE: return "truncate";
5313 case ISD::FP_ROUND: return "fp_round";
5314 case ISD::FLT_ROUNDS_: return "flt_rounds";
5315 case ISD::FP_ROUND_INREG: return "fp_round_inreg";
5316 case ISD::FP_EXTEND: return "fp_extend";
5318 case ISD::SINT_TO_FP: return "sint_to_fp";
5319 case ISD::UINT_TO_FP: return "uint_to_fp";
5320 case ISD::FP_TO_SINT: return "fp_to_sint";
5321 case ISD::FP_TO_UINT: return "fp_to_uint";
5322 case ISD::BIT_CONVERT: return "bit_convert";
5324 case ISD::CONVERT_RNDSAT: {
5325 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) {
5326 default: llvm_unreachable("Unknown cvt code!");
5327 case ISD::CVT_FF: return "cvt_ff";
5328 case ISD::CVT_FS: return "cvt_fs";
5329 case ISD::CVT_FU: return "cvt_fu";
5330 case ISD::CVT_SF: return "cvt_sf";
5331 case ISD::CVT_UF: return "cvt_uf";
5332 case ISD::CVT_SS: return "cvt_ss";
5333 case ISD::CVT_SU: return "cvt_su";
5334 case ISD::CVT_US: return "cvt_us";
5335 case ISD::CVT_UU: return "cvt_uu";
5339 // Control flow instructions
5340 case ISD::BR: return "br";
5341 case ISD::BRIND: return "brind";
5342 case ISD::BR_JT: return "br_jt";
5343 case ISD::BRCOND: return "brcond";
5344 case ISD::BR_CC: return "br_cc";
5345 case ISD::CALLSEQ_START: return "callseq_start";
5346 case ISD::CALLSEQ_END: return "callseq_end";
5349 case ISD::LOAD: return "load";
5350 case ISD::STORE: return "store";
5351 case ISD::VAARG: return "vaarg";
5352 case ISD::VACOPY: return "vacopy";
5353 case ISD::VAEND: return "vaend";
5354 case ISD::VASTART: return "vastart";
5355 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
5356 case ISD::EXTRACT_ELEMENT: return "extract_element";
5357 case ISD::BUILD_PAIR: return "build_pair";
5358 case ISD::STACKSAVE: return "stacksave";
5359 case ISD::STACKRESTORE: return "stackrestore";
5360 case ISD::TRAP: return "trap";
5363 case ISD::BSWAP: return "bswap";
5364 case ISD::CTPOP: return "ctpop";
5365 case ISD::CTTZ: return "cttz";
5366 case ISD::CTLZ: return "ctlz";
5369 case ISD::DBG_STOPPOINT: return "dbg_stoppoint";
5370 case ISD::DEBUG_LOC: return "debug_loc";
5373 case ISD::TRAMPOLINE: return "trampoline";
5376 switch (cast<CondCodeSDNode>(this)->get()) {
5377 default: llvm_unreachable("Unknown setcc condition!");
5378 case ISD::SETOEQ: return "setoeq";
5379 case ISD::SETOGT: return "setogt";
5380 case ISD::SETOGE: return "setoge";
5381 case ISD::SETOLT: return "setolt";
5382 case ISD::SETOLE: return "setole";
5383 case ISD::SETONE: return "setone";
5385 case ISD::SETO: return "seto";
5386 case ISD::SETUO: return "setuo";
5387 case ISD::SETUEQ: return "setue";
5388 case ISD::SETUGT: return "setugt";
5389 case ISD::SETUGE: return "setuge";
5390 case ISD::SETULT: return "setult";
5391 case ISD::SETULE: return "setule";
5392 case ISD::SETUNE: return "setune";
5394 case ISD::SETEQ: return "seteq";
5395 case ISD::SETGT: return "setgt";
5396 case ISD::SETGE: return "setge";
5397 case ISD::SETLT: return "setlt";
5398 case ISD::SETLE: return "setle";
5399 case ISD::SETNE: return "setne";
5404 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
5413 return "<post-inc>";
5415 return "<post-dec>";
5419 std::string ISD::ArgFlagsTy::getArgFlagsString() {
5420 std::string S = "< ";
5434 if (getByValAlign())
5435 S += "byval-align:" + utostr(getByValAlign()) + " ";
5437 S += "orig-align:" + utostr(getOrigAlign()) + " ";
5439 S += "byval-size:" + utostr(getByValSize()) + " ";
5443 void SDNode::dump() const { dump(0); }
5444 void SDNode::dump(const SelectionDAG *G) const {
5448 void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const {
5449 OS << (void*)this << ": ";
5451 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
5453 if (getValueType(i) == MVT::Other)
5456 OS << getValueType(i).getEVTString();
5458 OS << " = " << getOperationName(G);
5461 void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const {
5462 if (!isTargetOpcode() && getOpcode() == ISD::VECTOR_SHUFFLE) {
5463 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(this);
5465 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
5466 int Idx = SVN->getMaskElt(i);
5476 if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
5477 OS << '<' << CSDN->getAPIntValue() << '>';
5478 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
5479 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle)
5480 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
5481 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble)
5482 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
5485 CSDN->getValueAPF().bitcastToAPInt().dump();
5488 } else if (const GlobalAddressSDNode *GADN =
5489 dyn_cast<GlobalAddressSDNode>(this)) {
5490 int64_t offset = GADN->getOffset();
5492 WriteAsOperand(OS, GADN->getGlobal());
5495 OS << " + " << offset;
5497 OS << " " << offset;
5498 if (unsigned int TF = GADN->getTargetFlags())
5499 OS << " [TF=" << TF << ']';
5500 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
5501 OS << "<" << FIDN->getIndex() << ">";
5502 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
5503 OS << "<" << JTDN->getIndex() << ">";
5504 if (unsigned int TF = JTDN->getTargetFlags())
5505 OS << " [TF=" << TF << ']';
5506 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
5507 int offset = CP->getOffset();
5508 if (CP->isMachineConstantPoolEntry())
5509 OS << "<" << *CP->getMachineCPVal() << ">";
5511 OS << "<" << *CP->getConstVal() << ">";
5513 OS << " + " << offset;
5515 OS << " " << offset;
5516 if (unsigned int TF = CP->getTargetFlags())
5517 OS << " [TF=" << TF << ']';
5518 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
5520 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
5522 OS << LBB->getName() << " ";
5523 OS << (const void*)BBDN->getBasicBlock() << ">";
5524 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
5525 if (G && R->getReg() &&
5526 TargetRegisterInfo::isPhysicalRegister(R->getReg())) {
5527 OS << " " << G->getTarget().getRegisterInfo()->getName(R->getReg());
5529 OS << " #" << R->getReg();
5531 } else if (const ExternalSymbolSDNode *ES =
5532 dyn_cast<ExternalSymbolSDNode>(this)) {
5533 OS << "'" << ES->getSymbol() << "'";
5534 if (unsigned int TF = ES->getTargetFlags())
5535 OS << " [TF=" << TF << ']';
5536 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
5538 OS << "<" << M->getValue() << ">";
5541 } else if (const MemOperandSDNode *M = dyn_cast<MemOperandSDNode>(this)) {
5542 if (M->MO.getValue())
5543 OS << "<" << M->MO.getValue() << ":" << M->MO.getOffset() << ">";
5545 OS << "<null:" << M->MO.getOffset() << ">";
5546 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
5547 OS << ":" << N->getVT().getEVTString();
5549 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
5550 const Value *SrcValue = LD->getSrcValue();
5551 int SrcOffset = LD->getSrcValueOffset();
5557 OS << ":" << SrcOffset << ">";
5560 switch (LD->getExtensionType()) {
5561 default: doExt = false; break;
5562 case ISD::EXTLOAD: OS << " <anyext "; break;
5563 case ISD::SEXTLOAD: OS << " <sext "; break;
5564 case ISD::ZEXTLOAD: OS << " <zext "; break;
5567 OS << LD->getMemoryVT().getEVTString() << ">";
5569 const char *AM = getIndexedModeName(LD->getAddressingMode());
5572 if (LD->isVolatile())
5573 OS << " <volatile>";
5574 OS << " alignment=" << LD->getAlignment();
5575 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
5576 const Value *SrcValue = ST->getSrcValue();
5577 int SrcOffset = ST->getSrcValueOffset();
5583 OS << ":" << SrcOffset << ">";
5585 if (ST->isTruncatingStore())
5586 OS << " <trunc " << ST->getMemoryVT().getEVTString() << ">";
5588 const char *AM = getIndexedModeName(ST->getAddressingMode());
5591 if (ST->isVolatile())
5592 OS << " <volatile>";
5593 OS << " alignment=" << ST->getAlignment();
5594 } else if (const AtomicSDNode* AT = dyn_cast<AtomicSDNode>(this)) {
5595 const Value *SrcValue = AT->getSrcValue();
5596 int SrcOffset = AT->getSrcValueOffset();
5602 OS << ":" << SrcOffset << ">";
5603 if (AT->isVolatile())
5604 OS << " <volatile>";
5605 OS << " alignment=" << AT->getAlignment();
5609 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
5612 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
5614 OS << (void*)getOperand(i).getNode();
5615 if (unsigned RN = getOperand(i).getResNo())
5618 print_details(OS, G);
5621 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
5622 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5623 if (N->getOperand(i).getNode()->hasOneUse())
5624 DumpNodes(N->getOperand(i).getNode(), indent+2, G);
5626 cerr << "\n" << std::string(indent+2, ' ')
5627 << (void*)N->getOperand(i).getNode() << ": <multiple use>";
5630 cerr << "\n" << std::string(indent, ' ');
5634 void SelectionDAG::dump() const {
5635 cerr << "SelectionDAG has " << AllNodes.size() << " nodes:";
5637 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end();
5639 const SDNode *N = I;
5640 if (!N->hasOneUse() && N != getRoot().getNode())
5641 DumpNodes(N, 2, this);
5644 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
5649 void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
5651 print_details(OS, G);
5654 typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet;
5655 static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
5656 const SelectionDAG *G, VisitedSDNodeSet &once) {
5657 if (!once.insert(N)) // If we've been here before, return now.
5659 // Dump the current SDNode, but don't end the line yet.
5660 OS << std::string(indent, ' ');
5662 // Having printed this SDNode, walk the children:
5663 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
5664 const SDNode *child = N->getOperand(i).getNode();
5667 if (child->getNumOperands() == 0) {
5668 // This child has no grandchildren; print it inline right here.
5669 child->printr(OS, G);
5671 } else { // Just the address. FIXME: also print the child's opcode
5673 if (unsigned RN = N->getOperand(i).getResNo())
5678 // Dump children that have grandchildren on their own line(s).
5679 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
5680 const SDNode *child = N->getOperand(i).getNode();
5681 DumpNodesr(OS, child, indent+2, G, once);
5685 void SDNode::dumpr() const {
5686 VisitedSDNodeSet once;
5687 DumpNodesr(errs(), this, 0, 0, once);
5691 // getAddressSpace - Return the address space this GlobalAddress belongs to.
5692 unsigned GlobalAddressSDNode::getAddressSpace() const {
5693 return getGlobal()->getType()->getAddressSpace();
5697 const Type *ConstantPoolSDNode::getType() const {
5698 if (isMachineConstantPoolEntry())
5699 return Val.MachineCPVal->getType();
5700 return Val.ConstVal->getType();
5703 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
5705 unsigned &SplatBitSize,
5707 unsigned MinSplatBits) {
5708 EVT VT = getValueType(0);
5709 assert(VT.isVector() && "Expected a vector type");
5710 unsigned sz = VT.getSizeInBits();
5711 if (MinSplatBits > sz)
5714 SplatValue = APInt(sz, 0);
5715 SplatUndef = APInt(sz, 0);
5717 // Get the bits. Bits with undefined values (when the corresponding element
5718 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
5719 // in SplatValue. If any of the values are not constant, give up and return
5721 unsigned int nOps = getNumOperands();
5722 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
5723 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
5724 for (unsigned i = 0; i < nOps; ++i) {
5725 SDValue OpVal = getOperand(i);
5726 unsigned BitPos = i * EltBitSize;
5728 if (OpVal.getOpcode() == ISD::UNDEF)
5729 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos +EltBitSize);
5730 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
5731 SplatValue |= (APInt(CN->getAPIntValue()).zextOrTrunc(EltBitSize).
5732 zextOrTrunc(sz) << BitPos);
5733 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
5734 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
5739 // The build_vector is all constants or undefs. Find the smallest element
5740 // size that splats the vector.
5742 HasAnyUndefs = (SplatUndef != 0);
5745 unsigned HalfSize = sz / 2;
5746 APInt HighValue = APInt(SplatValue).lshr(HalfSize).trunc(HalfSize);
5747 APInt LowValue = APInt(SplatValue).trunc(HalfSize);
5748 APInt HighUndef = APInt(SplatUndef).lshr(HalfSize).trunc(HalfSize);
5749 APInt LowUndef = APInt(SplatUndef).trunc(HalfSize);
5751 // If the two halves do not match (ignoring undef bits), stop here.
5752 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
5753 MinSplatBits > HalfSize)
5756 SplatValue = HighValue | LowValue;
5757 SplatUndef = HighUndef & LowUndef;
5766 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
5767 // Find the first non-undef value in the shuffle mask.
5769 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
5772 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
5774 // Make sure all remaining elements are either undef or the same as the first
5776 for (int Idx = Mask[i]; i != e; ++i)
5777 if (Mask[i] >= 0 && Mask[i] != Idx)