1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "SDNodeOrdering.h"
16 #include "SDNodeDbgValue.h"
17 #include "llvm/Constants.h"
18 #include "llvm/Analysis/DebugInfo.h"
19 #include "llvm/Analysis/ValueTracking.h"
20 #include "llvm/Function.h"
21 #include "llvm/GlobalAlias.h"
22 #include "llvm/GlobalVariable.h"
23 #include "llvm/Intrinsics.h"
24 #include "llvm/DerivedTypes.h"
25 #include "llvm/Assembly/Writer.h"
26 #include "llvm/CallingConv.h"
27 #include "llvm/CodeGen/MachineBasicBlock.h"
28 #include "llvm/CodeGen/MachineConstantPool.h"
29 #include "llvm/CodeGen/MachineFrameInfo.h"
30 #include "llvm/CodeGen/MachineModuleInfo.h"
31 #include "llvm/Target/TargetRegisterInfo.h"
32 #include "llvm/Target/TargetData.h"
33 #include "llvm/Target/TargetLowering.h"
34 #include "llvm/Target/TargetSelectionDAGInfo.h"
35 #include "llvm/Target/TargetOptions.h"
36 #include "llvm/Target/TargetInstrInfo.h"
37 #include "llvm/Target/TargetIntrinsicInfo.h"
38 #include "llvm/Target/TargetMachine.h"
39 #include "llvm/Support/CommandLine.h"
40 #include "llvm/Support/Debug.h"
41 #include "llvm/Support/ErrorHandling.h"
42 #include "llvm/Support/ManagedStatic.h"
43 #include "llvm/Support/MathExtras.h"
44 #include "llvm/Support/raw_ostream.h"
45 #include "llvm/Support/Mutex.h"
46 #include "llvm/ADT/SetVector.h"
47 #include "llvm/ADT/SmallPtrSet.h"
48 #include "llvm/ADT/SmallSet.h"
49 #include "llvm/ADT/SmallVector.h"
50 #include "llvm/ADT/StringExtras.h"
55 /// makeVTList - Return an instance of the SDVTList struct initialized with the
56 /// specified members.
57 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
58 SDVTList Res = {VTs, NumVTs};
62 static const fltSemantics *EVTToAPFloatSemantics(EVT VT) {
63 switch (VT.getSimpleVT().SimpleTy) {
64 default: llvm_unreachable("Unknown FP format");
65 case MVT::f32: return &APFloat::IEEEsingle;
66 case MVT::f64: return &APFloat::IEEEdouble;
67 case MVT::f80: return &APFloat::x87DoubleExtended;
68 case MVT::f128: return &APFloat::IEEEquad;
69 case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
73 SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {}
75 //===----------------------------------------------------------------------===//
76 // ConstantFPSDNode Class
77 //===----------------------------------------------------------------------===//
79 /// isExactlyValue - We don't rely on operator== working on double values, as
80 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
81 /// As such, this method can be used to do an exact bit-for-bit comparison of
82 /// two floating point values.
83 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
84 return getValueAPF().bitwiseIsEqual(V);
87 bool ConstantFPSDNode::isValueValidForType(EVT VT,
89 assert(VT.isFloatingPoint() && "Can only convert between FP types");
91 // PPC long double cannot be converted to any other type.
92 if (VT == MVT::ppcf128 ||
93 &Val.getSemantics() == &APFloat::PPCDoubleDouble)
96 // convert modifies in place, so make a copy.
97 APFloat Val2 = APFloat(Val);
99 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
104 //===----------------------------------------------------------------------===//
106 //===----------------------------------------------------------------------===//
108 /// isBuildVectorAllOnes - Return true if the specified node is a
109 /// BUILD_VECTOR where all of the elements are ~0 or undef.
110 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
111 // Look through a bit convert.
112 if (N->getOpcode() == ISD::BITCAST)
113 N = N->getOperand(0).getNode();
115 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
117 unsigned i = 0, e = N->getNumOperands();
119 // Skip over all of the undef values.
120 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
123 // Do not accept an all-undef vector.
124 if (i == e) return false;
126 // Do not accept build_vectors that aren't all constants or which have non-~0
127 // elements. We have to be a bit careful here, as the type of the constant
128 // may not be the same as the type of the vector elements due to type
129 // legalization (the elements are promoted to a legal type for the target and
130 // a vector of a type may be legal when the base element type is not).
131 // We only want to check enough bits to cover the vector elements, because
132 // we care if the resultant vector is all ones, not whether the individual
134 SDValue NotZero = N->getOperand(i);
135 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits();
136 if (isa<ConstantSDNode>(NotZero)) {
137 if (cast<ConstantSDNode>(NotZero)->getAPIntValue().countTrailingOnes() <
140 } else if (isa<ConstantFPSDNode>(NotZero)) {
141 if (cast<ConstantFPSDNode>(NotZero)->getValueAPF()
142 .bitcastToAPInt().countTrailingOnes() < EltSize)
147 // Okay, we have at least one ~0 value, check to see if the rest match or are
148 // undefs. Even with the above element type twiddling, this should be OK, as
149 // the same type legalization should have applied to all the elements.
150 for (++i; i != e; ++i)
151 if (N->getOperand(i) != NotZero &&
152 N->getOperand(i).getOpcode() != ISD::UNDEF)
158 /// isBuildVectorAllZeros - Return true if the specified node is a
159 /// BUILD_VECTOR where all of the elements are 0 or undef.
160 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
161 // Look through a bit convert.
162 if (N->getOpcode() == ISD::BITCAST)
163 N = N->getOperand(0).getNode();
165 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
167 unsigned i = 0, e = N->getNumOperands();
169 // Skip over all of the undef values.
170 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
173 // Do not accept an all-undef vector.
174 if (i == e) return false;
176 // Do not accept build_vectors that aren't all constants or which have non-0
178 SDValue Zero = N->getOperand(i);
179 if (isa<ConstantSDNode>(Zero)) {
180 if (!cast<ConstantSDNode>(Zero)->isNullValue())
182 } else if (isa<ConstantFPSDNode>(Zero)) {
183 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero())
188 // Okay, we have at least one 0 value, check to see if the rest match or are
190 for (++i; i != e; ++i)
191 if (N->getOperand(i) != Zero &&
192 N->getOperand(i).getOpcode() != ISD::UNDEF)
197 /// isScalarToVector - Return true if the specified node is a
198 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
199 /// element is not an undef.
200 bool ISD::isScalarToVector(const SDNode *N) {
201 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
204 if (N->getOpcode() != ISD::BUILD_VECTOR)
206 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
208 unsigned NumElems = N->getNumOperands();
211 for (unsigned i = 1; i < NumElems; ++i) {
212 SDValue V = N->getOperand(i);
213 if (V.getOpcode() != ISD::UNDEF)
219 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
220 /// when given the operation for (X op Y).
221 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
222 // To perform this operation, we just need to swap the L and G bits of the
224 unsigned OldL = (Operation >> 2) & 1;
225 unsigned OldG = (Operation >> 1) & 1;
226 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
227 (OldL << 1) | // New G bit
228 (OldG << 2)); // New L bit.
231 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
232 /// 'op' is a valid SetCC operation.
233 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
234 unsigned Operation = Op;
236 Operation ^= 7; // Flip L, G, E bits, but not U.
238 Operation ^= 15; // Flip all of the condition bits.
240 if (Operation > ISD::SETTRUE2)
241 Operation &= ~8; // Don't let N and U bits get set.
243 return ISD::CondCode(Operation);
247 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
248 /// signed operation and 2 if the result is an unsigned comparison. Return zero
249 /// if the operation does not depend on the sign of the input (setne and seteq).
250 static int isSignedOp(ISD::CondCode Opcode) {
252 default: llvm_unreachable("Illegal integer setcc operation!");
254 case ISD::SETNE: return 0;
258 case ISD::SETGE: return 1;
262 case ISD::SETUGE: return 2;
266 /// getSetCCOrOperation - Return the result of a logical OR between different
267 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
268 /// returns SETCC_INVALID if it is not possible to represent the resultant
270 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
272 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
273 // Cannot fold a signed integer setcc with an unsigned integer setcc.
274 return ISD::SETCC_INVALID;
276 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
278 // If the N and U bits get set then the resultant comparison DOES suddenly
279 // care about orderedness, and is true when ordered.
280 if (Op > ISD::SETTRUE2)
281 Op &= ~16; // Clear the U bit if the N bit is set.
283 // Canonicalize illegal integer setcc's.
284 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
287 return ISD::CondCode(Op);
290 /// getSetCCAndOperation - Return the result of a logical AND between different
291 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
292 /// function returns zero if it is not possible to represent the resultant
294 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
296 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
297 // Cannot fold a signed setcc with an unsigned setcc.
298 return ISD::SETCC_INVALID;
300 // Combine all of the condition bits.
301 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
303 // Canonicalize illegal integer setcc's.
307 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
308 case ISD::SETOEQ: // SETEQ & SETU[LG]E
309 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
310 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
311 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
318 //===----------------------------------------------------------------------===//
319 // SDNode Profile Support
320 //===----------------------------------------------------------------------===//
322 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
324 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
328 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
329 /// solely with their pointer.
330 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
331 ID.AddPointer(VTList.VTs);
334 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
336 static void AddNodeIDOperands(FoldingSetNodeID &ID,
337 const SDValue *Ops, unsigned NumOps) {
338 for (; NumOps; --NumOps, ++Ops) {
339 ID.AddPointer(Ops->getNode());
340 ID.AddInteger(Ops->getResNo());
344 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
346 static void AddNodeIDOperands(FoldingSetNodeID &ID,
347 const SDUse *Ops, unsigned NumOps) {
348 for (; NumOps; --NumOps, ++Ops) {
349 ID.AddPointer(Ops->getNode());
350 ID.AddInteger(Ops->getResNo());
354 static void AddNodeIDNode(FoldingSetNodeID &ID,
355 unsigned short OpC, SDVTList VTList,
356 const SDValue *OpList, unsigned N) {
357 AddNodeIDOpcode(ID, OpC);
358 AddNodeIDValueTypes(ID, VTList);
359 AddNodeIDOperands(ID, OpList, N);
362 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
364 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
365 switch (N->getOpcode()) {
366 case ISD::TargetExternalSymbol:
367 case ISD::ExternalSymbol:
368 llvm_unreachable("Should only be used on nodes with operands");
369 default: break; // Normal nodes don't need extra info.
370 case ISD::TargetConstant:
372 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
374 case ISD::TargetConstantFP:
375 case ISD::ConstantFP: {
376 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
379 case ISD::TargetGlobalAddress:
380 case ISD::GlobalAddress:
381 case ISD::TargetGlobalTLSAddress:
382 case ISD::GlobalTLSAddress: {
383 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
384 ID.AddPointer(GA->getGlobal());
385 ID.AddInteger(GA->getOffset());
386 ID.AddInteger(GA->getTargetFlags());
389 case ISD::BasicBlock:
390 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
393 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
395 case ISD::RegisterMask:
396 ID.AddPointer(cast<RegisterMaskSDNode>(N)->getRegMask());
399 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
401 case ISD::FrameIndex:
402 case ISD::TargetFrameIndex:
403 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
406 case ISD::TargetJumpTable:
407 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
408 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
410 case ISD::ConstantPool:
411 case ISD::TargetConstantPool: {
412 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
413 ID.AddInteger(CP->getAlignment());
414 ID.AddInteger(CP->getOffset());
415 if (CP->isMachineConstantPoolEntry())
416 CP->getMachineCPVal()->addSelectionDAGCSEId(ID);
418 ID.AddPointer(CP->getConstVal());
419 ID.AddInteger(CP->getTargetFlags());
423 const LoadSDNode *LD = cast<LoadSDNode>(N);
424 ID.AddInteger(LD->getMemoryVT().getRawBits());
425 ID.AddInteger(LD->getRawSubclassData());
429 const StoreSDNode *ST = cast<StoreSDNode>(N);
430 ID.AddInteger(ST->getMemoryVT().getRawBits());
431 ID.AddInteger(ST->getRawSubclassData());
434 case ISD::ATOMIC_CMP_SWAP:
435 case ISD::ATOMIC_SWAP:
436 case ISD::ATOMIC_LOAD_ADD:
437 case ISD::ATOMIC_LOAD_SUB:
438 case ISD::ATOMIC_LOAD_AND:
439 case ISD::ATOMIC_LOAD_OR:
440 case ISD::ATOMIC_LOAD_XOR:
441 case ISD::ATOMIC_LOAD_NAND:
442 case ISD::ATOMIC_LOAD_MIN:
443 case ISD::ATOMIC_LOAD_MAX:
444 case ISD::ATOMIC_LOAD_UMIN:
445 case ISD::ATOMIC_LOAD_UMAX:
446 case ISD::ATOMIC_LOAD:
447 case ISD::ATOMIC_STORE: {
448 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
449 ID.AddInteger(AT->getMemoryVT().getRawBits());
450 ID.AddInteger(AT->getRawSubclassData());
453 case ISD::VECTOR_SHUFFLE: {
454 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
455 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
457 ID.AddInteger(SVN->getMaskElt(i));
460 case ISD::TargetBlockAddress:
461 case ISD::BlockAddress: {
462 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress());
463 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags());
466 } // end switch (N->getOpcode())
469 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
471 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
472 AddNodeIDOpcode(ID, N->getOpcode());
473 // Add the return value info.
474 AddNodeIDValueTypes(ID, N->getVTList());
475 // Add the operand info.
476 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
478 // Handle SDNode leafs with special info.
479 AddNodeIDCustom(ID, N);
482 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
483 /// the CSE map that carries volatility, temporalness, indexing mode, and
484 /// extension/truncation information.
486 static inline unsigned
487 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile,
488 bool isNonTemporal, bool isInvariant) {
489 assert((ConvType & 3) == ConvType &&
490 "ConvType may not require more than 2 bits!");
491 assert((AM & 7) == AM &&
492 "AM may not require more than 3 bits!");
496 (isNonTemporal << 6) |
500 //===----------------------------------------------------------------------===//
501 // SelectionDAG Class
502 //===----------------------------------------------------------------------===//
504 /// doNotCSE - Return true if CSE should not be performed for this node.
505 static bool doNotCSE(SDNode *N) {
506 if (N->getValueType(0) == MVT::Glue)
507 return true; // Never CSE anything that produces a flag.
509 switch (N->getOpcode()) {
511 case ISD::HANDLENODE:
513 return true; // Never CSE these nodes.
516 // Check that remaining values produced are not flags.
517 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
518 if (N->getValueType(i) == MVT::Glue)
519 return true; // Never CSE anything that produces a flag.
524 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
526 void SelectionDAG::RemoveDeadNodes() {
527 // Create a dummy node (which is not added to allnodes), that adds a reference
528 // to the root node, preventing it from being deleted.
529 HandleSDNode Dummy(getRoot());
531 SmallVector<SDNode*, 128> DeadNodes;
533 // Add all obviously-dead nodes to the DeadNodes worklist.
534 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
536 DeadNodes.push_back(I);
538 RemoveDeadNodes(DeadNodes);
540 // If the root changed (e.g. it was a dead load, update the root).
541 setRoot(Dummy.getValue());
544 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
545 /// given list, and any nodes that become unreachable as a result.
546 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes,
547 DAGUpdateListener *UpdateListener) {
549 // Process the worklist, deleting the nodes and adding their uses to the
551 while (!DeadNodes.empty()) {
552 SDNode *N = DeadNodes.pop_back_val();
555 UpdateListener->NodeDeleted(N, 0);
557 // Take the node out of the appropriate CSE map.
558 RemoveNodeFromCSEMaps(N);
560 // Next, brutally remove the operand list. This is safe to do, as there are
561 // no cycles in the graph.
562 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
564 SDNode *Operand = Use.getNode();
567 // Now that we removed this operand, see if there are no uses of it left.
568 if (Operand->use_empty())
569 DeadNodes.push_back(Operand);
576 void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){
577 SmallVector<SDNode*, 16> DeadNodes(1, N);
579 // Create a dummy node that adds a reference to the root node, preventing
580 // it from being deleted. (This matters if the root is an operand of the
582 HandleSDNode Dummy(getRoot());
584 RemoveDeadNodes(DeadNodes, UpdateListener);
587 void SelectionDAG::DeleteNode(SDNode *N) {
588 // First take this out of the appropriate CSE map.
589 RemoveNodeFromCSEMaps(N);
591 // Finally, remove uses due to operands of this node, remove from the
592 // AllNodes list, and delete the node.
593 DeleteNodeNotInCSEMaps(N);
596 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
597 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
598 assert(N->use_empty() && "Cannot delete a node that is not dead!");
600 // Drop all of the operands and decrement used node's use counts.
606 void SelectionDAG::DeallocateNode(SDNode *N) {
607 if (N->OperandsNeedDelete)
608 delete[] N->OperandList;
610 // Set the opcode to DELETED_NODE to help catch bugs when node
611 // memory is reallocated.
612 N->NodeType = ISD::DELETED_NODE;
614 NodeAllocator.Deallocate(AllNodes.remove(N));
616 // Remove the ordering of this node.
619 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them.
620 ArrayRef<SDDbgValue*> DbgVals = DbgInfo->getSDDbgValues(N);
621 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i)
622 DbgVals[i]->setIsInvalidated();
625 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
626 /// correspond to it. This is useful when we're about to delete or repurpose
627 /// the node. We don't want future request for structurally identical nodes
628 /// to return N anymore.
629 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
631 switch (N->getOpcode()) {
632 case ISD::HANDLENODE: return false; // noop.
634 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
635 "Cond code doesn't exist!");
636 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
637 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
639 case ISD::ExternalSymbol:
640 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
642 case ISD::TargetExternalSymbol: {
643 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
644 Erased = TargetExternalSymbols.erase(
645 std::pair<std::string,unsigned char>(ESN->getSymbol(),
646 ESN->getTargetFlags()));
649 case ISD::VALUETYPE: {
650 EVT VT = cast<VTSDNode>(N)->getVT();
651 if (VT.isExtended()) {
652 Erased = ExtendedValueTypeNodes.erase(VT);
654 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0;
655 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0;
660 // Remove it from the CSE Map.
661 assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!");
662 assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!");
663 Erased = CSEMap.RemoveNode(N);
667 // Verify that the node was actually in one of the CSE maps, unless it has a
668 // flag result (which cannot be CSE'd) or is one of the special cases that are
669 // not subject to CSE.
670 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue &&
671 !N->isMachineOpcode() && !doNotCSE(N)) {
674 llvm_unreachable("Node is not in map!");
680 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
681 /// maps and modified in place. Add it back to the CSE maps, unless an identical
682 /// node already exists, in which case transfer all its users to the existing
683 /// node. This transfer can potentially trigger recursive merging.
686 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N,
687 DAGUpdateListener *UpdateListener) {
688 // For node types that aren't CSE'd, just act as if no identical node
691 SDNode *Existing = CSEMap.GetOrInsertNode(N);
693 // If there was already an existing matching node, use ReplaceAllUsesWith
694 // to replace the dead one with the existing one. This can cause
695 // recursive merging of other unrelated nodes down the line.
696 ReplaceAllUsesWith(N, Existing, UpdateListener);
698 // N is now dead. Inform the listener if it exists and delete it.
700 UpdateListener->NodeDeleted(N, Existing);
701 DeleteNodeNotInCSEMaps(N);
706 // If the node doesn't already exist, we updated it. Inform a listener if
709 UpdateListener->NodeUpdated(N);
712 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
713 /// were replaced with those specified. If this node is never memoized,
714 /// return null, otherwise return a pointer to the slot it would take. If a
715 /// node already exists with these operands, the slot will be non-null.
716 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
721 SDValue Ops[] = { Op };
723 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
724 AddNodeIDCustom(ID, N);
725 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
729 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
730 /// were replaced with those specified. If this node is never memoized,
731 /// return null, otherwise return a pointer to the slot it would take. If a
732 /// node already exists with these operands, the slot will be non-null.
733 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
734 SDValue Op1, SDValue Op2,
739 SDValue Ops[] = { Op1, Op2 };
741 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
742 AddNodeIDCustom(ID, N);
743 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
748 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
749 /// were replaced with those specified. If this node is never memoized,
750 /// return null, otherwise return a pointer to the slot it would take. If a
751 /// node already exists with these operands, the slot will be non-null.
752 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
753 const SDValue *Ops,unsigned NumOps,
759 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
760 AddNodeIDCustom(ID, N);
761 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
766 /// VerifyNodeCommon - Sanity check the given node. Aborts if it is invalid.
767 static void VerifyNodeCommon(SDNode *N) {
768 switch (N->getOpcode()) {
771 case ISD::BUILD_PAIR: {
772 EVT VT = N->getValueType(0);
773 assert(N->getNumValues() == 1 && "Too many results!");
774 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
775 "Wrong return type!");
776 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
777 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
778 "Mismatched operand types!");
779 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
780 "Wrong operand type!");
781 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
782 "Wrong return type size");
785 case ISD::BUILD_VECTOR: {
786 assert(N->getNumValues() == 1 && "Too many results!");
787 assert(N->getValueType(0).isVector() && "Wrong return type!");
788 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
789 "Wrong number of operands!");
790 EVT EltVT = N->getValueType(0).getVectorElementType();
791 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) {
792 assert((I->getValueType() == EltVT ||
793 (EltVT.isInteger() && I->getValueType().isInteger() &&
794 EltVT.bitsLE(I->getValueType()))) &&
795 "Wrong operand type!");
796 assert(I->getValueType() == N->getOperand(0).getValueType() &&
797 "Operands must all have the same type");
804 /// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid.
805 static void VerifySDNode(SDNode *N) {
806 // The SDNode allocators cannot be used to allocate nodes with fields that are
807 // not present in an SDNode!
808 assert(!isa<MemSDNode>(N) && "Bad MemSDNode!");
809 assert(!isa<ShuffleVectorSDNode>(N) && "Bad ShuffleVectorSDNode!");
810 assert(!isa<ConstantSDNode>(N) && "Bad ConstantSDNode!");
811 assert(!isa<ConstantFPSDNode>(N) && "Bad ConstantFPSDNode!");
812 assert(!isa<GlobalAddressSDNode>(N) && "Bad GlobalAddressSDNode!");
813 assert(!isa<FrameIndexSDNode>(N) && "Bad FrameIndexSDNode!");
814 assert(!isa<JumpTableSDNode>(N) && "Bad JumpTableSDNode!");
815 assert(!isa<ConstantPoolSDNode>(N) && "Bad ConstantPoolSDNode!");
816 assert(!isa<BasicBlockSDNode>(N) && "Bad BasicBlockSDNode!");
817 assert(!isa<SrcValueSDNode>(N) && "Bad SrcValueSDNode!");
818 assert(!isa<MDNodeSDNode>(N) && "Bad MDNodeSDNode!");
819 assert(!isa<RegisterSDNode>(N) && "Bad RegisterSDNode!");
820 assert(!isa<BlockAddressSDNode>(N) && "Bad BlockAddressSDNode!");
821 assert(!isa<EHLabelSDNode>(N) && "Bad EHLabelSDNode!");
822 assert(!isa<ExternalSymbolSDNode>(N) && "Bad ExternalSymbolSDNode!");
823 assert(!isa<CondCodeSDNode>(N) && "Bad CondCodeSDNode!");
824 assert(!isa<CvtRndSatSDNode>(N) && "Bad CvtRndSatSDNode!");
825 assert(!isa<VTSDNode>(N) && "Bad VTSDNode!");
826 assert(!isa<MachineSDNode>(N) && "Bad MachineSDNode!");
831 /// VerifyMachineNode - Sanity check the given MachineNode. Aborts if it is
833 static void VerifyMachineNode(SDNode *N) {
834 // The MachineNode allocators cannot be used to allocate nodes with fields
835 // that are not present in a MachineNode!
836 // Currently there are no such nodes.
842 /// getEVTAlignment - Compute the default alignment value for the
845 unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
846 Type *Ty = VT == MVT::iPTR ?
847 PointerType::get(Type::getInt8Ty(*getContext()), 0) :
848 VT.getTypeForEVT(*getContext());
850 return TLI.getTargetData()->getABITypeAlignment(Ty);
853 // EntryNode could meaningfully have debug info if we can find it...
854 SelectionDAG::SelectionDAG(const TargetMachine &tm, CodeGenOpt::Level OL)
855 : TM(tm), TLI(*tm.getTargetLowering()), TSI(*tm.getSelectionDAGInfo()),
856 OptLevel(OL), EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Other)),
857 Root(getEntryNode()), Ordering(0) {
858 AllNodes.push_back(&EntryNode);
859 Ordering = new SDNodeOrdering();
860 DbgInfo = new SDDbgInfo();
863 void SelectionDAG::init(MachineFunction &mf) {
865 Context = &mf.getFunction()->getContext();
868 SelectionDAG::~SelectionDAG() {
874 void SelectionDAG::allnodes_clear() {
875 assert(&*AllNodes.begin() == &EntryNode);
876 AllNodes.remove(AllNodes.begin());
877 while (!AllNodes.empty())
878 DeallocateNode(AllNodes.begin());
881 void SelectionDAG::clear() {
883 OperandAllocator.Reset();
886 ExtendedValueTypeNodes.clear();
887 ExternalSymbols.clear();
888 TargetExternalSymbols.clear();
889 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
890 static_cast<CondCodeSDNode*>(0));
891 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
892 static_cast<SDNode*>(0));
894 EntryNode.UseList = 0;
895 AllNodes.push_back(&EntryNode);
896 Root = getEntryNode();
901 SDValue SelectionDAG::getAnyExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
902 return VT.bitsGT(Op.getValueType()) ?
903 getNode(ISD::ANY_EXTEND, DL, VT, Op) :
904 getNode(ISD::TRUNCATE, DL, VT, Op);
907 SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
908 return VT.bitsGT(Op.getValueType()) ?
909 getNode(ISD::SIGN_EXTEND, DL, VT, Op) :
910 getNode(ISD::TRUNCATE, DL, VT, Op);
913 SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
914 return VT.bitsGT(Op.getValueType()) ?
915 getNode(ISD::ZERO_EXTEND, DL, VT, Op) :
916 getNode(ISD::TRUNCATE, DL, VT, Op);
919 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) {
920 assert(!VT.isVector() &&
921 "getZeroExtendInReg should use the vector element type instead of "
923 if (Op.getValueType() == VT) return Op;
924 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
925 APInt Imm = APInt::getLowBitsSet(BitWidth,
927 return getNode(ISD::AND, DL, Op.getValueType(), Op,
928 getConstant(Imm, Op.getValueType()));
931 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
933 SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) {
934 EVT EltVT = VT.getScalarType();
936 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT);
937 return getNode(ISD::XOR, DL, VT, Val, NegOne);
940 SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) {
941 EVT EltVT = VT.getScalarType();
942 assert((EltVT.getSizeInBits() >= 64 ||
943 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
944 "getConstant with a uint64_t value that doesn't fit in the type!");
945 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
948 SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) {
949 return getConstant(*ConstantInt::get(*Context, Val), VT, isT);
952 SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) {
953 assert(VT.isInteger() && "Cannot create FP integer constant!");
955 EVT EltVT = VT.getScalarType();
956 const ConstantInt *Elt = &Val;
958 // In some cases the vector type is legal but the element type is illegal and
959 // needs to be promoted, for example v8i8 on ARM. In this case, promote the
960 // inserted value (the type does not need to match the vector element type).
961 // Any extra bits introduced will be truncated away.
962 if (VT.isVector() && TLI.getTypeAction(*getContext(), EltVT) ==
963 TargetLowering::TypePromoteInteger) {
964 EltVT = TLI.getTypeToTransformTo(*getContext(), EltVT);
965 APInt NewVal = Elt->getValue().zext(EltVT.getSizeInBits());
966 Elt = ConstantInt::get(*getContext(), NewVal);
969 assert(Elt->getBitWidth() == EltVT.getSizeInBits() &&
970 "APInt size does not match type size!");
971 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
973 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
977 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
979 return SDValue(N, 0);
982 N = new (NodeAllocator) ConstantSDNode(isT, Elt, EltVT);
983 CSEMap.InsertNode(N, IP);
984 AllNodes.push_back(N);
987 SDValue Result(N, 0);
989 SmallVector<SDValue, 8> Ops;
990 Ops.assign(VT.getVectorNumElements(), Result);
991 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
996 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
997 return getConstant(Val, TLI.getPointerTy(), isTarget);
1001 SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) {
1002 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget);
1005 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){
1006 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
1008 EVT EltVT = VT.getScalarType();
1010 // Do the map lookup using the actual bit pattern for the floating point
1011 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
1012 // we don't have issues with SNANs.
1013 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
1014 FoldingSetNodeID ID;
1015 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
1019 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
1021 return SDValue(N, 0);
1024 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT);
1025 CSEMap.InsertNode(N, IP);
1026 AllNodes.push_back(N);
1029 SDValue Result(N, 0);
1030 if (VT.isVector()) {
1031 SmallVector<SDValue, 8> Ops;
1032 Ops.assign(VT.getVectorNumElements(), Result);
1033 // FIXME DebugLoc info might be appropriate here
1034 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
1039 SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) {
1040 EVT EltVT = VT.getScalarType();
1041 if (EltVT==MVT::f32)
1042 return getConstantFP(APFloat((float)Val), VT, isTarget);
1043 else if (EltVT==MVT::f64)
1044 return getConstantFP(APFloat(Val), VT, isTarget);
1045 else if (EltVT==MVT::f80 || EltVT==MVT::f128) {
1047 APFloat apf = APFloat(Val);
1048 apf.convert(*EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven,
1050 return getConstantFP(apf, VT, isTarget);
1052 llvm_unreachable("Unsupported type in getConstantFP");
1055 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, DebugLoc DL,
1056 EVT VT, int64_t Offset,
1058 unsigned char TargetFlags) {
1059 assert((TargetFlags == 0 || isTargetGA) &&
1060 "Cannot set target flags on target-independent globals");
1062 // Truncate (with sign-extension) the offset value to the pointer size.
1063 EVT PTy = TLI.getPointerTy();
1064 unsigned BitWidth = PTy.getSizeInBits();
1066 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth));
1068 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
1070 // If GV is an alias then use the aliasee for determining thread-localness.
1071 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
1072 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
1076 if (GVar && GVar->isThreadLocal())
1077 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
1079 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
1081 FoldingSetNodeID ID;
1082 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1084 ID.AddInteger(Offset);
1085 ID.AddInteger(TargetFlags);
1087 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1088 return SDValue(E, 0);
1090 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL, GV, VT,
1091 Offset, TargetFlags);
1092 CSEMap.InsertNode(N, IP);
1093 AllNodes.push_back(N);
1094 return SDValue(N, 0);
1097 SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
1098 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1099 FoldingSetNodeID ID;
1100 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1103 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1104 return SDValue(E, 0);
1106 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget);
1107 CSEMap.InsertNode(N, IP);
1108 AllNodes.push_back(N);
1109 return SDValue(N, 0);
1112 SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
1113 unsigned char TargetFlags) {
1114 assert((TargetFlags == 0 || isTarget) &&
1115 "Cannot set target flags on target-independent jump tables");
1116 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1117 FoldingSetNodeID ID;
1118 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1120 ID.AddInteger(TargetFlags);
1122 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1123 return SDValue(E, 0);
1125 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget,
1127 CSEMap.InsertNode(N, IP);
1128 AllNodes.push_back(N);
1129 return SDValue(N, 0);
1132 SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT,
1133 unsigned Alignment, int Offset,
1135 unsigned char TargetFlags) {
1136 assert((TargetFlags == 0 || isTarget) &&
1137 "Cannot set target flags on target-independent globals");
1139 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1140 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1141 FoldingSetNodeID ID;
1142 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1143 ID.AddInteger(Alignment);
1144 ID.AddInteger(Offset);
1146 ID.AddInteger(TargetFlags);
1148 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1149 return SDValue(E, 0);
1151 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1152 Alignment, TargetFlags);
1153 CSEMap.InsertNode(N, IP);
1154 AllNodes.push_back(N);
1155 return SDValue(N, 0);
1159 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
1160 unsigned Alignment, int Offset,
1162 unsigned char TargetFlags) {
1163 assert((TargetFlags == 0 || isTarget) &&
1164 "Cannot set target flags on target-independent globals");
1166 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1167 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1168 FoldingSetNodeID ID;
1169 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1170 ID.AddInteger(Alignment);
1171 ID.AddInteger(Offset);
1172 C->addSelectionDAGCSEId(ID);
1173 ID.AddInteger(TargetFlags);
1175 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1176 return SDValue(E, 0);
1178 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1179 Alignment, TargetFlags);
1180 CSEMap.InsertNode(N, IP);
1181 AllNodes.push_back(N);
1182 return SDValue(N, 0);
1185 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1186 FoldingSetNodeID ID;
1187 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1190 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1191 return SDValue(E, 0);
1193 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB);
1194 CSEMap.InsertNode(N, IP);
1195 AllNodes.push_back(N);
1196 return SDValue(N, 0);
1199 SDValue SelectionDAG::getValueType(EVT VT) {
1200 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
1201 ValueTypeNodes.size())
1202 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
1204 SDNode *&N = VT.isExtended() ?
1205 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
1207 if (N) return SDValue(N, 0);
1208 N = new (NodeAllocator) VTSDNode(VT);
1209 AllNodes.push_back(N);
1210 return SDValue(N, 0);
1213 SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
1214 SDNode *&N = ExternalSymbols[Sym];
1215 if (N) return SDValue(N, 0);
1216 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT);
1217 AllNodes.push_back(N);
1218 return SDValue(N, 0);
1221 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
1222 unsigned char TargetFlags) {
1224 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1226 if (N) return SDValue(N, 0);
1227 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1228 AllNodes.push_back(N);
1229 return SDValue(N, 0);
1232 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1233 if ((unsigned)Cond >= CondCodeNodes.size())
1234 CondCodeNodes.resize(Cond+1);
1236 if (CondCodeNodes[Cond] == 0) {
1237 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond);
1238 CondCodeNodes[Cond] = N;
1239 AllNodes.push_back(N);
1242 return SDValue(CondCodeNodes[Cond], 0);
1245 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1246 // the shuffle mask M that point at N1 to point at N2, and indices that point
1247 // N2 to point at N1.
1248 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1250 int NElts = M.size();
1251 for (int i = 0; i != NElts; ++i) {
1259 SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1,
1260 SDValue N2, const int *Mask) {
1261 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE");
1262 assert(VT.isVector() && N1.getValueType().isVector() &&
1263 "Vector Shuffle VTs must be a vectors");
1264 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType()
1265 && "Vector Shuffle VTs must have same element type");
1267 // Canonicalize shuffle undef, undef -> undef
1268 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1269 return getUNDEF(VT);
1271 // Validate that all indices in Mask are within the range of the elements
1272 // input to the shuffle.
1273 unsigned NElts = VT.getVectorNumElements();
1274 SmallVector<int, 8> MaskVec;
1275 for (unsigned i = 0; i != NElts; ++i) {
1276 assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1277 MaskVec.push_back(Mask[i]);
1280 // Canonicalize shuffle v, v -> v, undef
1283 for (unsigned i = 0; i != NElts; ++i)
1284 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1287 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1288 if (N1.getOpcode() == ISD::UNDEF)
1289 commuteShuffle(N1, N2, MaskVec);
1291 // Canonicalize all index into lhs, -> shuffle lhs, undef
1292 // Canonicalize all index into rhs, -> shuffle rhs, undef
1293 bool AllLHS = true, AllRHS = true;
1294 bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1295 for (unsigned i = 0; i != NElts; ++i) {
1296 if (MaskVec[i] >= (int)NElts) {
1301 } else if (MaskVec[i] >= 0) {
1305 if (AllLHS && AllRHS)
1306 return getUNDEF(VT);
1307 if (AllLHS && !N2Undef)
1311 commuteShuffle(N1, N2, MaskVec);
1314 // If Identity shuffle, or all shuffle in to undef, return that node.
1315 bool AllUndef = true;
1316 bool Identity = true;
1317 for (unsigned i = 0; i != NElts; ++i) {
1318 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1319 if (MaskVec[i] >= 0) AllUndef = false;
1321 if (Identity && NElts == N1.getValueType().getVectorNumElements())
1324 return getUNDEF(VT);
1326 FoldingSetNodeID ID;
1327 SDValue Ops[2] = { N1, N2 };
1328 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2);
1329 for (unsigned i = 0; i != NElts; ++i)
1330 ID.AddInteger(MaskVec[i]);
1333 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1334 return SDValue(E, 0);
1336 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1337 // SDNode doesn't have access to it. This memory will be "leaked" when
1338 // the node is deallocated, but recovered when the NodeAllocator is released.
1339 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1340 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1342 ShuffleVectorSDNode *N =
1343 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc);
1344 CSEMap.InsertNode(N, IP);
1345 AllNodes.push_back(N);
1346 return SDValue(N, 0);
1349 SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl,
1350 SDValue Val, SDValue DTy,
1351 SDValue STy, SDValue Rnd, SDValue Sat,
1352 ISD::CvtCode Code) {
1353 // If the src and dest types are the same and the conversion is between
1354 // integer types of the same sign or two floats, no conversion is necessary.
1356 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1359 FoldingSetNodeID ID;
1360 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1361 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5);
1363 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1364 return SDValue(E, 0);
1366 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5,
1368 CSEMap.InsertNode(N, IP);
1369 AllNodes.push_back(N);
1370 return SDValue(N, 0);
1373 SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
1374 FoldingSetNodeID ID;
1375 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1376 ID.AddInteger(RegNo);
1378 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1379 return SDValue(E, 0);
1381 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT);
1382 CSEMap.InsertNode(N, IP);
1383 AllNodes.push_back(N);
1384 return SDValue(N, 0);
1387 SDValue SelectionDAG::getRegisterMask(const uint32_t *RegMask) {
1388 FoldingSetNodeID ID;
1389 AddNodeIDNode(ID, ISD::RegisterMask, getVTList(MVT::Untyped), 0, 0);
1390 ID.AddPointer(RegMask);
1392 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1393 return SDValue(E, 0);
1395 SDNode *N = new (NodeAllocator) RegisterMaskSDNode(RegMask);
1396 CSEMap.InsertNode(N, IP);
1397 AllNodes.push_back(N);
1398 return SDValue(N, 0);
1401 SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) {
1402 FoldingSetNodeID ID;
1403 SDValue Ops[] = { Root };
1404 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1);
1405 ID.AddPointer(Label);
1407 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1408 return SDValue(E, 0);
1410 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label);
1411 CSEMap.InsertNode(N, IP);
1412 AllNodes.push_back(N);
1413 return SDValue(N, 0);
1417 SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT,
1419 unsigned char TargetFlags) {
1420 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress;
1422 FoldingSetNodeID ID;
1423 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1425 ID.AddInteger(TargetFlags);
1427 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1428 return SDValue(E, 0);
1430 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, TargetFlags);
1431 CSEMap.InsertNode(N, IP);
1432 AllNodes.push_back(N);
1433 return SDValue(N, 0);
1436 SDValue SelectionDAG::getSrcValue(const Value *V) {
1437 assert((!V || V->getType()->isPointerTy()) &&
1438 "SrcValue is not a pointer?");
1440 FoldingSetNodeID ID;
1441 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1445 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1446 return SDValue(E, 0);
1448 SDNode *N = new (NodeAllocator) SrcValueSDNode(V);
1449 CSEMap.InsertNode(N, IP);
1450 AllNodes.push_back(N);
1451 return SDValue(N, 0);
1454 /// getMDNode - Return an MDNodeSDNode which holds an MDNode.
1455 SDValue SelectionDAG::getMDNode(const MDNode *MD) {
1456 FoldingSetNodeID ID;
1457 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0);
1461 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1462 return SDValue(E, 0);
1464 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD);
1465 CSEMap.InsertNode(N, IP);
1466 AllNodes.push_back(N);
1467 return SDValue(N, 0);
1471 /// getShiftAmountOperand - Return the specified value casted to
1472 /// the target's desired shift amount type.
1473 SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) {
1474 EVT OpTy = Op.getValueType();
1475 MVT ShTy = TLI.getShiftAmountTy(LHSTy);
1476 if (OpTy == ShTy || OpTy.isVector()) return Op;
1478 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1479 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op);
1482 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1483 /// specified value type.
1484 SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
1485 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1486 unsigned ByteSize = VT.getStoreSize();
1487 Type *Ty = VT.getTypeForEVT(*getContext());
1488 unsigned StackAlign =
1489 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign);
1491 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false);
1492 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1495 /// CreateStackTemporary - Create a stack temporary suitable for holding
1496 /// either of the specified value types.
1497 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
1498 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1499 VT2.getStoreSizeInBits())/8;
1500 Type *Ty1 = VT1.getTypeForEVT(*getContext());
1501 Type *Ty2 = VT2.getTypeForEVT(*getContext());
1502 const TargetData *TD = TLI.getTargetData();
1503 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1504 TD->getPrefTypeAlignment(Ty2));
1506 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1507 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false);
1508 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1511 SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
1512 SDValue N2, ISD::CondCode Cond, DebugLoc dl) {
1513 // These setcc operations always fold.
1517 case ISD::SETFALSE2: return getConstant(0, VT);
1519 case ISD::SETTRUE2: return getConstant(1, VT);
1531 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1535 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1536 const APInt &C2 = N2C->getAPIntValue();
1537 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1538 const APInt &C1 = N1C->getAPIntValue();
1541 default: llvm_unreachable("Unknown integer setcc!");
1542 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1543 case ISD::SETNE: return getConstant(C1 != C2, VT);
1544 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1545 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1546 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1547 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1548 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1549 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1550 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1551 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1555 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1556 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1557 // No compile time operations on this type yet.
1558 if (N1C->getValueType(0) == MVT::ppcf128)
1561 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1564 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1565 return getUNDEF(VT);
1567 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1568 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1569 return getUNDEF(VT);
1571 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1572 R==APFloat::cmpLessThan, VT);
1573 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1574 return getUNDEF(VT);
1576 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1577 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1578 return getUNDEF(VT);
1580 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1581 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1582 return getUNDEF(VT);
1584 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1585 R==APFloat::cmpEqual, VT);
1586 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1587 return getUNDEF(VT);
1589 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1590 R==APFloat::cmpEqual, VT);
1591 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1592 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1593 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1594 R==APFloat::cmpEqual, VT);
1595 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1596 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1597 R==APFloat::cmpLessThan, VT);
1598 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1599 R==APFloat::cmpUnordered, VT);
1600 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1601 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1604 // Ensure that the constant occurs on the RHS.
1605 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1609 // Could not fold it.
1613 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1614 /// use this predicate to simplify operations downstream.
1615 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1616 // This predicate is not safe for vector operations.
1617 if (Op.getValueType().isVector())
1620 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1621 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1624 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1625 /// this predicate to simplify operations downstream. Mask is known to be zero
1626 /// for bits that V cannot have.
1627 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1628 unsigned Depth) const {
1629 APInt KnownZero, KnownOne;
1630 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
1631 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1632 return (KnownZero & Mask) == Mask;
1635 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1636 /// known to be either zero or one and return them in the KnownZero/KnownOne
1637 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1639 void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask,
1640 APInt &KnownZero, APInt &KnownOne,
1641 unsigned Depth) const {
1642 unsigned BitWidth = Mask.getBitWidth();
1643 assert(BitWidth == Op.getValueType().getScalarType().getSizeInBits() &&
1644 "Mask size mismatches value type size!");
1646 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1647 if (Depth == 6 || Mask == 0)
1648 return; // Limit search depth.
1650 APInt KnownZero2, KnownOne2;
1652 switch (Op.getOpcode()) {
1654 // We know all of the bits for a constant!
1655 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask;
1656 KnownZero = ~KnownOne & Mask;
1659 // If either the LHS or the RHS are Zero, the result is zero.
1660 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1661 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero,
1662 KnownZero2, KnownOne2, Depth+1);
1663 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1664 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1666 // Output known-1 bits are only known if set in both the LHS & RHS.
1667 KnownOne &= KnownOne2;
1668 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1669 KnownZero |= KnownZero2;
1672 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1673 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne,
1674 KnownZero2, KnownOne2, Depth+1);
1675 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1676 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1678 // Output known-0 bits are only known if clear in both the LHS & RHS.
1679 KnownZero &= KnownZero2;
1680 // Output known-1 are known to be set if set in either the LHS | RHS.
1681 KnownOne |= KnownOne2;
1684 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1685 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
1686 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1687 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1689 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1690 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1691 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1692 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1693 KnownZero = KnownZeroOut;
1697 APInt Mask2 = APInt::getAllOnesValue(BitWidth);
1698 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1);
1699 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1700 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1701 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1703 // If low bits are zero in either operand, output low known-0 bits.
1704 // Also compute a conserative estimate for high known-0 bits.
1705 // More trickiness is possible, but this is sufficient for the
1706 // interesting case of alignment computation.
1707 KnownOne.clearAllBits();
1708 unsigned TrailZ = KnownZero.countTrailingOnes() +
1709 KnownZero2.countTrailingOnes();
1710 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1711 KnownZero2.countLeadingOnes(),
1712 BitWidth) - BitWidth;
1714 TrailZ = std::min(TrailZ, BitWidth);
1715 LeadZ = std::min(LeadZ, BitWidth);
1716 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1717 APInt::getHighBitsSet(BitWidth, LeadZ);
1722 // For the purposes of computing leading zeros we can conservatively
1723 // treat a udiv as a logical right shift by the power of 2 known to
1724 // be less than the denominator.
1725 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1726 ComputeMaskedBits(Op.getOperand(0),
1727 AllOnes, KnownZero2, KnownOne2, Depth+1);
1728 unsigned LeadZ = KnownZero2.countLeadingOnes();
1730 KnownOne2.clearAllBits();
1731 KnownZero2.clearAllBits();
1732 ComputeMaskedBits(Op.getOperand(1),
1733 AllOnes, KnownZero2, KnownOne2, Depth+1);
1734 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1735 if (RHSUnknownLeadingOnes != BitWidth)
1736 LeadZ = std::min(BitWidth,
1737 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1739 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask;
1743 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1);
1744 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1);
1745 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1746 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1748 // Only known if known in both the LHS and RHS.
1749 KnownOne &= KnownOne2;
1750 KnownZero &= KnownZero2;
1752 case ISD::SELECT_CC:
1753 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1);
1754 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1);
1755 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1756 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1758 // Only known if known in both the LHS and RHS.
1759 KnownOne &= KnownOne2;
1760 KnownZero &= KnownZero2;
1768 if (Op.getResNo() != 1)
1770 // The boolean result conforms to getBooleanContents. Fall through.
1772 // If we know the result of a setcc has the top bits zero, use this info.
1773 if (TLI.getBooleanContents(Op.getValueType().isVector()) ==
1774 TargetLowering::ZeroOrOneBooleanContent && BitWidth > 1)
1775 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1778 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1779 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1780 unsigned ShAmt = SA->getZExtValue();
1782 // If the shift count is an invalid immediate, don't do anything.
1783 if (ShAmt >= BitWidth)
1786 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt),
1787 KnownZero, KnownOne, Depth+1);
1788 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1789 KnownZero <<= ShAmt;
1791 // low bits known zero.
1792 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1796 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1797 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1798 unsigned ShAmt = SA->getZExtValue();
1800 // If the shift count is an invalid immediate, don't do anything.
1801 if (ShAmt >= BitWidth)
1804 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt),
1805 KnownZero, KnownOne, Depth+1);
1806 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1807 KnownZero = KnownZero.lshr(ShAmt);
1808 KnownOne = KnownOne.lshr(ShAmt);
1810 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1811 KnownZero |= HighBits; // High bits known zero.
1815 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1816 unsigned ShAmt = SA->getZExtValue();
1818 // If the shift count is an invalid immediate, don't do anything.
1819 if (ShAmt >= BitWidth)
1822 APInt InDemandedMask = (Mask << ShAmt);
1823 // If any of the demanded bits are produced by the sign extension, we also
1824 // demand the input sign bit.
1825 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1826 if (HighBits.getBoolValue())
1827 InDemandedMask |= APInt::getSignBit(BitWidth);
1829 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne,
1831 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1832 KnownZero = KnownZero.lshr(ShAmt);
1833 KnownOne = KnownOne.lshr(ShAmt);
1835 // Handle the sign bits.
1836 APInt SignBit = APInt::getSignBit(BitWidth);
1837 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1839 if (KnownZero.intersects(SignBit)) {
1840 KnownZero |= HighBits; // New bits are known zero.
1841 } else if (KnownOne.intersects(SignBit)) {
1842 KnownOne |= HighBits; // New bits are known one.
1846 case ISD::SIGN_EXTEND_INREG: {
1847 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1848 unsigned EBits = EVT.getScalarType().getSizeInBits();
1850 // Sign extension. Compute the demanded bits in the result that are not
1851 // present in the input.
1852 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask;
1854 APInt InSignBit = APInt::getSignBit(EBits);
1855 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits);
1857 // If the sign extended bits are demanded, we know that the sign
1859 InSignBit = InSignBit.zext(BitWidth);
1860 if (NewBits.getBoolValue())
1861 InputDemandedBits |= InSignBit;
1863 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits,
1864 KnownZero, KnownOne, Depth+1);
1865 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1867 // If the sign bit of the input is known set or clear, then we know the
1868 // top bits of the result.
1869 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1870 KnownZero |= NewBits;
1871 KnownOne &= ~NewBits;
1872 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1873 KnownOne |= NewBits;
1874 KnownZero &= ~NewBits;
1875 } else { // Input sign bit unknown
1876 KnownZero &= ~NewBits;
1877 KnownOne &= ~NewBits;
1882 case ISD::CTTZ_ZERO_UNDEF:
1884 case ISD::CTLZ_ZERO_UNDEF:
1886 unsigned LowBits = Log2_32(BitWidth)+1;
1887 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1888 KnownOne.clearAllBits();
1892 LoadSDNode *LD = cast<LoadSDNode>(Op);
1893 if (ISD::isZEXTLoad(Op.getNode())) {
1894 EVT VT = LD->getMemoryVT();
1895 unsigned MemBits = VT.getScalarType().getSizeInBits();
1896 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask;
1897 } else if (const MDNode *Ranges = LD->getRanges()) {
1898 computeMaskedBitsLoad(*Ranges, Mask, KnownZero);
1902 case ISD::ZERO_EXTEND: {
1903 EVT InVT = Op.getOperand(0).getValueType();
1904 unsigned InBits = InVT.getScalarType().getSizeInBits();
1905 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1906 APInt InMask = Mask.trunc(InBits);
1907 KnownZero = KnownZero.trunc(InBits);
1908 KnownOne = KnownOne.trunc(InBits);
1909 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1910 KnownZero = KnownZero.zext(BitWidth);
1911 KnownOne = KnownOne.zext(BitWidth);
1912 KnownZero |= NewBits;
1915 case ISD::SIGN_EXTEND: {
1916 EVT InVT = Op.getOperand(0).getValueType();
1917 unsigned InBits = InVT.getScalarType().getSizeInBits();
1918 APInt InSignBit = APInt::getSignBit(InBits);
1919 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1920 APInt InMask = Mask.trunc(InBits);
1922 // If any of the sign extended bits are demanded, we know that the sign
1923 // bit is demanded. Temporarily set this bit in the mask for our callee.
1924 if (NewBits.getBoolValue())
1925 InMask |= InSignBit;
1927 KnownZero = KnownZero.trunc(InBits);
1928 KnownOne = KnownOne.trunc(InBits);
1929 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1931 // Note if the sign bit is known to be zero or one.
1932 bool SignBitKnownZero = KnownZero.isNegative();
1933 bool SignBitKnownOne = KnownOne.isNegative();
1934 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1935 "Sign bit can't be known to be both zero and one!");
1937 // If the sign bit wasn't actually demanded by our caller, we don't
1938 // want it set in the KnownZero and KnownOne result values. Reset the
1939 // mask and reapply it to the result values.
1940 InMask = Mask.trunc(InBits);
1941 KnownZero &= InMask;
1944 KnownZero = KnownZero.zext(BitWidth);
1945 KnownOne = KnownOne.zext(BitWidth);
1947 // If the sign bit is known zero or one, the top bits match.
1948 if (SignBitKnownZero)
1949 KnownZero |= NewBits;
1950 else if (SignBitKnownOne)
1951 KnownOne |= NewBits;
1954 case ISD::ANY_EXTEND: {
1955 EVT InVT = Op.getOperand(0).getValueType();
1956 unsigned InBits = InVT.getScalarType().getSizeInBits();
1957 APInt InMask = Mask.trunc(InBits);
1958 KnownZero = KnownZero.trunc(InBits);
1959 KnownOne = KnownOne.trunc(InBits);
1960 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1961 KnownZero = KnownZero.zext(BitWidth);
1962 KnownOne = KnownOne.zext(BitWidth);
1965 case ISD::TRUNCATE: {
1966 EVT InVT = Op.getOperand(0).getValueType();
1967 unsigned InBits = InVT.getScalarType().getSizeInBits();
1968 APInt InMask = Mask.zext(InBits);
1969 KnownZero = KnownZero.zext(InBits);
1970 KnownOne = KnownOne.zext(InBits);
1971 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1972 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1973 KnownZero = KnownZero.trunc(BitWidth);
1974 KnownOne = KnownOne.trunc(BitWidth);
1977 case ISD::AssertZext: {
1978 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1979 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1980 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
1982 KnownZero |= (~InMask) & Mask;
1986 // All bits are zero except the low bit.
1987 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1991 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
1992 // We know that the top bits of C-X are clear if X contains less bits
1993 // than C (i.e. no wrap-around can happen). For example, 20-X is
1994 // positive if we can prove that X is >= 0 and < 16.
1995 if (CLHS->getAPIntValue().isNonNegative()) {
1996 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
1997 // NLZ can't be BitWidth with no sign bit
1998 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
1999 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2,
2002 // If all of the MaskV bits are known to be zero, then we know the
2003 // output top bits are zero, because we now know that the output is
2005 if ((KnownZero2 & MaskV) == MaskV) {
2006 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
2007 // Top bits known zero.
2008 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask;
2016 // Output known-0 bits are known if clear or set in both the low clear bits
2017 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
2018 // low 3 bits clear.
2019 APInt Mask2 = APInt::getLowBitsSet(BitWidth,
2020 BitWidth - Mask.countLeadingZeros());
2021 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
2022 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
2023 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
2025 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1);
2026 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
2027 KnownZeroOut = std::min(KnownZeroOut,
2028 KnownZero2.countTrailingOnes());
2030 if (Op.getOpcode() == ISD::ADD) {
2031 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
2035 // With ADDE, a carry bit may be added in, so we can only use this
2036 // information if we know (at least) that the low two bits are clear. We
2037 // then return to the caller that the low bit is unknown but that other bits
2039 if (KnownZeroOut >= 2) // ADDE
2040 KnownZero |= APInt::getBitsSet(BitWidth, 1, KnownZeroOut);
2044 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2045 const APInt &RA = Rem->getAPIntValue().abs();
2046 if (RA.isPowerOf2()) {
2047 APInt LowBits = RA - 1;
2048 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
2049 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1);
2051 // The low bits of the first operand are unchanged by the srem.
2052 KnownZero = KnownZero2 & LowBits;
2053 KnownOne = KnownOne2 & LowBits;
2055 // If the first operand is non-negative or has all low bits zero, then
2056 // the upper bits are all zero.
2057 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
2058 KnownZero |= ~LowBits;
2060 // If the first operand is negative and not all low bits are zero, then
2061 // the upper bits are all one.
2062 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0))
2063 KnownOne |= ~LowBits;
2068 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2073 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2074 const APInt &RA = Rem->getAPIntValue();
2075 if (RA.isPowerOf2()) {
2076 APInt LowBits = (RA - 1);
2077 APInt Mask2 = LowBits & Mask;
2078 KnownZero |= ~LowBits & Mask;
2079 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1);
2080 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2085 // Since the result is less than or equal to either operand, any leading
2086 // zero bits in either operand must also exist in the result.
2087 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
2088 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne,
2090 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2,
2093 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
2094 KnownZero2.countLeadingOnes());
2095 KnownOne.clearAllBits();
2096 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
2099 case ISD::FrameIndex:
2100 case ISD::TargetFrameIndex:
2101 if (unsigned Align = InferPtrAlignment(Op)) {
2102 // The low bits are known zero if the pointer is aligned.
2103 KnownZero = APInt::getLowBitsSet(BitWidth, Log2_32(Align));
2109 if (Op.getOpcode() < ISD::BUILTIN_OP_END)
2112 case ISD::INTRINSIC_WO_CHAIN:
2113 case ISD::INTRINSIC_W_CHAIN:
2114 case ISD::INTRINSIC_VOID:
2115 // Allow the target to implement this method for its nodes.
2116 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this,
2122 /// ComputeNumSignBits - Return the number of times the sign bit of the
2123 /// register is replicated into the other bits. We know that at least 1 bit
2124 /// is always equal to the sign bit (itself), but other cases can give us
2125 /// information. For example, immediately after an "SRA X, 2", we know that
2126 /// the top 3 bits are all equal to each other, so we return 3.
2127 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
2128 EVT VT = Op.getValueType();
2129 assert(VT.isInteger() && "Invalid VT!");
2130 unsigned VTBits = VT.getScalarType().getSizeInBits();
2132 unsigned FirstAnswer = 1;
2135 return 1; // Limit search depth.
2137 switch (Op.getOpcode()) {
2139 case ISD::AssertSext:
2140 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2141 return VTBits-Tmp+1;
2142 case ISD::AssertZext:
2143 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2146 case ISD::Constant: {
2147 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2148 return Val.getNumSignBits();
2151 case ISD::SIGN_EXTEND:
2152 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
2153 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2155 case ISD::SIGN_EXTEND_INREG:
2156 // Max of the input and what this extends.
2158 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits();
2161 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2162 return std::max(Tmp, Tmp2);
2165 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2166 // SRA X, C -> adds C sign bits.
2167 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2168 Tmp += C->getZExtValue();
2169 if (Tmp > VTBits) Tmp = VTBits;
2173 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2174 // shl destroys sign bits.
2175 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2176 if (C->getZExtValue() >= VTBits || // Bad shift.
2177 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
2178 return Tmp - C->getZExtValue();
2183 case ISD::XOR: // NOT is handled here.
2184 // Logical binary ops preserve the number of sign bits at the worst.
2185 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2187 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2188 FirstAnswer = std::min(Tmp, Tmp2);
2189 // We computed what we know about the sign bits as our first
2190 // answer. Now proceed to the generic code that uses
2191 // ComputeMaskedBits, and pick whichever answer is better.
2196 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2197 if (Tmp == 1) return 1; // Early out.
2198 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2199 return std::min(Tmp, Tmp2);
2207 if (Op.getResNo() != 1)
2209 // The boolean result conforms to getBooleanContents. Fall through.
2211 // If setcc returns 0/-1, all bits are sign bits.
2212 if (TLI.getBooleanContents(Op.getValueType().isVector()) ==
2213 TargetLowering::ZeroOrNegativeOneBooleanContent)
2218 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2219 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2221 // Handle rotate right by N like a rotate left by 32-N.
2222 if (Op.getOpcode() == ISD::ROTR)
2223 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2225 // If we aren't rotating out all of the known-in sign bits, return the
2226 // number that are left. This handles rotl(sext(x), 1) for example.
2227 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2228 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2232 // Add can have at most one carry bit. Thus we know that the output
2233 // is, at worst, one more bit than the inputs.
2234 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2235 if (Tmp == 1) return 1; // Early out.
2237 // Special case decrementing a value (ADD X, -1):
2238 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2239 if (CRHS->isAllOnesValue()) {
2240 APInt KnownZero, KnownOne;
2241 APInt Mask = APInt::getAllOnesValue(VTBits);
2242 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
2244 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2246 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2249 // If we are subtracting one from a positive number, there is no carry
2250 // out of the result.
2251 if (KnownZero.isNegative())
2255 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2256 if (Tmp2 == 1) return 1;
2257 return std::min(Tmp, Tmp2)-1;
2260 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2261 if (Tmp2 == 1) return 1;
2264 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2265 if (CLHS->isNullValue()) {
2266 APInt KnownZero, KnownOne;
2267 APInt Mask = APInt::getAllOnesValue(VTBits);
2268 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
2269 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2271 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2274 // If the input is known to be positive (the sign bit is known clear),
2275 // the output of the NEG has the same number of sign bits as the input.
2276 if (KnownZero.isNegative())
2279 // Otherwise, we treat this like a SUB.
2282 // Sub can have at most one carry bit. Thus we know that the output
2283 // is, at worst, one more bit than the inputs.
2284 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2285 if (Tmp == 1) return 1; // Early out.
2286 return std::min(Tmp, Tmp2)-1;
2288 // FIXME: it's tricky to do anything useful for this, but it is an important
2289 // case for targets like X86.
2293 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2294 if (Op.getOpcode() == ISD::LOAD) {
2295 LoadSDNode *LD = cast<LoadSDNode>(Op);
2296 unsigned ExtType = LD->getExtensionType();
2299 case ISD::SEXTLOAD: // '17' bits known
2300 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2301 return VTBits-Tmp+1;
2302 case ISD::ZEXTLOAD: // '16' bits known
2303 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2308 // Allow the target to implement this method for its nodes.
2309 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2310 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2311 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2312 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2313 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2314 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2317 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2318 // use this information.
2319 APInt KnownZero, KnownOne;
2320 APInt Mask = APInt::getAllOnesValue(VTBits);
2321 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
2323 if (KnownZero.isNegative()) { // sign bit is 0
2325 } else if (KnownOne.isNegative()) { // sign bit is 1;
2332 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2333 // the number of identical bits in the top of the input value.
2335 Mask <<= Mask.getBitWidth()-VTBits;
2336 // Return # leading zeros. We use 'min' here in case Val was zero before
2337 // shifting. We don't want to return '64' as for an i32 "0".
2338 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2341 /// isBaseWithConstantOffset - Return true if the specified operand is an
2342 /// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an
2343 /// ISD::OR with a ConstantSDNode that is guaranteed to have the same
2344 /// semantics as an ADD. This handles the equivalence:
2345 /// X|Cst == X+Cst iff X&Cst = 0.
2346 bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const {
2347 if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) ||
2348 !isa<ConstantSDNode>(Op.getOperand(1)))
2351 if (Op.getOpcode() == ISD::OR &&
2352 !MaskedValueIsZero(Op.getOperand(0),
2353 cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue()))
2360 bool SelectionDAG::isKnownNeverNaN(SDValue Op) const {
2361 // If we're told that NaNs won't happen, assume they won't.
2362 if (getTarget().Options.NoNaNsFPMath)
2365 // If the value is a constant, we can obviously see if it is a NaN or not.
2366 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2367 return !C->getValueAPF().isNaN();
2369 // TODO: Recognize more cases here.
2374 bool SelectionDAG::isKnownNeverZero(SDValue Op) const {
2375 // If the value is a constant, we can obviously see if it is a zero or not.
2376 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2377 return !C->isZero();
2379 // TODO: Recognize more cases here.
2380 switch (Op.getOpcode()) {
2383 if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2384 return !C->isNullValue();
2391 bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const {
2392 // Check the obvious case.
2393 if (A == B) return true;
2395 // For for negative and positive zero.
2396 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A))
2397 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B))
2398 if (CA->isZero() && CB->isZero()) return true;
2400 // Otherwise they may not be equal.
2404 /// getNode - Gets or creates the specified node.
2406 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) {
2407 FoldingSetNodeID ID;
2408 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2410 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2411 return SDValue(E, 0);
2413 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT));
2414 CSEMap.InsertNode(N, IP);
2416 AllNodes.push_back(N);
2420 return SDValue(N, 0);
2423 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
2424 EVT VT, SDValue Operand) {
2425 // Constant fold unary operations with an integer constant operand.
2426 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2427 const APInt &Val = C->getAPIntValue();
2430 case ISD::SIGN_EXTEND:
2431 return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), VT);
2432 case ISD::ANY_EXTEND:
2433 case ISD::ZERO_EXTEND:
2435 return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), VT);
2436 case ISD::UINT_TO_FP:
2437 case ISD::SINT_TO_FP: {
2438 // No compile time operations on ppcf128.
2439 if (VT == MVT::ppcf128) break;
2440 APFloat apf(APInt::getNullValue(VT.getSizeInBits()));
2441 (void)apf.convertFromAPInt(Val,
2442 Opcode==ISD::SINT_TO_FP,
2443 APFloat::rmNearestTiesToEven);
2444 return getConstantFP(apf, VT);
2447 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2448 return getConstantFP(Val.bitsToFloat(), VT);
2449 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2450 return getConstantFP(Val.bitsToDouble(), VT);
2453 return getConstant(Val.byteSwap(), VT);
2455 return getConstant(Val.countPopulation(), VT);
2457 case ISD::CTLZ_ZERO_UNDEF:
2458 return getConstant(Val.countLeadingZeros(), VT);
2460 case ISD::CTTZ_ZERO_UNDEF:
2461 return getConstant(Val.countTrailingZeros(), VT);
2465 // Constant fold unary operations with a floating point constant operand.
2466 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2467 APFloat V = C->getValueAPF(); // make copy
2468 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) {
2472 return getConstantFP(V, VT);
2475 return getConstantFP(V, VT);
2477 case ISD::FP_EXTEND: {
2479 // This can return overflow, underflow, or inexact; we don't care.
2480 // FIXME need to be more flexible about rounding mode.
2481 (void)V.convert(*EVTToAPFloatSemantics(VT),
2482 APFloat::rmNearestTiesToEven, &ignored);
2483 return getConstantFP(V, VT);
2485 case ISD::FP_TO_SINT:
2486 case ISD::FP_TO_UINT: {
2489 assert(integerPartWidth >= 64);
2490 // FIXME need to be more flexible about rounding mode.
2491 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2492 Opcode==ISD::FP_TO_SINT,
2493 APFloat::rmTowardZero, &ignored);
2494 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2496 APInt api(VT.getSizeInBits(), x);
2497 return getConstant(api, VT);
2500 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2501 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2502 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2503 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2509 unsigned OpOpcode = Operand.getNode()->getOpcode();
2511 case ISD::TokenFactor:
2512 case ISD::MERGE_VALUES:
2513 case ISD::CONCAT_VECTORS:
2514 return Operand; // Factor, merge or concat of one node? No need.
2515 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
2516 case ISD::FP_EXTEND:
2517 assert(VT.isFloatingPoint() &&
2518 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2519 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2520 assert((!VT.isVector() ||
2521 VT.getVectorNumElements() ==
2522 Operand.getValueType().getVectorNumElements()) &&
2523 "Vector element count mismatch!");
2524 if (Operand.getOpcode() == ISD::UNDEF)
2525 return getUNDEF(VT);
2527 case ISD::SIGN_EXTEND:
2528 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2529 "Invalid SIGN_EXTEND!");
2530 if (Operand.getValueType() == VT) return Operand; // noop extension
2531 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2532 "Invalid sext node, dst < src!");
2533 assert((!VT.isVector() ||
2534 VT.getVectorNumElements() ==
2535 Operand.getValueType().getVectorNumElements()) &&
2536 "Vector element count mismatch!");
2537 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2538 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2539 else if (OpOpcode == ISD::UNDEF)
2540 // sext(undef) = 0, because the top bits will all be the same.
2541 return getConstant(0, VT);
2543 case ISD::ZERO_EXTEND:
2544 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2545 "Invalid ZERO_EXTEND!");
2546 if (Operand.getValueType() == VT) return Operand; // noop extension
2547 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2548 "Invalid zext node, dst < src!");
2549 assert((!VT.isVector() ||
2550 VT.getVectorNumElements() ==
2551 Operand.getValueType().getVectorNumElements()) &&
2552 "Vector element count mismatch!");
2553 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2554 return getNode(ISD::ZERO_EXTEND, DL, VT,
2555 Operand.getNode()->getOperand(0));
2556 else if (OpOpcode == ISD::UNDEF)
2557 // zext(undef) = 0, because the top bits will be zero.
2558 return getConstant(0, VT);
2560 case ISD::ANY_EXTEND:
2561 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2562 "Invalid ANY_EXTEND!");
2563 if (Operand.getValueType() == VT) return Operand; // noop extension
2564 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2565 "Invalid anyext node, dst < src!");
2566 assert((!VT.isVector() ||
2567 VT.getVectorNumElements() ==
2568 Operand.getValueType().getVectorNumElements()) &&
2569 "Vector element count mismatch!");
2571 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2572 OpOpcode == ISD::ANY_EXTEND)
2573 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2574 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2575 else if (OpOpcode == ISD::UNDEF)
2576 return getUNDEF(VT);
2578 // (ext (trunx x)) -> x
2579 if (OpOpcode == ISD::TRUNCATE) {
2580 SDValue OpOp = Operand.getNode()->getOperand(0);
2581 if (OpOp.getValueType() == VT)
2586 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2587 "Invalid TRUNCATE!");
2588 if (Operand.getValueType() == VT) return Operand; // noop truncate
2589 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) &&
2590 "Invalid truncate node, src < dst!");
2591 assert((!VT.isVector() ||
2592 VT.getVectorNumElements() ==
2593 Operand.getValueType().getVectorNumElements()) &&
2594 "Vector element count mismatch!");
2595 if (OpOpcode == ISD::TRUNCATE)
2596 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2597 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2598 OpOpcode == ISD::ANY_EXTEND) {
2599 // If the source is smaller than the dest, we still need an extend.
2600 if (Operand.getNode()->getOperand(0).getValueType().getScalarType()
2601 .bitsLT(VT.getScalarType()))
2602 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2603 if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2604 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2605 return Operand.getNode()->getOperand(0);
2607 if (OpOpcode == ISD::UNDEF)
2608 return getUNDEF(VT);
2611 // Basic sanity checking.
2612 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2613 && "Cannot BITCAST between types of different sizes!");
2614 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2615 if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x)
2616 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0));
2617 if (OpOpcode == ISD::UNDEF)
2618 return getUNDEF(VT);
2620 case ISD::SCALAR_TO_VECTOR:
2621 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2622 (VT.getVectorElementType() == Operand.getValueType() ||
2623 (VT.getVectorElementType().isInteger() &&
2624 Operand.getValueType().isInteger() &&
2625 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
2626 "Illegal SCALAR_TO_VECTOR node!");
2627 if (OpOpcode == ISD::UNDEF)
2628 return getUNDEF(VT);
2629 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2630 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2631 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2632 Operand.getConstantOperandVal(1) == 0 &&
2633 Operand.getOperand(0).getValueType() == VT)
2634 return Operand.getOperand(0);
2637 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
2638 if (getTarget().Options.UnsafeFPMath && OpOpcode == ISD::FSUB)
2639 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
2640 Operand.getNode()->getOperand(0));
2641 if (OpOpcode == ISD::FNEG) // --X -> X
2642 return Operand.getNode()->getOperand(0);
2645 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2646 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
2651 SDVTList VTs = getVTList(VT);
2652 if (VT != MVT::Glue) { // Don't CSE flag producing nodes
2653 FoldingSetNodeID ID;
2654 SDValue Ops[1] = { Operand };
2655 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2657 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2658 return SDValue(E, 0);
2660 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2661 CSEMap.InsertNode(N, IP);
2663 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2666 AllNodes.push_back(N);
2670 return SDValue(N, 0);
2673 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2675 ConstantSDNode *Cst1,
2676 ConstantSDNode *Cst2) {
2677 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
2680 case ISD::ADD: return getConstant(C1 + C2, VT);
2681 case ISD::SUB: return getConstant(C1 - C2, VT);
2682 case ISD::MUL: return getConstant(C1 * C2, VT);
2684 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2687 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2690 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2693 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2695 case ISD::AND: return getConstant(C1 & C2, VT);
2696 case ISD::OR: return getConstant(C1 | C2, VT);
2697 case ISD::XOR: return getConstant(C1 ^ C2, VT);
2698 case ISD::SHL: return getConstant(C1 << C2, VT);
2699 case ISD::SRL: return getConstant(C1.lshr(C2), VT);
2700 case ISD::SRA: return getConstant(C1.ashr(C2), VT);
2701 case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2702 case ISD::ROTR: return getConstant(C1.rotr(C2), VT);
2709 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2710 SDValue N1, SDValue N2) {
2711 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2712 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2715 case ISD::TokenFactor:
2716 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2717 N2.getValueType() == MVT::Other && "Invalid token factor!");
2718 // Fold trivial token factors.
2719 if (N1.getOpcode() == ISD::EntryToken) return N2;
2720 if (N2.getOpcode() == ISD::EntryToken) return N1;
2721 if (N1 == N2) return N1;
2723 case ISD::CONCAT_VECTORS:
2724 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2725 // one big BUILD_VECTOR.
2726 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2727 N2.getOpcode() == ISD::BUILD_VECTOR) {
2728 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
2729 N1.getNode()->op_end());
2730 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
2731 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2735 assert(VT.isInteger() && "This operator does not apply to FP types!");
2736 assert(N1.getValueType() == N2.getValueType() &&
2737 N1.getValueType() == VT && "Binary operator types must match!");
2738 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2739 // worth handling here.
2740 if (N2C && N2C->isNullValue())
2742 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2749 assert(VT.isInteger() && "This operator does not apply to FP types!");
2750 assert(N1.getValueType() == N2.getValueType() &&
2751 N1.getValueType() == VT && "Binary operator types must match!");
2752 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2753 // it's worth handling here.
2754 if (N2C && N2C->isNullValue())
2764 assert(VT.isInteger() && "This operator does not apply to FP types!");
2765 assert(N1.getValueType() == N2.getValueType() &&
2766 N1.getValueType() == VT && "Binary operator types must match!");
2773 if (getTarget().Options.UnsafeFPMath) {
2774 if (Opcode == ISD::FADD) {
2776 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
2777 if (CFP->getValueAPF().isZero())
2780 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2781 if (CFP->getValueAPF().isZero())
2783 } else if (Opcode == ISD::FSUB) {
2785 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2786 if (CFP->getValueAPF().isZero())
2790 assert(VT.isFloatingPoint() && "This operator only applies to FP types!");
2791 assert(N1.getValueType() == N2.getValueType() &&
2792 N1.getValueType() == VT && "Binary operator types must match!");
2794 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2795 assert(N1.getValueType() == VT &&
2796 N1.getValueType().isFloatingPoint() &&
2797 N2.getValueType().isFloatingPoint() &&
2798 "Invalid FCOPYSIGN!");
2805 assert(VT == N1.getValueType() &&
2806 "Shift operators return type must be the same as their first arg");
2807 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2808 "Shifts only work on integers");
2809 // Verify that the shift amount VT is bit enough to hold valid shift
2810 // amounts. This catches things like trying to shift an i1024 value by an
2811 // i8, which is easy to fall into in generic code that uses
2812 // TLI.getShiftAmount().
2813 assert(N2.getValueType().getSizeInBits() >=
2814 Log2_32_Ceil(N1.getValueType().getSizeInBits()) &&
2815 "Invalid use of small shift amount with oversized value!");
2817 // Always fold shifts of i1 values so the code generator doesn't need to
2818 // handle them. Since we know the size of the shift has to be less than the
2819 // size of the value, the shift/rotate count is guaranteed to be zero.
2822 if (N2C && N2C->isNullValue())
2825 case ISD::FP_ROUND_INREG: {
2826 EVT EVT = cast<VTSDNode>(N2)->getVT();
2827 assert(VT == N1.getValueType() && "Not an inreg round!");
2828 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2829 "Cannot FP_ROUND_INREG integer types");
2830 assert(EVT.isVector() == VT.isVector() &&
2831 "FP_ROUND_INREG type should be vector iff the operand "
2833 assert((!EVT.isVector() ||
2834 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2835 "Vector element counts must match in FP_ROUND_INREG");
2836 assert(EVT.bitsLE(VT) && "Not rounding down!");
2838 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2842 assert(VT.isFloatingPoint() &&
2843 N1.getValueType().isFloatingPoint() &&
2844 VT.bitsLE(N1.getValueType()) &&
2845 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2846 if (N1.getValueType() == VT) return N1; // noop conversion.
2848 case ISD::AssertSext:
2849 case ISD::AssertZext: {
2850 EVT EVT = cast<VTSDNode>(N2)->getVT();
2851 assert(VT == N1.getValueType() && "Not an inreg extend!");
2852 assert(VT.isInteger() && EVT.isInteger() &&
2853 "Cannot *_EXTEND_INREG FP types");
2854 assert(!EVT.isVector() &&
2855 "AssertSExt/AssertZExt type should be the vector element type "
2856 "rather than the vector type!");
2857 assert(EVT.bitsLE(VT) && "Not extending!");
2858 if (VT == EVT) return N1; // noop assertion.
2861 case ISD::SIGN_EXTEND_INREG: {
2862 EVT EVT = cast<VTSDNode>(N2)->getVT();
2863 assert(VT == N1.getValueType() && "Not an inreg extend!");
2864 assert(VT.isInteger() && EVT.isInteger() &&
2865 "Cannot *_EXTEND_INREG FP types");
2866 assert(EVT.isVector() == VT.isVector() &&
2867 "SIGN_EXTEND_INREG type should be vector iff the operand "
2869 assert((!EVT.isVector() ||
2870 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2871 "Vector element counts must match in SIGN_EXTEND_INREG");
2872 assert(EVT.bitsLE(VT) && "Not extending!");
2873 if (EVT == VT) return N1; // Not actually extending
2876 APInt Val = N1C->getAPIntValue();
2877 unsigned FromBits = EVT.getScalarType().getSizeInBits();
2878 Val <<= Val.getBitWidth()-FromBits;
2879 Val = Val.ashr(Val.getBitWidth()-FromBits);
2880 return getConstant(Val, VT);
2884 case ISD::EXTRACT_VECTOR_ELT:
2885 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2886 if (N1.getOpcode() == ISD::UNDEF)
2887 return getUNDEF(VT);
2889 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2890 // expanding copies of large vectors from registers.
2892 N1.getOpcode() == ISD::CONCAT_VECTORS &&
2893 N1.getNumOperands() > 0) {
2895 N1.getOperand(0).getValueType().getVectorNumElements();
2896 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
2897 N1.getOperand(N2C->getZExtValue() / Factor),
2898 getConstant(N2C->getZExtValue() % Factor,
2899 N2.getValueType()));
2902 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2903 // expanding large vector constants.
2904 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
2905 SDValue Elt = N1.getOperand(N2C->getZExtValue());
2906 EVT VEltTy = N1.getValueType().getVectorElementType();
2907 if (Elt.getValueType() != VEltTy) {
2908 // If the vector element type is not legal, the BUILD_VECTOR operands
2909 // are promoted and implicitly truncated. Make that explicit here.
2910 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt);
2913 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT
2914 // result is implicitly extended.
2915 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt);
2920 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2921 // operations are lowered to scalars.
2922 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2923 // If the indices are the same, return the inserted element else
2924 // if the indices are known different, extract the element from
2925 // the original vector.
2926 SDValue N1Op2 = N1.getOperand(2);
2927 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode());
2929 if (N1Op2C && N2C) {
2930 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) {
2931 if (VT == N1.getOperand(1).getValueType())
2932 return N1.getOperand(1);
2934 return getSExtOrTrunc(N1.getOperand(1), DL, VT);
2937 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
2941 case ISD::EXTRACT_ELEMENT:
2942 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
2943 assert(!N1.getValueType().isVector() && !VT.isVector() &&
2944 (N1.getValueType().isInteger() == VT.isInteger()) &&
2945 N1.getValueType() != VT &&
2946 "Wrong types for EXTRACT_ELEMENT!");
2948 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2949 // 64-bit integers into 32-bit parts. Instead of building the extract of
2950 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2951 if (N1.getOpcode() == ISD::BUILD_PAIR)
2952 return N1.getOperand(N2C->getZExtValue());
2954 // EXTRACT_ELEMENT of a constant int is also very common.
2955 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2956 unsigned ElementSize = VT.getSizeInBits();
2957 unsigned Shift = ElementSize * N2C->getZExtValue();
2958 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2959 return getConstant(ShiftedVal.trunc(ElementSize), VT);
2962 case ISD::EXTRACT_SUBVECTOR: {
2964 if (VT.isSimple() && N1.getValueType().isSimple()) {
2965 assert(VT.isVector() && N1.getValueType().isVector() &&
2966 "Extract subvector VTs must be a vectors!");
2967 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() &&
2968 "Extract subvector VTs must have the same element type!");
2969 assert(VT.getSimpleVT() <= N1.getValueType().getSimpleVT() &&
2970 "Extract subvector must be from larger vector to smaller vector!");
2972 if (isa<ConstantSDNode>(Index.getNode())) {
2973 assert((VT.getVectorNumElements() +
2974 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
2975 <= N1.getValueType().getVectorNumElements())
2976 && "Extract subvector overflow!");
2979 // Trivial extraction.
2980 if (VT.getSimpleVT() == N1.getValueType().getSimpleVT())
2989 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
2990 if (SV.getNode()) return SV;
2991 } else { // Cannonicalize constant to RHS if commutative
2992 if (isCommutativeBinOp(Opcode)) {
2993 std::swap(N1C, N2C);
2999 // Constant fold FP operations.
3000 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
3001 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
3003 if (!N2CFP && isCommutativeBinOp(Opcode)) {
3004 // Cannonicalize constant to RHS if commutative
3005 std::swap(N1CFP, N2CFP);
3007 } else if (N2CFP && VT != MVT::ppcf128) {
3008 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
3009 APFloat::opStatus s;
3012 s = V1.add(V2, APFloat::rmNearestTiesToEven);
3013 if (s != APFloat::opInvalidOp)
3014 return getConstantFP(V1, VT);
3017 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
3018 if (s!=APFloat::opInvalidOp)
3019 return getConstantFP(V1, VT);
3022 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
3023 if (s!=APFloat::opInvalidOp)
3024 return getConstantFP(V1, VT);
3027 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
3028 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
3029 return getConstantFP(V1, VT);
3032 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
3033 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
3034 return getConstantFP(V1, VT);
3036 case ISD::FCOPYSIGN:
3038 return getConstantFP(V1, VT);
3044 // Canonicalize an UNDEF to the RHS, even over a constant.
3045 if (N1.getOpcode() == ISD::UNDEF) {
3046 if (isCommutativeBinOp(Opcode)) {
3050 case ISD::FP_ROUND_INREG:
3051 case ISD::SIGN_EXTEND_INREG:
3057 return N1; // fold op(undef, arg2) -> undef
3065 return getConstant(0, VT); // fold op(undef, arg2) -> 0
3066 // For vectors, we can't easily build an all zero vector, just return
3073 // Fold a bunch of operators when the RHS is undef.
3074 if (N2.getOpcode() == ISD::UNDEF) {
3077 if (N1.getOpcode() == ISD::UNDEF)
3078 // Handle undef ^ undef -> 0 special case. This is a common
3080 return getConstant(0, VT);
3090 return N2; // fold op(arg1, undef) -> undef
3096 if (getTarget().Options.UnsafeFPMath)
3104 return getConstant(0, VT); // fold op(arg1, undef) -> 0
3105 // For vectors, we can't easily build an all zero vector, just return
3110 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
3111 // For vectors, we can't easily build an all one vector, just return
3119 // Memoize this node if possible.
3121 SDVTList VTs = getVTList(VT);
3122 if (VT != MVT::Glue) {
3123 SDValue Ops[] = { N1, N2 };
3124 FoldingSetNodeID ID;
3125 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
3127 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3128 return SDValue(E, 0);
3130 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
3131 CSEMap.InsertNode(N, IP);
3133 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
3136 AllNodes.push_back(N);
3140 return SDValue(N, 0);
3143 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3144 SDValue N1, SDValue N2, SDValue N3) {
3145 // Perform various simplifications.
3146 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
3148 case ISD::CONCAT_VECTORS:
3149 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
3150 // one big BUILD_VECTOR.
3151 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
3152 N2.getOpcode() == ISD::BUILD_VECTOR &&
3153 N3.getOpcode() == ISD::BUILD_VECTOR) {
3154 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
3155 N1.getNode()->op_end());
3156 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
3157 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end());
3158 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
3162 // Use FoldSetCC to simplify SETCC's.
3163 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
3164 if (Simp.getNode()) return Simp;
3169 if (N1C->getZExtValue())
3170 return N2; // select true, X, Y -> X
3171 return N3; // select false, X, Y -> Y
3174 if (N2 == N3) return N2; // select C, X, X -> X
3176 case ISD::VECTOR_SHUFFLE:
3177 llvm_unreachable("should use getVectorShuffle constructor!");
3178 case ISD::INSERT_SUBVECTOR: {
3180 if (VT.isSimple() && N1.getValueType().isSimple()
3181 && N2.getValueType().isSimple()) {
3182 assert(VT.isVector() && N1.getValueType().isVector() &&
3183 N2.getValueType().isVector() &&
3184 "Insert subvector VTs must be a vectors");
3185 assert(VT == N1.getValueType() &&
3186 "Dest and insert subvector source types must match!");
3187 assert(N2.getValueType().getSimpleVT() <= N1.getValueType().getSimpleVT() &&
3188 "Insert subvector must be from smaller vector to larger vector!");
3189 if (isa<ConstantSDNode>(Index.getNode())) {
3190 assert((N2.getValueType().getVectorNumElements() +
3191 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
3192 <= VT.getVectorNumElements())
3193 && "Insert subvector overflow!");
3196 // Trivial insertion.
3197 if (VT.getSimpleVT() == N2.getValueType().getSimpleVT())
3203 // Fold bit_convert nodes from a type to themselves.
3204 if (N1.getValueType() == VT)
3209 // Memoize node if it doesn't produce a flag.
3211 SDVTList VTs = getVTList(VT);
3212 if (VT != MVT::Glue) {
3213 SDValue Ops[] = { N1, N2, N3 };
3214 FoldingSetNodeID ID;
3215 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3217 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3218 return SDValue(E, 0);
3220 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3221 CSEMap.InsertNode(N, IP);
3223 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3226 AllNodes.push_back(N);
3230 return SDValue(N, 0);
3233 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3234 SDValue N1, SDValue N2, SDValue N3,
3236 SDValue Ops[] = { N1, N2, N3, N4 };
3237 return getNode(Opcode, DL, VT, Ops, 4);
3240 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3241 SDValue N1, SDValue N2, SDValue N3,
3242 SDValue N4, SDValue N5) {
3243 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3244 return getNode(Opcode, DL, VT, Ops, 5);
3247 /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
3248 /// the incoming stack arguments to be loaded from the stack.
3249 SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) {
3250 SmallVector<SDValue, 8> ArgChains;
3252 // Include the original chain at the beginning of the list. When this is
3253 // used by target LowerCall hooks, this helps legalize find the
3254 // CALLSEQ_BEGIN node.
3255 ArgChains.push_back(Chain);
3257 // Add a chain value for each stack argument.
3258 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
3259 UE = getEntryNode().getNode()->use_end(); U != UE; ++U)
3260 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
3261 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
3262 if (FI->getIndex() < 0)
3263 ArgChains.push_back(SDValue(L, 1));
3265 // Build a tokenfactor for all the chains.
3266 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other,
3267 &ArgChains[0], ArgChains.size());
3270 /// SplatByte - Distribute ByteVal over NumBits bits.
3271 static APInt SplatByte(unsigned NumBits, uint8_t ByteVal) {
3272 APInt Val = APInt(NumBits, ByteVal);
3274 for (unsigned i = NumBits; i > 8; i >>= 1) {
3275 Val = (Val << Shift) | Val;
3281 /// getMemsetValue - Vectorized representation of the memset value
3283 static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
3285 assert(Value.getOpcode() != ISD::UNDEF);
3287 unsigned NumBits = VT.getScalarType().getSizeInBits();
3288 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
3289 APInt Val = SplatByte(NumBits, C->getZExtValue() & 255);
3291 return DAG.getConstant(Val, VT);
3292 return DAG.getConstantFP(APFloat(Val), VT);
3295 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value);
3297 // Use a multiplication with 0x010101... to extend the input to the
3299 APInt Magic = SplatByte(NumBits, 0x01);
3300 Value = DAG.getNode(ISD::MUL, dl, VT, Value, DAG.getConstant(Magic, VT));
3306 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
3307 /// used when a memcpy is turned into a memset when the source is a constant
3309 static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG,
3310 const TargetLowering &TLI, StringRef Str) {
3311 // Handle vector with all elements zero.
3314 return DAG.getConstant(0, VT);
3315 else if (VT == MVT::f32 || VT == MVT::f64)
3316 return DAG.getConstantFP(0.0, VT);
3317 else if (VT.isVector()) {
3318 unsigned NumElts = VT.getVectorNumElements();
3319 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
3320 return DAG.getNode(ISD::BITCAST, dl, VT,
3321 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(),
3324 llvm_unreachable("Expected type!");
3327 assert(!VT.isVector() && "Can't handle vector type here!");
3328 unsigned NumVTBytes = VT.getSizeInBits() / 8;
3329 unsigned NumBytes = std::min(NumVTBytes, unsigned(Str.size()));
3332 if (TLI.isLittleEndian()) {
3333 for (unsigned i = 0; i != NumBytes; ++i)
3334 Val |= (uint64_t)(unsigned char)Str[i] << i*8;
3336 for (unsigned i = 0; i != NumBytes; ++i)
3337 Val |= (uint64_t)(unsigned char)Str[i] << (NumVTBytes-i-1)*8;
3340 return DAG.getConstant(Val, VT);
3343 /// getMemBasePlusOffset - Returns base and offset node for the
3345 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
3346 SelectionDAG &DAG) {
3347 EVT VT = Base.getValueType();
3348 return DAG.getNode(ISD::ADD, Base.getDebugLoc(),
3349 VT, Base, DAG.getConstant(Offset, VT));
3352 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
3354 static bool isMemSrcFromString(SDValue Src, StringRef &Str) {
3355 unsigned SrcDelta = 0;
3356 GlobalAddressSDNode *G = NULL;
3357 if (Src.getOpcode() == ISD::GlobalAddress)
3358 G = cast<GlobalAddressSDNode>(Src);
3359 else if (Src.getOpcode() == ISD::ADD &&
3360 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
3361 Src.getOperand(1).getOpcode() == ISD::Constant) {
3362 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
3363 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
3368 return getConstantStringInfo(G->getGlobal(), Str, SrcDelta, false);
3371 /// FindOptimalMemOpLowering - Determines the optimial series memory ops
3372 /// to replace the memset / memcpy. Return true if the number of memory ops
3373 /// is below the threshold. It returns the types of the sequence of
3374 /// memory ops to perform memset / memcpy by reference.
3375 static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps,
3376 unsigned Limit, uint64_t Size,
3377 unsigned DstAlign, unsigned SrcAlign,
3381 const TargetLowering &TLI) {
3382 assert((SrcAlign == 0 || SrcAlign >= DstAlign) &&
3383 "Expecting memcpy / memset source to meet alignment requirement!");
3384 // If 'SrcAlign' is zero, that means the memory operation does not need to
3385 // load the value, i.e. memset or memcpy from constant string. Otherwise,
3386 // it's the inferred alignment of the source. 'DstAlign', on the other hand,
3387 // is the specified alignment of the memory operation. If it is zero, that
3388 // means it's possible to change the alignment of the destination.
3389 // 'MemcpyStrSrc' indicates whether the memcpy source is constant so it does
3390 // not need to be loaded.
3391 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign,
3392 IsZeroVal, MemcpyStrSrc,
3393 DAG.getMachineFunction());
3395 if (VT == MVT::Other) {
3396 if (DstAlign >= TLI.getTargetData()->getPointerPrefAlignment() ||
3397 TLI.allowsUnalignedMemoryAccesses(VT)) {
3398 VT = TLI.getPointerTy();
3400 switch (DstAlign & 7) {
3401 case 0: VT = MVT::i64; break;
3402 case 4: VT = MVT::i32; break;
3403 case 2: VT = MVT::i16; break;
3404 default: VT = MVT::i8; break;
3409 while (!TLI.isTypeLegal(LVT))
3410 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1);
3411 assert(LVT.isInteger());
3417 unsigned NumMemOps = 0;
3419 unsigned VTSize = VT.getSizeInBits() / 8;
3420 while (VTSize > Size) {
3421 // For now, only use non-vector load / store's for the left-over pieces.
3422 if (VT.isVector() || VT.isFloatingPoint()) {
3424 while (!TLI.isTypeLegal(VT))
3425 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3426 VTSize = VT.getSizeInBits() / 8;
3428 // This can result in a type that is not legal on the target, e.g.
3429 // 1 or 2 bytes on PPC.
3430 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3435 if (++NumMemOps > Limit)
3437 MemOps.push_back(VT);
3444 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3445 SDValue Chain, SDValue Dst,
3446 SDValue Src, uint64_t Size,
3447 unsigned Align, bool isVol,
3449 MachinePointerInfo DstPtrInfo,
3450 MachinePointerInfo SrcPtrInfo) {
3451 // Turn a memcpy of undef to nop.
3452 if (Src.getOpcode() == ISD::UNDEF)
3455 // Expand memcpy to a series of load and store ops if the size operand falls
3456 // below a certain threshold.
3457 // TODO: In the AlwaysInline case, if the size is big then generate a loop
3458 // rather than maybe a humongous number of loads and stores.
3459 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3460 std::vector<EVT> MemOps;
3461 bool DstAlignCanChange = false;
3462 MachineFunction &MF = DAG.getMachineFunction();
3463 MachineFrameInfo *MFI = MF.getFrameInfo();
3464 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize);
3465 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3466 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3467 DstAlignCanChange = true;
3468 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3469 if (Align > SrcAlign)
3472 bool CopyFromStr = isMemSrcFromString(Src, Str);
3473 bool isZeroStr = CopyFromStr && Str.empty();
3474 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(OptSize);
3476 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3477 (DstAlignCanChange ? 0 : Align),
3478 (isZeroStr ? 0 : SrcAlign),
3479 true, CopyFromStr, DAG, TLI))
3482 if (DstAlignCanChange) {
3483 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3484 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3485 if (NewAlign > Align) {
3486 // Give the stack frame object a larger alignment if needed.
3487 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3488 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3493 SmallVector<SDValue, 8> OutChains;
3494 unsigned NumMemOps = MemOps.size();
3495 uint64_t SrcOff = 0, DstOff = 0;
3496 for (unsigned i = 0; i != NumMemOps; ++i) {
3498 unsigned VTSize = VT.getSizeInBits() / 8;
3499 SDValue Value, Store;
3502 (isZeroStr || (VT.isInteger() && !VT.isVector()))) {
3503 // It's unlikely a store of a vector immediate can be done in a single
3504 // instruction. It would require a load from a constantpool first.
3505 // We only handle zero vectors here.
3506 // FIXME: Handle other cases where store of vector immediate is done in
3507 // a single instruction.
3508 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str.substr(SrcOff));
3509 Store = DAG.getStore(Chain, dl, Value,
3510 getMemBasePlusOffset(Dst, DstOff, DAG),
3511 DstPtrInfo.getWithOffset(DstOff), isVol,
3514 // The type might not be legal for the target. This should only happen
3515 // if the type is smaller than a legal type, as on PPC, so the right
3516 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify
3517 // to Load/Store if NVT==VT.
3518 // FIXME does the case above also need this?
3519 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
3520 assert(NVT.bitsGE(VT));
3521 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain,
3522 getMemBasePlusOffset(Src, SrcOff, DAG),
3523 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false,
3524 MinAlign(SrcAlign, SrcOff));
3525 Store = DAG.getTruncStore(Chain, dl, Value,
3526 getMemBasePlusOffset(Dst, DstOff, DAG),
3527 DstPtrInfo.getWithOffset(DstOff), VT, isVol,
3530 OutChains.push_back(Store);
3535 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3536 &OutChains[0], OutChains.size());
3539 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3540 SDValue Chain, SDValue Dst,
3541 SDValue Src, uint64_t Size,
3542 unsigned Align, bool isVol,
3544 MachinePointerInfo DstPtrInfo,
3545 MachinePointerInfo SrcPtrInfo) {
3546 // Turn a memmove of undef to nop.
3547 if (Src.getOpcode() == ISD::UNDEF)
3550 // Expand memmove to a series of load and store ops if the size operand falls
3551 // below a certain threshold.
3552 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3553 std::vector<EVT> MemOps;
3554 bool DstAlignCanChange = false;
3555 MachineFunction &MF = DAG.getMachineFunction();
3556 MachineFrameInfo *MFI = MF.getFrameInfo();
3557 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize);
3558 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3559 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3560 DstAlignCanChange = true;
3561 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3562 if (Align > SrcAlign)
3564 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(OptSize);
3566 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3567 (DstAlignCanChange ? 0 : Align),
3568 SrcAlign, true, false, DAG, TLI))
3571 if (DstAlignCanChange) {
3572 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3573 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3574 if (NewAlign > Align) {
3575 // Give the stack frame object a larger alignment if needed.
3576 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3577 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3582 uint64_t SrcOff = 0, DstOff = 0;
3583 SmallVector<SDValue, 8> LoadValues;
3584 SmallVector<SDValue, 8> LoadChains;
3585 SmallVector<SDValue, 8> OutChains;
3586 unsigned NumMemOps = MemOps.size();
3587 for (unsigned i = 0; i < NumMemOps; i++) {
3589 unsigned VTSize = VT.getSizeInBits() / 8;
3590 SDValue Value, Store;
3592 Value = DAG.getLoad(VT, dl, Chain,
3593 getMemBasePlusOffset(Src, SrcOff, DAG),
3594 SrcPtrInfo.getWithOffset(SrcOff), isVol,
3595 false, false, SrcAlign);
3596 LoadValues.push_back(Value);
3597 LoadChains.push_back(Value.getValue(1));
3600 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3601 &LoadChains[0], LoadChains.size());
3603 for (unsigned i = 0; i < NumMemOps; i++) {
3605 unsigned VTSize = VT.getSizeInBits() / 8;
3606 SDValue Value, Store;
3608 Store = DAG.getStore(Chain, dl, LoadValues[i],
3609 getMemBasePlusOffset(Dst, DstOff, DAG),
3610 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align);
3611 OutChains.push_back(Store);
3615 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3616 &OutChains[0], OutChains.size());
3619 static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl,
3620 SDValue Chain, SDValue Dst,
3621 SDValue Src, uint64_t Size,
3622 unsigned Align, bool isVol,
3623 MachinePointerInfo DstPtrInfo) {
3624 // Turn a memset of undef to nop.
3625 if (Src.getOpcode() == ISD::UNDEF)
3628 // Expand memset to a series of load/store ops if the size operand
3629 // falls below a certain threshold.
3630 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3631 std::vector<EVT> MemOps;
3632 bool DstAlignCanChange = false;
3633 MachineFunction &MF = DAG.getMachineFunction();
3634 MachineFrameInfo *MFI = MF.getFrameInfo();
3635 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize);
3636 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3637 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3638 DstAlignCanChange = true;
3640 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue();
3641 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(OptSize),
3642 Size, (DstAlignCanChange ? 0 : Align), 0,
3643 IsZeroVal, false, DAG, TLI))
3646 if (DstAlignCanChange) {
3647 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3648 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3649 if (NewAlign > Align) {
3650 // Give the stack frame object a larger alignment if needed.
3651 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3652 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3657 SmallVector<SDValue, 8> OutChains;
3658 uint64_t DstOff = 0;
3659 unsigned NumMemOps = MemOps.size();
3661 // Find the largest store and generate the bit pattern for it.
3662 EVT LargestVT = MemOps[0];
3663 for (unsigned i = 1; i < NumMemOps; i++)
3664 if (MemOps[i].bitsGT(LargestVT))
3665 LargestVT = MemOps[i];
3666 SDValue MemSetValue = getMemsetValue(Src, LargestVT, DAG, dl);
3668 for (unsigned i = 0; i < NumMemOps; i++) {
3671 // If this store is smaller than the largest store see whether we can get
3672 // the smaller value for free with a truncate.
3673 SDValue Value = MemSetValue;
3674 if (VT.bitsLT(LargestVT)) {
3675 if (!LargestVT.isVector() && !VT.isVector() &&
3676 TLI.isTruncateFree(LargestVT, VT))
3677 Value = DAG.getNode(ISD::TRUNCATE, dl, VT, MemSetValue);
3679 Value = getMemsetValue(Src, VT, DAG, dl);
3681 assert(Value.getValueType() == VT && "Value with wrong type.");
3682 SDValue Store = DAG.getStore(Chain, dl, Value,
3683 getMemBasePlusOffset(Dst, DstOff, DAG),
3684 DstPtrInfo.getWithOffset(DstOff),
3685 isVol, false, Align);
3686 OutChains.push_back(Store);
3687 DstOff += VT.getSizeInBits() / 8;
3690 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3691 &OutChains[0], OutChains.size());
3694 SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst,
3695 SDValue Src, SDValue Size,
3696 unsigned Align, bool isVol, bool AlwaysInline,
3697 MachinePointerInfo DstPtrInfo,
3698 MachinePointerInfo SrcPtrInfo) {
3700 // Check to see if we should lower the memcpy to loads and stores first.
3701 // For cases within the target-specified limits, this is the best choice.
3702 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3704 // Memcpy with size zero? Just return the original chain.
3705 if (ConstantSize->isNullValue())
3708 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3709 ConstantSize->getZExtValue(),Align,
3710 isVol, false, DstPtrInfo, SrcPtrInfo);
3711 if (Result.getNode())
3715 // Then check to see if we should lower the memcpy with target-specific
3716 // code. If the target chooses to do this, this is the next best.
3718 TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align,
3719 isVol, AlwaysInline,
3720 DstPtrInfo, SrcPtrInfo);
3721 if (Result.getNode())
3724 // If we really need inline code and the target declined to provide it,
3725 // use a (potentially long) sequence of loads and stores.
3727 assert(ConstantSize && "AlwaysInline requires a constant size!");
3728 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3729 ConstantSize->getZExtValue(), Align, isVol,
3730 true, DstPtrInfo, SrcPtrInfo);
3733 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc
3734 // memcpy is not guaranteed to be safe. libc memcpys aren't required to
3735 // respect volatile, so they may do things like read or write memory
3736 // beyond the given memory regions. But fixing this isn't easy, and most
3737 // people don't care.
3739 // Emit a library call.
3740 TargetLowering::ArgListTy Args;
3741 TargetLowering::ArgListEntry Entry;
3742 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3743 Entry.Node = Dst; Args.push_back(Entry);
3744 Entry.Node = Src; Args.push_back(Entry);
3745 Entry.Node = Size; Args.push_back(Entry);
3746 // FIXME: pass in DebugLoc
3747 std::pair<SDValue,SDValue> CallResult =
3748 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3749 false, false, false, false, 0,
3750 TLI.getLibcallCallingConv(RTLIB::MEMCPY),
3751 /*isTailCall=*/false,
3752 /*doesNotReturn=*/false, /*isReturnValueUsed=*/false,
3753 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY),
3754 TLI.getPointerTy()),
3756 return CallResult.second;
3759 SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst,
3760 SDValue Src, SDValue Size,
3761 unsigned Align, bool isVol,
3762 MachinePointerInfo DstPtrInfo,
3763 MachinePointerInfo SrcPtrInfo) {
3765 // Check to see if we should lower the memmove to loads and stores first.
3766 // For cases within the target-specified limits, this is the best choice.
3767 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3769 // Memmove with size zero? Just return the original chain.
3770 if (ConstantSize->isNullValue())
3774 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
3775 ConstantSize->getZExtValue(), Align, isVol,
3776 false, DstPtrInfo, SrcPtrInfo);
3777 if (Result.getNode())
3781 // Then check to see if we should lower the memmove with target-specific
3782 // code. If the target chooses to do this, this is the next best.
3784 TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3785 DstPtrInfo, SrcPtrInfo);
3786 if (Result.getNode())
3789 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may
3790 // not be safe. See memcpy above for more details.
3792 // Emit a library call.
3793 TargetLowering::ArgListTy Args;
3794 TargetLowering::ArgListEntry Entry;
3795 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3796 Entry.Node = Dst; Args.push_back(Entry);
3797 Entry.Node = Src; Args.push_back(Entry);
3798 Entry.Node = Size; Args.push_back(Entry);
3799 // FIXME: pass in DebugLoc
3800 std::pair<SDValue,SDValue> CallResult =
3801 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3802 false, false, false, false, 0,
3803 TLI.getLibcallCallingConv(RTLIB::MEMMOVE),
3804 /*isTailCall=*/false,
3805 /*doesNotReturn=*/false, /*isReturnValueUsed=*/false,
3806 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE),
3807 TLI.getPointerTy()),
3809 return CallResult.second;
3812 SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst,
3813 SDValue Src, SDValue Size,
3814 unsigned Align, bool isVol,
3815 MachinePointerInfo DstPtrInfo) {
3817 // Check to see if we should lower the memset to stores first.
3818 // For cases within the target-specified limits, this is the best choice.
3819 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3821 // Memset with size zero? Just return the original chain.
3822 if (ConstantSize->isNullValue())
3826 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
3827 Align, isVol, DstPtrInfo);
3829 if (Result.getNode())
3833 // Then check to see if we should lower the memset with target-specific
3834 // code. If the target chooses to do this, this is the next best.
3836 TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3838 if (Result.getNode())
3841 // Emit a library call.
3842 Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext());
3843 TargetLowering::ArgListTy Args;
3844 TargetLowering::ArgListEntry Entry;
3845 Entry.Node = Dst; Entry.Ty = IntPtrTy;
3846 Args.push_back(Entry);
3847 // Extend or truncate the argument to be an i32 value for the call.
3848 if (Src.getValueType().bitsGT(MVT::i32))
3849 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
3851 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
3853 Entry.Ty = Type::getInt32Ty(*getContext());
3854 Entry.isSExt = true;
3855 Args.push_back(Entry);
3857 Entry.Ty = IntPtrTy;
3858 Entry.isSExt = false;
3859 Args.push_back(Entry);
3860 // FIXME: pass in DebugLoc
3861 std::pair<SDValue,SDValue> CallResult =
3862 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3863 false, false, false, false, 0,
3864 TLI.getLibcallCallingConv(RTLIB::MEMSET),
3865 /*isTailCall=*/false,
3866 /*doesNotReturn*/false, /*isReturnValueUsed=*/false,
3867 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET),
3868 TLI.getPointerTy()),
3870 return CallResult.second;
3873 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3874 SDValue Chain, SDValue Ptr, SDValue Cmp,
3875 SDValue Swp, MachinePointerInfo PtrInfo,
3877 AtomicOrdering Ordering,
3878 SynchronizationScope SynchScope) {
3879 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3880 Alignment = getEVTAlignment(MemVT);
3882 MachineFunction &MF = getMachineFunction();
3883 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
3885 // For now, atomics are considered to be volatile always.
3886 // FIXME: Volatile isn't really correct; we should keep track of atomic
3887 // orderings in the memoperand.
3888 Flags |= MachineMemOperand::MOVolatile;
3890 MachineMemOperand *MMO =
3891 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment);
3893 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO,
3894 Ordering, SynchScope);
3897 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3899 SDValue Ptr, SDValue Cmp,
3900 SDValue Swp, MachineMemOperand *MMO,
3901 AtomicOrdering Ordering,
3902 SynchronizationScope SynchScope) {
3903 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
3904 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3906 EVT VT = Cmp.getValueType();
3908 SDVTList VTs = getVTList(VT, MVT::Other);
3909 FoldingSetNodeID ID;
3910 ID.AddInteger(MemVT.getRawBits());
3911 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3912 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3914 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3915 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3916 return SDValue(E, 0);
3918 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
3919 Ptr, Cmp, Swp, MMO, Ordering,
3921 CSEMap.InsertNode(N, IP);
3922 AllNodes.push_back(N);
3923 return SDValue(N, 0);
3926 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3928 SDValue Ptr, SDValue Val,
3929 const Value* PtrVal,
3931 AtomicOrdering Ordering,
3932 SynchronizationScope SynchScope) {
3933 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3934 Alignment = getEVTAlignment(MemVT);
3936 MachineFunction &MF = getMachineFunction();
3937 // A monotonic store does not load; a release store "loads" in the sense
3938 // that other stores cannot be sunk past it.
3939 // (An atomicrmw obviously both loads and stores.)
3940 unsigned Flags = MachineMemOperand::MOStore;
3941 if (Opcode != ISD::ATOMIC_STORE || Ordering > Monotonic)
3942 Flags |= MachineMemOperand::MOLoad;
3944 // For now, atomics are considered to be volatile always.
3945 // FIXME: Volatile isn't really correct; we should keep track of atomic
3946 // orderings in the memoperand.
3947 Flags |= MachineMemOperand::MOVolatile;
3949 MachineMemOperand *MMO =
3950 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
3951 MemVT.getStoreSize(), Alignment);
3953 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO,
3954 Ordering, SynchScope);
3957 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3959 SDValue Ptr, SDValue Val,
3960 MachineMemOperand *MMO,
3961 AtomicOrdering Ordering,
3962 SynchronizationScope SynchScope) {
3963 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
3964 Opcode == ISD::ATOMIC_LOAD_SUB ||
3965 Opcode == ISD::ATOMIC_LOAD_AND ||
3966 Opcode == ISD::ATOMIC_LOAD_OR ||
3967 Opcode == ISD::ATOMIC_LOAD_XOR ||
3968 Opcode == ISD::ATOMIC_LOAD_NAND ||
3969 Opcode == ISD::ATOMIC_LOAD_MIN ||
3970 Opcode == ISD::ATOMIC_LOAD_MAX ||
3971 Opcode == ISD::ATOMIC_LOAD_UMIN ||
3972 Opcode == ISD::ATOMIC_LOAD_UMAX ||
3973 Opcode == ISD::ATOMIC_SWAP ||
3974 Opcode == ISD::ATOMIC_STORE) &&
3975 "Invalid Atomic Op");
3977 EVT VT = Val.getValueType();
3979 SDVTList VTs = Opcode == ISD::ATOMIC_STORE ? getVTList(MVT::Other) :
3980 getVTList(VT, MVT::Other);
3981 FoldingSetNodeID ID;
3982 ID.AddInteger(MemVT.getRawBits());
3983 SDValue Ops[] = {Chain, Ptr, Val};
3984 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3986 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3987 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3988 return SDValue(E, 0);
3990 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
3992 Ordering, SynchScope);
3993 CSEMap.InsertNode(N, IP);
3994 AllNodes.push_back(N);
3995 return SDValue(N, 0);
3998 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3999 EVT VT, SDValue Chain,
4001 const Value* PtrVal,
4003 AtomicOrdering Ordering,
4004 SynchronizationScope SynchScope) {
4005 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4006 Alignment = getEVTAlignment(MemVT);
4008 MachineFunction &MF = getMachineFunction();
4009 // A monotonic load does not store; an acquire load "stores" in the sense
4010 // that other loads cannot be hoisted past it.
4011 unsigned Flags = MachineMemOperand::MOLoad;
4012 if (Ordering > Monotonic)
4013 Flags |= MachineMemOperand::MOStore;
4015 // For now, atomics are considered to be volatile always.
4016 // FIXME: Volatile isn't really correct; we should keep track of atomic
4017 // orderings in the memoperand.
4018 Flags |= MachineMemOperand::MOVolatile;
4020 MachineMemOperand *MMO =
4021 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
4022 MemVT.getStoreSize(), Alignment);
4024 return getAtomic(Opcode, dl, MemVT, VT, Chain, Ptr, MMO,
4025 Ordering, SynchScope);
4028 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
4029 EVT VT, SDValue Chain,
4031 MachineMemOperand *MMO,
4032 AtomicOrdering Ordering,
4033 SynchronizationScope SynchScope) {
4034 assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op");
4036 SDVTList VTs = getVTList(VT, MVT::Other);
4037 FoldingSetNodeID ID;
4038 ID.AddInteger(MemVT.getRawBits());
4039 SDValue Ops[] = {Chain, Ptr};
4040 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
4042 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4043 cast<AtomicSDNode>(E)->refineAlignment(MMO);
4044 return SDValue(E, 0);
4046 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
4047 Ptr, MMO, Ordering, SynchScope);
4048 CSEMap.InsertNode(N, IP);
4049 AllNodes.push_back(N);
4050 return SDValue(N, 0);
4053 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
4054 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps,
4059 SmallVector<EVT, 4> VTs;
4060 VTs.reserve(NumOps);
4061 for (unsigned i = 0; i < NumOps; ++i)
4062 VTs.push_back(Ops[i].getValueType());
4063 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps),
4068 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl,
4069 const EVT *VTs, unsigned NumVTs,
4070 const SDValue *Ops, unsigned NumOps,
4071 EVT MemVT, MachinePointerInfo PtrInfo,
4072 unsigned Align, bool Vol,
4073 bool ReadMem, bool WriteMem) {
4074 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps,
4075 MemVT, PtrInfo, Align, Vol,
4080 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
4081 const SDValue *Ops, unsigned NumOps,
4082 EVT MemVT, MachinePointerInfo PtrInfo,
4083 unsigned Align, bool Vol,
4084 bool ReadMem, bool WriteMem) {
4085 if (Align == 0) // Ensure that codegen never sees alignment 0
4086 Align = getEVTAlignment(MemVT);
4088 MachineFunction &MF = getMachineFunction();
4091 Flags |= MachineMemOperand::MOStore;
4093 Flags |= MachineMemOperand::MOLoad;
4095 Flags |= MachineMemOperand::MOVolatile;
4096 MachineMemOperand *MMO =
4097 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Align);
4099 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO);
4103 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
4104 const SDValue *Ops, unsigned NumOps,
4105 EVT MemVT, MachineMemOperand *MMO) {
4106 assert((Opcode == ISD::INTRINSIC_VOID ||
4107 Opcode == ISD::INTRINSIC_W_CHAIN ||
4108 Opcode == ISD::PREFETCH ||
4109 (Opcode <= INT_MAX &&
4110 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) &&
4111 "Opcode is not a memory-accessing opcode!");
4113 // Memoize the node unless it returns a flag.
4114 MemIntrinsicSDNode *N;
4115 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
4116 FoldingSetNodeID ID;
4117 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4119 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4120 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO);
4121 return SDValue(E, 0);
4124 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
4126 CSEMap.InsertNode(N, IP);
4128 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
4131 AllNodes.push_back(N);
4132 return SDValue(N, 0);
4135 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4136 /// MachinePointerInfo record from it. This is particularly useful because the
4137 /// code generator has many cases where it doesn't bother passing in a
4138 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4139 static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) {
4140 // If this is FI+Offset, we can model it.
4141 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr))
4142 return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset);
4144 // If this is (FI+Offset1)+Offset2, we can model it.
4145 if (Ptr.getOpcode() != ISD::ADD ||
4146 !isa<ConstantSDNode>(Ptr.getOperand(1)) ||
4147 !isa<FrameIndexSDNode>(Ptr.getOperand(0)))
4148 return MachinePointerInfo();
4150 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
4151 return MachinePointerInfo::getFixedStack(FI, Offset+
4152 cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue());
4155 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4156 /// MachinePointerInfo record from it. This is particularly useful because the
4157 /// code generator has many cases where it doesn't bother passing in a
4158 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4159 static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) {
4160 // If the 'Offset' value isn't a constant, we can't handle this.
4161 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp))
4162 return InferPointerInfo(Ptr, OffsetNode->getSExtValue());
4163 if (OffsetOp.getOpcode() == ISD::UNDEF)
4164 return InferPointerInfo(Ptr);
4165 return MachinePointerInfo();
4170 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4171 EVT VT, DebugLoc dl, SDValue Chain,
4172 SDValue Ptr, SDValue Offset,
4173 MachinePointerInfo PtrInfo, EVT MemVT,
4174 bool isVolatile, bool isNonTemporal, bool isInvariant,
4175 unsigned Alignment, const MDNode *TBAAInfo,
4176 const MDNode *Ranges) {
4177 assert(Chain.getValueType() == MVT::Other &&
4178 "Invalid chain type");
4179 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4180 Alignment = getEVTAlignment(VT);
4182 unsigned Flags = MachineMemOperand::MOLoad;
4184 Flags |= MachineMemOperand::MOVolatile;
4186 Flags |= MachineMemOperand::MONonTemporal;
4188 Flags |= MachineMemOperand::MOInvariant;
4190 // If we don't have a PtrInfo, infer the trivial frame index case to simplify
4193 PtrInfo = InferPointerInfo(Ptr, Offset);
4195 MachineFunction &MF = getMachineFunction();
4196 MachineMemOperand *MMO =
4197 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment,
4199 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO);
4203 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4204 EVT VT, DebugLoc dl, SDValue Chain,
4205 SDValue Ptr, SDValue Offset, EVT MemVT,
4206 MachineMemOperand *MMO) {
4208 ExtType = ISD::NON_EXTLOAD;
4209 } else if (ExtType == ISD::NON_EXTLOAD) {
4210 assert(VT == MemVT && "Non-extending load from different memory type!");
4213 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) &&
4214 "Should only be an extending load, not truncating!");
4215 assert(VT.isInteger() == MemVT.isInteger() &&
4216 "Cannot convert from FP to Int or Int -> FP!");
4217 assert(VT.isVector() == MemVT.isVector() &&
4218 "Cannot use trunc store to convert to or from a vector!");
4219 assert((!VT.isVector() ||
4220 VT.getVectorNumElements() == MemVT.getVectorNumElements()) &&
4221 "Cannot use trunc store to change the number of vector elements!");
4224 bool Indexed = AM != ISD::UNINDEXED;
4225 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
4226 "Unindexed load with an offset!");
4228 SDVTList VTs = Indexed ?
4229 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
4230 SDValue Ops[] = { Chain, Ptr, Offset };
4231 FoldingSetNodeID ID;
4232 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
4233 ID.AddInteger(MemVT.getRawBits());
4234 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(),
4235 MMO->isNonTemporal(),
4236 MMO->isInvariant()));
4238 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4239 cast<LoadSDNode>(E)->refineAlignment(MMO);
4240 return SDValue(E, 0);
4242 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType,
4244 CSEMap.InsertNode(N, IP);
4245 AllNodes.push_back(N);
4246 return SDValue(N, 0);
4249 SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl,
4250 SDValue Chain, SDValue Ptr,
4251 MachinePointerInfo PtrInfo,
4252 bool isVolatile, bool isNonTemporal,
4253 bool isInvariant, unsigned Alignment,
4254 const MDNode *TBAAInfo,
4255 const MDNode *Ranges) {
4256 SDValue Undef = getUNDEF(Ptr.getValueType());
4257 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
4258 PtrInfo, VT, isVolatile, isNonTemporal, isInvariant, Alignment,
4262 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT,
4263 SDValue Chain, SDValue Ptr,
4264 MachinePointerInfo PtrInfo, EVT MemVT,
4265 bool isVolatile, bool isNonTemporal,
4266 unsigned Alignment, const MDNode *TBAAInfo) {
4267 SDValue Undef = getUNDEF(Ptr.getValueType());
4268 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
4269 PtrInfo, MemVT, isVolatile, isNonTemporal, false, Alignment,
4275 SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base,
4276 SDValue Offset, ISD::MemIndexedMode AM) {
4277 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
4278 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
4279 "Load is already a indexed load!");
4280 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl,
4281 LD->getChain(), Base, Offset, LD->getPointerInfo(),
4282 LD->getMemoryVT(), LD->isVolatile(), LD->isNonTemporal(),
4283 false, LD->getAlignment());
4286 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4287 SDValue Ptr, MachinePointerInfo PtrInfo,
4288 bool isVolatile, bool isNonTemporal,
4289 unsigned Alignment, const MDNode *TBAAInfo) {
4290 assert(Chain.getValueType() == MVT::Other &&
4291 "Invalid chain type");
4292 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4293 Alignment = getEVTAlignment(Val.getValueType());
4295 unsigned Flags = MachineMemOperand::MOStore;
4297 Flags |= MachineMemOperand::MOVolatile;
4299 Flags |= MachineMemOperand::MONonTemporal;
4302 PtrInfo = InferPointerInfo(Ptr);
4304 MachineFunction &MF = getMachineFunction();
4305 MachineMemOperand *MMO =
4306 MF.getMachineMemOperand(PtrInfo, Flags,
4307 Val.getValueType().getStoreSize(), Alignment,
4310 return getStore(Chain, dl, Val, Ptr, MMO);
4313 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4314 SDValue Ptr, MachineMemOperand *MMO) {
4315 assert(Chain.getValueType() == MVT::Other &&
4316 "Invalid chain type");
4317 EVT VT = Val.getValueType();
4318 SDVTList VTs = getVTList(MVT::Other);
4319 SDValue Undef = getUNDEF(Ptr.getValueType());
4320 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4321 FoldingSetNodeID ID;
4322 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4323 ID.AddInteger(VT.getRawBits());
4324 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
4325 MMO->isNonTemporal(), MMO->isInvariant()));
4327 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4328 cast<StoreSDNode>(E)->refineAlignment(MMO);
4329 return SDValue(E, 0);
4331 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4333 CSEMap.InsertNode(N, IP);
4334 AllNodes.push_back(N);
4335 return SDValue(N, 0);
4338 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4339 SDValue Ptr, MachinePointerInfo PtrInfo,
4340 EVT SVT,bool isVolatile, bool isNonTemporal,
4342 const MDNode *TBAAInfo) {
4343 assert(Chain.getValueType() == MVT::Other &&
4344 "Invalid chain type");
4345 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4346 Alignment = getEVTAlignment(SVT);
4348 unsigned Flags = MachineMemOperand::MOStore;
4350 Flags |= MachineMemOperand::MOVolatile;
4352 Flags |= MachineMemOperand::MONonTemporal;
4355 PtrInfo = InferPointerInfo(Ptr);
4357 MachineFunction &MF = getMachineFunction();
4358 MachineMemOperand *MMO =
4359 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment,
4362 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO);
4365 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4366 SDValue Ptr, EVT SVT,
4367 MachineMemOperand *MMO) {
4368 EVT VT = Val.getValueType();
4370 assert(Chain.getValueType() == MVT::Other &&
4371 "Invalid chain type");
4373 return getStore(Chain, dl, Val, Ptr, MMO);
4375 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) &&
4376 "Should only be a truncating store, not extending!");
4377 assert(VT.isInteger() == SVT.isInteger() &&
4378 "Can't do FP-INT conversion!");
4379 assert(VT.isVector() == SVT.isVector() &&
4380 "Cannot use trunc store to convert to or from a vector!");
4381 assert((!VT.isVector() ||
4382 VT.getVectorNumElements() == SVT.getVectorNumElements()) &&
4383 "Cannot use trunc store to change the number of vector elements!");
4385 SDVTList VTs = getVTList(MVT::Other);
4386 SDValue Undef = getUNDEF(Ptr.getValueType());
4387 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4388 FoldingSetNodeID ID;
4389 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4390 ID.AddInteger(SVT.getRawBits());
4391 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(),
4392 MMO->isNonTemporal(), MMO->isInvariant()));
4394 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4395 cast<StoreSDNode>(E)->refineAlignment(MMO);
4396 return SDValue(E, 0);
4398 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4400 CSEMap.InsertNode(N, IP);
4401 AllNodes.push_back(N);
4402 return SDValue(N, 0);
4406 SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base,
4407 SDValue Offset, ISD::MemIndexedMode AM) {
4408 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
4409 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
4410 "Store is already a indexed store!");
4411 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
4412 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
4413 FoldingSetNodeID ID;
4414 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4415 ID.AddInteger(ST->getMemoryVT().getRawBits());
4416 ID.AddInteger(ST->getRawSubclassData());
4418 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4419 return SDValue(E, 0);
4421 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM,
4422 ST->isTruncatingStore(),
4424 ST->getMemOperand());
4425 CSEMap.InsertNode(N, IP);
4426 AllNodes.push_back(N);
4427 return SDValue(N, 0);
4430 SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl,
4431 SDValue Chain, SDValue Ptr,
4434 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) };
4435 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 4);
4438 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4439 const SDUse *Ops, unsigned NumOps) {
4441 case 0: return getNode(Opcode, DL, VT);
4442 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4443 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4444 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4448 // Copy from an SDUse array into an SDValue array for use with
4449 // the regular getNode logic.
4450 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
4451 return getNode(Opcode, DL, VT, &NewOps[0], NumOps);
4454 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4455 const SDValue *Ops, unsigned NumOps) {
4457 case 0: return getNode(Opcode, DL, VT);
4458 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4459 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4460 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4466 case ISD::SELECT_CC: {
4467 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
4468 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
4469 "LHS and RHS of condition must have same type!");
4470 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4471 "True and False arms of SelectCC must have same type!");
4472 assert(Ops[2].getValueType() == VT &&
4473 "select_cc node must be of same type as true and false value!");
4477 assert(NumOps == 5 && "BR_CC takes 5 operands!");
4478 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4479 "LHS/RHS of comparison should match types!");
4486 SDVTList VTs = getVTList(VT);
4488 if (VT != MVT::Glue) {
4489 FoldingSetNodeID ID;
4490 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
4493 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4494 return SDValue(E, 0);
4496 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4497 CSEMap.InsertNode(N, IP);
4499 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4502 AllNodes.push_back(N);
4506 return SDValue(N, 0);
4509 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4510 const std::vector<EVT> &ResultTys,
4511 const SDValue *Ops, unsigned NumOps) {
4512 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()),
4516 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4517 const EVT *VTs, unsigned NumVTs,
4518 const SDValue *Ops, unsigned NumOps) {
4520 return getNode(Opcode, DL, VTs[0], Ops, NumOps);
4521 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps);
4524 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4525 const SDValue *Ops, unsigned NumOps) {
4526 if (VTList.NumVTs == 1)
4527 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps);
4531 // FIXME: figure out how to safely handle things like
4532 // int foo(int x) { return 1 << (x & 255); }
4533 // int bar() { return foo(256); }
4534 case ISD::SRA_PARTS:
4535 case ISD::SRL_PARTS:
4536 case ISD::SHL_PARTS:
4537 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
4538 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
4539 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4540 else if (N3.getOpcode() == ISD::AND)
4541 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
4542 // If the and is only masking out bits that cannot effect the shift,
4543 // eliminate the and.
4544 unsigned NumBits = VT.getScalarType().getSizeInBits()*2;
4545 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
4546 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4552 // Memoize the node unless it returns a flag.
4554 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
4555 FoldingSetNodeID ID;
4556 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4558 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4559 return SDValue(E, 0);
4562 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4563 } else if (NumOps == 2) {
4564 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4565 } else if (NumOps == 3) {
4566 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4569 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4571 CSEMap.InsertNode(N, IP);
4574 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4575 } else if (NumOps == 2) {
4576 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4577 } else if (NumOps == 3) {
4578 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4581 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4584 AllNodes.push_back(N);
4588 return SDValue(N, 0);
4591 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) {
4592 return getNode(Opcode, DL, VTList, 0, 0);
4595 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4597 SDValue Ops[] = { N1 };
4598 return getNode(Opcode, DL, VTList, Ops, 1);
4601 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4602 SDValue N1, SDValue N2) {
4603 SDValue Ops[] = { N1, N2 };
4604 return getNode(Opcode, DL, VTList, Ops, 2);
4607 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4608 SDValue N1, SDValue N2, SDValue N3) {
4609 SDValue Ops[] = { N1, N2, N3 };
4610 return getNode(Opcode, DL, VTList, Ops, 3);
4613 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4614 SDValue N1, SDValue N2, SDValue N3,
4616 SDValue Ops[] = { N1, N2, N3, N4 };
4617 return getNode(Opcode, DL, VTList, Ops, 4);
4620 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4621 SDValue N1, SDValue N2, SDValue N3,
4622 SDValue N4, SDValue N5) {
4623 SDValue Ops[] = { N1, N2, N3, N4, N5 };
4624 return getNode(Opcode, DL, VTList, Ops, 5);
4627 SDVTList SelectionDAG::getVTList(EVT VT) {
4628 return makeVTList(SDNode::getValueTypeList(VT), 1);
4631 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
4632 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4633 E = VTList.rend(); I != E; ++I)
4634 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
4637 EVT *Array = Allocator.Allocate<EVT>(2);
4640 SDVTList Result = makeVTList(Array, 2);
4641 VTList.push_back(Result);
4645 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
4646 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4647 E = VTList.rend(); I != E; ++I)
4648 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4652 EVT *Array = Allocator.Allocate<EVT>(3);
4656 SDVTList Result = makeVTList(Array, 3);
4657 VTList.push_back(Result);
4661 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
4662 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4663 E = VTList.rend(); I != E; ++I)
4664 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4665 I->VTs[2] == VT3 && I->VTs[3] == VT4)
4668 EVT *Array = Allocator.Allocate<EVT>(4);
4673 SDVTList Result = makeVTList(Array, 4);
4674 VTList.push_back(Result);
4678 SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) {
4680 case 0: llvm_unreachable("Cannot have nodes without results!");
4681 case 1: return getVTList(VTs[0]);
4682 case 2: return getVTList(VTs[0], VTs[1]);
4683 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
4684 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]);
4688 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4689 E = VTList.rend(); I != E; ++I) {
4690 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
4693 bool NoMatch = false;
4694 for (unsigned i = 2; i != NumVTs; ++i)
4695 if (VTs[i] != I->VTs[i]) {
4703 EVT *Array = Allocator.Allocate<EVT>(NumVTs);
4704 std::copy(VTs, VTs+NumVTs, Array);
4705 SDVTList Result = makeVTList(Array, NumVTs);
4706 VTList.push_back(Result);
4711 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
4712 /// specified operands. If the resultant node already exists in the DAG,
4713 /// this does not modify the specified node, instead it returns the node that
4714 /// already exists. If the resultant node does not exist in the DAG, the
4715 /// input node is returned. As a degenerate case, if you specify the same
4716 /// input operands as the node already has, the input node is returned.
4717 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) {
4718 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
4720 // Check to see if there is no change.
4721 if (Op == N->getOperand(0)) return N;
4723 // See if the modified node already exists.
4724 void *InsertPos = 0;
4725 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
4728 // Nope it doesn't. Remove the node from its current place in the maps.
4730 if (!RemoveNodeFromCSEMaps(N))
4733 // Now we update the operands.
4734 N->OperandList[0].set(Op);
4736 // If this gets put into a CSE map, add it.
4737 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4741 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) {
4742 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
4744 // Check to see if there is no change.
4745 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
4746 return N; // No operands changed, just return the input node.
4748 // See if the modified node already exists.
4749 void *InsertPos = 0;
4750 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
4753 // Nope it doesn't. Remove the node from its current place in the maps.
4755 if (!RemoveNodeFromCSEMaps(N))
4758 // Now we update the operands.
4759 if (N->OperandList[0] != Op1)
4760 N->OperandList[0].set(Op1);
4761 if (N->OperandList[1] != Op2)
4762 N->OperandList[1].set(Op2);
4764 // If this gets put into a CSE map, add it.
4765 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4769 SDNode *SelectionDAG::
4770 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) {
4771 SDValue Ops[] = { Op1, Op2, Op3 };
4772 return UpdateNodeOperands(N, Ops, 3);
4775 SDNode *SelectionDAG::
4776 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
4777 SDValue Op3, SDValue Op4) {
4778 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
4779 return UpdateNodeOperands(N, Ops, 4);
4782 SDNode *SelectionDAG::
4783 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
4784 SDValue Op3, SDValue Op4, SDValue Op5) {
4785 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
4786 return UpdateNodeOperands(N, Ops, 5);
4789 SDNode *SelectionDAG::
4790 UpdateNodeOperands(SDNode *N, const SDValue *Ops, unsigned NumOps) {
4791 assert(N->getNumOperands() == NumOps &&
4792 "Update with wrong number of operands");
4794 // Check to see if there is no change.
4795 bool AnyChange = false;
4796 for (unsigned i = 0; i != NumOps; ++i) {
4797 if (Ops[i] != N->getOperand(i)) {
4803 // No operands changed, just return the input node.
4804 if (!AnyChange) return N;
4806 // See if the modified node already exists.
4807 void *InsertPos = 0;
4808 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
4811 // Nope it doesn't. Remove the node from its current place in the maps.
4813 if (!RemoveNodeFromCSEMaps(N))
4816 // Now we update the operands.
4817 for (unsigned i = 0; i != NumOps; ++i)
4818 if (N->OperandList[i] != Ops[i])
4819 N->OperandList[i].set(Ops[i]);
4821 // If this gets put into a CSE map, add it.
4822 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4826 /// DropOperands - Release the operands and set this node to have
4828 void SDNode::DropOperands() {
4829 // Unlike the code in MorphNodeTo that does this, we don't need to
4830 // watch for dead nodes here.
4831 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
4837 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
4840 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4842 SDVTList VTs = getVTList(VT);
4843 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
4846 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4847 EVT VT, SDValue Op1) {
4848 SDVTList VTs = getVTList(VT);
4849 SDValue Ops[] = { Op1 };
4850 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4853 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4854 EVT VT, SDValue Op1,
4856 SDVTList VTs = getVTList(VT);
4857 SDValue Ops[] = { Op1, Op2 };
4858 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4861 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4862 EVT VT, SDValue Op1,
4863 SDValue Op2, SDValue Op3) {
4864 SDVTList VTs = getVTList(VT);
4865 SDValue Ops[] = { Op1, Op2, Op3 };
4866 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4869 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4870 EVT VT, const SDValue *Ops,
4872 SDVTList VTs = getVTList(VT);
4873 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4876 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4877 EVT VT1, EVT VT2, const SDValue *Ops,
4879 SDVTList VTs = getVTList(VT1, VT2);
4880 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4883 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4885 SDVTList VTs = getVTList(VT1, VT2);
4886 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
4889 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4890 EVT VT1, EVT VT2, EVT VT3,
4891 const SDValue *Ops, unsigned NumOps) {
4892 SDVTList VTs = getVTList(VT1, VT2, VT3);
4893 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4896 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4897 EVT VT1, EVT VT2, EVT VT3, EVT VT4,
4898 const SDValue *Ops, unsigned NumOps) {
4899 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4900 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4903 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4906 SDVTList VTs = getVTList(VT1, VT2);
4907 SDValue Ops[] = { Op1 };
4908 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4911 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4913 SDValue Op1, SDValue Op2) {
4914 SDVTList VTs = getVTList(VT1, VT2);
4915 SDValue Ops[] = { Op1, Op2 };
4916 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4919 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4921 SDValue Op1, SDValue Op2,
4923 SDVTList VTs = getVTList(VT1, VT2);
4924 SDValue Ops[] = { Op1, Op2, Op3 };
4925 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4928 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4929 EVT VT1, EVT VT2, EVT VT3,
4930 SDValue Op1, SDValue Op2,
4932 SDVTList VTs = getVTList(VT1, VT2, VT3);
4933 SDValue Ops[] = { Op1, Op2, Op3 };
4934 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4937 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4938 SDVTList VTs, const SDValue *Ops,
4940 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
4941 // Reset the NodeID to -1.
4946 /// UpdadeDebugLocOnMergedSDNode - If the opt level is -O0 then it throws away
4947 /// the line number information on the merged node since it is not possible to
4948 /// preserve the information that operation is associated with multiple lines.
4949 /// This will make the debugger working better at -O0, were there is a higher
4950 /// probability having other instructions associated with that line.
4952 SDNode *SelectionDAG::UpdadeDebugLocOnMergedSDNode(SDNode *N, DebugLoc OLoc) {
4953 DebugLoc NLoc = N->getDebugLoc();
4954 if (!(NLoc.isUnknown()) && (OptLevel == CodeGenOpt::None) && (OLoc != NLoc)) {
4955 N->setDebugLoc(DebugLoc());
4960 /// MorphNodeTo - This *mutates* the specified node to have the specified
4961 /// return type, opcode, and operands.
4963 /// Note that MorphNodeTo returns the resultant node. If there is already a
4964 /// node of the specified opcode and operands, it returns that node instead of
4965 /// the current one. Note that the DebugLoc need not be the same.
4967 /// Using MorphNodeTo is faster than creating a new node and swapping it in
4968 /// with ReplaceAllUsesWith both because it often avoids allocating a new
4969 /// node, and because it doesn't require CSE recalculation for any of
4970 /// the node's users.
4972 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4973 SDVTList VTs, const SDValue *Ops,
4975 // If an identical node already exists, use it.
4977 if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) {
4978 FoldingSetNodeID ID;
4979 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
4980 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
4981 return UpdadeDebugLocOnMergedSDNode(ON, N->getDebugLoc());
4984 if (!RemoveNodeFromCSEMaps(N))
4987 // Start the morphing.
4989 N->ValueList = VTs.VTs;
4990 N->NumValues = VTs.NumVTs;
4992 // Clear the operands list, updating used nodes to remove this from their
4993 // use list. Keep track of any operands that become dead as a result.
4994 SmallPtrSet<SDNode*, 16> DeadNodeSet;
4995 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
4997 SDNode *Used = Use.getNode();
4999 if (Used->use_empty())
5000 DeadNodeSet.insert(Used);
5003 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) {
5004 // Initialize the memory references information.
5005 MN->setMemRefs(0, 0);
5006 // If NumOps is larger than the # of operands we can have in a
5007 // MachineSDNode, reallocate the operand list.
5008 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) {
5009 if (MN->OperandsNeedDelete)
5010 delete[] MN->OperandList;
5011 if (NumOps > array_lengthof(MN->LocalOperands))
5012 // We're creating a final node that will live unmorphed for the
5013 // remainder of the current SelectionDAG iteration, so we can allocate
5014 // the operands directly out of a pool with no recycling metadata.
5015 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
5018 MN->InitOperands(MN->LocalOperands, Ops, NumOps);
5019 MN->OperandsNeedDelete = false;
5021 MN->InitOperands(MN->OperandList, Ops, NumOps);
5023 // If NumOps is larger than the # of operands we currently have, reallocate
5024 // the operand list.
5025 if (NumOps > N->NumOperands) {
5026 if (N->OperandsNeedDelete)
5027 delete[] N->OperandList;
5028 N->InitOperands(new SDUse[NumOps], Ops, NumOps);
5029 N->OperandsNeedDelete = true;
5031 N->InitOperands(N->OperandList, Ops, NumOps);
5034 // Delete any nodes that are still dead after adding the uses for the
5036 if (!DeadNodeSet.empty()) {
5037 SmallVector<SDNode *, 16> DeadNodes;
5038 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
5039 E = DeadNodeSet.end(); I != E; ++I)
5040 if ((*I)->use_empty())
5041 DeadNodes.push_back(*I);
5042 RemoveDeadNodes(DeadNodes);
5046 CSEMap.InsertNode(N, IP); // Memoize the new node.
5051 /// getMachineNode - These are used for target selectors to create a new node
5052 /// with specified return type(s), MachineInstr opcode, and operands.
5054 /// Note that getMachineNode returns the resultant node. If there is already a
5055 /// node of the specified opcode and operands, it returns that node instead of
5056 /// the current one.
5058 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) {
5059 SDVTList VTs = getVTList(VT);
5060 return getMachineNode(Opcode, dl, VTs, 0, 0);
5064 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) {
5065 SDVTList VTs = getVTList(VT);
5066 SDValue Ops[] = { Op1 };
5067 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5071 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
5072 SDValue Op1, SDValue Op2) {
5073 SDVTList VTs = getVTList(VT);
5074 SDValue Ops[] = { Op1, Op2 };
5075 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5079 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
5080 SDValue Op1, SDValue Op2, SDValue Op3) {
5081 SDVTList VTs = getVTList(VT);
5082 SDValue Ops[] = { Op1, Op2, Op3 };
5083 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5087 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
5088 const SDValue *Ops, unsigned NumOps) {
5089 SDVTList VTs = getVTList(VT);
5090 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5094 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) {
5095 SDVTList VTs = getVTList(VT1, VT2);
5096 return getMachineNode(Opcode, dl, VTs, 0, 0);
5100 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5101 EVT VT1, EVT VT2, SDValue Op1) {
5102 SDVTList VTs = getVTList(VT1, VT2);
5103 SDValue Ops[] = { Op1 };
5104 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5108 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5109 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) {
5110 SDVTList VTs = getVTList(VT1, VT2);
5111 SDValue Ops[] = { Op1, Op2 };
5112 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5116 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5117 EVT VT1, EVT VT2, SDValue Op1,
5118 SDValue Op2, SDValue Op3) {
5119 SDVTList VTs = getVTList(VT1, VT2);
5120 SDValue Ops[] = { Op1, Op2, Op3 };
5121 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5125 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5127 const SDValue *Ops, unsigned NumOps) {
5128 SDVTList VTs = getVTList(VT1, VT2);
5129 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5133 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5134 EVT VT1, EVT VT2, EVT VT3,
5135 SDValue Op1, SDValue Op2) {
5136 SDVTList VTs = getVTList(VT1, VT2, VT3);
5137 SDValue Ops[] = { Op1, Op2 };
5138 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5142 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5143 EVT VT1, EVT VT2, EVT VT3,
5144 SDValue Op1, SDValue Op2, SDValue Op3) {
5145 SDVTList VTs = getVTList(VT1, VT2, VT3);
5146 SDValue Ops[] = { Op1, Op2, Op3 };
5147 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5151 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5152 EVT VT1, EVT VT2, EVT VT3,
5153 const SDValue *Ops, unsigned NumOps) {
5154 SDVTList VTs = getVTList(VT1, VT2, VT3);
5155 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5159 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1,
5160 EVT VT2, EVT VT3, EVT VT4,
5161 const SDValue *Ops, unsigned NumOps) {
5162 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
5163 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5167 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5168 const std::vector<EVT> &ResultTys,
5169 const SDValue *Ops, unsigned NumOps) {
5170 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size());
5171 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5175 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs,
5176 const SDValue *Ops, unsigned NumOps) {
5177 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue;
5182 FoldingSetNodeID ID;
5183 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps);
5185 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
5186 return cast<MachineSDNode>(UpdadeDebugLocOnMergedSDNode(E, DL));
5190 // Allocate a new MachineSDNode.
5191 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs);
5193 // Initialize the operands list.
5194 if (NumOps > array_lengthof(N->LocalOperands))
5195 // We're creating a final node that will live unmorphed for the
5196 // remainder of the current SelectionDAG iteration, so we can allocate
5197 // the operands directly out of a pool with no recycling metadata.
5198 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
5201 N->InitOperands(N->LocalOperands, Ops, NumOps);
5202 N->OperandsNeedDelete = false;
5205 CSEMap.InsertNode(N, IP);
5207 AllNodes.push_back(N);
5209 VerifyMachineNode(N);
5214 /// getTargetExtractSubreg - A convenience function for creating
5215 /// TargetOpcode::EXTRACT_SUBREG nodes.
5217 SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT,
5219 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
5220 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL,
5221 VT, Operand, SRIdxVal);
5222 return SDValue(Subreg, 0);
5225 /// getTargetInsertSubreg - A convenience function for creating
5226 /// TargetOpcode::INSERT_SUBREG nodes.
5228 SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT,
5229 SDValue Operand, SDValue Subreg) {
5230 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
5231 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL,
5232 VT, Operand, Subreg, SRIdxVal);
5233 return SDValue(Result, 0);
5236 /// getNodeIfExists - Get the specified node if it's already available, or
5237 /// else return NULL.
5238 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
5239 const SDValue *Ops, unsigned NumOps) {
5240 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
5241 FoldingSetNodeID ID;
5242 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
5244 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
5250 /// getDbgValue - Creates a SDDbgValue node.
5253 SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off,
5254 DebugLoc DL, unsigned O) {
5255 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O);
5259 SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off,
5260 DebugLoc DL, unsigned O) {
5261 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O);
5265 SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off,
5266 DebugLoc DL, unsigned O) {
5267 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O);
5272 /// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node
5273 /// pointed to by a use iterator is deleted, increment the use iterator
5274 /// so that it doesn't dangle.
5276 /// This class also manages a "downlink" DAGUpdateListener, to forward
5277 /// messages to ReplaceAllUsesWith's callers.
5279 class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener {
5280 SelectionDAG::DAGUpdateListener *DownLink;
5281 SDNode::use_iterator &UI;
5282 SDNode::use_iterator &UE;
5284 virtual void NodeDeleted(SDNode *N, SDNode *E) {
5285 // Increment the iterator as needed.
5286 while (UI != UE && N == *UI)
5289 // Then forward the message.
5290 if (DownLink) DownLink->NodeDeleted(N, E);
5293 virtual void NodeUpdated(SDNode *N) {
5294 // Just forward the message.
5295 if (DownLink) DownLink->NodeUpdated(N);
5299 RAUWUpdateListener(SelectionDAG::DAGUpdateListener *dl,
5300 SDNode::use_iterator &ui,
5301 SDNode::use_iterator &ue)
5302 : DownLink(dl), UI(ui), UE(ue) {}
5307 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5308 /// This can cause recursive merging of nodes in the DAG.
5310 /// This version assumes From has a single result value.
5312 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To,
5313 DAGUpdateListener *UpdateListener) {
5314 SDNode *From = FromN.getNode();
5315 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
5316 "Cannot replace with this method!");
5317 assert(From != To.getNode() && "Cannot replace uses of with self");
5319 // Iterate over all the existing uses of From. New uses will be added
5320 // to the beginning of the use list, which we avoid visiting.
5321 // This specifically avoids visiting uses of From that arise while the
5322 // replacement is happening, because any such uses would be the result
5323 // of CSE: If an existing node looks like From after one of its operands
5324 // is replaced by To, we don't want to replace of all its users with To
5325 // too. See PR3018 for more info.
5326 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5327 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5331 // This node is about to morph, remove its old self from the CSE maps.
5332 RemoveNodeFromCSEMaps(User);
5334 // A user can appear in a use list multiple times, and when this
5335 // happens the uses are usually next to each other in the list.
5336 // To help reduce the number of CSE recomputations, process all
5337 // the uses of this user that we can find this way.
5339 SDUse &Use = UI.getUse();
5342 } while (UI != UE && *UI == User);
5344 // Now that we have modified User, add it back to the CSE maps. If it
5345 // already exists there, recursively merge the results together.
5346 AddModifiedNodeToCSEMaps(User, &Listener);
5349 // If we just RAUW'd the root, take note.
5350 if (FromN == getRoot())
5354 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5355 /// This can cause recursive merging of nodes in the DAG.
5357 /// This version assumes that for each value of From, there is a
5358 /// corresponding value in To in the same position with the same type.
5360 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To,
5361 DAGUpdateListener *UpdateListener) {
5363 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
5364 assert((!From->hasAnyUseOfValue(i) ||
5365 From->getValueType(i) == To->getValueType(i)) &&
5366 "Cannot use this version of ReplaceAllUsesWith!");
5369 // Handle the trivial case.
5373 // Iterate over just the existing users of From. See the comments in
5374 // the ReplaceAllUsesWith above.
5375 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5376 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5380 // This node is about to morph, remove its old self from the CSE maps.
5381 RemoveNodeFromCSEMaps(User);
5383 // A user can appear in a use list multiple times, and when this
5384 // happens the uses are usually next to each other in the list.
5385 // To help reduce the number of CSE recomputations, process all
5386 // the uses of this user that we can find this way.
5388 SDUse &Use = UI.getUse();
5391 } while (UI != UE && *UI == User);
5393 // Now that we have modified User, add it back to the CSE maps. If it
5394 // already exists there, recursively merge the results together.
5395 AddModifiedNodeToCSEMaps(User, &Listener);
5398 // If we just RAUW'd the root, take note.
5399 if (From == getRoot().getNode())
5400 setRoot(SDValue(To, getRoot().getResNo()));
5403 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5404 /// This can cause recursive merging of nodes in the DAG.
5406 /// This version can replace From with any result values. To must match the
5407 /// number and types of values returned by From.
5408 void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
5410 DAGUpdateListener *UpdateListener) {
5411 if (From->getNumValues() == 1) // Handle the simple case efficiently.
5412 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener);
5414 // Iterate over just the existing users of From. See the comments in
5415 // the ReplaceAllUsesWith above.
5416 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5417 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5421 // This node is about to morph, remove its old self from the CSE maps.
5422 RemoveNodeFromCSEMaps(User);
5424 // A user can appear in a use list multiple times, and when this
5425 // happens the uses are usually next to each other in the list.
5426 // To help reduce the number of CSE recomputations, process all
5427 // the uses of this user that we can find this way.
5429 SDUse &Use = UI.getUse();
5430 const SDValue &ToOp = To[Use.getResNo()];
5433 } while (UI != UE && *UI == User);
5435 // Now that we have modified User, add it back to the CSE maps. If it
5436 // already exists there, recursively merge the results together.
5437 AddModifiedNodeToCSEMaps(User, &Listener);
5440 // If we just RAUW'd the root, take note.
5441 if (From == getRoot().getNode())
5442 setRoot(SDValue(To[getRoot().getResNo()]));
5445 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
5446 /// uses of other values produced by From.getNode() alone. The Deleted
5447 /// vector is handled the same way as for ReplaceAllUsesWith.
5448 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To,
5449 DAGUpdateListener *UpdateListener){
5450 // Handle the really simple, really trivial case efficiently.
5451 if (From == To) return;
5453 // Handle the simple, trivial, case efficiently.
5454 if (From.getNode()->getNumValues() == 1) {
5455 ReplaceAllUsesWith(From, To, UpdateListener);
5459 // Iterate over just the existing users of From. See the comments in
5460 // the ReplaceAllUsesWith above.
5461 SDNode::use_iterator UI = From.getNode()->use_begin(),
5462 UE = From.getNode()->use_end();
5463 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5466 bool UserRemovedFromCSEMaps = false;
5468 // A user can appear in a use list multiple times, and when this
5469 // happens the uses are usually next to each other in the list.
5470 // To help reduce the number of CSE recomputations, process all
5471 // the uses of this user that we can find this way.
5473 SDUse &Use = UI.getUse();
5475 // Skip uses of different values from the same node.
5476 if (Use.getResNo() != From.getResNo()) {
5481 // If this node hasn't been modified yet, it's still in the CSE maps,
5482 // so remove its old self from the CSE maps.
5483 if (!UserRemovedFromCSEMaps) {
5484 RemoveNodeFromCSEMaps(User);
5485 UserRemovedFromCSEMaps = true;
5490 } while (UI != UE && *UI == User);
5492 // We are iterating over all uses of the From node, so if a use
5493 // doesn't use the specific value, no changes are made.
5494 if (!UserRemovedFromCSEMaps)
5497 // Now that we have modified User, add it back to the CSE maps. If it
5498 // already exists there, recursively merge the results together.
5499 AddModifiedNodeToCSEMaps(User, &Listener);
5502 // If we just RAUW'd the root, take note.
5503 if (From == getRoot())
5508 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
5509 /// to record information about a use.
5516 /// operator< - Sort Memos by User.
5517 bool operator<(const UseMemo &L, const UseMemo &R) {
5518 return (intptr_t)L.User < (intptr_t)R.User;
5522 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
5523 /// uses of other values produced by From.getNode() alone. The same value
5524 /// may appear in both the From and To list. The Deleted vector is
5525 /// handled the same way as for ReplaceAllUsesWith.
5526 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
5529 DAGUpdateListener *UpdateListener){
5530 // Handle the simple, trivial case efficiently.
5532 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener);
5534 // Read up all the uses and make records of them. This helps
5535 // processing new uses that are introduced during the
5536 // replacement process.
5537 SmallVector<UseMemo, 4> Uses;
5538 for (unsigned i = 0; i != Num; ++i) {
5539 unsigned FromResNo = From[i].getResNo();
5540 SDNode *FromNode = From[i].getNode();
5541 for (SDNode::use_iterator UI = FromNode->use_begin(),
5542 E = FromNode->use_end(); UI != E; ++UI) {
5543 SDUse &Use = UI.getUse();
5544 if (Use.getResNo() == FromResNo) {
5545 UseMemo Memo = { *UI, i, &Use };
5546 Uses.push_back(Memo);
5551 // Sort the uses, so that all the uses from a given User are together.
5552 std::sort(Uses.begin(), Uses.end());
5554 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
5555 UseIndex != UseIndexEnd; ) {
5556 // We know that this user uses some value of From. If it is the right
5557 // value, update it.
5558 SDNode *User = Uses[UseIndex].User;
5560 // This node is about to morph, remove its old self from the CSE maps.
5561 RemoveNodeFromCSEMaps(User);
5563 // The Uses array is sorted, so all the uses for a given User
5564 // are next to each other in the list.
5565 // To help reduce the number of CSE recomputations, process all
5566 // the uses of this user that we can find this way.
5568 unsigned i = Uses[UseIndex].Index;
5569 SDUse &Use = *Uses[UseIndex].Use;
5573 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
5575 // Now that we have modified User, add it back to the CSE maps. If it
5576 // already exists there, recursively merge the results together.
5577 AddModifiedNodeToCSEMaps(User, UpdateListener);
5581 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
5582 /// based on their topological order. It returns the maximum id and a vector
5583 /// of the SDNodes* in assigned order by reference.
5584 unsigned SelectionDAG::AssignTopologicalOrder() {
5586 unsigned DAGSize = 0;
5588 // SortedPos tracks the progress of the algorithm. Nodes before it are
5589 // sorted, nodes after it are unsorted. When the algorithm completes
5590 // it is at the end of the list.
5591 allnodes_iterator SortedPos = allnodes_begin();
5593 // Visit all the nodes. Move nodes with no operands to the front of
5594 // the list immediately. Annotate nodes that do have operands with their
5595 // operand count. Before we do this, the Node Id fields of the nodes
5596 // may contain arbitrary values. After, the Node Id fields for nodes
5597 // before SortedPos will contain the topological sort index, and the
5598 // Node Id fields for nodes At SortedPos and after will contain the
5599 // count of outstanding operands.
5600 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
5603 unsigned Degree = N->getNumOperands();
5605 // A node with no uses, add it to the result array immediately.
5606 N->setNodeId(DAGSize++);
5607 allnodes_iterator Q = N;
5609 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
5610 assert(SortedPos != AllNodes.end() && "Overran node list");
5613 // Temporarily use the Node Id as scratch space for the degree count.
5614 N->setNodeId(Degree);
5618 // Visit all the nodes. As we iterate, moves nodes into sorted order,
5619 // such that by the time the end is reached all nodes will be sorted.
5620 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
5623 // N is in sorted position, so all its uses have one less operand
5624 // that needs to be sorted.
5625 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
5628 unsigned Degree = P->getNodeId();
5629 assert(Degree != 0 && "Invalid node degree");
5632 // All of P's operands are sorted, so P may sorted now.
5633 P->setNodeId(DAGSize++);
5635 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
5636 assert(SortedPos != AllNodes.end() && "Overran node list");
5639 // Update P's outstanding operand count.
5640 P->setNodeId(Degree);
5643 if (I == SortedPos) {
5646 dbgs() << "Overran sorted position:\n";
5649 llvm_unreachable(0);
5653 assert(SortedPos == AllNodes.end() &&
5654 "Topological sort incomplete!");
5655 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
5656 "First node in topological sort is not the entry token!");
5657 assert(AllNodes.front().getNodeId() == 0 &&
5658 "First node in topological sort has non-zero id!");
5659 assert(AllNodes.front().getNumOperands() == 0 &&
5660 "First node in topological sort has operands!");
5661 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
5662 "Last node in topologic sort has unexpected id!");
5663 assert(AllNodes.back().use_empty() &&
5664 "Last node in topologic sort has users!");
5665 assert(DAGSize == allnodes_size() && "Node count mismatch!");
5669 /// AssignOrdering - Assign an order to the SDNode.
5670 void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) {
5671 assert(SD && "Trying to assign an order to a null node!");
5672 Ordering->add(SD, Order);
5675 /// GetOrdering - Get the order for the SDNode.
5676 unsigned SelectionDAG::GetOrdering(const SDNode *SD) const {
5677 assert(SD && "Trying to get the order of a null node!");
5678 return Ordering->getOrder(SD);
5681 /// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the
5682 /// value is produced by SD.
5683 void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) {
5684 DbgInfo->add(DB, SD, isParameter);
5686 SD->setHasDebugValue(true);
5689 /// TransferDbgValues - Transfer SDDbgValues.
5690 void SelectionDAG::TransferDbgValues(SDValue From, SDValue To) {
5691 if (From == To || !From.getNode()->getHasDebugValue())
5693 SDNode *FromNode = From.getNode();
5694 SDNode *ToNode = To.getNode();
5695 ArrayRef<SDDbgValue *> DVs = GetDbgValues(FromNode);
5696 SmallVector<SDDbgValue *, 2> ClonedDVs;
5697 for (ArrayRef<SDDbgValue *>::iterator I = DVs.begin(), E = DVs.end();
5699 SDDbgValue *Dbg = *I;
5700 if (Dbg->getKind() == SDDbgValue::SDNODE) {
5701 SDDbgValue *Clone = getDbgValue(Dbg->getMDPtr(), ToNode, To.getResNo(),
5702 Dbg->getOffset(), Dbg->getDebugLoc(),
5704 ClonedDVs.push_back(Clone);
5707 for (SmallVector<SDDbgValue *, 2>::iterator I = ClonedDVs.begin(),
5708 E = ClonedDVs.end(); I != E; ++I)
5709 AddDbgValue(*I, ToNode, false);
5712 //===----------------------------------------------------------------------===//
5714 //===----------------------------------------------------------------------===//
5716 HandleSDNode::~HandleSDNode() {
5720 GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, DebugLoc DL,
5721 const GlobalValue *GA,
5722 EVT VT, int64_t o, unsigned char TF)
5723 : SDNode(Opc, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) {
5727 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt,
5728 MachineMemOperand *mmo)
5729 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) {
5730 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5731 MMO->isNonTemporal(), MMO->isInvariant());
5732 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5733 assert(isNonTemporal() == MMO->isNonTemporal() &&
5734 "Non-temporal encoding error!");
5735 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5738 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs,
5739 const SDValue *Ops, unsigned NumOps, EVT memvt,
5740 MachineMemOperand *mmo)
5741 : SDNode(Opc, dl, VTs, Ops, NumOps),
5742 MemoryVT(memvt), MMO(mmo) {
5743 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5744 MMO->isNonTemporal(), MMO->isInvariant());
5745 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5746 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5749 /// Profile - Gather unique data for the node.
5751 void SDNode::Profile(FoldingSetNodeID &ID) const {
5752 AddNodeIDNode(ID, this);
5757 std::vector<EVT> VTs;
5760 VTs.reserve(MVT::LAST_VALUETYPE);
5761 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i)
5762 VTs.push_back(MVT((MVT::SimpleValueType)i));
5767 static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs;
5768 static ManagedStatic<EVTArray> SimpleVTArray;
5769 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
5771 /// getValueTypeList - Return a pointer to the specified value type.
5773 const EVT *SDNode::getValueTypeList(EVT VT) {
5774 if (VT.isExtended()) {
5775 sys::SmartScopedLock<true> Lock(*VTMutex);
5776 return &(*EVTs->insert(VT).first);
5778 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE &&
5779 "Value type out of range!");
5780 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy];
5784 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
5785 /// indicated value. This method ignores uses of other values defined by this
5787 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
5788 assert(Value < getNumValues() && "Bad value!");
5790 // TODO: Only iterate over uses of a given value of the node
5791 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
5792 if (UI.getUse().getResNo() == Value) {
5799 // Found exactly the right number of uses?
5804 /// hasAnyUseOfValue - Return true if there are any use of the indicated
5805 /// value. This method ignores uses of other values defined by this operation.
5806 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
5807 assert(Value < getNumValues() && "Bad value!");
5809 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
5810 if (UI.getUse().getResNo() == Value)
5817 /// isOnlyUserOf - Return true if this node is the only use of N.
5819 bool SDNode::isOnlyUserOf(SDNode *N) const {
5821 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
5832 /// isOperand - Return true if this node is an operand of N.
5834 bool SDValue::isOperandOf(SDNode *N) const {
5835 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5836 if (*this == N->getOperand(i))
5841 bool SDNode::isOperandOf(SDNode *N) const {
5842 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
5843 if (this == N->OperandList[i].getNode())
5848 /// reachesChainWithoutSideEffects - Return true if this operand (which must
5849 /// be a chain) reaches the specified operand without crossing any
5850 /// side-effecting instructions on any chain path. In practice, this looks
5851 /// through token factors and non-volatile loads. In order to remain efficient,
5852 /// this only looks a couple of nodes in, it does not do an exhaustive search.
5853 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
5854 unsigned Depth) const {
5855 if (*this == Dest) return true;
5857 // Don't search too deeply, we just want to be able to see through
5858 // TokenFactor's etc.
5859 if (Depth == 0) return false;
5861 // If this is a token factor, all inputs to the TF happen in parallel. If any
5862 // of the operands of the TF does not reach dest, then we cannot do the xform.
5863 if (getOpcode() == ISD::TokenFactor) {
5864 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
5865 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
5870 // Loads don't have side effects, look through them.
5871 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
5872 if (!Ld->isVolatile())
5873 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
5878 /// hasPredecessor - Return true if N is a predecessor of this node.
5879 /// N is either an operand of this node, or can be reached by recursively
5880 /// traversing up the operands.
5881 /// NOTE: This is an expensive method. Use it carefully.
5882 bool SDNode::hasPredecessor(const SDNode *N) const {
5883 SmallPtrSet<const SDNode *, 32> Visited;
5884 SmallVector<const SDNode *, 16> Worklist;
5885 return hasPredecessorHelper(N, Visited, Worklist);
5888 bool SDNode::hasPredecessorHelper(const SDNode *N,
5889 SmallPtrSet<const SDNode *, 32> &Visited,
5890 SmallVector<const SDNode *, 16> &Worklist) const {
5891 if (Visited.empty()) {
5892 Worklist.push_back(this);
5894 // Take a look in the visited set. If we've already encountered this node
5895 // we needn't search further.
5896 if (Visited.count(N))
5900 // Haven't visited N yet. Continue the search.
5901 while (!Worklist.empty()) {
5902 const SDNode *M = Worklist.pop_back_val();
5903 for (unsigned i = 0, e = M->getNumOperands(); i != e; ++i) {
5904 SDNode *Op = M->getOperand(i).getNode();
5905 if (Visited.insert(Op))
5906 Worklist.push_back(Op);
5915 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
5916 assert(Num < NumOperands && "Invalid child # of SDNode!");
5917 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
5920 SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
5921 assert(N->getNumValues() == 1 &&
5922 "Can't unroll a vector with multiple results!");
5924 EVT VT = N->getValueType(0);
5925 unsigned NE = VT.getVectorNumElements();
5926 EVT EltVT = VT.getVectorElementType();
5927 DebugLoc dl = N->getDebugLoc();
5929 SmallVector<SDValue, 8> Scalars;
5930 SmallVector<SDValue, 4> Operands(N->getNumOperands());
5932 // If ResNE is 0, fully unroll the vector op.
5935 else if (NE > ResNE)
5939 for (i= 0; i != NE; ++i) {
5940 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) {
5941 SDValue Operand = N->getOperand(j);
5942 EVT OperandVT = Operand.getValueType();
5943 if (OperandVT.isVector()) {
5944 // A vector operand; extract a single element.
5945 EVT OperandEltVT = OperandVT.getVectorElementType();
5946 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl,
5949 getConstant(i, TLI.getPointerTy()));
5951 // A scalar operand; just use it as is.
5952 Operands[j] = Operand;
5956 switch (N->getOpcode()) {
5958 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
5959 &Operands[0], Operands.size()));
5962 Scalars.push_back(getNode(ISD::SELECT, dl, EltVT,
5963 &Operands[0], Operands.size()));
5970 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0],
5971 getShiftAmountOperand(Operands[0].getValueType(),
5974 case ISD::SIGN_EXTEND_INREG:
5975 case ISD::FP_ROUND_INREG: {
5976 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType();
5977 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
5979 getValueType(ExtVT)));
5984 for (; i < ResNE; ++i)
5985 Scalars.push_back(getUNDEF(EltVT));
5987 return getNode(ISD::BUILD_VECTOR, dl,
5988 EVT::getVectorVT(*getContext(), EltVT, ResNE),
5989 &Scalars[0], Scalars.size());
5993 /// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a
5994 /// location that is 'Dist' units away from the location that the 'Base' load
5995 /// is loading from.
5996 bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base,
5997 unsigned Bytes, int Dist) const {
5998 if (LD->getChain() != Base->getChain())
6000 EVT VT = LD->getValueType(0);
6001 if (VT.getSizeInBits() / 8 != Bytes)
6004 SDValue Loc = LD->getOperand(1);
6005 SDValue BaseLoc = Base->getOperand(1);
6006 if (Loc.getOpcode() == ISD::FrameIndex) {
6007 if (BaseLoc.getOpcode() != ISD::FrameIndex)
6009 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo();
6010 int FI = cast<FrameIndexSDNode>(Loc)->getIndex();
6011 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex();
6012 int FS = MFI->getObjectSize(FI);
6013 int BFS = MFI->getObjectSize(BFI);
6014 if (FS != BFS || FS != (int)Bytes) return false;
6015 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes);
6019 if (isBaseWithConstantOffset(Loc) && Loc.getOperand(0) == BaseLoc &&
6020 cast<ConstantSDNode>(Loc.getOperand(1))->getSExtValue() == Dist*Bytes)
6023 const GlobalValue *GV1 = NULL;
6024 const GlobalValue *GV2 = NULL;
6025 int64_t Offset1 = 0;
6026 int64_t Offset2 = 0;
6027 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1);
6028 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2);
6029 if (isGA1 && isGA2 && GV1 == GV2)
6030 return Offset1 == (Offset2 + Dist*Bytes);
6035 /// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if
6036 /// it cannot be inferred.
6037 unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const {
6038 // If this is a GlobalAddress + cst, return the alignment.
6039 const GlobalValue *GV;
6040 int64_t GVOffset = 0;
6041 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) {
6042 unsigned PtrWidth = TLI.getPointerTy().getSizeInBits();
6043 APInt AllOnes = APInt::getAllOnesValue(PtrWidth);
6044 APInt KnownZero(PtrWidth, 0), KnownOne(PtrWidth, 0);
6045 llvm::ComputeMaskedBits(const_cast<GlobalValue*>(GV), AllOnes,
6046 KnownZero, KnownOne, TLI.getTargetData());
6047 unsigned AlignBits = KnownZero.countTrailingOnes();
6048 unsigned Align = AlignBits ? 1 << std::min(31U, AlignBits) : 0;
6050 return MinAlign(Align, GVOffset);
6053 // If this is a direct reference to a stack slot, use information about the
6054 // stack slot's alignment.
6055 int FrameIdx = 1 << 31;
6056 int64_t FrameOffset = 0;
6057 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) {
6058 FrameIdx = FI->getIndex();
6059 } else if (isBaseWithConstantOffset(Ptr) &&
6060 isa<FrameIndexSDNode>(Ptr.getOperand(0))) {
6062 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
6063 FrameOffset = Ptr.getConstantOperandVal(1);
6066 if (FrameIdx != (1 << 31)) {
6067 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo();
6068 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx),
6076 // getAddressSpace - Return the address space this GlobalAddress belongs to.
6077 unsigned GlobalAddressSDNode::getAddressSpace() const {
6078 return getGlobal()->getType()->getAddressSpace();
6082 Type *ConstantPoolSDNode::getType() const {
6083 if (isMachineConstantPoolEntry())
6084 return Val.MachineCPVal->getType();
6085 return Val.ConstVal->getType();
6088 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
6090 unsigned &SplatBitSize,
6092 unsigned MinSplatBits,
6094 EVT VT = getValueType(0);
6095 assert(VT.isVector() && "Expected a vector type");
6096 unsigned sz = VT.getSizeInBits();
6097 if (MinSplatBits > sz)
6100 SplatValue = APInt(sz, 0);
6101 SplatUndef = APInt(sz, 0);
6103 // Get the bits. Bits with undefined values (when the corresponding element
6104 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
6105 // in SplatValue. If any of the values are not constant, give up and return
6107 unsigned int nOps = getNumOperands();
6108 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
6109 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
6111 for (unsigned j = 0; j < nOps; ++j) {
6112 unsigned i = isBigEndian ? nOps-1-j : j;
6113 SDValue OpVal = getOperand(i);
6114 unsigned BitPos = j * EltBitSize;
6116 if (OpVal.getOpcode() == ISD::UNDEF)
6117 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize);
6118 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
6119 SplatValue |= CN->getAPIntValue().zextOrTrunc(EltBitSize).
6120 zextOrTrunc(sz) << BitPos;
6121 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
6122 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
6127 // The build_vector is all constants or undefs. Find the smallest element
6128 // size that splats the vector.
6130 HasAnyUndefs = (SplatUndef != 0);
6133 unsigned HalfSize = sz / 2;
6134 APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize);
6135 APInt LowValue = SplatValue.trunc(HalfSize);
6136 APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize);
6137 APInt LowUndef = SplatUndef.trunc(HalfSize);
6139 // If the two halves do not match (ignoring undef bits), stop here.
6140 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
6141 MinSplatBits > HalfSize)
6144 SplatValue = HighValue | LowValue;
6145 SplatUndef = HighUndef & LowUndef;
6154 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
6155 // Find the first non-undef value in the shuffle mask.
6157 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
6160 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
6162 // Make sure all remaining elements are either undef or the same as the first
6164 for (int Idx = Mask[i]; i != e; ++i)
6165 if (Mask[i] >= 0 && Mask[i] != Idx)
6171 static void checkForCyclesHelper(const SDNode *N,
6172 SmallPtrSet<const SDNode*, 32> &Visited,
6173 SmallPtrSet<const SDNode*, 32> &Checked) {
6174 // If this node has already been checked, don't check it again.
6175 if (Checked.count(N))
6178 // If a node has already been visited on this depth-first walk, reject it as
6180 if (!Visited.insert(N)) {
6181 dbgs() << "Offending node:\n";
6183 errs() << "Detected cycle in SelectionDAG\n";
6187 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6188 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked);
6195 void llvm::checkForCycles(const llvm::SDNode *N) {
6197 assert(N && "Checking nonexistant SDNode");
6198 SmallPtrSet<const SDNode*, 32> visited;
6199 SmallPtrSet<const SDNode*, 32> checked;
6200 checkForCyclesHelper(N, visited, checked);
6204 void llvm::checkForCycles(const llvm::SelectionDAG *DAG) {
6205 checkForCycles(DAG->getRoot().getNode());