1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "SDNodeDbgValue.h"
16 #include "llvm/ADT/SetVector.h"
17 #include "llvm/ADT/SmallPtrSet.h"
18 #include "llvm/ADT/SmallSet.h"
19 #include "llvm/ADT/SmallVector.h"
20 #include "llvm/ADT/StringExtras.h"
21 #include "llvm/Analysis/ValueTracking.h"
22 #include "llvm/CodeGen/MachineBasicBlock.h"
23 #include "llvm/CodeGen/MachineConstantPool.h"
24 #include "llvm/CodeGen/MachineFrameInfo.h"
25 #include "llvm/CodeGen/MachineModuleInfo.h"
26 #include "llvm/IR/CallingConv.h"
27 #include "llvm/IR/Constants.h"
28 #include "llvm/IR/DataLayout.h"
29 #include "llvm/IR/DebugInfo.h"
30 #include "llvm/IR/DerivedTypes.h"
31 #include "llvm/IR/Function.h"
32 #include "llvm/IR/GlobalAlias.h"
33 #include "llvm/IR/GlobalVariable.h"
34 #include "llvm/IR/Intrinsics.h"
35 #include "llvm/Support/CommandLine.h"
36 #include "llvm/Support/Debug.h"
37 #include "llvm/Support/ErrorHandling.h"
38 #include "llvm/Support/ManagedStatic.h"
39 #include "llvm/Support/MathExtras.h"
40 #include "llvm/Support/Mutex.h"
41 #include "llvm/Support/raw_ostream.h"
42 #include "llvm/Target/TargetInstrInfo.h"
43 #include "llvm/Target/TargetIntrinsicInfo.h"
44 #include "llvm/Target/TargetLowering.h"
45 #include "llvm/Target/TargetMachine.h"
46 #include "llvm/Target/TargetOptions.h"
47 #include "llvm/Target/TargetRegisterInfo.h"
48 #include "llvm/Target/TargetSelectionDAGInfo.h"
49 #include "llvm/Target/TargetSubtargetInfo.h"
56 /// makeVTList - Return an instance of the SDVTList struct initialized with the
57 /// specified members.
58 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
59 SDVTList Res = {VTs, NumVTs};
63 // Default null implementations of the callbacks.
64 void SelectionDAG::DAGUpdateListener::NodeDeleted(SDNode*, SDNode*) {}
65 void SelectionDAG::DAGUpdateListener::NodeUpdated(SDNode*) {}
67 //===----------------------------------------------------------------------===//
68 // ConstantFPSDNode Class
69 //===----------------------------------------------------------------------===//
71 /// isExactlyValue - We don't rely on operator== working on double values, as
72 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
73 /// As such, this method can be used to do an exact bit-for-bit comparison of
74 /// two floating point values.
75 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
76 return getValueAPF().bitwiseIsEqual(V);
79 bool ConstantFPSDNode::isValueValidForType(EVT VT,
81 assert(VT.isFloatingPoint() && "Can only convert between FP types");
83 // convert modifies in place, so make a copy.
84 APFloat Val2 = APFloat(Val);
86 (void) Val2.convert(SelectionDAG::EVTToAPFloatSemantics(VT),
87 APFloat::rmNearestTiesToEven,
92 //===----------------------------------------------------------------------===//
94 //===----------------------------------------------------------------------===//
96 /// isBuildVectorAllOnes - Return true if the specified node is a
97 /// BUILD_VECTOR where all of the elements are ~0 or undef.
98 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
99 // Look through a bit convert.
100 while (N->getOpcode() == ISD::BITCAST)
101 N = N->getOperand(0).getNode();
103 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
105 unsigned i = 0, e = N->getNumOperands();
107 // Skip over all of the undef values.
108 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
111 // Do not accept an all-undef vector.
112 if (i == e) return false;
114 // Do not accept build_vectors that aren't all constants or which have non-~0
115 // elements. We have to be a bit careful here, as the type of the constant
116 // may not be the same as the type of the vector elements due to type
117 // legalization (the elements are promoted to a legal type for the target and
118 // a vector of a type may be legal when the base element type is not).
119 // We only want to check enough bits to cover the vector elements, because
120 // we care if the resultant vector is all ones, not whether the individual
122 SDValue NotZero = N->getOperand(i);
123 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits();
124 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(NotZero)) {
125 if (CN->getAPIntValue().countTrailingOnes() < EltSize)
127 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(NotZero)) {
128 if (CFPN->getValueAPF().bitcastToAPInt().countTrailingOnes() < EltSize)
133 // Okay, we have at least one ~0 value, check to see if the rest match or are
134 // undefs. Even with the above element type twiddling, this should be OK, as
135 // the same type legalization should have applied to all the elements.
136 for (++i; i != e; ++i)
137 if (N->getOperand(i) != NotZero &&
138 N->getOperand(i).getOpcode() != ISD::UNDEF)
144 /// isBuildVectorAllZeros - Return true if the specified node is a
145 /// BUILD_VECTOR where all of the elements are 0 or undef.
146 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
147 // Look through a bit convert.
148 while (N->getOpcode() == ISD::BITCAST)
149 N = N->getOperand(0).getNode();
151 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
153 bool IsAllUndef = true;
154 for (const SDValue &Op : N->op_values()) {
155 if (Op.getOpcode() == ISD::UNDEF)
158 // Do not accept build_vectors that aren't all constants or which have non-0
159 // elements. We have to be a bit careful here, as the type of the constant
160 // may not be the same as the type of the vector elements due to type
161 // legalization (the elements are promoted to a legal type for the target
162 // and a vector of a type may be legal when the base element type is not).
163 // We only want to check enough bits to cover the vector elements, because
164 // we care if the resultant vector is all zeros, not whether the individual
166 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits();
167 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Op)) {
168 if (CN->getAPIntValue().countTrailingZeros() < EltSize)
170 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(Op)) {
171 if (CFPN->getValueAPF().bitcastToAPInt().countTrailingZeros() < EltSize)
177 // Do not accept an all-undef vector.
183 /// \brief Return true if the specified node is a BUILD_VECTOR node of
184 /// all ConstantSDNode or undef.
185 bool ISD::isBuildVectorOfConstantSDNodes(const SDNode *N) {
186 if (N->getOpcode() != ISD::BUILD_VECTOR)
189 for (const SDValue &Op : N->op_values()) {
190 if (Op.getOpcode() == ISD::UNDEF)
192 if (!isa<ConstantSDNode>(Op))
198 /// \brief Return true if the specified node is a BUILD_VECTOR node of
199 /// all ConstantFPSDNode or undef.
200 bool ISD::isBuildVectorOfConstantFPSDNodes(const SDNode *N) {
201 if (N->getOpcode() != ISD::BUILD_VECTOR)
204 for (const SDValue &Op : N->op_values()) {
205 if (Op.getOpcode() == ISD::UNDEF)
207 if (!isa<ConstantFPSDNode>(Op))
213 /// isScalarToVector - Return true if the specified node is a
214 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
215 /// element is not an undef.
216 bool ISD::isScalarToVector(const SDNode *N) {
217 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
220 if (N->getOpcode() != ISD::BUILD_VECTOR)
222 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
224 unsigned NumElems = N->getNumOperands();
227 for (unsigned i = 1; i < NumElems; ++i) {
228 SDValue V = N->getOperand(i);
229 if (V.getOpcode() != ISD::UNDEF)
235 /// allOperandsUndef - Return true if the node has at least one operand
236 /// and all operands of the specified node are ISD::UNDEF.
237 bool ISD::allOperandsUndef(const SDNode *N) {
238 // Return false if the node has no operands.
239 // This is "logically inconsistent" with the definition of "all" but
240 // is probably the desired behavior.
241 if (N->getNumOperands() == 0)
244 for (const SDValue &Op : N->op_values())
245 if (Op.getOpcode() != ISD::UNDEF)
251 ISD::NodeType ISD::getExtForLoadExtType(bool IsFP, ISD::LoadExtType ExtType) {
254 return IsFP ? ISD::FP_EXTEND : ISD::ANY_EXTEND;
256 return ISD::SIGN_EXTEND;
258 return ISD::ZERO_EXTEND;
263 llvm_unreachable("Invalid LoadExtType");
266 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
267 /// when given the operation for (X op Y).
268 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
269 // To perform this operation, we just need to swap the L and G bits of the
271 unsigned OldL = (Operation >> 2) & 1;
272 unsigned OldG = (Operation >> 1) & 1;
273 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
274 (OldL << 1) | // New G bit
275 (OldG << 2)); // New L bit.
278 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
279 /// 'op' is a valid SetCC operation.
280 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
281 unsigned Operation = Op;
283 Operation ^= 7; // Flip L, G, E bits, but not U.
285 Operation ^= 15; // Flip all of the condition bits.
287 if (Operation > ISD::SETTRUE2)
288 Operation &= ~8; // Don't let N and U bits get set.
290 return ISD::CondCode(Operation);
294 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
295 /// signed operation and 2 if the result is an unsigned comparison. Return zero
296 /// if the operation does not depend on the sign of the input (setne and seteq).
297 static int isSignedOp(ISD::CondCode Opcode) {
299 default: llvm_unreachable("Illegal integer setcc operation!");
301 case ISD::SETNE: return 0;
305 case ISD::SETGE: return 1;
309 case ISD::SETUGE: return 2;
313 /// getSetCCOrOperation - Return the result of a logical OR between different
314 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
315 /// returns SETCC_INVALID if it is not possible to represent the resultant
317 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
319 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
320 // Cannot fold a signed integer setcc with an unsigned integer setcc.
321 return ISD::SETCC_INVALID;
323 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
325 // If the N and U bits get set then the resultant comparison DOES suddenly
326 // care about orderedness, and is true when ordered.
327 if (Op > ISD::SETTRUE2)
328 Op &= ~16; // Clear the U bit if the N bit is set.
330 // Canonicalize illegal integer setcc's.
331 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
334 return ISD::CondCode(Op);
337 /// getSetCCAndOperation - Return the result of a logical AND between different
338 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
339 /// function returns zero if it is not possible to represent the resultant
341 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
343 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
344 // Cannot fold a signed setcc with an unsigned setcc.
345 return ISD::SETCC_INVALID;
347 // Combine all of the condition bits.
348 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
350 // Canonicalize illegal integer setcc's.
354 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
355 case ISD::SETOEQ: // SETEQ & SETU[LG]E
356 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
357 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
358 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
365 //===----------------------------------------------------------------------===//
366 // SDNode Profile Support
367 //===----------------------------------------------------------------------===//
369 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
371 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
375 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
376 /// solely with their pointer.
377 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
378 ID.AddPointer(VTList.VTs);
381 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
383 static void AddNodeIDOperands(FoldingSetNodeID &ID,
384 ArrayRef<SDValue> Ops) {
385 for (auto& Op : Ops) {
386 ID.AddPointer(Op.getNode());
387 ID.AddInteger(Op.getResNo());
391 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
393 static void AddNodeIDOperands(FoldingSetNodeID &ID,
394 ArrayRef<SDUse> Ops) {
395 for (auto& Op : Ops) {
396 ID.AddPointer(Op.getNode());
397 ID.AddInteger(Op.getResNo());
401 /// Add logical or fast math flag values to FoldingSetNodeID value.
402 static void AddNodeIDFlags(FoldingSetNodeID &ID, unsigned Opcode,
403 const SDNodeFlags *Flags) {
404 if (!isBinOpWithFlags(Opcode))
407 unsigned RawFlags = 0;
409 RawFlags = Flags->getRawFlags();
410 ID.AddInteger(RawFlags);
413 static void AddNodeIDFlags(FoldingSetNodeID &ID, const SDNode *N) {
414 AddNodeIDFlags(ID, N->getOpcode(), N->getFlags());
417 static void AddNodeIDNode(FoldingSetNodeID &ID, unsigned short OpC,
418 SDVTList VTList, ArrayRef<SDValue> OpList) {
419 AddNodeIDOpcode(ID, OpC);
420 AddNodeIDValueTypes(ID, VTList);
421 AddNodeIDOperands(ID, OpList);
424 /// If this is an SDNode with special info, add this info to the NodeID data.
425 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
426 switch (N->getOpcode()) {
427 case ISD::TargetExternalSymbol:
428 case ISD::ExternalSymbol:
430 llvm_unreachable("Should only be used on nodes with operands");
431 default: break; // Normal nodes don't need extra info.
432 case ISD::TargetConstant:
433 case ISD::Constant: {
434 const ConstantSDNode *C = cast<ConstantSDNode>(N);
435 ID.AddPointer(C->getConstantIntValue());
436 ID.AddBoolean(C->isOpaque());
439 case ISD::TargetConstantFP:
440 case ISD::ConstantFP: {
441 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
444 case ISD::TargetGlobalAddress:
445 case ISD::GlobalAddress:
446 case ISD::TargetGlobalTLSAddress:
447 case ISD::GlobalTLSAddress: {
448 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
449 ID.AddPointer(GA->getGlobal());
450 ID.AddInteger(GA->getOffset());
451 ID.AddInteger(GA->getTargetFlags());
452 ID.AddInteger(GA->getAddressSpace());
455 case ISD::BasicBlock:
456 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
459 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
461 case ISD::RegisterMask:
462 ID.AddPointer(cast<RegisterMaskSDNode>(N)->getRegMask());
465 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
467 case ISD::FrameIndex:
468 case ISD::TargetFrameIndex:
469 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
472 case ISD::TargetJumpTable:
473 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
474 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
476 case ISD::ConstantPool:
477 case ISD::TargetConstantPool: {
478 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
479 ID.AddInteger(CP->getAlignment());
480 ID.AddInteger(CP->getOffset());
481 if (CP->isMachineConstantPoolEntry())
482 CP->getMachineCPVal()->addSelectionDAGCSEId(ID);
484 ID.AddPointer(CP->getConstVal());
485 ID.AddInteger(CP->getTargetFlags());
488 case ISD::TargetIndex: {
489 const TargetIndexSDNode *TI = cast<TargetIndexSDNode>(N);
490 ID.AddInteger(TI->getIndex());
491 ID.AddInteger(TI->getOffset());
492 ID.AddInteger(TI->getTargetFlags());
496 const LoadSDNode *LD = cast<LoadSDNode>(N);
497 ID.AddInteger(LD->getMemoryVT().getRawBits());
498 ID.AddInteger(LD->getRawSubclassData());
499 ID.AddInteger(LD->getPointerInfo().getAddrSpace());
503 const StoreSDNode *ST = cast<StoreSDNode>(N);
504 ID.AddInteger(ST->getMemoryVT().getRawBits());
505 ID.AddInteger(ST->getRawSubclassData());
506 ID.AddInteger(ST->getPointerInfo().getAddrSpace());
509 case ISD::ATOMIC_CMP_SWAP:
510 case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS:
511 case ISD::ATOMIC_SWAP:
512 case ISD::ATOMIC_LOAD_ADD:
513 case ISD::ATOMIC_LOAD_SUB:
514 case ISD::ATOMIC_LOAD_AND:
515 case ISD::ATOMIC_LOAD_OR:
516 case ISD::ATOMIC_LOAD_XOR:
517 case ISD::ATOMIC_LOAD_NAND:
518 case ISD::ATOMIC_LOAD_MIN:
519 case ISD::ATOMIC_LOAD_MAX:
520 case ISD::ATOMIC_LOAD_UMIN:
521 case ISD::ATOMIC_LOAD_UMAX:
522 case ISD::ATOMIC_LOAD:
523 case ISD::ATOMIC_STORE: {
524 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
525 ID.AddInteger(AT->getMemoryVT().getRawBits());
526 ID.AddInteger(AT->getRawSubclassData());
527 ID.AddInteger(AT->getPointerInfo().getAddrSpace());
530 case ISD::PREFETCH: {
531 const MemSDNode *PF = cast<MemSDNode>(N);
532 ID.AddInteger(PF->getPointerInfo().getAddrSpace());
535 case ISD::VECTOR_SHUFFLE: {
536 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
537 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
539 ID.AddInteger(SVN->getMaskElt(i));
542 case ISD::TargetBlockAddress:
543 case ISD::BlockAddress: {
544 const BlockAddressSDNode *BA = cast<BlockAddressSDNode>(N);
545 ID.AddPointer(BA->getBlockAddress());
546 ID.AddInteger(BA->getOffset());
547 ID.AddInteger(BA->getTargetFlags());
550 } // end switch (N->getOpcode())
552 AddNodeIDFlags(ID, N);
554 // Target specific memory nodes could also have address spaces to check.
555 if (N->isTargetMemoryOpcode())
556 ID.AddInteger(cast<MemSDNode>(N)->getPointerInfo().getAddrSpace());
559 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
561 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
562 AddNodeIDOpcode(ID, N->getOpcode());
563 // Add the return value info.
564 AddNodeIDValueTypes(ID, N->getVTList());
565 // Add the operand info.
566 AddNodeIDOperands(ID, N->ops());
568 // Handle SDNode leafs with special info.
569 AddNodeIDCustom(ID, N);
572 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
573 /// the CSE map that carries volatility, temporalness, indexing mode, and
574 /// extension/truncation information.
576 static inline unsigned
577 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile,
578 bool isNonTemporal, bool isInvariant) {
579 assert((ConvType & 3) == ConvType &&
580 "ConvType may not require more than 2 bits!");
581 assert((AM & 7) == AM &&
582 "AM may not require more than 3 bits!");
586 (isNonTemporal << 6) |
590 //===----------------------------------------------------------------------===//
591 // SelectionDAG Class
592 //===----------------------------------------------------------------------===//
594 /// doNotCSE - Return true if CSE should not be performed for this node.
595 static bool doNotCSE(SDNode *N) {
596 if (N->getValueType(0) == MVT::Glue)
597 return true; // Never CSE anything that produces a flag.
599 switch (N->getOpcode()) {
601 case ISD::HANDLENODE:
603 return true; // Never CSE these nodes.
606 // Check that remaining values produced are not flags.
607 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
608 if (N->getValueType(i) == MVT::Glue)
609 return true; // Never CSE anything that produces a flag.
614 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
616 void SelectionDAG::RemoveDeadNodes() {
617 // Create a dummy node (which is not added to allnodes), that adds a reference
618 // to the root node, preventing it from being deleted.
619 HandleSDNode Dummy(getRoot());
621 SmallVector<SDNode*, 128> DeadNodes;
623 // Add all obviously-dead nodes to the DeadNodes worklist.
624 for (SDNode &Node : allnodes())
625 if (Node.use_empty())
626 DeadNodes.push_back(&Node);
628 RemoveDeadNodes(DeadNodes);
630 // If the root changed (e.g. it was a dead load, update the root).
631 setRoot(Dummy.getValue());
634 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
635 /// given list, and any nodes that become unreachable as a result.
636 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes) {
638 // Process the worklist, deleting the nodes and adding their uses to the
640 while (!DeadNodes.empty()) {
641 SDNode *N = DeadNodes.pop_back_val();
643 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
644 DUL->NodeDeleted(N, nullptr);
646 // Take the node out of the appropriate CSE map.
647 RemoveNodeFromCSEMaps(N);
649 // Next, brutally remove the operand list. This is safe to do, as there are
650 // no cycles in the graph.
651 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
653 SDNode *Operand = Use.getNode();
656 // Now that we removed this operand, see if there are no uses of it left.
657 if (Operand->use_empty())
658 DeadNodes.push_back(Operand);
665 void SelectionDAG::RemoveDeadNode(SDNode *N){
666 SmallVector<SDNode*, 16> DeadNodes(1, N);
668 // Create a dummy node that adds a reference to the root node, preventing
669 // it from being deleted. (This matters if the root is an operand of the
671 HandleSDNode Dummy(getRoot());
673 RemoveDeadNodes(DeadNodes);
676 void SelectionDAG::DeleteNode(SDNode *N) {
677 // First take this out of the appropriate CSE map.
678 RemoveNodeFromCSEMaps(N);
680 // Finally, remove uses due to operands of this node, remove from the
681 // AllNodes list, and delete the node.
682 DeleteNodeNotInCSEMaps(N);
685 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
686 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
687 assert(N->use_empty() && "Cannot delete a node that is not dead!");
689 // Drop all of the operands and decrement used node's use counts.
695 void SDDbgInfo::erase(const SDNode *Node) {
696 DbgValMapType::iterator I = DbgValMap.find(Node);
697 if (I == DbgValMap.end())
699 for (auto &Val: I->second)
700 Val->setIsInvalidated();
704 void SelectionDAG::DeallocateNode(SDNode *N) {
705 if (N->OperandsNeedDelete)
706 delete[] N->OperandList;
708 // Set the opcode to DELETED_NODE to help catch bugs when node
709 // memory is reallocated.
710 N->NodeType = ISD::DELETED_NODE;
712 NodeAllocator.Deallocate(AllNodes.remove(N));
714 // If any of the SDDbgValue nodes refer to this SDNode, invalidate
715 // them and forget about that node.
720 /// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid.
721 static void VerifySDNode(SDNode *N) {
722 switch (N->getOpcode()) {
725 case ISD::BUILD_PAIR: {
726 EVT VT = N->getValueType(0);
727 assert(N->getNumValues() == 1 && "Too many results!");
728 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
729 "Wrong return type!");
730 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
731 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
732 "Mismatched operand types!");
733 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
734 "Wrong operand type!");
735 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
736 "Wrong return type size");
739 case ISD::BUILD_VECTOR: {
740 assert(N->getNumValues() == 1 && "Too many results!");
741 assert(N->getValueType(0).isVector() && "Wrong return type!");
742 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
743 "Wrong number of operands!");
744 EVT EltVT = N->getValueType(0).getVectorElementType();
745 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) {
746 assert((I->getValueType() == EltVT ||
747 (EltVT.isInteger() && I->getValueType().isInteger() &&
748 EltVT.bitsLE(I->getValueType()))) &&
749 "Wrong operand type!");
750 assert(I->getValueType() == N->getOperand(0).getValueType() &&
751 "Operands must all have the same type");
759 /// \brief Insert a newly allocated node into the DAG.
761 /// Handles insertion into the all nodes list and CSE map, as well as
762 /// verification and other common operations when a new node is allocated.
763 void SelectionDAG::InsertNode(SDNode *N) {
764 AllNodes.push_back(N);
770 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
771 /// correspond to it. This is useful when we're about to delete or repurpose
772 /// the node. We don't want future request for structurally identical nodes
773 /// to return N anymore.
774 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
776 switch (N->getOpcode()) {
777 case ISD::HANDLENODE: return false; // noop.
779 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
780 "Cond code doesn't exist!");
781 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != nullptr;
782 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = nullptr;
784 case ISD::ExternalSymbol:
785 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
787 case ISD::TargetExternalSymbol: {
788 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
789 Erased = TargetExternalSymbols.erase(
790 std::pair<std::string,unsigned char>(ESN->getSymbol(),
791 ESN->getTargetFlags()));
794 case ISD::MCSymbol: {
795 auto *MCSN = cast<MCSymbolSDNode>(N);
796 Erased = MCSymbols.erase(MCSN->getMCSymbol());
799 case ISD::VALUETYPE: {
800 EVT VT = cast<VTSDNode>(N)->getVT();
801 if (VT.isExtended()) {
802 Erased = ExtendedValueTypeNodes.erase(VT);
804 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != nullptr;
805 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = nullptr;
810 // Remove it from the CSE Map.
811 assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!");
812 assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!");
813 Erased = CSEMap.RemoveNode(N);
817 // Verify that the node was actually in one of the CSE maps, unless it has a
818 // flag result (which cannot be CSE'd) or is one of the special cases that are
819 // not subject to CSE.
820 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue &&
821 !N->isMachineOpcode() && !doNotCSE(N)) {
824 llvm_unreachable("Node is not in map!");
830 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
831 /// maps and modified in place. Add it back to the CSE maps, unless an identical
832 /// node already exists, in which case transfer all its users to the existing
833 /// node. This transfer can potentially trigger recursive merging.
836 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N) {
837 // For node types that aren't CSE'd, just act as if no identical node
840 SDNode *Existing = CSEMap.GetOrInsertNode(N);
842 // If there was already an existing matching node, use ReplaceAllUsesWith
843 // to replace the dead one with the existing one. This can cause
844 // recursive merging of other unrelated nodes down the line.
845 ReplaceAllUsesWith(N, Existing);
847 // N is now dead. Inform the listeners and delete it.
848 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
849 DUL->NodeDeleted(N, Existing);
850 DeleteNodeNotInCSEMaps(N);
855 // If the node doesn't already exist, we updated it. Inform listeners.
856 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
860 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
861 /// were replaced with those specified. If this node is never memoized,
862 /// return null, otherwise return a pointer to the slot it would take. If a
863 /// node already exists with these operands, the slot will be non-null.
864 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
869 SDValue Ops[] = { Op };
871 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops);
872 AddNodeIDCustom(ID, N);
873 SDNode *Node = FindNodeOrInsertPos(ID, N->getDebugLoc(), InsertPos);
877 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
878 /// were replaced with those specified. If this node is never memoized,
879 /// return null, otherwise return a pointer to the slot it would take. If a
880 /// node already exists with these operands, the slot will be non-null.
881 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
882 SDValue Op1, SDValue Op2,
887 SDValue Ops[] = { Op1, Op2 };
889 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops);
890 AddNodeIDCustom(ID, N);
891 SDNode *Node = FindNodeOrInsertPos(ID, N->getDebugLoc(), InsertPos);
896 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
897 /// were replaced with those specified. If this node is never memoized,
898 /// return null, otherwise return a pointer to the slot it would take. If a
899 /// node already exists with these operands, the slot will be non-null.
900 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, ArrayRef<SDValue> Ops,
906 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops);
907 AddNodeIDCustom(ID, N);
908 SDNode *Node = FindNodeOrInsertPos(ID, N->getDebugLoc(), InsertPos);
912 /// getEVTAlignment - Compute the default alignment value for the
915 unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
916 Type *Ty = VT == MVT::iPTR ?
917 PointerType::get(Type::getInt8Ty(*getContext()), 0) :
918 VT.getTypeForEVT(*getContext());
920 return getDataLayout().getABITypeAlignment(Ty);
923 // EntryNode could meaningfully have debug info if we can find it...
924 SelectionDAG::SelectionDAG(const TargetMachine &tm, CodeGenOpt::Level OL)
925 : TM(tm), TSI(nullptr), TLI(nullptr), OptLevel(OL),
926 EntryNode(ISD::EntryToken, 0, DebugLoc(), getVTList(MVT::Other)),
927 Root(getEntryNode()), NewNodesMustHaveLegalTypes(false),
928 UpdateListeners(nullptr) {
929 AllNodes.push_back(&EntryNode);
930 DbgInfo = new SDDbgInfo();
933 void SelectionDAG::init(MachineFunction &mf) {
935 TLI = getSubtarget().getTargetLowering();
936 TSI = getSubtarget().getSelectionDAGInfo();
937 Context = &mf.getFunction()->getContext();
940 SelectionDAG::~SelectionDAG() {
941 assert(!UpdateListeners && "Dangling registered DAGUpdateListeners");
946 void SelectionDAG::allnodes_clear() {
947 assert(&*AllNodes.begin() == &EntryNode);
948 AllNodes.remove(AllNodes.begin());
949 while (!AllNodes.empty())
950 DeallocateNode(AllNodes.begin());
953 BinarySDNode *SelectionDAG::GetBinarySDNode(unsigned Opcode, SDLoc DL,
954 SDVTList VTs, SDValue N1,
956 const SDNodeFlags *Flags) {
957 if (isBinOpWithFlags(Opcode)) {
958 // If no flags were passed in, use a default flags object.
960 if (Flags == nullptr)
963 BinaryWithFlagsSDNode *FN = new (NodeAllocator) BinaryWithFlagsSDNode(
964 Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs, N1, N2, *Flags);
969 BinarySDNode *N = new (NodeAllocator)
970 BinarySDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs, N1, N2);
974 SDNode *SelectionDAG::FindNodeOrInsertPos(const FoldingSetNodeID &ID,
976 SDNode *N = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
978 switch (N->getOpcode()) {
981 case ISD::ConstantFP:
982 llvm_unreachable("Querying for Constant and ConstantFP nodes requires "
983 "debug location. Use another overload.");
989 SDNode *SelectionDAG::FindNodeOrInsertPos(const FoldingSetNodeID &ID,
990 DebugLoc DL, void *&InsertPos) {
991 SDNode *N = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
993 switch (N->getOpcode()) {
994 default: break; // Process only regular (non-target) constant nodes.
996 case ISD::ConstantFP:
997 // Erase debug location from the node if the node is used at several
998 // different places to do not propagate one location to all uses as it
999 // leads to incorrect debug info.
1000 if (N->getDebugLoc() != DL)
1001 N->setDebugLoc(DebugLoc());
1008 void SelectionDAG::clear() {
1010 OperandAllocator.Reset();
1013 ExtendedValueTypeNodes.clear();
1014 ExternalSymbols.clear();
1015 TargetExternalSymbols.clear();
1017 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
1018 static_cast<CondCodeSDNode*>(nullptr));
1019 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
1020 static_cast<SDNode*>(nullptr));
1022 EntryNode.UseList = nullptr;
1023 AllNodes.push_back(&EntryNode);
1024 Root = getEntryNode();
1028 SDValue SelectionDAG::getAnyExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) {
1029 return VT.bitsGT(Op.getValueType()) ?
1030 getNode(ISD::ANY_EXTEND, DL, VT, Op) :
1031 getNode(ISD::TRUNCATE, DL, VT, Op);
1034 SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) {
1035 return VT.bitsGT(Op.getValueType()) ?
1036 getNode(ISD::SIGN_EXTEND, DL, VT, Op) :
1037 getNode(ISD::TRUNCATE, DL, VT, Op);
1040 SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) {
1041 return VT.bitsGT(Op.getValueType()) ?
1042 getNode(ISD::ZERO_EXTEND, DL, VT, Op) :
1043 getNode(ISD::TRUNCATE, DL, VT, Op);
1046 SDValue SelectionDAG::getBoolExtOrTrunc(SDValue Op, SDLoc SL, EVT VT,
1048 if (VT.bitsLE(Op.getValueType()))
1049 return getNode(ISD::TRUNCATE, SL, VT, Op);
1051 TargetLowering::BooleanContent BType = TLI->getBooleanContents(OpVT);
1052 return getNode(TLI->getExtendForContent(BType), SL, VT, Op);
1055 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, SDLoc DL, EVT VT) {
1056 assert(!VT.isVector() &&
1057 "getZeroExtendInReg should use the vector element type instead of "
1058 "the vector type!");
1059 if (Op.getValueType() == VT) return Op;
1060 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1061 APInt Imm = APInt::getLowBitsSet(BitWidth,
1062 VT.getSizeInBits());
1063 return getNode(ISD::AND, DL, Op.getValueType(), Op,
1064 getConstant(Imm, DL, Op.getValueType()));
1067 SDValue SelectionDAG::getAnyExtendVectorInReg(SDValue Op, SDLoc DL, EVT VT) {
1068 assert(VT.isVector() && "This DAG node is restricted to vector types.");
1069 assert(VT.getSizeInBits() == Op.getValueType().getSizeInBits() &&
1070 "The sizes of the input and result must match in order to perform the "
1071 "extend in-register.");
1072 assert(VT.getVectorNumElements() < Op.getValueType().getVectorNumElements() &&
1073 "The destination vector type must have fewer lanes than the input.");
1074 return getNode(ISD::ANY_EXTEND_VECTOR_INREG, DL, VT, Op);
1077 SDValue SelectionDAG::getSignExtendVectorInReg(SDValue Op, SDLoc DL, EVT VT) {
1078 assert(VT.isVector() && "This DAG node is restricted to vector types.");
1079 assert(VT.getSizeInBits() == Op.getValueType().getSizeInBits() &&
1080 "The sizes of the input and result must match in order to perform the "
1081 "extend in-register.");
1082 assert(VT.getVectorNumElements() < Op.getValueType().getVectorNumElements() &&
1083 "The destination vector type must have fewer lanes than the input.");
1084 return getNode(ISD::SIGN_EXTEND_VECTOR_INREG, DL, VT, Op);
1087 SDValue SelectionDAG::getZeroExtendVectorInReg(SDValue Op, SDLoc DL, EVT VT) {
1088 assert(VT.isVector() && "This DAG node is restricted to vector types.");
1089 assert(VT.getSizeInBits() == Op.getValueType().getSizeInBits() &&
1090 "The sizes of the input and result must match in order to perform the "
1091 "extend in-register.");
1092 assert(VT.getVectorNumElements() < Op.getValueType().getVectorNumElements() &&
1093 "The destination vector type must have fewer lanes than the input.");
1094 return getNode(ISD::ZERO_EXTEND_VECTOR_INREG, DL, VT, Op);
1097 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
1099 SDValue SelectionDAG::getNOT(SDLoc DL, SDValue Val, EVT VT) {
1100 EVT EltVT = VT.getScalarType();
1102 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), DL, VT);
1103 return getNode(ISD::XOR, DL, VT, Val, NegOne);
1106 SDValue SelectionDAG::getLogicalNOT(SDLoc DL, SDValue Val, EVT VT) {
1107 EVT EltVT = VT.getScalarType();
1109 switch (TLI->getBooleanContents(VT)) {
1110 case TargetLowering::ZeroOrOneBooleanContent:
1111 case TargetLowering::UndefinedBooleanContent:
1112 TrueValue = getConstant(1, DL, VT);
1114 case TargetLowering::ZeroOrNegativeOneBooleanContent:
1115 TrueValue = getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), DL,
1119 return getNode(ISD::XOR, DL, VT, Val, TrueValue);
1122 SDValue SelectionDAG::getConstant(uint64_t Val, SDLoc DL, EVT VT, bool isT,
1124 EVT EltVT = VT.getScalarType();
1125 assert((EltVT.getSizeInBits() >= 64 ||
1126 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
1127 "getConstant with a uint64_t value that doesn't fit in the type!");
1128 return getConstant(APInt(EltVT.getSizeInBits(), Val), DL, VT, isT, isO);
1131 SDValue SelectionDAG::getConstant(const APInt &Val, SDLoc DL, EVT VT, bool isT,
1134 return getConstant(*ConstantInt::get(*Context, Val), DL, VT, isT, isO);
1137 SDValue SelectionDAG::getConstant(const ConstantInt &Val, SDLoc DL, EVT VT,
1138 bool isT, bool isO) {
1139 assert(VT.isInteger() && "Cannot create FP integer constant!");
1141 EVT EltVT = VT.getScalarType();
1142 const ConstantInt *Elt = &Val;
1144 // In some cases the vector type is legal but the element type is illegal and
1145 // needs to be promoted, for example v8i8 on ARM. In this case, promote the
1146 // inserted value (the type does not need to match the vector element type).
1147 // Any extra bits introduced will be truncated away.
1148 if (VT.isVector() && TLI->getTypeAction(*getContext(), EltVT) ==
1149 TargetLowering::TypePromoteInteger) {
1150 EltVT = TLI->getTypeToTransformTo(*getContext(), EltVT);
1151 APInt NewVal = Elt->getValue().zext(EltVT.getSizeInBits());
1152 Elt = ConstantInt::get(*getContext(), NewVal);
1154 // In other cases the element type is illegal and needs to be expanded, for
1155 // example v2i64 on MIPS32. In this case, find the nearest legal type, split
1156 // the value into n parts and use a vector type with n-times the elements.
1157 // Then bitcast to the type requested.
1158 // Legalizing constants too early makes the DAGCombiner's job harder so we
1159 // only legalize if the DAG tells us we must produce legal types.
1160 else if (NewNodesMustHaveLegalTypes && VT.isVector() &&
1161 TLI->getTypeAction(*getContext(), EltVT) ==
1162 TargetLowering::TypeExpandInteger) {
1163 APInt NewVal = Elt->getValue();
1164 EVT ViaEltVT = TLI->getTypeToTransformTo(*getContext(), EltVT);
1165 unsigned ViaEltSizeInBits = ViaEltVT.getSizeInBits();
1166 unsigned ViaVecNumElts = VT.getSizeInBits() / ViaEltSizeInBits;
1167 EVT ViaVecVT = EVT::getVectorVT(*getContext(), ViaEltVT, ViaVecNumElts);
1169 // Check the temporary vector is the correct size. If this fails then
1170 // getTypeToTransformTo() probably returned a type whose size (in bits)
1171 // isn't a power-of-2 factor of the requested type size.
1172 assert(ViaVecVT.getSizeInBits() == VT.getSizeInBits());
1174 SmallVector<SDValue, 2> EltParts;
1175 for (unsigned i = 0; i < ViaVecNumElts / VT.getVectorNumElements(); ++i) {
1176 EltParts.push_back(getConstant(NewVal.lshr(i * ViaEltSizeInBits)
1177 .trunc(ViaEltSizeInBits), DL,
1178 ViaEltVT, isT, isO));
1181 // EltParts is currently in little endian order. If we actually want
1182 // big-endian order then reverse it now.
1183 if (getDataLayout().isBigEndian())
1184 std::reverse(EltParts.begin(), EltParts.end());
1186 // The elements must be reversed when the element order is different
1187 // to the endianness of the elements (because the BITCAST is itself a
1188 // vector shuffle in this situation). However, we do not need any code to
1189 // perform this reversal because getConstant() is producing a vector
1191 // This situation occurs in MIPS MSA.
1193 SmallVector<SDValue, 8> Ops;
1194 for (unsigned i = 0; i < VT.getVectorNumElements(); ++i)
1195 Ops.insert(Ops.end(), EltParts.begin(), EltParts.end());
1197 SDValue Result = getNode(ISD::BITCAST, SDLoc(), VT,
1198 getNode(ISD::BUILD_VECTOR, SDLoc(), ViaVecVT,
1203 assert(Elt->getBitWidth() == EltVT.getSizeInBits() &&
1204 "APInt size does not match type size!");
1205 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
1206 FoldingSetNodeID ID;
1207 AddNodeIDNode(ID, Opc, getVTList(EltVT), None);
1211 SDNode *N = nullptr;
1212 if ((N = FindNodeOrInsertPos(ID, DL.getDebugLoc(), IP)))
1214 return SDValue(N, 0);
1217 N = new (NodeAllocator) ConstantSDNode(isT, isO, Elt, DL.getDebugLoc(),
1219 CSEMap.InsertNode(N, IP);
1223 SDValue Result(N, 0);
1224 if (VT.isVector()) {
1225 SmallVector<SDValue, 8> Ops;
1226 Ops.assign(VT.getVectorNumElements(), Result);
1227 Result = getNode(ISD::BUILD_VECTOR, SDLoc(), VT, Ops);
1232 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, SDLoc DL, bool isTarget) {
1233 return getConstant(Val, DL, TLI->getPointerTy(getDataLayout()), isTarget);
1236 SDValue SelectionDAG::getConstantFP(const APFloat& V, SDLoc DL, EVT VT,
1238 return getConstantFP(*ConstantFP::get(*getContext(), V), DL, VT, isTarget);
1241 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, SDLoc DL, EVT VT,
1243 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
1245 EVT EltVT = VT.getScalarType();
1247 // Do the map lookup using the actual bit pattern for the floating point
1248 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
1249 // we don't have issues with SNANs.
1250 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
1251 FoldingSetNodeID ID;
1252 AddNodeIDNode(ID, Opc, getVTList(EltVT), None);
1255 SDNode *N = nullptr;
1256 if ((N = FindNodeOrInsertPos(ID, DL.getDebugLoc(), IP)))
1258 return SDValue(N, 0);
1261 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, DL.getDebugLoc(),
1263 CSEMap.InsertNode(N, IP);
1267 SDValue Result(N, 0);
1268 if (VT.isVector()) {
1269 SmallVector<SDValue, 8> Ops;
1270 Ops.assign(VT.getVectorNumElements(), Result);
1271 Result = getNode(ISD::BUILD_VECTOR, SDLoc(), VT, Ops);
1276 SDValue SelectionDAG::getConstantFP(double Val, SDLoc DL, EVT VT,
1278 EVT EltVT = VT.getScalarType();
1279 if (EltVT==MVT::f32)
1280 return getConstantFP(APFloat((float)Val), DL, VT, isTarget);
1281 else if (EltVT==MVT::f64)
1282 return getConstantFP(APFloat(Val), DL, VT, isTarget);
1283 else if (EltVT==MVT::f80 || EltVT==MVT::f128 || EltVT==MVT::ppcf128 ||
1286 APFloat apf = APFloat(Val);
1287 apf.convert(EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven,
1289 return getConstantFP(apf, DL, VT, isTarget);
1291 llvm_unreachable("Unsupported type in getConstantFP");
1294 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, SDLoc DL,
1295 EVT VT, int64_t Offset,
1297 unsigned char TargetFlags) {
1298 assert((TargetFlags == 0 || isTargetGA) &&
1299 "Cannot set target flags on target-independent globals");
1301 // Truncate (with sign-extension) the offset value to the pointer size.
1302 unsigned BitWidth = getDataLayout().getPointerTypeSizeInBits(GV->getType());
1304 Offset = SignExtend64(Offset, BitWidth);
1307 if (GV->isThreadLocal())
1308 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
1310 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
1312 FoldingSetNodeID ID;
1313 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1315 ID.AddInteger(Offset);
1316 ID.AddInteger(TargetFlags);
1317 ID.AddInteger(GV->getType()->getAddressSpace());
1319 if (SDNode *E = FindNodeOrInsertPos(ID, DL.getDebugLoc(), IP))
1320 return SDValue(E, 0);
1322 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL.getIROrder(),
1323 DL.getDebugLoc(), GV, VT,
1324 Offset, TargetFlags);
1325 CSEMap.InsertNode(N, IP);
1327 return SDValue(N, 0);
1330 SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
1331 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1332 FoldingSetNodeID ID;
1333 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1336 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1337 return SDValue(E, 0);
1339 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget);
1340 CSEMap.InsertNode(N, IP);
1342 return SDValue(N, 0);
1345 SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
1346 unsigned char TargetFlags) {
1347 assert((TargetFlags == 0 || isTarget) &&
1348 "Cannot set target flags on target-independent jump tables");
1349 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1350 FoldingSetNodeID ID;
1351 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1353 ID.AddInteger(TargetFlags);
1355 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1356 return SDValue(E, 0);
1358 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget,
1360 CSEMap.InsertNode(N, IP);
1362 return SDValue(N, 0);
1365 SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT,
1366 unsigned Alignment, int Offset,
1368 unsigned char TargetFlags) {
1369 assert((TargetFlags == 0 || isTarget) &&
1370 "Cannot set target flags on target-independent globals");
1372 Alignment = getDataLayout().getPrefTypeAlignment(C->getType());
1373 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1374 FoldingSetNodeID ID;
1375 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1376 ID.AddInteger(Alignment);
1377 ID.AddInteger(Offset);
1379 ID.AddInteger(TargetFlags);
1381 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1382 return SDValue(E, 0);
1384 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1385 Alignment, TargetFlags);
1386 CSEMap.InsertNode(N, IP);
1388 return SDValue(N, 0);
1392 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
1393 unsigned Alignment, int Offset,
1395 unsigned char TargetFlags) {
1396 assert((TargetFlags == 0 || isTarget) &&
1397 "Cannot set target flags on target-independent globals");
1399 Alignment = getDataLayout().getPrefTypeAlignment(C->getType());
1400 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1401 FoldingSetNodeID ID;
1402 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1403 ID.AddInteger(Alignment);
1404 ID.AddInteger(Offset);
1405 C->addSelectionDAGCSEId(ID);
1406 ID.AddInteger(TargetFlags);
1408 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1409 return SDValue(E, 0);
1411 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1412 Alignment, TargetFlags);
1413 CSEMap.InsertNode(N, IP);
1415 return SDValue(N, 0);
1418 SDValue SelectionDAG::getTargetIndex(int Index, EVT VT, int64_t Offset,
1419 unsigned char TargetFlags) {
1420 FoldingSetNodeID ID;
1421 AddNodeIDNode(ID, ISD::TargetIndex, getVTList(VT), None);
1422 ID.AddInteger(Index);
1423 ID.AddInteger(Offset);
1424 ID.AddInteger(TargetFlags);
1426 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1427 return SDValue(E, 0);
1429 SDNode *N = new (NodeAllocator) TargetIndexSDNode(Index, VT, Offset,
1431 CSEMap.InsertNode(N, IP);
1433 return SDValue(N, 0);
1436 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1437 FoldingSetNodeID ID;
1438 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), None);
1441 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1442 return SDValue(E, 0);
1444 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB);
1445 CSEMap.InsertNode(N, IP);
1447 return SDValue(N, 0);
1450 SDValue SelectionDAG::getValueType(EVT VT) {
1451 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
1452 ValueTypeNodes.size())
1453 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
1455 SDNode *&N = VT.isExtended() ?
1456 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
1458 if (N) return SDValue(N, 0);
1459 N = new (NodeAllocator) VTSDNode(VT);
1461 return SDValue(N, 0);
1464 SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
1465 SDNode *&N = ExternalSymbols[Sym];
1466 if (N) return SDValue(N, 0);
1467 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT);
1469 return SDValue(N, 0);
1472 SDValue SelectionDAG::getMCSymbol(MCSymbol *Sym, EVT VT) {
1473 SDNode *&N = MCSymbols[Sym];
1475 return SDValue(N, 0);
1476 N = new (NodeAllocator) MCSymbolSDNode(Sym, VT);
1478 return SDValue(N, 0);
1481 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
1482 unsigned char TargetFlags) {
1484 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1486 if (N) return SDValue(N, 0);
1487 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1489 return SDValue(N, 0);
1492 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1493 if ((unsigned)Cond >= CondCodeNodes.size())
1494 CondCodeNodes.resize(Cond+1);
1496 if (!CondCodeNodes[Cond]) {
1497 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond);
1498 CondCodeNodes[Cond] = N;
1502 return SDValue(CondCodeNodes[Cond], 0);
1505 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1506 // the shuffle mask M that point at N1 to point at N2, and indices that point
1507 // N2 to point at N1.
1508 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1510 ShuffleVectorSDNode::commuteMask(M);
1513 SDValue SelectionDAG::getVectorShuffle(EVT VT, SDLoc dl, SDValue N1,
1514 SDValue N2, const int *Mask) {
1515 assert(VT == N1.getValueType() && VT == N2.getValueType() &&
1516 "Invalid VECTOR_SHUFFLE");
1518 // Canonicalize shuffle undef, undef -> undef
1519 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1520 return getUNDEF(VT);
1522 // Validate that all indices in Mask are within the range of the elements
1523 // input to the shuffle.
1524 unsigned NElts = VT.getVectorNumElements();
1525 SmallVector<int, 8> MaskVec;
1526 for (unsigned i = 0; i != NElts; ++i) {
1527 assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1528 MaskVec.push_back(Mask[i]);
1531 // Canonicalize shuffle v, v -> v, undef
1534 for (unsigned i = 0; i != NElts; ++i)
1535 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1538 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1539 if (N1.getOpcode() == ISD::UNDEF)
1540 commuteShuffle(N1, N2, MaskVec);
1542 // If shuffling a splat, try to blend the splat instead. We do this here so
1543 // that even when this arises during lowering we don't have to re-handle it.
1544 auto BlendSplat = [&](BuildVectorSDNode *BV, int Offset) {
1545 BitVector UndefElements;
1546 SDValue Splat = BV->getSplatValue(&UndefElements);
1550 for (int i = 0; i < (int)NElts; ++i) {
1551 if (MaskVec[i] < Offset || MaskVec[i] >= (Offset + (int)NElts))
1554 // If this input comes from undef, mark it as such.
1555 if (UndefElements[MaskVec[i] - Offset]) {
1560 // If we can blend a non-undef lane, use that instead.
1561 if (!UndefElements[i])
1562 MaskVec[i] = i + Offset;
1565 if (auto *N1BV = dyn_cast<BuildVectorSDNode>(N1))
1566 BlendSplat(N1BV, 0);
1567 if (auto *N2BV = dyn_cast<BuildVectorSDNode>(N2))
1568 BlendSplat(N2BV, NElts);
1570 // Canonicalize all index into lhs, -> shuffle lhs, undef
1571 // Canonicalize all index into rhs, -> shuffle rhs, undef
1572 bool AllLHS = true, AllRHS = true;
1573 bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1574 for (unsigned i = 0; i != NElts; ++i) {
1575 if (MaskVec[i] >= (int)NElts) {
1580 } else if (MaskVec[i] >= 0) {
1584 if (AllLHS && AllRHS)
1585 return getUNDEF(VT);
1586 if (AllLHS && !N2Undef)
1590 commuteShuffle(N1, N2, MaskVec);
1592 // Reset our undef status after accounting for the mask.
1593 N2Undef = N2.getOpcode() == ISD::UNDEF;
1594 // Re-check whether both sides ended up undef.
1595 if (N1.getOpcode() == ISD::UNDEF && N2Undef)
1596 return getUNDEF(VT);
1598 // If Identity shuffle return that node.
1599 bool Identity = true, AllSame = true;
1600 for (unsigned i = 0; i != NElts; ++i) {
1601 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1602 if (MaskVec[i] != MaskVec[0]) AllSame = false;
1604 if (Identity && NElts)
1607 // Shuffling a constant splat doesn't change the result.
1611 // Look through any bitcasts. We check that these don't change the number
1612 // (and size) of elements and just changes their types.
1613 while (V.getOpcode() == ISD::BITCAST)
1614 V = V->getOperand(0);
1616 // A splat should always show up as a build vector node.
1617 if (auto *BV = dyn_cast<BuildVectorSDNode>(V)) {
1618 BitVector UndefElements;
1619 SDValue Splat = BV->getSplatValue(&UndefElements);
1620 // If this is a splat of an undef, shuffling it is also undef.
1621 if (Splat && Splat.getOpcode() == ISD::UNDEF)
1622 return getUNDEF(VT);
1625 V.getValueType().getVectorNumElements() == VT.getVectorNumElements();
1627 // We only have a splat which can skip shuffles if there is a splatted
1628 // value and no undef lanes rearranged by the shuffle.
1629 if (Splat && UndefElements.none()) {
1630 // Splat of <x, x, ..., x>, return <x, x, ..., x>, provided that the
1631 // number of elements match or the value splatted is a zero constant.
1634 if (auto *C = dyn_cast<ConstantSDNode>(Splat))
1635 if (C->isNullValue())
1639 // If the shuffle itself creates a splat, build the vector directly.
1640 if (AllSame && SameNumElts) {
1641 const SDValue &Splatted = BV->getOperand(MaskVec[0]);
1642 SmallVector<SDValue, 8> Ops(NElts, Splatted);
1644 EVT BuildVT = BV->getValueType(0);
1645 SDValue NewBV = getNode(ISD::BUILD_VECTOR, dl, BuildVT, Ops);
1647 // We may have jumped through bitcasts, so the type of the
1648 // BUILD_VECTOR may not match the type of the shuffle.
1650 NewBV = getNode(ISD::BITCAST, dl, VT, NewBV);
1656 FoldingSetNodeID ID;
1657 SDValue Ops[2] = { N1, N2 };
1658 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops);
1659 for (unsigned i = 0; i != NElts; ++i)
1660 ID.AddInteger(MaskVec[i]);
1663 if (SDNode *E = FindNodeOrInsertPos(ID, dl.getDebugLoc(), IP))
1664 return SDValue(E, 0);
1666 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1667 // SDNode doesn't have access to it. This memory will be "leaked" when
1668 // the node is deallocated, but recovered when the NodeAllocator is released.
1669 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1670 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1672 ShuffleVectorSDNode *N =
1673 new (NodeAllocator) ShuffleVectorSDNode(VT, dl.getIROrder(),
1674 dl.getDebugLoc(), N1, N2,
1676 CSEMap.InsertNode(N, IP);
1678 return SDValue(N, 0);
1681 SDValue SelectionDAG::getCommutedVectorShuffle(const ShuffleVectorSDNode &SV) {
1682 MVT VT = SV.getSimpleValueType(0);
1683 SmallVector<int, 8> MaskVec(SV.getMask().begin(), SV.getMask().end());
1684 ShuffleVectorSDNode::commuteMask(MaskVec);
1686 SDValue Op0 = SV.getOperand(0);
1687 SDValue Op1 = SV.getOperand(1);
1688 return getVectorShuffle(VT, SDLoc(&SV), Op1, Op0, &MaskVec[0]);
1691 SDValue SelectionDAG::getConvertRndSat(EVT VT, SDLoc dl,
1692 SDValue Val, SDValue DTy,
1693 SDValue STy, SDValue Rnd, SDValue Sat,
1694 ISD::CvtCode Code) {
1695 // If the src and dest types are the same and the conversion is between
1696 // integer types of the same sign or two floats, no conversion is necessary.
1698 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1701 FoldingSetNodeID ID;
1702 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1703 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), Ops);
1705 if (SDNode *E = FindNodeOrInsertPos(ID, dl.getDebugLoc(), IP))
1706 return SDValue(E, 0);
1708 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl.getIROrder(),
1711 CSEMap.InsertNode(N, IP);
1713 return SDValue(N, 0);
1716 SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
1717 FoldingSetNodeID ID;
1718 AddNodeIDNode(ID, ISD::Register, getVTList(VT), None);
1719 ID.AddInteger(RegNo);
1721 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1722 return SDValue(E, 0);
1724 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT);
1725 CSEMap.InsertNode(N, IP);
1727 return SDValue(N, 0);
1730 SDValue SelectionDAG::getRegisterMask(const uint32_t *RegMask) {
1731 FoldingSetNodeID ID;
1732 AddNodeIDNode(ID, ISD::RegisterMask, getVTList(MVT::Untyped), None);
1733 ID.AddPointer(RegMask);
1735 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1736 return SDValue(E, 0);
1738 SDNode *N = new (NodeAllocator) RegisterMaskSDNode(RegMask);
1739 CSEMap.InsertNode(N, IP);
1741 return SDValue(N, 0);
1744 SDValue SelectionDAG::getEHLabel(SDLoc dl, SDValue Root, MCSymbol *Label) {
1745 FoldingSetNodeID ID;
1746 SDValue Ops[] = { Root };
1747 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), Ops);
1748 ID.AddPointer(Label);
1750 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1751 return SDValue(E, 0);
1753 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl.getIROrder(),
1754 dl.getDebugLoc(), Root, Label);
1755 CSEMap.InsertNode(N, IP);
1757 return SDValue(N, 0);
1761 SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT,
1764 unsigned char TargetFlags) {
1765 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress;
1767 FoldingSetNodeID ID;
1768 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1770 ID.AddInteger(Offset);
1771 ID.AddInteger(TargetFlags);
1773 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1774 return SDValue(E, 0);
1776 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, Offset,
1778 CSEMap.InsertNode(N, IP);
1780 return SDValue(N, 0);
1783 SDValue SelectionDAG::getSrcValue(const Value *V) {
1784 assert((!V || V->getType()->isPointerTy()) &&
1785 "SrcValue is not a pointer?");
1787 FoldingSetNodeID ID;
1788 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), None);
1792 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1793 return SDValue(E, 0);
1795 SDNode *N = new (NodeAllocator) SrcValueSDNode(V);
1796 CSEMap.InsertNode(N, IP);
1798 return SDValue(N, 0);
1801 /// getMDNode - Return an MDNodeSDNode which holds an MDNode.
1802 SDValue SelectionDAG::getMDNode(const MDNode *MD) {
1803 FoldingSetNodeID ID;
1804 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), None);
1808 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1809 return SDValue(E, 0);
1811 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD);
1812 CSEMap.InsertNode(N, IP);
1814 return SDValue(N, 0);
1817 SDValue SelectionDAG::getBitcast(EVT VT, SDValue V) {
1818 if (VT == V.getValueType())
1821 return getNode(ISD::BITCAST, SDLoc(V), VT, V);
1824 /// getAddrSpaceCast - Return an AddrSpaceCastSDNode.
1825 SDValue SelectionDAG::getAddrSpaceCast(SDLoc dl, EVT VT, SDValue Ptr,
1826 unsigned SrcAS, unsigned DestAS) {
1827 SDValue Ops[] = {Ptr};
1828 FoldingSetNodeID ID;
1829 AddNodeIDNode(ID, ISD::ADDRSPACECAST, getVTList(VT), Ops);
1830 ID.AddInteger(SrcAS);
1831 ID.AddInteger(DestAS);
1834 if (SDNode *E = FindNodeOrInsertPos(ID, dl.getDebugLoc(), IP))
1835 return SDValue(E, 0);
1837 SDNode *N = new (NodeAllocator) AddrSpaceCastSDNode(dl.getIROrder(),
1839 VT, Ptr, SrcAS, DestAS);
1840 CSEMap.InsertNode(N, IP);
1842 return SDValue(N, 0);
1845 /// getShiftAmountOperand - Return the specified value casted to
1846 /// the target's desired shift amount type.
1847 SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) {
1848 EVT OpTy = Op.getValueType();
1849 EVT ShTy = TLI->getShiftAmountTy(LHSTy, getDataLayout());
1850 if (OpTy == ShTy || OpTy.isVector()) return Op;
1852 return getZExtOrTrunc(Op, SDLoc(Op), ShTy);
1855 SDValue SelectionDAG::expandVAArg(SDNode *Node) {
1857 const TargetLowering &TLI = getTargetLoweringInfo();
1858 const Value *V = cast<SrcValueSDNode>(Node->getOperand(2))->getValue();
1859 EVT VT = Node->getValueType(0);
1860 SDValue Tmp1 = Node->getOperand(0);
1861 SDValue Tmp2 = Node->getOperand(1);
1862 unsigned Align = Node->getConstantOperandVal(3);
1864 SDValue VAListLoad =
1865 getLoad(TLI.getPointerTy(getDataLayout()), dl, Tmp1, Tmp2,
1866 MachinePointerInfo(V), false, false, false, 0);
1867 SDValue VAList = VAListLoad;
1869 if (Align > TLI.getMinStackArgumentAlignment()) {
1870 assert(((Align & (Align-1)) == 0) && "Expected Align to be a power of 2");
1872 VAList = getNode(ISD::ADD, dl, VAList.getValueType(), VAList,
1873 getConstant(Align - 1, dl, VAList.getValueType()));
1875 VAList = getNode(ISD::AND, dl, VAList.getValueType(), VAList,
1876 getConstant(-(int64_t)Align, dl, VAList.getValueType()));
1879 // Increment the pointer, VAList, to the next vaarg
1880 Tmp1 = getNode(ISD::ADD, dl, VAList.getValueType(), VAList,
1881 getConstant(getDataLayout().getTypeAllocSize(
1882 VT.getTypeForEVT(*getContext())),
1883 dl, VAList.getValueType()));
1884 // Store the incremented VAList to the legalized pointer
1885 Tmp1 = getStore(VAListLoad.getValue(1), dl, Tmp1, Tmp2,
1886 MachinePointerInfo(V), false, false, 0);
1887 // Load the actual argument out of the pointer VAList
1888 return getLoad(VT, dl, Tmp1, VAList, MachinePointerInfo(),
1889 false, false, false, 0);
1892 SDValue SelectionDAG::expandVACopy(SDNode *Node) {
1894 const TargetLowering &TLI = getTargetLoweringInfo();
1895 // This defaults to loading a pointer from the input and storing it to the
1896 // output, returning the chain.
1897 const Value *VD = cast<SrcValueSDNode>(Node->getOperand(3))->getValue();
1898 const Value *VS = cast<SrcValueSDNode>(Node->getOperand(4))->getValue();
1899 SDValue Tmp1 = getLoad(TLI.getPointerTy(getDataLayout()), dl,
1900 Node->getOperand(0), Node->getOperand(2),
1901 MachinePointerInfo(VS), false, false, false, 0);
1902 return getStore(Tmp1.getValue(1), dl, Tmp1, Node->getOperand(1),
1903 MachinePointerInfo(VD), false, false, 0);
1906 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1907 /// specified value type.
1908 SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
1909 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1910 unsigned ByteSize = VT.getStoreSize();
1911 Type *Ty = VT.getTypeForEVT(*getContext());
1912 unsigned StackAlign =
1913 std::max((unsigned)getDataLayout().getPrefTypeAlignment(Ty), minAlign);
1915 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false);
1916 return getFrameIndex(FrameIdx, TLI->getPointerTy(getDataLayout()));
1919 /// CreateStackTemporary - Create a stack temporary suitable for holding
1920 /// either of the specified value types.
1921 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
1922 unsigned Bytes = std::max(VT1.getStoreSize(), VT2.getStoreSize());
1923 Type *Ty1 = VT1.getTypeForEVT(*getContext());
1924 Type *Ty2 = VT2.getTypeForEVT(*getContext());
1925 const DataLayout &DL = getDataLayout();
1927 std::max(DL.getPrefTypeAlignment(Ty1), DL.getPrefTypeAlignment(Ty2));
1929 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1930 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false);
1931 return getFrameIndex(FrameIdx, TLI->getPointerTy(getDataLayout()));
1934 SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
1935 SDValue N2, ISD::CondCode Cond, SDLoc dl) {
1936 // These setcc operations always fold.
1940 case ISD::SETFALSE2: return getConstant(0, dl, VT);
1942 case ISD::SETTRUE2: {
1943 TargetLowering::BooleanContent Cnt =
1944 TLI->getBooleanContents(N1->getValueType(0));
1946 Cnt == TargetLowering::ZeroOrNegativeOneBooleanContent ? -1ULL : 1, dl,
1960 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1964 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2)) {
1965 const APInt &C2 = N2C->getAPIntValue();
1966 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1)) {
1967 const APInt &C1 = N1C->getAPIntValue();
1970 default: llvm_unreachable("Unknown integer setcc!");
1971 case ISD::SETEQ: return getConstant(C1 == C2, dl, VT);
1972 case ISD::SETNE: return getConstant(C1 != C2, dl, VT);
1973 case ISD::SETULT: return getConstant(C1.ult(C2), dl, VT);
1974 case ISD::SETUGT: return getConstant(C1.ugt(C2), dl, VT);
1975 case ISD::SETULE: return getConstant(C1.ule(C2), dl, VT);
1976 case ISD::SETUGE: return getConstant(C1.uge(C2), dl, VT);
1977 case ISD::SETLT: return getConstant(C1.slt(C2), dl, VT);
1978 case ISD::SETGT: return getConstant(C1.sgt(C2), dl, VT);
1979 case ISD::SETLE: return getConstant(C1.sle(C2), dl, VT);
1980 case ISD::SETGE: return getConstant(C1.sge(C2), dl, VT);
1984 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1)) {
1985 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2)) {
1986 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1989 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1990 return getUNDEF(VT);
1992 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, dl, VT);
1993 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1994 return getUNDEF(VT);
1996 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1997 R==APFloat::cmpLessThan, dl, VT);
1998 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1999 return getUNDEF(VT);
2001 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, dl, VT);
2002 case ISD::SETGT: if (R==APFloat::cmpUnordered)
2003 return getUNDEF(VT);
2005 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, dl, VT);
2006 case ISD::SETLE: if (R==APFloat::cmpUnordered)
2007 return getUNDEF(VT);
2009 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
2010 R==APFloat::cmpEqual, dl, VT);
2011 case ISD::SETGE: if (R==APFloat::cmpUnordered)
2012 return getUNDEF(VT);
2014 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
2015 R==APFloat::cmpEqual, dl, VT);
2016 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, dl, VT);
2017 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, dl, VT);
2018 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
2019 R==APFloat::cmpEqual, dl, VT);
2020 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, dl, VT);
2021 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
2022 R==APFloat::cmpLessThan, dl, VT);
2023 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
2024 R==APFloat::cmpUnordered, dl, VT);
2025 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, dl, VT);
2026 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, dl, VT);
2029 // Ensure that the constant occurs on the RHS.
2030 ISD::CondCode SwappedCond = ISD::getSetCCSwappedOperands(Cond);
2031 MVT CompVT = N1.getValueType().getSimpleVT();
2032 if (!TLI->isCondCodeLegal(SwappedCond, CompVT))
2035 return getSetCC(dl, VT, N2, N1, SwappedCond);
2039 // Could not fold it.
2043 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
2044 /// use this predicate to simplify operations downstream.
2045 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
2046 // This predicate is not safe for vector operations.
2047 if (Op.getValueType().isVector())
2050 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
2051 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
2054 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
2055 /// this predicate to simplify operations downstream. Mask is known to be zero
2056 /// for bits that V cannot have.
2057 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
2058 unsigned Depth) const {
2059 APInt KnownZero, KnownOne;
2060 computeKnownBits(Op, KnownZero, KnownOne, Depth);
2061 return (KnownZero & Mask) == Mask;
2064 /// Determine which bits of Op are known to be either zero or one and return
2065 /// them in the KnownZero/KnownOne bitsets.
2066 void SelectionDAG::computeKnownBits(SDValue Op, APInt &KnownZero,
2067 APInt &KnownOne, unsigned Depth) const {
2068 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
2070 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
2072 return; // Limit search depth.
2074 APInt KnownZero2, KnownOne2;
2076 switch (Op.getOpcode()) {
2078 // We know all of the bits for a constant!
2079 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue();
2080 KnownZero = ~KnownOne;
2083 // If either the LHS or the RHS are Zero, the result is zero.
2084 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
2085 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2087 // Output known-1 bits are only known if set in both the LHS & RHS.
2088 KnownOne &= KnownOne2;
2089 // Output known-0 are known to be clear if zero in either the LHS | RHS.
2090 KnownZero |= KnownZero2;
2093 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
2094 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2096 // Output known-0 bits are only known if clear in both the LHS & RHS.
2097 KnownZero &= KnownZero2;
2098 // Output known-1 are known to be set if set in either the LHS | RHS.
2099 KnownOne |= KnownOne2;
2102 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
2103 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2105 // Output known-0 bits are known if clear or set in both the LHS & RHS.
2106 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
2107 // Output known-1 are known to be set if set in only one of the LHS, RHS.
2108 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
2109 KnownZero = KnownZeroOut;
2113 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
2114 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2116 // If low bits are zero in either operand, output low known-0 bits.
2117 // Also compute a conserative estimate for high known-0 bits.
2118 // More trickiness is possible, but this is sufficient for the
2119 // interesting case of alignment computation.
2120 KnownOne.clearAllBits();
2121 unsigned TrailZ = KnownZero.countTrailingOnes() +
2122 KnownZero2.countTrailingOnes();
2123 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
2124 KnownZero2.countLeadingOnes(),
2125 BitWidth) - BitWidth;
2127 TrailZ = std::min(TrailZ, BitWidth);
2128 LeadZ = std::min(LeadZ, BitWidth);
2129 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
2130 APInt::getHighBitsSet(BitWidth, LeadZ);
2134 // For the purposes of computing leading zeros we can conservatively
2135 // treat a udiv as a logical right shift by the power of 2 known to
2136 // be less than the denominator.
2137 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2138 unsigned LeadZ = KnownZero2.countLeadingOnes();
2140 KnownOne2.clearAllBits();
2141 KnownZero2.clearAllBits();
2142 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2143 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
2144 if (RHSUnknownLeadingOnes != BitWidth)
2145 LeadZ = std::min(BitWidth,
2146 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
2148 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ);
2152 computeKnownBits(Op.getOperand(2), KnownZero, KnownOne, Depth+1);
2153 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2155 // Only known if known in both the LHS and RHS.
2156 KnownOne &= KnownOne2;
2157 KnownZero &= KnownZero2;
2159 case ISD::SELECT_CC:
2160 computeKnownBits(Op.getOperand(3), KnownZero, KnownOne, Depth+1);
2161 computeKnownBits(Op.getOperand(2), KnownZero2, KnownOne2, Depth+1);
2163 // Only known if known in both the LHS and RHS.
2164 KnownOne &= KnownOne2;
2165 KnownZero &= KnownZero2;
2173 if (Op.getResNo() != 1)
2175 // The boolean result conforms to getBooleanContents.
2176 // If we know the result of a setcc has the top bits zero, use this info.
2177 // We know that we have an integer-based boolean since these operations
2178 // are only available for integer.
2179 if (TLI->getBooleanContents(Op.getValueType().isVector(), false) ==
2180 TargetLowering::ZeroOrOneBooleanContent &&
2182 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
2185 // If we know the result of a setcc has the top bits zero, use this info.
2186 if (TLI->getBooleanContents(Op.getOperand(0).getValueType()) ==
2187 TargetLowering::ZeroOrOneBooleanContent &&
2189 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
2192 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
2193 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2194 unsigned ShAmt = SA->getZExtValue();
2196 // If the shift count is an invalid immediate, don't do anything.
2197 if (ShAmt >= BitWidth)
2200 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2201 KnownZero <<= ShAmt;
2203 // low bits known zero.
2204 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
2208 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
2209 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2210 unsigned ShAmt = SA->getZExtValue();
2212 // If the shift count is an invalid immediate, don't do anything.
2213 if (ShAmt >= BitWidth)
2216 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2217 KnownZero = KnownZero.lshr(ShAmt);
2218 KnownOne = KnownOne.lshr(ShAmt);
2220 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
2221 KnownZero |= HighBits; // High bits known zero.
2225 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2226 unsigned ShAmt = SA->getZExtValue();
2228 // If the shift count is an invalid immediate, don't do anything.
2229 if (ShAmt >= BitWidth)
2232 // If any of the demanded bits are produced by the sign extension, we also
2233 // demand the input sign bit.
2234 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
2236 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2237 KnownZero = KnownZero.lshr(ShAmt);
2238 KnownOne = KnownOne.lshr(ShAmt);
2240 // Handle the sign bits.
2241 APInt SignBit = APInt::getSignBit(BitWidth);
2242 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
2244 if (KnownZero.intersects(SignBit)) {
2245 KnownZero |= HighBits; // New bits are known zero.
2246 } else if (KnownOne.intersects(SignBit)) {
2247 KnownOne |= HighBits; // New bits are known one.
2251 case ISD::SIGN_EXTEND_INREG: {
2252 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
2253 unsigned EBits = EVT.getScalarType().getSizeInBits();
2255 // Sign extension. Compute the demanded bits in the result that are not
2256 // present in the input.
2257 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits);
2259 APInt InSignBit = APInt::getSignBit(EBits);
2260 APInt InputDemandedBits = APInt::getLowBitsSet(BitWidth, EBits);
2262 // If the sign extended bits are demanded, we know that the sign
2264 InSignBit = InSignBit.zext(BitWidth);
2265 if (NewBits.getBoolValue())
2266 InputDemandedBits |= InSignBit;
2268 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2269 KnownOne &= InputDemandedBits;
2270 KnownZero &= InputDemandedBits;
2272 // If the sign bit of the input is known set or clear, then we know the
2273 // top bits of the result.
2274 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
2275 KnownZero |= NewBits;
2276 KnownOne &= ~NewBits;
2277 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
2278 KnownOne |= NewBits;
2279 KnownZero &= ~NewBits;
2280 } else { // Input sign bit unknown
2281 KnownZero &= ~NewBits;
2282 KnownOne &= ~NewBits;
2287 case ISD::CTTZ_ZERO_UNDEF:
2289 case ISD::CTLZ_ZERO_UNDEF:
2291 unsigned LowBits = Log2_32(BitWidth)+1;
2292 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
2293 KnownOne.clearAllBits();
2297 LoadSDNode *LD = cast<LoadSDNode>(Op);
2298 // If this is a ZEXTLoad and we are looking at the loaded value.
2299 if (ISD::isZEXTLoad(Op.getNode()) && Op.getResNo() == 0) {
2300 EVT VT = LD->getMemoryVT();
2301 unsigned MemBits = VT.getScalarType().getSizeInBits();
2302 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits);
2303 } else if (const MDNode *Ranges = LD->getRanges()) {
2304 computeKnownBitsFromRangeMetadata(*Ranges, KnownZero);
2308 case ISD::ZERO_EXTEND: {
2309 EVT InVT = Op.getOperand(0).getValueType();
2310 unsigned InBits = InVT.getScalarType().getSizeInBits();
2311 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
2312 KnownZero = KnownZero.trunc(InBits);
2313 KnownOne = KnownOne.trunc(InBits);
2314 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2315 KnownZero = KnownZero.zext(BitWidth);
2316 KnownOne = KnownOne.zext(BitWidth);
2317 KnownZero |= NewBits;
2320 case ISD::SIGN_EXTEND: {
2321 EVT InVT = Op.getOperand(0).getValueType();
2322 unsigned InBits = InVT.getScalarType().getSizeInBits();
2323 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
2325 KnownZero = KnownZero.trunc(InBits);
2326 KnownOne = KnownOne.trunc(InBits);
2327 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2329 // Note if the sign bit is known to be zero or one.
2330 bool SignBitKnownZero = KnownZero.isNegative();
2331 bool SignBitKnownOne = KnownOne.isNegative();
2333 KnownZero = KnownZero.zext(BitWidth);
2334 KnownOne = KnownOne.zext(BitWidth);
2336 // If the sign bit is known zero or one, the top bits match.
2337 if (SignBitKnownZero)
2338 KnownZero |= NewBits;
2339 else if (SignBitKnownOne)
2340 KnownOne |= NewBits;
2343 case ISD::ANY_EXTEND: {
2344 EVT InVT = Op.getOperand(0).getValueType();
2345 unsigned InBits = InVT.getScalarType().getSizeInBits();
2346 KnownZero = KnownZero.trunc(InBits);
2347 KnownOne = KnownOne.trunc(InBits);
2348 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2349 KnownZero = KnownZero.zext(BitWidth);
2350 KnownOne = KnownOne.zext(BitWidth);
2353 case ISD::TRUNCATE: {
2354 EVT InVT = Op.getOperand(0).getValueType();
2355 unsigned InBits = InVT.getScalarType().getSizeInBits();
2356 KnownZero = KnownZero.zext(InBits);
2357 KnownOne = KnownOne.zext(InBits);
2358 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2359 KnownZero = KnownZero.trunc(BitWidth);
2360 KnownOne = KnownOne.trunc(BitWidth);
2363 case ISD::AssertZext: {
2364 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
2365 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
2366 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2367 KnownZero |= (~InMask);
2368 KnownOne &= (~KnownZero);
2372 // All bits are zero except the low bit.
2373 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
2377 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
2378 // We know that the top bits of C-X are clear if X contains less bits
2379 // than C (i.e. no wrap-around can happen). For example, 20-X is
2380 // positive if we can prove that X is >= 0 and < 16.
2381 if (CLHS->getAPIntValue().isNonNegative()) {
2382 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
2383 // NLZ can't be BitWidth with no sign bit
2384 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
2385 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2387 // If all of the MaskV bits are known to be zero, then we know the
2388 // output top bits are zero, because we now know that the output is
2390 if ((KnownZero2 & MaskV) == MaskV) {
2391 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
2392 // Top bits known zero.
2393 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2);
2401 // Output known-0 bits are known if clear or set in both the low clear bits
2402 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
2403 // low 3 bits clear.
2404 // Output known-0 bits are also known if the top bits of each input are
2405 // known to be clear. For example, if one input has the top 10 bits clear
2406 // and the other has the top 8 bits clear, we know the top 7 bits of the
2407 // output must be clear.
2408 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2409 unsigned KnownZeroHigh = KnownZero2.countLeadingOnes();
2410 unsigned KnownZeroLow = KnownZero2.countTrailingOnes();
2412 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2413 KnownZeroHigh = std::min(KnownZeroHigh,
2414 KnownZero2.countLeadingOnes());
2415 KnownZeroLow = std::min(KnownZeroLow,
2416 KnownZero2.countTrailingOnes());
2418 if (Op.getOpcode() == ISD::ADD) {
2419 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroLow);
2420 if (KnownZeroHigh > 1)
2421 KnownZero |= APInt::getHighBitsSet(BitWidth, KnownZeroHigh - 1);
2425 // With ADDE, a carry bit may be added in, so we can only use this
2426 // information if we know (at least) that the low two bits are clear. We
2427 // then return to the caller that the low bit is unknown but that other bits
2429 if (KnownZeroLow >= 2) // ADDE
2430 KnownZero |= APInt::getBitsSet(BitWidth, 1, KnownZeroLow);
2434 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2435 const APInt &RA = Rem->getAPIntValue().abs();
2436 if (RA.isPowerOf2()) {
2437 APInt LowBits = RA - 1;
2438 computeKnownBits(Op.getOperand(0), KnownZero2,KnownOne2,Depth+1);
2440 // The low bits of the first operand are unchanged by the srem.
2441 KnownZero = KnownZero2 & LowBits;
2442 KnownOne = KnownOne2 & LowBits;
2444 // If the first operand is non-negative or has all low bits zero, then
2445 // the upper bits are all zero.
2446 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
2447 KnownZero |= ~LowBits;
2449 // If the first operand is negative and not all low bits are zero, then
2450 // the upper bits are all one.
2451 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0))
2452 KnownOne |= ~LowBits;
2453 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2458 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2459 const APInt &RA = Rem->getAPIntValue();
2460 if (RA.isPowerOf2()) {
2461 APInt LowBits = (RA - 1);
2462 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth + 1);
2464 // The upper bits are all zero, the lower ones are unchanged.
2465 KnownZero = KnownZero2 | ~LowBits;
2466 KnownOne = KnownOne2 & LowBits;
2471 // Since the result is less than or equal to either operand, any leading
2472 // zero bits in either operand must also exist in the result.
2473 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2474 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2476 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
2477 KnownZero2.countLeadingOnes());
2478 KnownOne.clearAllBits();
2479 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders);
2482 case ISD::EXTRACT_ELEMENT: {
2483 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2484 const unsigned Index =
2485 cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();
2486 const unsigned BitWidth = Op.getValueType().getSizeInBits();
2488 // Remove low part of known bits mask
2489 KnownZero = KnownZero.getHiBits(KnownZero.getBitWidth() - Index * BitWidth);
2490 KnownOne = KnownOne.getHiBits(KnownOne.getBitWidth() - Index * BitWidth);
2492 // Remove high part of known bit mask
2493 KnownZero = KnownZero.trunc(BitWidth);
2494 KnownOne = KnownOne.trunc(BitWidth);
2501 APInt Op0Zero, Op0One;
2502 APInt Op1Zero, Op1One;
2503 computeKnownBits(Op.getOperand(0), Op0Zero, Op0One, Depth);
2504 computeKnownBits(Op.getOperand(1), Op1Zero, Op1One, Depth);
2506 KnownZero = Op0Zero & Op1Zero;
2507 KnownOne = Op0One & Op1One;
2510 case ISD::FrameIndex:
2511 case ISD::TargetFrameIndex:
2512 if (unsigned Align = InferPtrAlignment(Op)) {
2513 // The low bits are known zero if the pointer is aligned.
2514 KnownZero = APInt::getLowBitsSet(BitWidth, Log2_32(Align));
2520 if (Op.getOpcode() < ISD::BUILTIN_OP_END)
2523 case ISD::INTRINSIC_WO_CHAIN:
2524 case ISD::INTRINSIC_W_CHAIN:
2525 case ISD::INTRINSIC_VOID:
2526 // Allow the target to implement this method for its nodes.
2527 TLI->computeKnownBitsForTargetNode(Op, KnownZero, KnownOne, *this, Depth);
2531 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
2534 /// ComputeNumSignBits - Return the number of times the sign bit of the
2535 /// register is replicated into the other bits. We know that at least 1 bit
2536 /// is always equal to the sign bit (itself), but other cases can give us
2537 /// information. For example, immediately after an "SRA X, 2", we know that
2538 /// the top 3 bits are all equal to each other, so we return 3.
2539 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
2540 EVT VT = Op.getValueType();
2541 assert(VT.isInteger() && "Invalid VT!");
2542 unsigned VTBits = VT.getScalarType().getSizeInBits();
2544 unsigned FirstAnswer = 1;
2547 return 1; // Limit search depth.
2549 switch (Op.getOpcode()) {
2551 case ISD::AssertSext:
2552 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2553 return VTBits-Tmp+1;
2554 case ISD::AssertZext:
2555 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2558 case ISD::Constant: {
2559 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2560 return Val.getNumSignBits();
2563 case ISD::SIGN_EXTEND:
2565 VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
2566 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2568 case ISD::SIGN_EXTEND_INREG:
2569 // Max of the input and what this extends.
2571 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits();
2574 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2575 return std::max(Tmp, Tmp2);
2578 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2579 // SRA X, C -> adds C sign bits.
2580 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2581 Tmp += C->getZExtValue();
2582 if (Tmp > VTBits) Tmp = VTBits;
2586 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2587 // shl destroys sign bits.
2588 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2589 if (C->getZExtValue() >= VTBits || // Bad shift.
2590 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
2591 return Tmp - C->getZExtValue();
2596 case ISD::XOR: // NOT is handled here.
2597 // Logical binary ops preserve the number of sign bits at the worst.
2598 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2600 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2601 FirstAnswer = std::min(Tmp, Tmp2);
2602 // We computed what we know about the sign bits as our first
2603 // answer. Now proceed to the generic code that uses
2604 // computeKnownBits, and pick whichever answer is better.
2609 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2610 if (Tmp == 1) return 1; // Early out.
2611 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2612 return std::min(Tmp, Tmp2);
2613 case ISD::SELECT_CC:
2614 Tmp = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2615 if (Tmp == 1) return 1; // Early out.
2616 Tmp2 = ComputeNumSignBits(Op.getOperand(3), Depth+1);
2617 return std::min(Tmp, Tmp2);
2622 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth + 1);
2624 return 1; // Early out.
2625 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth + 1);
2626 return std::min(Tmp, Tmp2);
2633 if (Op.getResNo() != 1)
2635 // The boolean result conforms to getBooleanContents. Fall through.
2636 // If setcc returns 0/-1, all bits are sign bits.
2637 // We know that we have an integer-based boolean since these operations
2638 // are only available for integer.
2639 if (TLI->getBooleanContents(Op.getValueType().isVector(), false) ==
2640 TargetLowering::ZeroOrNegativeOneBooleanContent)
2644 // If setcc returns 0/-1, all bits are sign bits.
2645 if (TLI->getBooleanContents(Op.getOperand(0).getValueType()) ==
2646 TargetLowering::ZeroOrNegativeOneBooleanContent)
2651 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2652 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2654 // Handle rotate right by N like a rotate left by 32-N.
2655 if (Op.getOpcode() == ISD::ROTR)
2656 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2658 // If we aren't rotating out all of the known-in sign bits, return the
2659 // number that are left. This handles rotl(sext(x), 1) for example.
2660 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2661 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2665 // Add can have at most one carry bit. Thus we know that the output
2666 // is, at worst, one more bit than the inputs.
2667 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2668 if (Tmp == 1) return 1; // Early out.
2670 // Special case decrementing a value (ADD X, -1):
2671 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2672 if (CRHS->isAllOnesValue()) {
2673 APInt KnownZero, KnownOne;
2674 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2676 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2678 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue())
2681 // If we are subtracting one from a positive number, there is no carry
2682 // out of the result.
2683 if (KnownZero.isNegative())
2687 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2688 if (Tmp2 == 1) return 1;
2689 return std::min(Tmp, Tmp2)-1;
2692 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2693 if (Tmp2 == 1) return 1;
2696 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2697 if (CLHS->isNullValue()) {
2698 APInt KnownZero, KnownOne;
2699 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
2700 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2702 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue())
2705 // If the input is known to be positive (the sign bit is known clear),
2706 // the output of the NEG has the same number of sign bits as the input.
2707 if (KnownZero.isNegative())
2710 // Otherwise, we treat this like a SUB.
2713 // Sub can have at most one carry bit. Thus we know that the output
2714 // is, at worst, one more bit than the inputs.
2715 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2716 if (Tmp == 1) return 1; // Early out.
2717 return std::min(Tmp, Tmp2)-1;
2719 // FIXME: it's tricky to do anything useful for this, but it is an important
2720 // case for targets like X86.
2722 case ISD::EXTRACT_ELEMENT: {
2723 const int KnownSign = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2724 const int BitWidth = Op.getValueType().getSizeInBits();
2726 Op.getOperand(0).getValueType().getSizeInBits() / BitWidth;
2728 // Get reverse index (starting from 1), Op1 value indexes elements from
2729 // little end. Sign starts at big end.
2730 const int rIndex = Items - 1 -
2731 cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();
2733 // If the sign portion ends in our element the subtraction gives correct
2734 // result. Otherwise it gives either negative or > bitwidth result
2735 return std::max(std::min(KnownSign - rIndex * BitWidth, BitWidth), 0);
2739 // If we are looking at the loaded value of the SDNode.
2740 if (Op.getResNo() == 0) {
2741 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2742 if (LoadSDNode *LD = dyn_cast<LoadSDNode>(Op)) {
2743 unsigned ExtType = LD->getExtensionType();
2746 case ISD::SEXTLOAD: // '17' bits known
2747 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2748 return VTBits-Tmp+1;
2749 case ISD::ZEXTLOAD: // '16' bits known
2750 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2756 // Allow the target to implement this method for its nodes.
2757 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2758 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2759 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2760 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2761 unsigned NumBits = TLI->ComputeNumSignBitsForTargetNode(Op, *this, Depth);
2762 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2765 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2766 // use this information.
2767 APInt KnownZero, KnownOne;
2768 computeKnownBits(Op, KnownZero, KnownOne, Depth);
2771 if (KnownZero.isNegative()) { // sign bit is 0
2773 } else if (KnownOne.isNegative()) { // sign bit is 1;
2780 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2781 // the number of identical bits in the top of the input value.
2783 Mask <<= Mask.getBitWidth()-VTBits;
2784 // Return # leading zeros. We use 'min' here in case Val was zero before
2785 // shifting. We don't want to return '64' as for an i32 "0".
2786 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2789 /// isBaseWithConstantOffset - Return true if the specified operand is an
2790 /// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an
2791 /// ISD::OR with a ConstantSDNode that is guaranteed to have the same
2792 /// semantics as an ADD. This handles the equivalence:
2793 /// X|Cst == X+Cst iff X&Cst = 0.
2794 bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const {
2795 if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) ||
2796 !isa<ConstantSDNode>(Op.getOperand(1)))
2799 if (Op.getOpcode() == ISD::OR &&
2800 !MaskedValueIsZero(Op.getOperand(0),
2801 cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue()))
2808 bool SelectionDAG::isKnownNeverNaN(SDValue Op) const {
2809 // If we're told that NaNs won't happen, assume they won't.
2810 if (getTarget().Options.NoNaNsFPMath)
2813 // If the value is a constant, we can obviously see if it is a NaN or not.
2814 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2815 return !C->getValueAPF().isNaN();
2817 // TODO: Recognize more cases here.
2822 bool SelectionDAG::isKnownNeverZero(SDValue Op) const {
2823 // If the value is a constant, we can obviously see if it is a zero or not.
2824 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2825 return !C->isZero();
2827 // TODO: Recognize more cases here.
2828 switch (Op.getOpcode()) {
2831 if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2832 return !C->isNullValue();
2839 bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const {
2840 // Check the obvious case.
2841 if (A == B) return true;
2843 // For for negative and positive zero.
2844 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A))
2845 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B))
2846 if (CA->isZero() && CB->isZero()) return true;
2848 // Otherwise they may not be equal.
2852 /// getNode - Gets or creates the specified node.
2854 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT) {
2855 FoldingSetNodeID ID;
2856 AddNodeIDNode(ID, Opcode, getVTList(VT), None);
2858 if (SDNode *E = FindNodeOrInsertPos(ID, DL.getDebugLoc(), IP))
2859 return SDValue(E, 0);
2861 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(),
2862 DL.getDebugLoc(), getVTList(VT));
2863 CSEMap.InsertNode(N, IP);
2866 return SDValue(N, 0);
2869 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL,
2870 EVT VT, SDValue Operand) {
2871 // Constant fold unary operations with an integer constant operand. Even
2872 // opaque constant will be folded, because the folding of unary operations
2873 // doesn't create new constants with different values. Nevertheless, the
2874 // opaque flag is preserved during folding to prevent future folding with
2876 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand)) {
2877 const APInt &Val = C->getAPIntValue();
2880 case ISD::SIGN_EXTEND:
2881 return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), DL, VT,
2882 C->isTargetOpcode(), C->isOpaque());
2883 case ISD::ANY_EXTEND:
2884 case ISD::ZERO_EXTEND:
2886 return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), DL, VT,
2887 C->isTargetOpcode(), C->isOpaque());
2888 case ISD::UINT_TO_FP:
2889 case ISD::SINT_TO_FP: {
2890 APFloat apf(EVTToAPFloatSemantics(VT),
2891 APInt::getNullValue(VT.getSizeInBits()));
2892 (void)apf.convertFromAPInt(Val,
2893 Opcode==ISD::SINT_TO_FP,
2894 APFloat::rmNearestTiesToEven);
2895 return getConstantFP(apf, DL, VT);
2898 if (VT == MVT::f16 && C->getValueType(0) == MVT::i16)
2899 return getConstantFP(APFloat(APFloat::IEEEhalf, Val), DL, VT);
2900 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2901 return getConstantFP(APFloat(APFloat::IEEEsingle, Val), DL, VT);
2902 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2903 return getConstantFP(APFloat(APFloat::IEEEdouble, Val), DL, VT);
2906 return getConstant(Val.byteSwap(), DL, VT, C->isTargetOpcode(),
2909 return getConstant(Val.countPopulation(), DL, VT, C->isTargetOpcode(),
2912 case ISD::CTLZ_ZERO_UNDEF:
2913 return getConstant(Val.countLeadingZeros(), DL, VT, C->isTargetOpcode(),
2916 case ISD::CTTZ_ZERO_UNDEF:
2917 return getConstant(Val.countTrailingZeros(), DL, VT, C->isTargetOpcode(),
2922 // Constant fold unary operations with a floating point constant operand.
2923 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand)) {
2924 APFloat V = C->getValueAPF(); // make copy
2928 return getConstantFP(V, DL, VT);
2931 return getConstantFP(V, DL, VT);
2933 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardPositive);
2934 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2935 return getConstantFP(V, DL, VT);
2939 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardZero);
2940 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2941 return getConstantFP(V, DL, VT);
2945 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardNegative);
2946 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2947 return getConstantFP(V, DL, VT);
2950 case ISD::FP_EXTEND: {
2952 // This can return overflow, underflow, or inexact; we don't care.
2953 // FIXME need to be more flexible about rounding mode.
2954 (void)V.convert(EVTToAPFloatSemantics(VT),
2955 APFloat::rmNearestTiesToEven, &ignored);
2956 return getConstantFP(V, DL, VT);
2958 case ISD::FP_TO_SINT:
2959 case ISD::FP_TO_UINT: {
2962 static_assert(integerPartWidth >= 64, "APFloat parts too small!");
2963 // FIXME need to be more flexible about rounding mode.
2964 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2965 Opcode==ISD::FP_TO_SINT,
2966 APFloat::rmTowardZero, &ignored);
2967 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2969 APInt api(VT.getSizeInBits(), x);
2970 return getConstant(api, DL, VT);
2973 if (VT == MVT::i16 && C->getValueType(0) == MVT::f16)
2974 return getConstant((uint16_t)V.bitcastToAPInt().getZExtValue(), DL, VT);
2975 else if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2976 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), DL, VT);
2977 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2978 return getConstant(V.bitcastToAPInt().getZExtValue(), DL, VT);
2983 // Constant fold unary operations with a vector integer or float operand.
2984 if (BuildVectorSDNode *BV = dyn_cast<BuildVectorSDNode>(Operand)) {
2985 if (BV->isConstant()) {
2988 // FIXME: Entirely reasonable to perform folding of other unary
2989 // operations here as the need arises.
2996 case ISD::FP_EXTEND:
2997 case ISD::FP_TO_SINT:
2998 case ISD::FP_TO_UINT:
3000 case ISD::UINT_TO_FP:
3001 case ISD::SINT_TO_FP:
3004 case ISD::CTLZ_ZERO_UNDEF:
3006 case ISD::CTTZ_ZERO_UNDEF:
3008 EVT SVT = VT.getScalarType();
3009 EVT InVT = BV->getValueType(0);
3010 EVT InSVT = InVT.getScalarType();
3012 // Find legal integer scalar type for constant promotion and
3013 // ensure that its scalar size is at least as large as source.
3015 if (SVT.isInteger()) {
3016 LegalSVT = TLI->getTypeToTransformTo(*getContext(), SVT);
3017 if (LegalSVT.bitsLT(SVT)) break;
3020 // Let the above scalar folding handle the folding of each element.
3021 SmallVector<SDValue, 8> Ops;
3022 for (int i = 0, e = VT.getVectorNumElements(); i != e; ++i) {
3023 SDValue OpN = BV->getOperand(i);
3024 EVT OpVT = OpN.getValueType();
3026 // Build vector (integer) scalar operands may need implicit
3027 // truncation - do this before constant folding.
3028 if (OpVT.isInteger() && OpVT.bitsGT(InSVT))
3029 OpN = getNode(ISD::TRUNCATE, DL, InSVT, OpN);
3031 OpN = getNode(Opcode, DL, SVT, OpN);
3033 // Legalize the (integer) scalar constant if necessary.
3034 if (LegalSVT != SVT)
3035 OpN = getNode(ISD::ANY_EXTEND, DL, LegalSVT, OpN);
3037 if (OpN.getOpcode() != ISD::UNDEF &&
3038 OpN.getOpcode() != ISD::Constant &&
3039 OpN.getOpcode() != ISD::ConstantFP)
3043 if (Ops.size() == VT.getVectorNumElements())
3044 return getNode(ISD::BUILD_VECTOR, DL, VT, Ops);
3051 unsigned OpOpcode = Operand.getNode()->getOpcode();
3053 case ISD::TokenFactor:
3054 case ISD::MERGE_VALUES:
3055 case ISD::CONCAT_VECTORS:
3056 return Operand; // Factor, merge or concat of one node? No need.
3057 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
3058 case ISD::FP_EXTEND:
3059 assert(VT.isFloatingPoint() &&
3060 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
3061 if (Operand.getValueType() == VT) return Operand; // noop conversion.
3062 assert((!VT.isVector() ||
3063 VT.getVectorNumElements() ==
3064 Operand.getValueType().getVectorNumElements()) &&
3065 "Vector element count mismatch!");
3066 assert(Operand.getValueType().bitsLT(VT) &&
3067 "Invalid fpext node, dst < src!");
3068 if (Operand.getOpcode() == ISD::UNDEF)
3069 return getUNDEF(VT);
3071 case ISD::SIGN_EXTEND:
3072 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
3073 "Invalid SIGN_EXTEND!");
3074 if (Operand.getValueType() == VT) return Operand; // noop extension
3075 assert((!VT.isVector() ||
3076 VT.getVectorNumElements() ==
3077 Operand.getValueType().getVectorNumElements()) &&
3078 "Vector element count mismatch!");
3079 assert(Operand.getValueType().bitsLT(VT) &&
3080 "Invalid sext node, dst < src!");
3081 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
3082 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
3083 else if (OpOpcode == ISD::UNDEF)
3084 // sext(undef) = 0, because the top bits will all be the same.
3085 return getConstant(0, DL, VT);
3087 case ISD::ZERO_EXTEND:
3088 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
3089 "Invalid ZERO_EXTEND!");
3090 if (Operand.getValueType() == VT) return Operand; // noop extension
3091 assert((!VT.isVector() ||
3092 VT.getVectorNumElements() ==
3093 Operand.getValueType().getVectorNumElements()) &&
3094 "Vector element count mismatch!");
3095 assert(Operand.getValueType().bitsLT(VT) &&
3096 "Invalid zext node, dst < src!");
3097 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
3098 return getNode(ISD::ZERO_EXTEND, DL, VT,
3099 Operand.getNode()->getOperand(0));
3100 else if (OpOpcode == ISD::UNDEF)
3101 // zext(undef) = 0, because the top bits will be zero.
3102 return getConstant(0, DL, VT);
3104 case ISD::ANY_EXTEND:
3105 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
3106 "Invalid ANY_EXTEND!");
3107 if (Operand.getValueType() == VT) return Operand; // noop extension
3108 assert((!VT.isVector() ||
3109 VT.getVectorNumElements() ==
3110 Operand.getValueType().getVectorNumElements()) &&
3111 "Vector element count mismatch!");
3112 assert(Operand.getValueType().bitsLT(VT) &&
3113 "Invalid anyext node, dst < src!");
3115 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
3116 OpOpcode == ISD::ANY_EXTEND)
3117 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
3118 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
3119 else if (OpOpcode == ISD::UNDEF)
3120 return getUNDEF(VT);
3122 // (ext (trunx x)) -> x
3123 if (OpOpcode == ISD::TRUNCATE) {
3124 SDValue OpOp = Operand.getNode()->getOperand(0);
3125 if (OpOp.getValueType() == VT)
3130 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
3131 "Invalid TRUNCATE!");
3132 if (Operand.getValueType() == VT) return Operand; // noop truncate
3133 assert((!VT.isVector() ||
3134 VT.getVectorNumElements() ==
3135 Operand.getValueType().getVectorNumElements()) &&
3136 "Vector element count mismatch!");
3137 assert(Operand.getValueType().bitsGT(VT) &&
3138 "Invalid truncate node, src < dst!");
3139 if (OpOpcode == ISD::TRUNCATE)
3140 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
3141 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
3142 OpOpcode == ISD::ANY_EXTEND) {
3143 // If the source is smaller than the dest, we still need an extend.
3144 if (Operand.getNode()->getOperand(0).getValueType().getScalarType()
3145 .bitsLT(VT.getScalarType()))
3146 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
3147 if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
3148 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
3149 return Operand.getNode()->getOperand(0);
3151 if (OpOpcode == ISD::UNDEF)
3152 return getUNDEF(VT);
3155 assert(VT.isInteger() && VT == Operand.getValueType() &&
3157 assert((VT.getScalarSizeInBits() % 16 == 0) &&
3158 "BSWAP types must be a multiple of 16 bits!");
3159 if (OpOpcode == ISD::UNDEF)
3160 return getUNDEF(VT);
3163 // Basic sanity checking.
3164 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
3165 && "Cannot BITCAST between types of different sizes!");
3166 if (VT == Operand.getValueType()) return Operand; // noop conversion.
3167 if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x)
3168 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0));
3169 if (OpOpcode == ISD::UNDEF)
3170 return getUNDEF(VT);
3172 case ISD::SCALAR_TO_VECTOR:
3173 assert(VT.isVector() && !Operand.getValueType().isVector() &&
3174 (VT.getVectorElementType() == Operand.getValueType() ||
3175 (VT.getVectorElementType().isInteger() &&
3176 Operand.getValueType().isInteger() &&
3177 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
3178 "Illegal SCALAR_TO_VECTOR node!");
3179 if (OpOpcode == ISD::UNDEF)
3180 return getUNDEF(VT);
3181 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
3182 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
3183 isa<ConstantSDNode>(Operand.getOperand(1)) &&
3184 Operand.getConstantOperandVal(1) == 0 &&
3185 Operand.getOperand(0).getValueType() == VT)
3186 return Operand.getOperand(0);
3189 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
3190 if (getTarget().Options.UnsafeFPMath && OpOpcode == ISD::FSUB)
3191 // FIXME: FNEG has no fast-math-flags to propagate; use the FSUB's flags?
3192 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
3193 Operand.getNode()->getOperand(0),
3194 &cast<BinaryWithFlagsSDNode>(Operand.getNode())->Flags);
3195 if (OpOpcode == ISD::FNEG) // --X -> X
3196 return Operand.getNode()->getOperand(0);
3199 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
3200 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
3205 SDVTList VTs = getVTList(VT);
3206 if (VT != MVT::Glue) { // Don't CSE flag producing nodes
3207 FoldingSetNodeID ID;
3208 SDValue Ops[1] = { Operand };
3209 AddNodeIDNode(ID, Opcode, VTs, Ops);
3211 if (SDNode *E = FindNodeOrInsertPos(ID, DL.getDebugLoc(), IP))
3212 return SDValue(E, 0);
3214 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(),
3215 DL.getDebugLoc(), VTs, Operand);
3216 CSEMap.InsertNode(N, IP);
3218 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(),
3219 DL.getDebugLoc(), VTs, Operand);
3223 return SDValue(N, 0);
3226 static std::pair<APInt, bool> FoldValue(unsigned Opcode, const APInt &C1,
3229 case ISD::ADD: return std::make_pair(C1 + C2, true);
3230 case ISD::SUB: return std::make_pair(C1 - C2, true);
3231 case ISD::MUL: return std::make_pair(C1 * C2, true);
3232 case ISD::AND: return std::make_pair(C1 & C2, true);
3233 case ISD::OR: return std::make_pair(C1 | C2, true);
3234 case ISD::XOR: return std::make_pair(C1 ^ C2, true);
3235 case ISD::SHL: return std::make_pair(C1 << C2, true);
3236 case ISD::SRL: return std::make_pair(C1.lshr(C2), true);
3237 case ISD::SRA: return std::make_pair(C1.ashr(C2), true);
3238 case ISD::ROTL: return std::make_pair(C1.rotl(C2), true);
3239 case ISD::ROTR: return std::make_pair(C1.rotr(C2), true);
3240 case ISD::SMIN: return std::make_pair(C1.sle(C2) ? C1 : C2, true);
3241 case ISD::SMAX: return std::make_pair(C1.sge(C2) ? C1 : C2, true);
3242 case ISD::UMIN: return std::make_pair(C1.ule(C2) ? C1 : C2, true);
3243 case ISD::UMAX: return std::make_pair(C1.uge(C2) ? C1 : C2, true);
3245 if (!C2.getBoolValue())
3247 return std::make_pair(C1.udiv(C2), true);
3249 if (!C2.getBoolValue())
3251 return std::make_pair(C1.urem(C2), true);
3253 if (!C2.getBoolValue())
3255 return std::make_pair(C1.sdiv(C2), true);
3257 if (!C2.getBoolValue())
3259 return std::make_pair(C1.srem(C2), true);
3261 return std::make_pair(APInt(1, 0), false);
3264 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, SDLoc DL, EVT VT,
3265 const ConstantSDNode *Cst1,
3266 const ConstantSDNode *Cst2) {
3267 if (Cst1->isOpaque() || Cst2->isOpaque())
3270 std::pair<APInt, bool> Folded = FoldValue(Opcode, Cst1->getAPIntValue(),
3271 Cst2->getAPIntValue());
3274 return getConstant(Folded.first, DL, VT);
3277 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, SDLoc DL, EVT VT,
3278 SDNode *Cst1, SDNode *Cst2) {
3279 // If the opcode is a target-specific ISD node, there's nothing we can
3280 // do here and the operand rules may not line up with the below, so
3282 if (Opcode >= ISD::BUILTIN_OP_END)
3285 // Handle the case of two scalars.
3286 if (const ConstantSDNode *Scalar1 = dyn_cast<ConstantSDNode>(Cst1)) {
3287 if (const ConstantSDNode *Scalar2 = dyn_cast<ConstantSDNode>(Cst2)) {
3288 if (SDValue Folded =
3289 FoldConstantArithmetic(Opcode, DL, VT, Scalar1, Scalar2)) {
3292 SmallVector<SDValue, 4> Outputs;
3293 // We may have a vector type but a scalar result. Create a splat.
3294 Outputs.resize(VT.getVectorNumElements(), Outputs.back());
3295 // Build a big vector out of the scalar elements we generated.
3296 return getNode(ISD::BUILD_VECTOR, SDLoc(), VT, Outputs);
3303 // For vectors extract each constant element into Inputs so we can constant
3304 // fold them individually.
3305 BuildVectorSDNode *BV1 = dyn_cast<BuildVectorSDNode>(Cst1);
3306 BuildVectorSDNode *BV2 = dyn_cast<BuildVectorSDNode>(Cst2);
3310 assert(BV1->getNumOperands() == BV2->getNumOperands() && "Out of sync!");
3312 EVT SVT = VT.getScalarType();
3313 SmallVector<SDValue, 4> Outputs;
3314 for (unsigned I = 0, E = BV1->getNumOperands(); I != E; ++I) {
3315 ConstantSDNode *V1 = dyn_cast<ConstantSDNode>(BV1->getOperand(I));
3316 ConstantSDNode *V2 = dyn_cast<ConstantSDNode>(BV2->getOperand(I));
3317 if (!V1 || !V2) // Not a constant, bail.
3320 if (V1->isOpaque() || V2->isOpaque())
3323 // Avoid BUILD_VECTOR nodes that perform implicit truncation.
3324 // FIXME: This is valid and could be handled by truncating the APInts.
3325 if (V1->getValueType(0) != SVT || V2->getValueType(0) != SVT)
3328 // Fold one vector element.
3329 std::pair<APInt, bool> Folded = FoldValue(Opcode, V1->getAPIntValue(),
3330 V2->getAPIntValue());
3333 Outputs.push_back(getConstant(Folded.first, DL, SVT));
3336 assert(VT.getVectorNumElements() == Outputs.size() &&
3337 "Vector size mismatch!");
3339 // We may have a vector type but a scalar result. Create a splat.
3340 Outputs.resize(VT.getVectorNumElements(), Outputs.back());
3342 // Build a big vector out of the scalar elements we generated.
3343 return getNode(ISD::BUILD_VECTOR, SDLoc(), VT, Outputs);
3346 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT, SDValue N1,
3347 SDValue N2, const SDNodeFlags *Flags) {
3348 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
3349 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2);
3351 // Canonicalize constant to RHS if commutative.
3352 if (N1C && !N2C && isCommutativeBinOp(Opcode)) {
3353 std::swap(N1C, N2C);
3359 case ISD::TokenFactor:
3360 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
3361 N2.getValueType() == MVT::Other && "Invalid token factor!");
3362 // Fold trivial token factors.
3363 if (N1.getOpcode() == ISD::EntryToken) return N2;
3364 if (N2.getOpcode() == ISD::EntryToken) return N1;
3365 if (N1 == N2) return N1;
3367 case ISD::CONCAT_VECTORS:
3368 // Concat of UNDEFs is UNDEF.
3369 if (N1.getOpcode() == ISD::UNDEF &&
3370 N2.getOpcode() == ISD::UNDEF)
3371 return getUNDEF(VT);
3373 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
3374 // one big BUILD_VECTOR.
3375 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
3376 N2.getOpcode() == ISD::BUILD_VECTOR) {
3377 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
3378 N1.getNode()->op_end());
3379 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
3381 // BUILD_VECTOR requires all inputs to be of the same type, find the
3382 // maximum type and extend them all.
3383 EVT SVT = VT.getScalarType();
3384 for (SDValue Op : Elts)
3385 SVT = (SVT.bitsLT(Op.getValueType()) ? Op.getValueType() : SVT);
3386 if (SVT.bitsGT(VT.getScalarType()))
3387 for (SDValue &Op : Elts)
3388 Op = TLI->isZExtFree(Op.getValueType(), SVT)
3389 ? getZExtOrTrunc(Op, DL, SVT)
3390 : getSExtOrTrunc(Op, DL, SVT);
3392 return getNode(ISD::BUILD_VECTOR, DL, VT, Elts);
3396 assert(VT.isInteger() && "This operator does not apply to FP types!");
3397 assert(N1.getValueType() == N2.getValueType() &&
3398 N1.getValueType() == VT && "Binary operator types must match!");
3399 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
3400 // worth handling here.
3401 if (N2C && N2C->isNullValue())
3403 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
3410 assert(VT.isInteger() && "This operator does not apply to FP types!");
3411 assert(N1.getValueType() == N2.getValueType() &&
3412 N1.getValueType() == VT && "Binary operator types must match!");
3413 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
3414 // it's worth handling here.
3415 if (N2C && N2C->isNullValue())
3429 assert(VT.isInteger() && "This operator does not apply to FP types!");
3430 assert(N1.getValueType() == N2.getValueType() &&
3431 N1.getValueType() == VT && "Binary operator types must match!");
3438 if (getTarget().Options.UnsafeFPMath) {
3439 if (Opcode == ISD::FADD) {
3441 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
3442 if (CFP->getValueAPF().isZero())
3445 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
3446 if (CFP->getValueAPF().isZero())
3448 } else if (Opcode == ISD::FSUB) {
3450 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
3451 if (CFP->getValueAPF().isZero())
3453 } else if (Opcode == ISD::FMUL) {
3454 ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1);
3457 // If the first operand isn't the constant, try the second
3459 CFP = dyn_cast<ConstantFPSDNode>(N2);
3466 return SDValue(CFP,0);
3468 if (CFP->isExactlyValue(1.0))
3473 assert(VT.isFloatingPoint() && "This operator only applies to FP types!");
3474 assert(N1.getValueType() == N2.getValueType() &&
3475 N1.getValueType() == VT && "Binary operator types must match!");
3477 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
3478 assert(N1.getValueType() == VT &&
3479 N1.getValueType().isFloatingPoint() &&
3480 N2.getValueType().isFloatingPoint() &&
3481 "Invalid FCOPYSIGN!");
3488 assert(VT == N1.getValueType() &&
3489 "Shift operators return type must be the same as their first arg");
3490 assert(VT.isInteger() && N2.getValueType().isInteger() &&
3491 "Shifts only work on integers");
3492 assert((!VT.isVector() || VT == N2.getValueType()) &&
3493 "Vector shift amounts must be in the same as their first arg");
3494 // Verify that the shift amount VT is bit enough to hold valid shift
3495 // amounts. This catches things like trying to shift an i1024 value by an
3496 // i8, which is easy to fall into in generic code that uses
3497 // TLI.getShiftAmount().
3498 assert(N2.getValueType().getSizeInBits() >=
3499 Log2_32_Ceil(N1.getValueType().getSizeInBits()) &&
3500 "Invalid use of small shift amount with oversized value!");
3502 // Always fold shifts of i1 values so the code generator doesn't need to
3503 // handle them. Since we know the size of the shift has to be less than the
3504 // size of the value, the shift/rotate count is guaranteed to be zero.
3507 if (N2C && N2C->isNullValue())
3510 case ISD::FP_ROUND_INREG: {
3511 EVT EVT = cast<VTSDNode>(N2)->getVT();
3512 assert(VT == N1.getValueType() && "Not an inreg round!");
3513 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
3514 "Cannot FP_ROUND_INREG integer types");
3515 assert(EVT.isVector() == VT.isVector() &&
3516 "FP_ROUND_INREG type should be vector iff the operand "
3518 assert((!EVT.isVector() ||
3519 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
3520 "Vector element counts must match in FP_ROUND_INREG");
3521 assert(EVT.bitsLE(VT) && "Not rounding down!");
3523 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
3527 assert(VT.isFloatingPoint() &&
3528 N1.getValueType().isFloatingPoint() &&
3529 VT.bitsLE(N1.getValueType()) &&
3530 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
3531 if (N1.getValueType() == VT) return N1; // noop conversion.
3533 case ISD::AssertSext:
3534 case ISD::AssertZext: {
3535 EVT EVT = cast<VTSDNode>(N2)->getVT();
3536 assert(VT == N1.getValueType() && "Not an inreg extend!");
3537 assert(VT.isInteger() && EVT.isInteger() &&
3538 "Cannot *_EXTEND_INREG FP types");
3539 assert(!EVT.isVector() &&
3540 "AssertSExt/AssertZExt type should be the vector element type "
3541 "rather than the vector type!");
3542 assert(EVT.bitsLE(VT) && "Not extending!");
3543 if (VT == EVT) return N1; // noop assertion.
3546 case ISD::SIGN_EXTEND_INREG: {
3547 EVT EVT = cast<VTSDNode>(N2)->getVT();
3548 assert(VT == N1.getValueType() && "Not an inreg extend!");
3549 assert(VT.isInteger() && EVT.isInteger() &&
3550 "Cannot *_EXTEND_INREG FP types");
3551 assert(EVT.isVector() == VT.isVector() &&
3552 "SIGN_EXTEND_INREG type should be vector iff the operand "
3554 assert((!EVT.isVector() ||
3555 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
3556 "Vector element counts must match in SIGN_EXTEND_INREG");
3557 assert(EVT.bitsLE(VT) && "Not extending!");
3558 if (EVT == VT) return N1; // Not actually extending
3560 auto SignExtendInReg = [&](APInt Val) {
3561 unsigned FromBits = EVT.getScalarType().getSizeInBits();
3562 Val <<= Val.getBitWidth() - FromBits;
3563 Val = Val.ashr(Val.getBitWidth() - FromBits);
3564 return getConstant(Val, DL, VT.getScalarType());
3568 APInt Val = N1C->getAPIntValue();
3569 return SignExtendInReg(Val);
3571 if (ISD::isBuildVectorOfConstantSDNodes(N1.getNode())) {
3572 SmallVector<SDValue, 8> Ops;
3573 for (int i = 0, e = VT.getVectorNumElements(); i != e; ++i) {
3574 SDValue Op = N1.getOperand(i);
3575 if (Op.getValueType() != VT.getScalarType()) break;
3576 if (Op.getOpcode() == ISD::UNDEF) {
3580 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op)) {
3581 APInt Val = C->getAPIntValue();
3582 Ops.push_back(SignExtendInReg(Val));
3587 if (Ops.size() == VT.getVectorNumElements())
3588 return getNode(ISD::BUILD_VECTOR, DL, VT, Ops);
3592 case ISD::EXTRACT_VECTOR_ELT:
3593 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
3594 if (N1.getOpcode() == ISD::UNDEF)
3595 return getUNDEF(VT);
3597 // EXTRACT_VECTOR_ELT of out-of-bounds element is an UNDEF
3598 if (N2C && N2C->getZExtValue() >= N1.getValueType().getVectorNumElements())
3599 return getUNDEF(VT);
3601 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
3602 // expanding copies of large vectors from registers.
3604 N1.getOpcode() == ISD::CONCAT_VECTORS &&
3605 N1.getNumOperands() > 0) {
3607 N1.getOperand(0).getValueType().getVectorNumElements();
3608 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
3609 N1.getOperand(N2C->getZExtValue() / Factor),
3610 getConstant(N2C->getZExtValue() % Factor, DL,
3611 N2.getValueType()));
3614 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
3615 // expanding large vector constants.
3616 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
3617 SDValue Elt = N1.getOperand(N2C->getZExtValue());
3619 if (VT != Elt.getValueType())
3620 // If the vector element type is not legal, the BUILD_VECTOR operands
3621 // are promoted and implicitly truncated, and the result implicitly
3622 // extended. Make that explicit here.
3623 Elt = getAnyExtOrTrunc(Elt, DL, VT);
3628 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
3629 // operations are lowered to scalars.
3630 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
3631 // If the indices are the same, return the inserted element else
3632 // if the indices are known different, extract the element from
3633 // the original vector.
3634 SDValue N1Op2 = N1.getOperand(2);
3635 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2);
3637 if (N1Op2C && N2C) {
3638 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) {
3639 if (VT == N1.getOperand(1).getValueType())
3640 return N1.getOperand(1);
3642 return getSExtOrTrunc(N1.getOperand(1), DL, VT);
3645 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
3649 case ISD::EXTRACT_ELEMENT:
3650 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
3651 assert(!N1.getValueType().isVector() && !VT.isVector() &&
3652 (N1.getValueType().isInteger() == VT.isInteger()) &&
3653 N1.getValueType() != VT &&
3654 "Wrong types for EXTRACT_ELEMENT!");
3656 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
3657 // 64-bit integers into 32-bit parts. Instead of building the extract of
3658 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
3659 if (N1.getOpcode() == ISD::BUILD_PAIR)
3660 return N1.getOperand(N2C->getZExtValue());
3662 // EXTRACT_ELEMENT of a constant int is also very common.
3663 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
3664 unsigned ElementSize = VT.getSizeInBits();
3665 unsigned Shift = ElementSize * N2C->getZExtValue();
3666 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
3667 return getConstant(ShiftedVal.trunc(ElementSize), DL, VT);
3670 case ISD::EXTRACT_SUBVECTOR: {
3672 if (VT.isSimple() && N1.getValueType().isSimple()) {
3673 assert(VT.isVector() && N1.getValueType().isVector() &&
3674 "Extract subvector VTs must be a vectors!");
3675 assert(VT.getVectorElementType() ==
3676 N1.getValueType().getVectorElementType() &&
3677 "Extract subvector VTs must have the same element type!");
3678 assert(VT.getSimpleVT() <= N1.getSimpleValueType() &&
3679 "Extract subvector must be from larger vector to smaller vector!");
3681 if (isa<ConstantSDNode>(Index)) {
3682 assert((VT.getVectorNumElements() +
3683 cast<ConstantSDNode>(Index)->getZExtValue()
3684 <= N1.getValueType().getVectorNumElements())
3685 && "Extract subvector overflow!");
3688 // Trivial extraction.
3689 if (VT.getSimpleVT() == N1.getSimpleValueType())
3696 // Perform trivial constant folding.
3698 FoldConstantArithmetic(Opcode, DL, VT, N1.getNode(), N2.getNode()))
3701 // Constant fold FP operations.
3702 bool HasFPExceptions = TLI->hasFloatingPointExceptions();
3703 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1);
3704 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2);
3706 if (!N2CFP && isCommutativeBinOp(Opcode)) {
3707 // Canonicalize constant to RHS if commutative.
3708 std::swap(N1CFP, N2CFP);
3711 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
3712 APFloat::opStatus s;
3715 s = V1.add(V2, APFloat::rmNearestTiesToEven);
3716 if (!HasFPExceptions || s != APFloat::opInvalidOp)
3717 return getConstantFP(V1, DL, VT);
3720 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
3721 if (!HasFPExceptions || s!=APFloat::opInvalidOp)
3722 return getConstantFP(V1, DL, VT);
3725 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
3726 if (!HasFPExceptions || s!=APFloat::opInvalidOp)
3727 return getConstantFP(V1, DL, VT);
3730 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
3731 if (!HasFPExceptions || (s!=APFloat::opInvalidOp &&
3732 s!=APFloat::opDivByZero)) {
3733 return getConstantFP(V1, DL, VT);
3737 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
3738 if (!HasFPExceptions || (s!=APFloat::opInvalidOp &&
3739 s!=APFloat::opDivByZero)) {
3740 return getConstantFP(V1, DL, VT);
3743 case ISD::FCOPYSIGN:
3745 return getConstantFP(V1, DL, VT);
3750 if (Opcode == ISD::FP_ROUND) {
3751 APFloat V = N1CFP->getValueAPF(); // make copy
3753 // This can return overflow, underflow, or inexact; we don't care.
3754 // FIXME need to be more flexible about rounding mode.
3755 (void)V.convert(EVTToAPFloatSemantics(VT),
3756 APFloat::rmNearestTiesToEven, &ignored);
3757 return getConstantFP(V, DL, VT);
3761 // Canonicalize an UNDEF to the RHS, even over a constant.
3762 if (N1.getOpcode() == ISD::UNDEF) {
3763 if (isCommutativeBinOp(Opcode)) {
3767 case ISD::FP_ROUND_INREG:
3768 case ISD::SIGN_EXTEND_INREG:
3774 return N1; // fold op(undef, arg2) -> undef
3782 return getConstant(0, DL, VT); // fold op(undef, arg2) -> 0
3783 // For vectors, we can't easily build an all zero vector, just return
3790 // Fold a bunch of operators when the RHS is undef.
3791 if (N2.getOpcode() == ISD::UNDEF) {
3794 if (N1.getOpcode() == ISD::UNDEF)
3795 // Handle undef ^ undef -> 0 special case. This is a common
3797 return getConstant(0, DL, VT);
3807 return N2; // fold op(arg1, undef) -> undef
3813 if (getTarget().Options.UnsafeFPMath)
3821 return getConstant(0, DL, VT); // fold op(arg1, undef) -> 0
3822 // For vectors, we can't easily build an all zero vector, just return
3827 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), DL, VT);
3828 // For vectors, we can't easily build an all one vector, just return
3836 // Memoize this node if possible.
3838 SDVTList VTs = getVTList(VT);
3839 if (VT != MVT::Glue) {
3840 SDValue Ops[] = {N1, N2};
3841 FoldingSetNodeID ID;
3842 AddNodeIDNode(ID, Opcode, VTs, Ops);
3843 AddNodeIDFlags(ID, Opcode, Flags);
3845 if (SDNode *E = FindNodeOrInsertPos(ID, DL.getDebugLoc(), IP))
3846 return SDValue(E, 0);
3848 N = GetBinarySDNode(Opcode, DL, VTs, N1, N2, Flags);
3850 CSEMap.InsertNode(N, IP);
3852 N = GetBinarySDNode(Opcode, DL, VTs, N1, N2, Flags);
3856 return SDValue(N, 0);
3859 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
3860 SDValue N1, SDValue N2, SDValue N3) {
3861 // Perform various simplifications.
3862 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
3865 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1);
3866 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2);
3867 ConstantFPSDNode *N3CFP = dyn_cast<ConstantFPSDNode>(N3);
3868 if (N1CFP && N2CFP && N3CFP) {
3869 APFloat V1 = N1CFP->getValueAPF();
3870 const APFloat &V2 = N2CFP->getValueAPF();
3871 const APFloat &V3 = N3CFP->getValueAPF();
3872 APFloat::opStatus s =
3873 V1.fusedMultiplyAdd(V2, V3, APFloat::rmNearestTiesToEven);
3874 if (!TLI->hasFloatingPointExceptions() || s != APFloat::opInvalidOp)
3875 return getConstantFP(V1, DL, VT);
3879 case ISD::CONCAT_VECTORS:
3880 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
3881 // one big BUILD_VECTOR.
3882 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
3883 N2.getOpcode() == ISD::BUILD_VECTOR &&
3884 N3.getOpcode() == ISD::BUILD_VECTOR) {
3885 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
3886 N1.getNode()->op_end());
3887 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
3888 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end());
3889 return getNode(ISD::BUILD_VECTOR, DL, VT, Elts);
3893 // Use FoldSetCC to simplify SETCC's.
3894 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
3895 if (Simp.getNode()) return Simp;
3900 if (N1C->getZExtValue())
3901 return N2; // select true, X, Y -> X
3902 return N3; // select false, X, Y -> Y
3905 if (N2 == N3) return N2; // select C, X, X -> X
3907 case ISD::VECTOR_SHUFFLE:
3908 llvm_unreachable("should use getVectorShuffle constructor!");
3909 case ISD::INSERT_SUBVECTOR: {
3911 if (VT.isSimple() && N1.getValueType().isSimple()
3912 && N2.getValueType().isSimple()) {
3913 assert(VT.isVector() && N1.getValueType().isVector() &&
3914 N2.getValueType().isVector() &&
3915 "Insert subvector VTs must be a vectors");
3916 assert(VT == N1.getValueType() &&
3917 "Dest and insert subvector source types must match!");
3918 assert(N2.getSimpleValueType() <= N1.getSimpleValueType() &&
3919 "Insert subvector must be from smaller vector to larger vector!");
3920 if (isa<ConstantSDNode>(Index)) {
3921 assert((N2.getValueType().getVectorNumElements() +
3922 cast<ConstantSDNode>(Index)->getZExtValue()
3923 <= VT.getVectorNumElements())
3924 && "Insert subvector overflow!");
3927 // Trivial insertion.
3928 if (VT.getSimpleVT() == N2.getSimpleValueType())
3934 // Fold bit_convert nodes from a type to themselves.
3935 if (N1.getValueType() == VT)
3940 // Memoize node if it doesn't produce a flag.
3942 SDVTList VTs = getVTList(VT);
3943 if (VT != MVT::Glue) {
3944 SDValue Ops[] = { N1, N2, N3 };
3945 FoldingSetNodeID ID;
3946 AddNodeIDNode(ID, Opcode, VTs, Ops);
3948 if (SDNode *E = FindNodeOrInsertPos(ID, DL.getDebugLoc(), IP))
3949 return SDValue(E, 0);
3951 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(),
3952 DL.getDebugLoc(), VTs, N1, N2, N3);
3953 CSEMap.InsertNode(N, IP);
3955 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(),
3956 DL.getDebugLoc(), VTs, N1, N2, N3);
3960 return SDValue(N, 0);
3963 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
3964 SDValue N1, SDValue N2, SDValue N3,
3966 SDValue Ops[] = { N1, N2, N3, N4 };
3967 return getNode(Opcode, DL, VT, Ops);
3970 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
3971 SDValue N1, SDValue N2, SDValue N3,
3972 SDValue N4, SDValue N5) {
3973 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3974 return getNode(Opcode, DL, VT, Ops);
3977 /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
3978 /// the incoming stack arguments to be loaded from the stack.
3979 SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) {
3980 SmallVector<SDValue, 8> ArgChains;
3982 // Include the original chain at the beginning of the list. When this is
3983 // used by target LowerCall hooks, this helps legalize find the
3984 // CALLSEQ_BEGIN node.
3985 ArgChains.push_back(Chain);
3987 // Add a chain value for each stack argument.
3988 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
3989 UE = getEntryNode().getNode()->use_end(); U != UE; ++U)
3990 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
3991 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
3992 if (FI->getIndex() < 0)
3993 ArgChains.push_back(SDValue(L, 1));
3995 // Build a tokenfactor for all the chains.
3996 return getNode(ISD::TokenFactor, SDLoc(Chain), MVT::Other, ArgChains);
3999 /// getMemsetValue - Vectorized representation of the memset value
4001 static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
4003 assert(Value.getOpcode() != ISD::UNDEF);
4005 unsigned NumBits = VT.getScalarType().getSizeInBits();
4006 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
4007 assert(C->getAPIntValue().getBitWidth() == 8);
4008 APInt Val = APInt::getSplat(NumBits, C->getAPIntValue());
4010 return DAG.getConstant(Val, dl, VT);
4011 return DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(VT), Val), dl,
4015 assert(Value.getValueType() == MVT::i8 && "memset with non-byte fill value?");
4016 EVT IntVT = VT.getScalarType();
4017 if (!IntVT.isInteger())
4018 IntVT = EVT::getIntegerVT(*DAG.getContext(), IntVT.getSizeInBits());
4020 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, IntVT, Value);
4022 // Use a multiplication with 0x010101... to extend the input to the
4024 APInt Magic = APInt::getSplat(NumBits, APInt(8, 0x01));
4025 Value = DAG.getNode(ISD::MUL, dl, IntVT, Value,
4026 DAG.getConstant(Magic, dl, IntVT));
4029 if (VT != Value.getValueType() && !VT.isInteger())
4030 Value = DAG.getNode(ISD::BITCAST, dl, VT.getScalarType(), Value);
4031 if (VT != Value.getValueType()) {
4032 assert(VT.getVectorElementType() == Value.getValueType() &&
4033 "value type should be one vector element here");
4034 SmallVector<SDValue, 8> BVOps(VT.getVectorNumElements(), Value);
4035 Value = DAG.getNode(ISD::BUILD_VECTOR, dl, VT, BVOps);
4041 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
4042 /// used when a memcpy is turned into a memset when the source is a constant
4044 static SDValue getMemsetStringVal(EVT VT, SDLoc dl, SelectionDAG &DAG,
4045 const TargetLowering &TLI, StringRef Str) {
4046 // Handle vector with all elements zero.
4049 return DAG.getConstant(0, dl, VT);
4050 else if (VT == MVT::f32 || VT == MVT::f64 || VT == MVT::f128)
4051 return DAG.getConstantFP(0.0, dl, VT);
4052 else if (VT.isVector()) {
4053 unsigned NumElts = VT.getVectorNumElements();
4054 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
4055 return DAG.getNode(ISD::BITCAST, dl, VT,
4056 DAG.getConstant(0, dl,
4057 EVT::getVectorVT(*DAG.getContext(),
4060 llvm_unreachable("Expected type!");
4063 assert(!VT.isVector() && "Can't handle vector type here!");
4064 unsigned NumVTBits = VT.getSizeInBits();
4065 unsigned NumVTBytes = NumVTBits / 8;
4066 unsigned NumBytes = std::min(NumVTBytes, unsigned(Str.size()));
4068 APInt Val(NumVTBits, 0);
4069 if (DAG.getDataLayout().isLittleEndian()) {
4070 for (unsigned i = 0; i != NumBytes; ++i)
4071 Val |= (uint64_t)(unsigned char)Str[i] << i*8;
4073 for (unsigned i = 0; i != NumBytes; ++i)
4074 Val |= (uint64_t)(unsigned char)Str[i] << (NumVTBytes-i-1)*8;
4077 // If the "cost" of materializing the integer immediate is less than the cost
4078 // of a load, then it is cost effective to turn the load into the immediate.
4079 Type *Ty = VT.getTypeForEVT(*DAG.getContext());
4080 if (TLI.shouldConvertConstantLoadToIntImm(Val, Ty))
4081 return DAG.getConstant(Val, dl, VT);
4082 return SDValue(nullptr, 0);
4085 /// getMemBasePlusOffset - Returns base and offset node for the
4087 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, SDLoc dl,
4088 SelectionDAG &DAG) {
4089 EVT VT = Base.getValueType();
4090 return DAG.getNode(ISD::ADD, dl,
4091 VT, Base, DAG.getConstant(Offset, dl, VT));
4094 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
4096 static bool isMemSrcFromString(SDValue Src, StringRef &Str) {
4097 unsigned SrcDelta = 0;
4098 GlobalAddressSDNode *G = nullptr;
4099 if (Src.getOpcode() == ISD::GlobalAddress)
4100 G = cast<GlobalAddressSDNode>(Src);
4101 else if (Src.getOpcode() == ISD::ADD &&
4102 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
4103 Src.getOperand(1).getOpcode() == ISD::Constant) {
4104 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
4105 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
4110 return getConstantStringInfo(G->getGlobal(), Str, SrcDelta, false);
4113 /// Determines the optimal series of memory ops to replace the memset / memcpy.
4114 /// Return true if the number of memory ops is below the threshold (Limit).
4115 /// It returns the types of the sequence of memory ops to perform
4116 /// memset / memcpy by reference.
4117 static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps,
4118 unsigned Limit, uint64_t Size,
4119 unsigned DstAlign, unsigned SrcAlign,
4125 const TargetLowering &TLI) {
4126 assert((SrcAlign == 0 || SrcAlign >= DstAlign) &&
4127 "Expecting memcpy / memset source to meet alignment requirement!");
4128 // If 'SrcAlign' is zero, that means the memory operation does not need to
4129 // load the value, i.e. memset or memcpy from constant string. Otherwise,
4130 // it's the inferred alignment of the source. 'DstAlign', on the other hand,
4131 // is the specified alignment of the memory operation. If it is zero, that
4132 // means it's possible to change the alignment of the destination.
4133 // 'MemcpyStrSrc' indicates whether the memcpy source is constant so it does
4134 // not need to be loaded.
4135 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign,
4136 IsMemset, ZeroMemset, MemcpyStrSrc,
4137 DAG.getMachineFunction());
4139 if (VT == MVT::Other) {
4141 if (DstAlign >= DAG.getDataLayout().getPointerPrefAlignment(AS) ||
4142 TLI.allowsMisalignedMemoryAccesses(VT, AS, DstAlign)) {
4143 VT = TLI.getPointerTy(DAG.getDataLayout());
4145 switch (DstAlign & 7) {
4146 case 0: VT = MVT::i64; break;
4147 case 4: VT = MVT::i32; break;
4148 case 2: VT = MVT::i16; break;
4149 default: VT = MVT::i8; break;
4154 while (!TLI.isTypeLegal(LVT))
4155 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1);
4156 assert(LVT.isInteger());
4162 unsigned NumMemOps = 0;
4164 unsigned VTSize = VT.getSizeInBits() / 8;
4165 while (VTSize > Size) {
4166 // For now, only use non-vector load / store's for the left-over pieces.
4171 if (VT.isVector() || VT.isFloatingPoint()) {
4172 NewVT = (VT.getSizeInBits() > 64) ? MVT::i64 : MVT::i32;
4173 if (TLI.isOperationLegalOrCustom(ISD::STORE, NewVT) &&
4174 TLI.isSafeMemOpType(NewVT.getSimpleVT()))
4176 else if (NewVT == MVT::i64 &&
4177 TLI.isOperationLegalOrCustom(ISD::STORE, MVT::f64) &&
4178 TLI.isSafeMemOpType(MVT::f64)) {
4179 // i64 is usually not legal on 32-bit targets, but f64 may be.
4187 NewVT = (MVT::SimpleValueType)(NewVT.getSimpleVT().SimpleTy - 1);
4188 if (NewVT == MVT::i8)
4190 } while (!TLI.isSafeMemOpType(NewVT.getSimpleVT()));
4192 NewVTSize = NewVT.getSizeInBits() / 8;
4194 // If the new VT cannot cover all of the remaining bits, then consider
4195 // issuing a (or a pair of) unaligned and overlapping load / store.
4196 // FIXME: Only does this for 64-bit or more since we don't have proper
4197 // cost model for unaligned load / store.
4200 if (NumMemOps && AllowOverlap &&
4201 VTSize >= 8 && NewVTSize < Size &&
4202 TLI.allowsMisalignedMemoryAccesses(VT, AS, DstAlign, &Fast) && Fast)
4210 if (++NumMemOps > Limit)
4213 MemOps.push_back(VT);
4220 static bool shouldLowerMemFuncForSize(const MachineFunction &MF) {
4221 // On Darwin, -Os means optimize for size without hurting performance, so
4222 // only really optimize for size when -Oz (MinSize) is used.
4223 if (MF.getTarget().getTargetTriple().isOSDarwin())
4224 return MF.getFunction()->optForMinSize();
4225 return MF.getFunction()->optForSize();
4228 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, SDLoc dl,
4229 SDValue Chain, SDValue Dst,
4230 SDValue Src, uint64_t Size,
4231 unsigned Align, bool isVol,
4233 MachinePointerInfo DstPtrInfo,
4234 MachinePointerInfo SrcPtrInfo) {
4235 // Turn a memcpy of undef to nop.
4236 if (Src.getOpcode() == ISD::UNDEF)
4239 // Expand memcpy to a series of load and store ops if the size operand falls
4240 // below a certain threshold.
4241 // TODO: In the AlwaysInline case, if the size is big then generate a loop
4242 // rather than maybe a humongous number of loads and stores.
4243 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
4244 std::vector<EVT> MemOps;
4245 bool DstAlignCanChange = false;
4246 MachineFunction &MF = DAG.getMachineFunction();
4247 MachineFrameInfo *MFI = MF.getFrameInfo();
4248 bool OptSize = shouldLowerMemFuncForSize(MF);
4249 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
4250 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
4251 DstAlignCanChange = true;
4252 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
4253 if (Align > SrcAlign)
4256 bool CopyFromStr = isMemSrcFromString(Src, Str);
4257 bool isZeroStr = CopyFromStr && Str.empty();
4258 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(OptSize);
4260 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
4261 (DstAlignCanChange ? 0 : Align),
4262 (isZeroStr ? 0 : SrcAlign),
4263 false, false, CopyFromStr, true, DAG, TLI))
4266 if (DstAlignCanChange) {
4267 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
4268 unsigned NewAlign = (unsigned)DAG.getDataLayout().getABITypeAlignment(Ty);
4270 // Don't promote to an alignment that would require dynamic stack
4272 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
4273 if (!TRI->needsStackRealignment(MF))
4274 while (NewAlign > Align &&
4275 DAG.getDataLayout().exceedsNaturalStackAlignment(NewAlign))
4278 if (NewAlign > Align) {
4279 // Give the stack frame object a larger alignment if needed.
4280 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
4281 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
4286 SmallVector<SDValue, 8> OutChains;
4287 unsigned NumMemOps = MemOps.size();
4288 uint64_t SrcOff = 0, DstOff = 0;
4289 for (unsigned i = 0; i != NumMemOps; ++i) {
4291 unsigned VTSize = VT.getSizeInBits() / 8;
4292 SDValue Value, Store;
4294 if (VTSize > Size) {
4295 // Issuing an unaligned load / store pair that overlaps with the previous
4296 // pair. Adjust the offset accordingly.
4297 assert(i == NumMemOps-1 && i != 0);
4298 SrcOff -= VTSize - Size;
4299 DstOff -= VTSize - Size;
4303 (isZeroStr || (VT.isInteger() && !VT.isVector()))) {
4304 // It's unlikely a store of a vector immediate can be done in a single
4305 // instruction. It would require a load from a constantpool first.
4306 // We only handle zero vectors here.
4307 // FIXME: Handle other cases where store of vector immediate is done in
4308 // a single instruction.
4309 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str.substr(SrcOff));
4310 if (Value.getNode())
4311 Store = DAG.getStore(Chain, dl, Value,
4312 getMemBasePlusOffset(Dst, DstOff, dl, DAG),
4313 DstPtrInfo.getWithOffset(DstOff), isVol,
4317 if (!Store.getNode()) {
4318 // The type might not be legal for the target. This should only happen
4319 // if the type is smaller than a legal type, as on PPC, so the right
4320 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify
4321 // to Load/Store if NVT==VT.
4322 // FIXME does the case above also need this?
4323 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
4324 assert(NVT.bitsGE(VT));
4325 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain,
4326 getMemBasePlusOffset(Src, SrcOff, dl, DAG),
4327 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false,
4328 false, MinAlign(SrcAlign, SrcOff));
4329 Store = DAG.getTruncStore(Chain, dl, Value,
4330 getMemBasePlusOffset(Dst, DstOff, dl, DAG),
4331 DstPtrInfo.getWithOffset(DstOff), VT, isVol,
4334 OutChains.push_back(Store);
4340 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains);
4343 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, SDLoc dl,
4344 SDValue Chain, SDValue Dst,
4345 SDValue Src, uint64_t Size,
4346 unsigned Align, bool isVol,
4348 MachinePointerInfo DstPtrInfo,
4349 MachinePointerInfo SrcPtrInfo) {
4350 // Turn a memmove of undef to nop.
4351 if (Src.getOpcode() == ISD::UNDEF)
4354 // Expand memmove to a series of load and store ops if the size operand falls
4355 // below a certain threshold.
4356 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
4357 std::vector<EVT> MemOps;
4358 bool DstAlignCanChange = false;
4359 MachineFunction &MF = DAG.getMachineFunction();
4360 MachineFrameInfo *MFI = MF.getFrameInfo();
4361 bool OptSize = shouldLowerMemFuncForSize(MF);
4362 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
4363 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
4364 DstAlignCanChange = true;
4365 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
4366 if (Align > SrcAlign)
4368 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(OptSize);
4370 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
4371 (DstAlignCanChange ? 0 : Align), SrcAlign,
4372 false, false, false, false, DAG, TLI))
4375 if (DstAlignCanChange) {
4376 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
4377 unsigned NewAlign = (unsigned)DAG.getDataLayout().getABITypeAlignment(Ty);
4378 if (NewAlign > Align) {
4379 // Give the stack frame object a larger alignment if needed.
4380 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
4381 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
4386 uint64_t SrcOff = 0, DstOff = 0;
4387 SmallVector<SDValue, 8> LoadValues;
4388 SmallVector<SDValue, 8> LoadChains;
4389 SmallVector<SDValue, 8> OutChains;
4390 unsigned NumMemOps = MemOps.size();
4391 for (unsigned i = 0; i < NumMemOps; i++) {
4393 unsigned VTSize = VT.getSizeInBits() / 8;
4396 Value = DAG.getLoad(VT, dl, Chain,
4397 getMemBasePlusOffset(Src, SrcOff, dl, DAG),
4398 SrcPtrInfo.getWithOffset(SrcOff), isVol,
4399 false, false, SrcAlign);
4400 LoadValues.push_back(Value);
4401 LoadChains.push_back(Value.getValue(1));
4404 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, LoadChains);
4406 for (unsigned i = 0; i < NumMemOps; i++) {
4408 unsigned VTSize = VT.getSizeInBits() / 8;
4411 Store = DAG.getStore(Chain, dl, LoadValues[i],
4412 getMemBasePlusOffset(Dst, DstOff, dl, DAG),
4413 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align);
4414 OutChains.push_back(Store);
4418 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains);
4421 /// \brief Lower the call to 'memset' intrinsic function into a series of store
4424 /// \param DAG Selection DAG where lowered code is placed.
4425 /// \param dl Link to corresponding IR location.
4426 /// \param Chain Control flow dependency.
4427 /// \param Dst Pointer to destination memory location.
4428 /// \param Src Value of byte to write into the memory.
4429 /// \param Size Number of bytes to write.
4430 /// \param Align Alignment of the destination in bytes.
4431 /// \param isVol True if destination is volatile.
4432 /// \param DstPtrInfo IR information on the memory pointer.
4433 /// \returns New head in the control flow, if lowering was successful, empty
4434 /// SDValue otherwise.
4436 /// The function tries to replace 'llvm.memset' intrinsic with several store
4437 /// operations and value calculation code. This is usually profitable for small
4439 static SDValue getMemsetStores(SelectionDAG &DAG, SDLoc dl,
4440 SDValue Chain, SDValue Dst,
4441 SDValue Src, uint64_t Size,
4442 unsigned Align, bool isVol,
4443 MachinePointerInfo DstPtrInfo) {
4444 // Turn a memset of undef to nop.
4445 if (Src.getOpcode() == ISD::UNDEF)
4448 // Expand memset to a series of load/store ops if the size operand
4449 // falls below a certain threshold.
4450 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
4451 std::vector<EVT> MemOps;
4452 bool DstAlignCanChange = false;
4453 MachineFunction &MF = DAG.getMachineFunction();
4454 MachineFrameInfo *MFI = MF.getFrameInfo();
4455 bool OptSize = shouldLowerMemFuncForSize(MF);
4456 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
4457 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
4458 DstAlignCanChange = true;
4460 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue();
4461 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(OptSize),
4462 Size, (DstAlignCanChange ? 0 : Align), 0,
4463 true, IsZeroVal, false, true, DAG, TLI))
4466 if (DstAlignCanChange) {
4467 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
4468 unsigned NewAlign = (unsigned)DAG.getDataLayout().getABITypeAlignment(Ty);
4469 if (NewAlign > Align) {
4470 // Give the stack frame object a larger alignment if needed.
4471 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
4472 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
4477 SmallVector<SDValue, 8> OutChains;
4478 uint64_t DstOff = 0;
4479 unsigned NumMemOps = MemOps.size();
4481 // Find the largest store and generate the bit pattern for it.
4482 EVT LargestVT = MemOps[0];
4483 for (unsigned i = 1; i < NumMemOps; i++)
4484 if (MemOps[i].bitsGT(LargestVT))
4485 LargestVT = MemOps[i];
4486 SDValue MemSetValue = getMemsetValue(Src, LargestVT, DAG, dl);
4488 for (unsigned i = 0; i < NumMemOps; i++) {
4490 unsigned VTSize = VT.getSizeInBits() / 8;
4491 if (VTSize > Size) {
4492 // Issuing an unaligned load / store pair that overlaps with the previous
4493 // pair. Adjust the offset accordingly.
4494 assert(i == NumMemOps-1 && i != 0);
4495 DstOff -= VTSize - Size;
4498 // If this store is smaller than the largest store see whether we can get
4499 // the smaller value for free with a truncate.
4500 SDValue Value = MemSetValue;
4501 if (VT.bitsLT(LargestVT)) {
4502 if (!LargestVT.isVector() && !VT.isVector() &&
4503 TLI.isTruncateFree(LargestVT, VT))
4504 Value = DAG.getNode(ISD::TRUNCATE, dl, VT, MemSetValue);
4506 Value = getMemsetValue(Src, VT, DAG, dl);
4508 assert(Value.getValueType() == VT && "Value with wrong type.");
4509 SDValue Store = DAG.getStore(Chain, dl, Value,
4510 getMemBasePlusOffset(Dst, DstOff, dl, DAG),
4511 DstPtrInfo.getWithOffset(DstOff),
4512 isVol, false, Align);
4513 OutChains.push_back(Store);
4514 DstOff += VT.getSizeInBits() / 8;
4518 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains);
4521 SDValue SelectionDAG::getMemcpy(SDValue Chain, SDLoc dl, SDValue Dst,
4522 SDValue Src, SDValue Size,
4523 unsigned Align, bool isVol, bool AlwaysInline,
4524 bool isTailCall, MachinePointerInfo DstPtrInfo,
4525 MachinePointerInfo SrcPtrInfo) {
4526 assert(Align && "The SDAG layer expects explicit alignment and reserves 0");
4528 // Check to see if we should lower the memcpy to loads and stores first.
4529 // For cases within the target-specified limits, this is the best choice.
4530 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
4532 // Memcpy with size zero? Just return the original chain.
4533 if (ConstantSize->isNullValue())
4536 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
4537 ConstantSize->getZExtValue(),Align,
4538 isVol, false, DstPtrInfo, SrcPtrInfo);
4539 if (Result.getNode())
4543 // Then check to see if we should lower the memcpy with target-specific
4544 // code. If the target chooses to do this, this is the next best.
4546 SDValue Result = TSI->EmitTargetCodeForMemcpy(
4547 *this, dl, Chain, Dst, Src, Size, Align, isVol, AlwaysInline,
4548 DstPtrInfo, SrcPtrInfo);
4549 if (Result.getNode())
4553 // If we really need inline code and the target declined to provide it,
4554 // use a (potentially long) sequence of loads and stores.
4556 assert(ConstantSize && "AlwaysInline requires a constant size!");
4557 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
4558 ConstantSize->getZExtValue(), Align, isVol,
4559 true, DstPtrInfo, SrcPtrInfo);
4562 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc
4563 // memcpy is not guaranteed to be safe. libc memcpys aren't required to
4564 // respect volatile, so they may do things like read or write memory
4565 // beyond the given memory regions. But fixing this isn't easy, and most
4566 // people don't care.
4568 // Emit a library call.
4569 TargetLowering::ArgListTy Args;
4570 TargetLowering::ArgListEntry Entry;
4571 Entry.Ty = getDataLayout().getIntPtrType(*getContext());
4572 Entry.Node = Dst; Args.push_back(Entry);
4573 Entry.Node = Src; Args.push_back(Entry);
4574 Entry.Node = Size; Args.push_back(Entry);
4575 // FIXME: pass in SDLoc
4576 TargetLowering::CallLoweringInfo CLI(*this);
4579 .setCallee(TLI->getLibcallCallingConv(RTLIB::MEMCPY),
4580 Type::getVoidTy(*getContext()),
4581 getExternalSymbol(TLI->getLibcallName(RTLIB::MEMCPY),
4582 TLI->getPointerTy(getDataLayout())),
4585 .setTailCall(isTailCall);
4587 std::pair<SDValue,SDValue> CallResult = TLI->LowerCallTo(CLI);
4588 return CallResult.second;
4591 SDValue SelectionDAG::getMemmove(SDValue Chain, SDLoc dl, SDValue Dst,
4592 SDValue Src, SDValue Size,
4593 unsigned Align, bool isVol, bool isTailCall,
4594 MachinePointerInfo DstPtrInfo,
4595 MachinePointerInfo SrcPtrInfo) {
4596 assert(Align && "The SDAG layer expects explicit alignment and reserves 0");
4598 // Check to see if we should lower the memmove to loads and stores first.
4599 // For cases within the target-specified limits, this is the best choice.
4600 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
4602 // Memmove with size zero? Just return the original chain.
4603 if (ConstantSize->isNullValue())
4607 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
4608 ConstantSize->getZExtValue(), Align, isVol,
4609 false, DstPtrInfo, SrcPtrInfo);
4610 if (Result.getNode())
4614 // Then check to see if we should lower the memmove with target-specific
4615 // code. If the target chooses to do this, this is the next best.
4617 SDValue Result = TSI->EmitTargetCodeForMemmove(
4618 *this, dl, Chain, Dst, Src, Size, Align, isVol, DstPtrInfo, SrcPtrInfo);
4619 if (Result.getNode())
4623 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may
4624 // not be safe. See memcpy above for more details.
4626 // Emit a library call.
4627 TargetLowering::ArgListTy Args;
4628 TargetLowering::ArgListEntry Entry;
4629 Entry.Ty = getDataLayout().getIntPtrType(*getContext());
4630 Entry.Node = Dst; Args.push_back(Entry);
4631 Entry.Node = Src; Args.push_back(Entry);
4632 Entry.Node = Size; Args.push_back(Entry);
4633 // FIXME: pass in SDLoc
4634 TargetLowering::CallLoweringInfo CLI(*this);
4637 .setCallee(TLI->getLibcallCallingConv(RTLIB::MEMMOVE),
4638 Type::getVoidTy(*getContext()),
4639 getExternalSymbol(TLI->getLibcallName(RTLIB::MEMMOVE),
4640 TLI->getPointerTy(getDataLayout())),
4643 .setTailCall(isTailCall);
4645 std::pair<SDValue,SDValue> CallResult = TLI->LowerCallTo(CLI);
4646 return CallResult.second;
4649 SDValue SelectionDAG::getMemset(SDValue Chain, SDLoc dl, SDValue Dst,
4650 SDValue Src, SDValue Size,
4651 unsigned Align, bool isVol, bool isTailCall,
4652 MachinePointerInfo DstPtrInfo) {
4653 assert(Align && "The SDAG layer expects explicit alignment and reserves 0");
4655 // Check to see if we should lower the memset to stores first.
4656 // For cases within the target-specified limits, this is the best choice.
4657 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
4659 // Memset with size zero? Just return the original chain.
4660 if (ConstantSize->isNullValue())
4664 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
4665 Align, isVol, DstPtrInfo);
4667 if (Result.getNode())
4671 // Then check to see if we should lower the memset with target-specific
4672 // code. If the target chooses to do this, this is the next best.
4674 SDValue Result = TSI->EmitTargetCodeForMemset(
4675 *this, dl, Chain, Dst, Src, Size, Align, isVol, DstPtrInfo);
4676 if (Result.getNode())
4680 // Emit a library call.
4681 Type *IntPtrTy = getDataLayout().getIntPtrType(*getContext());
4682 TargetLowering::ArgListTy Args;
4683 TargetLowering::ArgListEntry Entry;
4684 Entry.Node = Dst; Entry.Ty = IntPtrTy;
4685 Args.push_back(Entry);
4687 Entry.Ty = Src.getValueType().getTypeForEVT(*getContext());
4688 Args.push_back(Entry);
4690 Entry.Ty = IntPtrTy;
4691 Args.push_back(Entry);
4693 // FIXME: pass in SDLoc
4694 TargetLowering::CallLoweringInfo CLI(*this);
4697 .setCallee(TLI->getLibcallCallingConv(RTLIB::MEMSET),
4698 Type::getVoidTy(*getContext()),
4699 getExternalSymbol(TLI->getLibcallName(RTLIB::MEMSET),
4700 TLI->getPointerTy(getDataLayout())),
4703 .setTailCall(isTailCall);
4705 std::pair<SDValue,SDValue> CallResult = TLI->LowerCallTo(CLI);
4706 return CallResult.second;
4709 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4710 SDVTList VTList, ArrayRef<SDValue> Ops,
4711 MachineMemOperand *MMO,
4712 AtomicOrdering SuccessOrdering,
4713 AtomicOrdering FailureOrdering,
4714 SynchronizationScope SynchScope) {
4715 FoldingSetNodeID ID;
4716 ID.AddInteger(MemVT.getRawBits());
4717 AddNodeIDNode(ID, Opcode, VTList, Ops);
4718 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4720 if (SDNode *E = FindNodeOrInsertPos(ID, dl.getDebugLoc(), IP)) {
4721 cast<AtomicSDNode>(E)->refineAlignment(MMO);
4722 return SDValue(E, 0);
4725 // Allocate the operands array for the node out of the BumpPtrAllocator, since
4726 // SDNode doesn't have access to it. This memory will be "leaked" when
4727 // the node is deallocated, but recovered when the allocator is released.
4728 // If the number of operands is less than 5 we use AtomicSDNode's internal
4730 unsigned NumOps = Ops.size();
4731 SDUse *DynOps = NumOps > 4 ? OperandAllocator.Allocate<SDUse>(NumOps)
4734 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl.getIROrder(),
4735 dl.getDebugLoc(), VTList, MemVT,
4736 Ops.data(), DynOps, NumOps, MMO,
4737 SuccessOrdering, FailureOrdering,
4739 CSEMap.InsertNode(N, IP);
4741 return SDValue(N, 0);
4744 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4745 SDVTList VTList, ArrayRef<SDValue> Ops,
4746 MachineMemOperand *MMO,
4747 AtomicOrdering Ordering,
4748 SynchronizationScope SynchScope) {
4749 return getAtomic(Opcode, dl, MemVT, VTList, Ops, MMO, Ordering,
4750 Ordering, SynchScope);
4753 SDValue SelectionDAG::getAtomicCmpSwap(
4754 unsigned Opcode, SDLoc dl, EVT MemVT, SDVTList VTs, SDValue Chain,
4755 SDValue Ptr, SDValue Cmp, SDValue Swp, MachinePointerInfo PtrInfo,
4756 unsigned Alignment, AtomicOrdering SuccessOrdering,
4757 AtomicOrdering FailureOrdering, SynchronizationScope SynchScope) {
4758 assert(Opcode == ISD::ATOMIC_CMP_SWAP ||
4759 Opcode == ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS);
4760 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
4762 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4763 Alignment = getEVTAlignment(MemVT);
4765 MachineFunction &MF = getMachineFunction();
4767 // FIXME: Volatile isn't really correct; we should keep track of atomic
4768 // orderings in the memoperand.
4769 unsigned Flags = MachineMemOperand::MOVolatile;
4770 Flags |= MachineMemOperand::MOLoad;
4771 Flags |= MachineMemOperand::MOStore;
4773 MachineMemOperand *MMO =
4774 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment);
4776 return getAtomicCmpSwap(Opcode, dl, MemVT, VTs, Chain, Ptr, Cmp, Swp, MMO,
4777 SuccessOrdering, FailureOrdering, SynchScope);
4780 SDValue SelectionDAG::getAtomicCmpSwap(unsigned Opcode, SDLoc dl, EVT MemVT,
4781 SDVTList VTs, SDValue Chain, SDValue Ptr,
4782 SDValue Cmp, SDValue Swp,
4783 MachineMemOperand *MMO,
4784 AtomicOrdering SuccessOrdering,
4785 AtomicOrdering FailureOrdering,
4786 SynchronizationScope SynchScope) {
4787 assert(Opcode == ISD::ATOMIC_CMP_SWAP ||
4788 Opcode == ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS);
4789 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
4791 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
4792 return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO,
4793 SuccessOrdering, FailureOrdering, SynchScope);
4796 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4798 SDValue Ptr, SDValue Val,
4799 const Value* PtrVal,
4801 AtomicOrdering Ordering,
4802 SynchronizationScope SynchScope) {
4803 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4804 Alignment = getEVTAlignment(MemVT);
4806 MachineFunction &MF = getMachineFunction();
4807 // An atomic store does not load. An atomic load does not store.
4808 // (An atomicrmw obviously both loads and stores.)
4809 // For now, atomics are considered to be volatile always, and they are
4811 // FIXME: Volatile isn't really correct; we should keep track of atomic
4812 // orderings in the memoperand.
4813 unsigned Flags = MachineMemOperand::MOVolatile;
4814 if (Opcode != ISD::ATOMIC_STORE)
4815 Flags |= MachineMemOperand::MOLoad;
4816 if (Opcode != ISD::ATOMIC_LOAD)
4817 Flags |= MachineMemOperand::MOStore;
4819 MachineMemOperand *MMO =
4820 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
4821 MemVT.getStoreSize(), Alignment);
4823 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO,
4824 Ordering, SynchScope);
4827 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4829 SDValue Ptr, SDValue Val,
4830 MachineMemOperand *MMO,
4831 AtomicOrdering Ordering,
4832 SynchronizationScope SynchScope) {
4833 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
4834 Opcode == ISD::ATOMIC_LOAD_SUB ||
4835 Opcode == ISD::ATOMIC_LOAD_AND ||
4836 Opcode == ISD::ATOMIC_LOAD_OR ||
4837 Opcode == ISD::ATOMIC_LOAD_XOR ||
4838 Opcode == ISD::ATOMIC_LOAD_NAND ||
4839 Opcode == ISD::ATOMIC_LOAD_MIN ||
4840 Opcode == ISD::ATOMIC_LOAD_MAX ||
4841 Opcode == ISD::ATOMIC_LOAD_UMIN ||
4842 Opcode == ISD::ATOMIC_LOAD_UMAX ||
4843 Opcode == ISD::ATOMIC_SWAP ||
4844 Opcode == ISD::ATOMIC_STORE) &&
4845 "Invalid Atomic Op");
4847 EVT VT = Val.getValueType();
4849 SDVTList VTs = Opcode == ISD::ATOMIC_STORE ? getVTList(MVT::Other) :
4850 getVTList(VT, MVT::Other);
4851 SDValue Ops[] = {Chain, Ptr, Val};
4852 return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO, Ordering, SynchScope);
4855 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4856 EVT VT, SDValue Chain,
4858 MachineMemOperand *MMO,
4859 AtomicOrdering Ordering,
4860 SynchronizationScope SynchScope) {
4861 assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op");
4863 SDVTList VTs = getVTList(VT, MVT::Other);
4864 SDValue Ops[] = {Chain, Ptr};
4865 return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO, Ordering, SynchScope);
4868 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
4869 SDValue SelectionDAG::getMergeValues(ArrayRef<SDValue> Ops, SDLoc dl) {
4870 if (Ops.size() == 1)
4873 SmallVector<EVT, 4> VTs;
4874 VTs.reserve(Ops.size());
4875 for (unsigned i = 0; i < Ops.size(); ++i)
4876 VTs.push_back(Ops[i].getValueType());
4877 return getNode(ISD::MERGE_VALUES, dl, getVTList(VTs), Ops);
4881 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDLoc dl, SDVTList VTList,
4882 ArrayRef<SDValue> Ops,
4883 EVT MemVT, MachinePointerInfo PtrInfo,
4884 unsigned Align, bool Vol,
4885 bool ReadMem, bool WriteMem, unsigned Size) {
4886 if (Align == 0) // Ensure that codegen never sees alignment 0
4887 Align = getEVTAlignment(MemVT);
4889 MachineFunction &MF = getMachineFunction();
4892 Flags |= MachineMemOperand::MOStore;
4894 Flags |= MachineMemOperand::MOLoad;
4896 Flags |= MachineMemOperand::MOVolatile;
4898 Size = MemVT.getStoreSize();
4899 MachineMemOperand *MMO =
4900 MF.getMachineMemOperand(PtrInfo, Flags, Size, Align);
4902 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, MemVT, MMO);
4906 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDLoc dl, SDVTList VTList,
4907 ArrayRef<SDValue> Ops, EVT MemVT,
4908 MachineMemOperand *MMO) {
4909 assert((Opcode == ISD::INTRINSIC_VOID ||
4910 Opcode == ISD::INTRINSIC_W_CHAIN ||
4911 Opcode == ISD::PREFETCH ||
4912 Opcode == ISD::LIFETIME_START ||
4913 Opcode == ISD::LIFETIME_END ||
4914 (Opcode <= INT_MAX &&
4915 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) &&
4916 "Opcode is not a memory-accessing opcode!");
4918 // Memoize the node unless it returns a flag.
4919 MemIntrinsicSDNode *N;
4920 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
4921 FoldingSetNodeID ID;
4922 AddNodeIDNode(ID, Opcode, VTList, Ops);
4923 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4925 if (SDNode *E = FindNodeOrInsertPos(ID, dl.getDebugLoc(), IP)) {
4926 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO);
4927 return SDValue(E, 0);
4930 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl.getIROrder(),
4931 dl.getDebugLoc(), VTList, Ops,
4933 CSEMap.InsertNode(N, IP);
4935 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl.getIROrder(),
4936 dl.getDebugLoc(), VTList, Ops,
4940 return SDValue(N, 0);
4943 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4944 /// MachinePointerInfo record from it. This is particularly useful because the
4945 /// code generator has many cases where it doesn't bother passing in a
4946 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4947 static MachinePointerInfo InferPointerInfo(SelectionDAG &DAG, SDValue Ptr,
4948 int64_t Offset = 0) {
4949 // If this is FI+Offset, we can model it.
4950 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr))
4951 return MachinePointerInfo::getFixedStack(DAG.getMachineFunction(),
4952 FI->getIndex(), Offset);
4954 // If this is (FI+Offset1)+Offset2, we can model it.
4955 if (Ptr.getOpcode() != ISD::ADD ||
4956 !isa<ConstantSDNode>(Ptr.getOperand(1)) ||
4957 !isa<FrameIndexSDNode>(Ptr.getOperand(0)))
4958 return MachinePointerInfo();
4960 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
4961 return MachinePointerInfo::getFixedStack(
4962 DAG.getMachineFunction(), FI,
4963 Offset + cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue());
4966 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4967 /// MachinePointerInfo record from it. This is particularly useful because the
4968 /// code generator has many cases where it doesn't bother passing in a
4969 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4970 static MachinePointerInfo InferPointerInfo(SelectionDAG &DAG, SDValue Ptr,
4972 // If the 'Offset' value isn't a constant, we can't handle this.
4973 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp))
4974 return InferPointerInfo(DAG, Ptr, OffsetNode->getSExtValue());
4975 if (OffsetOp.getOpcode() == ISD::UNDEF)
4976 return InferPointerInfo(DAG, Ptr);
4977 return MachinePointerInfo();
4982 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4983 EVT VT, SDLoc dl, SDValue Chain,
4984 SDValue Ptr, SDValue Offset,
4985 MachinePointerInfo PtrInfo, EVT MemVT,
4986 bool isVolatile, bool isNonTemporal, bool isInvariant,
4987 unsigned Alignment, const AAMDNodes &AAInfo,
4988 const MDNode *Ranges) {
4989 assert(Chain.getValueType() == MVT::Other &&
4990 "Invalid chain type");
4991 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4992 Alignment = getEVTAlignment(VT);
4994 unsigned Flags = MachineMemOperand::MOLoad;
4996 Flags |= MachineMemOperand::MOVolatile;
4998 Flags |= MachineMemOperand::MONonTemporal;
5000 Flags |= MachineMemOperand::MOInvariant;
5002 // If we don't have a PtrInfo, infer the trivial frame index case to simplify
5004 if (PtrInfo.V.isNull())
5005 PtrInfo = InferPointerInfo(*this, Ptr, Offset);
5007 MachineFunction &MF = getMachineFunction();
5008 MachineMemOperand *MMO =
5009 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment,
5011 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO);
5015 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
5016 EVT VT, SDLoc dl, SDValue Chain,
5017 SDValue Ptr, SDValue Offset, EVT MemVT,
5018 MachineMemOperand *MMO) {
5020 ExtType = ISD::NON_EXTLOAD;
5021 } else if (ExtType == ISD::NON_EXTLOAD) {
5022 assert(VT == MemVT && "Non-extending load from different memory type!");
5025 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) &&
5026 "Should only be an extending load, not truncating!");
5027 assert(VT.isInteger() == MemVT.isInteger() &&
5028 "Cannot convert from FP to Int or Int -> FP!");
5029 assert(VT.isVector() == MemVT.isVector() &&
5030 "Cannot use an ext load to convert to or from a vector!");
5031 assert((!VT.isVector() ||
5032 VT.getVectorNumElements() == MemVT.getVectorNumElements()) &&
5033 "Cannot use an ext load to change the number of vector elements!");
5036 bool Indexed = AM != ISD::UNINDEXED;
5037 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
5038 "Unindexed load with an offset!");
5040 SDVTList VTs = Indexed ?
5041 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
5042 SDValue Ops[] = { Chain, Ptr, Offset };
5043 FoldingSetNodeID ID;
5044 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops);
5045 ID.AddInteger(MemVT.getRawBits());
5046 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(),
5047 MMO->isNonTemporal(),
5048 MMO->isInvariant()));
5049 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
5051 if (SDNode *E = FindNodeOrInsertPos(ID, dl.getDebugLoc(), IP)) {
5052 cast<LoadSDNode>(E)->refineAlignment(MMO);
5053 return SDValue(E, 0);
5055 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl.getIROrder(),
5056 dl.getDebugLoc(), VTs, AM, ExtType,
5058 CSEMap.InsertNode(N, IP);
5060 return SDValue(N, 0);
5063 SDValue SelectionDAG::getLoad(EVT VT, SDLoc dl,
5064 SDValue Chain, SDValue Ptr,
5065 MachinePointerInfo PtrInfo,
5066 bool isVolatile, bool isNonTemporal,
5067 bool isInvariant, unsigned Alignment,
5068 const AAMDNodes &AAInfo,
5069 const MDNode *Ranges) {
5070 SDValue Undef = getUNDEF(Ptr.getValueType());
5071 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
5072 PtrInfo, VT, isVolatile, isNonTemporal, isInvariant, Alignment,
5076 SDValue SelectionDAG::getLoad(EVT VT, SDLoc dl,
5077 SDValue Chain, SDValue Ptr,
5078 MachineMemOperand *MMO) {
5079 SDValue Undef = getUNDEF(Ptr.getValueType());
5080 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
5084 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, SDLoc dl, EVT VT,
5085 SDValue Chain, SDValue Ptr,
5086 MachinePointerInfo PtrInfo, EVT MemVT,
5087 bool isVolatile, bool isNonTemporal,
5088 bool isInvariant, unsigned Alignment,
5089 const AAMDNodes &AAInfo) {
5090 SDValue Undef = getUNDEF(Ptr.getValueType());
5091 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
5092 PtrInfo, MemVT, isVolatile, isNonTemporal, isInvariant,
5097 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, SDLoc dl, EVT VT,
5098 SDValue Chain, SDValue Ptr, EVT MemVT,
5099 MachineMemOperand *MMO) {
5100 SDValue Undef = getUNDEF(Ptr.getValueType());
5101 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
5106 SelectionDAG::getIndexedLoad(SDValue OrigLoad, SDLoc dl, SDValue Base,
5107 SDValue Offset, ISD::MemIndexedMode AM) {
5108 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
5109 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
5110 "Load is already a indexed load!");
5111 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl,
5112 LD->getChain(), Base, Offset, LD->getPointerInfo(),
5113 LD->getMemoryVT(), LD->isVolatile(), LD->isNonTemporal(),
5114 false, LD->getAlignment());
5117 SDValue SelectionDAG::getStore(SDValue Chain, SDLoc dl, SDValue Val,
5118 SDValue Ptr, MachinePointerInfo PtrInfo,
5119 bool isVolatile, bool isNonTemporal,
5120 unsigned Alignment, const AAMDNodes &AAInfo) {
5121 assert(Chain.getValueType() == MVT::Other &&
5122 "Invalid chain type");
5123 if (Alignment == 0) // Ensure that codegen never sees alignment 0
5124 Alignment = getEVTAlignment(Val.getValueType());
5126 unsigned Flags = MachineMemOperand::MOStore;
5128 Flags |= MachineMemOperand::MOVolatile;
5130 Flags |= MachineMemOperand::MONonTemporal;
5132 if (PtrInfo.V.isNull())
5133 PtrInfo = InferPointerInfo(*this, Ptr);
5135 MachineFunction &MF = getMachineFunction();
5136 MachineMemOperand *MMO =
5137 MF.getMachineMemOperand(PtrInfo, Flags,
5138 Val.getValueType().getStoreSize(), Alignment,
5141 return getStore(Chain, dl, Val, Ptr, MMO);
5144 SDValue SelectionDAG::getStore(SDValue Chain, SDLoc dl, SDValue Val,
5145 SDValue Ptr, MachineMemOperand *MMO) {
5146 assert(Chain.getValueType() == MVT::Other &&
5147 "Invalid chain type");
5148 EVT VT = Val.getValueType();
5149 SDVTList VTs = getVTList(MVT::Other);
5150 SDValue Undef = getUNDEF(Ptr.getValueType());
5151 SDValue Ops[] = { Chain, Val, Ptr, Undef };
5152 FoldingSetNodeID ID;
5153 AddNodeIDNode(ID, ISD::STORE, VTs, Ops);
5154 ID.AddInteger(VT.getRawBits());
5155 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
5156 MMO->isNonTemporal(), MMO->isInvariant()));
5157 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
5159 if (SDNode *E = FindNodeOrInsertPos(ID, dl.getDebugLoc(), IP)) {
5160 cast<StoreSDNode>(E)->refineAlignment(MMO);
5161 return SDValue(E, 0);
5163 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl.getIROrder(),
5164 dl.getDebugLoc(), VTs,
5165 ISD::UNINDEXED, false, VT, MMO);
5166 CSEMap.InsertNode(N, IP);
5168 return SDValue(N, 0);
5171 SDValue SelectionDAG::getTruncStore(SDValue Chain, SDLoc dl, SDValue Val,
5172 SDValue Ptr, MachinePointerInfo PtrInfo,
5173 EVT SVT,bool isVolatile, bool isNonTemporal,
5175 const AAMDNodes &AAInfo) {
5176 assert(Chain.getValueType() == MVT::Other &&
5177 "Invalid chain type");
5178 if (Alignment == 0) // Ensure that codegen never sees alignment 0
5179 Alignment = getEVTAlignment(SVT);
5181 unsigned Flags = MachineMemOperand::MOStore;
5183 Flags |= MachineMemOperand::MOVolatile;
5185 Flags |= MachineMemOperand::MONonTemporal;
5187 if (PtrInfo.V.isNull())
5188 PtrInfo = InferPointerInfo(*this, Ptr);
5190 MachineFunction &MF = getMachineFunction();
5191 MachineMemOperand *MMO =
5192 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment,
5195 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO);
5198 SDValue SelectionDAG::getTruncStore(SDValue Chain, SDLoc dl, SDValue Val,
5199 SDValue Ptr, EVT SVT,
5200 MachineMemOperand *MMO) {
5201 EVT VT = Val.getValueType();
5203 assert(Chain.getValueType() == MVT::Other &&
5204 "Invalid chain type");
5206 return getStore(Chain, dl, Val, Ptr, MMO);
5208 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) &&
5209 "Should only be a truncating store, not extending!");
5210 assert(VT.isInteger() == SVT.isInteger() &&
5211 "Can't do FP-INT conversion!");
5212 assert(VT.isVector() == SVT.isVector() &&
5213 "Cannot use trunc store to convert to or from a vector!");
5214 assert((!VT.isVector() ||
5215 VT.getVectorNumElements() == SVT.getVectorNumElements()) &&
5216 "Cannot use trunc store to change the number of vector elements!");
5218 SDVTList VTs = getVTList(MVT::Other);
5219 SDValue Undef = getUNDEF(Ptr.getValueType());
5220 SDValue Ops[] = { Chain, Val, Ptr, Undef };
5221 FoldingSetNodeID ID;
5222 AddNodeIDNode(ID, ISD::STORE, VTs, Ops);
5223 ID.AddInteger(SVT.getRawBits());
5224 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(),
5225 MMO->isNonTemporal(), MMO->isInvariant()));
5226 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
5228 if (SDNode *E = FindNodeOrInsertPos(ID, dl.getDebugLoc(), IP)) {
5229 cast<StoreSDNode>(E)->refineAlignment(MMO);
5230 return SDValue(E, 0);
5232 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl.getIROrder(),
5233 dl.getDebugLoc(), VTs,
5234 ISD::UNINDEXED, true, SVT, MMO);
5235 CSEMap.InsertNode(N, IP);
5237 return SDValue(N, 0);
5241 SelectionDAG::getIndexedStore(SDValue OrigStore, SDLoc dl, SDValue Base,
5242 SDValue Offset, ISD::MemIndexedMode AM) {
5243 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
5244 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
5245 "Store is already a indexed store!");
5246 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
5247 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
5248 FoldingSetNodeID ID;
5249 AddNodeIDNode(ID, ISD::STORE, VTs, Ops);
5250 ID.AddInteger(ST->getMemoryVT().getRawBits());
5251 ID.AddInteger(ST->getRawSubclassData());
5252 ID.AddInteger(ST->getPointerInfo().getAddrSpace());
5254 if (SDNode *E = FindNodeOrInsertPos(ID, dl.getDebugLoc(), IP))
5255 return SDValue(E, 0);
5257 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl.getIROrder(),
5258 dl.getDebugLoc(), VTs, AM,
5259 ST->isTruncatingStore(),
5261 ST->getMemOperand());
5262 CSEMap.InsertNode(N, IP);
5264 return SDValue(N, 0);
5268 SelectionDAG::getMaskedLoad(EVT VT, SDLoc dl, SDValue Chain,
5269 SDValue Ptr, SDValue Mask, SDValue Src0, EVT MemVT,
5270 MachineMemOperand *MMO, ISD::LoadExtType ExtTy) {
5272 SDVTList VTs = getVTList(VT, MVT::Other);
5273 SDValue Ops[] = { Chain, Ptr, Mask, Src0 };
5274 FoldingSetNodeID ID;
5275 AddNodeIDNode(ID, ISD::MLOAD, VTs, Ops);
5276 ID.AddInteger(VT.getRawBits());
5277 ID.AddInteger(encodeMemSDNodeFlags(ExtTy, ISD::UNINDEXED,
5279 MMO->isNonTemporal(),
5280 MMO->isInvariant()));
5281 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
5283 if (SDNode *E = FindNodeOrInsertPos(ID, dl.getDebugLoc(), IP)) {
5284 cast<MaskedLoadSDNode>(E)->refineAlignment(MMO);
5285 return SDValue(E, 0);
5287 SDNode *N = new (NodeAllocator) MaskedLoadSDNode(dl.getIROrder(),
5288 dl.getDebugLoc(), Ops, 4, VTs,
5290 CSEMap.InsertNode(N, IP);
5292 return SDValue(N, 0);
5295 SDValue SelectionDAG::getMaskedStore(SDValue Chain, SDLoc dl, SDValue Val,
5296 SDValue Ptr, SDValue Mask, EVT MemVT,
5297 MachineMemOperand *MMO, bool isTrunc) {
5298 assert(Chain.getValueType() == MVT::Other &&
5299 "Invalid chain type");
5300 EVT VT = Val.getValueType();
5301 SDVTList VTs = getVTList(MVT::Other);
5302 SDValue Ops[] = { Chain, Ptr, Mask, Val };
5303 FoldingSetNodeID ID;
5304 AddNodeIDNode(ID, ISD::MSTORE, VTs, Ops);
5305 ID.AddInteger(VT.getRawBits());
5306 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
5307 MMO->isNonTemporal(), MMO->isInvariant()));
5308 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
5310 if (SDNode *E = FindNodeOrInsertPos(ID, dl.getDebugLoc(), IP)) {
5311 cast<MaskedStoreSDNode>(E)->refineAlignment(MMO);
5312 return SDValue(E, 0);
5314 SDNode *N = new (NodeAllocator) MaskedStoreSDNode(dl.getIROrder(),
5315 dl.getDebugLoc(), Ops, 4,
5316 VTs, isTrunc, MemVT, MMO);
5317 CSEMap.InsertNode(N, IP);
5319 return SDValue(N, 0);
5323 SelectionDAG::getMaskedGather(SDVTList VTs, EVT VT, SDLoc dl,
5324 ArrayRef<SDValue> Ops,
5325 MachineMemOperand *MMO) {
5327 FoldingSetNodeID ID;
5328 AddNodeIDNode(ID, ISD::MGATHER, VTs, Ops);
5329 ID.AddInteger(VT.getRawBits());
5330 ID.AddInteger(encodeMemSDNodeFlags(ISD::NON_EXTLOAD, ISD::UNINDEXED,
5332 MMO->isNonTemporal(),
5333 MMO->isInvariant()));
5334 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
5336 if (SDNode *E = FindNodeOrInsertPos(ID, dl.getDebugLoc(), IP)) {
5337 cast<MaskedGatherSDNode>(E)->refineAlignment(MMO);
5338 return SDValue(E, 0);
5340 MaskedGatherSDNode *N =
5341 new (NodeAllocator) MaskedGatherSDNode(dl.getIROrder(), dl.getDebugLoc(),
5343 CSEMap.InsertNode(N, IP);
5345 return SDValue(N, 0);
5348 SDValue SelectionDAG::getMaskedScatter(SDVTList VTs, EVT VT, SDLoc dl,
5349 ArrayRef<SDValue> Ops,
5350 MachineMemOperand *MMO) {
5351 FoldingSetNodeID ID;
5352 AddNodeIDNode(ID, ISD::MSCATTER, VTs, Ops);
5353 ID.AddInteger(VT.getRawBits());
5354 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
5355 MMO->isNonTemporal(),
5356 MMO->isInvariant()));
5357 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
5359 if (SDNode *E = FindNodeOrInsertPos(ID, dl.getDebugLoc(), IP)) {
5360 cast<MaskedScatterSDNode>(E)->refineAlignment(MMO);
5361 return SDValue(E, 0);
5364 new (NodeAllocator) MaskedScatterSDNode(dl.getIROrder(), dl.getDebugLoc(),
5366 CSEMap.InsertNode(N, IP);
5368 return SDValue(N, 0);
5371 SDValue SelectionDAG::getVAArg(EVT VT, SDLoc dl,
5372 SDValue Chain, SDValue Ptr,
5375 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, dl, MVT::i32) };
5376 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops);
5379 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
5380 ArrayRef<SDUse> Ops) {
5381 switch (Ops.size()) {
5382 case 0: return getNode(Opcode, DL, VT);
5383 case 1: return getNode(Opcode, DL, VT, static_cast<const SDValue>(Ops[0]));
5384 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
5385 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
5389 // Copy from an SDUse array into an SDValue array for use with
5390 // the regular getNode logic.
5391 SmallVector<SDValue, 8> NewOps(Ops.begin(), Ops.end());
5392 return getNode(Opcode, DL, VT, NewOps);
5395 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
5396 ArrayRef<SDValue> Ops, const SDNodeFlags *Flags) {
5397 unsigned NumOps = Ops.size();
5399 case 0: return getNode(Opcode, DL, VT);
5400 case 1: return getNode(Opcode, DL, VT, Ops[0]);
5401 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Flags);
5402 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
5408 case ISD::SELECT_CC: {
5409 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
5410 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
5411 "LHS and RHS of condition must have same type!");
5412 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
5413 "True and False arms of SelectCC must have same type!");
5414 assert(Ops[2].getValueType() == VT &&
5415 "select_cc node must be of same type as true and false value!");
5419 assert(NumOps == 5 && "BR_CC takes 5 operands!");
5420 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
5421 "LHS/RHS of comparison should match types!");
5428 SDVTList VTs = getVTList(VT);
5430 if (VT != MVT::Glue) {
5431 FoldingSetNodeID ID;
5432 AddNodeIDNode(ID, Opcode, VTs, Ops);
5435 if (SDNode *E = FindNodeOrInsertPos(ID, DL.getDebugLoc(), IP))
5436 return SDValue(E, 0);
5438 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
5440 CSEMap.InsertNode(N, IP);
5442 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
5447 return SDValue(N, 0);
5450 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL,
5451 ArrayRef<EVT> ResultTys, ArrayRef<SDValue> Ops) {
5452 return getNode(Opcode, DL, getVTList(ResultTys), Ops);
5455 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5456 ArrayRef<SDValue> Ops) {
5457 if (VTList.NumVTs == 1)
5458 return getNode(Opcode, DL, VTList.VTs[0], Ops);
5462 // FIXME: figure out how to safely handle things like
5463 // int foo(int x) { return 1 << (x & 255); }
5464 // int bar() { return foo(256); }
5465 case ISD::SRA_PARTS:
5466 case ISD::SRL_PARTS:
5467 case ISD::SHL_PARTS:
5468 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
5469 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
5470 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
5471 else if (N3.getOpcode() == ISD::AND)
5472 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
5473 // If the and is only masking out bits that cannot effect the shift,
5474 // eliminate the and.
5475 unsigned NumBits = VT.getScalarType().getSizeInBits()*2;
5476 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
5477 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
5483 // Memoize the node unless it returns a flag.
5485 unsigned NumOps = Ops.size();
5486 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
5487 FoldingSetNodeID ID;
5488 AddNodeIDNode(ID, Opcode, VTList, Ops);
5490 if (SDNode *E = FindNodeOrInsertPos(ID, DL.getDebugLoc(), IP))
5491 return SDValue(E, 0);
5494 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(),
5495 DL.getDebugLoc(), VTList, Ops[0]);
5496 } else if (NumOps == 2) {
5497 N = new (NodeAllocator) BinarySDNode(Opcode, DL.getIROrder(),
5498 DL.getDebugLoc(), VTList, Ops[0],
5500 } else if (NumOps == 3) {
5501 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(),
5502 DL.getDebugLoc(), VTList, Ops[0],
5505 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
5508 CSEMap.InsertNode(N, IP);
5511 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(),
5512 DL.getDebugLoc(), VTList, Ops[0]);
5513 } else if (NumOps == 2) {
5514 N = new (NodeAllocator) BinarySDNode(Opcode, DL.getIROrder(),
5515 DL.getDebugLoc(), VTList, Ops[0],
5517 } else if (NumOps == 3) {
5518 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(),
5519 DL.getDebugLoc(), VTList, Ops[0],
5522 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
5527 return SDValue(N, 0);
5530 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList) {
5531 return getNode(Opcode, DL, VTList, None);
5534 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5536 SDValue Ops[] = { N1 };
5537 return getNode(Opcode, DL, VTList, Ops);
5540 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5541 SDValue N1, SDValue N2) {
5542 SDValue Ops[] = { N1, N2 };
5543 return getNode(Opcode, DL, VTList, Ops);
5546 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5547 SDValue N1, SDValue N2, SDValue N3) {
5548 SDValue Ops[] = { N1, N2, N3 };
5549 return getNode(Opcode, DL, VTList, Ops);
5552 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5553 SDValue N1, SDValue N2, SDValue N3,
5555 SDValue Ops[] = { N1, N2, N3, N4 };
5556 return getNode(Opcode, DL, VTList, Ops);
5559 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5560 SDValue N1, SDValue N2, SDValue N3,
5561 SDValue N4, SDValue N5) {
5562 SDValue Ops[] = { N1, N2, N3, N4, N5 };
5563 return getNode(Opcode, DL, VTList, Ops);
5566 SDVTList SelectionDAG::getVTList(EVT VT) {
5567 return makeVTList(SDNode::getValueTypeList(VT), 1);
5570 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
5571 FoldingSetNodeID ID;
5573 ID.AddInteger(VT1.getRawBits());
5574 ID.AddInteger(VT2.getRawBits());
5577 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5579 EVT *Array = Allocator.Allocate<EVT>(2);
5582 Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, 2);
5583 VTListMap.InsertNode(Result, IP);
5585 return Result->getSDVTList();
5588 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
5589 FoldingSetNodeID ID;
5591 ID.AddInteger(VT1.getRawBits());
5592 ID.AddInteger(VT2.getRawBits());
5593 ID.AddInteger(VT3.getRawBits());
5596 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5598 EVT *Array = Allocator.Allocate<EVT>(3);
5602 Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, 3);
5603 VTListMap.InsertNode(Result, IP);
5605 return Result->getSDVTList();
5608 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
5609 FoldingSetNodeID ID;
5611 ID.AddInteger(VT1.getRawBits());
5612 ID.AddInteger(VT2.getRawBits());
5613 ID.AddInteger(VT3.getRawBits());
5614 ID.AddInteger(VT4.getRawBits());
5617 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5619 EVT *Array = Allocator.Allocate<EVT>(4);
5624 Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, 4);
5625 VTListMap.InsertNode(Result, IP);
5627 return Result->getSDVTList();
5630 SDVTList SelectionDAG::getVTList(ArrayRef<EVT> VTs) {
5631 unsigned NumVTs = VTs.size();
5632 FoldingSetNodeID ID;
5633 ID.AddInteger(NumVTs);
5634 for (unsigned index = 0; index < NumVTs; index++) {
5635 ID.AddInteger(VTs[index].getRawBits());
5639 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5641 EVT *Array = Allocator.Allocate<EVT>(NumVTs);
5642 std::copy(VTs.begin(), VTs.end(), Array);
5643 Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, NumVTs);
5644 VTListMap.InsertNode(Result, IP);
5646 return Result->getSDVTList();
5650 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
5651 /// specified operands. If the resultant node already exists in the DAG,
5652 /// this does not modify the specified node, instead it returns the node that
5653 /// already exists. If the resultant node does not exist in the DAG, the
5654 /// input node is returned. As a degenerate case, if you specify the same
5655 /// input operands as the node already has, the input node is returned.
5656 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) {
5657 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
5659 // Check to see if there is no change.
5660 if (Op == N->getOperand(0)) return N;
5662 // See if the modified node already exists.
5663 void *InsertPos = nullptr;
5664 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
5667 // Nope it doesn't. Remove the node from its current place in the maps.
5669 if (!RemoveNodeFromCSEMaps(N))
5670 InsertPos = nullptr;
5672 // Now we update the operands.
5673 N->OperandList[0].set(Op);
5675 // If this gets put into a CSE map, add it.
5676 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
5680 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) {
5681 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
5683 // Check to see if there is no change.
5684 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
5685 return N; // No operands changed, just return the input node.
5687 // See if the modified node already exists.
5688 void *InsertPos = nullptr;
5689 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
5692 // Nope it doesn't. Remove the node from its current place in the maps.
5694 if (!RemoveNodeFromCSEMaps(N))
5695 InsertPos = nullptr;
5697 // Now we update the operands.
5698 if (N->OperandList[0] != Op1)
5699 N->OperandList[0].set(Op1);
5700 if (N->OperandList[1] != Op2)
5701 N->OperandList[1].set(Op2);
5703 // If this gets put into a CSE map, add it.
5704 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
5708 SDNode *SelectionDAG::
5709 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) {
5710 SDValue Ops[] = { Op1, Op2, Op3 };
5711 return UpdateNodeOperands(N, Ops);
5714 SDNode *SelectionDAG::
5715 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
5716 SDValue Op3, SDValue Op4) {
5717 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
5718 return UpdateNodeOperands(N, Ops);
5721 SDNode *SelectionDAG::
5722 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
5723 SDValue Op3, SDValue Op4, SDValue Op5) {
5724 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
5725 return UpdateNodeOperands(N, Ops);
5728 SDNode *SelectionDAG::
5729 UpdateNodeOperands(SDNode *N, ArrayRef<SDValue> Ops) {
5730 unsigned NumOps = Ops.size();
5731 assert(N->getNumOperands() == NumOps &&
5732 "Update with wrong number of operands");
5734 // If no operands changed just return the input node.
5735 if (std::equal(Ops.begin(), Ops.end(), N->op_begin()))
5738 // See if the modified node already exists.
5739 void *InsertPos = nullptr;
5740 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, InsertPos))
5743 // Nope it doesn't. Remove the node from its current place in the maps.
5745 if (!RemoveNodeFromCSEMaps(N))
5746 InsertPos = nullptr;
5748 // Now we update the operands.
5749 for (unsigned i = 0; i != NumOps; ++i)
5750 if (N->OperandList[i] != Ops[i])
5751 N->OperandList[i].set(Ops[i]);
5753 // If this gets put into a CSE map, add it.
5754 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
5758 /// DropOperands - Release the operands and set this node to have
5760 void SDNode::DropOperands() {
5761 // Unlike the code in MorphNodeTo that does this, we don't need to
5762 // watch for dead nodes here.
5763 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
5769 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
5772 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5774 SDVTList VTs = getVTList(VT);
5775 return SelectNodeTo(N, MachineOpc, VTs, None);
5778 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5779 EVT VT, SDValue Op1) {
5780 SDVTList VTs = getVTList(VT);
5781 SDValue Ops[] = { Op1 };
5782 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5785 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5786 EVT VT, SDValue Op1,
5788 SDVTList VTs = getVTList(VT);
5789 SDValue Ops[] = { Op1, Op2 };
5790 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5793 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5794 EVT VT, SDValue Op1,
5795 SDValue Op2, SDValue Op3) {
5796 SDVTList VTs = getVTList(VT);
5797 SDValue Ops[] = { Op1, Op2, Op3 };
5798 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5801 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5802 EVT VT, ArrayRef<SDValue> Ops) {
5803 SDVTList VTs = getVTList(VT);
5804 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5807 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5808 EVT VT1, EVT VT2, ArrayRef<SDValue> Ops) {
5809 SDVTList VTs = getVTList(VT1, VT2);
5810 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5813 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5815 SDVTList VTs = getVTList(VT1, VT2);
5816 return SelectNodeTo(N, MachineOpc, VTs, None);
5819 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5820 EVT VT1, EVT VT2, EVT VT3,
5821 ArrayRef<SDValue> Ops) {
5822 SDVTList VTs = getVTList(VT1, VT2, VT3);
5823 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5826 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5827 EVT VT1, EVT VT2, EVT VT3, EVT VT4,
5828 ArrayRef<SDValue> Ops) {
5829 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
5830 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5833 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5836 SDVTList VTs = getVTList(VT1, VT2);
5837 SDValue Ops[] = { Op1 };
5838 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5841 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5843 SDValue Op1, SDValue Op2) {
5844 SDVTList VTs = getVTList(VT1, VT2);
5845 SDValue Ops[] = { Op1, Op2 };
5846 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5849 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5851 SDValue Op1, SDValue Op2,
5853 SDVTList VTs = getVTList(VT1, VT2);
5854 SDValue Ops[] = { Op1, Op2, Op3 };
5855 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5858 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5859 EVT VT1, EVT VT2, EVT VT3,
5860 SDValue Op1, SDValue Op2,
5862 SDVTList VTs = getVTList(VT1, VT2, VT3);
5863 SDValue Ops[] = { Op1, Op2, Op3 };
5864 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5867 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5868 SDVTList VTs,ArrayRef<SDValue> Ops) {
5869 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops);
5870 // Reset the NodeID to -1.
5875 /// UpdadeSDLocOnMergedSDNode - If the opt level is -O0 then it throws away
5876 /// the line number information on the merged node since it is not possible to
5877 /// preserve the information that operation is associated with multiple lines.
5878 /// This will make the debugger working better at -O0, were there is a higher
5879 /// probability having other instructions associated with that line.
5881 /// For IROrder, we keep the smaller of the two
5882 SDNode *SelectionDAG::UpdadeSDLocOnMergedSDNode(SDNode *N, SDLoc OLoc) {
5883 DebugLoc NLoc = N->getDebugLoc();
5884 if (NLoc && OptLevel == CodeGenOpt::None && OLoc.getDebugLoc() != NLoc) {
5885 N->setDebugLoc(DebugLoc());
5887 unsigned Order = std::min(N->getIROrder(), OLoc.getIROrder());
5888 N->setIROrder(Order);
5892 /// MorphNodeTo - This *mutates* the specified node to have the specified
5893 /// return type, opcode, and operands.
5895 /// Note that MorphNodeTo returns the resultant node. If there is already a
5896 /// node of the specified opcode and operands, it returns that node instead of
5897 /// the current one. Note that the SDLoc need not be the same.
5899 /// Using MorphNodeTo is faster than creating a new node and swapping it in
5900 /// with ReplaceAllUsesWith both because it often avoids allocating a new
5901 /// node, and because it doesn't require CSE recalculation for any of
5902 /// the node's users.
5904 /// However, note that MorphNodeTo recursively deletes dead nodes from the DAG.
5905 /// As a consequence it isn't appropriate to use from within the DAG combiner or
5906 /// the legalizer which maintain worklists that would need to be updated when
5907 /// deleting things.
5908 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
5909 SDVTList VTs, ArrayRef<SDValue> Ops) {
5910 unsigned NumOps = Ops.size();
5911 // If an identical node already exists, use it.
5913 if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) {
5914 FoldingSetNodeID ID;
5915 AddNodeIDNode(ID, Opc, VTs, Ops);
5916 if (SDNode *ON = FindNodeOrInsertPos(ID, N->getDebugLoc(), IP))
5917 return UpdadeSDLocOnMergedSDNode(ON, SDLoc(N));
5920 if (!RemoveNodeFromCSEMaps(N))
5923 // Start the morphing.
5925 N->ValueList = VTs.VTs;
5926 N->NumValues = VTs.NumVTs;
5928 // Clear the operands list, updating used nodes to remove this from their
5929 // use list. Keep track of any operands that become dead as a result.
5930 SmallPtrSet<SDNode*, 16> DeadNodeSet;
5931 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
5933 SDNode *Used = Use.getNode();
5935 if (Used->use_empty())
5936 DeadNodeSet.insert(Used);
5939 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) {
5940 // Initialize the memory references information.
5941 MN->setMemRefs(nullptr, nullptr);
5942 // If NumOps is larger than the # of operands we can have in a
5943 // MachineSDNode, reallocate the operand list.
5944 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) {
5945 if (MN->OperandsNeedDelete)
5946 delete[] MN->OperandList;
5947 if (NumOps > array_lengthof(MN->LocalOperands))
5948 // We're creating a final node that will live unmorphed for the
5949 // remainder of the current SelectionDAG iteration, so we can allocate
5950 // the operands directly out of a pool with no recycling metadata.
5951 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
5952 Ops.data(), NumOps);
5954 MN->InitOperands(MN->LocalOperands, Ops.data(), NumOps);
5955 MN->OperandsNeedDelete = false;
5957 MN->InitOperands(MN->OperandList, Ops.data(), NumOps);
5959 // If NumOps is larger than the # of operands we currently have, reallocate
5960 // the operand list.
5961 if (NumOps > N->NumOperands) {
5962 if (N->OperandsNeedDelete)
5963 delete[] N->OperandList;
5964 N->InitOperands(new SDUse[NumOps], Ops.data(), NumOps);
5965 N->OperandsNeedDelete = true;
5967 N->InitOperands(N->OperandList, Ops.data(), NumOps);
5970 // Delete any nodes that are still dead after adding the uses for the
5972 if (!DeadNodeSet.empty()) {
5973 SmallVector<SDNode *, 16> DeadNodes;
5974 for (SDNode *N : DeadNodeSet)
5976 DeadNodes.push_back(N);
5977 RemoveDeadNodes(DeadNodes);
5981 CSEMap.InsertNode(N, IP); // Memoize the new node.
5986 /// getMachineNode - These are used for target selectors to create a new node
5987 /// with specified return type(s), MachineInstr opcode, and operands.
5989 /// Note that getMachineNode returns the resultant node. If there is already a
5990 /// node of the specified opcode and operands, it returns that node instead of
5991 /// the current one.
5993 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT) {
5994 SDVTList VTs = getVTList(VT);
5995 return getMachineNode(Opcode, dl, VTs, None);
5999 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT, SDValue Op1) {
6000 SDVTList VTs = getVTList(VT);
6001 SDValue Ops[] = { Op1 };
6002 return getMachineNode(Opcode, dl, VTs, Ops);
6006 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT,
6007 SDValue Op1, SDValue Op2) {
6008 SDVTList VTs = getVTList(VT);
6009 SDValue Ops[] = { Op1, Op2 };
6010 return getMachineNode(Opcode, dl, VTs, Ops);
6014 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT,
6015 SDValue Op1, SDValue Op2, SDValue Op3) {
6016 SDVTList VTs = getVTList(VT);
6017 SDValue Ops[] = { Op1, Op2, Op3 };
6018 return getMachineNode(Opcode, dl, VTs, Ops);
6022 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT,
6023 ArrayRef<SDValue> Ops) {
6024 SDVTList VTs = getVTList(VT);
6025 return getMachineNode(Opcode, dl, VTs, Ops);
6029 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1, EVT VT2) {
6030 SDVTList VTs = getVTList(VT1, VT2);
6031 return getMachineNode(Opcode, dl, VTs, None);
6035 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
6036 EVT VT1, EVT VT2, SDValue Op1) {
6037 SDVTList VTs = getVTList(VT1, VT2);
6038 SDValue Ops[] = { Op1 };
6039 return getMachineNode(Opcode, dl, VTs, Ops);
6043 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
6044 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) {
6045 SDVTList VTs = getVTList(VT1, VT2);
6046 SDValue Ops[] = { Op1, Op2 };
6047 return getMachineNode(Opcode, dl, VTs, Ops);
6051 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
6052 EVT VT1, EVT VT2, SDValue Op1,
6053 SDValue Op2, SDValue Op3) {
6054 SDVTList VTs = getVTList(VT1, VT2);
6055 SDValue Ops[] = { Op1, Op2, Op3 };
6056 return getMachineNode(Opcode, dl, VTs, Ops);
6060 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
6062 ArrayRef<SDValue> Ops) {
6063 SDVTList VTs = getVTList(VT1, VT2);
6064 return getMachineNode(Opcode, dl, VTs, Ops);
6068 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
6069 EVT VT1, EVT VT2, EVT VT3,
6070 SDValue Op1, SDValue Op2) {
6071 SDVTList VTs = getVTList(VT1, VT2, VT3);
6072 SDValue Ops[] = { Op1, Op2 };
6073 return getMachineNode(Opcode, dl, VTs, Ops);
6077 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
6078 EVT VT1, EVT VT2, EVT VT3,
6079 SDValue Op1, SDValue Op2, SDValue Op3) {
6080 SDVTList VTs = getVTList(VT1, VT2, VT3);
6081 SDValue Ops[] = { Op1, Op2, Op3 };
6082 return getMachineNode(Opcode, dl, VTs, Ops);
6086 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
6087 EVT VT1, EVT VT2, EVT VT3,
6088 ArrayRef<SDValue> Ops) {
6089 SDVTList VTs = getVTList(VT1, VT2, VT3);
6090 return getMachineNode(Opcode, dl, VTs, Ops);
6094 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1,
6095 EVT VT2, EVT VT3, EVT VT4,
6096 ArrayRef<SDValue> Ops) {
6097 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
6098 return getMachineNode(Opcode, dl, VTs, Ops);
6102 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
6103 ArrayRef<EVT> ResultTys,
6104 ArrayRef<SDValue> Ops) {
6105 SDVTList VTs = getVTList(ResultTys);
6106 return getMachineNode(Opcode, dl, VTs, Ops);
6110 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc DL, SDVTList VTs,
6111 ArrayRef<SDValue> OpsArray) {
6112 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue;
6115 const SDValue *Ops = OpsArray.data();
6116 unsigned NumOps = OpsArray.size();
6119 FoldingSetNodeID ID;
6120 AddNodeIDNode(ID, ~Opcode, VTs, OpsArray);
6122 if (SDNode *E = FindNodeOrInsertPos(ID, DL.getDebugLoc(), IP)) {
6123 return cast<MachineSDNode>(UpdadeSDLocOnMergedSDNode(E, DL));
6127 // Allocate a new MachineSDNode.
6128 N = new (NodeAllocator) MachineSDNode(~Opcode, DL.getIROrder(),
6129 DL.getDebugLoc(), VTs);
6131 // Initialize the operands list.
6132 if (NumOps > array_lengthof(N->LocalOperands))
6133 // We're creating a final node that will live unmorphed for the
6134 // remainder of the current SelectionDAG iteration, so we can allocate
6135 // the operands directly out of a pool with no recycling metadata.
6136 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
6139 N->InitOperands(N->LocalOperands, Ops, NumOps);
6140 N->OperandsNeedDelete = false;
6143 CSEMap.InsertNode(N, IP);
6149 /// getTargetExtractSubreg - A convenience function for creating
6150 /// TargetOpcode::EXTRACT_SUBREG nodes.
6152 SelectionDAG::getTargetExtractSubreg(int SRIdx, SDLoc DL, EVT VT,
6154 SDValue SRIdxVal = getTargetConstant(SRIdx, DL, MVT::i32);
6155 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL,
6156 VT, Operand, SRIdxVal);
6157 return SDValue(Subreg, 0);
6160 /// getTargetInsertSubreg - A convenience function for creating
6161 /// TargetOpcode::INSERT_SUBREG nodes.
6163 SelectionDAG::getTargetInsertSubreg(int SRIdx, SDLoc DL, EVT VT,
6164 SDValue Operand, SDValue Subreg) {
6165 SDValue SRIdxVal = getTargetConstant(SRIdx, DL, MVT::i32);
6166 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL,
6167 VT, Operand, Subreg, SRIdxVal);
6168 return SDValue(Result, 0);
6171 /// getNodeIfExists - Get the specified node if it's already available, or
6172 /// else return NULL.
6173 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
6174 ArrayRef<SDValue> Ops,
6175 const SDNodeFlags *Flags) {
6176 if (VTList.VTs[VTList.NumVTs - 1] != MVT::Glue) {
6177 FoldingSetNodeID ID;
6178 AddNodeIDNode(ID, Opcode, VTList, Ops);
6179 AddNodeIDFlags(ID, Opcode, Flags);
6181 if (SDNode *E = FindNodeOrInsertPos(ID, DebugLoc(), IP))
6187 /// getDbgValue - Creates a SDDbgValue node.
6190 SDDbgValue *SelectionDAG::getDbgValue(MDNode *Var, MDNode *Expr, SDNode *N,
6191 unsigned R, bool IsIndirect, uint64_t Off,
6192 DebugLoc DL, unsigned O) {
6193 assert(cast<DILocalVariable>(Var)->isValidLocationForIntrinsic(DL) &&
6194 "Expected inlined-at fields to agree");
6195 return new (DbgInfo->getAlloc())
6196 SDDbgValue(Var, Expr, N, R, IsIndirect, Off, DL, O);
6200 SDDbgValue *SelectionDAG::getConstantDbgValue(MDNode *Var, MDNode *Expr,
6201 const Value *C, uint64_t Off,
6202 DebugLoc DL, unsigned O) {
6203 assert(cast<DILocalVariable>(Var)->isValidLocationForIntrinsic(DL) &&
6204 "Expected inlined-at fields to agree");
6205 return new (DbgInfo->getAlloc()) SDDbgValue(Var, Expr, C, Off, DL, O);
6209 SDDbgValue *SelectionDAG::getFrameIndexDbgValue(MDNode *Var, MDNode *Expr,
6210 unsigned FI, uint64_t Off,
6211 DebugLoc DL, unsigned O) {
6212 assert(cast<DILocalVariable>(Var)->isValidLocationForIntrinsic(DL) &&
6213 "Expected inlined-at fields to agree");
6214 return new (DbgInfo->getAlloc()) SDDbgValue(Var, Expr, FI, Off, DL, O);
6219 /// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node
6220 /// pointed to by a use iterator is deleted, increment the use iterator
6221 /// so that it doesn't dangle.
6223 class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener {
6224 SDNode::use_iterator &UI;
6225 SDNode::use_iterator &UE;
6227 void NodeDeleted(SDNode *N, SDNode *E) override {
6228 // Increment the iterator as needed.
6229 while (UI != UE && N == *UI)
6234 RAUWUpdateListener(SelectionDAG &d,
6235 SDNode::use_iterator &ui,
6236 SDNode::use_iterator &ue)
6237 : SelectionDAG::DAGUpdateListener(d), UI(ui), UE(ue) {}
6242 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
6243 /// This can cause recursive merging of nodes in the DAG.
6245 /// This version assumes From has a single result value.
6247 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To) {
6248 SDNode *From = FromN.getNode();
6249 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
6250 "Cannot replace with this method!");
6251 assert(From != To.getNode() && "Cannot replace uses of with self");
6253 // Iterate over all the existing uses of From. New uses will be added
6254 // to the beginning of the use list, which we avoid visiting.
6255 // This specifically avoids visiting uses of From that arise while the
6256 // replacement is happening, because any such uses would be the result
6257 // of CSE: If an existing node looks like From after one of its operands
6258 // is replaced by To, we don't want to replace of all its users with To
6259 // too. See PR3018 for more info.
6260 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
6261 RAUWUpdateListener Listener(*this, UI, UE);
6265 // This node is about to morph, remove its old self from the CSE maps.
6266 RemoveNodeFromCSEMaps(User);
6268 // A user can appear in a use list multiple times, and when this
6269 // happens the uses are usually next to each other in the list.
6270 // To help reduce the number of CSE recomputations, process all
6271 // the uses of this user that we can find this way.
6273 SDUse &Use = UI.getUse();
6276 } while (UI != UE && *UI == User);
6278 // Now that we have modified User, add it back to the CSE maps. If it
6279 // already exists there, recursively merge the results together.
6280 AddModifiedNodeToCSEMaps(User);
6283 // If we just RAUW'd the root, take note.
6284 if (FromN == getRoot())
6288 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
6289 /// This can cause recursive merging of nodes in the DAG.
6291 /// This version assumes that for each value of From, there is a
6292 /// corresponding value in To in the same position with the same type.
6294 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To) {
6296 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
6297 assert((!From->hasAnyUseOfValue(i) ||
6298 From->getValueType(i) == To->getValueType(i)) &&
6299 "Cannot use this version of ReplaceAllUsesWith!");
6302 // Handle the trivial case.
6306 // Iterate over just the existing users of From. See the comments in
6307 // the ReplaceAllUsesWith above.
6308 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
6309 RAUWUpdateListener Listener(*this, UI, UE);
6313 // This node is about to morph, remove its old self from the CSE maps.
6314 RemoveNodeFromCSEMaps(User);
6316 // A user can appear in a use list multiple times, and when this
6317 // happens the uses are usually next to each other in the list.
6318 // To help reduce the number of CSE recomputations, process all
6319 // the uses of this user that we can find this way.
6321 SDUse &Use = UI.getUse();
6324 } while (UI != UE && *UI == User);
6326 // Now that we have modified User, add it back to the CSE maps. If it
6327 // already exists there, recursively merge the results together.
6328 AddModifiedNodeToCSEMaps(User);
6331 // If we just RAUW'd the root, take note.
6332 if (From == getRoot().getNode())
6333 setRoot(SDValue(To, getRoot().getResNo()));
6336 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
6337 /// This can cause recursive merging of nodes in the DAG.
6339 /// This version can replace From with any result values. To must match the
6340 /// number and types of values returned by From.
6341 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, const SDValue *To) {
6342 if (From->getNumValues() == 1) // Handle the simple case efficiently.
6343 return ReplaceAllUsesWith(SDValue(From, 0), To[0]);
6345 // Iterate over just the existing users of From. See the comments in
6346 // the ReplaceAllUsesWith above.
6347 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
6348 RAUWUpdateListener Listener(*this, UI, UE);
6352 // This node is about to morph, remove its old self from the CSE maps.
6353 RemoveNodeFromCSEMaps(User);
6355 // A user can appear in a use list multiple times, and when this
6356 // happens the uses are usually next to each other in the list.
6357 // To help reduce the number of CSE recomputations, process all
6358 // the uses of this user that we can find this way.
6360 SDUse &Use = UI.getUse();
6361 const SDValue &ToOp = To[Use.getResNo()];
6364 } while (UI != UE && *UI == User);
6366 // Now that we have modified User, add it back to the CSE maps. If it
6367 // already exists there, recursively merge the results together.
6368 AddModifiedNodeToCSEMaps(User);
6371 // If we just RAUW'd the root, take note.
6372 if (From == getRoot().getNode())
6373 setRoot(SDValue(To[getRoot().getResNo()]));
6376 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
6377 /// uses of other values produced by From.getNode() alone. The Deleted
6378 /// vector is handled the same way as for ReplaceAllUsesWith.
6379 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To){
6380 // Handle the really simple, really trivial case efficiently.
6381 if (From == To) return;
6383 // Handle the simple, trivial, case efficiently.
6384 if (From.getNode()->getNumValues() == 1) {
6385 ReplaceAllUsesWith(From, To);
6389 // Iterate over just the existing users of From. See the comments in
6390 // the ReplaceAllUsesWith above.
6391 SDNode::use_iterator UI = From.getNode()->use_begin(),
6392 UE = From.getNode()->use_end();
6393 RAUWUpdateListener Listener(*this, UI, UE);
6396 bool UserRemovedFromCSEMaps = false;
6398 // A user can appear in a use list multiple times, and when this
6399 // happens the uses are usually next to each other in the list.
6400 // To help reduce the number of CSE recomputations, process all
6401 // the uses of this user that we can find this way.
6403 SDUse &Use = UI.getUse();
6405 // Skip uses of different values from the same node.
6406 if (Use.getResNo() != From.getResNo()) {
6411 // If this node hasn't been modified yet, it's still in the CSE maps,
6412 // so remove its old self from the CSE maps.
6413 if (!UserRemovedFromCSEMaps) {
6414 RemoveNodeFromCSEMaps(User);
6415 UserRemovedFromCSEMaps = true;
6420 } while (UI != UE && *UI == User);
6422 // We are iterating over all uses of the From node, so if a use
6423 // doesn't use the specific value, no changes are made.
6424 if (!UserRemovedFromCSEMaps)
6427 // Now that we have modified User, add it back to the CSE maps. If it
6428 // already exists there, recursively merge the results together.
6429 AddModifiedNodeToCSEMaps(User);
6432 // If we just RAUW'd the root, take note.
6433 if (From == getRoot())
6438 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
6439 /// to record information about a use.
6446 /// operator< - Sort Memos by User.
6447 bool operator<(const UseMemo &L, const UseMemo &R) {
6448 return (intptr_t)L.User < (intptr_t)R.User;
6452 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
6453 /// uses of other values produced by From.getNode() alone. The same value
6454 /// may appear in both the From and To list. The Deleted vector is
6455 /// handled the same way as for ReplaceAllUsesWith.
6456 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
6459 // Handle the simple, trivial case efficiently.
6461 return ReplaceAllUsesOfValueWith(*From, *To);
6463 // Read up all the uses and make records of them. This helps
6464 // processing new uses that are introduced during the
6465 // replacement process.
6466 SmallVector<UseMemo, 4> Uses;
6467 for (unsigned i = 0; i != Num; ++i) {
6468 unsigned FromResNo = From[i].getResNo();
6469 SDNode *FromNode = From[i].getNode();
6470 for (SDNode::use_iterator UI = FromNode->use_begin(),
6471 E = FromNode->use_end(); UI != E; ++UI) {
6472 SDUse &Use = UI.getUse();
6473 if (Use.getResNo() == FromResNo) {
6474 UseMemo Memo = { *UI, i, &Use };
6475 Uses.push_back(Memo);
6480 // Sort the uses, so that all the uses from a given User are together.
6481 std::sort(Uses.begin(), Uses.end());
6483 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
6484 UseIndex != UseIndexEnd; ) {
6485 // We know that this user uses some value of From. If it is the right
6486 // value, update it.
6487 SDNode *User = Uses[UseIndex].User;
6489 // This node is about to morph, remove its old self from the CSE maps.
6490 RemoveNodeFromCSEMaps(User);
6492 // The Uses array is sorted, so all the uses for a given User
6493 // are next to each other in the list.
6494 // To help reduce the number of CSE recomputations, process all
6495 // the uses of this user that we can find this way.
6497 unsigned i = Uses[UseIndex].Index;
6498 SDUse &Use = *Uses[UseIndex].Use;
6502 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
6504 // Now that we have modified User, add it back to the CSE maps. If it
6505 // already exists there, recursively merge the results together.
6506 AddModifiedNodeToCSEMaps(User);
6510 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
6511 /// based on their topological order. It returns the maximum id and a vector
6512 /// of the SDNodes* in assigned order by reference.
6513 unsigned SelectionDAG::AssignTopologicalOrder() {
6515 unsigned DAGSize = 0;
6517 // SortedPos tracks the progress of the algorithm. Nodes before it are
6518 // sorted, nodes after it are unsorted. When the algorithm completes
6519 // it is at the end of the list.
6520 allnodes_iterator SortedPos = allnodes_begin();
6522 // Visit all the nodes. Move nodes with no operands to the front of
6523 // the list immediately. Annotate nodes that do have operands with their
6524 // operand count. Before we do this, the Node Id fields of the nodes
6525 // may contain arbitrary values. After, the Node Id fields for nodes
6526 // before SortedPos will contain the topological sort index, and the
6527 // Node Id fields for nodes At SortedPos and after will contain the
6528 // count of outstanding operands.
6529 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
6531 checkForCycles(N, this);
6532 unsigned Degree = N->getNumOperands();
6534 // A node with no uses, add it to the result array immediately.
6535 N->setNodeId(DAGSize++);
6536 allnodes_iterator Q = N;
6538 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
6539 assert(SortedPos != AllNodes.end() && "Overran node list");
6542 // Temporarily use the Node Id as scratch space for the degree count.
6543 N->setNodeId(Degree);
6547 // Visit all the nodes. As we iterate, move nodes into sorted order,
6548 // such that by the time the end is reached all nodes will be sorted.
6549 for (SDNode &Node : allnodes()) {
6551 checkForCycles(N, this);
6552 // N is in sorted position, so all its uses have one less operand
6553 // that needs to be sorted.
6554 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
6557 unsigned Degree = P->getNodeId();
6558 assert(Degree != 0 && "Invalid node degree");
6561 // All of P's operands are sorted, so P may sorted now.
6562 P->setNodeId(DAGSize++);
6564 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
6565 assert(SortedPos != AllNodes.end() && "Overran node list");
6568 // Update P's outstanding operand count.
6569 P->setNodeId(Degree);
6572 if (&Node == SortedPos) {
6574 allnodes_iterator I = N;
6576 dbgs() << "Overran sorted position:\n";
6577 S->dumprFull(this); dbgs() << "\n";
6578 dbgs() << "Checking if this is due to cycles\n";
6579 checkForCycles(this, true);
6581 llvm_unreachable(nullptr);
6585 assert(SortedPos == AllNodes.end() &&
6586 "Topological sort incomplete!");
6587 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
6588 "First node in topological sort is not the entry token!");
6589 assert(AllNodes.front().getNodeId() == 0 &&
6590 "First node in topological sort has non-zero id!");
6591 assert(AllNodes.front().getNumOperands() == 0 &&
6592 "First node in topological sort has operands!");
6593 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
6594 "Last node in topologic sort has unexpected id!");
6595 assert(AllNodes.back().use_empty() &&
6596 "Last node in topologic sort has users!");
6597 assert(DAGSize == allnodes_size() && "Node count mismatch!");
6601 /// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the
6602 /// value is produced by SD.
6603 void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) {
6605 assert(DbgInfo->getSDDbgValues(SD).empty() || SD->getHasDebugValue());
6606 SD->setHasDebugValue(true);
6608 DbgInfo->add(DB, SD, isParameter);
6611 /// TransferDbgValues - Transfer SDDbgValues.
6612 void SelectionDAG::TransferDbgValues(SDValue From, SDValue To) {
6613 if (From == To || !From.getNode()->getHasDebugValue())
6615 SDNode *FromNode = From.getNode();
6616 SDNode *ToNode = To.getNode();
6617 ArrayRef<SDDbgValue *> DVs = GetDbgValues(FromNode);
6618 SmallVector<SDDbgValue *, 2> ClonedDVs;
6619 for (ArrayRef<SDDbgValue *>::iterator I = DVs.begin(), E = DVs.end();
6621 SDDbgValue *Dbg = *I;
6622 if (Dbg->getKind() == SDDbgValue::SDNODE) {
6624 getDbgValue(Dbg->getVariable(), Dbg->getExpression(), ToNode,
6625 To.getResNo(), Dbg->isIndirect(), Dbg->getOffset(),
6626 Dbg->getDebugLoc(), Dbg->getOrder());
6627 ClonedDVs.push_back(Clone);
6630 for (SmallVectorImpl<SDDbgValue *>::iterator I = ClonedDVs.begin(),
6631 E = ClonedDVs.end(); I != E; ++I)
6632 AddDbgValue(*I, ToNode, false);
6635 //===----------------------------------------------------------------------===//
6637 //===----------------------------------------------------------------------===//
6639 HandleSDNode::~HandleSDNode() {
6643 GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, unsigned Order,
6644 DebugLoc DL, const GlobalValue *GA,
6645 EVT VT, int64_t o, unsigned char TF)
6646 : SDNode(Opc, Order, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) {
6650 AddrSpaceCastSDNode::AddrSpaceCastSDNode(unsigned Order, DebugLoc dl, EVT VT,
6651 SDValue X, unsigned SrcAS,
6653 : UnarySDNode(ISD::ADDRSPACECAST, Order, dl, getSDVTList(VT), X),
6654 SrcAddrSpace(SrcAS), DestAddrSpace(DestAS) {}
6656 MemSDNode::MemSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs,
6657 EVT memvt, MachineMemOperand *mmo)
6658 : SDNode(Opc, Order, dl, VTs), MemoryVT(memvt), MMO(mmo) {
6659 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
6660 MMO->isNonTemporal(), MMO->isInvariant());
6661 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
6662 assert(isNonTemporal() == MMO->isNonTemporal() &&
6663 "Non-temporal encoding error!");
6664 // We check here that the size of the memory operand fits within the size of
6665 // the MMO. This is because the MMO might indicate only a possible address
6666 // range instead of specifying the affected memory addresses precisely.
6667 assert(memvt.getStoreSize() <= MMO->getSize() && "Size mismatch!");
6670 MemSDNode::MemSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs,
6671 ArrayRef<SDValue> Ops, EVT memvt, MachineMemOperand *mmo)
6672 : SDNode(Opc, Order, dl, VTs, Ops),
6673 MemoryVT(memvt), MMO(mmo) {
6674 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
6675 MMO->isNonTemporal(), MMO->isInvariant());
6676 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
6677 assert(memvt.getStoreSize() <= MMO->getSize() && "Size mismatch!");
6680 /// Profile - Gather unique data for the node.
6682 void SDNode::Profile(FoldingSetNodeID &ID) const {
6683 AddNodeIDNode(ID, this);
6688 std::vector<EVT> VTs;
6691 VTs.reserve(MVT::LAST_VALUETYPE);
6692 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i)
6693 VTs.push_back(MVT((MVT::SimpleValueType)i));
6698 static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs;
6699 static ManagedStatic<EVTArray> SimpleVTArray;
6700 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
6702 /// getValueTypeList - Return a pointer to the specified value type.
6704 const EVT *SDNode::getValueTypeList(EVT VT) {
6705 if (VT.isExtended()) {
6706 sys::SmartScopedLock<true> Lock(*VTMutex);
6707 return &(*EVTs->insert(VT).first);
6709 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE &&
6710 "Value type out of range!");
6711 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy];
6715 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
6716 /// indicated value. This method ignores uses of other values defined by this
6718 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
6719 assert(Value < getNumValues() && "Bad value!");
6721 // TODO: Only iterate over uses of a given value of the node
6722 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
6723 if (UI.getUse().getResNo() == Value) {
6730 // Found exactly the right number of uses?
6735 /// hasAnyUseOfValue - Return true if there are any use of the indicated
6736 /// value. This method ignores uses of other values defined by this operation.
6737 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
6738 assert(Value < getNumValues() && "Bad value!");
6740 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
6741 if (UI.getUse().getResNo() == Value)
6748 /// isOnlyUserOf - Return true if this node is the only use of N.
6750 bool SDNode::isOnlyUserOf(const SDNode *N) const {
6752 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
6763 /// isOperand - Return true if this node is an operand of N.
6765 bool SDValue::isOperandOf(const SDNode *N) const {
6766 for (const SDValue &Op : N->op_values())
6772 bool SDNode::isOperandOf(const SDNode *N) const {
6773 for (const SDValue &Op : N->op_values())
6774 if (this == Op.getNode())
6779 /// reachesChainWithoutSideEffects - Return true if this operand (which must
6780 /// be a chain) reaches the specified operand without crossing any
6781 /// side-effecting instructions on any chain path. In practice, this looks
6782 /// through token factors and non-volatile loads. In order to remain efficient,
6783 /// this only looks a couple of nodes in, it does not do an exhaustive search.
6784 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
6785 unsigned Depth) const {
6786 if (*this == Dest) return true;
6788 // Don't search too deeply, we just want to be able to see through
6789 // TokenFactor's etc.
6790 if (Depth == 0) return false;
6792 // If this is a token factor, all inputs to the TF happen in parallel. If any
6793 // of the operands of the TF does not reach dest, then we cannot do the xform.
6794 if (getOpcode() == ISD::TokenFactor) {
6795 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
6796 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
6801 // Loads don't have side effects, look through them.
6802 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
6803 if (!Ld->isVolatile())
6804 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
6809 /// hasPredecessor - Return true if N is a predecessor of this node.
6810 /// N is either an operand of this node, or can be reached by recursively
6811 /// traversing up the operands.
6812 /// NOTE: This is an expensive method. Use it carefully.
6813 bool SDNode::hasPredecessor(const SDNode *N) const {
6814 SmallPtrSet<const SDNode *, 32> Visited;
6815 SmallVector<const SDNode *, 16> Worklist;
6816 return hasPredecessorHelper(N, Visited, Worklist);
6820 SDNode::hasPredecessorHelper(const SDNode *N,
6821 SmallPtrSetImpl<const SDNode *> &Visited,
6822 SmallVectorImpl<const SDNode *> &Worklist) const {
6823 if (Visited.empty()) {
6824 Worklist.push_back(this);
6826 // Take a look in the visited set. If we've already encountered this node
6827 // we needn't search further.
6828 if (Visited.count(N))
6832 // Haven't visited N yet. Continue the search.
6833 while (!Worklist.empty()) {
6834 const SDNode *M = Worklist.pop_back_val();
6835 for (const SDValue &OpV : M->op_values()) {
6836 SDNode *Op = OpV.getNode();
6837 if (Visited.insert(Op).second)
6838 Worklist.push_back(Op);
6847 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
6848 assert(Num < NumOperands && "Invalid child # of SDNode!");
6849 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
6852 const SDNodeFlags *SDNode::getFlags() const {
6853 if (auto *FlagsNode = dyn_cast<BinaryWithFlagsSDNode>(this))
6854 return &FlagsNode->Flags;
6858 SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
6859 assert(N->getNumValues() == 1 &&
6860 "Can't unroll a vector with multiple results!");
6862 EVT VT = N->getValueType(0);
6863 unsigned NE = VT.getVectorNumElements();
6864 EVT EltVT = VT.getVectorElementType();
6867 SmallVector<SDValue, 8> Scalars;
6868 SmallVector<SDValue, 4> Operands(N->getNumOperands());
6870 // If ResNE is 0, fully unroll the vector op.
6873 else if (NE > ResNE)
6877 for (i= 0; i != NE; ++i) {
6878 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) {
6879 SDValue Operand = N->getOperand(j);
6880 EVT OperandVT = Operand.getValueType();
6881 if (OperandVT.isVector()) {
6882 // A vector operand; extract a single element.
6883 EVT OperandEltVT = OperandVT.getVectorElementType();
6885 getNode(ISD::EXTRACT_VECTOR_ELT, dl, OperandEltVT, Operand,
6886 getConstant(i, dl, TLI->getVectorIdxTy(getDataLayout())));
6888 // A scalar operand; just use it as is.
6889 Operands[j] = Operand;
6893 switch (N->getOpcode()) {
6895 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands,
6900 Scalars.push_back(getNode(ISD::SELECT, dl, EltVT, Operands));
6907 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0],
6908 getShiftAmountOperand(Operands[0].getValueType(),
6911 case ISD::SIGN_EXTEND_INREG:
6912 case ISD::FP_ROUND_INREG: {
6913 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType();
6914 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6916 getValueType(ExtVT)));
6921 for (; i < ResNE; ++i)
6922 Scalars.push_back(getUNDEF(EltVT));
6924 return getNode(ISD::BUILD_VECTOR, dl,
6925 EVT::getVectorVT(*getContext(), EltVT, ResNE), Scalars);
6929 /// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a
6930 /// location that is 'Dist' units away from the location that the 'Base' load
6931 /// is loading from.
6932 bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base,
6933 unsigned Bytes, int Dist) const {
6934 if (LD->getChain() != Base->getChain())
6936 EVT VT = LD->getValueType(0);
6937 if (VT.getSizeInBits() / 8 != Bytes)
6940 SDValue Loc = LD->getOperand(1);
6941 SDValue BaseLoc = Base->getOperand(1);
6942 if (Loc.getOpcode() == ISD::FrameIndex) {
6943 if (BaseLoc.getOpcode() != ISD::FrameIndex)
6945 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo();
6946 int FI = cast<FrameIndexSDNode>(Loc)->getIndex();
6947 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex();
6948 int FS = MFI->getObjectSize(FI);
6949 int BFS = MFI->getObjectSize(BFI);
6950 if (FS != BFS || FS != (int)Bytes) return false;
6951 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes);
6955 if (isBaseWithConstantOffset(Loc)) {
6956 int64_t LocOffset = cast<ConstantSDNode>(Loc.getOperand(1))->getSExtValue();
6957 if (Loc.getOperand(0) == BaseLoc) {
6958 // If the base location is a simple address with no offset itself, then
6959 // the second load's first add operand should be the base address.
6960 if (LocOffset == Dist * (int)Bytes)
6962 } else if (isBaseWithConstantOffset(BaseLoc)) {
6963 // The base location itself has an offset, so subtract that value from the
6964 // second load's offset before comparing to distance * size.
6966 cast<ConstantSDNode>(BaseLoc.getOperand(1))->getSExtValue();
6967 if (Loc.getOperand(0) == BaseLoc.getOperand(0)) {
6968 if ((LocOffset - BOffset) == Dist * (int)Bytes)
6973 const GlobalValue *GV1 = nullptr;
6974 const GlobalValue *GV2 = nullptr;
6975 int64_t Offset1 = 0;
6976 int64_t Offset2 = 0;
6977 bool isGA1 = TLI->isGAPlusOffset(Loc.getNode(), GV1, Offset1);
6978 bool isGA2 = TLI->isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2);
6979 if (isGA1 && isGA2 && GV1 == GV2)
6980 return Offset1 == (Offset2 + Dist*Bytes);
6985 /// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if
6986 /// it cannot be inferred.
6987 unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const {
6988 // If this is a GlobalAddress + cst, return the alignment.
6989 const GlobalValue *GV;
6990 int64_t GVOffset = 0;
6991 if (TLI->isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) {
6992 unsigned PtrWidth = getDataLayout().getPointerTypeSizeInBits(GV->getType());
6993 APInt KnownZero(PtrWidth, 0), KnownOne(PtrWidth, 0);
6994 llvm::computeKnownBits(const_cast<GlobalValue *>(GV), KnownZero, KnownOne,
6996 unsigned AlignBits = KnownZero.countTrailingOnes();
6997 unsigned Align = AlignBits ? 1 << std::min(31U, AlignBits) : 0;
6999 return MinAlign(Align, GVOffset);
7002 // If this is a direct reference to a stack slot, use information about the
7003 // stack slot's alignment.
7004 int FrameIdx = 1 << 31;
7005 int64_t FrameOffset = 0;
7006 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) {
7007 FrameIdx = FI->getIndex();
7008 } else if (isBaseWithConstantOffset(Ptr) &&
7009 isa<FrameIndexSDNode>(Ptr.getOperand(0))) {
7011 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
7012 FrameOffset = Ptr.getConstantOperandVal(1);
7015 if (FrameIdx != (1 << 31)) {
7016 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo();
7017 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx),
7025 /// GetSplitDestVTs - Compute the VTs needed for the low/hi parts of a type
7026 /// which is split (or expanded) into two not necessarily identical pieces.
7027 std::pair<EVT, EVT> SelectionDAG::GetSplitDestVTs(const EVT &VT) const {
7028 // Currently all types are split in half.
7030 if (!VT.isVector()) {
7031 LoVT = HiVT = TLI->getTypeToTransformTo(*getContext(), VT);
7033 unsigned NumElements = VT.getVectorNumElements();
7034 assert(!(NumElements & 1) && "Splitting vector, but not in half!");
7035 LoVT = HiVT = EVT::getVectorVT(*getContext(), VT.getVectorElementType(),
7038 return std::make_pair(LoVT, HiVT);
7041 /// SplitVector - Split the vector with EXTRACT_SUBVECTOR and return the
7043 std::pair<SDValue, SDValue>
7044 SelectionDAG::SplitVector(const SDValue &N, const SDLoc &DL, const EVT &LoVT,
7046 assert(LoVT.getVectorNumElements() + HiVT.getVectorNumElements() <=
7047 N.getValueType().getVectorNumElements() &&
7048 "More vector elements requested than available!");
7050 Lo = getNode(ISD::EXTRACT_SUBVECTOR, DL, LoVT, N,
7051 getConstant(0, DL, TLI->getVectorIdxTy(getDataLayout())));
7052 Hi = getNode(ISD::EXTRACT_SUBVECTOR, DL, HiVT, N,
7053 getConstant(LoVT.getVectorNumElements(), DL,
7054 TLI->getVectorIdxTy(getDataLayout())));
7055 return std::make_pair(Lo, Hi);
7058 void SelectionDAG::ExtractVectorElements(SDValue Op,
7059 SmallVectorImpl<SDValue> &Args,
7060 unsigned Start, unsigned Count) {
7061 EVT VT = Op.getValueType();
7063 Count = VT.getVectorNumElements();
7065 EVT EltVT = VT.getVectorElementType();
7066 EVT IdxTy = TLI->getVectorIdxTy(getDataLayout());
7068 for (unsigned i = Start, e = Start + Count; i != e; ++i) {
7069 Args.push_back(getNode(ISD::EXTRACT_VECTOR_ELT, SL, EltVT,
7070 Op, getConstant(i, SL, IdxTy)));
7074 // getAddressSpace - Return the address space this GlobalAddress belongs to.
7075 unsigned GlobalAddressSDNode::getAddressSpace() const {
7076 return getGlobal()->getType()->getAddressSpace();
7080 Type *ConstantPoolSDNode::getType() const {
7081 if (isMachineConstantPoolEntry())
7082 return Val.MachineCPVal->getType();
7083 return Val.ConstVal->getType();
7086 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
7088 unsigned &SplatBitSize,
7090 unsigned MinSplatBits,
7091 bool isBigEndian) const {
7092 EVT VT = getValueType(0);
7093 assert(VT.isVector() && "Expected a vector type");
7094 unsigned sz = VT.getSizeInBits();
7095 if (MinSplatBits > sz)
7098 SplatValue = APInt(sz, 0);
7099 SplatUndef = APInt(sz, 0);
7101 // Get the bits. Bits with undefined values (when the corresponding element
7102 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
7103 // in SplatValue. If any of the values are not constant, give up and return
7105 unsigned int nOps = getNumOperands();
7106 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
7107 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
7109 for (unsigned j = 0; j < nOps; ++j) {
7110 unsigned i = isBigEndian ? nOps-1-j : j;
7111 SDValue OpVal = getOperand(i);
7112 unsigned BitPos = j * EltBitSize;
7114 if (OpVal.getOpcode() == ISD::UNDEF)
7115 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize);
7116 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
7117 SplatValue |= CN->getAPIntValue().zextOrTrunc(EltBitSize).
7118 zextOrTrunc(sz) << BitPos;
7119 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
7120 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
7125 // The build_vector is all constants or undefs. Find the smallest element
7126 // size that splats the vector.
7128 HasAnyUndefs = (SplatUndef != 0);
7131 unsigned HalfSize = sz / 2;
7132 APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize);
7133 APInt LowValue = SplatValue.trunc(HalfSize);
7134 APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize);
7135 APInt LowUndef = SplatUndef.trunc(HalfSize);
7137 // If the two halves do not match (ignoring undef bits), stop here.
7138 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
7139 MinSplatBits > HalfSize)
7142 SplatValue = HighValue | LowValue;
7143 SplatUndef = HighUndef & LowUndef;
7152 SDValue BuildVectorSDNode::getSplatValue(BitVector *UndefElements) const {
7153 if (UndefElements) {
7154 UndefElements->clear();
7155 UndefElements->resize(getNumOperands());
7158 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
7159 SDValue Op = getOperand(i);
7160 if (Op.getOpcode() == ISD::UNDEF) {
7162 (*UndefElements)[i] = true;
7163 } else if (!Splatted) {
7165 } else if (Splatted != Op) {
7171 assert(getOperand(0).getOpcode() == ISD::UNDEF &&
7172 "Can only have a splat without a constant for all undefs.");
7173 return getOperand(0);
7180 BuildVectorSDNode::getConstantSplatNode(BitVector *UndefElements) const {
7181 return dyn_cast_or_null<ConstantSDNode>(getSplatValue(UndefElements));
7185 BuildVectorSDNode::getConstantFPSplatNode(BitVector *UndefElements) const {
7186 return dyn_cast_or_null<ConstantFPSDNode>(getSplatValue(UndefElements));
7189 bool BuildVectorSDNode::isConstant() const {
7190 for (const SDValue &Op : op_values()) {
7191 unsigned Opc = Op.getOpcode();
7192 if (Opc != ISD::UNDEF && Opc != ISD::Constant && Opc != ISD::ConstantFP)
7198 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
7199 // Find the first non-undef value in the shuffle mask.
7201 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
7204 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
7206 // Make sure all remaining elements are either undef or the same as the first
7208 for (int Idx = Mask[i]; i != e; ++i)
7209 if (Mask[i] >= 0 && Mask[i] != Idx)
7215 static void checkForCyclesHelper(const SDNode *N,
7216 SmallPtrSetImpl<const SDNode*> &Visited,
7217 SmallPtrSetImpl<const SDNode*> &Checked,
7218 const llvm::SelectionDAG *DAG) {
7219 // If this node has already been checked, don't check it again.
7220 if (Checked.count(N))
7223 // If a node has already been visited on this depth-first walk, reject it as
7225 if (!Visited.insert(N).second) {
7226 errs() << "Detected cycle in SelectionDAG\n";
7227 dbgs() << "Offending node:\n";
7228 N->dumprFull(DAG); dbgs() << "\n";
7232 for (const SDValue &Op : N->op_values())
7233 checkForCyclesHelper(Op.getNode(), Visited, Checked, DAG);
7240 void llvm::checkForCycles(const llvm::SDNode *N,
7241 const llvm::SelectionDAG *DAG,
7249 assert(N && "Checking nonexistent SDNode");
7250 SmallPtrSet<const SDNode*, 32> visited;
7251 SmallPtrSet<const SDNode*, 32> checked;
7252 checkForCyclesHelper(N, visited, checked, DAG);
7257 void llvm::checkForCycles(const llvm::SelectionDAG *DAG, bool force) {
7258 checkForCycles(DAG->getRoot().getNode(), DAG, force);