1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "llvm/Constants.h"
16 #include "llvm/GlobalValue.h"
17 #include "llvm/Assembly/Writer.h"
18 #include "llvm/CodeGen/MachineBasicBlock.h"
19 #include "llvm/Support/MathExtras.h"
20 #include "llvm/Target/MRegisterInfo.h"
21 #include "llvm/Target/TargetLowering.h"
22 #include "llvm/Target/TargetInstrInfo.h"
23 #include "llvm/Target/TargetMachine.h"
30 static bool isCommutativeBinOp(unsigned Opcode) {
36 case ISD::XOR: return true;
37 default: return false; // FIXME: Need commutative info for user ops!
41 static bool isAssociativeBinOp(unsigned Opcode) {
47 case ISD::XOR: return true;
48 default: return false; // FIXME: Need associative info for user ops!
52 // isInvertibleForFree - Return true if there is no cost to emitting the logical
53 // inverse of this node.
54 static bool isInvertibleForFree(SDOperand N) {
55 if (isa<ConstantSDNode>(N.Val)) return true;
56 if (N.Val->getOpcode() == ISD::SETCC && N.Val->hasOneUse())
61 //===----------------------------------------------------------------------===//
62 // ConstantFPSDNode Class
63 //===----------------------------------------------------------------------===//
65 /// isExactlyValue - We don't rely on operator== working on double values, as
66 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
67 /// As such, this method can be used to do an exact bit-for-bit comparison of
68 /// two floating point values.
69 bool ConstantFPSDNode::isExactlyValue(double V) const {
70 return DoubleToBits(V) == DoubleToBits(Value);
73 //===----------------------------------------------------------------------===//
75 //===----------------------------------------------------------------------===//
77 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
78 /// when given the operation for (X op Y).
79 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
80 // To perform this operation, we just need to swap the L and G bits of the
82 unsigned OldL = (Operation >> 2) & 1;
83 unsigned OldG = (Operation >> 1) & 1;
84 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
85 (OldL << 1) | // New G bit
86 (OldG << 2)); // New L bit.
89 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
90 /// 'op' is a valid SetCC operation.
91 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
92 unsigned Operation = Op;
94 Operation ^= 7; // Flip L, G, E bits, but not U.
96 Operation ^= 15; // Flip all of the condition bits.
97 if (Operation > ISD::SETTRUE2)
98 Operation &= ~8; // Don't let N and U bits get set.
99 return ISD::CondCode(Operation);
103 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
104 /// signed operation and 2 if the result is an unsigned comparison. Return zero
105 /// if the operation does not depend on the sign of the input (setne and seteq).
106 static int isSignedOp(ISD::CondCode Opcode) {
108 default: assert(0 && "Illegal integer setcc operation!");
110 case ISD::SETNE: return 0;
114 case ISD::SETGE: return 1;
118 case ISD::SETUGE: return 2;
122 /// getSetCCOrOperation - Return the result of a logical OR between different
123 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
124 /// returns SETCC_INVALID if it is not possible to represent the resultant
126 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
128 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
129 // Cannot fold a signed integer setcc with an unsigned integer setcc.
130 return ISD::SETCC_INVALID;
132 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
134 // If the N and U bits get set then the resultant comparison DOES suddenly
135 // care about orderedness, and is true when ordered.
136 if (Op > ISD::SETTRUE2)
137 Op &= ~16; // Clear the N bit.
138 return ISD::CondCode(Op);
141 /// getSetCCAndOperation - Return the result of a logical AND between different
142 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
143 /// function returns zero if it is not possible to represent the resultant
145 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
147 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
148 // Cannot fold a signed setcc with an unsigned setcc.
149 return ISD::SETCC_INVALID;
151 // Combine all of the condition bits.
152 return ISD::CondCode(Op1 & Op2);
155 const TargetMachine &SelectionDAG::getTarget() const {
156 return TLI.getTargetMachine();
159 //===----------------------------------------------------------------------===//
160 // SelectionDAG Class
161 //===----------------------------------------------------------------------===//
163 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
164 /// SelectionDAG, including nodes (like loads) that have uses of their token
165 /// chain but no other uses and no side effect. If a node is passed in as an
166 /// argument, it is used as the seed for node deletion.
167 void SelectionDAG::RemoveDeadNodes(SDNode *N) {
168 std::set<SDNode*> AllNodeSet(AllNodes.begin(), AllNodes.end());
170 // Create a dummy node (which is not added to allnodes), that adds a reference
171 // to the root node, preventing it from being deleted.
172 SDNode *DummyNode = new SDNode(ISD::EntryToken, getRoot());
174 // If we have a hint to start from, use it.
175 if (N) DeleteNodeIfDead(N, &AllNodeSet);
178 unsigned NumNodes = AllNodeSet.size();
179 for (std::set<SDNode*>::iterator I = AllNodeSet.begin(), E = AllNodeSet.end();
181 // Try to delete this node.
182 DeleteNodeIfDead(*I, &AllNodeSet);
184 // If we actually deleted any nodes, do not use invalid iterators in
186 if (AllNodeSet.size() != NumNodes)
191 if (AllNodes.size() != NumNodes)
192 AllNodes.assign(AllNodeSet.begin(), AllNodeSet.end());
194 // If the root changed (e.g. it was a dead load, update the root).
195 setRoot(DummyNode->getOperand(0));
197 // Now that we are done with the dummy node, delete it.
198 DummyNode->getOperand(0).Val->removeUser(DummyNode);
203 void SelectionDAG::DeleteNodeIfDead(SDNode *N, void *NodeSet) {
207 // Okay, we really are going to delete this node. First take this out of the
208 // appropriate CSE map.
209 RemoveNodeFromCSEMaps(N);
211 // Next, brutally remove the operand list. This is safe to do, as there are
212 // no cycles in the graph.
213 while (!N->Operands.empty()) {
214 SDNode *O = N->Operands.back().Val;
215 N->Operands.pop_back();
218 // Now that we removed this operand, see if there are no uses of it left.
219 DeleteNodeIfDead(O, NodeSet);
222 // Remove the node from the nodes set and delete it.
223 std::set<SDNode*> &AllNodeSet = *(std::set<SDNode*>*)NodeSet;
226 // Now that the node is gone, check to see if any of the operands of this node
231 void SelectionDAG::DeleteNode(SDNode *N) {
232 assert(N->use_empty() && "Cannot delete a node that is not dead!");
234 // First take this out of the appropriate CSE map.
235 RemoveNodeFromCSEMaps(N);
237 // Remove it from the AllNodes list.
238 for (std::vector<SDNode*>::iterator I = AllNodes.begin(); ; ++I) {
239 assert(I != AllNodes.end() && "Node not in AllNodes list??");
241 // Erase from the vector, which is not ordered.
242 std::swap(*I, AllNodes.back());
248 // Drop all of the operands and decrement used nodes use counts.
249 while (!N->Operands.empty()) {
250 SDNode *O = N->Operands.back().Val;
251 N->Operands.pop_back();
258 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
259 /// correspond to it. This is useful when we're about to delete or repurpose
260 /// the node. We don't want future request for structurally identical nodes
261 /// to return N anymore.
262 void SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
263 switch (N->getOpcode()) {
265 Constants.erase(std::make_pair(cast<ConstantSDNode>(N)->getValue(),
266 N->getValueType(0)));
268 case ISD::TargetConstant:
269 TargetConstants.erase(std::make_pair(cast<ConstantSDNode>(N)->getValue(),
270 N->getValueType(0)));
272 case ISD::ConstantFP: {
273 uint64_t V = DoubleToBits(cast<ConstantFPSDNode>(N)->getValue());
274 ConstantFPs.erase(std::make_pair(V, N->getValueType(0)));
278 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
279 "Cond code doesn't exist!");
280 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
282 case ISD::GlobalAddress:
283 GlobalValues.erase(cast<GlobalAddressSDNode>(N)->getGlobal());
285 case ISD::TargetGlobalAddress:
286 TargetGlobalValues.erase(cast<GlobalAddressSDNode>(N)->getGlobal());
288 case ISD::FrameIndex:
289 FrameIndices.erase(cast<FrameIndexSDNode>(N)->getIndex());
291 case ISD::TargetFrameIndex:
292 TargetFrameIndices.erase(cast<FrameIndexSDNode>(N)->getIndex());
294 case ISD::ConstantPool:
295 ConstantPoolIndices.erase(cast<ConstantPoolSDNode>(N)->get());
297 case ISD::TargetConstantPool:
298 TargetConstantPoolIndices.erase(cast<ConstantPoolSDNode>(N)->get());
300 case ISD::BasicBlock:
301 BBNodes.erase(cast<BasicBlockSDNode>(N)->getBasicBlock());
303 case ISD::ExternalSymbol:
304 ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
307 ValueTypeNodes[cast<VTSDNode>(N)->getVT()] = 0;
310 RegNodes.erase(std::make_pair(cast<RegisterSDNode>(N)->getReg(),
311 N->getValueType(0)));
313 case ISD::SRCVALUE: {
314 SrcValueSDNode *SVN = cast<SrcValueSDNode>(N);
315 ValueNodes.erase(std::make_pair(SVN->getValue(), SVN->getOffset()));
319 Loads.erase(std::make_pair(N->getOperand(1),
320 std::make_pair(N->getOperand(0),
321 N->getValueType(0))));
324 if (N->getNumOperands() == 1)
325 UnaryOps.erase(std::make_pair(N->getOpcode(),
326 std::make_pair(N->getOperand(0),
327 N->getValueType(0))));
328 else if (N->getNumOperands() == 2)
329 BinaryOps.erase(std::make_pair(N->getOpcode(),
330 std::make_pair(N->getOperand(0),
332 else if (N->getNumValues() == 1) {
333 std::vector<SDOperand> Ops(N->op_begin(), N->op_end());
334 OneResultNodes.erase(std::make_pair(N->getOpcode(),
335 std::make_pair(N->getValueType(0),
338 // Remove the node from the ArbitraryNodes map.
339 std::vector<MVT::ValueType> RV(N->value_begin(), N->value_end());
340 std::vector<SDOperand> Ops(N->op_begin(), N->op_end());
341 ArbitraryNodes.erase(std::make_pair(N->getOpcode(),
342 std::make_pair(RV, Ops)));
348 /// AddNonLeafNodeToCSEMaps - Add the specified node back to the CSE maps. It
349 /// has been taken out and modified in some way. If the specified node already
350 /// exists in the CSE maps, do not modify the maps, but return the existing node
351 /// instead. If it doesn't exist, add it and return null.
353 SDNode *SelectionDAG::AddNonLeafNodeToCSEMaps(SDNode *N) {
354 assert(N->getNumOperands() && "This is a leaf node!");
355 if (N->getOpcode() == ISD::LOAD) {
356 SDNode *&L = Loads[std::make_pair(N->getOperand(1),
357 std::make_pair(N->getOperand(0),
358 N->getValueType(0)))];
361 } else if (N->getNumOperands() == 1) {
362 SDNode *&U = UnaryOps[std::make_pair(N->getOpcode(),
363 std::make_pair(N->getOperand(0),
364 N->getValueType(0)))];
367 } else if (N->getNumOperands() == 2) {
368 SDNode *&B = BinaryOps[std::make_pair(N->getOpcode(),
369 std::make_pair(N->getOperand(0),
373 } else if (N->getNumValues() == 1) {
374 std::vector<SDOperand> Ops(N->op_begin(), N->op_end());
375 SDNode *&ORN = OneResultNodes[std::make_pair(N->getOpcode(),
376 std::make_pair(N->getValueType(0), Ops))];
380 // Remove the node from the ArbitraryNodes map.
381 std::vector<MVT::ValueType> RV(N->value_begin(), N->value_end());
382 std::vector<SDOperand> Ops(N->op_begin(), N->op_end());
383 SDNode *&AN = ArbitraryNodes[std::make_pair(N->getOpcode(),
384 std::make_pair(RV, Ops))];
394 SelectionDAG::~SelectionDAG() {
395 for (unsigned i = 0, e = AllNodes.size(); i != e; ++i)
399 SDOperand SelectionDAG::getZeroExtendInReg(SDOperand Op, MVT::ValueType VT) {
400 if (Op.getValueType() == VT) return Op;
401 int64_t Imm = ~0ULL >> (64-MVT::getSizeInBits(VT));
402 return getNode(ISD::AND, Op.getValueType(), Op,
403 getConstant(Imm, Op.getValueType()));
406 SDOperand SelectionDAG::getConstant(uint64_t Val, MVT::ValueType VT) {
407 assert(MVT::isInteger(VT) && "Cannot create FP integer constant!");
408 // Mask out any bits that are not valid for this constant.
410 Val &= ((uint64_t)1 << MVT::getSizeInBits(VT)) - 1;
412 SDNode *&N = Constants[std::make_pair(Val, VT)];
413 if (N) return SDOperand(N, 0);
414 N = new ConstantSDNode(false, Val, VT);
415 AllNodes.push_back(N);
416 return SDOperand(N, 0);
419 SDOperand SelectionDAG::getTargetConstant(uint64_t Val, MVT::ValueType VT) {
420 assert(MVT::isInteger(VT) && "Cannot create FP integer constant!");
421 // Mask out any bits that are not valid for this constant.
423 Val &= ((uint64_t)1 << MVT::getSizeInBits(VT)) - 1;
425 SDNode *&N = TargetConstants[std::make_pair(Val, VT)];
426 if (N) return SDOperand(N, 0);
427 N = new ConstantSDNode(true, Val, VT);
428 AllNodes.push_back(N);
429 return SDOperand(N, 0);
432 SDOperand SelectionDAG::getConstantFP(double Val, MVT::ValueType VT) {
433 assert(MVT::isFloatingPoint(VT) && "Cannot create integer FP constant!");
435 Val = (float)Val; // Mask out extra precision.
437 // Do the map lookup using the actual bit pattern for the floating point
438 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
439 // we don't have issues with SNANs.
440 SDNode *&N = ConstantFPs[std::make_pair(DoubleToBits(Val), VT)];
441 if (N) return SDOperand(N, 0);
442 N = new ConstantFPSDNode(Val, VT);
443 AllNodes.push_back(N);
444 return SDOperand(N, 0);
449 SDOperand SelectionDAG::getGlobalAddress(const GlobalValue *GV,
451 SDNode *&N = GlobalValues[GV];
452 if (N) return SDOperand(N, 0);
453 N = new GlobalAddressSDNode(false, GV, VT);
454 AllNodes.push_back(N);
455 return SDOperand(N, 0);
458 SDOperand SelectionDAG::getTargetGlobalAddress(const GlobalValue *GV,
460 SDNode *&N = TargetGlobalValues[GV];
461 if (N) return SDOperand(N, 0);
462 N = new GlobalAddressSDNode(true, GV, VT);
463 AllNodes.push_back(N);
464 return SDOperand(N, 0);
467 SDOperand SelectionDAG::getFrameIndex(int FI, MVT::ValueType VT) {
468 SDNode *&N = FrameIndices[FI];
469 if (N) return SDOperand(N, 0);
470 N = new FrameIndexSDNode(FI, VT, false);
471 AllNodes.push_back(N);
472 return SDOperand(N, 0);
475 SDOperand SelectionDAG::getTargetFrameIndex(int FI, MVT::ValueType VT) {
476 SDNode *&N = TargetFrameIndices[FI];
477 if (N) return SDOperand(N, 0);
478 N = new FrameIndexSDNode(FI, VT, true);
479 AllNodes.push_back(N);
480 return SDOperand(N, 0);
483 SDOperand SelectionDAG::getConstantPool(Constant *C, MVT::ValueType VT) {
484 SDNode *&N = ConstantPoolIndices[C];
485 if (N) return SDOperand(N, 0);
486 N = new ConstantPoolSDNode(C, VT, false);
487 AllNodes.push_back(N);
488 return SDOperand(N, 0);
491 SDOperand SelectionDAG::getTargetConstantPool(Constant *C, MVT::ValueType VT) {
492 SDNode *&N = TargetConstantPoolIndices[C];
493 if (N) return SDOperand(N, 0);
494 N = new ConstantPoolSDNode(C, VT, true);
495 AllNodes.push_back(N);
496 return SDOperand(N, 0);
499 SDOperand SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
500 SDNode *&N = BBNodes[MBB];
501 if (N) return SDOperand(N, 0);
502 N = new BasicBlockSDNode(MBB);
503 AllNodes.push_back(N);
504 return SDOperand(N, 0);
507 SDOperand SelectionDAG::getValueType(MVT::ValueType VT) {
508 if ((unsigned)VT >= ValueTypeNodes.size())
509 ValueTypeNodes.resize(VT+1);
510 if (ValueTypeNodes[VT] == 0) {
511 ValueTypeNodes[VT] = new VTSDNode(VT);
512 AllNodes.push_back(ValueTypeNodes[VT]);
515 return SDOperand(ValueTypeNodes[VT], 0);
518 SDOperand SelectionDAG::getExternalSymbol(const char *Sym, MVT::ValueType VT) {
519 SDNode *&N = ExternalSymbols[Sym];
520 if (N) return SDOperand(N, 0);
521 N = new ExternalSymbolSDNode(Sym, VT);
522 AllNodes.push_back(N);
523 return SDOperand(N, 0);
526 SDOperand SelectionDAG::getCondCode(ISD::CondCode Cond) {
527 if ((unsigned)Cond >= CondCodeNodes.size())
528 CondCodeNodes.resize(Cond+1);
530 if (CondCodeNodes[Cond] == 0) {
531 CondCodeNodes[Cond] = new CondCodeSDNode(Cond);
532 AllNodes.push_back(CondCodeNodes[Cond]);
534 return SDOperand(CondCodeNodes[Cond], 0);
537 SDOperand SelectionDAG::getRegister(unsigned RegNo, MVT::ValueType VT) {
538 RegisterSDNode *&Reg = RegNodes[std::make_pair(RegNo, VT)];
540 Reg = new RegisterSDNode(RegNo, VT);
541 AllNodes.push_back(Reg);
543 return SDOperand(Reg, 0);
546 SDOperand SelectionDAG::SimplifySetCC(MVT::ValueType VT, SDOperand N1,
547 SDOperand N2, ISD::CondCode Cond) {
548 // These setcc operations always fold.
552 case ISD::SETFALSE2: return getConstant(0, VT);
554 case ISD::SETTRUE2: return getConstant(1, VT);
557 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val)) {
558 uint64_t C2 = N2C->getValue();
559 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val)) {
560 uint64_t C1 = N1C->getValue();
562 // Sign extend the operands if required
563 if (ISD::isSignedIntSetCC(Cond)) {
564 C1 = N1C->getSignExtended();
565 C2 = N2C->getSignExtended();
569 default: assert(0 && "Unknown integer setcc!");
570 case ISD::SETEQ: return getConstant(C1 == C2, VT);
571 case ISD::SETNE: return getConstant(C1 != C2, VT);
572 case ISD::SETULT: return getConstant(C1 < C2, VT);
573 case ISD::SETUGT: return getConstant(C1 > C2, VT);
574 case ISD::SETULE: return getConstant(C1 <= C2, VT);
575 case ISD::SETUGE: return getConstant(C1 >= C2, VT);
576 case ISD::SETLT: return getConstant((int64_t)C1 < (int64_t)C2, VT);
577 case ISD::SETGT: return getConstant((int64_t)C1 > (int64_t)C2, VT);
578 case ISD::SETLE: return getConstant((int64_t)C1 <= (int64_t)C2, VT);
579 case ISD::SETGE: return getConstant((int64_t)C1 >= (int64_t)C2, VT);
582 // If the LHS is a ZERO_EXTEND, perform the comparison on the input.
583 if (N1.getOpcode() == ISD::ZERO_EXTEND) {
584 unsigned InSize = MVT::getSizeInBits(N1.getOperand(0).getValueType());
586 // If the comparison constant has bits in the upper part, the
587 // zero-extended value could never match.
588 if (C2 & (~0ULL << InSize)) {
589 unsigned VSize = MVT::getSizeInBits(N1.getValueType());
593 case ISD::SETEQ: return getConstant(0, VT);
596 case ISD::SETNE: return getConstant(1, VT);
599 // True if the sign bit of C2 is set.
600 return getConstant((C2 & (1ULL << VSize)) != 0, VT);
603 // True if the sign bit of C2 isn't set.
604 return getConstant((C2 & (1ULL << VSize)) == 0, VT);
610 // Otherwise, we can perform the comparison with the low bits.
618 return getSetCC(VT, N1.getOperand(0),
619 getConstant(C2, N1.getOperand(0).getValueType()),
622 break; // todo, be more careful with signed comparisons
624 } else if (N1.getOpcode() == ISD::SIGN_EXTEND_INREG &&
625 (Cond == ISD::SETEQ || Cond == ISD::SETNE)) {
626 MVT::ValueType ExtSrcTy = cast<VTSDNode>(N1.getOperand(1))->getVT();
627 unsigned ExtSrcTyBits = MVT::getSizeInBits(ExtSrcTy);
628 MVT::ValueType ExtDstTy = N1.getValueType();
629 unsigned ExtDstTyBits = MVT::getSizeInBits(ExtDstTy);
631 // If the extended part has any inconsistent bits, it cannot ever
632 // compare equal. In other words, they have to be all ones or all
635 (~0ULL >> (64-ExtSrcTyBits)) & (~0ULL << (ExtDstTyBits-1));
636 if ((C2 & ExtBits) != 0 && (C2 & ExtBits) != ExtBits)
637 return getConstant(Cond == ISD::SETNE, VT);
639 // Otherwise, make this a use of a zext.
640 return getSetCC(VT, getZeroExtendInReg(N1.getOperand(0), ExtSrcTy),
641 getConstant(C2 & (~0ULL>>(64-ExtSrcTyBits)), ExtDstTy),
645 uint64_t MinVal, MaxVal;
646 unsigned OperandBitSize = MVT::getSizeInBits(N2C->getValueType(0));
647 if (ISD::isSignedIntSetCC(Cond)) {
648 MinVal = 1ULL << (OperandBitSize-1);
649 if (OperandBitSize != 1) // Avoid X >> 64, which is undefined.
650 MaxVal = ~0ULL >> (65-OperandBitSize);
655 MaxVal = ~0ULL >> (64-OperandBitSize);
658 // Canonicalize GE/LE comparisons to use GT/LT comparisons.
659 if (Cond == ISD::SETGE || Cond == ISD::SETUGE) {
660 if (C2 == MinVal) return getConstant(1, VT); // X >= MIN --> true
661 --C2; // X >= C1 --> X > (C1-1)
662 return getSetCC(VT, N1, getConstant(C2, N2.getValueType()),
663 (Cond == ISD::SETGE) ? ISD::SETGT : ISD::SETUGT);
666 if (Cond == ISD::SETLE || Cond == ISD::SETULE) {
667 if (C2 == MaxVal) return getConstant(1, VT); // X <= MAX --> true
668 ++C2; // X <= C1 --> X < (C1+1)
669 return getSetCC(VT, N1, getConstant(C2, N2.getValueType()),
670 (Cond == ISD::SETLE) ? ISD::SETLT : ISD::SETULT);
673 if ((Cond == ISD::SETLT || Cond == ISD::SETULT) && C2 == MinVal)
674 return getConstant(0, VT); // X < MIN --> false
676 // Canonicalize setgt X, Min --> setne X, Min
677 if ((Cond == ISD::SETGT || Cond == ISD::SETUGT) && C2 == MinVal)
678 return getSetCC(VT, N1, N2, ISD::SETNE);
680 // If we have setult X, 1, turn it into seteq X, 0
681 if ((Cond == ISD::SETLT || Cond == ISD::SETULT) && C2 == MinVal+1)
682 return getSetCC(VT, N1, getConstant(MinVal, N1.getValueType()),
684 // If we have setugt X, Max-1, turn it into seteq X, Max
685 else if ((Cond == ISD::SETGT || Cond == ISD::SETUGT) && C2 == MaxVal-1)
686 return getSetCC(VT, N1, getConstant(MaxVal, N1.getValueType()),
689 // If we have "setcc X, C1", check to see if we can shrink the immediate
692 // SETUGT X, SINTMAX -> SETLT X, 0
693 if (Cond == ISD::SETUGT && OperandBitSize != 1 &&
694 C2 == (~0ULL >> (65-OperandBitSize)))
695 return getSetCC(VT, N1, getConstant(0, N2.getValueType()), ISD::SETLT);
697 // FIXME: Implement the rest of these.
700 // Fold bit comparisons when we can.
701 if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) &&
702 VT == N1.getValueType() && N1.getOpcode() == ISD::AND)
703 if (ConstantSDNode *AndRHS =
704 dyn_cast<ConstantSDNode>(N1.getOperand(1))) {
705 if (Cond == ISD::SETNE && C2 == 0) {// (X & 8) != 0 --> (X & 8) >> 3
706 // Perform the xform if the AND RHS is a single bit.
707 if ((AndRHS->getValue() & (AndRHS->getValue()-1)) == 0) {
708 return getNode(ISD::SRL, VT, N1,
709 getConstant(Log2_64(AndRHS->getValue()),
710 TLI.getShiftAmountTy()));
712 } else if (Cond == ISD::SETEQ && C2 == AndRHS->getValue()) {
713 // (X & 8) == 8 --> (X & 8) >> 3
714 // Perform the xform if C2 is a single bit.
715 if ((C2 & (C2-1)) == 0) {
716 return getNode(ISD::SRL, VT, N1,
717 getConstant(Log2_64(C2),TLI.getShiftAmountTy()));
722 } else if (isa<ConstantSDNode>(N1.Val)) {
723 // Ensure that the constant occurs on the RHS.
724 return getSetCC(VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
727 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.Val))
728 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.Val)) {
729 double C1 = N1C->getValue(), C2 = N2C->getValue();
732 default: break; // FIXME: Implement the rest of these!
733 case ISD::SETEQ: return getConstant(C1 == C2, VT);
734 case ISD::SETNE: return getConstant(C1 != C2, VT);
735 case ISD::SETLT: return getConstant(C1 < C2, VT);
736 case ISD::SETGT: return getConstant(C1 > C2, VT);
737 case ISD::SETLE: return getConstant(C1 <= C2, VT);
738 case ISD::SETGE: return getConstant(C1 >= C2, VT);
741 // Ensure that the constant occurs on the RHS.
742 return getSetCC(VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
746 // We can always fold X == Y for integer setcc's.
747 if (MVT::isInteger(N1.getValueType()))
748 return getConstant(ISD::isTrueWhenEqual(Cond), VT);
749 unsigned UOF = ISD::getUnorderedFlavor(Cond);
750 if (UOF == 2) // FP operators that are undefined on NaNs.
751 return getConstant(ISD::isTrueWhenEqual(Cond), VT);
752 if (UOF == unsigned(ISD::isTrueWhenEqual(Cond)))
753 return getConstant(UOF, VT);
754 // Otherwise, we can't fold it. However, we can simplify it to SETUO/SETO
755 // if it is not already.
756 ISD::CondCode NewCond = UOF == 0 ? ISD::SETUO : ISD::SETO;
758 return getSetCC(VT, N1, N2, NewCond);
761 if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) &&
762 MVT::isInteger(N1.getValueType())) {
763 if (N1.getOpcode() == ISD::ADD || N1.getOpcode() == ISD::SUB ||
764 N1.getOpcode() == ISD::XOR) {
765 // Simplify (X+Y) == (X+Z) --> Y == Z
766 if (N1.getOpcode() == N2.getOpcode()) {
767 if (N1.getOperand(0) == N2.getOperand(0))
768 return getSetCC(VT, N1.getOperand(1), N2.getOperand(1), Cond);
769 if (N1.getOperand(1) == N2.getOperand(1))
770 return getSetCC(VT, N1.getOperand(0), N2.getOperand(0), Cond);
771 if (isCommutativeBinOp(N1.getOpcode())) {
772 // If X op Y == Y op X, try other combinations.
773 if (N1.getOperand(0) == N2.getOperand(1))
774 return getSetCC(VT, N1.getOperand(1), N2.getOperand(0), Cond);
775 if (N1.getOperand(1) == N2.getOperand(0))
776 return getSetCC(VT, N1.getOperand(1), N2.getOperand(1), Cond);
780 // FIXME: move this stuff to the DAG Combiner when it exists!
782 // Simplify (X+Z) == X --> Z == 0
783 if (N1.getOperand(0) == N2)
784 return getSetCC(VT, N1.getOperand(1),
785 getConstant(0, N1.getValueType()), Cond);
786 if (N1.getOperand(1) == N2) {
787 if (isCommutativeBinOp(N1.getOpcode()))
788 return getSetCC(VT, N1.getOperand(0),
789 getConstant(0, N1.getValueType()), Cond);
791 assert(N1.getOpcode() == ISD::SUB && "Unexpected operation!");
792 // (Z-X) == X --> Z == X<<1
793 return getSetCC(VT, N1.getOperand(0),
794 getNode(ISD::SHL, N2.getValueType(),
795 N2, getConstant(1, TLI.getShiftAmountTy())),
801 if (N2.getOpcode() == ISD::ADD || N2.getOpcode() == ISD::SUB ||
802 N2.getOpcode() == ISD::XOR) {
803 // Simplify X == (X+Z) --> Z == 0
804 if (N2.getOperand(0) == N1) {
805 return getSetCC(VT, N2.getOperand(1),
806 getConstant(0, N2.getValueType()), Cond);
807 } else if (N2.getOperand(1) == N1) {
808 if (isCommutativeBinOp(N2.getOpcode())) {
809 return getSetCC(VT, N2.getOperand(0),
810 getConstant(0, N2.getValueType()), Cond);
812 assert(N2.getOpcode() == ISD::SUB && "Unexpected operation!");
813 // X == (Z-X) --> X<<1 == Z
814 return getSetCC(VT, getNode(ISD::SHL, N2.getValueType(), N1,
815 getConstant(1, TLI.getShiftAmountTy())),
816 N2.getOperand(0), Cond);
822 // Fold away ALL boolean setcc's.
823 if (N1.getValueType() == MVT::i1) {
825 default: assert(0 && "Unknown integer setcc!");
826 case ISD::SETEQ: // X == Y -> (X^Y)^1
827 N1 = getNode(ISD::XOR, MVT::i1,
828 getNode(ISD::XOR, MVT::i1, N1, N2),
829 getConstant(1, MVT::i1));
831 case ISD::SETNE: // X != Y --> (X^Y)
832 N1 = getNode(ISD::XOR, MVT::i1, N1, N2);
834 case ISD::SETGT: // X >s Y --> X == 0 & Y == 1 --> X^1 & Y
835 case ISD::SETULT: // X <u Y --> X == 0 & Y == 1 --> X^1 & Y
836 N1 = getNode(ISD::AND, MVT::i1, N2,
837 getNode(ISD::XOR, MVT::i1, N1, getConstant(1, MVT::i1)));
839 case ISD::SETLT: // X <s Y --> X == 1 & Y == 0 --> Y^1 & X
840 case ISD::SETUGT: // X >u Y --> X == 1 & Y == 0 --> Y^1 & X
841 N1 = getNode(ISD::AND, MVT::i1, N1,
842 getNode(ISD::XOR, MVT::i1, N2, getConstant(1, MVT::i1)));
844 case ISD::SETULE: // X <=u Y --> X == 0 | Y == 1 --> X^1 | Y
845 case ISD::SETGE: // X >=s Y --> X == 0 | Y == 1 --> X^1 | Y
846 N1 = getNode(ISD::OR, MVT::i1, N2,
847 getNode(ISD::XOR, MVT::i1, N1, getConstant(1, MVT::i1)));
849 case ISD::SETUGE: // X >=u Y --> X == 1 | Y == 0 --> Y^1 | X
850 case ISD::SETLE: // X <=s Y --> X == 1 | Y == 0 --> Y^1 | X
851 N1 = getNode(ISD::OR, MVT::i1, N1,
852 getNode(ISD::XOR, MVT::i1, N2, getConstant(1, MVT::i1)));
856 N1 = getNode(ISD::ZERO_EXTEND, VT, N1);
860 // Could not fold it.
864 SDOperand SelectionDAG::SimplifySelectCC(SDOperand N1, SDOperand N2,
865 SDOperand N3, SDOperand N4,
867 MVT::ValueType VT = N3.getValueType();
868 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val);
869 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val);
870 ConstantSDNode *N3C = dyn_cast<ConstantSDNode>(N3.Val);
871 ConstantSDNode *N4C = dyn_cast<ConstantSDNode>(N4.Val);
873 // Check to see if we can simplify the select into an fabs node
874 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) {
875 // Allow either -0.0 or 0.0
876 if (CFP->getValue() == 0.0) {
877 // select (setg[te] X, +/-0.0), X, fneg(X) -> fabs
878 if ((CC == ISD::SETGE || CC == ISD::SETGT) &&
879 N1 == N3 && N4.getOpcode() == ISD::FNEG &&
880 N1 == N4.getOperand(0))
881 return getNode(ISD::FABS, VT, N1);
883 // select (setl[te] X, +/-0.0), fneg(X), X -> fabs
884 if ((CC == ISD::SETLT || CC == ISD::SETLE) &&
885 N1 == N4 && N3.getOpcode() == ISD::FNEG &&
886 N3.getOperand(0) == N4)
887 return getNode(ISD::FABS, VT, N4);
891 // check to see if we're select_cc'ing a select_cc.
892 // this allows us to turn:
893 // select_cc set[eq,ne] (select_cc cc, lhs, rhs, 1, 0), 0, true, false ->
894 // select_cc cc, lhs, rhs, true, false
895 if ((N1C && N1C->isNullValue() && N2.getOpcode() == ISD::SELECT_CC) ||
896 (N2C && N2C->isNullValue() && N1.getOpcode() == ISD::SELECT_CC) &&
897 (CC == ISD::SETEQ || CC == ISD::SETNE)) {
898 SDOperand SCC = N1C ? N2 : N1;
899 ConstantSDNode *SCCT = dyn_cast<ConstantSDNode>(SCC.getOperand(2));
900 ConstantSDNode *SCCF = dyn_cast<ConstantSDNode>(SCC.getOperand(3));
901 if (SCCT && SCCF && SCCF->isNullValue() && SCCT->getValue() == 1ULL) {
902 if (CC == ISD::SETEQ) std::swap(N3, N4);
903 return getNode(ISD::SELECT_CC, N3.getValueType(), SCC.getOperand(0),
904 SCC.getOperand(1), N3, N4, SCC.getOperand(4));
908 // Check to see if we can perform the "gzip trick", transforming
909 // select_cc setlt X, 0, A, 0 -> and (sra X, size(X)-1), A
910 if (N2C && N2C->isNullValue() && N4C && N4C->isNullValue() &&
911 MVT::isInteger(N1.getValueType()) &&
912 MVT::isInteger(N3.getValueType()) && CC == ISD::SETLT) {
913 MVT::ValueType XType = N1.getValueType();
914 MVT::ValueType AType = N3.getValueType();
915 if (XType >= AType) {
916 // and (sra X, size(X)-1, A) -> "and (srl X, C2), A" iff A is a
917 // single-bit constant. FIXME: remove once the dag combiner
919 if (N3C && ((N3C->getValue() & (N3C->getValue()-1)) == 0)) {
920 unsigned ShCtV = Log2_64(N3C->getValue());
921 ShCtV = MVT::getSizeInBits(XType)-ShCtV-1;
922 SDOperand ShCt = getConstant(ShCtV, TLI.getShiftAmountTy());
923 SDOperand Shift = getNode(ISD::SRL, XType, N1, ShCt);
925 Shift = getNode(ISD::TRUNCATE, AType, Shift);
926 return getNode(ISD::AND, AType, Shift, N3);
928 SDOperand Shift = getNode(ISD::SRA, XType, N1,
929 getConstant(MVT::getSizeInBits(XType)-1,
930 TLI.getShiftAmountTy()));
932 Shift = getNode(ISD::TRUNCATE, AType, Shift);
933 return getNode(ISD::AND, AType, Shift, N3);
937 // Check to see if this is the equivalent of setcc
938 if (N4C && N4C->isNullValue() && N3C && (N3C->getValue() == 1ULL)) {
939 MVT::ValueType XType = N1.getValueType();
940 if (TLI.isOperationLegal(ISD::SETCC, TLI.getSetCCResultTy()))
941 return getSetCC(TLI.getSetCCResultTy(), N1, N2, CC);
943 // seteq X, 0 -> srl (ctlz X, log2(size(X)))
944 if (N2C && N2C->isNullValue() && CC == ISD::SETEQ &&
945 TLI.isOperationLegal(ISD::CTLZ, XType)) {
946 SDOperand Ctlz = getNode(ISD::CTLZ, XType, N1);
947 return getNode(ISD::SRL, XType, Ctlz,
948 getConstant(Log2_32(MVT::getSizeInBits(XType)),
949 TLI.getShiftAmountTy()));
951 // setgt X, 0 -> srl (and (-X, ~X), size(X)-1)
952 if (N2C && N2C->isNullValue() && CC == ISD::SETGT) {
953 SDOperand NegN1 = getNode(ISD::SUB, XType, getConstant(0, XType), N1);
954 SDOperand NotN1 = getNode(ISD::XOR, XType, N1, getConstant(~0ULL, XType));
955 return getNode(ISD::SRL, XType, getNode(ISD::AND, XType, NegN1, NotN1),
956 getConstant(MVT::getSizeInBits(XType)-1,
957 TLI.getShiftAmountTy()));
959 // setgt X, -1 -> xor (srl (X, size(X)-1), 1)
960 if (N2C && N2C->isAllOnesValue() && CC == ISD::SETGT) {
961 SDOperand Sign = getNode(ISD::SRL, XType, N1,
962 getConstant(MVT::getSizeInBits(XType)-1,
963 TLI.getShiftAmountTy()));
964 return getNode(ISD::XOR, XType, Sign, getConstant(1, XType));
968 // Check to see if this is an integer abs. select_cc setl[te] X, 0, -X, X ->
969 // Y = sra (X, size(X)-1); xor (add (X, Y), Y)
970 if (N2C && N2C->isNullValue() && (CC == ISD::SETLT || CC == ISD::SETLE) &&
971 N1 == N4 && N3.getOpcode() == ISD::SUB && N1 == N3.getOperand(1)) {
972 if (ConstantSDNode *SubC = dyn_cast<ConstantSDNode>(N3.getOperand(0))) {
973 MVT::ValueType XType = N1.getValueType();
974 if (SubC->isNullValue() && MVT::isInteger(XType)) {
975 SDOperand Shift = getNode(ISD::SRA, XType, N1,
976 getConstant(MVT::getSizeInBits(XType)-1,
977 TLI.getShiftAmountTy()));
978 return getNode(ISD::XOR, XType, getNode(ISD::ADD, XType, N1, Shift),
984 // Could not fold it.
988 /// getNode - Gets or creates the specified node.
990 SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT) {
991 SDNode *N = new SDNode(Opcode, VT);
992 AllNodes.push_back(N);
993 return SDOperand(N, 0);
996 SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
998 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.Val)) {
999 uint64_t Val = C->getValue();
1002 case ISD::SIGN_EXTEND: return getConstant(C->getSignExtended(), VT);
1003 case ISD::ZERO_EXTEND: return getConstant(Val, VT);
1004 case ISD::TRUNCATE: return getConstant(Val, VT);
1005 case ISD::SINT_TO_FP: return getConstantFP(C->getSignExtended(), VT);
1006 case ISD::UINT_TO_FP: return getConstantFP(C->getValue(), VT);
1010 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.Val))
1013 return getConstantFP(-C->getValue(), VT);
1015 case ISD::FP_EXTEND:
1016 return getConstantFP(C->getValue(), VT);
1017 case ISD::FP_TO_SINT:
1018 return getConstant((int64_t)C->getValue(), VT);
1019 case ISD::FP_TO_UINT:
1020 return getConstant((uint64_t)C->getValue(), VT);
1023 unsigned OpOpcode = Operand.Val->getOpcode();
1025 case ISD::TokenFactor:
1026 return Operand; // Factor of one node? No factor.
1027 case ISD::SIGN_EXTEND:
1028 if (Operand.getValueType() == VT) return Operand; // noop extension
1029 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
1030 return getNode(OpOpcode, VT, Operand.Val->getOperand(0));
1032 case ISD::ZERO_EXTEND:
1033 if (Operand.getValueType() == VT) return Operand; // noop extension
1034 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
1035 return getNode(ISD::ZERO_EXTEND, VT, Operand.Val->getOperand(0));
1038 if (Operand.getValueType() == VT) return Operand; // noop truncate
1039 if (OpOpcode == ISD::TRUNCATE)
1040 return getNode(ISD::TRUNCATE, VT, Operand.Val->getOperand(0));
1041 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND) {
1042 // If the source is smaller than the dest, we still need an extend.
1043 if (Operand.Val->getOperand(0).getValueType() < VT)
1044 return getNode(OpOpcode, VT, Operand.Val->getOperand(0));
1045 else if (Operand.Val->getOperand(0).getValueType() > VT)
1046 return getNode(ISD::TRUNCATE, VT, Operand.Val->getOperand(0));
1048 return Operand.Val->getOperand(0);
1052 if (OpOpcode == ISD::SUB) // -(X-Y) -> (Y-X)
1053 return getNode(ISD::SUB, VT, Operand.Val->getOperand(1),
1054 Operand.Val->getOperand(0));
1055 if (OpOpcode == ISD::FNEG) // --X -> X
1056 return Operand.Val->getOperand(0);
1059 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
1060 return getNode(ISD::FABS, VT, Operand.Val->getOperand(0));
1065 if (VT != MVT::Flag) { // Don't CSE flag producing nodes
1066 SDNode *&E = UnaryOps[std::make_pair(Opcode, std::make_pair(Operand, VT))];
1067 if (E) return SDOperand(E, 0);
1068 E = N = new SDNode(Opcode, Operand);
1070 N = new SDNode(Opcode, Operand);
1072 N->setValueTypes(VT);
1073 AllNodes.push_back(N);
1074 return SDOperand(N, 0);
1077 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1078 /// this predicate to simplify operations downstream. V and Mask are known to
1079 /// be the same type.
1080 static bool MaskedValueIsZero(const SDOperand &Op, uint64_t Mask,
1081 const TargetLowering &TLI) {
1083 if (Mask == 0) return true;
1085 // If we know the result of a setcc has the top bits zero, use this info.
1086 switch (Op.getOpcode()) {
1088 return (cast<ConstantSDNode>(Op)->getValue() & Mask) == 0;
1091 return ((Mask & 1) == 0) &&
1092 TLI.getSetCCResultContents() == TargetLowering::ZeroOrOneSetCCResult;
1095 SrcBits = MVT::getSizeInBits(cast<VTSDNode>(Op.getOperand(3))->getVT());
1096 return (Mask & ((1ULL << SrcBits)-1)) == 0; // Returning only the zext bits.
1097 case ISD::ZERO_EXTEND:
1098 SrcBits = MVT::getSizeInBits(Op.getOperand(0).getValueType());
1099 return MaskedValueIsZero(Op.getOperand(0),Mask & ((1ULL << SrcBits)-1),TLI);
1100 case ISD::AssertZext:
1101 SrcBits = MVT::getSizeInBits(cast<VTSDNode>(Op.getOperand(1))->getVT());
1102 return (Mask & ((1ULL << SrcBits)-1)) == 0; // Returning only the zext bits.
1104 // (X & C1) & C2 == 0 iff C1 & C2 == 0.
1105 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
1106 return MaskedValueIsZero(Op.getOperand(0),AndRHS->getValue() & Mask, TLI);
1111 return MaskedValueIsZero(Op.getOperand(0), Mask, TLI) &&
1112 MaskedValueIsZero(Op.getOperand(1), Mask, TLI);
1114 return MaskedValueIsZero(Op.getOperand(1), Mask, TLI) &&
1115 MaskedValueIsZero(Op.getOperand(2), Mask, TLI);
1116 case ISD::SELECT_CC:
1117 return MaskedValueIsZero(Op.getOperand(2), Mask, TLI) &&
1118 MaskedValueIsZero(Op.getOperand(3), Mask, TLI);
1120 // (ushr X, C1) & C2 == 0 iff X & (C2 << C1) == 0
1121 if (ConstantSDNode *ShAmt = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1122 uint64_t NewVal = Mask << ShAmt->getValue();
1123 SrcBits = MVT::getSizeInBits(Op.getValueType());
1124 if (SrcBits != 64) NewVal &= (1ULL << SrcBits)-1;
1125 return MaskedValueIsZero(Op.getOperand(0), NewVal, TLI);
1129 // (ushl X, C1) & C2 == 0 iff X & (C2 >> C1) == 0
1130 if (ConstantSDNode *ShAmt = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1131 uint64_t NewVal = Mask >> ShAmt->getValue();
1132 return MaskedValueIsZero(Op.getOperand(0), NewVal, TLI);
1138 // Bit counting instructions can not set the high bits of the result
1139 // register. The max number of bits sets depends on the input.
1140 return (Mask & (MVT::getSizeInBits(Op.getValueType())*2-1)) == 0;
1142 // TODO we could handle some SRA cases here.
1151 SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
1152 SDOperand N1, SDOperand N2) {
1155 case ISD::TokenFactor:
1156 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
1157 N2.getValueType() == MVT::Other && "Invalid token factor!");
1166 assert(MVT::isInteger(VT) && "This operator does not apply to FP types!");
1173 assert(N1.getValueType() == N2.getValueType() &&
1174 N1.getValueType() == VT && "Binary operator types must match!");
1180 assert(VT == N1.getValueType() &&
1181 "Shift operators return type must be the same as their first arg");
1182 assert(MVT::isInteger(VT) && MVT::isInteger(N2.getValueType()) &&
1183 VT != MVT::i1 && "Shifts only work on integers");
1185 case ISD::FP_ROUND_INREG: {
1186 MVT::ValueType EVT = cast<VTSDNode>(N2)->getVT();
1187 assert(VT == N1.getValueType() && "Not an inreg round!");
1188 assert(MVT::isFloatingPoint(VT) && MVT::isFloatingPoint(EVT) &&
1189 "Cannot FP_ROUND_INREG integer types");
1190 assert(EVT <= VT && "Not rounding down!");
1193 case ISD::AssertSext:
1194 case ISD::AssertZext:
1195 case ISD::SIGN_EXTEND_INREG: {
1196 MVT::ValueType EVT = cast<VTSDNode>(N2)->getVT();
1197 assert(VT == N1.getValueType() && "Not an inreg extend!");
1198 assert(MVT::isInteger(VT) && MVT::isInteger(EVT) &&
1199 "Cannot *_EXTEND_INREG FP types");
1200 assert(EVT <= VT && "Not extending!");
1207 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val);
1208 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val);
1211 uint64_t C1 = N1C->getValue(), C2 = N2C->getValue();
1213 case ISD::ADD: return getConstant(C1 + C2, VT);
1214 case ISD::SUB: return getConstant(C1 - C2, VT);
1215 case ISD::MUL: return getConstant(C1 * C2, VT);
1217 if (C2) return getConstant(C1 / C2, VT);
1220 if (C2) return getConstant(C1 % C2, VT);
1223 if (C2) return getConstant(N1C->getSignExtended() /
1224 N2C->getSignExtended(), VT);
1227 if (C2) return getConstant(N1C->getSignExtended() %
1228 N2C->getSignExtended(), VT);
1230 case ISD::AND : return getConstant(C1 & C2, VT);
1231 case ISD::OR : return getConstant(C1 | C2, VT);
1232 case ISD::XOR : return getConstant(C1 ^ C2, VT);
1233 case ISD::SHL : return getConstant(C1 << C2, VT);
1234 case ISD::SRL : return getConstant(C1 >> C2, VT);
1235 case ISD::SRA : return getConstant(N1C->getSignExtended() >>(int)C2, VT);
1239 } else { // Cannonicalize constant to RHS if commutative
1240 if (isCommutativeBinOp(Opcode)) {
1241 std::swap(N1C, N2C);
1248 case ISD::SHL: // shl 0, X -> 0
1249 if (N1C->isNullValue()) return N1;
1251 case ISD::SRL: // srl 0, X -> 0
1252 if (N1C->isNullValue()) return N1;
1254 case ISD::SRA: // sra -1, X -> -1
1255 if (N1C->isAllOnesValue()) return N1;
1257 case ISD::SIGN_EXTEND_INREG: // SIGN_EXTEND_INREG N1C, EVT
1258 // Extending a constant? Just return the extended constant.
1259 SDOperand Tmp = getNode(ISD::TRUNCATE, cast<VTSDNode>(N2)->getVT(), N1);
1260 return getNode(ISD::SIGN_EXTEND, VT, Tmp);
1265 uint64_t C2 = N2C->getValue();
1269 if (!C2) return N1; // add X, 0 -> X
1272 if (!C2) return N1; // sub X, 0 -> X
1273 return getNode(ISD::ADD, VT, N1, getConstant(-C2, VT));
1275 if (!C2) return N2; // mul X, 0 -> 0
1276 if (N2C->isAllOnesValue()) // mul X, -1 -> 0-X
1277 return getNode(ISD::SUB, VT, getConstant(0, VT), N1);
1279 // FIXME: Move this to the DAG combiner when it exists.
1280 if ((C2 & C2-1) == 0) {
1281 SDOperand ShAmt = getConstant(Log2_64(C2), TLI.getShiftAmountTy());
1282 return getNode(ISD::SHL, VT, N1, ShAmt);
1288 if (!C2) return N2; // mul X, 0 -> 0
1290 if (C2 == 1) // 0X*01 -> 0X hi(0X) == 0
1291 return getConstant(0, VT);
1293 // Many others could be handled here, including -1, powers of 2, etc.
1297 // FIXME: Move this to the DAG combiner when it exists.
1298 if ((C2 & C2-1) == 0 && C2) {
1299 SDOperand ShAmt = getConstant(Log2_64(C2), TLI.getShiftAmountTy());
1300 return getNode(ISD::SRL, VT, N1, ShAmt);
1307 // If the shift amount is bigger than the size of the data, then all the
1308 // bits are shifted out. Simplify to undef.
1309 if (C2 >= MVT::getSizeInBits(N1.getValueType())) {
1310 return getNode(ISD::UNDEF, N1.getValueType());
1312 if (C2 == 0) return N1;
1314 if (Opcode == ISD::SRA) {
1315 // If the sign bit is known to be zero, switch this to a SRL.
1316 if (MaskedValueIsZero(N1,
1317 1ULL << (MVT::getSizeInBits(N1.getValueType())-1),
1319 return getNode(ISD::SRL, N1.getValueType(), N1, N2);
1321 // If the part left over is known to be zero, the whole thing is zero.
1322 uint64_t TypeMask = ~0ULL >> (64-MVT::getSizeInBits(N1.getValueType()));
1323 if (Opcode == ISD::SRL) {
1324 if (MaskedValueIsZero(N1, TypeMask << C2, TLI))
1325 return getConstant(0, N1.getValueType());
1326 } else if (Opcode == ISD::SHL) {
1327 if (MaskedValueIsZero(N1, TypeMask >> C2, TLI))
1328 return getConstant(0, N1.getValueType());
1332 if (Opcode == ISD::SHL && N1.getNumOperands() == 2)
1333 if (ConstantSDNode *OpSA = dyn_cast<ConstantSDNode>(N1.getOperand(1))) {
1334 unsigned OpSAC = OpSA->getValue();
1335 if (N1.getOpcode() == ISD::SHL) {
1336 if (C2+OpSAC >= MVT::getSizeInBits(N1.getValueType()))
1337 return getConstant(0, N1.getValueType());
1338 return getNode(ISD::SHL, N1.getValueType(), N1.getOperand(0),
1339 getConstant(C2+OpSAC, N2.getValueType()));
1340 } else if (N1.getOpcode() == ISD::SRL) {
1341 // (X >> C1) << C2: if C2 > C1, ((X & ~0<<C1) << C2-C1)
1342 SDOperand Mask = getNode(ISD::AND, VT, N1.getOperand(0),
1343 getConstant(~0ULL << OpSAC, VT));
1345 return getNode(ISD::SHL, VT, Mask,
1346 getConstant(C2-OpSAC, N2.getValueType()));
1348 // (X >> C1) << C2: if C2 <= C1, ((X & ~0<<C1) >> C1-C2)
1349 return getNode(ISD::SRL, VT, Mask,
1350 getConstant(OpSAC-C2, N2.getValueType()));
1352 } else if (N1.getOpcode() == ISD::SRA) {
1353 // if C1 == C2, just mask out low bits.
1355 return getNode(ISD::AND, VT, N1.getOperand(0),
1356 getConstant(~0ULL << C2, VT));
1362 if (!C2) return N2; // X and 0 -> 0
1363 if (N2C->isAllOnesValue())
1364 return N1; // X and -1 -> X
1366 if (MaskedValueIsZero(N1, C2, TLI)) // X and 0 -> 0
1367 return getConstant(0, VT);
1370 uint64_t NotC2 = ~C2;
1372 NotC2 &= (1ULL << MVT::getSizeInBits(VT))-1;
1374 if (MaskedValueIsZero(N1, NotC2, TLI))
1375 return N1; // if (X & ~C2) -> 0, the and is redundant
1378 // FIXME: Should add a corresponding version of this for
1379 // ZERO_EXTEND/SIGN_EXTEND by converting them to an ANY_EXTEND node which
1380 // we don't have yet.
1382 // and (sign_extend_inreg x:16:32), 1 -> and x, 1
1383 if (N1.getOpcode() == ISD::SIGN_EXTEND_INREG) {
1384 // If we are masking out the part of our input that was extended, just
1385 // mask the input to the extension directly.
1386 unsigned ExtendBits =
1387 MVT::getSizeInBits(cast<VTSDNode>(N1.getOperand(1))->getVT());
1388 if ((C2 & (~0ULL << ExtendBits)) == 0)
1389 return getNode(ISD::AND, VT, N1.getOperand(0), N2);
1390 } else if (N1.getOpcode() == ISD::OR) {
1391 if (ConstantSDNode *ORI = dyn_cast<ConstantSDNode>(N1.getOperand(1)))
1392 if ((ORI->getValue() & C2) == C2) {
1393 // If the 'or' is setting all of the bits that we are masking for,
1394 // we know the result of the AND will be the AND mask itself.
1397 } else if (N1.getOpcode() == ISD::AssertZext) {
1398 // If we are masking out the part of our input that was already masked
1399 // out, just return the input directly.
1400 unsigned ExtendBits =
1401 MVT::getSizeInBits(cast<VTSDNode>(N1.getOperand(1))->getVT());
1402 uint64_t ExtendMask = (1ULL << ExtendBits) - 1;
1403 if (ExtendMask == C2)
1404 return N1.getOperand(0);
1408 if (!C2)return N1; // X or 0 -> X
1409 if (N2C->isAllOnesValue())
1410 return N2; // X or -1 -> -1
1413 if (!C2) return N1; // X xor 0 -> X
1414 if (N2C->isAllOnesValue()) {
1415 if (N1.Val->getOpcode() == ISD::SETCC){
1416 SDNode *SetCC = N1.Val;
1417 // !(X op Y) -> (X !op Y)
1418 bool isInteger = MVT::isInteger(SetCC->getOperand(0).getValueType());
1419 ISD::CondCode CC = cast<CondCodeSDNode>(SetCC->getOperand(2))->get();
1420 return getSetCC(SetCC->getValueType(0),
1421 SetCC->getOperand(0), SetCC->getOperand(1),
1422 ISD::getSetCCInverse(CC, isInteger));
1423 } else if (N1.getOpcode() == ISD::AND || N1.getOpcode() == ISD::OR) {
1424 SDNode *Op = N1.Val;
1425 // !(X or Y) -> (!X and !Y) iff X or Y are freely invertible
1426 // !(X and Y) -> (!X or !Y) iff X or Y are freely invertible
1427 SDOperand LHS = Op->getOperand(0), RHS = Op->getOperand(1);
1428 if (isInvertibleForFree(RHS) || isInvertibleForFree(LHS)) {
1429 LHS = getNode(ISD::XOR, VT, LHS, N2); // RHS = ~LHS
1430 RHS = getNode(ISD::XOR, VT, RHS, N2); // RHS = ~RHS
1431 if (Op->getOpcode() == ISD::AND)
1432 return getNode(ISD::OR, VT, LHS, RHS);
1433 return getNode(ISD::AND, VT, LHS, RHS);
1436 // X xor -1 -> not(x) ?
1441 // Reassociate ((X op C1) op C2) if possible.
1442 if (N1.getOpcode() == Opcode && isAssociativeBinOp(Opcode))
1443 if (ConstantSDNode *N3C = dyn_cast<ConstantSDNode>(N1.Val->getOperand(1)))
1444 return getNode(Opcode, VT, N1.Val->getOperand(0),
1445 getNode(Opcode, VT, N2, N1.Val->getOperand(1)));
1448 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.Val);
1449 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.Val);
1452 double C1 = N1CFP->getValue(), C2 = N2CFP->getValue();
1454 case ISD::ADD: return getConstantFP(C1 + C2, VT);
1455 case ISD::SUB: return getConstantFP(C1 - C2, VT);
1456 case ISD::MUL: return getConstantFP(C1 * C2, VT);
1458 if (C2) return getConstantFP(C1 / C2, VT);
1461 if (C2) return getConstantFP(fmod(C1, C2), VT);
1466 } else { // Cannonicalize constant to RHS if commutative
1467 if (isCommutativeBinOp(Opcode)) {
1468 std::swap(N1CFP, N2CFP);
1473 if (Opcode == ISD::FP_ROUND_INREG)
1474 return getNode(ISD::FP_EXTEND, VT,
1475 getNode(ISD::FP_ROUND, cast<VTSDNode>(N2)->getVT(), N1));
1478 // Finally, fold operations that do not require constants.
1480 case ISD::TokenFactor:
1481 if (N1.getOpcode() == ISD::EntryToken)
1483 if (N2.getOpcode() == ISD::EntryToken)
1489 if (N1.Val->getOpcode() == ISD::SETCC && N2.Val->getOpcode() == ISD::SETCC){
1490 SDNode *LHS = N1.Val, *RHS = N2.Val;
1491 SDOperand LL = LHS->getOperand(0), RL = RHS->getOperand(0);
1492 SDOperand LR = LHS->getOperand(1), RR = RHS->getOperand(1);
1493 ISD::CondCode Op1 = cast<CondCodeSDNode>(LHS->getOperand(2))->get();
1494 ISD::CondCode Op2 = cast<CondCodeSDNode>(RHS->getOperand(2))->get();
1496 if (LR == RR && isa<ConstantSDNode>(LR) &&
1497 Op2 == Op1 && MVT::isInteger(LL.getValueType())) {
1498 // (X != 0) | (Y != 0) -> (X|Y != 0)
1499 // (X == 0) & (Y == 0) -> (X|Y == 0)
1500 // (X < 0) | (Y < 0) -> (X|Y < 0)
1501 if (cast<ConstantSDNode>(LR)->getValue() == 0 &&
1502 ((Op2 == ISD::SETEQ && Opcode == ISD::AND) ||
1503 (Op2 == ISD::SETNE && Opcode == ISD::OR) ||
1504 (Op2 == ISD::SETLT && Opcode == ISD::OR)))
1505 return getSetCC(VT, getNode(ISD::OR, LR.getValueType(), LL, RL), LR,
1508 if (cast<ConstantSDNode>(LR)->isAllOnesValue()) {
1509 // (X == -1) & (Y == -1) -> (X&Y == -1)
1510 // (X != -1) | (Y != -1) -> (X&Y != -1)
1511 // (X > -1) | (Y > -1) -> (X&Y > -1)
1512 if ((Opcode == ISD::AND && Op2 == ISD::SETEQ) ||
1513 (Opcode == ISD::OR && Op2 == ISD::SETNE) ||
1514 (Opcode == ISD::OR && Op2 == ISD::SETGT))
1515 return getSetCC(VT, getNode(ISD::AND, LR.getValueType(), LL, RL),
1517 // (X > -1) & (Y > -1) -> (X|Y > -1)
1518 if (Opcode == ISD::AND && Op2 == ISD::SETGT)
1519 return getSetCC(VT, getNode(ISD::OR, LR.getValueType(), LL, RL),
1524 // (X op1 Y) | (Y op2 X) -> (X op1 Y) | (X swapop2 Y)
1525 if (LL == RR && LR == RL) {
1526 Op2 = ISD::getSetCCSwappedOperands(Op2);
1527 goto MatchedBackwards;
1530 if (LL == RL && LR == RR) {
1532 ISD::CondCode Result;
1533 bool isInteger = MVT::isInteger(LL.getValueType());
1534 if (Opcode == ISD::OR)
1535 Result = ISD::getSetCCOrOperation(Op1, Op2, isInteger);
1537 Result = ISD::getSetCCAndOperation(Op1, Op2, isInteger);
1539 if (Result != ISD::SETCC_INVALID)
1540 return getSetCC(LHS->getValueType(0), LL, LR, Result);
1544 // and/or zext(a), zext(b) -> zext(and/or a, b)
1545 if (N1.getOpcode() == ISD::ZERO_EXTEND &&
1546 N2.getOpcode() == ISD::ZERO_EXTEND &&
1547 N1.getOperand(0).getValueType() == N2.getOperand(0).getValueType())
1548 return getNode(ISD::ZERO_EXTEND, VT,
1549 getNode(Opcode, N1.getOperand(0).getValueType(),
1550 N1.getOperand(0), N2.getOperand(0)));
1553 if (N1 == N2) return getConstant(0, VT); // xor X, Y -> 0
1556 if (N2.getOpcode() == ISD::FNEG) // (A+ (-B) -> A-B
1557 return getNode(ISD::SUB, VT, N1, N2.getOperand(0));
1558 if (N1.getOpcode() == ISD::FNEG) // ((-A)+B) -> B-A
1559 return getNode(ISD::SUB, VT, N2, N1.getOperand(0));
1560 if (N1.getOpcode() == ISD::SUB && isa<ConstantSDNode>(N1.getOperand(0)) &&
1561 cast<ConstantSDNode>(N1.getOperand(0))->getValue() == 0)
1562 return getNode(ISD::SUB, VT, N2, N1.getOperand(1)); // (0-A)+B -> B-A
1563 if (N2.getOpcode() == ISD::SUB && isa<ConstantSDNode>(N2.getOperand(0)) &&
1564 cast<ConstantSDNode>(N2.getOperand(0))->getValue() == 0)
1565 return getNode(ISD::SUB, VT, N1, N2.getOperand(1)); // A+(0-B) -> A-B
1566 if (N2.getOpcode() == ISD::SUB && N1 == N2.Val->getOperand(1) &&
1567 !MVT::isFloatingPoint(N2.getValueType()))
1568 return N2.Val->getOperand(0); // A+(B-A) -> B
1571 if (N1.getOpcode() == ISD::ADD) {
1572 if (N1.Val->getOperand(0) == N2 &&
1573 !MVT::isFloatingPoint(N2.getValueType()))
1574 return N1.Val->getOperand(1); // (A+B)-A == B
1575 if (N1.Val->getOperand(1) == N2 &&
1576 !MVT::isFloatingPoint(N2.getValueType()))
1577 return N1.Val->getOperand(0); // (A+B)-B == A
1579 if (N2.getOpcode() == ISD::FNEG) // (A- (-B) -> A+B
1580 return getNode(ISD::ADD, VT, N1, N2.getOperand(0));
1582 case ISD::FP_ROUND_INREG:
1583 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
1585 case ISD::SIGN_EXTEND_INREG: {
1586 MVT::ValueType EVT = cast<VTSDNode>(N2)->getVT();
1587 if (EVT == VT) return N1; // Not actually extending
1589 // If we are sign extending an extension, use the original source.
1590 if (N1.getOpcode() == ISD::SIGN_EXTEND_INREG ||
1591 N1.getOpcode() == ISD::AssertSext)
1592 if (cast<VTSDNode>(N1.getOperand(1))->getVT() <= EVT)
1595 // If we are sign extending a sextload, return just the load.
1596 if (N1.getOpcode() == ISD::SEXTLOAD)
1597 if (cast<VTSDNode>(N1.getOperand(3))->getVT() <= EVT)
1600 // If we are extending the result of a setcc, and we already know the
1601 // contents of the top bits, eliminate the extension.
1602 if (N1.getOpcode() == ISD::SETCC &&
1603 TLI.getSetCCResultContents() ==
1604 TargetLowering::ZeroOrNegativeOneSetCCResult)
1607 // If we are sign extending the result of an (and X, C) operation, and we
1608 // know the extended bits are zeros already, don't do the extend.
1609 if (N1.getOpcode() == ISD::AND)
1610 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getOperand(1))) {
1611 uint64_t Mask = N1C->getValue();
1612 unsigned NumBits = MVT::getSizeInBits(EVT);
1613 if ((Mask & (~0ULL << (NumBits-1))) == 0)
1619 // FIXME: figure out how to safely handle things like
1620 // int foo(int x) { return 1 << (x & 255); }
1621 // int bar() { return foo(256); }
1626 if (N2.getOpcode() == ISD::SIGN_EXTEND_INREG &&
1627 cast<VTSDNode>(N2.getOperand(1))->getVT() != MVT::i1)
1628 return getNode(Opcode, VT, N1, N2.getOperand(0));
1629 else if (N2.getOpcode() == ISD::AND)
1630 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N2.getOperand(1))) {
1631 // If the and is only masking out bits that cannot effect the shift,
1632 // eliminate the and.
1633 unsigned NumBits = MVT::getSizeInBits(VT);
1634 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
1635 return getNode(Opcode, VT, N1, N2.getOperand(0));
1641 // Memoize this node if possible.
1643 if (Opcode != ISD::CALLSEQ_START && Opcode != ISD::CALLSEQ_END &&
1645 SDNode *&BON = BinaryOps[std::make_pair(Opcode, std::make_pair(N1, N2))];
1646 if (BON) return SDOperand(BON, 0);
1648 BON = N = new SDNode(Opcode, N1, N2);
1650 N = new SDNode(Opcode, N1, N2);
1653 N->setValueTypes(VT);
1654 AllNodes.push_back(N);
1655 return SDOperand(N, 0);
1658 // setAdjCallChain - This method changes the token chain of an
1659 // CALLSEQ_START/END node to be the specified operand.
1660 void SDNode::setAdjCallChain(SDOperand N) {
1661 assert(N.getValueType() == MVT::Other);
1662 assert((getOpcode() == ISD::CALLSEQ_START ||
1663 getOpcode() == ISD::CALLSEQ_END) && "Cannot adjust this node!");
1665 Operands[0].Val->removeUser(this);
1667 N.Val->Uses.push_back(this);
1672 SDOperand SelectionDAG::getLoad(MVT::ValueType VT,
1673 SDOperand Chain, SDOperand Ptr,
1675 SDNode *&N = Loads[std::make_pair(Ptr, std::make_pair(Chain, VT))];
1676 if (N) return SDOperand(N, 0);
1677 N = new SDNode(ISD::LOAD, Chain, Ptr, SV);
1679 // Loads have a token chain.
1680 N->setValueTypes(VT, MVT::Other);
1681 AllNodes.push_back(N);
1682 return SDOperand(N, 0);
1686 SDOperand SelectionDAG::getExtLoad(unsigned Opcode, MVT::ValueType VT,
1687 SDOperand Chain, SDOperand Ptr, SDOperand SV,
1688 MVT::ValueType EVT) {
1689 std::vector<SDOperand> Ops;
1691 Ops.push_back(Chain);
1694 Ops.push_back(getValueType(EVT));
1695 std::vector<MVT::ValueType> VTs;
1697 VTs.push_back(VT); VTs.push_back(MVT::Other); // Add token chain.
1698 return getNode(Opcode, VTs, Ops);
1701 SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
1702 SDOperand N1, SDOperand N2, SDOperand N3) {
1703 // Perform various simplifications.
1704 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val);
1705 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val);
1706 ConstantSDNode *N3C = dyn_cast<ConstantSDNode>(N3.Val);
1709 // Use SimplifySetCC to simplify SETCC's.
1710 SDOperand Simp = SimplifySetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get());
1711 if (Simp.Val) return Simp;
1716 if (N1C->getValue())
1717 return N2; // select true, X, Y -> X
1719 return N3; // select false, X, Y -> Y
1721 if (N2 == N3) return N2; // select C, X, X -> X
1723 if (VT == MVT::i1) { // Boolean SELECT
1725 if (N2C->getValue()) // select C, 1, X -> C | X
1726 return getNode(ISD::OR, VT, N1, N3);
1727 else // select C, 0, X -> ~C & X
1728 return getNode(ISD::AND, VT,
1729 getNode(ISD::XOR, N1.getValueType(), N1,
1730 getConstant(1, N1.getValueType())), N3);
1732 if (N3C->getValue()) // select C, X, 1 -> ~C | X
1733 return getNode(ISD::OR, VT,
1734 getNode(ISD::XOR, N1.getValueType(), N1,
1735 getConstant(1, N1.getValueType())), N2);
1736 else // select C, X, 0 -> C & X
1737 return getNode(ISD::AND, VT, N1, N2);
1740 if (N1 == N2) // X ? X : Y --> X ? 1 : Y --> X | Y
1741 return getNode(ISD::OR, VT, N1, N3);
1742 if (N1 == N3) // X ? Y : X --> X ? Y : 0 --> X & Y
1743 return getNode(ISD::AND, VT, N1, N2);
1745 if (N1.getOpcode() == ISD::SETCC) {
1746 SDOperand Simp = SimplifySelectCC(N1.getOperand(0), N1.getOperand(1), N2,
1747 N3, cast<CondCodeSDNode>(N1.getOperand(2))->get());
1748 if (Simp.Val) return Simp;
1753 if (N2C->getValue()) // Unconditional branch
1754 return getNode(ISD::BR, MVT::Other, N1, N3);
1756 return N1; // Never-taken branch
1760 std::vector<SDOperand> Ops;
1766 // Memoize node if it doesn't produce a flag.
1768 if (VT != MVT::Flag) {
1769 SDNode *&E = OneResultNodes[std::make_pair(Opcode,std::make_pair(VT, Ops))];
1770 if (E) return SDOperand(E, 0);
1771 E = N = new SDNode(Opcode, N1, N2, N3);
1773 N = new SDNode(Opcode, N1, N2, N3);
1775 N->setValueTypes(VT);
1776 AllNodes.push_back(N);
1777 return SDOperand(N, 0);
1780 SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
1781 SDOperand N1, SDOperand N2, SDOperand N3,
1783 std::vector<SDOperand> Ops;
1789 return getNode(Opcode, VT, Ops);
1792 SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
1793 SDOperand N1, SDOperand N2, SDOperand N3,
1794 SDOperand N4, SDOperand N5) {
1795 std::vector<SDOperand> Ops;
1802 return getNode(Opcode, VT, Ops);
1806 SDOperand SelectionDAG::getSrcValue(const Value *V, int Offset) {
1807 assert((!V || isa<PointerType>(V->getType())) &&
1808 "SrcValue is not a pointer?");
1809 SDNode *&N = ValueNodes[std::make_pair(V, Offset)];
1810 if (N) return SDOperand(N, 0);
1812 N = new SrcValueSDNode(V, Offset);
1813 AllNodes.push_back(N);
1814 return SDOperand(N, 0);
1817 SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
1818 std::vector<SDOperand> &Ops) {
1819 switch (Ops.size()) {
1820 case 0: return getNode(Opcode, VT);
1821 case 1: return getNode(Opcode, VT, Ops[0]);
1822 case 2: return getNode(Opcode, VT, Ops[0], Ops[1]);
1823 case 3: return getNode(Opcode, VT, Ops[0], Ops[1], Ops[2]);
1827 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(Ops[1].Val);
1830 case ISD::BRCONDTWOWAY:
1832 if (N1C->getValue()) // Unconditional branch to true dest.
1833 return getNode(ISD::BR, MVT::Other, Ops[0], Ops[2]);
1834 else // Unconditional branch to false dest.
1835 return getNode(ISD::BR, MVT::Other, Ops[0], Ops[3]);
1837 case ISD::BRTWOWAY_CC:
1838 assert(Ops.size() == 6 && "BRTWOWAY_CC takes 6 operands!");
1839 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
1840 "LHS and RHS of comparison must have same type!");
1842 case ISD::TRUNCSTORE: {
1843 assert(Ops.size() == 5 && "TRUNCSTORE takes 5 operands!");
1844 MVT::ValueType EVT = cast<VTSDNode>(Ops[4])->getVT();
1845 #if 0 // FIXME: If the target supports EVT natively, convert to a truncate/store
1846 // If this is a truncating store of a constant, convert to the desired type
1847 // and store it instead.
1848 if (isa<Constant>(Ops[0])) {
1849 SDOperand Op = getNode(ISD::TRUNCATE, EVT, N1);
1850 if (isa<Constant>(Op))
1853 // Also for ConstantFP?
1855 if (Ops[0].getValueType() == EVT) // Normal store?
1856 return getNode(ISD::STORE, VT, Ops[0], Ops[1], Ops[2], Ops[3]);
1857 assert(Ops[1].getValueType() > EVT && "Not a truncation?");
1858 assert(MVT::isInteger(Ops[1].getValueType()) == MVT::isInteger(EVT) &&
1859 "Can't do FP-INT conversion!");
1862 case ISD::SELECT_CC: {
1863 assert(Ops.size() == 5 && "TRUNCSTORE takes 5 operands!");
1864 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
1865 "LHS and RHS of condition must have same type!");
1866 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
1867 "True and False arms of SelectCC must have same type!");
1868 assert(Ops[2].getValueType() == VT &&
1869 "select_cc node must be of same type as true and false value!");
1870 SDOperand Simp = SimplifySelectCC(Ops[0], Ops[1], Ops[2], Ops[3],
1871 cast<CondCodeSDNode>(Ops[4])->get());
1872 if (Simp.Val) return Simp;
1876 assert(Ops.size() == 5 && "TRUNCSTORE takes 5 operands!");
1877 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
1878 "LHS/RHS of comparison should match types!");
1879 // Use SimplifySetCC to simplify SETCC's.
1880 SDOperand Simp = SimplifySetCC(MVT::i1, Ops[2], Ops[3],
1881 cast<CondCodeSDNode>(Ops[1])->get());
1883 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Simp)) {
1884 if (C->getValue() & 1) // Unconditional branch
1885 return getNode(ISD::BR, MVT::Other, Ops[0], Ops[4]);
1887 return Ops[0]; // Unconditional Fall through
1888 } else if (Simp.Val->getOpcode() == ISD::SETCC) {
1889 Ops[2] = Simp.getOperand(0);
1890 Ops[3] = Simp.getOperand(1);
1891 Ops[1] = Simp.getOperand(2);
1900 if (VT != MVT::Flag) {
1902 OneResultNodes[std::make_pair(Opcode, std::make_pair(VT, Ops))];
1903 if (E) return SDOperand(E, 0);
1904 E = N = new SDNode(Opcode, Ops);
1906 N = new SDNode(Opcode, Ops);
1908 N->setValueTypes(VT);
1909 AllNodes.push_back(N);
1910 return SDOperand(N, 0);
1913 SDOperand SelectionDAG::getNode(unsigned Opcode,
1914 std::vector<MVT::ValueType> &ResultTys,
1915 std::vector<SDOperand> &Ops) {
1916 if (ResultTys.size() == 1)
1917 return getNode(Opcode, ResultTys[0], Ops);
1922 case ISD::ZEXTLOAD: {
1923 MVT::ValueType EVT = cast<VTSDNode>(Ops[3])->getVT();
1924 assert(Ops.size() == 4 && ResultTys.size() == 2 && "Bad *EXTLOAD!");
1925 // If they are asking for an extending load from/to the same thing, return a
1927 if (ResultTys[0] == EVT)
1928 return getLoad(ResultTys[0], Ops[0], Ops[1], Ops[2]);
1929 assert(EVT < ResultTys[0] &&
1930 "Should only be an extending load, not truncating!");
1931 assert((Opcode == ISD::EXTLOAD || MVT::isInteger(ResultTys[0])) &&
1932 "Cannot sign/zero extend a FP load!");
1933 assert(MVT::isInteger(ResultTys[0]) == MVT::isInteger(EVT) &&
1934 "Cannot convert from FP to Int or Int -> FP!");
1938 // FIXME: figure out how to safely handle things like
1939 // int foo(int x) { return 1 << (x & 255); }
1940 // int bar() { return foo(256); }
1942 case ISD::SRA_PARTS:
1943 case ISD::SRL_PARTS:
1944 case ISD::SHL_PARTS:
1945 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
1946 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
1947 return getNode(Opcode, VT, N1, N2, N3.getOperand(0));
1948 else if (N3.getOpcode() == ISD::AND)
1949 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
1950 // If the and is only masking out bits that cannot effect the shift,
1951 // eliminate the and.
1952 unsigned NumBits = MVT::getSizeInBits(VT)*2;
1953 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
1954 return getNode(Opcode, VT, N1, N2, N3.getOperand(0));
1960 // Memoize the node unless it returns a flag.
1962 if (ResultTys.back() != MVT::Flag) {
1964 ArbitraryNodes[std::make_pair(Opcode, std::make_pair(ResultTys, Ops))];
1965 if (E) return SDOperand(E, 0);
1966 E = N = new SDNode(Opcode, Ops);
1968 N = new SDNode(Opcode, Ops);
1970 N->setValueTypes(ResultTys);
1971 AllNodes.push_back(N);
1972 return SDOperand(N, 0);
1976 /// SelectNodeTo - These are used for target selectors to *mutate* the
1977 /// specified node to have the specified return type, Target opcode, and
1978 /// operands. Note that target opcodes are stored as
1979 /// ISD::BUILTIN_OP_END+TargetOpcode in the node opcode field.
1980 void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
1981 MVT::ValueType VT) {
1982 RemoveNodeFromCSEMaps(N);
1983 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc);
1984 N->setValueTypes(VT);
1986 void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
1987 MVT::ValueType VT, SDOperand Op1) {
1988 RemoveNodeFromCSEMaps(N);
1989 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc);
1990 N->setValueTypes(VT);
1991 N->setOperands(Op1);
1993 void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
1994 MVT::ValueType VT, SDOperand Op1,
1996 RemoveNodeFromCSEMaps(N);
1997 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc);
1998 N->setValueTypes(VT);
1999 N->setOperands(Op1, Op2);
2001 void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
2002 MVT::ValueType VT1, MVT::ValueType VT2,
2003 SDOperand Op1, SDOperand Op2) {
2004 RemoveNodeFromCSEMaps(N);
2005 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc);
2006 N->setValueTypes(VT1, VT2);
2007 N->setOperands(Op1, Op2);
2009 void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
2010 MVT::ValueType VT, SDOperand Op1,
2011 SDOperand Op2, SDOperand Op3) {
2012 RemoveNodeFromCSEMaps(N);
2013 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc);
2014 N->setValueTypes(VT);
2015 N->setOperands(Op1, Op2, Op3);
2017 void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
2018 MVT::ValueType VT1, MVT::ValueType VT2,
2019 SDOperand Op1, SDOperand Op2, SDOperand Op3) {
2020 RemoveNodeFromCSEMaps(N);
2021 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc);
2022 N->setValueTypes(VT1, VT2);
2023 N->setOperands(Op1, Op2, Op3);
2026 void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
2027 MVT::ValueType VT, SDOperand Op1,
2028 SDOperand Op2, SDOperand Op3, SDOperand Op4) {
2029 RemoveNodeFromCSEMaps(N);
2030 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc);
2031 N->setValueTypes(VT);
2032 N->setOperands(Op1, Op2, Op3, Op4);
2034 void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
2035 MVT::ValueType VT, SDOperand Op1,
2036 SDOperand Op2, SDOperand Op3, SDOperand Op4,
2038 RemoveNodeFromCSEMaps(N);
2039 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc);
2040 N->setValueTypes(VT);
2041 N->setOperands(Op1, Op2, Op3, Op4, Op5);
2044 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
2045 /// This can cause recursive merging of nodes in the DAG.
2047 /// This version assumes From/To have a single result value.
2049 void SelectionDAG::ReplaceAllUsesWith(SDOperand FromN, SDOperand ToN) {
2050 SDNode *From = FromN.Val, *To = ToN.Val;
2051 assert(From->getNumValues() == 1 && To->getNumValues() == 1 &&
2052 "Cannot replace with this method!");
2053 assert(From != To && "Cannot replace uses of with self");
2055 while (!From->use_empty()) {
2056 // Process users until they are all gone.
2057 SDNode *U = *From->use_begin();
2059 // This node is about to morph, remove its old self from the CSE maps.
2060 RemoveNodeFromCSEMaps(U);
2062 for (unsigned i = 0, e = U->getNumOperands(); i != e; ++i)
2063 if (U->getOperand(i).Val == From) {
2064 From->removeUser(U);
2065 U->Operands[i].Val = To;
2069 // Now that we have modified U, add it back to the CSE maps. If it already
2070 // exists there, recursively merge the results together.
2071 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U))
2072 ReplaceAllUsesWith(U, Existing);
2077 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
2078 /// This can cause recursive merging of nodes in the DAG.
2080 /// This version assumes From/To have matching types and numbers of result
2083 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To) {
2084 assert(From != To && "Cannot replace uses of with self");
2085 assert(From->getNumValues() == To->getNumValues() &&
2086 "Cannot use this version of ReplaceAllUsesWith!");
2087 if (From->getNumValues() == 1) { // If possible, use the faster version.
2088 ReplaceAllUsesWith(SDOperand(From, 0), SDOperand(To, 0));
2092 while (!From->use_empty()) {
2093 // Process users until they are all gone.
2094 SDNode *U = *From->use_begin();
2096 // This node is about to morph, remove its old self from the CSE maps.
2097 RemoveNodeFromCSEMaps(U);
2099 for (unsigned i = 0, e = U->getNumOperands(); i != e; ++i)
2100 if (U->getOperand(i).Val == From) {
2101 From->removeUser(U);
2102 U->Operands[i].Val = To;
2106 // Now that we have modified U, add it back to the CSE maps. If it already
2107 // exists there, recursively merge the results together.
2108 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U))
2109 ReplaceAllUsesWith(U, Existing);
2114 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
2115 /// This can cause recursive merging of nodes in the DAG.
2117 /// This version can replace From with any result values. To must match the
2118 /// number and types of values returned by From.
2119 void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
2120 const std::vector<SDOperand> &To) {
2121 assert(From->getNumValues() == To.size() &&
2122 "Incorrect number of values to replace with!");
2123 if (To.size() == 1 && To[0].Val->getNumValues() == 1) {
2124 // Degenerate case handled above.
2125 ReplaceAllUsesWith(SDOperand(From, 0), To[0]);
2129 while (!From->use_empty()) {
2130 // Process users until they are all gone.
2131 SDNode *U = *From->use_begin();
2133 // This node is about to morph, remove its old self from the CSE maps.
2134 RemoveNodeFromCSEMaps(U);
2136 for (unsigned i = 0, e = U->getNumOperands(); i != e; ++i)
2137 if (U->getOperand(i).Val == From) {
2138 const SDOperand &ToOp = To[U->getOperand(i).ResNo];
2139 From->removeUser(U);
2140 U->Operands[i] = ToOp;
2141 ToOp.Val->addUser(U);
2144 // Now that we have modified U, add it back to the CSE maps. If it already
2145 // exists there, recursively merge the results together.
2146 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U))
2147 ReplaceAllUsesWith(U, Existing);
2153 //===----------------------------------------------------------------------===//
2155 //===----------------------------------------------------------------------===//
2157 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
2158 /// indicated value. This method ignores uses of other values defined by this
2160 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) {
2161 assert(Value < getNumValues() && "Bad value!");
2163 // If there is only one value, this is easy.
2164 if (getNumValues() == 1)
2165 return use_size() == NUses;
2166 if (Uses.size() < NUses) return false;
2168 SDOperand TheValue(this, Value);
2170 std::set<SDNode*> UsersHandled;
2172 for (std::vector<SDNode*>::iterator UI = Uses.begin(), E = Uses.end();
2175 if (User->getNumOperands() == 1 ||
2176 UsersHandled.insert(User).second) // First time we've seen this?
2177 for (unsigned i = 0, e = User->getNumOperands(); i != e; ++i)
2178 if (User->getOperand(i) == TheValue) {
2180 return false; // too many uses
2185 // Found exactly the right number of uses?
2190 const char *SDNode::getOperationName(const SelectionDAG *G) const {
2191 switch (getOpcode()) {
2193 if (getOpcode() < ISD::BUILTIN_OP_END)
2194 return "<<Unknown DAG Node>>";
2197 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo())
2198 return TII->getName(getOpcode()-ISD::BUILTIN_OP_END);
2199 return "<<Unknown Target Node>>";
2202 case ISD::PCMARKER: return "PCMarker";
2203 case ISD::SRCVALUE: return "SrcValue";
2204 case ISD::VALUETYPE: return "ValueType";
2205 case ISD::EntryToken: return "EntryToken";
2206 case ISD::TokenFactor: return "TokenFactor";
2207 case ISD::AssertSext: return "AssertSext";
2208 case ISD::AssertZext: return "AssertZext";
2209 case ISD::Constant: return "Constant";
2210 case ISD::TargetConstant: return "TargetConstant";
2211 case ISD::ConstantFP: return "ConstantFP";
2212 case ISD::GlobalAddress: return "GlobalAddress";
2213 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
2214 case ISD::FrameIndex: return "FrameIndex";
2215 case ISD::TargetFrameIndex: return "TargetFrameIndex";
2216 case ISD::BasicBlock: return "BasicBlock";
2217 case ISD::Register: return "Register";
2218 case ISD::ExternalSymbol: return "ExternalSymbol";
2219 case ISD::ConstantPool: return "ConstantPool";
2220 case ISD::TargetConstantPool: return "TargetConstantPool";
2221 case ISD::CopyToReg: return "CopyToReg";
2222 case ISD::CopyFromReg: return "CopyFromReg";
2223 case ISD::ImplicitDef: return "ImplicitDef";
2224 case ISD::UNDEF: return "undef";
2227 case ISD::FABS: return "fabs";
2228 case ISD::FNEG: return "fneg";
2229 case ISD::FSQRT: return "fsqrt";
2230 case ISD::FSIN: return "fsin";
2231 case ISD::FCOS: return "fcos";
2234 case ISD::ADD: return "add";
2235 case ISD::SUB: return "sub";
2236 case ISD::MUL: return "mul";
2237 case ISD::MULHU: return "mulhu";
2238 case ISD::MULHS: return "mulhs";
2239 case ISD::SDIV: return "sdiv";
2240 case ISD::UDIV: return "udiv";
2241 case ISD::SREM: return "srem";
2242 case ISD::UREM: return "urem";
2243 case ISD::AND: return "and";
2244 case ISD::OR: return "or";
2245 case ISD::XOR: return "xor";
2246 case ISD::SHL: return "shl";
2247 case ISD::SRA: return "sra";
2248 case ISD::SRL: return "srl";
2250 case ISD::SETCC: return "setcc";
2251 case ISD::SELECT: return "select";
2252 case ISD::SELECT_CC: return "select_cc";
2253 case ISD::ADD_PARTS: return "add_parts";
2254 case ISD::SUB_PARTS: return "sub_parts";
2255 case ISD::SHL_PARTS: return "shl_parts";
2256 case ISD::SRA_PARTS: return "sra_parts";
2257 case ISD::SRL_PARTS: return "srl_parts";
2259 // Conversion operators.
2260 case ISD::SIGN_EXTEND: return "sign_extend";
2261 case ISD::ZERO_EXTEND: return "zero_extend";
2262 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
2263 case ISD::TRUNCATE: return "truncate";
2264 case ISD::FP_ROUND: return "fp_round";
2265 case ISD::FP_ROUND_INREG: return "fp_round_inreg";
2266 case ISD::FP_EXTEND: return "fp_extend";
2268 case ISD::SINT_TO_FP: return "sint_to_fp";
2269 case ISD::UINT_TO_FP: return "uint_to_fp";
2270 case ISD::FP_TO_SINT: return "fp_to_sint";
2271 case ISD::FP_TO_UINT: return "fp_to_uint";
2273 // Control flow instructions
2274 case ISD::BR: return "br";
2275 case ISD::BRCOND: return "brcond";
2276 case ISD::BRCONDTWOWAY: return "brcondtwoway";
2277 case ISD::BR_CC: return "br_cc";
2278 case ISD::BRTWOWAY_CC: return "brtwoway_cc";
2279 case ISD::RET: return "ret";
2280 case ISD::CALL: return "call";
2281 case ISD::TAILCALL:return "tailcall";
2282 case ISD::CALLSEQ_START: return "callseq_start";
2283 case ISD::CALLSEQ_END: return "callseq_end";
2286 case ISD::LOAD: return "load";
2287 case ISD::STORE: return "store";
2288 case ISD::EXTLOAD: return "extload";
2289 case ISD::SEXTLOAD: return "sextload";
2290 case ISD::ZEXTLOAD: return "zextload";
2291 case ISD::TRUNCSTORE: return "truncstore";
2293 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
2294 case ISD::EXTRACT_ELEMENT: return "extract_element";
2295 case ISD::BUILD_PAIR: return "build_pair";
2296 case ISD::MEMSET: return "memset";
2297 case ISD::MEMCPY: return "memcpy";
2298 case ISD::MEMMOVE: return "memmove";
2301 case ISD::CTPOP: return "ctpop";
2302 case ISD::CTTZ: return "cttz";
2303 case ISD::CTLZ: return "ctlz";
2306 case ISD::READPORT: return "readport";
2307 case ISD::WRITEPORT: return "writeport";
2308 case ISD::READIO: return "readio";
2309 case ISD::WRITEIO: return "writeio";
2312 switch (cast<CondCodeSDNode>(this)->get()) {
2313 default: assert(0 && "Unknown setcc condition!");
2314 case ISD::SETOEQ: return "setoeq";
2315 case ISD::SETOGT: return "setogt";
2316 case ISD::SETOGE: return "setoge";
2317 case ISD::SETOLT: return "setolt";
2318 case ISD::SETOLE: return "setole";
2319 case ISD::SETONE: return "setone";
2321 case ISD::SETO: return "seto";
2322 case ISD::SETUO: return "setuo";
2323 case ISD::SETUEQ: return "setue";
2324 case ISD::SETUGT: return "setugt";
2325 case ISD::SETUGE: return "setuge";
2326 case ISD::SETULT: return "setult";
2327 case ISD::SETULE: return "setule";
2328 case ISD::SETUNE: return "setune";
2330 case ISD::SETEQ: return "seteq";
2331 case ISD::SETGT: return "setgt";
2332 case ISD::SETGE: return "setge";
2333 case ISD::SETLT: return "setlt";
2334 case ISD::SETLE: return "setle";
2335 case ISD::SETNE: return "setne";
2340 void SDNode::dump() const { dump(0); }
2341 void SDNode::dump(const SelectionDAG *G) const {
2342 std::cerr << (void*)this << ": ";
2344 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
2345 if (i) std::cerr << ",";
2346 if (getValueType(i) == MVT::Other)
2349 std::cerr << MVT::getValueTypeString(getValueType(i));
2351 std::cerr << " = " << getOperationName(G);
2354 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
2355 if (i) std::cerr << ", ";
2356 std::cerr << (void*)getOperand(i).Val;
2357 if (unsigned RN = getOperand(i).ResNo)
2358 std::cerr << ":" << RN;
2361 if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
2362 std::cerr << "<" << CSDN->getValue() << ">";
2363 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
2364 std::cerr << "<" << CSDN->getValue() << ">";
2365 } else if (const GlobalAddressSDNode *GADN =
2366 dyn_cast<GlobalAddressSDNode>(this)) {
2368 WriteAsOperand(std::cerr, GADN->getGlobal()) << ">";
2369 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
2370 std::cerr << "<" << FIDN->getIndex() << ">";
2371 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
2372 std::cerr << "<" << *CP->get() << ">";
2373 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
2375 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
2377 std::cerr << LBB->getName() << " ";
2378 std::cerr << (const void*)BBDN->getBasicBlock() << ">";
2379 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
2380 if (G && MRegisterInfo::isPhysicalRegister(R->getReg())) {
2381 std::cerr << " " <<G->getTarget().getRegisterInfo()->getName(R->getReg());
2383 std::cerr << " #" << R->getReg();
2385 } else if (const ExternalSymbolSDNode *ES =
2386 dyn_cast<ExternalSymbolSDNode>(this)) {
2387 std::cerr << "'" << ES->getSymbol() << "'";
2388 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
2390 std::cerr << "<" << M->getValue() << ":" << M->getOffset() << ">";
2392 std::cerr << "<null:" << M->getOffset() << ">";
2393 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
2394 std::cerr << ":" << getValueTypeString(N->getVT());
2398 static void DumpNodes(SDNode *N, unsigned indent, const SelectionDAG *G) {
2399 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
2400 if (N->getOperand(i).Val->hasOneUse())
2401 DumpNodes(N->getOperand(i).Val, indent+2, G);
2403 std::cerr << "\n" << std::string(indent+2, ' ')
2404 << (void*)N->getOperand(i).Val << ": <multiple use>";
2407 std::cerr << "\n" << std::string(indent, ' ');
2411 void SelectionDAG::dump() const {
2412 std::cerr << "SelectionDAG has " << AllNodes.size() << " nodes:";
2413 std::vector<SDNode*> Nodes(AllNodes);
2414 std::sort(Nodes.begin(), Nodes.end());
2416 for (unsigned i = 0, e = Nodes.size(); i != e; ++i) {
2417 if (!Nodes[i]->hasOneUse() && Nodes[i] != getRoot().Val)
2418 DumpNodes(Nodes[i], 2, this);
2421 DumpNodes(getRoot().Val, 2, this);
2423 std::cerr << "\n\n";