1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "SDNodeDbgValue.h"
16 #include "SDNodeOrdering.h"
17 #include "llvm/ADT/SetVector.h"
18 #include "llvm/ADT/SmallPtrSet.h"
19 #include "llvm/ADT/SmallSet.h"
20 #include "llvm/ADT/SmallVector.h"
21 #include "llvm/ADT/StringExtras.h"
22 #include "llvm/Analysis/ValueTracking.h"
23 #include "llvm/Assembly/Writer.h"
24 #include "llvm/CodeGen/MachineBasicBlock.h"
25 #include "llvm/CodeGen/MachineConstantPool.h"
26 #include "llvm/CodeGen/MachineFrameInfo.h"
27 #include "llvm/CodeGen/MachineModuleInfo.h"
28 #include "llvm/DebugInfo.h"
29 #include "llvm/IR/CallingConv.h"
30 #include "llvm/IR/Constants.h"
31 #include "llvm/IR/DataLayout.h"
32 #include "llvm/IR/DerivedTypes.h"
33 #include "llvm/IR/Function.h"
34 #include "llvm/IR/GlobalAlias.h"
35 #include "llvm/IR/GlobalVariable.h"
36 #include "llvm/IR/Intrinsics.h"
37 #include "llvm/Support/CommandLine.h"
38 #include "llvm/Support/Debug.h"
39 #include "llvm/Support/ErrorHandling.h"
40 #include "llvm/Support/ManagedStatic.h"
41 #include "llvm/Support/MathExtras.h"
42 #include "llvm/Support/Mutex.h"
43 #include "llvm/Support/raw_ostream.h"
44 #include "llvm/Target/TargetInstrInfo.h"
45 #include "llvm/Target/TargetIntrinsicInfo.h"
46 #include "llvm/Target/TargetLowering.h"
47 #include "llvm/Target/TargetMachine.h"
48 #include "llvm/Target/TargetOptions.h"
49 #include "llvm/Target/TargetRegisterInfo.h"
50 #include "llvm/Target/TargetSelectionDAGInfo.h"
51 #include "llvm/TargetTransformInfo.h"
56 /// makeVTList - Return an instance of the SDVTList struct initialized with the
57 /// specified members.
58 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
59 SDVTList Res = {VTs, NumVTs};
63 static const fltSemantics *EVTToAPFloatSemantics(EVT VT) {
64 switch (VT.getSimpleVT().SimpleTy) {
65 default: llvm_unreachable("Unknown FP format");
66 case MVT::f16: return &APFloat::IEEEhalf;
67 case MVT::f32: return &APFloat::IEEEsingle;
68 case MVT::f64: return &APFloat::IEEEdouble;
69 case MVT::f80: return &APFloat::x87DoubleExtended;
70 case MVT::f128: return &APFloat::IEEEquad;
71 case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
75 // Default null implementations of the callbacks.
76 void SelectionDAG::DAGUpdateListener::NodeDeleted(SDNode*, SDNode*) {}
77 void SelectionDAG::DAGUpdateListener::NodeUpdated(SDNode*) {}
79 //===----------------------------------------------------------------------===//
80 // ConstantFPSDNode Class
81 //===----------------------------------------------------------------------===//
83 /// isExactlyValue - We don't rely on operator== working on double values, as
84 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
85 /// As such, this method can be used to do an exact bit-for-bit comparison of
86 /// two floating point values.
87 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
88 return getValueAPF().bitwiseIsEqual(V);
91 bool ConstantFPSDNode::isValueValidForType(EVT VT,
93 assert(VT.isFloatingPoint() && "Can only convert between FP types");
95 // convert modifies in place, so make a copy.
96 APFloat Val2 = APFloat(Val);
98 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
103 //===----------------------------------------------------------------------===//
105 //===----------------------------------------------------------------------===//
107 /// isBuildVectorAllOnes - Return true if the specified node is a
108 /// BUILD_VECTOR where all of the elements are ~0 or undef.
109 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
110 // Look through a bit convert.
111 if (N->getOpcode() == ISD::BITCAST)
112 N = N->getOperand(0).getNode();
114 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
116 unsigned i = 0, e = N->getNumOperands();
118 // Skip over all of the undef values.
119 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
122 // Do not accept an all-undef vector.
123 if (i == e) return false;
125 // Do not accept build_vectors that aren't all constants or which have non-~0
126 // elements. We have to be a bit careful here, as the type of the constant
127 // may not be the same as the type of the vector elements due to type
128 // legalization (the elements are promoted to a legal type for the target and
129 // a vector of a type may be legal when the base element type is not).
130 // We only want to check enough bits to cover the vector elements, because
131 // we care if the resultant vector is all ones, not whether the individual
133 SDValue NotZero = N->getOperand(i);
134 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits();
135 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(NotZero)) {
136 if (CN->getAPIntValue().countTrailingOnes() < EltSize)
138 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(NotZero)) {
139 if (CFPN->getValueAPF().bitcastToAPInt().countTrailingOnes() < EltSize)
144 // Okay, we have at least one ~0 value, check to see if the rest match or are
145 // undefs. Even with the above element type twiddling, this should be OK, as
146 // the same type legalization should have applied to all the elements.
147 for (++i; i != e; ++i)
148 if (N->getOperand(i) != NotZero &&
149 N->getOperand(i).getOpcode() != ISD::UNDEF)
155 /// isBuildVectorAllZeros - Return true if the specified node is a
156 /// BUILD_VECTOR where all of the elements are 0 or undef.
157 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
158 // Look through a bit convert.
159 if (N->getOpcode() == ISD::BITCAST)
160 N = N->getOperand(0).getNode();
162 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
164 unsigned i = 0, e = N->getNumOperands();
166 // Skip over all of the undef values.
167 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
170 // Do not accept an all-undef vector.
171 if (i == e) return false;
173 // Do not accept build_vectors that aren't all constants or which have non-0
175 SDValue Zero = N->getOperand(i);
176 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Zero)) {
177 if (!CN->isNullValue())
179 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(Zero)) {
180 if (!CFPN->getValueAPF().isPosZero())
185 // Okay, we have at least one 0 value, check to see if the rest match or are
187 for (++i; i != e; ++i)
188 if (N->getOperand(i) != Zero &&
189 N->getOperand(i).getOpcode() != ISD::UNDEF)
194 /// isScalarToVector - Return true if the specified node is a
195 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
196 /// element is not an undef.
197 bool ISD::isScalarToVector(const SDNode *N) {
198 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
201 if (N->getOpcode() != ISD::BUILD_VECTOR)
203 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
205 unsigned NumElems = N->getNumOperands();
208 for (unsigned i = 1; i < NumElems; ++i) {
209 SDValue V = N->getOperand(i);
210 if (V.getOpcode() != ISD::UNDEF)
216 /// allOperandsUndef - Return true if the node has at least one operand
217 /// and all operands of the specified node are ISD::UNDEF.
218 bool ISD::allOperandsUndef(const SDNode *N) {
219 // Return false if the node has no operands.
220 // This is "logically inconsistent" with the definition of "all" but
221 // is probably the desired behavior.
222 if (N->getNumOperands() == 0)
225 for (unsigned i = 0, e = N->getNumOperands(); i != e ; ++i)
226 if (N->getOperand(i).getOpcode() != ISD::UNDEF)
232 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
233 /// when given the operation for (X op Y).
234 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
235 // To perform this operation, we just need to swap the L and G bits of the
237 unsigned OldL = (Operation >> 2) & 1;
238 unsigned OldG = (Operation >> 1) & 1;
239 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
240 (OldL << 1) | // New G bit
241 (OldG << 2)); // New L bit.
244 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
245 /// 'op' is a valid SetCC operation.
246 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
247 unsigned Operation = Op;
249 Operation ^= 7; // Flip L, G, E bits, but not U.
251 Operation ^= 15; // Flip all of the condition bits.
253 if (Operation > ISD::SETTRUE2)
254 Operation &= ~8; // Don't let N and U bits get set.
256 return ISD::CondCode(Operation);
260 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
261 /// signed operation and 2 if the result is an unsigned comparison. Return zero
262 /// if the operation does not depend on the sign of the input (setne and seteq).
263 static int isSignedOp(ISD::CondCode Opcode) {
265 default: llvm_unreachable("Illegal integer setcc operation!");
267 case ISD::SETNE: return 0;
271 case ISD::SETGE: return 1;
275 case ISD::SETUGE: return 2;
279 /// getSetCCOrOperation - Return the result of a logical OR between different
280 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
281 /// returns SETCC_INVALID if it is not possible to represent the resultant
283 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
285 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
286 // Cannot fold a signed integer setcc with an unsigned integer setcc.
287 return ISD::SETCC_INVALID;
289 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
291 // If the N and U bits get set then the resultant comparison DOES suddenly
292 // care about orderedness, and is true when ordered.
293 if (Op > ISD::SETTRUE2)
294 Op &= ~16; // Clear the U bit if the N bit is set.
296 // Canonicalize illegal integer setcc's.
297 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
300 return ISD::CondCode(Op);
303 /// getSetCCAndOperation - Return the result of a logical AND between different
304 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
305 /// function returns zero if it is not possible to represent the resultant
307 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
309 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
310 // Cannot fold a signed setcc with an unsigned setcc.
311 return ISD::SETCC_INVALID;
313 // Combine all of the condition bits.
314 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
316 // Canonicalize illegal integer setcc's.
320 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
321 case ISD::SETOEQ: // SETEQ & SETU[LG]E
322 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
323 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
324 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
331 //===----------------------------------------------------------------------===//
332 // SDNode Profile Support
333 //===----------------------------------------------------------------------===//
335 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
337 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
341 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
342 /// solely with their pointer.
343 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
344 ID.AddPointer(VTList.VTs);
347 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
349 static void AddNodeIDOperands(FoldingSetNodeID &ID,
350 const SDValue *Ops, unsigned NumOps) {
351 for (; NumOps; --NumOps, ++Ops) {
352 ID.AddPointer(Ops->getNode());
353 ID.AddInteger(Ops->getResNo());
357 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
359 static void AddNodeIDOperands(FoldingSetNodeID &ID,
360 const SDUse *Ops, unsigned NumOps) {
361 for (; NumOps; --NumOps, ++Ops) {
362 ID.AddPointer(Ops->getNode());
363 ID.AddInteger(Ops->getResNo());
367 static void AddNodeIDNode(FoldingSetNodeID &ID,
368 unsigned short OpC, SDVTList VTList,
369 const SDValue *OpList, unsigned N) {
370 AddNodeIDOpcode(ID, OpC);
371 AddNodeIDValueTypes(ID, VTList);
372 AddNodeIDOperands(ID, OpList, N);
375 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
377 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
378 switch (N->getOpcode()) {
379 case ISD::TargetExternalSymbol:
380 case ISD::ExternalSymbol:
381 llvm_unreachable("Should only be used on nodes with operands");
382 default: break; // Normal nodes don't need extra info.
383 case ISD::TargetConstant:
385 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
387 case ISD::TargetConstantFP:
388 case ISD::ConstantFP: {
389 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
392 case ISD::TargetGlobalAddress:
393 case ISD::GlobalAddress:
394 case ISD::TargetGlobalTLSAddress:
395 case ISD::GlobalTLSAddress: {
396 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
397 ID.AddPointer(GA->getGlobal());
398 ID.AddInteger(GA->getOffset());
399 ID.AddInteger(GA->getTargetFlags());
400 ID.AddInteger(GA->getAddressSpace());
403 case ISD::BasicBlock:
404 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
407 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
409 case ISD::RegisterMask:
410 ID.AddPointer(cast<RegisterMaskSDNode>(N)->getRegMask());
413 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
415 case ISD::FrameIndex:
416 case ISD::TargetFrameIndex:
417 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
420 case ISD::TargetJumpTable:
421 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
422 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
424 case ISD::ConstantPool:
425 case ISD::TargetConstantPool: {
426 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
427 ID.AddInteger(CP->getAlignment());
428 ID.AddInteger(CP->getOffset());
429 if (CP->isMachineConstantPoolEntry())
430 CP->getMachineCPVal()->addSelectionDAGCSEId(ID);
432 ID.AddPointer(CP->getConstVal());
433 ID.AddInteger(CP->getTargetFlags());
436 case ISD::TargetIndex: {
437 const TargetIndexSDNode *TI = cast<TargetIndexSDNode>(N);
438 ID.AddInteger(TI->getIndex());
439 ID.AddInteger(TI->getOffset());
440 ID.AddInteger(TI->getTargetFlags());
444 const LoadSDNode *LD = cast<LoadSDNode>(N);
445 ID.AddInteger(LD->getMemoryVT().getRawBits());
446 ID.AddInteger(LD->getRawSubclassData());
447 ID.AddInteger(LD->getPointerInfo().getAddrSpace());
451 const StoreSDNode *ST = cast<StoreSDNode>(N);
452 ID.AddInteger(ST->getMemoryVT().getRawBits());
453 ID.AddInteger(ST->getRawSubclassData());
454 ID.AddInteger(ST->getPointerInfo().getAddrSpace());
457 case ISD::ATOMIC_CMP_SWAP:
458 case ISD::ATOMIC_SWAP:
459 case ISD::ATOMIC_LOAD_ADD:
460 case ISD::ATOMIC_LOAD_SUB:
461 case ISD::ATOMIC_LOAD_AND:
462 case ISD::ATOMIC_LOAD_OR:
463 case ISD::ATOMIC_LOAD_XOR:
464 case ISD::ATOMIC_LOAD_NAND:
465 case ISD::ATOMIC_LOAD_MIN:
466 case ISD::ATOMIC_LOAD_MAX:
467 case ISD::ATOMIC_LOAD_UMIN:
468 case ISD::ATOMIC_LOAD_UMAX:
469 case ISD::ATOMIC_LOAD:
470 case ISD::ATOMIC_STORE: {
471 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
472 ID.AddInteger(AT->getMemoryVT().getRawBits());
473 ID.AddInteger(AT->getRawSubclassData());
474 ID.AddInteger(AT->getPointerInfo().getAddrSpace());
477 case ISD::PREFETCH: {
478 const MemSDNode *PF = cast<MemSDNode>(N);
479 ID.AddInteger(PF->getPointerInfo().getAddrSpace());
482 case ISD::VECTOR_SHUFFLE: {
483 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
484 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
486 ID.AddInteger(SVN->getMaskElt(i));
489 case ISD::TargetBlockAddress:
490 case ISD::BlockAddress: {
491 const BlockAddressSDNode *BA = cast<BlockAddressSDNode>(N);
492 ID.AddPointer(BA->getBlockAddress());
493 ID.AddInteger(BA->getOffset());
494 ID.AddInteger(BA->getTargetFlags());
497 } // end switch (N->getOpcode())
499 // Target specific memory nodes could also have address spaces to check.
500 if (N->isTargetMemoryOpcode())
501 ID.AddInteger(cast<MemSDNode>(N)->getPointerInfo().getAddrSpace());
504 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
506 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
507 AddNodeIDOpcode(ID, N->getOpcode());
508 // Add the return value info.
509 AddNodeIDValueTypes(ID, N->getVTList());
510 // Add the operand info.
511 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
513 // Handle SDNode leafs with special info.
514 AddNodeIDCustom(ID, N);
517 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
518 /// the CSE map that carries volatility, temporalness, indexing mode, and
519 /// extension/truncation information.
521 static inline unsigned
522 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile,
523 bool isNonTemporal, bool isInvariant) {
524 assert((ConvType & 3) == ConvType &&
525 "ConvType may not require more than 2 bits!");
526 assert((AM & 7) == AM &&
527 "AM may not require more than 3 bits!");
531 (isNonTemporal << 6) |
535 //===----------------------------------------------------------------------===//
536 // SelectionDAG Class
537 //===----------------------------------------------------------------------===//
539 /// doNotCSE - Return true if CSE should not be performed for this node.
540 static bool doNotCSE(SDNode *N) {
541 if (N->getValueType(0) == MVT::Glue)
542 return true; // Never CSE anything that produces a flag.
544 switch (N->getOpcode()) {
546 case ISD::HANDLENODE:
548 return true; // Never CSE these nodes.
551 // Check that remaining values produced are not flags.
552 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
553 if (N->getValueType(i) == MVT::Glue)
554 return true; // Never CSE anything that produces a flag.
559 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
561 void SelectionDAG::RemoveDeadNodes() {
562 // Create a dummy node (which is not added to allnodes), that adds a reference
563 // to the root node, preventing it from being deleted.
564 HandleSDNode Dummy(getRoot());
566 SmallVector<SDNode*, 128> DeadNodes;
568 // Add all obviously-dead nodes to the DeadNodes worklist.
569 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
571 DeadNodes.push_back(I);
573 RemoveDeadNodes(DeadNodes);
575 // If the root changed (e.g. it was a dead load, update the root).
576 setRoot(Dummy.getValue());
579 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
580 /// given list, and any nodes that become unreachable as a result.
581 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes) {
583 // Process the worklist, deleting the nodes and adding their uses to the
585 while (!DeadNodes.empty()) {
586 SDNode *N = DeadNodes.pop_back_val();
588 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
589 DUL->NodeDeleted(N, 0);
591 // Take the node out of the appropriate CSE map.
592 RemoveNodeFromCSEMaps(N);
594 // Next, brutally remove the operand list. This is safe to do, as there are
595 // no cycles in the graph.
596 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
598 SDNode *Operand = Use.getNode();
601 // Now that we removed this operand, see if there are no uses of it left.
602 if (Operand->use_empty())
603 DeadNodes.push_back(Operand);
610 void SelectionDAG::RemoveDeadNode(SDNode *N){
611 SmallVector<SDNode*, 16> DeadNodes(1, N);
613 // Create a dummy node that adds a reference to the root node, preventing
614 // it from being deleted. (This matters if the root is an operand of the
616 HandleSDNode Dummy(getRoot());
618 RemoveDeadNodes(DeadNodes);
621 void SelectionDAG::DeleteNode(SDNode *N) {
622 // First take this out of the appropriate CSE map.
623 RemoveNodeFromCSEMaps(N);
625 // Finally, remove uses due to operands of this node, remove from the
626 // AllNodes list, and delete the node.
627 DeleteNodeNotInCSEMaps(N);
630 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
631 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
632 assert(N->use_empty() && "Cannot delete a node that is not dead!");
634 // Drop all of the operands and decrement used node's use counts.
640 void SelectionDAG::DeallocateNode(SDNode *N) {
641 if (N->OperandsNeedDelete)
642 delete[] N->OperandList;
644 // Set the opcode to DELETED_NODE to help catch bugs when node
645 // memory is reallocated.
646 N->NodeType = ISD::DELETED_NODE;
648 NodeAllocator.Deallocate(AllNodes.remove(N));
650 // Remove the ordering of this node.
653 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them.
654 ArrayRef<SDDbgValue*> DbgVals = DbgInfo->getSDDbgValues(N);
655 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i)
656 DbgVals[i]->setIsInvalidated();
659 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
660 /// correspond to it. This is useful when we're about to delete or repurpose
661 /// the node. We don't want future request for structurally identical nodes
662 /// to return N anymore.
663 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
665 switch (N->getOpcode()) {
666 case ISD::HANDLENODE: return false; // noop.
668 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
669 "Cond code doesn't exist!");
670 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
671 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
673 case ISD::ExternalSymbol:
674 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
676 case ISD::TargetExternalSymbol: {
677 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
678 Erased = TargetExternalSymbols.erase(
679 std::pair<std::string,unsigned char>(ESN->getSymbol(),
680 ESN->getTargetFlags()));
683 case ISD::VALUETYPE: {
684 EVT VT = cast<VTSDNode>(N)->getVT();
685 if (VT.isExtended()) {
686 Erased = ExtendedValueTypeNodes.erase(VT);
688 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0;
689 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0;
694 // Remove it from the CSE Map.
695 assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!");
696 assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!");
697 Erased = CSEMap.RemoveNode(N);
701 // Verify that the node was actually in one of the CSE maps, unless it has a
702 // flag result (which cannot be CSE'd) or is one of the special cases that are
703 // not subject to CSE.
704 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue &&
705 !N->isMachineOpcode() && !doNotCSE(N)) {
708 llvm_unreachable("Node is not in map!");
714 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
715 /// maps and modified in place. Add it back to the CSE maps, unless an identical
716 /// node already exists, in which case transfer all its users to the existing
717 /// node. This transfer can potentially trigger recursive merging.
720 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N) {
721 // For node types that aren't CSE'd, just act as if no identical node
724 SDNode *Existing = CSEMap.GetOrInsertNode(N);
726 // If there was already an existing matching node, use ReplaceAllUsesWith
727 // to replace the dead one with the existing one. This can cause
728 // recursive merging of other unrelated nodes down the line.
729 ReplaceAllUsesWith(N, Existing);
731 // N is now dead. Inform the listeners and delete it.
732 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
733 DUL->NodeDeleted(N, Existing);
734 DeleteNodeNotInCSEMaps(N);
739 // If the node doesn't already exist, we updated it. Inform listeners.
740 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
744 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
745 /// were replaced with those specified. If this node is never memoized,
746 /// return null, otherwise return a pointer to the slot it would take. If a
747 /// node already exists with these operands, the slot will be non-null.
748 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
753 SDValue Ops[] = { Op };
755 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
756 AddNodeIDCustom(ID, N);
757 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
761 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
762 /// were replaced with those specified. If this node is never memoized,
763 /// return null, otherwise return a pointer to the slot it would take. If a
764 /// node already exists with these operands, the slot will be non-null.
765 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
766 SDValue Op1, SDValue Op2,
771 SDValue Ops[] = { Op1, Op2 };
773 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
774 AddNodeIDCustom(ID, N);
775 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
780 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
781 /// were replaced with those specified. If this node is never memoized,
782 /// return null, otherwise return a pointer to the slot it would take. If a
783 /// node already exists with these operands, the slot will be non-null.
784 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
785 const SDValue *Ops,unsigned NumOps,
791 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
792 AddNodeIDCustom(ID, N);
793 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
798 /// VerifyNodeCommon - Sanity check the given node. Aborts if it is invalid.
799 static void VerifyNodeCommon(SDNode *N) {
800 switch (N->getOpcode()) {
803 case ISD::BUILD_PAIR: {
804 EVT VT = N->getValueType(0);
805 assert(N->getNumValues() == 1 && "Too many results!");
806 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
807 "Wrong return type!");
808 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
809 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
810 "Mismatched operand types!");
811 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
812 "Wrong operand type!");
813 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
814 "Wrong return type size");
817 case ISD::BUILD_VECTOR: {
818 assert(N->getNumValues() == 1 && "Too many results!");
819 assert(N->getValueType(0).isVector() && "Wrong return type!");
820 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
821 "Wrong number of operands!");
822 EVT EltVT = N->getValueType(0).getVectorElementType();
823 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) {
824 assert((I->getValueType() == EltVT ||
825 (EltVT.isInteger() && I->getValueType().isInteger() &&
826 EltVT.bitsLE(I->getValueType()))) &&
827 "Wrong operand type!");
828 assert(I->getValueType() == N->getOperand(0).getValueType() &&
829 "Operands must all have the same type");
836 /// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid.
837 static void VerifySDNode(SDNode *N) {
838 // The SDNode allocators cannot be used to allocate nodes with fields that are
839 // not present in an SDNode!
840 assert(!isa<MemSDNode>(N) && "Bad MemSDNode!");
841 assert(!isa<ShuffleVectorSDNode>(N) && "Bad ShuffleVectorSDNode!");
842 assert(!isa<ConstantSDNode>(N) && "Bad ConstantSDNode!");
843 assert(!isa<ConstantFPSDNode>(N) && "Bad ConstantFPSDNode!");
844 assert(!isa<GlobalAddressSDNode>(N) && "Bad GlobalAddressSDNode!");
845 assert(!isa<FrameIndexSDNode>(N) && "Bad FrameIndexSDNode!");
846 assert(!isa<JumpTableSDNode>(N) && "Bad JumpTableSDNode!");
847 assert(!isa<ConstantPoolSDNode>(N) && "Bad ConstantPoolSDNode!");
848 assert(!isa<BasicBlockSDNode>(N) && "Bad BasicBlockSDNode!");
849 assert(!isa<SrcValueSDNode>(N) && "Bad SrcValueSDNode!");
850 assert(!isa<MDNodeSDNode>(N) && "Bad MDNodeSDNode!");
851 assert(!isa<RegisterSDNode>(N) && "Bad RegisterSDNode!");
852 assert(!isa<BlockAddressSDNode>(N) && "Bad BlockAddressSDNode!");
853 assert(!isa<EHLabelSDNode>(N) && "Bad EHLabelSDNode!");
854 assert(!isa<ExternalSymbolSDNode>(N) && "Bad ExternalSymbolSDNode!");
855 assert(!isa<CondCodeSDNode>(N) && "Bad CondCodeSDNode!");
856 assert(!isa<CvtRndSatSDNode>(N) && "Bad CvtRndSatSDNode!");
857 assert(!isa<VTSDNode>(N) && "Bad VTSDNode!");
858 assert(!isa<MachineSDNode>(N) && "Bad MachineSDNode!");
863 /// VerifyMachineNode - Sanity check the given MachineNode. Aborts if it is
865 static void VerifyMachineNode(SDNode *N) {
866 // The MachineNode allocators cannot be used to allocate nodes with fields
867 // that are not present in a MachineNode!
868 // Currently there are no such nodes.
874 /// getEVTAlignment - Compute the default alignment value for the
877 unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
878 Type *Ty = VT == MVT::iPTR ?
879 PointerType::get(Type::getInt8Ty(*getContext()), 0) :
880 VT.getTypeForEVT(*getContext());
882 return TLI.getDataLayout()->getABITypeAlignment(Ty);
885 // EntryNode could meaningfully have debug info if we can find it...
886 SelectionDAG::SelectionDAG(const TargetMachine &tm, CodeGenOpt::Level OL)
887 : TM(tm), TLI(*tm.getTargetLowering()), TSI(*tm.getSelectionDAGInfo()),
888 OptLevel(OL), EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Other)),
889 Root(getEntryNode()), Ordering(0), UpdateListeners(0) {
890 AllNodes.push_back(&EntryNode);
891 Ordering = new SDNodeOrdering();
892 DbgInfo = new SDDbgInfo();
895 void SelectionDAG::init(MachineFunction &mf) {
897 Context = &mf.getFunction()->getContext();
900 SelectionDAG::~SelectionDAG() {
901 assert(!UpdateListeners && "Dangling registered DAGUpdateListeners");
907 void SelectionDAG::allnodes_clear() {
908 assert(&*AllNodes.begin() == &EntryNode);
909 AllNodes.remove(AllNodes.begin());
910 while (!AllNodes.empty())
911 DeallocateNode(AllNodes.begin());
914 void SelectionDAG::clear() {
916 OperandAllocator.Reset();
919 ExtendedValueTypeNodes.clear();
920 ExternalSymbols.clear();
921 TargetExternalSymbols.clear();
922 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
923 static_cast<CondCodeSDNode*>(0));
924 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
925 static_cast<SDNode*>(0));
927 EntryNode.UseList = 0;
928 AllNodes.push_back(&EntryNode);
929 Root = getEntryNode();
934 SDValue SelectionDAG::getAnyExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
935 return VT.bitsGT(Op.getValueType()) ?
936 getNode(ISD::ANY_EXTEND, DL, VT, Op) :
937 getNode(ISD::TRUNCATE, DL, VT, Op);
940 SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
941 return VT.bitsGT(Op.getValueType()) ?
942 getNode(ISD::SIGN_EXTEND, DL, VT, Op) :
943 getNode(ISD::TRUNCATE, DL, VT, Op);
946 SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
947 return VT.bitsGT(Op.getValueType()) ?
948 getNode(ISD::ZERO_EXTEND, DL, VT, Op) :
949 getNode(ISD::TRUNCATE, DL, VT, Op);
952 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) {
953 assert(!VT.isVector() &&
954 "getZeroExtendInReg should use the vector element type instead of "
956 if (Op.getValueType() == VT) return Op;
957 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
958 APInt Imm = APInt::getLowBitsSet(BitWidth,
960 return getNode(ISD::AND, DL, Op.getValueType(), Op,
961 getConstant(Imm, Op.getValueType()));
964 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
966 SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) {
967 EVT EltVT = VT.getScalarType();
969 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT);
970 return getNode(ISD::XOR, DL, VT, Val, NegOne);
973 SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) {
974 EVT EltVT = VT.getScalarType();
975 assert((EltVT.getSizeInBits() >= 64 ||
976 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
977 "getConstant with a uint64_t value that doesn't fit in the type!");
978 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
981 SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) {
982 return getConstant(*ConstantInt::get(*Context, Val), VT, isT);
985 SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) {
986 assert(VT.isInteger() && "Cannot create FP integer constant!");
988 EVT EltVT = VT.getScalarType();
989 const ConstantInt *Elt = &Val;
991 // In some cases the vector type is legal but the element type is illegal and
992 // needs to be promoted, for example v8i8 on ARM. In this case, promote the
993 // inserted value (the type does not need to match the vector element type).
994 // Any extra bits introduced will be truncated away.
995 if (VT.isVector() && TLI.getTypeAction(*getContext(), EltVT) ==
996 TargetLowering::TypePromoteInteger) {
997 EltVT = TLI.getTypeToTransformTo(*getContext(), EltVT);
998 APInt NewVal = Elt->getValue().zext(EltVT.getSizeInBits());
999 Elt = ConstantInt::get(*getContext(), NewVal);
1002 assert(Elt->getBitWidth() == EltVT.getSizeInBits() &&
1003 "APInt size does not match type size!");
1004 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
1005 FoldingSetNodeID ID;
1006 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
1010 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
1012 return SDValue(N, 0);
1015 N = new (NodeAllocator) ConstantSDNode(isT, Elt, EltVT);
1016 CSEMap.InsertNode(N, IP);
1017 AllNodes.push_back(N);
1020 SDValue Result(N, 0);
1021 if (VT.isVector()) {
1022 SmallVector<SDValue, 8> Ops;
1023 Ops.assign(VT.getVectorNumElements(), Result);
1024 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
1029 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
1030 return getConstant(Val, TLI.getPointerTy(), isTarget);
1034 SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) {
1035 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget);
1038 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){
1039 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
1041 EVT EltVT = VT.getScalarType();
1043 // Do the map lookup using the actual bit pattern for the floating point
1044 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
1045 // we don't have issues with SNANs.
1046 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
1047 FoldingSetNodeID ID;
1048 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
1052 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
1054 return SDValue(N, 0);
1057 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT);
1058 CSEMap.InsertNode(N, IP);
1059 AllNodes.push_back(N);
1062 SDValue Result(N, 0);
1063 if (VT.isVector()) {
1064 SmallVector<SDValue, 8> Ops;
1065 Ops.assign(VT.getVectorNumElements(), Result);
1066 // FIXME DebugLoc info might be appropriate here
1067 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
1072 SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) {
1073 EVT EltVT = VT.getScalarType();
1074 if (EltVT==MVT::f32)
1075 return getConstantFP(APFloat((float)Val), VT, isTarget);
1076 else if (EltVT==MVT::f64)
1077 return getConstantFP(APFloat(Val), VT, isTarget);
1078 else if (EltVT==MVT::f80 || EltVT==MVT::f128 || EltVT==MVT::ppcf128 ||
1081 APFloat apf = APFloat(Val);
1082 apf.convert(*EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven,
1084 return getConstantFP(apf, VT, isTarget);
1086 llvm_unreachable("Unsupported type in getConstantFP");
1089 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, DebugLoc DL,
1090 EVT VT, int64_t Offset,
1092 unsigned char TargetFlags) {
1093 assert((TargetFlags == 0 || isTargetGA) &&
1094 "Cannot set target flags on target-independent globals");
1096 // Truncate (with sign-extension) the offset value to the pointer size.
1097 unsigned BitWidth = TLI.getPointerTy().getSizeInBits();
1099 Offset = SignExtend64(Offset, BitWidth);
1101 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
1103 // If GV is an alias then use the aliasee for determining thread-localness.
1104 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
1105 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
1109 if (GVar && GVar->isThreadLocal())
1110 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
1112 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
1114 FoldingSetNodeID ID;
1115 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1117 ID.AddInteger(Offset);
1118 ID.AddInteger(TargetFlags);
1119 ID.AddInteger(GV->getType()->getAddressSpace());
1121 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1122 return SDValue(E, 0);
1124 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL, GV, VT,
1125 Offset, TargetFlags);
1126 CSEMap.InsertNode(N, IP);
1127 AllNodes.push_back(N);
1128 return SDValue(N, 0);
1131 SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
1132 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1133 FoldingSetNodeID ID;
1134 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1137 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1138 return SDValue(E, 0);
1140 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget);
1141 CSEMap.InsertNode(N, IP);
1142 AllNodes.push_back(N);
1143 return SDValue(N, 0);
1146 SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
1147 unsigned char TargetFlags) {
1148 assert((TargetFlags == 0 || isTarget) &&
1149 "Cannot set target flags on target-independent jump tables");
1150 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1151 FoldingSetNodeID ID;
1152 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1154 ID.AddInteger(TargetFlags);
1156 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1157 return SDValue(E, 0);
1159 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget,
1161 CSEMap.InsertNode(N, IP);
1162 AllNodes.push_back(N);
1163 return SDValue(N, 0);
1166 SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT,
1167 unsigned Alignment, int Offset,
1169 unsigned char TargetFlags) {
1170 assert((TargetFlags == 0 || isTarget) &&
1171 "Cannot set target flags on target-independent globals");
1173 Alignment = TLI.getDataLayout()->getPrefTypeAlignment(C->getType());
1174 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1175 FoldingSetNodeID ID;
1176 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1177 ID.AddInteger(Alignment);
1178 ID.AddInteger(Offset);
1180 ID.AddInteger(TargetFlags);
1182 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1183 return SDValue(E, 0);
1185 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1186 Alignment, TargetFlags);
1187 CSEMap.InsertNode(N, IP);
1188 AllNodes.push_back(N);
1189 return SDValue(N, 0);
1193 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
1194 unsigned Alignment, int Offset,
1196 unsigned char TargetFlags) {
1197 assert((TargetFlags == 0 || isTarget) &&
1198 "Cannot set target flags on target-independent globals");
1200 Alignment = TLI.getDataLayout()->getPrefTypeAlignment(C->getType());
1201 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1202 FoldingSetNodeID ID;
1203 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1204 ID.AddInteger(Alignment);
1205 ID.AddInteger(Offset);
1206 C->addSelectionDAGCSEId(ID);
1207 ID.AddInteger(TargetFlags);
1209 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1210 return SDValue(E, 0);
1212 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1213 Alignment, TargetFlags);
1214 CSEMap.InsertNode(N, IP);
1215 AllNodes.push_back(N);
1216 return SDValue(N, 0);
1219 SDValue SelectionDAG::getTargetIndex(int Index, EVT VT, int64_t Offset,
1220 unsigned char TargetFlags) {
1221 FoldingSetNodeID ID;
1222 AddNodeIDNode(ID, ISD::TargetIndex, getVTList(VT), 0, 0);
1223 ID.AddInteger(Index);
1224 ID.AddInteger(Offset);
1225 ID.AddInteger(TargetFlags);
1227 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1228 return SDValue(E, 0);
1230 SDNode *N = new (NodeAllocator) TargetIndexSDNode(Index, VT, Offset,
1232 CSEMap.InsertNode(N, IP);
1233 AllNodes.push_back(N);
1234 return SDValue(N, 0);
1237 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1238 FoldingSetNodeID ID;
1239 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1242 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1243 return SDValue(E, 0);
1245 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB);
1246 CSEMap.InsertNode(N, IP);
1247 AllNodes.push_back(N);
1248 return SDValue(N, 0);
1251 SDValue SelectionDAG::getValueType(EVT VT) {
1252 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
1253 ValueTypeNodes.size())
1254 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
1256 SDNode *&N = VT.isExtended() ?
1257 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
1259 if (N) return SDValue(N, 0);
1260 N = new (NodeAllocator) VTSDNode(VT);
1261 AllNodes.push_back(N);
1262 return SDValue(N, 0);
1265 SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
1266 SDNode *&N = ExternalSymbols[Sym];
1267 if (N) return SDValue(N, 0);
1268 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT);
1269 AllNodes.push_back(N);
1270 return SDValue(N, 0);
1273 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
1274 unsigned char TargetFlags) {
1276 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1278 if (N) return SDValue(N, 0);
1279 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1280 AllNodes.push_back(N);
1281 return SDValue(N, 0);
1284 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1285 if ((unsigned)Cond >= CondCodeNodes.size())
1286 CondCodeNodes.resize(Cond+1);
1288 if (CondCodeNodes[Cond] == 0) {
1289 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond);
1290 CondCodeNodes[Cond] = N;
1291 AllNodes.push_back(N);
1294 return SDValue(CondCodeNodes[Cond], 0);
1297 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1298 // the shuffle mask M that point at N1 to point at N2, and indices that point
1299 // N2 to point at N1.
1300 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1302 int NElts = M.size();
1303 for (int i = 0; i != NElts; ++i) {
1311 SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1,
1312 SDValue N2, const int *Mask) {
1313 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE");
1314 assert(VT.isVector() && N1.getValueType().isVector() &&
1315 "Vector Shuffle VTs must be a vectors");
1316 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType()
1317 && "Vector Shuffle VTs must have same element type");
1319 // Canonicalize shuffle undef, undef -> undef
1320 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1321 return getUNDEF(VT);
1323 // Validate that all indices in Mask are within the range of the elements
1324 // input to the shuffle.
1325 unsigned NElts = VT.getVectorNumElements();
1326 SmallVector<int, 8> MaskVec;
1327 for (unsigned i = 0; i != NElts; ++i) {
1328 assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1329 MaskVec.push_back(Mask[i]);
1332 // Canonicalize shuffle v, v -> v, undef
1335 for (unsigned i = 0; i != NElts; ++i)
1336 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1339 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1340 if (N1.getOpcode() == ISD::UNDEF)
1341 commuteShuffle(N1, N2, MaskVec);
1343 // Canonicalize all index into lhs, -> shuffle lhs, undef
1344 // Canonicalize all index into rhs, -> shuffle rhs, undef
1345 bool AllLHS = true, AllRHS = true;
1346 bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1347 for (unsigned i = 0; i != NElts; ++i) {
1348 if (MaskVec[i] >= (int)NElts) {
1353 } else if (MaskVec[i] >= 0) {
1357 if (AllLHS && AllRHS)
1358 return getUNDEF(VT);
1359 if (AllLHS && !N2Undef)
1363 commuteShuffle(N1, N2, MaskVec);
1366 // If Identity shuffle, or all shuffle in to undef, return that node.
1367 bool AllUndef = true;
1368 bool Identity = true;
1369 for (unsigned i = 0; i != NElts; ++i) {
1370 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1371 if (MaskVec[i] >= 0) AllUndef = false;
1373 if (Identity && NElts == N1.getValueType().getVectorNumElements())
1376 return getUNDEF(VT);
1378 FoldingSetNodeID ID;
1379 SDValue Ops[2] = { N1, N2 };
1380 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2);
1381 for (unsigned i = 0; i != NElts; ++i)
1382 ID.AddInteger(MaskVec[i]);
1385 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1386 return SDValue(E, 0);
1388 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1389 // SDNode doesn't have access to it. This memory will be "leaked" when
1390 // the node is deallocated, but recovered when the NodeAllocator is released.
1391 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1392 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1394 ShuffleVectorSDNode *N =
1395 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc);
1396 CSEMap.InsertNode(N, IP);
1397 AllNodes.push_back(N);
1398 return SDValue(N, 0);
1401 SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl,
1402 SDValue Val, SDValue DTy,
1403 SDValue STy, SDValue Rnd, SDValue Sat,
1404 ISD::CvtCode Code) {
1405 // If the src and dest types are the same and the conversion is between
1406 // integer types of the same sign or two floats, no conversion is necessary.
1408 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1411 FoldingSetNodeID ID;
1412 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1413 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5);
1415 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1416 return SDValue(E, 0);
1418 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5,
1420 CSEMap.InsertNode(N, IP);
1421 AllNodes.push_back(N);
1422 return SDValue(N, 0);
1425 SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
1426 FoldingSetNodeID ID;
1427 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1428 ID.AddInteger(RegNo);
1430 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1431 return SDValue(E, 0);
1433 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT);
1434 CSEMap.InsertNode(N, IP);
1435 AllNodes.push_back(N);
1436 return SDValue(N, 0);
1439 SDValue SelectionDAG::getRegisterMask(const uint32_t *RegMask) {
1440 FoldingSetNodeID ID;
1441 AddNodeIDNode(ID, ISD::RegisterMask, getVTList(MVT::Untyped), 0, 0);
1442 ID.AddPointer(RegMask);
1444 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1445 return SDValue(E, 0);
1447 SDNode *N = new (NodeAllocator) RegisterMaskSDNode(RegMask);
1448 CSEMap.InsertNode(N, IP);
1449 AllNodes.push_back(N);
1450 return SDValue(N, 0);
1453 SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) {
1454 FoldingSetNodeID ID;
1455 SDValue Ops[] = { Root };
1456 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1);
1457 ID.AddPointer(Label);
1459 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1460 return SDValue(E, 0);
1462 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label);
1463 CSEMap.InsertNode(N, IP);
1464 AllNodes.push_back(N);
1465 return SDValue(N, 0);
1469 SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT,
1472 unsigned char TargetFlags) {
1473 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress;
1475 FoldingSetNodeID ID;
1476 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1478 ID.AddInteger(Offset);
1479 ID.AddInteger(TargetFlags);
1481 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1482 return SDValue(E, 0);
1484 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, Offset,
1486 CSEMap.InsertNode(N, IP);
1487 AllNodes.push_back(N);
1488 return SDValue(N, 0);
1491 SDValue SelectionDAG::getSrcValue(const Value *V) {
1492 assert((!V || V->getType()->isPointerTy()) &&
1493 "SrcValue is not a pointer?");
1495 FoldingSetNodeID ID;
1496 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1500 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1501 return SDValue(E, 0);
1503 SDNode *N = new (NodeAllocator) SrcValueSDNode(V);
1504 CSEMap.InsertNode(N, IP);
1505 AllNodes.push_back(N);
1506 return SDValue(N, 0);
1509 /// getMDNode - Return an MDNodeSDNode which holds an MDNode.
1510 SDValue SelectionDAG::getMDNode(const MDNode *MD) {
1511 FoldingSetNodeID ID;
1512 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0);
1516 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1517 return SDValue(E, 0);
1519 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD);
1520 CSEMap.InsertNode(N, IP);
1521 AllNodes.push_back(N);
1522 return SDValue(N, 0);
1526 /// getShiftAmountOperand - Return the specified value casted to
1527 /// the target's desired shift amount type.
1528 SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) {
1529 EVT OpTy = Op.getValueType();
1530 MVT ShTy = TLI.getShiftAmountTy(LHSTy);
1531 if (OpTy == ShTy || OpTy.isVector()) return Op;
1533 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1534 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op);
1537 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1538 /// specified value type.
1539 SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
1540 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1541 unsigned ByteSize = VT.getStoreSize();
1542 Type *Ty = VT.getTypeForEVT(*getContext());
1543 unsigned StackAlign =
1544 std::max((unsigned)TLI.getDataLayout()->getPrefTypeAlignment(Ty), minAlign);
1546 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false);
1547 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1550 /// CreateStackTemporary - Create a stack temporary suitable for holding
1551 /// either of the specified value types.
1552 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
1553 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1554 VT2.getStoreSizeInBits())/8;
1555 Type *Ty1 = VT1.getTypeForEVT(*getContext());
1556 Type *Ty2 = VT2.getTypeForEVT(*getContext());
1557 const DataLayout *TD = TLI.getDataLayout();
1558 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1559 TD->getPrefTypeAlignment(Ty2));
1561 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1562 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false);
1563 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1566 SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
1567 SDValue N2, ISD::CondCode Cond, DebugLoc dl) {
1568 // These setcc operations always fold.
1572 case ISD::SETFALSE2: return getConstant(0, VT);
1574 case ISD::SETTRUE2: return getConstant(1, VT);
1586 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1590 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1591 const APInt &C2 = N2C->getAPIntValue();
1592 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1593 const APInt &C1 = N1C->getAPIntValue();
1596 default: llvm_unreachable("Unknown integer setcc!");
1597 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1598 case ISD::SETNE: return getConstant(C1 != C2, VT);
1599 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1600 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1601 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1602 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1603 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1604 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1605 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1606 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1610 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1611 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1612 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1615 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1616 return getUNDEF(VT);
1618 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1619 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1620 return getUNDEF(VT);
1622 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1623 R==APFloat::cmpLessThan, VT);
1624 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1625 return getUNDEF(VT);
1627 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1628 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1629 return getUNDEF(VT);
1631 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1632 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1633 return getUNDEF(VT);
1635 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1636 R==APFloat::cmpEqual, VT);
1637 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1638 return getUNDEF(VT);
1640 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1641 R==APFloat::cmpEqual, VT);
1642 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1643 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1644 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1645 R==APFloat::cmpEqual, VT);
1646 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1647 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1648 R==APFloat::cmpLessThan, VT);
1649 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1650 R==APFloat::cmpUnordered, VT);
1651 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1652 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1655 // Ensure that the constant occurs on the RHS.
1656 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1660 // Could not fold it.
1664 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1665 /// use this predicate to simplify operations downstream.
1666 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1667 // This predicate is not safe for vector operations.
1668 if (Op.getValueType().isVector())
1671 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1672 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1675 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1676 /// this predicate to simplify operations downstream. Mask is known to be zero
1677 /// for bits that V cannot have.
1678 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1679 unsigned Depth) const {
1680 APInt KnownZero, KnownOne;
1681 ComputeMaskedBits(Op, KnownZero, KnownOne, Depth);
1682 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1683 return (KnownZero & Mask) == Mask;
1686 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1687 /// known to be either zero or one and return them in the KnownZero/KnownOne
1688 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1690 void SelectionDAG::ComputeMaskedBits(SDValue Op, APInt &KnownZero,
1691 APInt &KnownOne, unsigned Depth) const {
1692 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1694 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1696 return; // Limit search depth.
1698 APInt KnownZero2, KnownOne2;
1700 switch (Op.getOpcode()) {
1702 // We know all of the bits for a constant!
1703 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue();
1704 KnownZero = ~KnownOne;
1707 // If either the LHS or the RHS are Zero, the result is zero.
1708 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1709 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1710 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1711 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1713 // Output known-1 bits are only known if set in both the LHS & RHS.
1714 KnownOne &= KnownOne2;
1715 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1716 KnownZero |= KnownZero2;
1719 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1720 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1721 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1722 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1724 // Output known-0 bits are only known if clear in both the LHS & RHS.
1725 KnownZero &= KnownZero2;
1726 // Output known-1 are known to be set if set in either the LHS | RHS.
1727 KnownOne |= KnownOne2;
1730 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1731 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1732 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1733 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1735 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1736 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1737 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1738 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1739 KnownZero = KnownZeroOut;
1743 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1744 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1745 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1746 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1748 // If low bits are zero in either operand, output low known-0 bits.
1749 // Also compute a conserative estimate for high known-0 bits.
1750 // More trickiness is possible, but this is sufficient for the
1751 // interesting case of alignment computation.
1752 KnownOne.clearAllBits();
1753 unsigned TrailZ = KnownZero.countTrailingOnes() +
1754 KnownZero2.countTrailingOnes();
1755 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1756 KnownZero2.countLeadingOnes(),
1757 BitWidth) - BitWidth;
1759 TrailZ = std::min(TrailZ, BitWidth);
1760 LeadZ = std::min(LeadZ, BitWidth);
1761 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1762 APInt::getHighBitsSet(BitWidth, LeadZ);
1766 // For the purposes of computing leading zeros we can conservatively
1767 // treat a udiv as a logical right shift by the power of 2 known to
1768 // be less than the denominator.
1769 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1770 unsigned LeadZ = KnownZero2.countLeadingOnes();
1772 KnownOne2.clearAllBits();
1773 KnownZero2.clearAllBits();
1774 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
1775 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1776 if (RHSUnknownLeadingOnes != BitWidth)
1777 LeadZ = std::min(BitWidth,
1778 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1780 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ);
1784 ComputeMaskedBits(Op.getOperand(2), KnownZero, KnownOne, Depth+1);
1785 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
1786 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1787 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1789 // Only known if known in both the LHS and RHS.
1790 KnownOne &= KnownOne2;
1791 KnownZero &= KnownZero2;
1793 case ISD::SELECT_CC:
1794 ComputeMaskedBits(Op.getOperand(3), KnownZero, KnownOne, Depth+1);
1795 ComputeMaskedBits(Op.getOperand(2), KnownZero2, KnownOne2, Depth+1);
1796 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1797 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1799 // Only known if known in both the LHS and RHS.
1800 KnownOne &= KnownOne2;
1801 KnownZero &= KnownZero2;
1809 if (Op.getResNo() != 1)
1811 // The boolean result conforms to getBooleanContents. Fall through.
1813 // If we know the result of a setcc has the top bits zero, use this info.
1814 if (TLI.getBooleanContents(Op.getValueType().isVector()) ==
1815 TargetLowering::ZeroOrOneBooleanContent && BitWidth > 1)
1816 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1819 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1820 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1821 unsigned ShAmt = SA->getZExtValue();
1823 // If the shift count is an invalid immediate, don't do anything.
1824 if (ShAmt >= BitWidth)
1827 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1828 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1829 KnownZero <<= ShAmt;
1831 // low bits known zero.
1832 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1836 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1837 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1838 unsigned ShAmt = SA->getZExtValue();
1840 // If the shift count is an invalid immediate, don't do anything.
1841 if (ShAmt >= BitWidth)
1844 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1845 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1846 KnownZero = KnownZero.lshr(ShAmt);
1847 KnownOne = KnownOne.lshr(ShAmt);
1849 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
1850 KnownZero |= HighBits; // High bits known zero.
1854 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1855 unsigned ShAmt = SA->getZExtValue();
1857 // If the shift count is an invalid immediate, don't do anything.
1858 if (ShAmt >= BitWidth)
1861 // If any of the demanded bits are produced by the sign extension, we also
1862 // demand the input sign bit.
1863 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
1865 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1866 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1867 KnownZero = KnownZero.lshr(ShAmt);
1868 KnownOne = KnownOne.lshr(ShAmt);
1870 // Handle the sign bits.
1871 APInt SignBit = APInt::getSignBit(BitWidth);
1872 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1874 if (KnownZero.intersects(SignBit)) {
1875 KnownZero |= HighBits; // New bits are known zero.
1876 } else if (KnownOne.intersects(SignBit)) {
1877 KnownOne |= HighBits; // New bits are known one.
1881 case ISD::SIGN_EXTEND_INREG: {
1882 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1883 unsigned EBits = EVT.getScalarType().getSizeInBits();
1885 // Sign extension. Compute the demanded bits in the result that are not
1886 // present in the input.
1887 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits);
1889 APInt InSignBit = APInt::getSignBit(EBits);
1890 APInt InputDemandedBits = APInt::getLowBitsSet(BitWidth, EBits);
1892 // If the sign extended bits are demanded, we know that the sign
1894 InSignBit = InSignBit.zext(BitWidth);
1895 if (NewBits.getBoolValue())
1896 InputDemandedBits |= InSignBit;
1898 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1899 KnownOne &= InputDemandedBits;
1900 KnownZero &= InputDemandedBits;
1901 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1903 // If the sign bit of the input is known set or clear, then we know the
1904 // top bits of the result.
1905 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1906 KnownZero |= NewBits;
1907 KnownOne &= ~NewBits;
1908 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1909 KnownOne |= NewBits;
1910 KnownZero &= ~NewBits;
1911 } else { // Input sign bit unknown
1912 KnownZero &= ~NewBits;
1913 KnownOne &= ~NewBits;
1918 case ISD::CTTZ_ZERO_UNDEF:
1920 case ISD::CTLZ_ZERO_UNDEF:
1922 unsigned LowBits = Log2_32(BitWidth)+1;
1923 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1924 KnownOne.clearAllBits();
1928 LoadSDNode *LD = cast<LoadSDNode>(Op);
1929 if (ISD::isZEXTLoad(Op.getNode())) {
1930 EVT VT = LD->getMemoryVT();
1931 unsigned MemBits = VT.getScalarType().getSizeInBits();
1932 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits);
1933 } else if (const MDNode *Ranges = LD->getRanges()) {
1934 computeMaskedBitsLoad(*Ranges, KnownZero);
1938 case ISD::ZERO_EXTEND: {
1939 EVT InVT = Op.getOperand(0).getValueType();
1940 unsigned InBits = InVT.getScalarType().getSizeInBits();
1941 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
1942 KnownZero = KnownZero.trunc(InBits);
1943 KnownOne = KnownOne.trunc(InBits);
1944 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1945 KnownZero = KnownZero.zext(BitWidth);
1946 KnownOne = KnownOne.zext(BitWidth);
1947 KnownZero |= NewBits;
1950 case ISD::SIGN_EXTEND: {
1951 EVT InVT = Op.getOperand(0).getValueType();
1952 unsigned InBits = InVT.getScalarType().getSizeInBits();
1953 APInt InSignBit = APInt::getSignBit(InBits);
1954 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
1956 KnownZero = KnownZero.trunc(InBits);
1957 KnownOne = KnownOne.trunc(InBits);
1958 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1960 // Note if the sign bit is known to be zero or one.
1961 bool SignBitKnownZero = KnownZero.isNegative();
1962 bool SignBitKnownOne = KnownOne.isNegative();
1963 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1964 "Sign bit can't be known to be both zero and one!");
1966 KnownZero = KnownZero.zext(BitWidth);
1967 KnownOne = KnownOne.zext(BitWidth);
1969 // If the sign bit is known zero or one, the top bits match.
1970 if (SignBitKnownZero)
1971 KnownZero |= NewBits;
1972 else if (SignBitKnownOne)
1973 KnownOne |= NewBits;
1976 case ISD::ANY_EXTEND: {
1977 EVT InVT = Op.getOperand(0).getValueType();
1978 unsigned InBits = InVT.getScalarType().getSizeInBits();
1979 KnownZero = KnownZero.trunc(InBits);
1980 KnownOne = KnownOne.trunc(InBits);
1981 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1982 KnownZero = KnownZero.zext(BitWidth);
1983 KnownOne = KnownOne.zext(BitWidth);
1986 case ISD::TRUNCATE: {
1987 EVT InVT = Op.getOperand(0).getValueType();
1988 unsigned InBits = InVT.getScalarType().getSizeInBits();
1989 KnownZero = KnownZero.zext(InBits);
1990 KnownOne = KnownOne.zext(InBits);
1991 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1992 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1993 KnownZero = KnownZero.trunc(BitWidth);
1994 KnownOne = KnownOne.trunc(BitWidth);
1997 case ISD::AssertZext: {
1998 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1999 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
2000 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2001 KnownZero |= (~InMask);
2002 KnownOne &= (~KnownZero);
2006 // All bits are zero except the low bit.
2007 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
2011 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
2012 // We know that the top bits of C-X are clear if X contains less bits
2013 // than C (i.e. no wrap-around can happen). For example, 20-X is
2014 // positive if we can prove that X is >= 0 and < 16.
2015 if (CLHS->getAPIntValue().isNonNegative()) {
2016 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
2017 // NLZ can't be BitWidth with no sign bit
2018 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
2019 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2021 // If all of the MaskV bits are known to be zero, then we know the
2022 // output top bits are zero, because we now know that the output is
2024 if ((KnownZero2 & MaskV) == MaskV) {
2025 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
2026 // Top bits known zero.
2027 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2);
2035 // Output known-0 bits are known if clear or set in both the low clear bits
2036 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
2037 // low 3 bits clear.
2038 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2039 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
2040 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
2042 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2043 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
2044 KnownZeroOut = std::min(KnownZeroOut,
2045 KnownZero2.countTrailingOnes());
2047 if (Op.getOpcode() == ISD::ADD) {
2048 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
2052 // With ADDE, a carry bit may be added in, so we can only use this
2053 // information if we know (at least) that the low two bits are clear. We
2054 // then return to the caller that the low bit is unknown but that other bits
2056 if (KnownZeroOut >= 2) // ADDE
2057 KnownZero |= APInt::getBitsSet(BitWidth, 1, KnownZeroOut);
2061 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2062 const APInt &RA = Rem->getAPIntValue().abs();
2063 if (RA.isPowerOf2()) {
2064 APInt LowBits = RA - 1;
2065 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
2066 ComputeMaskedBits(Op.getOperand(0), KnownZero2,KnownOne2,Depth+1);
2068 // The low bits of the first operand are unchanged by the srem.
2069 KnownZero = KnownZero2 & LowBits;
2070 KnownOne = KnownOne2 & LowBits;
2072 // If the first operand is non-negative or has all low bits zero, then
2073 // the upper bits are all zero.
2074 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
2075 KnownZero |= ~LowBits;
2077 // If the first operand is negative and not all low bits are zero, then
2078 // the upper bits are all one.
2079 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0))
2080 KnownOne |= ~LowBits;
2081 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2086 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2087 const APInt &RA = Rem->getAPIntValue();
2088 if (RA.isPowerOf2()) {
2089 APInt LowBits = (RA - 1);
2090 KnownZero |= ~LowBits;
2091 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne,Depth+1);
2092 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2097 // Since the result is less than or equal to either operand, any leading
2098 // zero bits in either operand must also exist in the result.
2099 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2100 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2102 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
2103 KnownZero2.countLeadingOnes());
2104 KnownOne.clearAllBits();
2105 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders);
2108 case ISD::FrameIndex:
2109 case ISD::TargetFrameIndex:
2110 if (unsigned Align = InferPtrAlignment(Op)) {
2111 // The low bits are known zero if the pointer is aligned.
2112 KnownZero = APInt::getLowBitsSet(BitWidth, Log2_32(Align));
2118 if (Op.getOpcode() < ISD::BUILTIN_OP_END)
2121 case ISD::INTRINSIC_WO_CHAIN:
2122 case ISD::INTRINSIC_W_CHAIN:
2123 case ISD::INTRINSIC_VOID:
2124 // Allow the target to implement this method for its nodes.
2125 TLI.computeMaskedBitsForTargetNode(Op, KnownZero, KnownOne, *this, Depth);
2130 /// ComputeNumSignBits - Return the number of times the sign bit of the
2131 /// register is replicated into the other bits. We know that at least 1 bit
2132 /// is always equal to the sign bit (itself), but other cases can give us
2133 /// information. For example, immediately after an "SRA X, 2", we know that
2134 /// the top 3 bits are all equal to each other, so we return 3.
2135 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
2136 EVT VT = Op.getValueType();
2137 assert(VT.isInteger() && "Invalid VT!");
2138 unsigned VTBits = VT.getScalarType().getSizeInBits();
2140 unsigned FirstAnswer = 1;
2143 return 1; // Limit search depth.
2145 switch (Op.getOpcode()) {
2147 case ISD::AssertSext:
2148 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2149 return VTBits-Tmp+1;
2150 case ISD::AssertZext:
2151 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2154 case ISD::Constant: {
2155 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2156 return Val.getNumSignBits();
2159 case ISD::SIGN_EXTEND:
2160 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
2161 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2163 case ISD::SIGN_EXTEND_INREG:
2164 // Max of the input and what this extends.
2166 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits();
2169 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2170 return std::max(Tmp, Tmp2);
2173 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2174 // SRA X, C -> adds C sign bits.
2175 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2176 Tmp += C->getZExtValue();
2177 if (Tmp > VTBits) Tmp = VTBits;
2181 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2182 // shl destroys sign bits.
2183 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2184 if (C->getZExtValue() >= VTBits || // Bad shift.
2185 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
2186 return Tmp - C->getZExtValue();
2191 case ISD::XOR: // NOT is handled here.
2192 // Logical binary ops preserve the number of sign bits at the worst.
2193 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2195 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2196 FirstAnswer = std::min(Tmp, Tmp2);
2197 // We computed what we know about the sign bits as our first
2198 // answer. Now proceed to the generic code that uses
2199 // ComputeMaskedBits, and pick whichever answer is better.
2204 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2205 if (Tmp == 1) return 1; // Early out.
2206 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2207 return std::min(Tmp, Tmp2);
2215 if (Op.getResNo() != 1)
2217 // The boolean result conforms to getBooleanContents. Fall through.
2219 // If setcc returns 0/-1, all bits are sign bits.
2220 if (TLI.getBooleanContents(Op.getValueType().isVector()) ==
2221 TargetLowering::ZeroOrNegativeOneBooleanContent)
2226 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2227 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2229 // Handle rotate right by N like a rotate left by 32-N.
2230 if (Op.getOpcode() == ISD::ROTR)
2231 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2233 // If we aren't rotating out all of the known-in sign bits, return the
2234 // number that are left. This handles rotl(sext(x), 1) for example.
2235 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2236 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2240 // Add can have at most one carry bit. Thus we know that the output
2241 // is, at worst, one more bit than the inputs.
2242 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2243 if (Tmp == 1) return 1; // Early out.
2245 // Special case decrementing a value (ADD X, -1):
2246 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2247 if (CRHS->isAllOnesValue()) {
2248 APInt KnownZero, KnownOne;
2249 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2251 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2253 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue())
2256 // If we are subtracting one from a positive number, there is no carry
2257 // out of the result.
2258 if (KnownZero.isNegative())
2262 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2263 if (Tmp2 == 1) return 1;
2264 return std::min(Tmp, Tmp2)-1;
2267 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2268 if (Tmp2 == 1) return 1;
2271 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2272 if (CLHS->isNullValue()) {
2273 APInt KnownZero, KnownOne;
2274 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
2275 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2277 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue())
2280 // If the input is known to be positive (the sign bit is known clear),
2281 // the output of the NEG has the same number of sign bits as the input.
2282 if (KnownZero.isNegative())
2285 // Otherwise, we treat this like a SUB.
2288 // Sub can have at most one carry bit. Thus we know that the output
2289 // is, at worst, one more bit than the inputs.
2290 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2291 if (Tmp == 1) return 1; // Early out.
2292 return std::min(Tmp, Tmp2)-1;
2294 // FIXME: it's tricky to do anything useful for this, but it is an important
2295 // case for targets like X86.
2299 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2300 if (LoadSDNode *LD = dyn_cast<LoadSDNode>(Op)) {
2301 unsigned ExtType = LD->getExtensionType();
2304 case ISD::SEXTLOAD: // '17' bits known
2305 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2306 return VTBits-Tmp+1;
2307 case ISD::ZEXTLOAD: // '16' bits known
2308 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2313 // Allow the target to implement this method for its nodes.
2314 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2315 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2316 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2317 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2318 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2319 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2322 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2323 // use this information.
2324 APInt KnownZero, KnownOne;
2325 ComputeMaskedBits(Op, KnownZero, KnownOne, Depth);
2328 if (KnownZero.isNegative()) { // sign bit is 0
2330 } else if (KnownOne.isNegative()) { // sign bit is 1;
2337 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2338 // the number of identical bits in the top of the input value.
2340 Mask <<= Mask.getBitWidth()-VTBits;
2341 // Return # leading zeros. We use 'min' here in case Val was zero before
2342 // shifting. We don't want to return '64' as for an i32 "0".
2343 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2346 /// isBaseWithConstantOffset - Return true if the specified operand is an
2347 /// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an
2348 /// ISD::OR with a ConstantSDNode that is guaranteed to have the same
2349 /// semantics as an ADD. This handles the equivalence:
2350 /// X|Cst == X+Cst iff X&Cst = 0.
2351 bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const {
2352 if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) ||
2353 !isa<ConstantSDNode>(Op.getOperand(1)))
2356 if (Op.getOpcode() == ISD::OR &&
2357 !MaskedValueIsZero(Op.getOperand(0),
2358 cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue()))
2365 bool SelectionDAG::isKnownNeverNaN(SDValue Op) const {
2366 // If we're told that NaNs won't happen, assume they won't.
2367 if (getTarget().Options.NoNaNsFPMath)
2370 // If the value is a constant, we can obviously see if it is a NaN or not.
2371 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2372 return !C->getValueAPF().isNaN();
2374 // TODO: Recognize more cases here.
2379 bool SelectionDAG::isKnownNeverZero(SDValue Op) const {
2380 // If the value is a constant, we can obviously see if it is a zero or not.
2381 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2382 return !C->isZero();
2384 // TODO: Recognize more cases here.
2385 switch (Op.getOpcode()) {
2388 if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2389 return !C->isNullValue();
2396 bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const {
2397 // Check the obvious case.
2398 if (A == B) return true;
2400 // For for negative and positive zero.
2401 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A))
2402 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B))
2403 if (CA->isZero() && CB->isZero()) return true;
2405 // Otherwise they may not be equal.
2409 /// getNode - Gets or creates the specified node.
2411 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) {
2412 FoldingSetNodeID ID;
2413 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2415 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2416 return SDValue(E, 0);
2418 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT));
2419 CSEMap.InsertNode(N, IP);
2421 AllNodes.push_back(N);
2425 return SDValue(N, 0);
2428 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
2429 EVT VT, SDValue Operand) {
2430 // Constant fold unary operations with an integer constant operand.
2431 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2432 const APInt &Val = C->getAPIntValue();
2435 case ISD::SIGN_EXTEND:
2436 return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), VT);
2437 case ISD::ANY_EXTEND:
2438 case ISD::ZERO_EXTEND:
2440 return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), VT);
2441 case ISD::UINT_TO_FP:
2442 case ISD::SINT_TO_FP: {
2443 APFloat apf(APInt::getNullValue(VT.getSizeInBits()));
2444 (void)apf.convertFromAPInt(Val,
2445 Opcode==ISD::SINT_TO_FP,
2446 APFloat::rmNearestTiesToEven);
2447 return getConstantFP(apf, VT);
2450 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2451 return getConstantFP(APFloat(Val), VT);
2452 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2453 return getConstantFP(APFloat(Val), VT);
2456 return getConstant(Val.byteSwap(), VT);
2458 return getConstant(Val.countPopulation(), VT);
2460 case ISD::CTLZ_ZERO_UNDEF:
2461 return getConstant(Val.countLeadingZeros(), VT);
2463 case ISD::CTTZ_ZERO_UNDEF:
2464 return getConstant(Val.countTrailingZeros(), VT);
2468 // Constant fold unary operations with a floating point constant operand.
2469 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2470 APFloat V = C->getValueAPF(); // make copy
2474 return getConstantFP(V, VT);
2477 return getConstantFP(V, VT);
2479 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardPositive);
2480 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2481 return getConstantFP(V, VT);
2485 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardZero);
2486 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2487 return getConstantFP(V, VT);
2491 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardNegative);
2492 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2493 return getConstantFP(V, VT);
2496 case ISD::FP_EXTEND: {
2498 // This can return overflow, underflow, or inexact; we don't care.
2499 // FIXME need to be more flexible about rounding mode.
2500 (void)V.convert(*EVTToAPFloatSemantics(VT),
2501 APFloat::rmNearestTiesToEven, &ignored);
2502 return getConstantFP(V, VT);
2504 case ISD::FP_TO_SINT:
2505 case ISD::FP_TO_UINT: {
2508 assert(integerPartWidth >= 64);
2509 // FIXME need to be more flexible about rounding mode.
2510 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2511 Opcode==ISD::FP_TO_SINT,
2512 APFloat::rmTowardZero, &ignored);
2513 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2515 APInt api(VT.getSizeInBits(), x);
2516 return getConstant(api, VT);
2519 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2520 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2521 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2522 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2527 unsigned OpOpcode = Operand.getNode()->getOpcode();
2529 case ISD::TokenFactor:
2530 case ISD::MERGE_VALUES:
2531 case ISD::CONCAT_VECTORS:
2532 return Operand; // Factor, merge or concat of one node? No need.
2533 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
2534 case ISD::FP_EXTEND:
2535 assert(VT.isFloatingPoint() &&
2536 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2537 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2538 assert((!VT.isVector() ||
2539 VT.getVectorNumElements() ==
2540 Operand.getValueType().getVectorNumElements()) &&
2541 "Vector element count mismatch!");
2542 if (Operand.getOpcode() == ISD::UNDEF)
2543 return getUNDEF(VT);
2545 case ISD::SIGN_EXTEND:
2546 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2547 "Invalid SIGN_EXTEND!");
2548 if (Operand.getValueType() == VT) return Operand; // noop extension
2549 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2550 "Invalid sext node, dst < src!");
2551 assert((!VT.isVector() ||
2552 VT.getVectorNumElements() ==
2553 Operand.getValueType().getVectorNumElements()) &&
2554 "Vector element count mismatch!");
2555 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2556 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2557 else if (OpOpcode == ISD::UNDEF)
2558 // sext(undef) = 0, because the top bits will all be the same.
2559 return getConstant(0, VT);
2561 case ISD::ZERO_EXTEND:
2562 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2563 "Invalid ZERO_EXTEND!");
2564 if (Operand.getValueType() == VT) return Operand; // noop extension
2565 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2566 "Invalid zext node, dst < src!");
2567 assert((!VT.isVector() ||
2568 VT.getVectorNumElements() ==
2569 Operand.getValueType().getVectorNumElements()) &&
2570 "Vector element count mismatch!");
2571 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2572 return getNode(ISD::ZERO_EXTEND, DL, VT,
2573 Operand.getNode()->getOperand(0));
2574 else if (OpOpcode == ISD::UNDEF)
2575 // zext(undef) = 0, because the top bits will be zero.
2576 return getConstant(0, VT);
2578 case ISD::ANY_EXTEND:
2579 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2580 "Invalid ANY_EXTEND!");
2581 if (Operand.getValueType() == VT) return Operand; // noop extension
2582 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2583 "Invalid anyext node, dst < src!");
2584 assert((!VT.isVector() ||
2585 VT.getVectorNumElements() ==
2586 Operand.getValueType().getVectorNumElements()) &&
2587 "Vector element count mismatch!");
2589 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2590 OpOpcode == ISD::ANY_EXTEND)
2591 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2592 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2593 else if (OpOpcode == ISD::UNDEF)
2594 return getUNDEF(VT);
2596 // (ext (trunx x)) -> x
2597 if (OpOpcode == ISD::TRUNCATE) {
2598 SDValue OpOp = Operand.getNode()->getOperand(0);
2599 if (OpOp.getValueType() == VT)
2604 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2605 "Invalid TRUNCATE!");
2606 if (Operand.getValueType() == VT) return Operand; // noop truncate
2607 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) &&
2608 "Invalid truncate node, src < dst!");
2609 assert((!VT.isVector() ||
2610 VT.getVectorNumElements() ==
2611 Operand.getValueType().getVectorNumElements()) &&
2612 "Vector element count mismatch!");
2613 if (OpOpcode == ISD::TRUNCATE)
2614 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2615 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2616 OpOpcode == ISD::ANY_EXTEND) {
2617 // If the source is smaller than the dest, we still need an extend.
2618 if (Operand.getNode()->getOperand(0).getValueType().getScalarType()
2619 .bitsLT(VT.getScalarType()))
2620 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2621 if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2622 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2623 return Operand.getNode()->getOperand(0);
2625 if (OpOpcode == ISD::UNDEF)
2626 return getUNDEF(VT);
2629 // Basic sanity checking.
2630 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2631 && "Cannot BITCAST between types of different sizes!");
2632 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2633 if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x)
2634 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0));
2635 if (OpOpcode == ISD::UNDEF)
2636 return getUNDEF(VT);
2638 case ISD::SCALAR_TO_VECTOR:
2639 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2640 (VT.getVectorElementType() == Operand.getValueType() ||
2641 (VT.getVectorElementType().isInteger() &&
2642 Operand.getValueType().isInteger() &&
2643 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
2644 "Illegal SCALAR_TO_VECTOR node!");
2645 if (OpOpcode == ISD::UNDEF)
2646 return getUNDEF(VT);
2647 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2648 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2649 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2650 Operand.getConstantOperandVal(1) == 0 &&
2651 Operand.getOperand(0).getValueType() == VT)
2652 return Operand.getOperand(0);
2655 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
2656 if (getTarget().Options.UnsafeFPMath && OpOpcode == ISD::FSUB)
2657 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
2658 Operand.getNode()->getOperand(0));
2659 if (OpOpcode == ISD::FNEG) // --X -> X
2660 return Operand.getNode()->getOperand(0);
2663 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2664 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
2669 SDVTList VTs = getVTList(VT);
2670 if (VT != MVT::Glue) { // Don't CSE flag producing nodes
2671 FoldingSetNodeID ID;
2672 SDValue Ops[1] = { Operand };
2673 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2675 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2676 return SDValue(E, 0);
2678 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2679 CSEMap.InsertNode(N, IP);
2681 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2684 AllNodes.push_back(N);
2688 return SDValue(N, 0);
2691 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2693 ConstantSDNode *Cst1,
2694 ConstantSDNode *Cst2) {
2695 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
2698 case ISD::ADD: return getConstant(C1 + C2, VT);
2699 case ISD::SUB: return getConstant(C1 - C2, VT);
2700 case ISD::MUL: return getConstant(C1 * C2, VT);
2702 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2705 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2708 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2711 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2713 case ISD::AND: return getConstant(C1 & C2, VT);
2714 case ISD::OR: return getConstant(C1 | C2, VT);
2715 case ISD::XOR: return getConstant(C1 ^ C2, VT);
2716 case ISD::SHL: return getConstant(C1 << C2, VT);
2717 case ISD::SRL: return getConstant(C1.lshr(C2), VT);
2718 case ISD::SRA: return getConstant(C1.ashr(C2), VT);
2719 case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2720 case ISD::ROTR: return getConstant(C1.rotr(C2), VT);
2727 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2728 SDValue N1, SDValue N2) {
2729 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2730 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2733 case ISD::TokenFactor:
2734 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2735 N2.getValueType() == MVT::Other && "Invalid token factor!");
2736 // Fold trivial token factors.
2737 if (N1.getOpcode() == ISD::EntryToken) return N2;
2738 if (N2.getOpcode() == ISD::EntryToken) return N1;
2739 if (N1 == N2) return N1;
2741 case ISD::CONCAT_VECTORS:
2742 // Concat of UNDEFs is UNDEF.
2743 if (N1.getOpcode() == ISD::UNDEF &&
2744 N2.getOpcode() == ISD::UNDEF)
2745 return getUNDEF(VT);
2747 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2748 // one big BUILD_VECTOR.
2749 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2750 N2.getOpcode() == ISD::BUILD_VECTOR) {
2751 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
2752 N1.getNode()->op_end());
2753 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
2754 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2758 assert(VT.isInteger() && "This operator does not apply to FP types!");
2759 assert(N1.getValueType() == N2.getValueType() &&
2760 N1.getValueType() == VT && "Binary operator types must match!");
2761 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2762 // worth handling here.
2763 if (N2C && N2C->isNullValue())
2765 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2772 assert(VT.isInteger() && "This operator does not apply to FP types!");
2773 assert(N1.getValueType() == N2.getValueType() &&
2774 N1.getValueType() == VT && "Binary operator types must match!");
2775 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2776 // it's worth handling here.
2777 if (N2C && N2C->isNullValue())
2787 assert(VT.isInteger() && "This operator does not apply to FP types!");
2788 assert(N1.getValueType() == N2.getValueType() &&
2789 N1.getValueType() == VT && "Binary operator types must match!");
2796 if (getTarget().Options.UnsafeFPMath) {
2797 if (Opcode == ISD::FADD) {
2799 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
2800 if (CFP->getValueAPF().isZero())
2803 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2804 if (CFP->getValueAPF().isZero())
2806 } else if (Opcode == ISD::FSUB) {
2808 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2809 if (CFP->getValueAPF().isZero())
2811 } else if (Opcode == ISD::FMUL) {
2812 ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1);
2815 // If the first operand isn't the constant, try the second
2817 CFP = dyn_cast<ConstantFPSDNode>(N2);
2824 return SDValue(CFP,0);
2826 if (CFP->isExactlyValue(1.0))
2831 assert(VT.isFloatingPoint() && "This operator only applies to FP types!");
2832 assert(N1.getValueType() == N2.getValueType() &&
2833 N1.getValueType() == VT && "Binary operator types must match!");
2835 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2836 assert(N1.getValueType() == VT &&
2837 N1.getValueType().isFloatingPoint() &&
2838 N2.getValueType().isFloatingPoint() &&
2839 "Invalid FCOPYSIGN!");
2846 assert(VT == N1.getValueType() &&
2847 "Shift operators return type must be the same as their first arg");
2848 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2849 "Shifts only work on integers");
2850 // Verify that the shift amount VT is bit enough to hold valid shift
2851 // amounts. This catches things like trying to shift an i1024 value by an
2852 // i8, which is easy to fall into in generic code that uses
2853 // TLI.getShiftAmount().
2854 assert(N2.getValueType().getSizeInBits() >=
2855 Log2_32_Ceil(N1.getValueType().getSizeInBits()) &&
2856 "Invalid use of small shift amount with oversized value!");
2858 // Always fold shifts of i1 values so the code generator doesn't need to
2859 // handle them. Since we know the size of the shift has to be less than the
2860 // size of the value, the shift/rotate count is guaranteed to be zero.
2863 if (N2C && N2C->isNullValue())
2866 case ISD::FP_ROUND_INREG: {
2867 EVT EVT = cast<VTSDNode>(N2)->getVT();
2868 assert(VT == N1.getValueType() && "Not an inreg round!");
2869 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2870 "Cannot FP_ROUND_INREG integer types");
2871 assert(EVT.isVector() == VT.isVector() &&
2872 "FP_ROUND_INREG type should be vector iff the operand "
2874 assert((!EVT.isVector() ||
2875 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2876 "Vector element counts must match in FP_ROUND_INREG");
2877 assert(EVT.bitsLE(VT) && "Not rounding down!");
2879 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2883 assert(VT.isFloatingPoint() &&
2884 N1.getValueType().isFloatingPoint() &&
2885 VT.bitsLE(N1.getValueType()) &&
2886 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2887 if (N1.getValueType() == VT) return N1; // noop conversion.
2889 case ISD::AssertSext:
2890 case ISD::AssertZext: {
2891 EVT EVT = cast<VTSDNode>(N2)->getVT();
2892 assert(VT == N1.getValueType() && "Not an inreg extend!");
2893 assert(VT.isInteger() && EVT.isInteger() &&
2894 "Cannot *_EXTEND_INREG FP types");
2895 assert(!EVT.isVector() &&
2896 "AssertSExt/AssertZExt type should be the vector element type "
2897 "rather than the vector type!");
2898 assert(EVT.bitsLE(VT) && "Not extending!");
2899 if (VT == EVT) return N1; // noop assertion.
2902 case ISD::SIGN_EXTEND_INREG: {
2903 EVT EVT = cast<VTSDNode>(N2)->getVT();
2904 assert(VT == N1.getValueType() && "Not an inreg extend!");
2905 assert(VT.isInteger() && EVT.isInteger() &&
2906 "Cannot *_EXTEND_INREG FP types");
2907 assert(EVT.isVector() == VT.isVector() &&
2908 "SIGN_EXTEND_INREG type should be vector iff the operand "
2910 assert((!EVT.isVector() ||
2911 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2912 "Vector element counts must match in SIGN_EXTEND_INREG");
2913 assert(EVT.bitsLE(VT) && "Not extending!");
2914 if (EVT == VT) return N1; // Not actually extending
2917 APInt Val = N1C->getAPIntValue();
2918 unsigned FromBits = EVT.getScalarType().getSizeInBits();
2919 Val <<= Val.getBitWidth()-FromBits;
2920 Val = Val.ashr(Val.getBitWidth()-FromBits);
2921 return getConstant(Val, VT);
2925 case ISD::EXTRACT_VECTOR_ELT:
2926 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2927 if (N1.getOpcode() == ISD::UNDEF)
2928 return getUNDEF(VT);
2930 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2931 // expanding copies of large vectors from registers.
2933 N1.getOpcode() == ISD::CONCAT_VECTORS &&
2934 N1.getNumOperands() > 0) {
2936 N1.getOperand(0).getValueType().getVectorNumElements();
2937 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
2938 N1.getOperand(N2C->getZExtValue() / Factor),
2939 getConstant(N2C->getZExtValue() % Factor,
2940 N2.getValueType()));
2943 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2944 // expanding large vector constants.
2945 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
2946 SDValue Elt = N1.getOperand(N2C->getZExtValue());
2948 if (VT != Elt.getValueType())
2949 // If the vector element type is not legal, the BUILD_VECTOR operands
2950 // are promoted and implicitly truncated, and the result implicitly
2951 // extended. Make that explicit here.
2952 Elt = getAnyExtOrTrunc(Elt, DL, VT);
2957 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2958 // operations are lowered to scalars.
2959 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2960 // If the indices are the same, return the inserted element else
2961 // if the indices are known different, extract the element from
2962 // the original vector.
2963 SDValue N1Op2 = N1.getOperand(2);
2964 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode());
2966 if (N1Op2C && N2C) {
2967 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) {
2968 if (VT == N1.getOperand(1).getValueType())
2969 return N1.getOperand(1);
2971 return getSExtOrTrunc(N1.getOperand(1), DL, VT);
2974 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
2978 case ISD::EXTRACT_ELEMENT:
2979 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
2980 assert(!N1.getValueType().isVector() && !VT.isVector() &&
2981 (N1.getValueType().isInteger() == VT.isInteger()) &&
2982 N1.getValueType() != VT &&
2983 "Wrong types for EXTRACT_ELEMENT!");
2985 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2986 // 64-bit integers into 32-bit parts. Instead of building the extract of
2987 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2988 if (N1.getOpcode() == ISD::BUILD_PAIR)
2989 return N1.getOperand(N2C->getZExtValue());
2991 // EXTRACT_ELEMENT of a constant int is also very common.
2992 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2993 unsigned ElementSize = VT.getSizeInBits();
2994 unsigned Shift = ElementSize * N2C->getZExtValue();
2995 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2996 return getConstant(ShiftedVal.trunc(ElementSize), VT);
2999 case ISD::EXTRACT_SUBVECTOR: {
3001 if (VT.isSimple() && N1.getValueType().isSimple()) {
3002 assert(VT.isVector() && N1.getValueType().isVector() &&
3003 "Extract subvector VTs must be a vectors!");
3004 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() &&
3005 "Extract subvector VTs must have the same element type!");
3006 assert(VT.getSimpleVT() <= N1.getValueType().getSimpleVT() &&
3007 "Extract subvector must be from larger vector to smaller vector!");
3009 if (isa<ConstantSDNode>(Index.getNode())) {
3010 assert((VT.getVectorNumElements() +
3011 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
3012 <= N1.getValueType().getVectorNumElements())
3013 && "Extract subvector overflow!");
3016 // Trivial extraction.
3017 if (VT.getSimpleVT() == N1.getValueType().getSimpleVT())
3026 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
3027 if (SV.getNode()) return SV;
3028 } else { // Cannonicalize constant to RHS if commutative
3029 if (isCommutativeBinOp(Opcode)) {
3030 std::swap(N1C, N2C);
3036 // Constant fold FP operations.
3037 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
3038 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
3040 if (!N2CFP && isCommutativeBinOp(Opcode)) {
3041 // Cannonicalize constant to RHS if commutative
3042 std::swap(N1CFP, N2CFP);
3045 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
3046 APFloat::opStatus s;
3049 s = V1.add(V2, APFloat::rmNearestTiesToEven);
3050 if (s != APFloat::opInvalidOp)
3051 return getConstantFP(V1, VT);
3054 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
3055 if (s!=APFloat::opInvalidOp)
3056 return getConstantFP(V1, VT);
3059 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
3060 if (s!=APFloat::opInvalidOp)
3061 return getConstantFP(V1, VT);
3064 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
3065 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
3066 return getConstantFP(V1, VT);
3069 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
3070 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
3071 return getConstantFP(V1, VT);
3073 case ISD::FCOPYSIGN:
3075 return getConstantFP(V1, VT);
3080 if (Opcode == ISD::FP_ROUND) {
3081 APFloat V = N1CFP->getValueAPF(); // make copy
3083 // This can return overflow, underflow, or inexact; we don't care.
3084 // FIXME need to be more flexible about rounding mode.
3085 (void)V.convert(*EVTToAPFloatSemantics(VT),
3086 APFloat::rmNearestTiesToEven, &ignored);
3087 return getConstantFP(V, VT);
3091 // Canonicalize an UNDEF to the RHS, even over a constant.
3092 if (N1.getOpcode() == ISD::UNDEF) {
3093 if (isCommutativeBinOp(Opcode)) {
3097 case ISD::FP_ROUND_INREG:
3098 case ISD::SIGN_EXTEND_INREG:
3104 return N1; // fold op(undef, arg2) -> undef
3112 return getConstant(0, VT); // fold op(undef, arg2) -> 0
3113 // For vectors, we can't easily build an all zero vector, just return
3120 // Fold a bunch of operators when the RHS is undef.
3121 if (N2.getOpcode() == ISD::UNDEF) {
3124 if (N1.getOpcode() == ISD::UNDEF)
3125 // Handle undef ^ undef -> 0 special case. This is a common
3127 return getConstant(0, VT);
3137 return N2; // fold op(arg1, undef) -> undef
3143 if (getTarget().Options.UnsafeFPMath)
3151 return getConstant(0, VT); // fold op(arg1, undef) -> 0
3152 // For vectors, we can't easily build an all zero vector, just return
3157 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
3158 // For vectors, we can't easily build an all one vector, just return
3166 // Memoize this node if possible.
3168 SDVTList VTs = getVTList(VT);
3169 if (VT != MVT::Glue) {
3170 SDValue Ops[] = { N1, N2 };
3171 FoldingSetNodeID ID;
3172 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
3174 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3175 return SDValue(E, 0);
3177 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
3178 CSEMap.InsertNode(N, IP);
3180 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
3183 AllNodes.push_back(N);
3187 return SDValue(N, 0);
3190 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3191 SDValue N1, SDValue N2, SDValue N3) {
3192 // Perform various simplifications.
3193 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
3195 case ISD::CONCAT_VECTORS:
3196 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
3197 // one big BUILD_VECTOR.
3198 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
3199 N2.getOpcode() == ISD::BUILD_VECTOR &&
3200 N3.getOpcode() == ISD::BUILD_VECTOR) {
3201 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
3202 N1.getNode()->op_end());
3203 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
3204 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end());
3205 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
3209 // Use FoldSetCC to simplify SETCC's.
3210 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
3211 if (Simp.getNode()) return Simp;
3216 if (N1C->getZExtValue())
3217 return N2; // select true, X, Y -> X
3218 return N3; // select false, X, Y -> Y
3221 if (N2 == N3) return N2; // select C, X, X -> X
3223 case ISD::VECTOR_SHUFFLE:
3224 llvm_unreachable("should use getVectorShuffle constructor!");
3225 case ISD::INSERT_SUBVECTOR: {
3227 if (VT.isSimple() && N1.getValueType().isSimple()
3228 && N2.getValueType().isSimple()) {
3229 assert(VT.isVector() && N1.getValueType().isVector() &&
3230 N2.getValueType().isVector() &&
3231 "Insert subvector VTs must be a vectors");
3232 assert(VT == N1.getValueType() &&
3233 "Dest and insert subvector source types must match!");
3234 assert(N2.getValueType().getSimpleVT() <= N1.getValueType().getSimpleVT() &&
3235 "Insert subvector must be from smaller vector to larger vector!");
3236 if (isa<ConstantSDNode>(Index.getNode())) {
3237 assert((N2.getValueType().getVectorNumElements() +
3238 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
3239 <= VT.getVectorNumElements())
3240 && "Insert subvector overflow!");
3243 // Trivial insertion.
3244 if (VT.getSimpleVT() == N2.getValueType().getSimpleVT())
3250 // Fold bit_convert nodes from a type to themselves.
3251 if (N1.getValueType() == VT)
3256 // Memoize node if it doesn't produce a flag.
3258 SDVTList VTs = getVTList(VT);
3259 if (VT != MVT::Glue) {
3260 SDValue Ops[] = { N1, N2, N3 };
3261 FoldingSetNodeID ID;
3262 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3264 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3265 return SDValue(E, 0);
3267 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3268 CSEMap.InsertNode(N, IP);
3270 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3273 AllNodes.push_back(N);
3277 return SDValue(N, 0);
3280 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3281 SDValue N1, SDValue N2, SDValue N3,
3283 SDValue Ops[] = { N1, N2, N3, N4 };
3284 return getNode(Opcode, DL, VT, Ops, 4);
3287 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3288 SDValue N1, SDValue N2, SDValue N3,
3289 SDValue N4, SDValue N5) {
3290 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3291 return getNode(Opcode, DL, VT, Ops, 5);
3294 /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
3295 /// the incoming stack arguments to be loaded from the stack.
3296 SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) {
3297 SmallVector<SDValue, 8> ArgChains;
3299 // Include the original chain at the beginning of the list. When this is
3300 // used by target LowerCall hooks, this helps legalize find the
3301 // CALLSEQ_BEGIN node.
3302 ArgChains.push_back(Chain);
3304 // Add a chain value for each stack argument.
3305 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
3306 UE = getEntryNode().getNode()->use_end(); U != UE; ++U)
3307 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
3308 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
3309 if (FI->getIndex() < 0)
3310 ArgChains.push_back(SDValue(L, 1));
3312 // Build a tokenfactor for all the chains.
3313 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other,
3314 &ArgChains[0], ArgChains.size());
3317 /// SplatByte - Distribute ByteVal over NumBits bits.
3318 static APInt SplatByte(unsigned NumBits, uint8_t ByteVal) {
3319 APInt Val = APInt(NumBits, ByteVal);
3321 for (unsigned i = NumBits; i > 8; i >>= 1) {
3322 Val = (Val << Shift) | Val;
3328 /// getMemsetValue - Vectorized representation of the memset value
3330 static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
3332 assert(Value.getOpcode() != ISD::UNDEF);
3334 unsigned NumBits = VT.getScalarType().getSizeInBits();
3335 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
3336 APInt Val = SplatByte(NumBits, C->getZExtValue() & 255);
3338 return DAG.getConstant(Val, VT);
3339 return DAG.getConstantFP(APFloat(Val), VT);
3342 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value);
3344 // Use a multiplication with 0x010101... to extend the input to the
3346 APInt Magic = SplatByte(NumBits, 0x01);
3347 Value = DAG.getNode(ISD::MUL, dl, VT, Value, DAG.getConstant(Magic, VT));
3353 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
3354 /// used when a memcpy is turned into a memset when the source is a constant
3356 static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG,
3357 const TargetLowering &TLI, StringRef Str) {
3358 // Handle vector with all elements zero.
3361 return DAG.getConstant(0, VT);
3362 else if (VT == MVT::f32 || VT == MVT::f64)
3363 return DAG.getConstantFP(0.0, VT);
3364 else if (VT.isVector()) {
3365 unsigned NumElts = VT.getVectorNumElements();
3366 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
3367 return DAG.getNode(ISD::BITCAST, dl, VT,
3368 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(),
3371 llvm_unreachable("Expected type!");
3374 assert(!VT.isVector() && "Can't handle vector type here!");
3375 unsigned NumVTBytes = VT.getSizeInBits() / 8;
3376 unsigned NumBytes = std::min(NumVTBytes, unsigned(Str.size()));
3378 APInt Val(NumBytes*8, 0);
3379 if (TLI.isLittleEndian()) {
3380 for (unsigned i = 0; i != NumBytes; ++i)
3381 Val |= (uint64_t)(unsigned char)Str[i] << i*8;
3383 for (unsigned i = 0; i != NumBytes; ++i)
3384 Val |= (uint64_t)(unsigned char)Str[i] << (NumVTBytes-i-1)*8;
3387 // If the "cost" of materializing the integer immediate is 1 or free, then
3388 // it is cost effective to turn the load into the immediate.
3389 if (DAG.getTarget().getScalarTargetTransformInfo()->
3390 getIntImmCost(Val, VT.getTypeForEVT(*DAG.getContext())) < 2)
3391 return DAG.getConstant(Val, VT);
3392 return SDValue(0, 0);
3395 /// getMemBasePlusOffset - Returns base and offset node for the
3397 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
3398 SelectionDAG &DAG) {
3399 EVT VT = Base.getValueType();
3400 return DAG.getNode(ISD::ADD, Base.getDebugLoc(),
3401 VT, Base, DAG.getConstant(Offset, VT));
3404 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
3406 static bool isMemSrcFromString(SDValue Src, StringRef &Str) {
3407 unsigned SrcDelta = 0;
3408 GlobalAddressSDNode *G = NULL;
3409 if (Src.getOpcode() == ISD::GlobalAddress)
3410 G = cast<GlobalAddressSDNode>(Src);
3411 else if (Src.getOpcode() == ISD::ADD &&
3412 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
3413 Src.getOperand(1).getOpcode() == ISD::Constant) {
3414 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
3415 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
3420 return getConstantStringInfo(G->getGlobal(), Str, SrcDelta, false);
3423 /// FindOptimalMemOpLowering - Determines the optimial series memory ops
3424 /// to replace the memset / memcpy. Return true if the number of memory ops
3425 /// is below the threshold. It returns the types of the sequence of
3426 /// memory ops to perform memset / memcpy by reference.
3427 static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps,
3428 unsigned Limit, uint64_t Size,
3429 unsigned DstAlign, unsigned SrcAlign,
3435 const TargetLowering &TLI) {
3436 assert((SrcAlign == 0 || SrcAlign >= DstAlign) &&
3437 "Expecting memcpy / memset source to meet alignment requirement!");
3438 // If 'SrcAlign' is zero, that means the memory operation does not need to
3439 // load the value, i.e. memset or memcpy from constant string. Otherwise,
3440 // it's the inferred alignment of the source. 'DstAlign', on the other hand,
3441 // is the specified alignment of the memory operation. If it is zero, that
3442 // means it's possible to change the alignment of the destination.
3443 // 'MemcpyStrSrc' indicates whether the memcpy source is constant so it does
3444 // not need to be loaded.
3445 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign,
3446 IsMemset, ZeroMemset, MemcpyStrSrc,
3447 DAG.getMachineFunction());
3449 if (VT == MVT::Other) {
3450 if (DstAlign >= TLI.getDataLayout()->getPointerPrefAlignment() ||
3451 TLI.allowsUnalignedMemoryAccesses(VT)) {
3452 VT = TLI.getPointerTy();
3454 switch (DstAlign & 7) {
3455 case 0: VT = MVT::i64; break;
3456 case 4: VT = MVT::i32; break;
3457 case 2: VT = MVT::i16; break;
3458 default: VT = MVT::i8; break;
3463 while (!TLI.isTypeLegal(LVT))
3464 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1);
3465 assert(LVT.isInteger());
3471 unsigned NumMemOps = 0;
3473 unsigned VTSize = VT.getSizeInBits() / 8;
3474 while (VTSize > Size) {
3475 // For now, only use non-vector load / store's for the left-over pieces.
3480 if (VT.isVector() || VT.isFloatingPoint()) {
3481 NewVT = (VT.getSizeInBits() > 64) ? MVT::i64 : MVT::i32;
3482 if (TLI.isOperationLegalOrCustom(ISD::STORE, NewVT) &&
3483 TLI.isSafeMemOpType(NewVT.getSimpleVT()))
3485 else if (NewVT == MVT::i64 &&
3486 TLI.isOperationLegalOrCustom(ISD::STORE, MVT::f64) &&
3487 TLI.isSafeMemOpType(MVT::f64)) {
3488 // i64 is usually not legal on 32-bit targets, but f64 may be.
3496 NewVT = (MVT::SimpleValueType)(NewVT.getSimpleVT().SimpleTy - 1);
3497 if (NewVT == MVT::i8)
3499 } while (!TLI.isSafeMemOpType(NewVT.getSimpleVT()));
3501 NewVTSize = NewVT.getSizeInBits() / 8;
3503 // If the new VT cannot cover all of the remaining bits, then consider
3504 // issuing a (or a pair of) unaligned and overlapping load / store.
3505 // FIXME: Only does this for 64-bit or more since we don't have proper
3506 // cost model for unaligned load / store.
3508 if (NumMemOps && AllowOverlap &&
3509 VTSize >= 8 && NewVTSize < Size &&
3510 TLI.allowsUnalignedMemoryAccesses(VT, &Fast) && Fast)
3518 if (++NumMemOps > Limit)
3521 MemOps.push_back(VT);
3528 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3529 SDValue Chain, SDValue Dst,
3530 SDValue Src, uint64_t Size,
3531 unsigned Align, bool isVol,
3533 MachinePointerInfo DstPtrInfo,
3534 MachinePointerInfo SrcPtrInfo) {
3535 // Turn a memcpy of undef to nop.
3536 if (Src.getOpcode() == ISD::UNDEF)
3539 // Expand memcpy to a series of load and store ops if the size operand falls
3540 // below a certain threshold.
3541 // TODO: In the AlwaysInline case, if the size is big then generate a loop
3542 // rather than maybe a humongous number of loads and stores.
3543 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3544 std::vector<EVT> MemOps;
3545 bool DstAlignCanChange = false;
3546 MachineFunction &MF = DAG.getMachineFunction();
3547 MachineFrameInfo *MFI = MF.getFrameInfo();
3549 MF.getFunction()->getAttributes().
3550 hasAttribute(AttributeSet::FunctionIndex, Attribute::OptimizeForSize);
3551 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3552 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3553 DstAlignCanChange = true;
3554 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3555 if (Align > SrcAlign)
3558 bool CopyFromStr = isMemSrcFromString(Src, Str);
3559 bool isZeroStr = CopyFromStr && Str.empty();
3560 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(OptSize);
3562 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3563 (DstAlignCanChange ? 0 : Align),
3564 (isZeroStr ? 0 : SrcAlign),
3565 false, false, CopyFromStr, true, DAG, TLI))
3568 if (DstAlignCanChange) {
3569 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3570 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
3571 if (NewAlign > Align) {
3572 // Give the stack frame object a larger alignment if needed.
3573 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3574 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3579 SmallVector<SDValue, 8> OutChains;
3580 unsigned NumMemOps = MemOps.size();
3581 uint64_t SrcOff = 0, DstOff = 0;
3582 for (unsigned i = 0; i != NumMemOps; ++i) {
3584 unsigned VTSize = VT.getSizeInBits() / 8;
3585 SDValue Value, Store;
3587 if (VTSize > Size) {
3588 // Issuing an unaligned load / store pair that overlaps with the previous
3589 // pair. Adjust the offset accordingly.
3590 assert(i == NumMemOps-1 && i != 0);
3591 SrcOff -= VTSize - Size;
3592 DstOff -= VTSize - Size;
3596 (isZeroStr || (VT.isInteger() && !VT.isVector()))) {
3597 // It's unlikely a store of a vector immediate can be done in a single
3598 // instruction. It would require a load from a constantpool first.
3599 // We only handle zero vectors here.
3600 // FIXME: Handle other cases where store of vector immediate is done in
3601 // a single instruction.
3602 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str.substr(SrcOff));
3603 if (Value.getNode())
3604 Store = DAG.getStore(Chain, dl, Value,
3605 getMemBasePlusOffset(Dst, DstOff, DAG),
3606 DstPtrInfo.getWithOffset(DstOff), isVol,
3610 if (!Store.getNode()) {
3611 // The type might not be legal for the target. This should only happen
3612 // if the type is smaller than a legal type, as on PPC, so the right
3613 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify
3614 // to Load/Store if NVT==VT.
3615 // FIXME does the case above also need this?
3616 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
3617 assert(NVT.bitsGE(VT));
3618 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain,
3619 getMemBasePlusOffset(Src, SrcOff, DAG),
3620 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false,
3621 MinAlign(SrcAlign, SrcOff));
3622 Store = DAG.getTruncStore(Chain, dl, Value,
3623 getMemBasePlusOffset(Dst, DstOff, DAG),
3624 DstPtrInfo.getWithOffset(DstOff), VT, isVol,
3627 OutChains.push_back(Store);
3633 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3634 &OutChains[0], OutChains.size());
3637 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3638 SDValue Chain, SDValue Dst,
3639 SDValue Src, uint64_t Size,
3640 unsigned Align, bool isVol,
3642 MachinePointerInfo DstPtrInfo,
3643 MachinePointerInfo SrcPtrInfo) {
3644 // Turn a memmove of undef to nop.
3645 if (Src.getOpcode() == ISD::UNDEF)
3648 // Expand memmove to a series of load and store ops if the size operand falls
3649 // below a certain threshold.
3650 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3651 std::vector<EVT> MemOps;
3652 bool DstAlignCanChange = false;
3653 MachineFunction &MF = DAG.getMachineFunction();
3654 MachineFrameInfo *MFI = MF.getFrameInfo();
3655 bool OptSize = MF.getFunction()->getAttributes().
3656 hasAttribute(AttributeSet::FunctionIndex, Attribute::OptimizeForSize);
3657 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3658 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3659 DstAlignCanChange = true;
3660 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3661 if (Align > SrcAlign)
3663 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(OptSize);
3665 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3666 (DstAlignCanChange ? 0 : Align), SrcAlign,
3667 false, false, false, false, DAG, TLI))
3670 if (DstAlignCanChange) {
3671 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3672 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
3673 if (NewAlign > Align) {
3674 // Give the stack frame object a larger alignment if needed.
3675 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3676 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3681 uint64_t SrcOff = 0, DstOff = 0;
3682 SmallVector<SDValue, 8> LoadValues;
3683 SmallVector<SDValue, 8> LoadChains;
3684 SmallVector<SDValue, 8> OutChains;
3685 unsigned NumMemOps = MemOps.size();
3686 for (unsigned i = 0; i < NumMemOps; i++) {
3688 unsigned VTSize = VT.getSizeInBits() / 8;
3689 SDValue Value, Store;
3691 Value = DAG.getLoad(VT, dl, Chain,
3692 getMemBasePlusOffset(Src, SrcOff, DAG),
3693 SrcPtrInfo.getWithOffset(SrcOff), isVol,
3694 false, false, SrcAlign);
3695 LoadValues.push_back(Value);
3696 LoadChains.push_back(Value.getValue(1));
3699 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3700 &LoadChains[0], LoadChains.size());
3702 for (unsigned i = 0; i < NumMemOps; i++) {
3704 unsigned VTSize = VT.getSizeInBits() / 8;
3705 SDValue Value, Store;
3707 Store = DAG.getStore(Chain, dl, LoadValues[i],
3708 getMemBasePlusOffset(Dst, DstOff, DAG),
3709 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align);
3710 OutChains.push_back(Store);
3714 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3715 &OutChains[0], OutChains.size());
3718 static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl,
3719 SDValue Chain, SDValue Dst,
3720 SDValue Src, uint64_t Size,
3721 unsigned Align, bool isVol,
3722 MachinePointerInfo DstPtrInfo) {
3723 // Turn a memset of undef to nop.
3724 if (Src.getOpcode() == ISD::UNDEF)
3727 // Expand memset to a series of load/store ops if the size operand
3728 // falls below a certain threshold.
3729 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3730 std::vector<EVT> MemOps;
3731 bool DstAlignCanChange = false;
3732 MachineFunction &MF = DAG.getMachineFunction();
3733 MachineFrameInfo *MFI = MF.getFrameInfo();
3734 bool OptSize = MF.getFunction()->getAttributes().
3735 hasAttribute(AttributeSet::FunctionIndex, Attribute::OptimizeForSize);
3736 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3737 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3738 DstAlignCanChange = true;
3740 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue();
3741 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(OptSize),
3742 Size, (DstAlignCanChange ? 0 : Align), 0,
3743 true, IsZeroVal, false, true, DAG, TLI))
3746 if (DstAlignCanChange) {
3747 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3748 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
3749 if (NewAlign > Align) {
3750 // Give the stack frame object a larger alignment if needed.
3751 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3752 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3757 SmallVector<SDValue, 8> OutChains;
3758 uint64_t DstOff = 0;
3759 unsigned NumMemOps = MemOps.size();
3761 // Find the largest store and generate the bit pattern for it.
3762 EVT LargestVT = MemOps[0];
3763 for (unsigned i = 1; i < NumMemOps; i++)
3764 if (MemOps[i].bitsGT(LargestVT))
3765 LargestVT = MemOps[i];
3766 SDValue MemSetValue = getMemsetValue(Src, LargestVT, DAG, dl);
3768 for (unsigned i = 0; i < NumMemOps; i++) {
3770 unsigned VTSize = VT.getSizeInBits() / 8;
3771 if (VTSize > Size) {
3772 // Issuing an unaligned load / store pair that overlaps with the previous
3773 // pair. Adjust the offset accordingly.
3774 assert(i == NumMemOps-1 && i != 0);
3775 DstOff -= VTSize - Size;
3778 // If this store is smaller than the largest store see whether we can get
3779 // the smaller value for free with a truncate.
3780 SDValue Value = MemSetValue;
3781 if (VT.bitsLT(LargestVT)) {
3782 if (!LargestVT.isVector() && !VT.isVector() &&
3783 TLI.isTruncateFree(LargestVT, VT))
3784 Value = DAG.getNode(ISD::TRUNCATE, dl, VT, MemSetValue);
3786 Value = getMemsetValue(Src, VT, DAG, dl);
3788 assert(Value.getValueType() == VT && "Value with wrong type.");
3789 SDValue Store = DAG.getStore(Chain, dl, Value,
3790 getMemBasePlusOffset(Dst, DstOff, DAG),
3791 DstPtrInfo.getWithOffset(DstOff),
3792 isVol, false, Align);
3793 OutChains.push_back(Store);
3794 DstOff += VT.getSizeInBits() / 8;
3798 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3799 &OutChains[0], OutChains.size());
3802 SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst,
3803 SDValue Src, SDValue Size,
3804 unsigned Align, bool isVol, bool AlwaysInline,
3805 MachinePointerInfo DstPtrInfo,
3806 MachinePointerInfo SrcPtrInfo) {
3808 // Check to see if we should lower the memcpy to loads and stores first.
3809 // For cases within the target-specified limits, this is the best choice.
3810 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3812 // Memcpy with size zero? Just return the original chain.
3813 if (ConstantSize->isNullValue())
3816 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3817 ConstantSize->getZExtValue(),Align,
3818 isVol, false, DstPtrInfo, SrcPtrInfo);
3819 if (Result.getNode())
3823 // Then check to see if we should lower the memcpy with target-specific
3824 // code. If the target chooses to do this, this is the next best.
3826 TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align,
3827 isVol, AlwaysInline,
3828 DstPtrInfo, SrcPtrInfo);
3829 if (Result.getNode())
3832 // If we really need inline code and the target declined to provide it,
3833 // use a (potentially long) sequence of loads and stores.
3835 assert(ConstantSize && "AlwaysInline requires a constant size!");
3836 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3837 ConstantSize->getZExtValue(), Align, isVol,
3838 true, DstPtrInfo, SrcPtrInfo);
3841 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc
3842 // memcpy is not guaranteed to be safe. libc memcpys aren't required to
3843 // respect volatile, so they may do things like read or write memory
3844 // beyond the given memory regions. But fixing this isn't easy, and most
3845 // people don't care.
3847 // Emit a library call.
3848 TargetLowering::ArgListTy Args;
3849 TargetLowering::ArgListEntry Entry;
3850 Entry.Ty = TLI.getDataLayout()->getIntPtrType(*getContext());
3851 Entry.Node = Dst; Args.push_back(Entry);
3852 Entry.Node = Src; Args.push_back(Entry);
3853 Entry.Node = Size; Args.push_back(Entry);
3854 // FIXME: pass in DebugLoc
3856 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()),
3857 false, false, false, false, 0,
3858 TLI.getLibcallCallingConv(RTLIB::MEMCPY),
3859 /*isTailCall=*/false,
3860 /*doesNotReturn=*/false, /*isReturnValueUsed=*/false,
3861 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY),
3862 TLI.getPointerTy()),
3864 std::pair<SDValue,SDValue> CallResult = TLI.LowerCallTo(CLI);
3866 return CallResult.second;
3869 SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst,
3870 SDValue Src, SDValue Size,
3871 unsigned Align, bool isVol,
3872 MachinePointerInfo DstPtrInfo,
3873 MachinePointerInfo SrcPtrInfo) {
3875 // Check to see if we should lower the memmove to loads and stores first.
3876 // For cases within the target-specified limits, this is the best choice.
3877 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3879 // Memmove with size zero? Just return the original chain.
3880 if (ConstantSize->isNullValue())
3884 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
3885 ConstantSize->getZExtValue(), Align, isVol,
3886 false, DstPtrInfo, SrcPtrInfo);
3887 if (Result.getNode())
3891 // Then check to see if we should lower the memmove with target-specific
3892 // code. If the target chooses to do this, this is the next best.
3894 TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3895 DstPtrInfo, SrcPtrInfo);
3896 if (Result.getNode())
3899 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may
3900 // not be safe. See memcpy above for more details.
3902 // Emit a library call.
3903 TargetLowering::ArgListTy Args;
3904 TargetLowering::ArgListEntry Entry;
3905 Entry.Ty = TLI.getDataLayout()->getIntPtrType(*getContext());
3906 Entry.Node = Dst; Args.push_back(Entry);
3907 Entry.Node = Src; Args.push_back(Entry);
3908 Entry.Node = Size; Args.push_back(Entry);
3909 // FIXME: pass in DebugLoc
3911 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()),
3912 false, false, false, false, 0,
3913 TLI.getLibcallCallingConv(RTLIB::MEMMOVE),
3914 /*isTailCall=*/false,
3915 /*doesNotReturn=*/false, /*isReturnValueUsed=*/false,
3916 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE),
3917 TLI.getPointerTy()),
3919 std::pair<SDValue,SDValue> CallResult = TLI.LowerCallTo(CLI);
3921 return CallResult.second;
3924 SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst,
3925 SDValue Src, SDValue Size,
3926 unsigned Align, bool isVol,
3927 MachinePointerInfo DstPtrInfo) {
3929 // Check to see if we should lower the memset to stores first.
3930 // For cases within the target-specified limits, this is the best choice.
3931 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3933 // Memset with size zero? Just return the original chain.
3934 if (ConstantSize->isNullValue())
3938 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
3939 Align, isVol, DstPtrInfo);
3941 if (Result.getNode())
3945 // Then check to see if we should lower the memset with target-specific
3946 // code. If the target chooses to do this, this is the next best.
3948 TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3950 if (Result.getNode())
3953 // Emit a library call.
3954 Type *IntPtrTy = TLI.getDataLayout()->getIntPtrType(*getContext());
3955 TargetLowering::ArgListTy Args;
3956 TargetLowering::ArgListEntry Entry;
3957 Entry.Node = Dst; Entry.Ty = IntPtrTy;
3958 Args.push_back(Entry);
3959 // Extend or truncate the argument to be an i32 value for the call.
3960 if (Src.getValueType().bitsGT(MVT::i32))
3961 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
3963 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
3965 Entry.Ty = Type::getInt32Ty(*getContext());
3966 Entry.isSExt = true;
3967 Args.push_back(Entry);
3969 Entry.Ty = IntPtrTy;
3970 Entry.isSExt = false;
3971 Args.push_back(Entry);
3972 // FIXME: pass in DebugLoc
3974 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()),
3975 false, false, false, false, 0,
3976 TLI.getLibcallCallingConv(RTLIB::MEMSET),
3977 /*isTailCall=*/false,
3978 /*doesNotReturn*/false, /*isReturnValueUsed=*/false,
3979 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET),
3980 TLI.getPointerTy()),
3982 std::pair<SDValue,SDValue> CallResult = TLI.LowerCallTo(CLI);
3984 return CallResult.second;
3987 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3988 SDValue Chain, SDValue Ptr, SDValue Cmp,
3989 SDValue Swp, MachinePointerInfo PtrInfo,
3991 AtomicOrdering Ordering,
3992 SynchronizationScope SynchScope) {
3993 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3994 Alignment = getEVTAlignment(MemVT);
3996 MachineFunction &MF = getMachineFunction();
3998 // All atomics are load and store, except for ATMOIC_LOAD and ATOMIC_STORE.
3999 // For now, atomics are considered to be volatile always.
4000 // FIXME: Volatile isn't really correct; we should keep track of atomic
4001 // orderings in the memoperand.
4002 unsigned Flags = MachineMemOperand::MOVolatile;
4003 if (Opcode != ISD::ATOMIC_STORE)
4004 Flags |= MachineMemOperand::MOLoad;
4005 if (Opcode != ISD::ATOMIC_LOAD)
4006 Flags |= MachineMemOperand::MOStore;
4008 MachineMemOperand *MMO =
4009 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment);
4011 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO,
4012 Ordering, SynchScope);
4015 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
4017 SDValue Ptr, SDValue Cmp,
4018 SDValue Swp, MachineMemOperand *MMO,
4019 AtomicOrdering Ordering,
4020 SynchronizationScope SynchScope) {
4021 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
4022 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
4024 EVT VT = Cmp.getValueType();
4026 SDVTList VTs = getVTList(VT, MVT::Other);
4027 FoldingSetNodeID ID;
4028 ID.AddInteger(MemVT.getRawBits());
4029 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
4030 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
4031 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4033 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4034 cast<AtomicSDNode>(E)->refineAlignment(MMO);
4035 return SDValue(E, 0);
4037 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
4038 Ptr, Cmp, Swp, MMO, Ordering,
4040 CSEMap.InsertNode(N, IP);
4041 AllNodes.push_back(N);
4042 return SDValue(N, 0);
4045 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
4047 SDValue Ptr, SDValue Val,
4048 const Value* PtrVal,
4050 AtomicOrdering Ordering,
4051 SynchronizationScope SynchScope) {
4052 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4053 Alignment = getEVTAlignment(MemVT);
4055 MachineFunction &MF = getMachineFunction();
4056 // An atomic store does not load. An atomic load does not store.
4057 // (An atomicrmw obviously both loads and stores.)
4058 // For now, atomics are considered to be volatile always, and they are
4060 // FIXME: Volatile isn't really correct; we should keep track of atomic
4061 // orderings in the memoperand.
4062 unsigned Flags = MachineMemOperand::MOVolatile;
4063 if (Opcode != ISD::ATOMIC_STORE)
4064 Flags |= MachineMemOperand::MOLoad;
4065 if (Opcode != ISD::ATOMIC_LOAD)
4066 Flags |= MachineMemOperand::MOStore;
4068 MachineMemOperand *MMO =
4069 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
4070 MemVT.getStoreSize(), Alignment);
4072 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO,
4073 Ordering, SynchScope);
4076 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
4078 SDValue Ptr, SDValue Val,
4079 MachineMemOperand *MMO,
4080 AtomicOrdering Ordering,
4081 SynchronizationScope SynchScope) {
4082 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
4083 Opcode == ISD::ATOMIC_LOAD_SUB ||
4084 Opcode == ISD::ATOMIC_LOAD_AND ||
4085 Opcode == ISD::ATOMIC_LOAD_OR ||
4086 Opcode == ISD::ATOMIC_LOAD_XOR ||
4087 Opcode == ISD::ATOMIC_LOAD_NAND ||
4088 Opcode == ISD::ATOMIC_LOAD_MIN ||
4089 Opcode == ISD::ATOMIC_LOAD_MAX ||
4090 Opcode == ISD::ATOMIC_LOAD_UMIN ||
4091 Opcode == ISD::ATOMIC_LOAD_UMAX ||
4092 Opcode == ISD::ATOMIC_SWAP ||
4093 Opcode == ISD::ATOMIC_STORE) &&
4094 "Invalid Atomic Op");
4096 EVT VT = Val.getValueType();
4098 SDVTList VTs = Opcode == ISD::ATOMIC_STORE ? getVTList(MVT::Other) :
4099 getVTList(VT, MVT::Other);
4100 FoldingSetNodeID ID;
4101 ID.AddInteger(MemVT.getRawBits());
4102 SDValue Ops[] = {Chain, Ptr, Val};
4103 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
4104 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4106 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4107 cast<AtomicSDNode>(E)->refineAlignment(MMO);
4108 return SDValue(E, 0);
4110 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
4112 Ordering, SynchScope);
4113 CSEMap.InsertNode(N, IP);
4114 AllNodes.push_back(N);
4115 return SDValue(N, 0);
4118 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
4119 EVT VT, SDValue Chain,
4121 const Value* PtrVal,
4123 AtomicOrdering Ordering,
4124 SynchronizationScope SynchScope) {
4125 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4126 Alignment = getEVTAlignment(MemVT);
4128 MachineFunction &MF = getMachineFunction();
4129 // An atomic store does not load. An atomic load does not store.
4130 // (An atomicrmw obviously both loads and stores.)
4131 // For now, atomics are considered to be volatile always, and they are
4133 // FIXME: Volatile isn't really correct; we should keep track of atomic
4134 // orderings in the memoperand.
4135 unsigned Flags = MachineMemOperand::MOVolatile;
4136 if (Opcode != ISD::ATOMIC_STORE)
4137 Flags |= MachineMemOperand::MOLoad;
4138 if (Opcode != ISD::ATOMIC_LOAD)
4139 Flags |= MachineMemOperand::MOStore;
4141 MachineMemOperand *MMO =
4142 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
4143 MemVT.getStoreSize(), Alignment);
4145 return getAtomic(Opcode, dl, MemVT, VT, Chain, Ptr, MMO,
4146 Ordering, SynchScope);
4149 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
4150 EVT VT, SDValue Chain,
4152 MachineMemOperand *MMO,
4153 AtomicOrdering Ordering,
4154 SynchronizationScope SynchScope) {
4155 assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op");
4157 SDVTList VTs = getVTList(VT, MVT::Other);
4158 FoldingSetNodeID ID;
4159 ID.AddInteger(MemVT.getRawBits());
4160 SDValue Ops[] = {Chain, Ptr};
4161 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
4162 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4164 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4165 cast<AtomicSDNode>(E)->refineAlignment(MMO);
4166 return SDValue(E, 0);
4168 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
4169 Ptr, MMO, Ordering, SynchScope);
4170 CSEMap.InsertNode(N, IP);
4171 AllNodes.push_back(N);
4172 return SDValue(N, 0);
4175 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
4176 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps,
4181 SmallVector<EVT, 4> VTs;
4182 VTs.reserve(NumOps);
4183 for (unsigned i = 0; i < NumOps; ++i)
4184 VTs.push_back(Ops[i].getValueType());
4185 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps),
4190 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl,
4191 const EVT *VTs, unsigned NumVTs,
4192 const SDValue *Ops, unsigned NumOps,
4193 EVT MemVT, MachinePointerInfo PtrInfo,
4194 unsigned Align, bool Vol,
4195 bool ReadMem, bool WriteMem) {
4196 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps,
4197 MemVT, PtrInfo, Align, Vol,
4202 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
4203 const SDValue *Ops, unsigned NumOps,
4204 EVT MemVT, MachinePointerInfo PtrInfo,
4205 unsigned Align, bool Vol,
4206 bool ReadMem, bool WriteMem) {
4207 if (Align == 0) // Ensure that codegen never sees alignment 0
4208 Align = getEVTAlignment(MemVT);
4210 MachineFunction &MF = getMachineFunction();
4213 Flags |= MachineMemOperand::MOStore;
4215 Flags |= MachineMemOperand::MOLoad;
4217 Flags |= MachineMemOperand::MOVolatile;
4218 MachineMemOperand *MMO =
4219 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Align);
4221 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO);
4225 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
4226 const SDValue *Ops, unsigned NumOps,
4227 EVT MemVT, MachineMemOperand *MMO) {
4228 assert((Opcode == ISD::INTRINSIC_VOID ||
4229 Opcode == ISD::INTRINSIC_W_CHAIN ||
4230 Opcode == ISD::PREFETCH ||
4231 Opcode == ISD::LIFETIME_START ||
4232 Opcode == ISD::LIFETIME_END ||
4233 (Opcode <= INT_MAX &&
4234 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) &&
4235 "Opcode is not a memory-accessing opcode!");
4237 // Memoize the node unless it returns a flag.
4238 MemIntrinsicSDNode *N;
4239 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
4240 FoldingSetNodeID ID;
4241 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4242 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4244 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4245 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO);
4246 return SDValue(E, 0);
4249 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
4251 CSEMap.InsertNode(N, IP);
4253 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
4256 AllNodes.push_back(N);
4257 return SDValue(N, 0);
4260 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4261 /// MachinePointerInfo record from it. This is particularly useful because the
4262 /// code generator has many cases where it doesn't bother passing in a
4263 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4264 static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) {
4265 // If this is FI+Offset, we can model it.
4266 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr))
4267 return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset);
4269 // If this is (FI+Offset1)+Offset2, we can model it.
4270 if (Ptr.getOpcode() != ISD::ADD ||
4271 !isa<ConstantSDNode>(Ptr.getOperand(1)) ||
4272 !isa<FrameIndexSDNode>(Ptr.getOperand(0)))
4273 return MachinePointerInfo();
4275 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
4276 return MachinePointerInfo::getFixedStack(FI, Offset+
4277 cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue());
4280 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4281 /// MachinePointerInfo record from it. This is particularly useful because the
4282 /// code generator has many cases where it doesn't bother passing in a
4283 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4284 static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) {
4285 // If the 'Offset' value isn't a constant, we can't handle this.
4286 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp))
4287 return InferPointerInfo(Ptr, OffsetNode->getSExtValue());
4288 if (OffsetOp.getOpcode() == ISD::UNDEF)
4289 return InferPointerInfo(Ptr);
4290 return MachinePointerInfo();
4295 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4296 EVT VT, DebugLoc dl, SDValue Chain,
4297 SDValue Ptr, SDValue Offset,
4298 MachinePointerInfo PtrInfo, EVT MemVT,
4299 bool isVolatile, bool isNonTemporal, bool isInvariant,
4300 unsigned Alignment, const MDNode *TBAAInfo,
4301 const MDNode *Ranges) {
4302 assert(Chain.getValueType() == MVT::Other &&
4303 "Invalid chain type");
4304 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4305 Alignment = getEVTAlignment(VT);
4307 unsigned Flags = MachineMemOperand::MOLoad;
4309 Flags |= MachineMemOperand::MOVolatile;
4311 Flags |= MachineMemOperand::MONonTemporal;
4313 Flags |= MachineMemOperand::MOInvariant;
4315 // If we don't have a PtrInfo, infer the trivial frame index case to simplify
4318 PtrInfo = InferPointerInfo(Ptr, Offset);
4320 MachineFunction &MF = getMachineFunction();
4321 MachineMemOperand *MMO =
4322 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment,
4324 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO);
4328 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4329 EVT VT, DebugLoc dl, SDValue Chain,
4330 SDValue Ptr, SDValue Offset, EVT MemVT,
4331 MachineMemOperand *MMO) {
4333 ExtType = ISD::NON_EXTLOAD;
4334 } else if (ExtType == ISD::NON_EXTLOAD) {
4335 assert(VT == MemVT && "Non-extending load from different memory type!");
4338 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) &&
4339 "Should only be an extending load, not truncating!");
4340 assert(VT.isInteger() == MemVT.isInteger() &&
4341 "Cannot convert from FP to Int or Int -> FP!");
4342 assert(VT.isVector() == MemVT.isVector() &&
4343 "Cannot use trunc store to convert to or from a vector!");
4344 assert((!VT.isVector() ||
4345 VT.getVectorNumElements() == MemVT.getVectorNumElements()) &&
4346 "Cannot use trunc store to change the number of vector elements!");
4349 bool Indexed = AM != ISD::UNINDEXED;
4350 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
4351 "Unindexed load with an offset!");
4353 SDVTList VTs = Indexed ?
4354 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
4355 SDValue Ops[] = { Chain, Ptr, Offset };
4356 FoldingSetNodeID ID;
4357 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
4358 ID.AddInteger(MemVT.getRawBits());
4359 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(),
4360 MMO->isNonTemporal(),
4361 MMO->isInvariant()));
4362 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4364 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4365 cast<LoadSDNode>(E)->refineAlignment(MMO);
4366 return SDValue(E, 0);
4368 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType,
4370 CSEMap.InsertNode(N, IP);
4371 AllNodes.push_back(N);
4372 return SDValue(N, 0);
4375 SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl,
4376 SDValue Chain, SDValue Ptr,
4377 MachinePointerInfo PtrInfo,
4378 bool isVolatile, bool isNonTemporal,
4379 bool isInvariant, unsigned Alignment,
4380 const MDNode *TBAAInfo,
4381 const MDNode *Ranges) {
4382 SDValue Undef = getUNDEF(Ptr.getValueType());
4383 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
4384 PtrInfo, VT, isVolatile, isNonTemporal, isInvariant, Alignment,
4388 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT,
4389 SDValue Chain, SDValue Ptr,
4390 MachinePointerInfo PtrInfo, EVT MemVT,
4391 bool isVolatile, bool isNonTemporal,
4392 unsigned Alignment, const MDNode *TBAAInfo) {
4393 SDValue Undef = getUNDEF(Ptr.getValueType());
4394 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
4395 PtrInfo, MemVT, isVolatile, isNonTemporal, false, Alignment,
4401 SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base,
4402 SDValue Offset, ISD::MemIndexedMode AM) {
4403 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
4404 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
4405 "Load is already a indexed load!");
4406 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl,
4407 LD->getChain(), Base, Offset, LD->getPointerInfo(),
4408 LD->getMemoryVT(), LD->isVolatile(), LD->isNonTemporal(),
4409 false, LD->getAlignment());
4412 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4413 SDValue Ptr, MachinePointerInfo PtrInfo,
4414 bool isVolatile, bool isNonTemporal,
4415 unsigned Alignment, const MDNode *TBAAInfo) {
4416 assert(Chain.getValueType() == MVT::Other &&
4417 "Invalid chain type");
4418 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4419 Alignment = getEVTAlignment(Val.getValueType());
4421 unsigned Flags = MachineMemOperand::MOStore;
4423 Flags |= MachineMemOperand::MOVolatile;
4425 Flags |= MachineMemOperand::MONonTemporal;
4428 PtrInfo = InferPointerInfo(Ptr);
4430 MachineFunction &MF = getMachineFunction();
4431 MachineMemOperand *MMO =
4432 MF.getMachineMemOperand(PtrInfo, Flags,
4433 Val.getValueType().getStoreSize(), Alignment,
4436 return getStore(Chain, dl, Val, Ptr, MMO);
4439 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4440 SDValue Ptr, MachineMemOperand *MMO) {
4441 assert(Chain.getValueType() == MVT::Other &&
4442 "Invalid chain type");
4443 EVT VT = Val.getValueType();
4444 SDVTList VTs = getVTList(MVT::Other);
4445 SDValue Undef = getUNDEF(Ptr.getValueType());
4446 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4447 FoldingSetNodeID ID;
4448 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4449 ID.AddInteger(VT.getRawBits());
4450 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
4451 MMO->isNonTemporal(), MMO->isInvariant()));
4452 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4454 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4455 cast<StoreSDNode>(E)->refineAlignment(MMO);
4456 return SDValue(E, 0);
4458 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4460 CSEMap.InsertNode(N, IP);
4461 AllNodes.push_back(N);
4462 return SDValue(N, 0);
4465 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4466 SDValue Ptr, MachinePointerInfo PtrInfo,
4467 EVT SVT,bool isVolatile, bool isNonTemporal,
4469 const MDNode *TBAAInfo) {
4470 assert(Chain.getValueType() == MVT::Other &&
4471 "Invalid chain type");
4472 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4473 Alignment = getEVTAlignment(SVT);
4475 unsigned Flags = MachineMemOperand::MOStore;
4477 Flags |= MachineMemOperand::MOVolatile;
4479 Flags |= MachineMemOperand::MONonTemporal;
4482 PtrInfo = InferPointerInfo(Ptr);
4484 MachineFunction &MF = getMachineFunction();
4485 MachineMemOperand *MMO =
4486 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment,
4489 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO);
4492 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4493 SDValue Ptr, EVT SVT,
4494 MachineMemOperand *MMO) {
4495 EVT VT = Val.getValueType();
4497 assert(Chain.getValueType() == MVT::Other &&
4498 "Invalid chain type");
4500 return getStore(Chain, dl, Val, Ptr, MMO);
4502 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) &&
4503 "Should only be a truncating store, not extending!");
4504 assert(VT.isInteger() == SVT.isInteger() &&
4505 "Can't do FP-INT conversion!");
4506 assert(VT.isVector() == SVT.isVector() &&
4507 "Cannot use trunc store to convert to or from a vector!");
4508 assert((!VT.isVector() ||
4509 VT.getVectorNumElements() == SVT.getVectorNumElements()) &&
4510 "Cannot use trunc store to change the number of vector elements!");
4512 SDVTList VTs = getVTList(MVT::Other);
4513 SDValue Undef = getUNDEF(Ptr.getValueType());
4514 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4515 FoldingSetNodeID ID;
4516 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4517 ID.AddInteger(SVT.getRawBits());
4518 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(),
4519 MMO->isNonTemporal(), MMO->isInvariant()));
4520 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4522 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4523 cast<StoreSDNode>(E)->refineAlignment(MMO);
4524 return SDValue(E, 0);
4526 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4528 CSEMap.InsertNode(N, IP);
4529 AllNodes.push_back(N);
4530 return SDValue(N, 0);
4534 SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base,
4535 SDValue Offset, ISD::MemIndexedMode AM) {
4536 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
4537 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
4538 "Store is already a indexed store!");
4539 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
4540 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
4541 FoldingSetNodeID ID;
4542 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4543 ID.AddInteger(ST->getMemoryVT().getRawBits());
4544 ID.AddInteger(ST->getRawSubclassData());
4545 ID.AddInteger(ST->getPointerInfo().getAddrSpace());
4547 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4548 return SDValue(E, 0);
4550 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM,
4551 ST->isTruncatingStore(),
4553 ST->getMemOperand());
4554 CSEMap.InsertNode(N, IP);
4555 AllNodes.push_back(N);
4556 return SDValue(N, 0);
4559 SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl,
4560 SDValue Chain, SDValue Ptr,
4563 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) };
4564 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 4);
4567 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4568 const SDUse *Ops, unsigned NumOps) {
4570 case 0: return getNode(Opcode, DL, VT);
4571 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4572 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4573 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4577 // Copy from an SDUse array into an SDValue array for use with
4578 // the regular getNode logic.
4579 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
4580 return getNode(Opcode, DL, VT, &NewOps[0], NumOps);
4583 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4584 const SDValue *Ops, unsigned NumOps) {
4586 case 0: return getNode(Opcode, DL, VT);
4587 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4588 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4589 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4595 case ISD::SELECT_CC: {
4596 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
4597 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
4598 "LHS and RHS of condition must have same type!");
4599 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4600 "True and False arms of SelectCC must have same type!");
4601 assert(Ops[2].getValueType() == VT &&
4602 "select_cc node must be of same type as true and false value!");
4606 assert(NumOps == 5 && "BR_CC takes 5 operands!");
4607 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4608 "LHS/RHS of comparison should match types!");
4615 SDVTList VTs = getVTList(VT);
4617 if (VT != MVT::Glue) {
4618 FoldingSetNodeID ID;
4619 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
4622 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4623 return SDValue(E, 0);
4625 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4626 CSEMap.InsertNode(N, IP);
4628 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4631 AllNodes.push_back(N);
4635 return SDValue(N, 0);
4638 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4639 const std::vector<EVT> &ResultTys,
4640 const SDValue *Ops, unsigned NumOps) {
4641 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()),
4645 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4646 const EVT *VTs, unsigned NumVTs,
4647 const SDValue *Ops, unsigned NumOps) {
4649 return getNode(Opcode, DL, VTs[0], Ops, NumOps);
4650 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps);
4653 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4654 const SDValue *Ops, unsigned NumOps) {
4655 if (VTList.NumVTs == 1)
4656 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps);
4660 // FIXME: figure out how to safely handle things like
4661 // int foo(int x) { return 1 << (x & 255); }
4662 // int bar() { return foo(256); }
4663 case ISD::SRA_PARTS:
4664 case ISD::SRL_PARTS:
4665 case ISD::SHL_PARTS:
4666 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
4667 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
4668 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4669 else if (N3.getOpcode() == ISD::AND)
4670 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
4671 // If the and is only masking out bits that cannot effect the shift,
4672 // eliminate the and.
4673 unsigned NumBits = VT.getScalarType().getSizeInBits()*2;
4674 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
4675 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4681 // Memoize the node unless it returns a flag.
4683 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
4684 FoldingSetNodeID ID;
4685 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4687 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4688 return SDValue(E, 0);
4691 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4692 } else if (NumOps == 2) {
4693 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4694 } else if (NumOps == 3) {
4695 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4698 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4700 CSEMap.InsertNode(N, IP);
4703 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4704 } else if (NumOps == 2) {
4705 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4706 } else if (NumOps == 3) {
4707 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4710 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4713 AllNodes.push_back(N);
4717 return SDValue(N, 0);
4720 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) {
4721 return getNode(Opcode, DL, VTList, 0, 0);
4724 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4726 SDValue Ops[] = { N1 };
4727 return getNode(Opcode, DL, VTList, Ops, 1);
4730 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4731 SDValue N1, SDValue N2) {
4732 SDValue Ops[] = { N1, N2 };
4733 return getNode(Opcode, DL, VTList, Ops, 2);
4736 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4737 SDValue N1, SDValue N2, SDValue N3) {
4738 SDValue Ops[] = { N1, N2, N3 };
4739 return getNode(Opcode, DL, VTList, Ops, 3);
4742 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4743 SDValue N1, SDValue N2, SDValue N3,
4745 SDValue Ops[] = { N1, N2, N3, N4 };
4746 return getNode(Opcode, DL, VTList, Ops, 4);
4749 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4750 SDValue N1, SDValue N2, SDValue N3,
4751 SDValue N4, SDValue N5) {
4752 SDValue Ops[] = { N1, N2, N3, N4, N5 };
4753 return getNode(Opcode, DL, VTList, Ops, 5);
4756 SDVTList SelectionDAG::getVTList(EVT VT) {
4757 return makeVTList(SDNode::getValueTypeList(VT), 1);
4760 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
4761 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4762 E = VTList.rend(); I != E; ++I)
4763 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
4766 EVT *Array = Allocator.Allocate<EVT>(2);
4769 SDVTList Result = makeVTList(Array, 2);
4770 VTList.push_back(Result);
4774 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
4775 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4776 E = VTList.rend(); I != E; ++I)
4777 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4781 EVT *Array = Allocator.Allocate<EVT>(3);
4785 SDVTList Result = makeVTList(Array, 3);
4786 VTList.push_back(Result);
4790 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
4791 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4792 E = VTList.rend(); I != E; ++I)
4793 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4794 I->VTs[2] == VT3 && I->VTs[3] == VT4)
4797 EVT *Array = Allocator.Allocate<EVT>(4);
4802 SDVTList Result = makeVTList(Array, 4);
4803 VTList.push_back(Result);
4807 SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) {
4809 case 0: llvm_unreachable("Cannot have nodes without results!");
4810 case 1: return getVTList(VTs[0]);
4811 case 2: return getVTList(VTs[0], VTs[1]);
4812 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
4813 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]);
4817 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4818 E = VTList.rend(); I != E; ++I) {
4819 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
4822 if (std::equal(&VTs[2], &VTs[NumVTs], &I->VTs[2]))
4826 EVT *Array = Allocator.Allocate<EVT>(NumVTs);
4827 std::copy(VTs, VTs+NumVTs, Array);
4828 SDVTList Result = makeVTList(Array, NumVTs);
4829 VTList.push_back(Result);
4834 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
4835 /// specified operands. If the resultant node already exists in the DAG,
4836 /// this does not modify the specified node, instead it returns the node that
4837 /// already exists. If the resultant node does not exist in the DAG, the
4838 /// input node is returned. As a degenerate case, if you specify the same
4839 /// input operands as the node already has, the input node is returned.
4840 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) {
4841 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
4843 // Check to see if there is no change.
4844 if (Op == N->getOperand(0)) return N;
4846 // See if the modified node already exists.
4847 void *InsertPos = 0;
4848 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
4851 // Nope it doesn't. Remove the node from its current place in the maps.
4853 if (!RemoveNodeFromCSEMaps(N))
4856 // Now we update the operands.
4857 N->OperandList[0].set(Op);
4859 // If this gets put into a CSE map, add it.
4860 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4864 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) {
4865 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
4867 // Check to see if there is no change.
4868 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
4869 return N; // No operands changed, just return the input node.
4871 // See if the modified node already exists.
4872 void *InsertPos = 0;
4873 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
4876 // Nope it doesn't. Remove the node from its current place in the maps.
4878 if (!RemoveNodeFromCSEMaps(N))
4881 // Now we update the operands.
4882 if (N->OperandList[0] != Op1)
4883 N->OperandList[0].set(Op1);
4884 if (N->OperandList[1] != Op2)
4885 N->OperandList[1].set(Op2);
4887 // If this gets put into a CSE map, add it.
4888 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4892 SDNode *SelectionDAG::
4893 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) {
4894 SDValue Ops[] = { Op1, Op2, Op3 };
4895 return UpdateNodeOperands(N, Ops, 3);
4898 SDNode *SelectionDAG::
4899 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
4900 SDValue Op3, SDValue Op4) {
4901 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
4902 return UpdateNodeOperands(N, Ops, 4);
4905 SDNode *SelectionDAG::
4906 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
4907 SDValue Op3, SDValue Op4, SDValue Op5) {
4908 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
4909 return UpdateNodeOperands(N, Ops, 5);
4912 SDNode *SelectionDAG::
4913 UpdateNodeOperands(SDNode *N, const SDValue *Ops, unsigned NumOps) {
4914 assert(N->getNumOperands() == NumOps &&
4915 "Update with wrong number of operands");
4917 // Check to see if there is no change.
4918 bool AnyChange = false;
4919 for (unsigned i = 0; i != NumOps; ++i) {
4920 if (Ops[i] != N->getOperand(i)) {
4926 // No operands changed, just return the input node.
4927 if (!AnyChange) return N;
4929 // See if the modified node already exists.
4930 void *InsertPos = 0;
4931 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
4934 // Nope it doesn't. Remove the node from its current place in the maps.
4936 if (!RemoveNodeFromCSEMaps(N))
4939 // Now we update the operands.
4940 for (unsigned i = 0; i != NumOps; ++i)
4941 if (N->OperandList[i] != Ops[i])
4942 N->OperandList[i].set(Ops[i]);
4944 // If this gets put into a CSE map, add it.
4945 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4949 /// DropOperands - Release the operands and set this node to have
4951 void SDNode::DropOperands() {
4952 // Unlike the code in MorphNodeTo that does this, we don't need to
4953 // watch for dead nodes here.
4954 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
4960 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
4963 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4965 SDVTList VTs = getVTList(VT);
4966 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
4969 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4970 EVT VT, SDValue Op1) {
4971 SDVTList VTs = getVTList(VT);
4972 SDValue Ops[] = { Op1 };
4973 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4976 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4977 EVT VT, SDValue Op1,
4979 SDVTList VTs = getVTList(VT);
4980 SDValue Ops[] = { Op1, Op2 };
4981 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4984 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4985 EVT VT, SDValue Op1,
4986 SDValue Op2, SDValue Op3) {
4987 SDVTList VTs = getVTList(VT);
4988 SDValue Ops[] = { Op1, Op2, Op3 };
4989 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4992 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4993 EVT VT, const SDValue *Ops,
4995 SDVTList VTs = getVTList(VT);
4996 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4999 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5000 EVT VT1, EVT VT2, const SDValue *Ops,
5002 SDVTList VTs = getVTList(VT1, VT2);
5003 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
5006 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5008 SDVTList VTs = getVTList(VT1, VT2);
5009 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
5012 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5013 EVT VT1, EVT VT2, EVT VT3,
5014 const SDValue *Ops, unsigned NumOps) {
5015 SDVTList VTs = getVTList(VT1, VT2, VT3);
5016 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
5019 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5020 EVT VT1, EVT VT2, EVT VT3, EVT VT4,
5021 const SDValue *Ops, unsigned NumOps) {
5022 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
5023 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
5026 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5029 SDVTList VTs = getVTList(VT1, VT2);
5030 SDValue Ops[] = { Op1 };
5031 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
5034 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5036 SDValue Op1, SDValue Op2) {
5037 SDVTList VTs = getVTList(VT1, VT2);
5038 SDValue Ops[] = { Op1, Op2 };
5039 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
5042 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5044 SDValue Op1, SDValue Op2,
5046 SDVTList VTs = getVTList(VT1, VT2);
5047 SDValue Ops[] = { Op1, Op2, Op3 };
5048 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
5051 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5052 EVT VT1, EVT VT2, EVT VT3,
5053 SDValue Op1, SDValue Op2,
5055 SDVTList VTs = getVTList(VT1, VT2, VT3);
5056 SDValue Ops[] = { Op1, Op2, Op3 };
5057 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
5060 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5061 SDVTList VTs, const SDValue *Ops,
5063 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
5064 // Reset the NodeID to -1.
5069 /// UpdadeDebugLocOnMergedSDNode - If the opt level is -O0 then it throws away
5070 /// the line number information on the merged node since it is not possible to
5071 /// preserve the information that operation is associated with multiple lines.
5072 /// This will make the debugger working better at -O0, were there is a higher
5073 /// probability having other instructions associated with that line.
5075 SDNode *SelectionDAG::UpdadeDebugLocOnMergedSDNode(SDNode *N, DebugLoc OLoc) {
5076 DebugLoc NLoc = N->getDebugLoc();
5077 if (!(NLoc.isUnknown()) && (OptLevel == CodeGenOpt::None) && (OLoc != NLoc)) {
5078 N->setDebugLoc(DebugLoc());
5083 /// MorphNodeTo - This *mutates* the specified node to have the specified
5084 /// return type, opcode, and operands.
5086 /// Note that MorphNodeTo returns the resultant node. If there is already a
5087 /// node of the specified opcode and operands, it returns that node instead of
5088 /// the current one. Note that the DebugLoc need not be the same.
5090 /// Using MorphNodeTo is faster than creating a new node and swapping it in
5091 /// with ReplaceAllUsesWith both because it often avoids allocating a new
5092 /// node, and because it doesn't require CSE recalculation for any of
5093 /// the node's users.
5095 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
5096 SDVTList VTs, const SDValue *Ops,
5098 // If an identical node already exists, use it.
5100 if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) {
5101 FoldingSetNodeID ID;
5102 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
5103 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
5104 return UpdadeDebugLocOnMergedSDNode(ON, N->getDebugLoc());
5107 if (!RemoveNodeFromCSEMaps(N))
5110 // Start the morphing.
5112 N->ValueList = VTs.VTs;
5113 N->NumValues = VTs.NumVTs;
5115 // Clear the operands list, updating used nodes to remove this from their
5116 // use list. Keep track of any operands that become dead as a result.
5117 SmallPtrSet<SDNode*, 16> DeadNodeSet;
5118 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
5120 SDNode *Used = Use.getNode();
5122 if (Used->use_empty())
5123 DeadNodeSet.insert(Used);
5126 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) {
5127 // Initialize the memory references information.
5128 MN->setMemRefs(0, 0);
5129 // If NumOps is larger than the # of operands we can have in a
5130 // MachineSDNode, reallocate the operand list.
5131 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) {
5132 if (MN->OperandsNeedDelete)
5133 delete[] MN->OperandList;
5134 if (NumOps > array_lengthof(MN->LocalOperands))
5135 // We're creating a final node that will live unmorphed for the
5136 // remainder of the current SelectionDAG iteration, so we can allocate
5137 // the operands directly out of a pool with no recycling metadata.
5138 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
5141 MN->InitOperands(MN->LocalOperands, Ops, NumOps);
5142 MN->OperandsNeedDelete = false;
5144 MN->InitOperands(MN->OperandList, Ops, NumOps);
5146 // If NumOps is larger than the # of operands we currently have, reallocate
5147 // the operand list.
5148 if (NumOps > N->NumOperands) {
5149 if (N->OperandsNeedDelete)
5150 delete[] N->OperandList;
5151 N->InitOperands(new SDUse[NumOps], Ops, NumOps);
5152 N->OperandsNeedDelete = true;
5154 N->InitOperands(N->OperandList, Ops, NumOps);
5157 // Delete any nodes that are still dead after adding the uses for the
5159 if (!DeadNodeSet.empty()) {
5160 SmallVector<SDNode *, 16> DeadNodes;
5161 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
5162 E = DeadNodeSet.end(); I != E; ++I)
5163 if ((*I)->use_empty())
5164 DeadNodes.push_back(*I);
5165 RemoveDeadNodes(DeadNodes);
5169 CSEMap.InsertNode(N, IP); // Memoize the new node.
5174 /// getMachineNode - These are used for target selectors to create a new node
5175 /// with specified return type(s), MachineInstr opcode, and operands.
5177 /// Note that getMachineNode returns the resultant node. If there is already a
5178 /// node of the specified opcode and operands, it returns that node instead of
5179 /// the current one.
5181 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) {
5182 SDVTList VTs = getVTList(VT);
5183 return getMachineNode(Opcode, dl, VTs, 0, 0);
5187 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) {
5188 SDVTList VTs = getVTList(VT);
5189 SDValue Ops[] = { Op1 };
5190 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5194 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
5195 SDValue Op1, SDValue Op2) {
5196 SDVTList VTs = getVTList(VT);
5197 SDValue Ops[] = { Op1, Op2 };
5198 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5202 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
5203 SDValue Op1, SDValue Op2, SDValue Op3) {
5204 SDVTList VTs = getVTList(VT);
5205 SDValue Ops[] = { Op1, Op2, Op3 };
5206 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5210 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
5211 const SDValue *Ops, unsigned NumOps) {
5212 SDVTList VTs = getVTList(VT);
5213 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5217 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) {
5218 SDVTList VTs = getVTList(VT1, VT2);
5219 return getMachineNode(Opcode, dl, VTs, 0, 0);
5223 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5224 EVT VT1, EVT VT2, SDValue Op1) {
5225 SDVTList VTs = getVTList(VT1, VT2);
5226 SDValue Ops[] = { Op1 };
5227 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5231 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5232 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) {
5233 SDVTList VTs = getVTList(VT1, VT2);
5234 SDValue Ops[] = { Op1, Op2 };
5235 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5239 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5240 EVT VT1, EVT VT2, SDValue Op1,
5241 SDValue Op2, SDValue Op3) {
5242 SDVTList VTs = getVTList(VT1, VT2);
5243 SDValue Ops[] = { Op1, Op2, Op3 };
5244 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5248 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5250 const SDValue *Ops, unsigned NumOps) {
5251 SDVTList VTs = getVTList(VT1, VT2);
5252 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5256 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5257 EVT VT1, EVT VT2, EVT VT3,
5258 SDValue Op1, SDValue Op2) {
5259 SDVTList VTs = getVTList(VT1, VT2, VT3);
5260 SDValue Ops[] = { Op1, Op2 };
5261 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5265 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5266 EVT VT1, EVT VT2, EVT VT3,
5267 SDValue Op1, SDValue Op2, SDValue Op3) {
5268 SDVTList VTs = getVTList(VT1, VT2, VT3);
5269 SDValue Ops[] = { Op1, Op2, Op3 };
5270 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5274 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5275 EVT VT1, EVT VT2, EVT VT3,
5276 const SDValue *Ops, unsigned NumOps) {
5277 SDVTList VTs = getVTList(VT1, VT2, VT3);
5278 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5282 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1,
5283 EVT VT2, EVT VT3, EVT VT4,
5284 const SDValue *Ops, unsigned NumOps) {
5285 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
5286 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5290 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5291 const std::vector<EVT> &ResultTys,
5292 const SDValue *Ops, unsigned NumOps) {
5293 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size());
5294 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5298 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs,
5299 const SDValue *Ops, unsigned NumOps) {
5300 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue;
5305 FoldingSetNodeID ID;
5306 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps);
5308 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
5309 return cast<MachineSDNode>(UpdadeDebugLocOnMergedSDNode(E, DL));
5313 // Allocate a new MachineSDNode.
5314 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs);
5316 // Initialize the operands list.
5317 if (NumOps > array_lengthof(N->LocalOperands))
5318 // We're creating a final node that will live unmorphed for the
5319 // remainder of the current SelectionDAG iteration, so we can allocate
5320 // the operands directly out of a pool with no recycling metadata.
5321 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
5324 N->InitOperands(N->LocalOperands, Ops, NumOps);
5325 N->OperandsNeedDelete = false;
5328 CSEMap.InsertNode(N, IP);
5330 AllNodes.push_back(N);
5332 VerifyMachineNode(N);
5337 /// getTargetExtractSubreg - A convenience function for creating
5338 /// TargetOpcode::EXTRACT_SUBREG nodes.
5340 SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT,
5342 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
5343 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL,
5344 VT, Operand, SRIdxVal);
5345 return SDValue(Subreg, 0);
5348 /// getTargetInsertSubreg - A convenience function for creating
5349 /// TargetOpcode::INSERT_SUBREG nodes.
5351 SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT,
5352 SDValue Operand, SDValue Subreg) {
5353 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
5354 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL,
5355 VT, Operand, Subreg, SRIdxVal);
5356 return SDValue(Result, 0);
5359 /// getNodeIfExists - Get the specified node if it's already available, or
5360 /// else return NULL.
5361 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
5362 const SDValue *Ops, unsigned NumOps) {
5363 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
5364 FoldingSetNodeID ID;
5365 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
5367 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
5373 /// getDbgValue - Creates a SDDbgValue node.
5376 SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off,
5377 DebugLoc DL, unsigned O) {
5378 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O);
5382 SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off,
5383 DebugLoc DL, unsigned O) {
5384 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O);
5388 SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off,
5389 DebugLoc DL, unsigned O) {
5390 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O);
5395 /// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node
5396 /// pointed to by a use iterator is deleted, increment the use iterator
5397 /// so that it doesn't dangle.
5399 class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener {
5400 SDNode::use_iterator &UI;
5401 SDNode::use_iterator &UE;
5403 virtual void NodeDeleted(SDNode *N, SDNode *E) {
5404 // Increment the iterator as needed.
5405 while (UI != UE && N == *UI)
5410 RAUWUpdateListener(SelectionDAG &d,
5411 SDNode::use_iterator &ui,
5412 SDNode::use_iterator &ue)
5413 : SelectionDAG::DAGUpdateListener(d), UI(ui), UE(ue) {}
5418 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5419 /// This can cause recursive merging of nodes in the DAG.
5421 /// This version assumes From has a single result value.
5423 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To) {
5424 SDNode *From = FromN.getNode();
5425 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
5426 "Cannot replace with this method!");
5427 assert(From != To.getNode() && "Cannot replace uses of with self");
5429 // Iterate over all the existing uses of From. New uses will be added
5430 // to the beginning of the use list, which we avoid visiting.
5431 // This specifically avoids visiting uses of From that arise while the
5432 // replacement is happening, because any such uses would be the result
5433 // of CSE: If an existing node looks like From after one of its operands
5434 // is replaced by To, we don't want to replace of all its users with To
5435 // too. See PR3018 for more info.
5436 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5437 RAUWUpdateListener Listener(*this, UI, UE);
5441 // This node is about to morph, remove its old self from the CSE maps.
5442 RemoveNodeFromCSEMaps(User);
5444 // A user can appear in a use list multiple times, and when this
5445 // happens the uses are usually next to each other in the list.
5446 // To help reduce the number of CSE recomputations, process all
5447 // the uses of this user that we can find this way.
5449 SDUse &Use = UI.getUse();
5452 } while (UI != UE && *UI == User);
5454 // Now that we have modified User, add it back to the CSE maps. If it
5455 // already exists there, recursively merge the results together.
5456 AddModifiedNodeToCSEMaps(User);
5459 // If we just RAUW'd the root, take note.
5460 if (FromN == getRoot())
5464 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5465 /// This can cause recursive merging of nodes in the DAG.
5467 /// This version assumes that for each value of From, there is a
5468 /// corresponding value in To in the same position with the same type.
5470 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To) {
5472 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
5473 assert((!From->hasAnyUseOfValue(i) ||
5474 From->getValueType(i) == To->getValueType(i)) &&
5475 "Cannot use this version of ReplaceAllUsesWith!");
5478 // Handle the trivial case.
5482 // Iterate over just the existing users of From. See the comments in
5483 // the ReplaceAllUsesWith above.
5484 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5485 RAUWUpdateListener Listener(*this, UI, UE);
5489 // This node is about to morph, remove its old self from the CSE maps.
5490 RemoveNodeFromCSEMaps(User);
5492 // A user can appear in a use list multiple times, and when this
5493 // happens the uses are usually next to each other in the list.
5494 // To help reduce the number of CSE recomputations, process all
5495 // the uses of this user that we can find this way.
5497 SDUse &Use = UI.getUse();
5500 } while (UI != UE && *UI == User);
5502 // Now that we have modified User, add it back to the CSE maps. If it
5503 // already exists there, recursively merge the results together.
5504 AddModifiedNodeToCSEMaps(User);
5507 // If we just RAUW'd the root, take note.
5508 if (From == getRoot().getNode())
5509 setRoot(SDValue(To, getRoot().getResNo()));
5512 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5513 /// This can cause recursive merging of nodes in the DAG.
5515 /// This version can replace From with any result values. To must match the
5516 /// number and types of values returned by From.
5517 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, const SDValue *To) {
5518 if (From->getNumValues() == 1) // Handle the simple case efficiently.
5519 return ReplaceAllUsesWith(SDValue(From, 0), To[0]);
5521 // Iterate over just the existing users of From. See the comments in
5522 // the ReplaceAllUsesWith above.
5523 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5524 RAUWUpdateListener Listener(*this, UI, UE);
5528 // This node is about to morph, remove its old self from the CSE maps.
5529 RemoveNodeFromCSEMaps(User);
5531 // A user can appear in a use list multiple times, and when this
5532 // happens the uses are usually next to each other in the list.
5533 // To help reduce the number of CSE recomputations, process all
5534 // the uses of this user that we can find this way.
5536 SDUse &Use = UI.getUse();
5537 const SDValue &ToOp = To[Use.getResNo()];
5540 } while (UI != UE && *UI == User);
5542 // Now that we have modified User, add it back to the CSE maps. If it
5543 // already exists there, recursively merge the results together.
5544 AddModifiedNodeToCSEMaps(User);
5547 // If we just RAUW'd the root, take note.
5548 if (From == getRoot().getNode())
5549 setRoot(SDValue(To[getRoot().getResNo()]));
5552 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
5553 /// uses of other values produced by From.getNode() alone. The Deleted
5554 /// vector is handled the same way as for ReplaceAllUsesWith.
5555 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To){
5556 // Handle the really simple, really trivial case efficiently.
5557 if (From == To) return;
5559 // Handle the simple, trivial, case efficiently.
5560 if (From.getNode()->getNumValues() == 1) {
5561 ReplaceAllUsesWith(From, To);
5565 // Iterate over just the existing users of From. See the comments in
5566 // the ReplaceAllUsesWith above.
5567 SDNode::use_iterator UI = From.getNode()->use_begin(),
5568 UE = From.getNode()->use_end();
5569 RAUWUpdateListener Listener(*this, UI, UE);
5572 bool UserRemovedFromCSEMaps = false;
5574 // A user can appear in a use list multiple times, and when this
5575 // happens the uses are usually next to each other in the list.
5576 // To help reduce the number of CSE recomputations, process all
5577 // the uses of this user that we can find this way.
5579 SDUse &Use = UI.getUse();
5581 // Skip uses of different values from the same node.
5582 if (Use.getResNo() != From.getResNo()) {
5587 // If this node hasn't been modified yet, it's still in the CSE maps,
5588 // so remove its old self from the CSE maps.
5589 if (!UserRemovedFromCSEMaps) {
5590 RemoveNodeFromCSEMaps(User);
5591 UserRemovedFromCSEMaps = true;
5596 } while (UI != UE && *UI == User);
5598 // We are iterating over all uses of the From node, so if a use
5599 // doesn't use the specific value, no changes are made.
5600 if (!UserRemovedFromCSEMaps)
5603 // Now that we have modified User, add it back to the CSE maps. If it
5604 // already exists there, recursively merge the results together.
5605 AddModifiedNodeToCSEMaps(User);
5608 // If we just RAUW'd the root, take note.
5609 if (From == getRoot())
5614 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
5615 /// to record information about a use.
5622 /// operator< - Sort Memos by User.
5623 bool operator<(const UseMemo &L, const UseMemo &R) {
5624 return (intptr_t)L.User < (intptr_t)R.User;
5628 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
5629 /// uses of other values produced by From.getNode() alone. The same value
5630 /// may appear in both the From and To list. The Deleted vector is
5631 /// handled the same way as for ReplaceAllUsesWith.
5632 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
5635 // Handle the simple, trivial case efficiently.
5637 return ReplaceAllUsesOfValueWith(*From, *To);
5639 // Read up all the uses and make records of them. This helps
5640 // processing new uses that are introduced during the
5641 // replacement process.
5642 SmallVector<UseMemo, 4> Uses;
5643 for (unsigned i = 0; i != Num; ++i) {
5644 unsigned FromResNo = From[i].getResNo();
5645 SDNode *FromNode = From[i].getNode();
5646 for (SDNode::use_iterator UI = FromNode->use_begin(),
5647 E = FromNode->use_end(); UI != E; ++UI) {
5648 SDUse &Use = UI.getUse();
5649 if (Use.getResNo() == FromResNo) {
5650 UseMemo Memo = { *UI, i, &Use };
5651 Uses.push_back(Memo);
5656 // Sort the uses, so that all the uses from a given User are together.
5657 std::sort(Uses.begin(), Uses.end());
5659 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
5660 UseIndex != UseIndexEnd; ) {
5661 // We know that this user uses some value of From. If it is the right
5662 // value, update it.
5663 SDNode *User = Uses[UseIndex].User;
5665 // This node is about to morph, remove its old self from the CSE maps.
5666 RemoveNodeFromCSEMaps(User);
5668 // The Uses array is sorted, so all the uses for a given User
5669 // are next to each other in the list.
5670 // To help reduce the number of CSE recomputations, process all
5671 // the uses of this user that we can find this way.
5673 unsigned i = Uses[UseIndex].Index;
5674 SDUse &Use = *Uses[UseIndex].Use;
5678 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
5680 // Now that we have modified User, add it back to the CSE maps. If it
5681 // already exists there, recursively merge the results together.
5682 AddModifiedNodeToCSEMaps(User);
5686 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
5687 /// based on their topological order. It returns the maximum id and a vector
5688 /// of the SDNodes* in assigned order by reference.
5689 unsigned SelectionDAG::AssignTopologicalOrder() {
5691 unsigned DAGSize = 0;
5693 // SortedPos tracks the progress of the algorithm. Nodes before it are
5694 // sorted, nodes after it are unsorted. When the algorithm completes
5695 // it is at the end of the list.
5696 allnodes_iterator SortedPos = allnodes_begin();
5698 // Visit all the nodes. Move nodes with no operands to the front of
5699 // the list immediately. Annotate nodes that do have operands with their
5700 // operand count. Before we do this, the Node Id fields of the nodes
5701 // may contain arbitrary values. After, the Node Id fields for nodes
5702 // before SortedPos will contain the topological sort index, and the
5703 // Node Id fields for nodes At SortedPos and after will contain the
5704 // count of outstanding operands.
5705 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
5708 unsigned Degree = N->getNumOperands();
5710 // A node with no uses, add it to the result array immediately.
5711 N->setNodeId(DAGSize++);
5712 allnodes_iterator Q = N;
5714 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
5715 assert(SortedPos != AllNodes.end() && "Overran node list");
5718 // Temporarily use the Node Id as scratch space for the degree count.
5719 N->setNodeId(Degree);
5723 // Visit all the nodes. As we iterate, move nodes into sorted order,
5724 // such that by the time the end is reached all nodes will be sorted.
5725 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
5728 // N is in sorted position, so all its uses have one less operand
5729 // that needs to be sorted.
5730 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
5733 unsigned Degree = P->getNodeId();
5734 assert(Degree != 0 && "Invalid node degree");
5737 // All of P's operands are sorted, so P may sorted now.
5738 P->setNodeId(DAGSize++);
5740 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
5741 assert(SortedPos != AllNodes.end() && "Overran node list");
5744 // Update P's outstanding operand count.
5745 P->setNodeId(Degree);
5748 if (I == SortedPos) {
5751 dbgs() << "Overran sorted position:\n";
5754 llvm_unreachable(0);
5758 assert(SortedPos == AllNodes.end() &&
5759 "Topological sort incomplete!");
5760 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
5761 "First node in topological sort is not the entry token!");
5762 assert(AllNodes.front().getNodeId() == 0 &&
5763 "First node in topological sort has non-zero id!");
5764 assert(AllNodes.front().getNumOperands() == 0 &&
5765 "First node in topological sort has operands!");
5766 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
5767 "Last node in topologic sort has unexpected id!");
5768 assert(AllNodes.back().use_empty() &&
5769 "Last node in topologic sort has users!");
5770 assert(DAGSize == allnodes_size() && "Node count mismatch!");
5774 /// AssignOrdering - Assign an order to the SDNode.
5775 void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) {
5776 assert(SD && "Trying to assign an order to a null node!");
5777 Ordering->add(SD, Order);
5780 /// GetOrdering - Get the order for the SDNode.
5781 unsigned SelectionDAG::GetOrdering(const SDNode *SD) const {
5782 assert(SD && "Trying to get the order of a null node!");
5783 return Ordering->getOrder(SD);
5786 /// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the
5787 /// value is produced by SD.
5788 void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) {
5789 DbgInfo->add(DB, SD, isParameter);
5791 SD->setHasDebugValue(true);
5794 /// TransferDbgValues - Transfer SDDbgValues.
5795 void SelectionDAG::TransferDbgValues(SDValue From, SDValue To) {
5796 if (From == To || !From.getNode()->getHasDebugValue())
5798 SDNode *FromNode = From.getNode();
5799 SDNode *ToNode = To.getNode();
5800 ArrayRef<SDDbgValue *> DVs = GetDbgValues(FromNode);
5801 SmallVector<SDDbgValue *, 2> ClonedDVs;
5802 for (ArrayRef<SDDbgValue *>::iterator I = DVs.begin(), E = DVs.end();
5804 SDDbgValue *Dbg = *I;
5805 if (Dbg->getKind() == SDDbgValue::SDNODE) {
5806 SDDbgValue *Clone = getDbgValue(Dbg->getMDPtr(), ToNode, To.getResNo(),
5807 Dbg->getOffset(), Dbg->getDebugLoc(),
5809 ClonedDVs.push_back(Clone);
5812 for (SmallVector<SDDbgValue *, 2>::iterator I = ClonedDVs.begin(),
5813 E = ClonedDVs.end(); I != E; ++I)
5814 AddDbgValue(*I, ToNode, false);
5817 //===----------------------------------------------------------------------===//
5819 //===----------------------------------------------------------------------===//
5821 HandleSDNode::~HandleSDNode() {
5825 GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, DebugLoc DL,
5826 const GlobalValue *GA,
5827 EVT VT, int64_t o, unsigned char TF)
5828 : SDNode(Opc, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) {
5832 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt,
5833 MachineMemOperand *mmo)
5834 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) {
5835 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5836 MMO->isNonTemporal(), MMO->isInvariant());
5837 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5838 assert(isNonTemporal() == MMO->isNonTemporal() &&
5839 "Non-temporal encoding error!");
5840 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5843 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs,
5844 const SDValue *Ops, unsigned NumOps, EVT memvt,
5845 MachineMemOperand *mmo)
5846 : SDNode(Opc, dl, VTs, Ops, NumOps),
5847 MemoryVT(memvt), MMO(mmo) {
5848 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5849 MMO->isNonTemporal(), MMO->isInvariant());
5850 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5851 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5854 /// Profile - Gather unique data for the node.
5856 void SDNode::Profile(FoldingSetNodeID &ID) const {
5857 AddNodeIDNode(ID, this);
5862 std::vector<EVT> VTs;
5865 VTs.reserve(MVT::LAST_VALUETYPE);
5866 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i)
5867 VTs.push_back(MVT((MVT::SimpleValueType)i));
5872 static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs;
5873 static ManagedStatic<EVTArray> SimpleVTArray;
5874 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
5876 /// getValueTypeList - Return a pointer to the specified value type.
5878 const EVT *SDNode::getValueTypeList(EVT VT) {
5879 if (VT.isExtended()) {
5880 sys::SmartScopedLock<true> Lock(*VTMutex);
5881 return &(*EVTs->insert(VT).first);
5883 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE &&
5884 "Value type out of range!");
5885 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy];
5889 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
5890 /// indicated value. This method ignores uses of other values defined by this
5892 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
5893 assert(Value < getNumValues() && "Bad value!");
5895 // TODO: Only iterate over uses of a given value of the node
5896 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
5897 if (UI.getUse().getResNo() == Value) {
5904 // Found exactly the right number of uses?
5909 /// hasAnyUseOfValue - Return true if there are any use of the indicated
5910 /// value. This method ignores uses of other values defined by this operation.
5911 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
5912 assert(Value < getNumValues() && "Bad value!");
5914 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
5915 if (UI.getUse().getResNo() == Value)
5922 /// isOnlyUserOf - Return true if this node is the only use of N.
5924 bool SDNode::isOnlyUserOf(SDNode *N) const {
5926 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
5937 /// isOperand - Return true if this node is an operand of N.
5939 bool SDValue::isOperandOf(SDNode *N) const {
5940 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5941 if (*this == N->getOperand(i))
5946 bool SDNode::isOperandOf(SDNode *N) const {
5947 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
5948 if (this == N->OperandList[i].getNode())
5953 /// reachesChainWithoutSideEffects - Return true if this operand (which must
5954 /// be a chain) reaches the specified operand without crossing any
5955 /// side-effecting instructions on any chain path. In practice, this looks
5956 /// through token factors and non-volatile loads. In order to remain efficient,
5957 /// this only looks a couple of nodes in, it does not do an exhaustive search.
5958 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
5959 unsigned Depth) const {
5960 if (*this == Dest) return true;
5962 // Don't search too deeply, we just want to be able to see through
5963 // TokenFactor's etc.
5964 if (Depth == 0) return false;
5966 // If this is a token factor, all inputs to the TF happen in parallel. If any
5967 // of the operands of the TF does not reach dest, then we cannot do the xform.
5968 if (getOpcode() == ISD::TokenFactor) {
5969 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
5970 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
5975 // Loads don't have side effects, look through them.
5976 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
5977 if (!Ld->isVolatile())
5978 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
5983 /// hasPredecessor - Return true if N is a predecessor of this node.
5984 /// N is either an operand of this node, or can be reached by recursively
5985 /// traversing up the operands.
5986 /// NOTE: This is an expensive method. Use it carefully.
5987 bool SDNode::hasPredecessor(const SDNode *N) const {
5988 SmallPtrSet<const SDNode *, 32> Visited;
5989 SmallVector<const SDNode *, 16> Worklist;
5990 return hasPredecessorHelper(N, Visited, Worklist);
5993 bool SDNode::hasPredecessorHelper(const SDNode *N,
5994 SmallPtrSet<const SDNode *, 32> &Visited,
5995 SmallVector<const SDNode *, 16> &Worklist) const {
5996 if (Visited.empty()) {
5997 Worklist.push_back(this);
5999 // Take a look in the visited set. If we've already encountered this node
6000 // we needn't search further.
6001 if (Visited.count(N))
6005 // Haven't visited N yet. Continue the search.
6006 while (!Worklist.empty()) {
6007 const SDNode *M = Worklist.pop_back_val();
6008 for (unsigned i = 0, e = M->getNumOperands(); i != e; ++i) {
6009 SDNode *Op = M->getOperand(i).getNode();
6010 if (Visited.insert(Op))
6011 Worklist.push_back(Op);
6020 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
6021 assert(Num < NumOperands && "Invalid child # of SDNode!");
6022 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
6025 SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
6026 assert(N->getNumValues() == 1 &&
6027 "Can't unroll a vector with multiple results!");
6029 EVT VT = N->getValueType(0);
6030 unsigned NE = VT.getVectorNumElements();
6031 EVT EltVT = VT.getVectorElementType();
6032 DebugLoc dl = N->getDebugLoc();
6034 SmallVector<SDValue, 8> Scalars;
6035 SmallVector<SDValue, 4> Operands(N->getNumOperands());
6037 // If ResNE is 0, fully unroll the vector op.
6040 else if (NE > ResNE)
6044 for (i= 0; i != NE; ++i) {
6045 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) {
6046 SDValue Operand = N->getOperand(j);
6047 EVT OperandVT = Operand.getValueType();
6048 if (OperandVT.isVector()) {
6049 // A vector operand; extract a single element.
6050 EVT OperandEltVT = OperandVT.getVectorElementType();
6051 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl,
6054 getConstant(i, TLI.getPointerTy()));
6056 // A scalar operand; just use it as is.
6057 Operands[j] = Operand;
6061 switch (N->getOpcode()) {
6063 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6064 &Operands[0], Operands.size()));
6067 Scalars.push_back(getNode(ISD::SELECT, dl, EltVT,
6068 &Operands[0], Operands.size()));
6075 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0],
6076 getShiftAmountOperand(Operands[0].getValueType(),
6079 case ISD::SIGN_EXTEND_INREG:
6080 case ISD::FP_ROUND_INREG: {
6081 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType();
6082 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6084 getValueType(ExtVT)));
6089 for (; i < ResNE; ++i)
6090 Scalars.push_back(getUNDEF(EltVT));
6092 return getNode(ISD::BUILD_VECTOR, dl,
6093 EVT::getVectorVT(*getContext(), EltVT, ResNE),
6094 &Scalars[0], Scalars.size());
6098 /// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a
6099 /// location that is 'Dist' units away from the location that the 'Base' load
6100 /// is loading from.
6101 bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base,
6102 unsigned Bytes, int Dist) const {
6103 if (LD->getChain() != Base->getChain())
6105 EVT VT = LD->getValueType(0);
6106 if (VT.getSizeInBits() / 8 != Bytes)
6109 SDValue Loc = LD->getOperand(1);
6110 SDValue BaseLoc = Base->getOperand(1);
6111 if (Loc.getOpcode() == ISD::FrameIndex) {
6112 if (BaseLoc.getOpcode() != ISD::FrameIndex)
6114 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo();
6115 int FI = cast<FrameIndexSDNode>(Loc)->getIndex();
6116 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex();
6117 int FS = MFI->getObjectSize(FI);
6118 int BFS = MFI->getObjectSize(BFI);
6119 if (FS != BFS || FS != (int)Bytes) return false;
6120 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes);
6124 if (isBaseWithConstantOffset(Loc) && Loc.getOperand(0) == BaseLoc &&
6125 cast<ConstantSDNode>(Loc.getOperand(1))->getSExtValue() == Dist*Bytes)
6128 const GlobalValue *GV1 = NULL;
6129 const GlobalValue *GV2 = NULL;
6130 int64_t Offset1 = 0;
6131 int64_t Offset2 = 0;
6132 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1);
6133 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2);
6134 if (isGA1 && isGA2 && GV1 == GV2)
6135 return Offset1 == (Offset2 + Dist*Bytes);
6140 /// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if
6141 /// it cannot be inferred.
6142 unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const {
6143 // If this is a GlobalAddress + cst, return the alignment.
6144 const GlobalValue *GV;
6145 int64_t GVOffset = 0;
6146 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) {
6147 unsigned PtrWidth = TLI.getPointerTy().getSizeInBits();
6148 APInt KnownZero(PtrWidth, 0), KnownOne(PtrWidth, 0);
6149 llvm::ComputeMaskedBits(const_cast<GlobalValue*>(GV), KnownZero, KnownOne,
6150 TLI.getDataLayout());
6151 unsigned AlignBits = KnownZero.countTrailingOnes();
6152 unsigned Align = AlignBits ? 1 << std::min(31U, AlignBits) : 0;
6154 return MinAlign(Align, GVOffset);
6157 // If this is a direct reference to a stack slot, use information about the
6158 // stack slot's alignment.
6159 int FrameIdx = 1 << 31;
6160 int64_t FrameOffset = 0;
6161 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) {
6162 FrameIdx = FI->getIndex();
6163 } else if (isBaseWithConstantOffset(Ptr) &&
6164 isa<FrameIndexSDNode>(Ptr.getOperand(0))) {
6166 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
6167 FrameOffset = Ptr.getConstantOperandVal(1);
6170 if (FrameIdx != (1 << 31)) {
6171 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo();
6172 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx),
6180 // getAddressSpace - Return the address space this GlobalAddress belongs to.
6181 unsigned GlobalAddressSDNode::getAddressSpace() const {
6182 return getGlobal()->getType()->getAddressSpace();
6186 Type *ConstantPoolSDNode::getType() const {
6187 if (isMachineConstantPoolEntry())
6188 return Val.MachineCPVal->getType();
6189 return Val.ConstVal->getType();
6192 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
6194 unsigned &SplatBitSize,
6196 unsigned MinSplatBits,
6198 EVT VT = getValueType(0);
6199 assert(VT.isVector() && "Expected a vector type");
6200 unsigned sz = VT.getSizeInBits();
6201 if (MinSplatBits > sz)
6204 SplatValue = APInt(sz, 0);
6205 SplatUndef = APInt(sz, 0);
6207 // Get the bits. Bits with undefined values (when the corresponding element
6208 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
6209 // in SplatValue. If any of the values are not constant, give up and return
6211 unsigned int nOps = getNumOperands();
6212 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
6213 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
6215 for (unsigned j = 0; j < nOps; ++j) {
6216 unsigned i = isBigEndian ? nOps-1-j : j;
6217 SDValue OpVal = getOperand(i);
6218 unsigned BitPos = j * EltBitSize;
6220 if (OpVal.getOpcode() == ISD::UNDEF)
6221 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize);
6222 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
6223 SplatValue |= CN->getAPIntValue().zextOrTrunc(EltBitSize).
6224 zextOrTrunc(sz) << BitPos;
6225 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
6226 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
6231 // The build_vector is all constants or undefs. Find the smallest element
6232 // size that splats the vector.
6234 HasAnyUndefs = (SplatUndef != 0);
6237 unsigned HalfSize = sz / 2;
6238 APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize);
6239 APInt LowValue = SplatValue.trunc(HalfSize);
6240 APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize);
6241 APInt LowUndef = SplatUndef.trunc(HalfSize);
6243 // If the two halves do not match (ignoring undef bits), stop here.
6244 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
6245 MinSplatBits > HalfSize)
6248 SplatValue = HighValue | LowValue;
6249 SplatUndef = HighUndef & LowUndef;
6258 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
6259 // Find the first non-undef value in the shuffle mask.
6261 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
6264 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
6266 // Make sure all remaining elements are either undef or the same as the first
6268 for (int Idx = Mask[i]; i != e; ++i)
6269 if (Mask[i] >= 0 && Mask[i] != Idx)
6275 static void checkForCyclesHelper(const SDNode *N,
6276 SmallPtrSet<const SDNode*, 32> &Visited,
6277 SmallPtrSet<const SDNode*, 32> &Checked) {
6278 // If this node has already been checked, don't check it again.
6279 if (Checked.count(N))
6282 // If a node has already been visited on this depth-first walk, reject it as
6284 if (!Visited.insert(N)) {
6285 dbgs() << "Offending node:\n";
6287 errs() << "Detected cycle in SelectionDAG\n";
6291 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6292 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked);
6299 void llvm::checkForCycles(const llvm::SDNode *N) {
6301 assert(N && "Checking nonexistant SDNode");
6302 SmallPtrSet<const SDNode*, 32> visited;
6303 SmallPtrSet<const SDNode*, 32> checked;
6304 checkForCyclesHelper(N, visited, checked);
6308 void llvm::checkForCycles(const llvm::SelectionDAG *DAG) {
6309 checkForCycles(DAG->getRoot().getNode());