1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "SDNodeOrdering.h"
16 #include "SDNodeDbgValue.h"
17 #include "llvm/Constants.h"
18 #include "llvm/Analysis/DebugInfo.h"
19 #include "llvm/Analysis/ValueTracking.h"
20 #include "llvm/Function.h"
21 #include "llvm/GlobalAlias.h"
22 #include "llvm/GlobalVariable.h"
23 #include "llvm/Intrinsics.h"
24 #include "llvm/DerivedTypes.h"
25 #include "llvm/Assembly/Writer.h"
26 #include "llvm/CallingConv.h"
27 #include "llvm/CodeGen/MachineBasicBlock.h"
28 #include "llvm/CodeGen/MachineConstantPool.h"
29 #include "llvm/CodeGen/MachineFrameInfo.h"
30 #include "llvm/CodeGen/MachineModuleInfo.h"
31 #include "llvm/CodeGen/PseudoSourceValue.h"
32 #include "llvm/Target/TargetRegisterInfo.h"
33 #include "llvm/Target/TargetData.h"
34 #include "llvm/Target/TargetFrameInfo.h"
35 #include "llvm/Target/TargetLowering.h"
36 #include "llvm/Target/TargetSelectionDAGInfo.h"
37 #include "llvm/Target/TargetOptions.h"
38 #include "llvm/Target/TargetInstrInfo.h"
39 #include "llvm/Target/TargetIntrinsicInfo.h"
40 #include "llvm/Target/TargetMachine.h"
41 #include "llvm/Support/CommandLine.h"
42 #include "llvm/Support/Debug.h"
43 #include "llvm/Support/ErrorHandling.h"
44 #include "llvm/Support/ManagedStatic.h"
45 #include "llvm/Support/MathExtras.h"
46 #include "llvm/Support/raw_ostream.h"
47 #include "llvm/Support/Mutex.h"
48 #include "llvm/ADT/SetVector.h"
49 #include "llvm/ADT/SmallPtrSet.h"
50 #include "llvm/ADT/SmallSet.h"
51 #include "llvm/ADT/SmallVector.h"
52 #include "llvm/ADT/StringExtras.h"
57 /// makeVTList - Return an instance of the SDVTList struct initialized with the
58 /// specified members.
59 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
60 SDVTList Res = {VTs, NumVTs};
64 static const fltSemantics *EVTToAPFloatSemantics(EVT VT) {
65 switch (VT.getSimpleVT().SimpleTy) {
66 default: llvm_unreachable("Unknown FP format");
67 case MVT::f32: return &APFloat::IEEEsingle;
68 case MVT::f64: return &APFloat::IEEEdouble;
69 case MVT::f80: return &APFloat::x87DoubleExtended;
70 case MVT::f128: return &APFloat::IEEEquad;
71 case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
75 SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {}
77 //===----------------------------------------------------------------------===//
78 // ConstantFPSDNode Class
79 //===----------------------------------------------------------------------===//
81 /// isExactlyValue - We don't rely on operator== working on double values, as
82 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
83 /// As such, this method can be used to do an exact bit-for-bit comparison of
84 /// two floating point values.
85 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
86 return getValueAPF().bitwiseIsEqual(V);
89 bool ConstantFPSDNode::isValueValidForType(EVT VT,
91 assert(VT.isFloatingPoint() && "Can only convert between FP types");
93 // PPC long double cannot be converted to any other type.
94 if (VT == MVT::ppcf128 ||
95 &Val.getSemantics() == &APFloat::PPCDoubleDouble)
98 // convert modifies in place, so make a copy.
99 APFloat Val2 = APFloat(Val);
101 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
106 //===----------------------------------------------------------------------===//
108 //===----------------------------------------------------------------------===//
110 /// isBuildVectorAllOnes - Return true if the specified node is a
111 /// BUILD_VECTOR where all of the elements are ~0 or undef.
112 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
113 // Look through a bit convert.
114 if (N->getOpcode() == ISD::BITCAST)
115 N = N->getOperand(0).getNode();
117 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
119 unsigned i = 0, e = N->getNumOperands();
121 // Skip over all of the undef values.
122 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
125 // Do not accept an all-undef vector.
126 if (i == e) return false;
128 // Do not accept build_vectors that aren't all constants or which have non-~0
130 SDValue NotZero = N->getOperand(i);
131 if (isa<ConstantSDNode>(NotZero)) {
132 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue())
134 } else if (isa<ConstantFPSDNode>(NotZero)) {
135 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF().
136 bitcastToAPInt().isAllOnesValue())
141 // Okay, we have at least one ~0 value, check to see if the rest match or are
143 for (++i; i != e; ++i)
144 if (N->getOperand(i) != NotZero &&
145 N->getOperand(i).getOpcode() != ISD::UNDEF)
151 /// isBuildVectorAllZeros - Return true if the specified node is a
152 /// BUILD_VECTOR where all of the elements are 0 or undef.
153 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
154 // Look through a bit convert.
155 if (N->getOpcode() == ISD::BITCAST)
156 N = N->getOperand(0).getNode();
158 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
160 unsigned i = 0, e = N->getNumOperands();
162 // Skip over all of the undef values.
163 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
166 // Do not accept an all-undef vector.
167 if (i == e) return false;
169 // Do not accept build_vectors that aren't all constants or which have non-0
171 SDValue Zero = N->getOperand(i);
172 if (isa<ConstantSDNode>(Zero)) {
173 if (!cast<ConstantSDNode>(Zero)->isNullValue())
175 } else if (isa<ConstantFPSDNode>(Zero)) {
176 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero())
181 // Okay, we have at least one 0 value, check to see if the rest match or are
183 for (++i; i != e; ++i)
184 if (N->getOperand(i) != Zero &&
185 N->getOperand(i).getOpcode() != ISD::UNDEF)
190 /// isScalarToVector - Return true if the specified node is a
191 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
192 /// element is not an undef.
193 bool ISD::isScalarToVector(const SDNode *N) {
194 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
197 if (N->getOpcode() != ISD::BUILD_VECTOR)
199 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
201 unsigned NumElems = N->getNumOperands();
204 for (unsigned i = 1; i < NumElems; ++i) {
205 SDValue V = N->getOperand(i);
206 if (V.getOpcode() != ISD::UNDEF)
212 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
213 /// when given the operation for (X op Y).
214 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
215 // To perform this operation, we just need to swap the L and G bits of the
217 unsigned OldL = (Operation >> 2) & 1;
218 unsigned OldG = (Operation >> 1) & 1;
219 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
220 (OldL << 1) | // New G bit
221 (OldG << 2)); // New L bit.
224 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
225 /// 'op' is a valid SetCC operation.
226 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
227 unsigned Operation = Op;
229 Operation ^= 7; // Flip L, G, E bits, but not U.
231 Operation ^= 15; // Flip all of the condition bits.
233 if (Operation > ISD::SETTRUE2)
234 Operation &= ~8; // Don't let N and U bits get set.
236 return ISD::CondCode(Operation);
240 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
241 /// signed operation and 2 if the result is an unsigned comparison. Return zero
242 /// if the operation does not depend on the sign of the input (setne and seteq).
243 static int isSignedOp(ISD::CondCode Opcode) {
245 default: llvm_unreachable("Illegal integer setcc operation!");
247 case ISD::SETNE: return 0;
251 case ISD::SETGE: return 1;
255 case ISD::SETUGE: return 2;
259 /// getSetCCOrOperation - Return the result of a logical OR between different
260 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
261 /// returns SETCC_INVALID if it is not possible to represent the resultant
263 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
265 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
266 // Cannot fold a signed integer setcc with an unsigned integer setcc.
267 return ISD::SETCC_INVALID;
269 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
271 // If the N and U bits get set then the resultant comparison DOES suddenly
272 // care about orderedness, and is true when ordered.
273 if (Op > ISD::SETTRUE2)
274 Op &= ~16; // Clear the U bit if the N bit is set.
276 // Canonicalize illegal integer setcc's.
277 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
280 return ISD::CondCode(Op);
283 /// getSetCCAndOperation - Return the result of a logical AND between different
284 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
285 /// function returns zero if it is not possible to represent the resultant
287 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
289 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
290 // Cannot fold a signed setcc with an unsigned setcc.
291 return ISD::SETCC_INVALID;
293 // Combine all of the condition bits.
294 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
296 // Canonicalize illegal integer setcc's.
300 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
301 case ISD::SETOEQ: // SETEQ & SETU[LG]E
302 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
303 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
304 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
311 //===----------------------------------------------------------------------===//
312 // SDNode Profile Support
313 //===----------------------------------------------------------------------===//
315 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
317 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
321 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
322 /// solely with their pointer.
323 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
324 ID.AddPointer(VTList.VTs);
327 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
329 static void AddNodeIDOperands(FoldingSetNodeID &ID,
330 const SDValue *Ops, unsigned NumOps) {
331 for (; NumOps; --NumOps, ++Ops) {
332 ID.AddPointer(Ops->getNode());
333 ID.AddInteger(Ops->getResNo());
337 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
339 static void AddNodeIDOperands(FoldingSetNodeID &ID,
340 const SDUse *Ops, unsigned NumOps) {
341 for (; NumOps; --NumOps, ++Ops) {
342 ID.AddPointer(Ops->getNode());
343 ID.AddInteger(Ops->getResNo());
347 static void AddNodeIDNode(FoldingSetNodeID &ID,
348 unsigned short OpC, SDVTList VTList,
349 const SDValue *OpList, unsigned N) {
350 AddNodeIDOpcode(ID, OpC);
351 AddNodeIDValueTypes(ID, VTList);
352 AddNodeIDOperands(ID, OpList, N);
355 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
357 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
358 switch (N->getOpcode()) {
359 case ISD::TargetExternalSymbol:
360 case ISD::ExternalSymbol:
361 llvm_unreachable("Should only be used on nodes with operands");
362 default: break; // Normal nodes don't need extra info.
363 case ISD::TargetConstant:
365 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
367 case ISD::TargetConstantFP:
368 case ISD::ConstantFP: {
369 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
372 case ISD::TargetGlobalAddress:
373 case ISD::GlobalAddress:
374 case ISD::TargetGlobalTLSAddress:
375 case ISD::GlobalTLSAddress: {
376 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
377 ID.AddPointer(GA->getGlobal());
378 ID.AddInteger(GA->getOffset());
379 ID.AddInteger(GA->getTargetFlags());
382 case ISD::BasicBlock:
383 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
386 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
390 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
392 case ISD::FrameIndex:
393 case ISD::TargetFrameIndex:
394 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
397 case ISD::TargetJumpTable:
398 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
399 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
401 case ISD::ConstantPool:
402 case ISD::TargetConstantPool: {
403 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
404 ID.AddInteger(CP->getAlignment());
405 ID.AddInteger(CP->getOffset());
406 if (CP->isMachineConstantPoolEntry())
407 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID);
409 ID.AddPointer(CP->getConstVal());
410 ID.AddInteger(CP->getTargetFlags());
414 const LoadSDNode *LD = cast<LoadSDNode>(N);
415 ID.AddInteger(LD->getMemoryVT().getRawBits());
416 ID.AddInteger(LD->getRawSubclassData());
420 const StoreSDNode *ST = cast<StoreSDNode>(N);
421 ID.AddInteger(ST->getMemoryVT().getRawBits());
422 ID.AddInteger(ST->getRawSubclassData());
425 case ISD::ATOMIC_CMP_SWAP:
426 case ISD::ATOMIC_SWAP:
427 case ISD::ATOMIC_LOAD_ADD:
428 case ISD::ATOMIC_LOAD_SUB:
429 case ISD::ATOMIC_LOAD_AND:
430 case ISD::ATOMIC_LOAD_OR:
431 case ISD::ATOMIC_LOAD_XOR:
432 case ISD::ATOMIC_LOAD_NAND:
433 case ISD::ATOMIC_LOAD_MIN:
434 case ISD::ATOMIC_LOAD_MAX:
435 case ISD::ATOMIC_LOAD_UMIN:
436 case ISD::ATOMIC_LOAD_UMAX: {
437 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
438 ID.AddInteger(AT->getMemoryVT().getRawBits());
439 ID.AddInteger(AT->getRawSubclassData());
442 case ISD::VECTOR_SHUFFLE: {
443 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
444 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
446 ID.AddInteger(SVN->getMaskElt(i));
449 case ISD::TargetBlockAddress:
450 case ISD::BlockAddress: {
451 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress());
452 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags());
455 } // end switch (N->getOpcode())
458 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
460 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
461 AddNodeIDOpcode(ID, N->getOpcode());
462 // Add the return value info.
463 AddNodeIDValueTypes(ID, N->getVTList());
464 // Add the operand info.
465 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
467 // Handle SDNode leafs with special info.
468 AddNodeIDCustom(ID, N);
471 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
472 /// the CSE map that carries volatility, temporalness, indexing mode, and
473 /// extension/truncation information.
475 static inline unsigned
476 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile,
477 bool isNonTemporal) {
478 assert((ConvType & 3) == ConvType &&
479 "ConvType may not require more than 2 bits!");
480 assert((AM & 7) == AM &&
481 "AM may not require more than 3 bits!");
485 (isNonTemporal << 6);
488 //===----------------------------------------------------------------------===//
489 // SelectionDAG Class
490 //===----------------------------------------------------------------------===//
492 /// doNotCSE - Return true if CSE should not be performed for this node.
493 static bool doNotCSE(SDNode *N) {
494 if (N->getValueType(0) == MVT::Flag)
495 return true; // Never CSE anything that produces a flag.
497 switch (N->getOpcode()) {
499 case ISD::HANDLENODE:
501 return true; // Never CSE these nodes.
504 // Check that remaining values produced are not flags.
505 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
506 if (N->getValueType(i) == MVT::Flag)
507 return true; // Never CSE anything that produces a flag.
512 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
514 void SelectionDAG::RemoveDeadNodes() {
515 // Create a dummy node (which is not added to allnodes), that adds a reference
516 // to the root node, preventing it from being deleted.
517 HandleSDNode Dummy(getRoot());
519 SmallVector<SDNode*, 128> DeadNodes;
521 // Add all obviously-dead nodes to the DeadNodes worklist.
522 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
524 DeadNodes.push_back(I);
526 RemoveDeadNodes(DeadNodes);
528 // If the root changed (e.g. it was a dead load, update the root).
529 setRoot(Dummy.getValue());
532 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
533 /// given list, and any nodes that become unreachable as a result.
534 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes,
535 DAGUpdateListener *UpdateListener) {
537 // Process the worklist, deleting the nodes and adding their uses to the
539 while (!DeadNodes.empty()) {
540 SDNode *N = DeadNodes.pop_back_val();
543 UpdateListener->NodeDeleted(N, 0);
545 // Take the node out of the appropriate CSE map.
546 RemoveNodeFromCSEMaps(N);
548 // Next, brutally remove the operand list. This is safe to do, as there are
549 // no cycles in the graph.
550 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
552 SDNode *Operand = Use.getNode();
555 // Now that we removed this operand, see if there are no uses of it left.
556 if (Operand->use_empty())
557 DeadNodes.push_back(Operand);
564 void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){
565 SmallVector<SDNode*, 16> DeadNodes(1, N);
566 RemoveDeadNodes(DeadNodes, UpdateListener);
569 void SelectionDAG::DeleteNode(SDNode *N) {
570 // First take this out of the appropriate CSE map.
571 RemoveNodeFromCSEMaps(N);
573 // Finally, remove uses due to operands of this node, remove from the
574 // AllNodes list, and delete the node.
575 DeleteNodeNotInCSEMaps(N);
578 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
579 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
580 assert(N->use_empty() && "Cannot delete a node that is not dead!");
582 // Drop all of the operands and decrement used node's use counts.
588 void SelectionDAG::DeallocateNode(SDNode *N) {
589 if (N->OperandsNeedDelete)
590 delete[] N->OperandList;
592 // Set the opcode to DELETED_NODE to help catch bugs when node
593 // memory is reallocated.
594 N->NodeType = ISD::DELETED_NODE;
596 NodeAllocator.Deallocate(AllNodes.remove(N));
598 // Remove the ordering of this node.
601 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them.
602 SmallVector<SDDbgValue*, 2> &DbgVals = DbgInfo->getSDDbgValues(N);
603 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i)
604 DbgVals[i]->setIsInvalidated();
607 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
608 /// correspond to it. This is useful when we're about to delete or repurpose
609 /// the node. We don't want future request for structurally identical nodes
610 /// to return N anymore.
611 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
613 switch (N->getOpcode()) {
614 case ISD::EntryToken:
615 llvm_unreachable("EntryToken should not be in CSEMaps!");
617 case ISD::HANDLENODE: return false; // noop.
619 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
620 "Cond code doesn't exist!");
621 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
622 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
624 case ISD::ExternalSymbol:
625 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
627 case ISD::TargetExternalSymbol: {
628 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
629 Erased = TargetExternalSymbols.erase(
630 std::pair<std::string,unsigned char>(ESN->getSymbol(),
631 ESN->getTargetFlags()));
634 case ISD::VALUETYPE: {
635 EVT VT = cast<VTSDNode>(N)->getVT();
636 if (VT.isExtended()) {
637 Erased = ExtendedValueTypeNodes.erase(VT);
639 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0;
640 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0;
645 // Remove it from the CSE Map.
646 Erased = CSEMap.RemoveNode(N);
650 // Verify that the node was actually in one of the CSE maps, unless it has a
651 // flag result (which cannot be CSE'd) or is one of the special cases that are
652 // not subject to CSE.
653 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag &&
654 !N->isMachineOpcode() && !doNotCSE(N)) {
657 llvm_unreachable("Node is not in map!");
663 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
664 /// maps and modified in place. Add it back to the CSE maps, unless an identical
665 /// node already exists, in which case transfer all its users to the existing
666 /// node. This transfer can potentially trigger recursive merging.
669 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N,
670 DAGUpdateListener *UpdateListener) {
671 // For node types that aren't CSE'd, just act as if no identical node
674 SDNode *Existing = CSEMap.GetOrInsertNode(N);
676 // If there was already an existing matching node, use ReplaceAllUsesWith
677 // to replace the dead one with the existing one. This can cause
678 // recursive merging of other unrelated nodes down the line.
679 ReplaceAllUsesWith(N, Existing, UpdateListener);
681 // N is now dead. Inform the listener if it exists and delete it.
683 UpdateListener->NodeDeleted(N, Existing);
684 DeleteNodeNotInCSEMaps(N);
689 // If the node doesn't already exist, we updated it. Inform a listener if
692 UpdateListener->NodeUpdated(N);
695 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
696 /// were replaced with those specified. If this node is never memoized,
697 /// return null, otherwise return a pointer to the slot it would take. If a
698 /// node already exists with these operands, the slot will be non-null.
699 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
704 SDValue Ops[] = { Op };
706 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
707 AddNodeIDCustom(ID, N);
708 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
712 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
713 /// were replaced with those specified. If this node is never memoized,
714 /// return null, otherwise return a pointer to the slot it would take. If a
715 /// node already exists with these operands, the slot will be non-null.
716 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
717 SDValue Op1, SDValue Op2,
722 SDValue Ops[] = { Op1, Op2 };
724 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
725 AddNodeIDCustom(ID, N);
726 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
731 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
732 /// were replaced with those specified. If this node is never memoized,
733 /// return null, otherwise return a pointer to the slot it would take. If a
734 /// node already exists with these operands, the slot will be non-null.
735 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
736 const SDValue *Ops,unsigned NumOps,
742 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
743 AddNodeIDCustom(ID, N);
744 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
749 /// VerifyNodeCommon - Sanity check the given node. Aborts if it is invalid.
750 static void VerifyNodeCommon(SDNode *N) {
751 switch (N->getOpcode()) {
754 case ISD::BUILD_PAIR: {
755 EVT VT = N->getValueType(0);
756 assert(N->getNumValues() == 1 && "Too many results!");
757 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
758 "Wrong return type!");
759 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
760 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
761 "Mismatched operand types!");
762 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
763 "Wrong operand type!");
764 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
765 "Wrong return type size");
768 case ISD::BUILD_VECTOR: {
769 assert(N->getNumValues() == 1 && "Too many results!");
770 assert(N->getValueType(0).isVector() && "Wrong return type!");
771 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
772 "Wrong number of operands!");
773 EVT EltVT = N->getValueType(0).getVectorElementType();
774 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I)
775 assert((I->getValueType() == EltVT ||
776 (EltVT.isInteger() && I->getValueType().isInteger() &&
777 EltVT.bitsLE(I->getValueType()))) &&
778 "Wrong operand type!");
784 /// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid.
785 static void VerifySDNode(SDNode *N) {
786 // The SDNode allocators cannot be used to allocate nodes with fields that are
787 // not present in an SDNode!
788 assert(!isa<MemSDNode>(N) && "Bad MemSDNode!");
789 assert(!isa<ShuffleVectorSDNode>(N) && "Bad ShuffleVectorSDNode!");
790 assert(!isa<ConstantSDNode>(N) && "Bad ConstantSDNode!");
791 assert(!isa<ConstantFPSDNode>(N) && "Bad ConstantFPSDNode!");
792 assert(!isa<GlobalAddressSDNode>(N) && "Bad GlobalAddressSDNode!");
793 assert(!isa<FrameIndexSDNode>(N) && "Bad FrameIndexSDNode!");
794 assert(!isa<JumpTableSDNode>(N) && "Bad JumpTableSDNode!");
795 assert(!isa<ConstantPoolSDNode>(N) && "Bad ConstantPoolSDNode!");
796 assert(!isa<BasicBlockSDNode>(N) && "Bad BasicBlockSDNode!");
797 assert(!isa<SrcValueSDNode>(N) && "Bad SrcValueSDNode!");
798 assert(!isa<MDNodeSDNode>(N) && "Bad MDNodeSDNode!");
799 assert(!isa<RegisterSDNode>(N) && "Bad RegisterSDNode!");
800 assert(!isa<BlockAddressSDNode>(N) && "Bad BlockAddressSDNode!");
801 assert(!isa<EHLabelSDNode>(N) && "Bad EHLabelSDNode!");
802 assert(!isa<ExternalSymbolSDNode>(N) && "Bad ExternalSymbolSDNode!");
803 assert(!isa<CondCodeSDNode>(N) && "Bad CondCodeSDNode!");
804 assert(!isa<CvtRndSatSDNode>(N) && "Bad CvtRndSatSDNode!");
805 assert(!isa<VTSDNode>(N) && "Bad VTSDNode!");
806 assert(!isa<MachineSDNode>(N) && "Bad MachineSDNode!");
811 /// VerifyMachineNode - Sanity check the given MachineNode. Aborts if it is
813 static void VerifyMachineNode(SDNode *N) {
814 // The MachineNode allocators cannot be used to allocate nodes with fields
815 // that are not present in a MachineNode!
816 // Currently there are no such nodes.
822 /// getEVTAlignment - Compute the default alignment value for the
825 unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
826 const Type *Ty = VT == MVT::iPTR ?
827 PointerType::get(Type::getInt8Ty(*getContext()), 0) :
828 VT.getTypeForEVT(*getContext());
830 return TLI.getTargetData()->getABITypeAlignment(Ty);
833 // EntryNode could meaningfully have debug info if we can find it...
834 SelectionDAG::SelectionDAG(const TargetMachine &tm)
835 : TM(tm), TLI(*tm.getTargetLowering()), TSI(*tm.getSelectionDAGInfo()),
836 EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Other)),
837 Root(getEntryNode()), Ordering(0) {
838 AllNodes.push_back(&EntryNode);
839 Ordering = new SDNodeOrdering();
840 DbgInfo = new SDDbgInfo();
843 void SelectionDAG::init(MachineFunction &mf) {
845 Context = &mf.getFunction()->getContext();
848 SelectionDAG::~SelectionDAG() {
854 void SelectionDAG::allnodes_clear() {
855 assert(&*AllNodes.begin() == &EntryNode);
856 AllNodes.remove(AllNodes.begin());
857 while (!AllNodes.empty())
858 DeallocateNode(AllNodes.begin());
861 void SelectionDAG::clear() {
863 OperandAllocator.Reset();
866 ExtendedValueTypeNodes.clear();
867 ExternalSymbols.clear();
868 TargetExternalSymbols.clear();
869 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
870 static_cast<CondCodeSDNode*>(0));
871 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
872 static_cast<SDNode*>(0));
874 EntryNode.UseList = 0;
875 AllNodes.push_back(&EntryNode);
876 Root = getEntryNode();
881 SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
882 return VT.bitsGT(Op.getValueType()) ?
883 getNode(ISD::SIGN_EXTEND, DL, VT, Op) :
884 getNode(ISD::TRUNCATE, DL, VT, Op);
887 SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
888 return VT.bitsGT(Op.getValueType()) ?
889 getNode(ISD::ZERO_EXTEND, DL, VT, Op) :
890 getNode(ISD::TRUNCATE, DL, VT, Op);
893 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) {
894 assert(!VT.isVector() &&
895 "getZeroExtendInReg should use the vector element type instead of "
897 if (Op.getValueType() == VT) return Op;
898 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
899 APInt Imm = APInt::getLowBitsSet(BitWidth,
901 return getNode(ISD::AND, DL, Op.getValueType(), Op,
902 getConstant(Imm, Op.getValueType()));
905 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
907 SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) {
908 EVT EltVT = VT.getScalarType();
910 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT);
911 return getNode(ISD::XOR, DL, VT, Val, NegOne);
914 SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) {
915 EVT EltVT = VT.getScalarType();
916 assert((EltVT.getSizeInBits() >= 64 ||
917 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
918 "getConstant with a uint64_t value that doesn't fit in the type!");
919 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
922 SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) {
923 return getConstant(*ConstantInt::get(*Context, Val), VT, isT);
926 SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) {
927 assert(VT.isInteger() && "Cannot create FP integer constant!");
929 EVT EltVT = VT.getScalarType();
930 assert(Val.getBitWidth() == EltVT.getSizeInBits() &&
931 "APInt size does not match type size!");
933 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
935 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
939 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
941 return SDValue(N, 0);
944 N = new (NodeAllocator) ConstantSDNode(isT, &Val, EltVT);
945 CSEMap.InsertNode(N, IP);
946 AllNodes.push_back(N);
949 SDValue Result(N, 0);
951 SmallVector<SDValue, 8> Ops;
952 Ops.assign(VT.getVectorNumElements(), Result);
953 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
958 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
959 return getConstant(Val, TLI.getPointerTy(), isTarget);
963 SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) {
964 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget);
967 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){
968 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
970 EVT EltVT = VT.getScalarType();
972 // Do the map lookup using the actual bit pattern for the floating point
973 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
974 // we don't have issues with SNANs.
975 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
977 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
981 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
983 return SDValue(N, 0);
986 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT);
987 CSEMap.InsertNode(N, IP);
988 AllNodes.push_back(N);
991 SDValue Result(N, 0);
993 SmallVector<SDValue, 8> Ops;
994 Ops.assign(VT.getVectorNumElements(), Result);
995 // FIXME DebugLoc info might be appropriate here
996 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
1001 SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) {
1002 EVT EltVT = VT.getScalarType();
1003 if (EltVT==MVT::f32)
1004 return getConstantFP(APFloat((float)Val), VT, isTarget);
1005 else if (EltVT==MVT::f64)
1006 return getConstantFP(APFloat(Val), VT, isTarget);
1007 else if (EltVT==MVT::f80 || EltVT==MVT::f128) {
1009 APFloat apf = APFloat(Val);
1010 apf.convert(*EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven,
1012 return getConstantFP(apf, VT, isTarget);
1014 assert(0 && "Unsupported type in getConstantFP");
1019 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, DebugLoc DL,
1020 EVT VT, int64_t Offset,
1022 unsigned char TargetFlags) {
1023 assert((TargetFlags == 0 || isTargetGA) &&
1024 "Cannot set target flags on target-independent globals");
1026 // Truncate (with sign-extension) the offset value to the pointer size.
1027 EVT PTy = TLI.getPointerTy();
1028 unsigned BitWidth = PTy.getSizeInBits();
1030 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth));
1032 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
1034 // If GV is an alias then use the aliasee for determining thread-localness.
1035 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
1036 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
1040 if (GVar && GVar->isThreadLocal())
1041 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
1043 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
1045 FoldingSetNodeID ID;
1046 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1048 ID.AddInteger(Offset);
1049 ID.AddInteger(TargetFlags);
1051 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1052 return SDValue(E, 0);
1054 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL, GV, VT,
1055 Offset, TargetFlags);
1056 CSEMap.InsertNode(N, IP);
1057 AllNodes.push_back(N);
1058 return SDValue(N, 0);
1061 SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
1062 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1063 FoldingSetNodeID ID;
1064 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1067 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1068 return SDValue(E, 0);
1070 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget);
1071 CSEMap.InsertNode(N, IP);
1072 AllNodes.push_back(N);
1073 return SDValue(N, 0);
1076 SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
1077 unsigned char TargetFlags) {
1078 assert((TargetFlags == 0 || isTarget) &&
1079 "Cannot set target flags on target-independent jump tables");
1080 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1081 FoldingSetNodeID ID;
1082 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1084 ID.AddInteger(TargetFlags);
1086 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1087 return SDValue(E, 0);
1089 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget,
1091 CSEMap.InsertNode(N, IP);
1092 AllNodes.push_back(N);
1093 return SDValue(N, 0);
1096 SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT,
1097 unsigned Alignment, int Offset,
1099 unsigned char TargetFlags) {
1100 assert((TargetFlags == 0 || isTarget) &&
1101 "Cannot set target flags on target-independent globals");
1103 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1104 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1105 FoldingSetNodeID ID;
1106 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1107 ID.AddInteger(Alignment);
1108 ID.AddInteger(Offset);
1110 ID.AddInteger(TargetFlags);
1112 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1113 return SDValue(E, 0);
1115 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1116 Alignment, TargetFlags);
1117 CSEMap.InsertNode(N, IP);
1118 AllNodes.push_back(N);
1119 return SDValue(N, 0);
1123 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
1124 unsigned Alignment, int Offset,
1126 unsigned char TargetFlags) {
1127 assert((TargetFlags == 0 || isTarget) &&
1128 "Cannot set target flags on target-independent globals");
1130 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1131 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1132 FoldingSetNodeID ID;
1133 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1134 ID.AddInteger(Alignment);
1135 ID.AddInteger(Offset);
1136 C->AddSelectionDAGCSEId(ID);
1137 ID.AddInteger(TargetFlags);
1139 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1140 return SDValue(E, 0);
1142 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1143 Alignment, TargetFlags);
1144 CSEMap.InsertNode(N, IP);
1145 AllNodes.push_back(N);
1146 return SDValue(N, 0);
1149 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1150 FoldingSetNodeID ID;
1151 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1154 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1155 return SDValue(E, 0);
1157 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB);
1158 CSEMap.InsertNode(N, IP);
1159 AllNodes.push_back(N);
1160 return SDValue(N, 0);
1163 SDValue SelectionDAG::getValueType(EVT VT) {
1164 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
1165 ValueTypeNodes.size())
1166 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
1168 SDNode *&N = VT.isExtended() ?
1169 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
1171 if (N) return SDValue(N, 0);
1172 N = new (NodeAllocator) VTSDNode(VT);
1173 AllNodes.push_back(N);
1174 return SDValue(N, 0);
1177 SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
1178 SDNode *&N = ExternalSymbols[Sym];
1179 if (N) return SDValue(N, 0);
1180 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT);
1181 AllNodes.push_back(N);
1182 return SDValue(N, 0);
1185 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
1186 unsigned char TargetFlags) {
1188 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1190 if (N) return SDValue(N, 0);
1191 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1192 AllNodes.push_back(N);
1193 return SDValue(N, 0);
1196 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1197 if ((unsigned)Cond >= CondCodeNodes.size())
1198 CondCodeNodes.resize(Cond+1);
1200 if (CondCodeNodes[Cond] == 0) {
1201 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond);
1202 CondCodeNodes[Cond] = N;
1203 AllNodes.push_back(N);
1206 return SDValue(CondCodeNodes[Cond], 0);
1209 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1210 // the shuffle mask M that point at N1 to point at N2, and indices that point
1211 // N2 to point at N1.
1212 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1214 int NElts = M.size();
1215 for (int i = 0; i != NElts; ++i) {
1223 SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1,
1224 SDValue N2, const int *Mask) {
1225 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE");
1226 assert(VT.isVector() && N1.getValueType().isVector() &&
1227 "Vector Shuffle VTs must be a vectors");
1228 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType()
1229 && "Vector Shuffle VTs must have same element type");
1231 // Canonicalize shuffle undef, undef -> undef
1232 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1233 return getUNDEF(VT);
1235 // Validate that all indices in Mask are within the range of the elements
1236 // input to the shuffle.
1237 unsigned NElts = VT.getVectorNumElements();
1238 SmallVector<int, 8> MaskVec;
1239 for (unsigned i = 0; i != NElts; ++i) {
1240 assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1241 MaskVec.push_back(Mask[i]);
1244 // Canonicalize shuffle v, v -> v, undef
1247 for (unsigned i = 0; i != NElts; ++i)
1248 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1251 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1252 if (N1.getOpcode() == ISD::UNDEF)
1253 commuteShuffle(N1, N2, MaskVec);
1255 // Canonicalize all index into lhs, -> shuffle lhs, undef
1256 // Canonicalize all index into rhs, -> shuffle rhs, undef
1257 bool AllLHS = true, AllRHS = true;
1258 bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1259 for (unsigned i = 0; i != NElts; ++i) {
1260 if (MaskVec[i] >= (int)NElts) {
1265 } else if (MaskVec[i] >= 0) {
1269 if (AllLHS && AllRHS)
1270 return getUNDEF(VT);
1271 if (AllLHS && !N2Undef)
1275 commuteShuffle(N1, N2, MaskVec);
1278 // If Identity shuffle, or all shuffle in to undef, return that node.
1279 bool AllUndef = true;
1280 bool Identity = true;
1281 for (unsigned i = 0; i != NElts; ++i) {
1282 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1283 if (MaskVec[i] >= 0) AllUndef = false;
1285 if (Identity && NElts == N1.getValueType().getVectorNumElements())
1288 return getUNDEF(VT);
1290 FoldingSetNodeID ID;
1291 SDValue Ops[2] = { N1, N2 };
1292 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2);
1293 for (unsigned i = 0; i != NElts; ++i)
1294 ID.AddInteger(MaskVec[i]);
1297 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1298 return SDValue(E, 0);
1300 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1301 // SDNode doesn't have access to it. This memory will be "leaked" when
1302 // the node is deallocated, but recovered when the NodeAllocator is released.
1303 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1304 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1306 ShuffleVectorSDNode *N =
1307 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc);
1308 CSEMap.InsertNode(N, IP);
1309 AllNodes.push_back(N);
1310 return SDValue(N, 0);
1313 SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl,
1314 SDValue Val, SDValue DTy,
1315 SDValue STy, SDValue Rnd, SDValue Sat,
1316 ISD::CvtCode Code) {
1317 // If the src and dest types are the same and the conversion is between
1318 // integer types of the same sign or two floats, no conversion is necessary.
1320 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1323 FoldingSetNodeID ID;
1324 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1325 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5);
1327 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1328 return SDValue(E, 0);
1330 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5,
1332 CSEMap.InsertNode(N, IP);
1333 AllNodes.push_back(N);
1334 return SDValue(N, 0);
1337 SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
1338 FoldingSetNodeID ID;
1339 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1340 ID.AddInteger(RegNo);
1342 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1343 return SDValue(E, 0);
1345 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT);
1346 CSEMap.InsertNode(N, IP);
1347 AllNodes.push_back(N);
1348 return SDValue(N, 0);
1351 SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) {
1352 FoldingSetNodeID ID;
1353 SDValue Ops[] = { Root };
1354 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1);
1355 ID.AddPointer(Label);
1357 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1358 return SDValue(E, 0);
1360 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label);
1361 CSEMap.InsertNode(N, IP);
1362 AllNodes.push_back(N);
1363 return SDValue(N, 0);
1367 SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT,
1369 unsigned char TargetFlags) {
1370 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress;
1372 FoldingSetNodeID ID;
1373 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1375 ID.AddInteger(TargetFlags);
1377 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1378 return SDValue(E, 0);
1380 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, TargetFlags);
1381 CSEMap.InsertNode(N, IP);
1382 AllNodes.push_back(N);
1383 return SDValue(N, 0);
1386 SDValue SelectionDAG::getSrcValue(const Value *V) {
1387 assert((!V || V->getType()->isPointerTy()) &&
1388 "SrcValue is not a pointer?");
1390 FoldingSetNodeID ID;
1391 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1395 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1396 return SDValue(E, 0);
1398 SDNode *N = new (NodeAllocator) SrcValueSDNode(V);
1399 CSEMap.InsertNode(N, IP);
1400 AllNodes.push_back(N);
1401 return SDValue(N, 0);
1404 /// getMDNode - Return an MDNodeSDNode which holds an MDNode.
1405 SDValue SelectionDAG::getMDNode(const MDNode *MD) {
1406 FoldingSetNodeID ID;
1407 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0);
1411 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1412 return SDValue(E, 0);
1414 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD);
1415 CSEMap.InsertNode(N, IP);
1416 AllNodes.push_back(N);
1417 return SDValue(N, 0);
1421 /// getShiftAmountOperand - Return the specified value casted to
1422 /// the target's desired shift amount type.
1423 SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) {
1424 EVT OpTy = Op.getValueType();
1425 MVT ShTy = TLI.getShiftAmountTy();
1426 if (OpTy == ShTy || OpTy.isVector()) return Op;
1428 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1429 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op);
1432 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1433 /// specified value type.
1434 SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
1435 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1436 unsigned ByteSize = VT.getStoreSize();
1437 const Type *Ty = VT.getTypeForEVT(*getContext());
1438 unsigned StackAlign =
1439 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign);
1441 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false);
1442 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1445 /// CreateStackTemporary - Create a stack temporary suitable for holding
1446 /// either of the specified value types.
1447 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
1448 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1449 VT2.getStoreSizeInBits())/8;
1450 const Type *Ty1 = VT1.getTypeForEVT(*getContext());
1451 const Type *Ty2 = VT2.getTypeForEVT(*getContext());
1452 const TargetData *TD = TLI.getTargetData();
1453 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1454 TD->getPrefTypeAlignment(Ty2));
1456 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1457 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false);
1458 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1461 SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
1462 SDValue N2, ISD::CondCode Cond, DebugLoc dl) {
1463 // These setcc operations always fold.
1467 case ISD::SETFALSE2: return getConstant(0, VT);
1469 case ISD::SETTRUE2: return getConstant(1, VT);
1481 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1485 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1486 const APInt &C2 = N2C->getAPIntValue();
1487 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1488 const APInt &C1 = N1C->getAPIntValue();
1491 default: llvm_unreachable("Unknown integer setcc!");
1492 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1493 case ISD::SETNE: return getConstant(C1 != C2, VT);
1494 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1495 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1496 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1497 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1498 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1499 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1500 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1501 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1505 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1506 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1507 // No compile time operations on this type yet.
1508 if (N1C->getValueType(0) == MVT::ppcf128)
1511 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1514 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1515 return getUNDEF(VT);
1517 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1518 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1519 return getUNDEF(VT);
1521 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1522 R==APFloat::cmpLessThan, VT);
1523 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1524 return getUNDEF(VT);
1526 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1527 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1528 return getUNDEF(VT);
1530 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1531 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1532 return getUNDEF(VT);
1534 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1535 R==APFloat::cmpEqual, VT);
1536 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1537 return getUNDEF(VT);
1539 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1540 R==APFloat::cmpEqual, VT);
1541 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1542 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1543 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1544 R==APFloat::cmpEqual, VT);
1545 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1546 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1547 R==APFloat::cmpLessThan, VT);
1548 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1549 R==APFloat::cmpUnordered, VT);
1550 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1551 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1554 // Ensure that the constant occurs on the RHS.
1555 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1559 // Could not fold it.
1563 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1564 /// use this predicate to simplify operations downstream.
1565 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1566 // This predicate is not safe for vector operations.
1567 if (Op.getValueType().isVector())
1570 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1571 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1574 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1575 /// this predicate to simplify operations downstream. Mask is known to be zero
1576 /// for bits that V cannot have.
1577 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1578 unsigned Depth) const {
1579 APInt KnownZero, KnownOne;
1580 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
1581 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1582 return (KnownZero & Mask) == Mask;
1585 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1586 /// known to be either zero or one and return them in the KnownZero/KnownOne
1587 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1589 void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask,
1590 APInt &KnownZero, APInt &KnownOne,
1591 unsigned Depth) const {
1592 unsigned BitWidth = Mask.getBitWidth();
1593 assert(BitWidth == Op.getValueType().getScalarType().getSizeInBits() &&
1594 "Mask size mismatches value type size!");
1596 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1597 if (Depth == 6 || Mask == 0)
1598 return; // Limit search depth.
1600 APInt KnownZero2, KnownOne2;
1602 switch (Op.getOpcode()) {
1604 // We know all of the bits for a constant!
1605 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask;
1606 KnownZero = ~KnownOne & Mask;
1609 // If either the LHS or the RHS are Zero, the result is zero.
1610 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1611 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero,
1612 KnownZero2, KnownOne2, Depth+1);
1613 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1614 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1616 // Output known-1 bits are only known if set in both the LHS & RHS.
1617 KnownOne &= KnownOne2;
1618 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1619 KnownZero |= KnownZero2;
1622 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1623 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne,
1624 KnownZero2, KnownOne2, Depth+1);
1625 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1626 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1628 // Output known-0 bits are only known if clear in both the LHS & RHS.
1629 KnownZero &= KnownZero2;
1630 // Output known-1 are known to be set if set in either the LHS | RHS.
1631 KnownOne |= KnownOne2;
1634 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1635 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
1636 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1637 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1639 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1640 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1641 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1642 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1643 KnownZero = KnownZeroOut;
1647 APInt Mask2 = APInt::getAllOnesValue(BitWidth);
1648 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1);
1649 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1650 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1651 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1653 // If low bits are zero in either operand, output low known-0 bits.
1654 // Also compute a conserative estimate for high known-0 bits.
1655 // More trickiness is possible, but this is sufficient for the
1656 // interesting case of alignment computation.
1657 KnownOne.clearAllBits();
1658 unsigned TrailZ = KnownZero.countTrailingOnes() +
1659 KnownZero2.countTrailingOnes();
1660 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1661 KnownZero2.countLeadingOnes(),
1662 BitWidth) - BitWidth;
1664 TrailZ = std::min(TrailZ, BitWidth);
1665 LeadZ = std::min(LeadZ, BitWidth);
1666 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1667 APInt::getHighBitsSet(BitWidth, LeadZ);
1672 // For the purposes of computing leading zeros we can conservatively
1673 // treat a udiv as a logical right shift by the power of 2 known to
1674 // be less than the denominator.
1675 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1676 ComputeMaskedBits(Op.getOperand(0),
1677 AllOnes, KnownZero2, KnownOne2, Depth+1);
1678 unsigned LeadZ = KnownZero2.countLeadingOnes();
1680 KnownOne2.clearAllBits();
1681 KnownZero2.clearAllBits();
1682 ComputeMaskedBits(Op.getOperand(1),
1683 AllOnes, KnownZero2, KnownOne2, Depth+1);
1684 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1685 if (RHSUnknownLeadingOnes != BitWidth)
1686 LeadZ = std::min(BitWidth,
1687 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1689 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask;
1693 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1);
1694 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1);
1695 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1696 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1698 // Only known if known in both the LHS and RHS.
1699 KnownOne &= KnownOne2;
1700 KnownZero &= KnownZero2;
1702 case ISD::SELECT_CC:
1703 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1);
1704 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1);
1705 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1706 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1708 // Only known if known in both the LHS and RHS.
1709 KnownOne &= KnownOne2;
1710 KnownZero &= KnownZero2;
1718 if (Op.getResNo() != 1)
1720 // The boolean result conforms to getBooleanContents. Fall through.
1722 // If we know the result of a setcc has the top bits zero, use this info.
1723 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent &&
1725 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1728 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1729 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1730 unsigned ShAmt = SA->getZExtValue();
1732 // If the shift count is an invalid immediate, don't do anything.
1733 if (ShAmt >= BitWidth)
1736 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt),
1737 KnownZero, KnownOne, Depth+1);
1738 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1739 KnownZero <<= ShAmt;
1741 // low bits known zero.
1742 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1746 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1747 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1748 unsigned ShAmt = SA->getZExtValue();
1750 // If the shift count is an invalid immediate, don't do anything.
1751 if (ShAmt >= BitWidth)
1754 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt),
1755 KnownZero, KnownOne, Depth+1);
1756 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1757 KnownZero = KnownZero.lshr(ShAmt);
1758 KnownOne = KnownOne.lshr(ShAmt);
1760 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1761 KnownZero |= HighBits; // High bits known zero.
1765 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1766 unsigned ShAmt = SA->getZExtValue();
1768 // If the shift count is an invalid immediate, don't do anything.
1769 if (ShAmt >= BitWidth)
1772 APInt InDemandedMask = (Mask << ShAmt);
1773 // If any of the demanded bits are produced by the sign extension, we also
1774 // demand the input sign bit.
1775 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1776 if (HighBits.getBoolValue())
1777 InDemandedMask |= APInt::getSignBit(BitWidth);
1779 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne,
1781 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1782 KnownZero = KnownZero.lshr(ShAmt);
1783 KnownOne = KnownOne.lshr(ShAmt);
1785 // Handle the sign bits.
1786 APInt SignBit = APInt::getSignBit(BitWidth);
1787 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1789 if (KnownZero.intersects(SignBit)) {
1790 KnownZero |= HighBits; // New bits are known zero.
1791 } else if (KnownOne.intersects(SignBit)) {
1792 KnownOne |= HighBits; // New bits are known one.
1796 case ISD::SIGN_EXTEND_INREG: {
1797 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1798 unsigned EBits = EVT.getScalarType().getSizeInBits();
1800 // Sign extension. Compute the demanded bits in the result that are not
1801 // present in the input.
1802 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask;
1804 APInt InSignBit = APInt::getSignBit(EBits);
1805 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits);
1807 // If the sign extended bits are demanded, we know that the sign
1809 InSignBit = InSignBit.zext(BitWidth);
1810 if (NewBits.getBoolValue())
1811 InputDemandedBits |= InSignBit;
1813 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits,
1814 KnownZero, KnownOne, Depth+1);
1815 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1817 // If the sign bit of the input is known set or clear, then we know the
1818 // top bits of the result.
1819 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1820 KnownZero |= NewBits;
1821 KnownOne &= ~NewBits;
1822 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1823 KnownOne |= NewBits;
1824 KnownZero &= ~NewBits;
1825 } else { // Input sign bit unknown
1826 KnownZero &= ~NewBits;
1827 KnownOne &= ~NewBits;
1834 unsigned LowBits = Log2_32(BitWidth)+1;
1835 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1836 KnownOne.clearAllBits();
1840 if (ISD::isZEXTLoad(Op.getNode())) {
1841 LoadSDNode *LD = cast<LoadSDNode>(Op);
1842 EVT VT = LD->getMemoryVT();
1843 unsigned MemBits = VT.getScalarType().getSizeInBits();
1844 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask;
1848 case ISD::ZERO_EXTEND: {
1849 EVT InVT = Op.getOperand(0).getValueType();
1850 unsigned InBits = InVT.getScalarType().getSizeInBits();
1851 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1852 APInt InMask = Mask.trunc(InBits);
1853 KnownZero = KnownZero.trunc(InBits);
1854 KnownOne = KnownOne.trunc(InBits);
1855 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1856 KnownZero = KnownZero.zext(BitWidth);
1857 KnownOne = KnownOne.zext(BitWidth);
1858 KnownZero |= NewBits;
1861 case ISD::SIGN_EXTEND: {
1862 EVT InVT = Op.getOperand(0).getValueType();
1863 unsigned InBits = InVT.getScalarType().getSizeInBits();
1864 APInt InSignBit = APInt::getSignBit(InBits);
1865 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1866 APInt InMask = Mask.trunc(InBits);
1868 // If any of the sign extended bits are demanded, we know that the sign
1869 // bit is demanded. Temporarily set this bit in the mask for our callee.
1870 if (NewBits.getBoolValue())
1871 InMask |= InSignBit;
1873 KnownZero = KnownZero.trunc(InBits);
1874 KnownOne = KnownOne.trunc(InBits);
1875 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1877 // Note if the sign bit is known to be zero or one.
1878 bool SignBitKnownZero = KnownZero.isNegative();
1879 bool SignBitKnownOne = KnownOne.isNegative();
1880 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1881 "Sign bit can't be known to be both zero and one!");
1883 // If the sign bit wasn't actually demanded by our caller, we don't
1884 // want it set in the KnownZero and KnownOne result values. Reset the
1885 // mask and reapply it to the result values.
1886 InMask = Mask.trunc(InBits);
1887 KnownZero &= InMask;
1890 KnownZero = KnownZero.zext(BitWidth);
1891 KnownOne = KnownOne.zext(BitWidth);
1893 // If the sign bit is known zero or one, the top bits match.
1894 if (SignBitKnownZero)
1895 KnownZero |= NewBits;
1896 else if (SignBitKnownOne)
1897 KnownOne |= NewBits;
1900 case ISD::ANY_EXTEND: {
1901 EVT InVT = Op.getOperand(0).getValueType();
1902 unsigned InBits = InVT.getScalarType().getSizeInBits();
1903 APInt InMask = Mask.trunc(InBits);
1904 KnownZero = KnownZero.trunc(InBits);
1905 KnownOne = KnownOne.trunc(InBits);
1906 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1907 KnownZero = KnownZero.zext(BitWidth);
1908 KnownOne = KnownOne.zext(BitWidth);
1911 case ISD::TRUNCATE: {
1912 EVT InVT = Op.getOperand(0).getValueType();
1913 unsigned InBits = InVT.getScalarType().getSizeInBits();
1914 APInt InMask = Mask.zext(InBits);
1915 KnownZero = KnownZero.zext(InBits);
1916 KnownOne = KnownOne.zext(InBits);
1917 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1918 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1919 KnownZero = KnownZero.trunc(BitWidth);
1920 KnownOne = KnownOne.trunc(BitWidth);
1923 case ISD::AssertZext: {
1924 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1925 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1926 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
1928 KnownZero |= (~InMask) & Mask;
1932 // All bits are zero except the low bit.
1933 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1937 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
1938 // We know that the top bits of C-X are clear if X contains less bits
1939 // than C (i.e. no wrap-around can happen). For example, 20-X is
1940 // positive if we can prove that X is >= 0 and < 16.
1941 if (CLHS->getAPIntValue().isNonNegative()) {
1942 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
1943 // NLZ can't be BitWidth with no sign bit
1944 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
1945 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2,
1948 // If all of the MaskV bits are known to be zero, then we know the
1949 // output top bits are zero, because we now know that the output is
1951 if ((KnownZero2 & MaskV) == MaskV) {
1952 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
1953 // Top bits known zero.
1954 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask;
1961 // Output known-0 bits are known if clear or set in both the low clear bits
1962 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
1963 // low 3 bits clear.
1964 APInt Mask2 = APInt::getLowBitsSet(BitWidth,
1965 BitWidth - Mask.countLeadingZeros());
1966 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1967 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1968 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
1970 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1);
1971 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1972 KnownZeroOut = std::min(KnownZeroOut,
1973 KnownZero2.countTrailingOnes());
1975 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
1979 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1980 const APInt &RA = Rem->getAPIntValue().abs();
1981 if (RA.isPowerOf2()) {
1982 APInt LowBits = RA - 1;
1983 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
1984 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1);
1986 // The low bits of the first operand are unchanged by the srem.
1987 KnownZero = KnownZero2 & LowBits;
1988 KnownOne = KnownOne2 & LowBits;
1990 // If the first operand is non-negative or has all low bits zero, then
1991 // the upper bits are all zero.
1992 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
1993 KnownZero |= ~LowBits;
1995 // If the first operand is negative and not all low bits are zero, then
1996 // the upper bits are all one.
1997 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0))
1998 KnownOne |= ~LowBits;
2003 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2008 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2009 const APInt &RA = Rem->getAPIntValue();
2010 if (RA.isPowerOf2()) {
2011 APInt LowBits = (RA - 1);
2012 APInt Mask2 = LowBits & Mask;
2013 KnownZero |= ~LowBits & Mask;
2014 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1);
2015 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2020 // Since the result is less than or equal to either operand, any leading
2021 // zero bits in either operand must also exist in the result.
2022 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
2023 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne,
2025 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2,
2028 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
2029 KnownZero2.countLeadingOnes());
2030 KnownOne.clearAllBits();
2031 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
2035 // Allow the target to implement this method for its nodes.
2036 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) {
2037 case ISD::INTRINSIC_WO_CHAIN:
2038 case ISD::INTRINSIC_W_CHAIN:
2039 case ISD::INTRINSIC_VOID:
2040 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this,
2047 /// ComputeNumSignBits - Return the number of times the sign bit of the
2048 /// register is replicated into the other bits. We know that at least 1 bit
2049 /// is always equal to the sign bit (itself), but other cases can give us
2050 /// information. For example, immediately after an "SRA X, 2", we know that
2051 /// the top 3 bits are all equal to each other, so we return 3.
2052 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
2053 EVT VT = Op.getValueType();
2054 assert(VT.isInteger() && "Invalid VT!");
2055 unsigned VTBits = VT.getScalarType().getSizeInBits();
2057 unsigned FirstAnswer = 1;
2060 return 1; // Limit search depth.
2062 switch (Op.getOpcode()) {
2064 case ISD::AssertSext:
2065 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2066 return VTBits-Tmp+1;
2067 case ISD::AssertZext:
2068 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2071 case ISD::Constant: {
2072 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2073 // If negative, return # leading ones.
2074 if (Val.isNegative())
2075 return Val.countLeadingOnes();
2077 // Return # leading zeros.
2078 return Val.countLeadingZeros();
2081 case ISD::SIGN_EXTEND:
2082 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
2083 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2085 case ISD::SIGN_EXTEND_INREG:
2086 // Max of the input and what this extends.
2088 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits();
2091 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2092 return std::max(Tmp, Tmp2);
2095 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2096 // SRA X, C -> adds C sign bits.
2097 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2098 Tmp += C->getZExtValue();
2099 if (Tmp > VTBits) Tmp = VTBits;
2103 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2104 // shl destroys sign bits.
2105 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2106 if (C->getZExtValue() >= VTBits || // Bad shift.
2107 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
2108 return Tmp - C->getZExtValue();
2113 case ISD::XOR: // NOT is handled here.
2114 // Logical binary ops preserve the number of sign bits at the worst.
2115 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2117 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2118 FirstAnswer = std::min(Tmp, Tmp2);
2119 // We computed what we know about the sign bits as our first
2120 // answer. Now proceed to the generic code that uses
2121 // ComputeMaskedBits, and pick whichever answer is better.
2126 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2127 if (Tmp == 1) return 1; // Early out.
2128 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2129 return std::min(Tmp, Tmp2);
2137 if (Op.getResNo() != 1)
2139 // The boolean result conforms to getBooleanContents. Fall through.
2141 // If setcc returns 0/-1, all bits are sign bits.
2142 if (TLI.getBooleanContents() ==
2143 TargetLowering::ZeroOrNegativeOneBooleanContent)
2148 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2149 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2151 // Handle rotate right by N like a rotate left by 32-N.
2152 if (Op.getOpcode() == ISD::ROTR)
2153 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2155 // If we aren't rotating out all of the known-in sign bits, return the
2156 // number that are left. This handles rotl(sext(x), 1) for example.
2157 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2158 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2162 // Add can have at most one carry bit. Thus we know that the output
2163 // is, at worst, one more bit than the inputs.
2164 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2165 if (Tmp == 1) return 1; // Early out.
2167 // Special case decrementing a value (ADD X, -1):
2168 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2169 if (CRHS->isAllOnesValue()) {
2170 APInt KnownZero, KnownOne;
2171 APInt Mask = APInt::getAllOnesValue(VTBits);
2172 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
2174 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2176 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2179 // If we are subtracting one from a positive number, there is no carry
2180 // out of the result.
2181 if (KnownZero.isNegative())
2185 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2186 if (Tmp2 == 1) return 1;
2187 return std::min(Tmp, Tmp2)-1;
2191 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2192 if (Tmp2 == 1) return 1;
2195 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2196 if (CLHS->isNullValue()) {
2197 APInt KnownZero, KnownOne;
2198 APInt Mask = APInt::getAllOnesValue(VTBits);
2199 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
2200 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2202 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2205 // If the input is known to be positive (the sign bit is known clear),
2206 // the output of the NEG has the same number of sign bits as the input.
2207 if (KnownZero.isNegative())
2210 // Otherwise, we treat this like a SUB.
2213 // Sub can have at most one carry bit. Thus we know that the output
2214 // is, at worst, one more bit than the inputs.
2215 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2216 if (Tmp == 1) return 1; // Early out.
2217 return std::min(Tmp, Tmp2)-1;
2220 // FIXME: it's tricky to do anything useful for this, but it is an important
2221 // case for targets like X86.
2225 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2226 if (Op.getOpcode() == ISD::LOAD) {
2227 LoadSDNode *LD = cast<LoadSDNode>(Op);
2228 unsigned ExtType = LD->getExtensionType();
2231 case ISD::SEXTLOAD: // '17' bits known
2232 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2233 return VTBits-Tmp+1;
2234 case ISD::ZEXTLOAD: // '16' bits known
2235 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2240 // Allow the target to implement this method for its nodes.
2241 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2242 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2243 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2244 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2245 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2246 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2249 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2250 // use this information.
2251 APInt KnownZero, KnownOne;
2252 APInt Mask = APInt::getAllOnesValue(VTBits);
2253 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
2255 if (KnownZero.isNegative()) { // sign bit is 0
2257 } else if (KnownOne.isNegative()) { // sign bit is 1;
2264 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2265 // the number of identical bits in the top of the input value.
2267 Mask <<= Mask.getBitWidth()-VTBits;
2268 // Return # leading zeros. We use 'min' here in case Val was zero before
2269 // shifting. We don't want to return '64' as for an i32 "0".
2270 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2273 bool SelectionDAG::isKnownNeverNaN(SDValue Op) const {
2274 // If we're told that NaNs won't happen, assume they won't.
2278 // If the value is a constant, we can obviously see if it is a NaN or not.
2279 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2280 return !C->getValueAPF().isNaN();
2282 // TODO: Recognize more cases here.
2287 bool SelectionDAG::isKnownNeverZero(SDValue Op) const {
2288 // If the value is a constant, we can obviously see if it is a zero or not.
2289 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2290 return !C->isZero();
2292 // TODO: Recognize more cases here.
2297 bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const {
2298 // Check the obvious case.
2299 if (A == B) return true;
2301 // For for negative and positive zero.
2302 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A))
2303 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B))
2304 if (CA->isZero() && CB->isZero()) return true;
2306 // Otherwise they may not be equal.
2310 bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const {
2311 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op);
2312 if (!GA) return false;
2313 if (GA->getOffset() != 0) return false;
2314 const GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal());
2315 if (!GV) return false;
2316 return MF->getMMI().hasDebugInfo();
2320 /// getNode - Gets or creates the specified node.
2322 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) {
2323 FoldingSetNodeID ID;
2324 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2326 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2327 return SDValue(E, 0);
2329 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT));
2330 CSEMap.InsertNode(N, IP);
2332 AllNodes.push_back(N);
2336 return SDValue(N, 0);
2339 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
2340 EVT VT, SDValue Operand) {
2341 // Constant fold unary operations with an integer constant operand.
2342 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2343 const APInt &Val = C->getAPIntValue();
2346 case ISD::SIGN_EXTEND:
2347 return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), VT);
2348 case ISD::ANY_EXTEND:
2349 case ISD::ZERO_EXTEND:
2351 return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), VT);
2352 case ISD::UINT_TO_FP:
2353 case ISD::SINT_TO_FP: {
2354 // No compile time operations on ppcf128.
2355 if (VT == MVT::ppcf128) break;
2356 APFloat apf(APInt::getNullValue(VT.getSizeInBits()));
2357 (void)apf.convertFromAPInt(Val,
2358 Opcode==ISD::SINT_TO_FP,
2359 APFloat::rmNearestTiesToEven);
2360 return getConstantFP(apf, VT);
2363 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2364 return getConstantFP(Val.bitsToFloat(), VT);
2365 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2366 return getConstantFP(Val.bitsToDouble(), VT);
2369 return getConstant(Val.byteSwap(), VT);
2371 return getConstant(Val.countPopulation(), VT);
2373 return getConstant(Val.countLeadingZeros(), VT);
2375 return getConstant(Val.countTrailingZeros(), VT);
2379 // Constant fold unary operations with a floating point constant operand.
2380 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2381 APFloat V = C->getValueAPF(); // make copy
2382 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) {
2386 return getConstantFP(V, VT);
2389 return getConstantFP(V, VT);
2391 case ISD::FP_EXTEND: {
2393 // This can return overflow, underflow, or inexact; we don't care.
2394 // FIXME need to be more flexible about rounding mode.
2395 (void)V.convert(*EVTToAPFloatSemantics(VT),
2396 APFloat::rmNearestTiesToEven, &ignored);
2397 return getConstantFP(V, VT);
2399 case ISD::FP_TO_SINT:
2400 case ISD::FP_TO_UINT: {
2403 assert(integerPartWidth >= 64);
2404 // FIXME need to be more flexible about rounding mode.
2405 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2406 Opcode==ISD::FP_TO_SINT,
2407 APFloat::rmTowardZero, &ignored);
2408 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2410 APInt api(VT.getSizeInBits(), 2, x);
2411 return getConstant(api, VT);
2414 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2415 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2416 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2417 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2423 unsigned OpOpcode = Operand.getNode()->getOpcode();
2425 case ISD::TokenFactor:
2426 case ISD::MERGE_VALUES:
2427 case ISD::CONCAT_VECTORS:
2428 return Operand; // Factor, merge or concat of one node? No need.
2429 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
2430 case ISD::FP_EXTEND:
2431 assert(VT.isFloatingPoint() &&
2432 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2433 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2434 assert((!VT.isVector() ||
2435 VT.getVectorNumElements() ==
2436 Operand.getValueType().getVectorNumElements()) &&
2437 "Vector element count mismatch!");
2438 if (Operand.getOpcode() == ISD::UNDEF)
2439 return getUNDEF(VT);
2441 case ISD::SIGN_EXTEND:
2442 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2443 "Invalid SIGN_EXTEND!");
2444 if (Operand.getValueType() == VT) return Operand; // noop extension
2445 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2446 "Invalid sext node, dst < src!");
2447 assert((!VT.isVector() ||
2448 VT.getVectorNumElements() ==
2449 Operand.getValueType().getVectorNumElements()) &&
2450 "Vector element count mismatch!");
2451 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2452 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2454 case ISD::ZERO_EXTEND:
2455 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2456 "Invalid ZERO_EXTEND!");
2457 if (Operand.getValueType() == VT) return Operand; // noop extension
2458 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2459 "Invalid zext node, dst < src!");
2460 assert((!VT.isVector() ||
2461 VT.getVectorNumElements() ==
2462 Operand.getValueType().getVectorNumElements()) &&
2463 "Vector element count mismatch!");
2464 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2465 return getNode(ISD::ZERO_EXTEND, DL, VT,
2466 Operand.getNode()->getOperand(0));
2468 case ISD::ANY_EXTEND:
2469 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2470 "Invalid ANY_EXTEND!");
2471 if (Operand.getValueType() == VT) return Operand; // noop extension
2472 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2473 "Invalid anyext node, dst < src!");
2474 assert((!VT.isVector() ||
2475 VT.getVectorNumElements() ==
2476 Operand.getValueType().getVectorNumElements()) &&
2477 "Vector element count mismatch!");
2479 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2480 OpOpcode == ISD::ANY_EXTEND)
2481 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2482 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2484 // (ext (trunx x)) -> x
2485 if (OpOpcode == ISD::TRUNCATE) {
2486 SDValue OpOp = Operand.getNode()->getOperand(0);
2487 if (OpOp.getValueType() == VT)
2492 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2493 "Invalid TRUNCATE!");
2494 if (Operand.getValueType() == VT) return Operand; // noop truncate
2495 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) &&
2496 "Invalid truncate node, src < dst!");
2497 assert((!VT.isVector() ||
2498 VT.getVectorNumElements() ==
2499 Operand.getValueType().getVectorNumElements()) &&
2500 "Vector element count mismatch!");
2501 if (OpOpcode == ISD::TRUNCATE)
2502 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2503 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2504 OpOpcode == ISD::ANY_EXTEND) {
2505 // If the source is smaller than the dest, we still need an extend.
2506 if (Operand.getNode()->getOperand(0).getValueType().getScalarType()
2507 .bitsLT(VT.getScalarType()))
2508 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2509 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2510 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2512 return Operand.getNode()->getOperand(0);
2516 // Basic sanity checking.
2517 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2518 && "Cannot BITCAST between types of different sizes!");
2519 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2520 if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x)
2521 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0));
2522 if (OpOpcode == ISD::UNDEF)
2523 return getUNDEF(VT);
2525 case ISD::SCALAR_TO_VECTOR:
2526 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2527 (VT.getVectorElementType() == Operand.getValueType() ||
2528 (VT.getVectorElementType().isInteger() &&
2529 Operand.getValueType().isInteger() &&
2530 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
2531 "Illegal SCALAR_TO_VECTOR node!");
2532 if (OpOpcode == ISD::UNDEF)
2533 return getUNDEF(VT);
2534 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2535 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2536 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2537 Operand.getConstantOperandVal(1) == 0 &&
2538 Operand.getOperand(0).getValueType() == VT)
2539 return Operand.getOperand(0);
2542 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
2543 if (UnsafeFPMath && OpOpcode == ISD::FSUB)
2544 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
2545 Operand.getNode()->getOperand(0));
2546 if (OpOpcode == ISD::FNEG) // --X -> X
2547 return Operand.getNode()->getOperand(0);
2550 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2551 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
2556 SDVTList VTs = getVTList(VT);
2557 if (VT != MVT::Flag) { // Don't CSE flag producing nodes
2558 FoldingSetNodeID ID;
2559 SDValue Ops[1] = { Operand };
2560 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2562 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2563 return SDValue(E, 0);
2565 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2566 CSEMap.InsertNode(N, IP);
2568 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2571 AllNodes.push_back(N);
2575 return SDValue(N, 0);
2578 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2580 ConstantSDNode *Cst1,
2581 ConstantSDNode *Cst2) {
2582 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
2585 case ISD::ADD: return getConstant(C1 + C2, VT);
2586 case ISD::SUB: return getConstant(C1 - C2, VT);
2587 case ISD::MUL: return getConstant(C1 * C2, VT);
2589 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2592 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2595 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2598 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2600 case ISD::AND: return getConstant(C1 & C2, VT);
2601 case ISD::OR: return getConstant(C1 | C2, VT);
2602 case ISD::XOR: return getConstant(C1 ^ C2, VT);
2603 case ISD::SHL: return getConstant(C1 << C2, VT);
2604 case ISD::SRL: return getConstant(C1.lshr(C2), VT);
2605 case ISD::SRA: return getConstant(C1.ashr(C2), VT);
2606 case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2607 case ISD::ROTR: return getConstant(C1.rotr(C2), VT);
2614 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2615 SDValue N1, SDValue N2) {
2616 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2617 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2620 case ISD::TokenFactor:
2621 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2622 N2.getValueType() == MVT::Other && "Invalid token factor!");
2623 // Fold trivial token factors.
2624 if (N1.getOpcode() == ISD::EntryToken) return N2;
2625 if (N2.getOpcode() == ISD::EntryToken) return N1;
2626 if (N1 == N2) return N1;
2628 case ISD::CONCAT_VECTORS:
2629 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2630 // one big BUILD_VECTOR.
2631 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2632 N2.getOpcode() == ISD::BUILD_VECTOR) {
2633 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
2634 N1.getNode()->op_end());
2635 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
2636 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2640 assert(VT.isInteger() && "This operator does not apply to FP types!");
2641 assert(N1.getValueType() == N2.getValueType() &&
2642 N1.getValueType() == VT && "Binary operator types must match!");
2643 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2644 // worth handling here.
2645 if (N2C && N2C->isNullValue())
2647 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2654 assert(VT.isInteger() && "This operator does not apply to FP types!");
2655 assert(N1.getValueType() == N2.getValueType() &&
2656 N1.getValueType() == VT && "Binary operator types must match!");
2657 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2658 // it's worth handling here.
2659 if (N2C && N2C->isNullValue())
2669 assert(VT.isInteger() && "This operator does not apply to FP types!");
2670 assert(N1.getValueType() == N2.getValueType() &&
2671 N1.getValueType() == VT && "Binary operator types must match!");
2679 if (Opcode == ISD::FADD) {
2681 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
2682 if (CFP->getValueAPF().isZero())
2685 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2686 if (CFP->getValueAPF().isZero())
2688 } else if (Opcode == ISD::FSUB) {
2690 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2691 if (CFP->getValueAPF().isZero())
2695 assert(VT.isFloatingPoint() && "This operator only applies to FP types!");
2696 assert(N1.getValueType() == N2.getValueType() &&
2697 N1.getValueType() == VT && "Binary operator types must match!");
2699 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2700 assert(N1.getValueType() == VT &&
2701 N1.getValueType().isFloatingPoint() &&
2702 N2.getValueType().isFloatingPoint() &&
2703 "Invalid FCOPYSIGN!");
2710 assert(VT == N1.getValueType() &&
2711 "Shift operators return type must be the same as their first arg");
2712 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2713 "Shifts only work on integers");
2715 // Always fold shifts of i1 values so the code generator doesn't need to
2716 // handle them. Since we know the size of the shift has to be less than the
2717 // size of the value, the shift/rotate count is guaranteed to be zero.
2720 if (N2C && N2C->isNullValue())
2723 case ISD::FP_ROUND_INREG: {
2724 EVT EVT = cast<VTSDNode>(N2)->getVT();
2725 assert(VT == N1.getValueType() && "Not an inreg round!");
2726 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2727 "Cannot FP_ROUND_INREG integer types");
2728 assert(EVT.isVector() == VT.isVector() &&
2729 "FP_ROUND_INREG type should be vector iff the operand "
2731 assert((!EVT.isVector() ||
2732 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2733 "Vector element counts must match in FP_ROUND_INREG");
2734 assert(EVT.bitsLE(VT) && "Not rounding down!");
2735 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2739 assert(VT.isFloatingPoint() &&
2740 N1.getValueType().isFloatingPoint() &&
2741 VT.bitsLE(N1.getValueType()) &&
2742 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2743 if (N1.getValueType() == VT) return N1; // noop conversion.
2745 case ISD::AssertSext:
2746 case ISD::AssertZext: {
2747 EVT EVT = cast<VTSDNode>(N2)->getVT();
2748 assert(VT == N1.getValueType() && "Not an inreg extend!");
2749 assert(VT.isInteger() && EVT.isInteger() &&
2750 "Cannot *_EXTEND_INREG FP types");
2751 assert(!EVT.isVector() &&
2752 "AssertSExt/AssertZExt type should be the vector element type "
2753 "rather than the vector type!");
2754 assert(EVT.bitsLE(VT) && "Not extending!");
2755 if (VT == EVT) return N1; // noop assertion.
2758 case ISD::SIGN_EXTEND_INREG: {
2759 EVT EVT = cast<VTSDNode>(N2)->getVT();
2760 assert(VT == N1.getValueType() && "Not an inreg extend!");
2761 assert(VT.isInteger() && EVT.isInteger() &&
2762 "Cannot *_EXTEND_INREG FP types");
2763 assert(EVT.isVector() == VT.isVector() &&
2764 "SIGN_EXTEND_INREG type should be vector iff the operand "
2766 assert((!EVT.isVector() ||
2767 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2768 "Vector element counts must match in SIGN_EXTEND_INREG");
2769 assert(EVT.bitsLE(VT) && "Not extending!");
2770 if (EVT == VT) return N1; // Not actually extending
2773 APInt Val = N1C->getAPIntValue();
2774 unsigned FromBits = EVT.getScalarType().getSizeInBits();
2775 Val <<= Val.getBitWidth()-FromBits;
2776 Val = Val.ashr(Val.getBitWidth()-FromBits);
2777 return getConstant(Val, VT);
2781 case ISD::EXTRACT_VECTOR_ELT:
2782 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2783 if (N1.getOpcode() == ISD::UNDEF)
2784 return getUNDEF(VT);
2786 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2787 // expanding copies of large vectors from registers.
2789 N1.getOpcode() == ISD::CONCAT_VECTORS &&
2790 N1.getNumOperands() > 0) {
2792 N1.getOperand(0).getValueType().getVectorNumElements();
2793 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
2794 N1.getOperand(N2C->getZExtValue() / Factor),
2795 getConstant(N2C->getZExtValue() % Factor,
2796 N2.getValueType()));
2799 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2800 // expanding large vector constants.
2801 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
2802 SDValue Elt = N1.getOperand(N2C->getZExtValue());
2803 EVT VEltTy = N1.getValueType().getVectorElementType();
2804 if (Elt.getValueType() != VEltTy) {
2805 // If the vector element type is not legal, the BUILD_VECTOR operands
2806 // are promoted and implicitly truncated. Make that explicit here.
2807 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt);
2810 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT
2811 // result is implicitly extended.
2812 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt);
2817 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2818 // operations are lowered to scalars.
2819 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2820 // If the indices are the same, return the inserted element else
2821 // if the indices are known different, extract the element from
2822 // the original vector.
2823 SDValue N1Op2 = N1.getOperand(2);
2824 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode());
2826 if (N1Op2C && N2C) {
2827 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) {
2828 if (VT == N1.getOperand(1).getValueType())
2829 return N1.getOperand(1);
2831 return getSExtOrTrunc(N1.getOperand(1), DL, VT);
2834 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
2838 case ISD::EXTRACT_ELEMENT:
2839 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
2840 assert(!N1.getValueType().isVector() && !VT.isVector() &&
2841 (N1.getValueType().isInteger() == VT.isInteger()) &&
2842 "Wrong types for EXTRACT_ELEMENT!");
2844 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2845 // 64-bit integers into 32-bit parts. Instead of building the extract of
2846 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2847 if (N1.getOpcode() == ISD::BUILD_PAIR)
2848 return N1.getOperand(N2C->getZExtValue());
2850 // EXTRACT_ELEMENT of a constant int is also very common.
2851 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2852 unsigned ElementSize = VT.getSizeInBits();
2853 unsigned Shift = ElementSize * N2C->getZExtValue();
2854 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2855 return getConstant(ShiftedVal.trunc(ElementSize), VT);
2858 case ISD::EXTRACT_SUBVECTOR:
2859 if (N1.getValueType() == VT) // Trivial extraction.
2866 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
2867 if (SV.getNode()) return SV;
2868 } else { // Cannonicalize constant to RHS if commutative
2869 if (isCommutativeBinOp(Opcode)) {
2870 std::swap(N1C, N2C);
2876 // Constant fold FP operations.
2877 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
2878 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
2880 if (!N2CFP && isCommutativeBinOp(Opcode)) {
2881 // Cannonicalize constant to RHS if commutative
2882 std::swap(N1CFP, N2CFP);
2884 } else if (N2CFP && VT != MVT::ppcf128) {
2885 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
2886 APFloat::opStatus s;
2889 s = V1.add(V2, APFloat::rmNearestTiesToEven);
2890 if (s != APFloat::opInvalidOp)
2891 return getConstantFP(V1, VT);
2894 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
2895 if (s!=APFloat::opInvalidOp)
2896 return getConstantFP(V1, VT);
2899 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
2900 if (s!=APFloat::opInvalidOp)
2901 return getConstantFP(V1, VT);
2904 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
2905 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2906 return getConstantFP(V1, VT);
2909 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
2910 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2911 return getConstantFP(V1, VT);
2913 case ISD::FCOPYSIGN:
2915 return getConstantFP(V1, VT);
2921 // Canonicalize an UNDEF to the RHS, even over a constant.
2922 if (N1.getOpcode() == ISD::UNDEF) {
2923 if (isCommutativeBinOp(Opcode)) {
2927 case ISD::FP_ROUND_INREG:
2928 case ISD::SIGN_EXTEND_INREG:
2934 return N1; // fold op(undef, arg2) -> undef
2942 return getConstant(0, VT); // fold op(undef, arg2) -> 0
2943 // For vectors, we can't easily build an all zero vector, just return
2950 // Fold a bunch of operators when the RHS is undef.
2951 if (N2.getOpcode() == ISD::UNDEF) {
2954 if (N1.getOpcode() == ISD::UNDEF)
2955 // Handle undef ^ undef -> 0 special case. This is a common
2957 return getConstant(0, VT);
2967 return N2; // fold op(arg1, undef) -> undef
2981 return getConstant(0, VT); // fold op(arg1, undef) -> 0
2982 // For vectors, we can't easily build an all zero vector, just return
2987 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
2988 // For vectors, we can't easily build an all one vector, just return
2996 // Memoize this node if possible.
2998 SDVTList VTs = getVTList(VT);
2999 if (VT != MVT::Flag) {
3000 SDValue Ops[] = { N1, N2 };
3001 FoldingSetNodeID ID;
3002 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
3004 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3005 return SDValue(E, 0);
3007 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
3008 CSEMap.InsertNode(N, IP);
3010 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
3013 AllNodes.push_back(N);
3017 return SDValue(N, 0);
3020 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3021 SDValue N1, SDValue N2, SDValue N3) {
3022 // Perform various simplifications.
3023 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
3025 case ISD::CONCAT_VECTORS:
3026 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
3027 // one big BUILD_VECTOR.
3028 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
3029 N2.getOpcode() == ISD::BUILD_VECTOR &&
3030 N3.getOpcode() == ISD::BUILD_VECTOR) {
3031 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
3032 N1.getNode()->op_end());
3033 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
3034 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end());
3035 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
3039 // Use FoldSetCC to simplify SETCC's.
3040 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
3041 if (Simp.getNode()) return Simp;
3046 if (N1C->getZExtValue())
3047 return N2; // select true, X, Y -> X
3049 return N3; // select false, X, Y -> Y
3052 if (N2 == N3) return N2; // select C, X, X -> X
3054 case ISD::VECTOR_SHUFFLE:
3055 llvm_unreachable("should use getVectorShuffle constructor!");
3058 // Fold bit_convert nodes from a type to themselves.
3059 if (N1.getValueType() == VT)
3064 // Memoize node if it doesn't produce a flag.
3066 SDVTList VTs = getVTList(VT);
3067 if (VT != MVT::Flag) {
3068 SDValue Ops[] = { N1, N2, N3 };
3069 FoldingSetNodeID ID;
3070 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3072 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3073 return SDValue(E, 0);
3075 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3076 CSEMap.InsertNode(N, IP);
3078 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3081 AllNodes.push_back(N);
3085 return SDValue(N, 0);
3088 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3089 SDValue N1, SDValue N2, SDValue N3,
3091 SDValue Ops[] = { N1, N2, N3, N4 };
3092 return getNode(Opcode, DL, VT, Ops, 4);
3095 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3096 SDValue N1, SDValue N2, SDValue N3,
3097 SDValue N4, SDValue N5) {
3098 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3099 return getNode(Opcode, DL, VT, Ops, 5);
3102 /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
3103 /// the incoming stack arguments to be loaded from the stack.
3104 SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) {
3105 SmallVector<SDValue, 8> ArgChains;
3107 // Include the original chain at the beginning of the list. When this is
3108 // used by target LowerCall hooks, this helps legalize find the
3109 // CALLSEQ_BEGIN node.
3110 ArgChains.push_back(Chain);
3112 // Add a chain value for each stack argument.
3113 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
3114 UE = getEntryNode().getNode()->use_end(); U != UE; ++U)
3115 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
3116 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
3117 if (FI->getIndex() < 0)
3118 ArgChains.push_back(SDValue(L, 1));
3120 // Build a tokenfactor for all the chains.
3121 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other,
3122 &ArgChains[0], ArgChains.size());
3125 /// getMemsetValue - Vectorized representation of the memset value
3127 static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
3129 assert(Value.getOpcode() != ISD::UNDEF);
3131 unsigned NumBits = VT.getScalarType().getSizeInBits();
3132 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
3133 APInt Val = APInt(NumBits, C->getZExtValue() & 255);
3135 for (unsigned i = NumBits; i > 8; i >>= 1) {
3136 Val = (Val << Shift) | Val;
3140 return DAG.getConstant(Val, VT);
3141 return DAG.getConstantFP(APFloat(Val), VT);
3144 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3145 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value);
3147 for (unsigned i = NumBits; i > 8; i >>= 1) {
3148 Value = DAG.getNode(ISD::OR, dl, VT,
3149 DAG.getNode(ISD::SHL, dl, VT, Value,
3150 DAG.getConstant(Shift,
3151 TLI.getShiftAmountTy())),
3159 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
3160 /// used when a memcpy is turned into a memset when the source is a constant
3162 static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG,
3163 const TargetLowering &TLI,
3164 std::string &Str, unsigned Offset) {
3165 // Handle vector with all elements zero.
3168 return DAG.getConstant(0, VT);
3169 else if (VT == MVT::f32 || VT == MVT::f64)
3170 return DAG.getConstantFP(0.0, VT);
3171 else if (VT.isVector()) {
3172 unsigned NumElts = VT.getVectorNumElements();
3173 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
3174 return DAG.getNode(ISD::BITCAST, dl, VT,
3175 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(),
3178 llvm_unreachable("Expected type!");
3181 assert(!VT.isVector() && "Can't handle vector type here!");
3182 unsigned NumBits = VT.getSizeInBits();
3183 unsigned MSB = NumBits / 8;
3185 if (TLI.isLittleEndian())
3186 Offset = Offset + MSB - 1;
3187 for (unsigned i = 0; i != MSB; ++i) {
3188 Val = (Val << 8) | (unsigned char)Str[Offset];
3189 Offset += TLI.isLittleEndian() ? -1 : 1;
3191 return DAG.getConstant(Val, VT);
3194 /// getMemBasePlusOffset - Returns base and offset node for the
3196 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
3197 SelectionDAG &DAG) {
3198 EVT VT = Base.getValueType();
3199 return DAG.getNode(ISD::ADD, Base.getDebugLoc(),
3200 VT, Base, DAG.getConstant(Offset, VT));
3203 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
3205 static bool isMemSrcFromString(SDValue Src, std::string &Str) {
3206 unsigned SrcDelta = 0;
3207 GlobalAddressSDNode *G = NULL;
3208 if (Src.getOpcode() == ISD::GlobalAddress)
3209 G = cast<GlobalAddressSDNode>(Src);
3210 else if (Src.getOpcode() == ISD::ADD &&
3211 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
3212 Src.getOperand(1).getOpcode() == ISD::Constant) {
3213 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
3214 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
3219 const GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal());
3220 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false))
3226 /// FindOptimalMemOpLowering - Determines the optimial series memory ops
3227 /// to replace the memset / memcpy. Return true if the number of memory ops
3228 /// is below the threshold. It returns the types of the sequence of
3229 /// memory ops to perform memset / memcpy by reference.
3230 static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps,
3231 unsigned Limit, uint64_t Size,
3232 unsigned DstAlign, unsigned SrcAlign,
3233 bool NonScalarIntSafe,
3236 const TargetLowering &TLI) {
3237 assert((SrcAlign == 0 || SrcAlign >= DstAlign) &&
3238 "Expecting memcpy / memset source to meet alignment requirement!");
3239 // If 'SrcAlign' is zero, that means the memory operation does not need load
3240 // the value, i.e. memset or memcpy from constant string. Otherwise, it's
3241 // the inferred alignment of the source. 'DstAlign', on the other hand, is the
3242 // specified alignment of the memory operation. If it is zero, that means
3243 // it's possible to change the alignment of the destination. 'MemcpyStrSrc'
3244 // indicates whether the memcpy source is constant so it does not need to be
3246 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign,
3247 NonScalarIntSafe, MemcpyStrSrc,
3248 DAG.getMachineFunction());
3250 if (VT == MVT::Other) {
3251 if (DstAlign >= TLI.getTargetData()->getPointerPrefAlignment() ||
3252 TLI.allowsUnalignedMemoryAccesses(VT)) {
3253 VT = TLI.getPointerTy();
3255 switch (DstAlign & 7) {
3256 case 0: VT = MVT::i64; break;
3257 case 4: VT = MVT::i32; break;
3258 case 2: VT = MVT::i16; break;
3259 default: VT = MVT::i8; break;
3264 while (!TLI.isTypeLegal(LVT))
3265 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1);
3266 assert(LVT.isInteger());
3272 // If we're optimizing for size, and there is a limit, bump the maximum number
3273 // of operations inserted down to 4. This is a wild guess that approximates
3274 // the size of a call to memcpy or memset (3 arguments + call).
3276 const Function *F = DAG.getMachineFunction().getFunction();
3277 if (F->hasFnAttr(Attribute::OptimizeForSize))
3281 unsigned NumMemOps = 0;
3283 unsigned VTSize = VT.getSizeInBits() / 8;
3284 while (VTSize > Size) {
3285 // For now, only use non-vector load / store's for the left-over pieces.
3286 if (VT.isVector() || VT.isFloatingPoint()) {
3288 while (!TLI.isTypeLegal(VT))
3289 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3290 VTSize = VT.getSizeInBits() / 8;
3292 // This can result in a type that is not legal on the target, e.g.
3293 // 1 or 2 bytes on PPC.
3294 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3299 if (++NumMemOps > Limit)
3301 MemOps.push_back(VT);
3308 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3309 SDValue Chain, SDValue Dst,
3310 SDValue Src, uint64_t Size,
3311 unsigned Align, bool isVol,
3313 MachinePointerInfo DstPtrInfo,
3314 MachinePointerInfo SrcPtrInfo) {
3315 // Turn a memcpy of undef to nop.
3316 if (Src.getOpcode() == ISD::UNDEF)
3319 // Expand memcpy to a series of load and store ops if the size operand falls
3320 // below a certain threshold.
3321 // TODO: In the AlwaysInline case, if the size is big then generate a loop
3322 // rather than maybe a humongous number of loads and stores.
3323 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3324 std::vector<EVT> MemOps;
3325 bool DstAlignCanChange = false;
3326 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
3327 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3328 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3329 DstAlignCanChange = true;
3330 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3331 if (Align > SrcAlign)
3334 bool CopyFromStr = isMemSrcFromString(Src, Str);
3335 bool isZeroStr = CopyFromStr && Str.empty();
3336 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy();
3338 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3339 (DstAlignCanChange ? 0 : Align),
3340 (isZeroStr ? 0 : SrcAlign),
3341 true, CopyFromStr, DAG, TLI))
3344 if (DstAlignCanChange) {
3345 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3346 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3347 if (NewAlign > Align) {
3348 // Give the stack frame object a larger alignment if needed.
3349 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3350 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3355 SmallVector<SDValue, 8> OutChains;
3356 unsigned NumMemOps = MemOps.size();
3357 uint64_t SrcOff = 0, DstOff = 0;
3358 for (unsigned i = 0; i != NumMemOps; ++i) {
3360 unsigned VTSize = VT.getSizeInBits() / 8;
3361 SDValue Value, Store;
3364 (isZeroStr || (VT.isInteger() && !VT.isVector()))) {
3365 // It's unlikely a store of a vector immediate can be done in a single
3366 // instruction. It would require a load from a constantpool first.
3367 // We only handle zero vectors here.
3368 // FIXME: Handle other cases where store of vector immediate is done in
3369 // a single instruction.
3370 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff);
3371 Store = DAG.getStore(Chain, dl, Value,
3372 getMemBasePlusOffset(Dst, DstOff, DAG),
3373 DstPtrInfo.getWithOffset(DstOff), isVol,
3376 // The type might not be legal for the target. This should only happen
3377 // if the type is smaller than a legal type, as on PPC, so the right
3378 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify
3379 // to Load/Store if NVT==VT.
3380 // FIXME does the case above also need this?
3381 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
3382 assert(NVT.bitsGE(VT));
3383 Value = DAG.getExtLoad(ISD::EXTLOAD, NVT, dl, Chain,
3384 getMemBasePlusOffset(Src, SrcOff, DAG),
3385 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false,
3386 MinAlign(SrcAlign, SrcOff));
3387 Store = DAG.getTruncStore(Chain, dl, Value,
3388 getMemBasePlusOffset(Dst, DstOff, DAG),
3389 DstPtrInfo.getWithOffset(DstOff), VT, isVol,
3392 OutChains.push_back(Store);
3397 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3398 &OutChains[0], OutChains.size());
3401 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3402 SDValue Chain, SDValue Dst,
3403 SDValue Src, uint64_t Size,
3404 unsigned Align, bool isVol,
3406 MachinePointerInfo DstPtrInfo,
3407 MachinePointerInfo SrcPtrInfo) {
3408 // Turn a memmove of undef to nop.
3409 if (Src.getOpcode() == ISD::UNDEF)
3412 // Expand memmove to a series of load and store ops if the size operand falls
3413 // below a certain threshold.
3414 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3415 std::vector<EVT> MemOps;
3416 bool DstAlignCanChange = false;
3417 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
3418 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3419 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3420 DstAlignCanChange = true;
3421 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3422 if (Align > SrcAlign)
3424 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove();
3426 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3427 (DstAlignCanChange ? 0 : Align),
3428 SrcAlign, true, false, DAG, TLI))
3431 if (DstAlignCanChange) {
3432 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3433 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3434 if (NewAlign > Align) {
3435 // Give the stack frame object a larger alignment if needed.
3436 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3437 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3442 uint64_t SrcOff = 0, DstOff = 0;
3443 SmallVector<SDValue, 8> LoadValues;
3444 SmallVector<SDValue, 8> LoadChains;
3445 SmallVector<SDValue, 8> OutChains;
3446 unsigned NumMemOps = MemOps.size();
3447 for (unsigned i = 0; i < NumMemOps; i++) {
3449 unsigned VTSize = VT.getSizeInBits() / 8;
3450 SDValue Value, Store;
3452 Value = DAG.getLoad(VT, dl, Chain,
3453 getMemBasePlusOffset(Src, SrcOff, DAG),
3454 SrcPtrInfo.getWithOffset(SrcOff), isVol,
3456 LoadValues.push_back(Value);
3457 LoadChains.push_back(Value.getValue(1));
3460 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3461 &LoadChains[0], LoadChains.size());
3463 for (unsigned i = 0; i < NumMemOps; i++) {
3465 unsigned VTSize = VT.getSizeInBits() / 8;
3466 SDValue Value, Store;
3468 Store = DAG.getStore(Chain, dl, LoadValues[i],
3469 getMemBasePlusOffset(Dst, DstOff, DAG),
3470 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align);
3471 OutChains.push_back(Store);
3475 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3476 &OutChains[0], OutChains.size());
3479 static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl,
3480 SDValue Chain, SDValue Dst,
3481 SDValue Src, uint64_t Size,
3482 unsigned Align, bool isVol,
3483 MachinePointerInfo DstPtrInfo) {
3484 // Turn a memset of undef to nop.
3485 if (Src.getOpcode() == ISD::UNDEF)
3488 // Expand memset to a series of load/store ops if the size operand
3489 // falls below a certain threshold.
3490 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3491 std::vector<EVT> MemOps;
3492 bool DstAlignCanChange = false;
3493 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
3494 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3495 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3496 DstAlignCanChange = true;
3497 bool NonScalarIntSafe =
3498 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue();
3499 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(),
3500 Size, (DstAlignCanChange ? 0 : Align), 0,
3501 NonScalarIntSafe, false, DAG, TLI))
3504 if (DstAlignCanChange) {
3505 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3506 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3507 if (NewAlign > Align) {
3508 // Give the stack frame object a larger alignment if needed.
3509 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3510 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3515 SmallVector<SDValue, 8> OutChains;
3516 uint64_t DstOff = 0;
3517 unsigned NumMemOps = MemOps.size();
3518 for (unsigned i = 0; i < NumMemOps; i++) {
3520 unsigned VTSize = VT.getSizeInBits() / 8;
3521 SDValue Value = getMemsetValue(Src, VT, DAG, dl);
3522 SDValue Store = DAG.getStore(Chain, dl, Value,
3523 getMemBasePlusOffset(Dst, DstOff, DAG),
3524 DstPtrInfo.getWithOffset(DstOff),
3525 isVol, false, Align);
3526 OutChains.push_back(Store);
3530 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3531 &OutChains[0], OutChains.size());
3534 SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst,
3535 SDValue Src, SDValue Size,
3536 unsigned Align, bool isVol, bool AlwaysInline,
3537 MachinePointerInfo DstPtrInfo,
3538 MachinePointerInfo SrcPtrInfo) {
3540 // Check to see if we should lower the memcpy to loads and stores first.
3541 // For cases within the target-specified limits, this is the best choice.
3542 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3544 // Memcpy with size zero? Just return the original chain.
3545 if (ConstantSize->isNullValue())
3548 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3549 ConstantSize->getZExtValue(),Align,
3550 isVol, false, DstPtrInfo, SrcPtrInfo);
3551 if (Result.getNode())
3555 // Then check to see if we should lower the memcpy with target-specific
3556 // code. If the target chooses to do this, this is the next best.
3558 TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align,
3559 isVol, AlwaysInline,
3560 DstPtrInfo, SrcPtrInfo);
3561 if (Result.getNode())
3564 // If we really need inline code and the target declined to provide it,
3565 // use a (potentially long) sequence of loads and stores.
3567 assert(ConstantSize && "AlwaysInline requires a constant size!");
3568 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3569 ConstantSize->getZExtValue(), Align, isVol,
3570 true, DstPtrInfo, SrcPtrInfo);
3573 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc
3574 // memcpy is not guaranteed to be safe. libc memcpys aren't required to
3575 // respect volatile, so they may do things like read or write memory
3576 // beyond the given memory regions. But fixing this isn't easy, and most
3577 // people don't care.
3579 // Emit a library call.
3580 TargetLowering::ArgListTy Args;
3581 TargetLowering::ArgListEntry Entry;
3582 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3583 Entry.Node = Dst; Args.push_back(Entry);
3584 Entry.Node = Src; Args.push_back(Entry);
3585 Entry.Node = Size; Args.push_back(Entry);
3586 // FIXME: pass in DebugLoc
3587 std::pair<SDValue,SDValue> CallResult =
3588 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3589 false, false, false, false, 0,
3590 TLI.getLibcallCallingConv(RTLIB::MEMCPY), false,
3591 /*isReturnValueUsed=*/false,
3592 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY),
3593 TLI.getPointerTy()),
3595 return CallResult.second;
3598 SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst,
3599 SDValue Src, SDValue Size,
3600 unsigned Align, bool isVol,
3601 MachinePointerInfo DstPtrInfo,
3602 MachinePointerInfo SrcPtrInfo) {
3604 // Check to see if we should lower the memmove to loads and stores first.
3605 // For cases within the target-specified limits, this is the best choice.
3606 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3608 // Memmove with size zero? Just return the original chain.
3609 if (ConstantSize->isNullValue())
3613 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
3614 ConstantSize->getZExtValue(), Align, isVol,
3615 false, DstPtrInfo, SrcPtrInfo);
3616 if (Result.getNode())
3620 // Then check to see if we should lower the memmove with target-specific
3621 // code. If the target chooses to do this, this is the next best.
3623 TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3624 DstPtrInfo, SrcPtrInfo);
3625 if (Result.getNode())
3628 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may
3629 // not be safe. See memcpy above for more details.
3631 // Emit a library call.
3632 TargetLowering::ArgListTy Args;
3633 TargetLowering::ArgListEntry Entry;
3634 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3635 Entry.Node = Dst; Args.push_back(Entry);
3636 Entry.Node = Src; Args.push_back(Entry);
3637 Entry.Node = Size; Args.push_back(Entry);
3638 // FIXME: pass in DebugLoc
3639 std::pair<SDValue,SDValue> CallResult =
3640 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3641 false, false, false, false, 0,
3642 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), false,
3643 /*isReturnValueUsed=*/false,
3644 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE),
3645 TLI.getPointerTy()),
3647 return CallResult.second;
3650 SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst,
3651 SDValue Src, SDValue Size,
3652 unsigned Align, bool isVol,
3653 MachinePointerInfo DstPtrInfo) {
3655 // Check to see if we should lower the memset to stores first.
3656 // For cases within the target-specified limits, this is the best choice.
3657 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3659 // Memset with size zero? Just return the original chain.
3660 if (ConstantSize->isNullValue())
3664 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
3665 Align, isVol, DstPtrInfo);
3667 if (Result.getNode())
3671 // Then check to see if we should lower the memset with target-specific
3672 // code. If the target chooses to do this, this is the next best.
3674 TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3676 if (Result.getNode())
3679 // Emit a library call.
3680 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext());
3681 TargetLowering::ArgListTy Args;
3682 TargetLowering::ArgListEntry Entry;
3683 Entry.Node = Dst; Entry.Ty = IntPtrTy;
3684 Args.push_back(Entry);
3685 // Extend or truncate the argument to be an i32 value for the call.
3686 if (Src.getValueType().bitsGT(MVT::i32))
3687 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
3689 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
3691 Entry.Ty = Type::getInt32Ty(*getContext());
3692 Entry.isSExt = true;
3693 Args.push_back(Entry);
3695 Entry.Ty = IntPtrTy;
3696 Entry.isSExt = false;
3697 Args.push_back(Entry);
3698 // FIXME: pass in DebugLoc
3699 std::pair<SDValue,SDValue> CallResult =
3700 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3701 false, false, false, false, 0,
3702 TLI.getLibcallCallingConv(RTLIB::MEMSET), false,
3703 /*isReturnValueUsed=*/false,
3704 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET),
3705 TLI.getPointerTy()),
3707 return CallResult.second;
3710 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3711 SDValue Chain, SDValue Ptr, SDValue Cmp,
3712 SDValue Swp, MachinePointerInfo PtrInfo,
3713 unsigned Alignment) {
3714 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3715 Alignment = getEVTAlignment(MemVT);
3717 MachineFunction &MF = getMachineFunction();
3718 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
3720 // For now, atomics are considered to be volatile always.
3721 Flags |= MachineMemOperand::MOVolatile;
3723 MachineMemOperand *MMO =
3724 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment);
3726 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO);
3729 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3731 SDValue Ptr, SDValue Cmp,
3732 SDValue Swp, MachineMemOperand *MMO) {
3733 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
3734 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3736 EVT VT = Cmp.getValueType();
3738 SDVTList VTs = getVTList(VT, MVT::Other);
3739 FoldingSetNodeID ID;
3740 ID.AddInteger(MemVT.getRawBits());
3741 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3742 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3744 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3745 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3746 return SDValue(E, 0);
3748 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
3749 Ptr, Cmp, Swp, MMO);
3750 CSEMap.InsertNode(N, IP);
3751 AllNodes.push_back(N);
3752 return SDValue(N, 0);
3755 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3757 SDValue Ptr, SDValue Val,
3758 const Value* PtrVal,
3759 unsigned Alignment) {
3760 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3761 Alignment = getEVTAlignment(MemVT);
3763 MachineFunction &MF = getMachineFunction();
3764 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
3766 // For now, atomics are considered to be volatile always.
3767 Flags |= MachineMemOperand::MOVolatile;
3769 MachineMemOperand *MMO =
3770 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
3771 MemVT.getStoreSize(), Alignment);
3773 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO);
3776 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3778 SDValue Ptr, SDValue Val,
3779 MachineMemOperand *MMO) {
3780 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
3781 Opcode == ISD::ATOMIC_LOAD_SUB ||
3782 Opcode == ISD::ATOMIC_LOAD_AND ||
3783 Opcode == ISD::ATOMIC_LOAD_OR ||
3784 Opcode == ISD::ATOMIC_LOAD_XOR ||
3785 Opcode == ISD::ATOMIC_LOAD_NAND ||
3786 Opcode == ISD::ATOMIC_LOAD_MIN ||
3787 Opcode == ISD::ATOMIC_LOAD_MAX ||
3788 Opcode == ISD::ATOMIC_LOAD_UMIN ||
3789 Opcode == ISD::ATOMIC_LOAD_UMAX ||
3790 Opcode == ISD::ATOMIC_SWAP) &&
3791 "Invalid Atomic Op");
3793 EVT VT = Val.getValueType();
3795 SDVTList VTs = getVTList(VT, MVT::Other);
3796 FoldingSetNodeID ID;
3797 ID.AddInteger(MemVT.getRawBits());
3798 SDValue Ops[] = {Chain, Ptr, Val};
3799 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3801 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3802 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3803 return SDValue(E, 0);
3805 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
3807 CSEMap.InsertNode(N, IP);
3808 AllNodes.push_back(N);
3809 return SDValue(N, 0);
3812 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
3813 /// Allowed to return something different (and simpler) if Simplify is true.
3814 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps,
3819 SmallVector<EVT, 4> VTs;
3820 VTs.reserve(NumOps);
3821 for (unsigned i = 0; i < NumOps; ++i)
3822 VTs.push_back(Ops[i].getValueType());
3823 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps),
3828 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl,
3829 const EVT *VTs, unsigned NumVTs,
3830 const SDValue *Ops, unsigned NumOps,
3831 EVT MemVT, MachinePointerInfo PtrInfo,
3832 unsigned Align, bool Vol,
3833 bool ReadMem, bool WriteMem) {
3834 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps,
3835 MemVT, PtrInfo, Align, Vol,
3840 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
3841 const SDValue *Ops, unsigned NumOps,
3842 EVT MemVT, MachinePointerInfo PtrInfo,
3843 unsigned Align, bool Vol,
3844 bool ReadMem, bool WriteMem) {
3845 if (Align == 0) // Ensure that codegen never sees alignment 0
3846 Align = getEVTAlignment(MemVT);
3848 MachineFunction &MF = getMachineFunction();
3851 Flags |= MachineMemOperand::MOStore;
3853 Flags |= MachineMemOperand::MOLoad;
3855 Flags |= MachineMemOperand::MOVolatile;
3856 MachineMemOperand *MMO =
3857 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Align);
3859 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO);
3863 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
3864 const SDValue *Ops, unsigned NumOps,
3865 EVT MemVT, MachineMemOperand *MMO) {
3866 assert((Opcode == ISD::INTRINSIC_VOID ||
3867 Opcode == ISD::INTRINSIC_W_CHAIN ||
3868 Opcode == ISD::PREFETCH ||
3869 (Opcode <= INT_MAX &&
3870 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) &&
3871 "Opcode is not a memory-accessing opcode!");
3873 // Memoize the node unless it returns a flag.
3874 MemIntrinsicSDNode *N;
3875 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3876 FoldingSetNodeID ID;
3877 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3879 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3880 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO);
3881 return SDValue(E, 0);
3884 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
3886 CSEMap.InsertNode(N, IP);
3888 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
3891 AllNodes.push_back(N);
3892 return SDValue(N, 0);
3895 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
3896 /// MachinePointerInfo record from it. This is particularly useful because the
3897 /// code generator has many cases where it doesn't bother passing in a
3898 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
3899 static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) {
3900 // If this is FI+Offset, we can model it.
3901 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr))
3902 return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset);
3904 // If this is (FI+Offset1)+Offset2, we can model it.
3905 if (Ptr.getOpcode() != ISD::ADD ||
3906 !isa<ConstantSDNode>(Ptr.getOperand(1)) ||
3907 !isa<FrameIndexSDNode>(Ptr.getOperand(0)))
3908 return MachinePointerInfo();
3910 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
3911 return MachinePointerInfo::getFixedStack(FI, Offset+
3912 cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue());
3915 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
3916 /// MachinePointerInfo record from it. This is particularly useful because the
3917 /// code generator has many cases where it doesn't bother passing in a
3918 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
3919 static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) {
3920 // If the 'Offset' value isn't a constant, we can't handle this.
3921 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp))
3922 return InferPointerInfo(Ptr, OffsetNode->getSExtValue());
3923 if (OffsetOp.getOpcode() == ISD::UNDEF)
3924 return InferPointerInfo(Ptr);
3925 return MachinePointerInfo();
3930 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
3931 EVT VT, DebugLoc dl, SDValue Chain,
3932 SDValue Ptr, SDValue Offset,
3933 MachinePointerInfo PtrInfo, EVT MemVT,
3934 bool isVolatile, bool isNonTemporal,
3935 unsigned Alignment, const MDNode *TBAAInfo) {
3936 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3937 Alignment = getEVTAlignment(VT);
3939 unsigned Flags = MachineMemOperand::MOLoad;
3941 Flags |= MachineMemOperand::MOVolatile;
3943 Flags |= MachineMemOperand::MONonTemporal;
3945 // If we don't have a PtrInfo, infer the trivial frame index case to simplify
3948 PtrInfo = InferPointerInfo(Ptr, Offset);
3950 MachineFunction &MF = getMachineFunction();
3951 MachineMemOperand *MMO =
3952 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment,
3954 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO);
3958 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
3959 EVT VT, DebugLoc dl, SDValue Chain,
3960 SDValue Ptr, SDValue Offset, EVT MemVT,
3961 MachineMemOperand *MMO) {
3963 ExtType = ISD::NON_EXTLOAD;
3964 } else if (ExtType == ISD::NON_EXTLOAD) {
3965 assert(VT == MemVT && "Non-extending load from different memory type!");
3968 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) &&
3969 "Should only be an extending load, not truncating!");
3970 assert(VT.isInteger() == MemVT.isInteger() &&
3971 "Cannot convert from FP to Int or Int -> FP!");
3972 assert(VT.isVector() == MemVT.isVector() &&
3973 "Cannot use trunc store to convert to or from a vector!");
3974 assert((!VT.isVector() ||
3975 VT.getVectorNumElements() == MemVT.getVectorNumElements()) &&
3976 "Cannot use trunc store to change the number of vector elements!");
3979 bool Indexed = AM != ISD::UNINDEXED;
3980 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
3981 "Unindexed load with an offset!");
3983 SDVTList VTs = Indexed ?
3984 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
3985 SDValue Ops[] = { Chain, Ptr, Offset };
3986 FoldingSetNodeID ID;
3987 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
3988 ID.AddInteger(MemVT.getRawBits());
3989 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(),
3990 MMO->isNonTemporal()));
3992 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3993 cast<LoadSDNode>(E)->refineAlignment(MMO);
3994 return SDValue(E, 0);
3996 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType,
3998 CSEMap.InsertNode(N, IP);
3999 AllNodes.push_back(N);
4000 return SDValue(N, 0);
4003 SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl,
4004 SDValue Chain, SDValue Ptr,
4005 MachinePointerInfo PtrInfo,
4006 bool isVolatile, bool isNonTemporal,
4007 unsigned Alignment, const MDNode *TBAAInfo) {
4008 SDValue Undef = getUNDEF(Ptr.getValueType());
4009 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
4010 PtrInfo, VT, isVolatile, isNonTemporal, Alignment, TBAAInfo);
4013 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, EVT VT, DebugLoc dl,
4014 SDValue Chain, SDValue Ptr,
4015 MachinePointerInfo PtrInfo, EVT MemVT,
4016 bool isVolatile, bool isNonTemporal,
4017 unsigned Alignment, const MDNode *TBAAInfo) {
4018 SDValue Undef = getUNDEF(Ptr.getValueType());
4019 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
4020 PtrInfo, MemVT, isVolatile, isNonTemporal, Alignment,
4026 SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base,
4027 SDValue Offset, ISD::MemIndexedMode AM) {
4028 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
4029 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
4030 "Load is already a indexed load!");
4031 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl,
4032 LD->getChain(), Base, Offset, LD->getPointerInfo(),
4034 LD->isVolatile(), LD->isNonTemporal(), LD->getAlignment());
4037 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4038 SDValue Ptr, MachinePointerInfo PtrInfo,
4039 bool isVolatile, bool isNonTemporal,
4040 unsigned Alignment, const MDNode *TBAAInfo) {
4041 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4042 Alignment = getEVTAlignment(Val.getValueType());
4044 unsigned Flags = MachineMemOperand::MOStore;
4046 Flags |= MachineMemOperand::MOVolatile;
4048 Flags |= MachineMemOperand::MONonTemporal;
4051 PtrInfo = InferPointerInfo(Ptr);
4053 MachineFunction &MF = getMachineFunction();
4054 MachineMemOperand *MMO =
4055 MF.getMachineMemOperand(PtrInfo, Flags,
4056 Val.getValueType().getStoreSize(), Alignment,
4059 return getStore(Chain, dl, Val, Ptr, MMO);
4062 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4063 SDValue Ptr, MachineMemOperand *MMO) {
4064 EVT VT = Val.getValueType();
4065 SDVTList VTs = getVTList(MVT::Other);
4066 SDValue Undef = getUNDEF(Ptr.getValueType());
4067 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4068 FoldingSetNodeID ID;
4069 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4070 ID.AddInteger(VT.getRawBits());
4071 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
4072 MMO->isNonTemporal()));
4074 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4075 cast<StoreSDNode>(E)->refineAlignment(MMO);
4076 return SDValue(E, 0);
4078 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4080 CSEMap.InsertNode(N, IP);
4081 AllNodes.push_back(N);
4082 return SDValue(N, 0);
4085 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4086 SDValue Ptr, MachinePointerInfo PtrInfo,
4087 EVT SVT,bool isVolatile, bool isNonTemporal,
4089 const MDNode *TBAAInfo) {
4090 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4091 Alignment = getEVTAlignment(SVT);
4093 unsigned Flags = MachineMemOperand::MOStore;
4095 Flags |= MachineMemOperand::MOVolatile;
4097 Flags |= MachineMemOperand::MONonTemporal;
4100 PtrInfo = InferPointerInfo(Ptr);
4102 MachineFunction &MF = getMachineFunction();
4103 MachineMemOperand *MMO =
4104 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment,
4107 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO);
4110 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4111 SDValue Ptr, EVT SVT,
4112 MachineMemOperand *MMO) {
4113 EVT VT = Val.getValueType();
4116 return getStore(Chain, dl, Val, Ptr, MMO);
4118 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) &&
4119 "Should only be a truncating store, not extending!");
4120 assert(VT.isInteger() == SVT.isInteger() &&
4121 "Can't do FP-INT conversion!");
4122 assert(VT.isVector() == SVT.isVector() &&
4123 "Cannot use trunc store to convert to or from a vector!");
4124 assert((!VT.isVector() ||
4125 VT.getVectorNumElements() == SVT.getVectorNumElements()) &&
4126 "Cannot use trunc store to change the number of vector elements!");
4128 SDVTList VTs = getVTList(MVT::Other);
4129 SDValue Undef = getUNDEF(Ptr.getValueType());
4130 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4131 FoldingSetNodeID ID;
4132 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4133 ID.AddInteger(SVT.getRawBits());
4134 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(),
4135 MMO->isNonTemporal()));
4137 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4138 cast<StoreSDNode>(E)->refineAlignment(MMO);
4139 return SDValue(E, 0);
4141 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4143 CSEMap.InsertNode(N, IP);
4144 AllNodes.push_back(N);
4145 return SDValue(N, 0);
4149 SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base,
4150 SDValue Offset, ISD::MemIndexedMode AM) {
4151 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
4152 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
4153 "Store is already a indexed store!");
4154 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
4155 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
4156 FoldingSetNodeID ID;
4157 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4158 ID.AddInteger(ST->getMemoryVT().getRawBits());
4159 ID.AddInteger(ST->getRawSubclassData());
4161 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4162 return SDValue(E, 0);
4164 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM,
4165 ST->isTruncatingStore(),
4167 ST->getMemOperand());
4168 CSEMap.InsertNode(N, IP);
4169 AllNodes.push_back(N);
4170 return SDValue(N, 0);
4173 SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl,
4174 SDValue Chain, SDValue Ptr,
4177 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) };
4178 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 4);
4181 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4182 const SDUse *Ops, unsigned NumOps) {
4184 case 0: return getNode(Opcode, DL, VT);
4185 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4186 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4187 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4191 // Copy from an SDUse array into an SDValue array for use with
4192 // the regular getNode logic.
4193 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
4194 return getNode(Opcode, DL, VT, &NewOps[0], NumOps);
4197 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4198 const SDValue *Ops, unsigned NumOps) {
4200 case 0: return getNode(Opcode, DL, VT);
4201 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4202 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4203 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4209 case ISD::SELECT_CC: {
4210 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
4211 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
4212 "LHS and RHS of condition must have same type!");
4213 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4214 "True and False arms of SelectCC must have same type!");
4215 assert(Ops[2].getValueType() == VT &&
4216 "select_cc node must be of same type as true and false value!");
4220 assert(NumOps == 5 && "BR_CC takes 5 operands!");
4221 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4222 "LHS/RHS of comparison should match types!");
4229 SDVTList VTs = getVTList(VT);
4231 if (VT != MVT::Flag) {
4232 FoldingSetNodeID ID;
4233 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
4236 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4237 return SDValue(E, 0);
4239 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4240 CSEMap.InsertNode(N, IP);
4242 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4245 AllNodes.push_back(N);
4249 return SDValue(N, 0);
4252 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4253 const std::vector<EVT> &ResultTys,
4254 const SDValue *Ops, unsigned NumOps) {
4255 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()),
4259 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4260 const EVT *VTs, unsigned NumVTs,
4261 const SDValue *Ops, unsigned NumOps) {
4263 return getNode(Opcode, DL, VTs[0], Ops, NumOps);
4264 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps);
4267 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4268 const SDValue *Ops, unsigned NumOps) {
4269 if (VTList.NumVTs == 1)
4270 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps);
4274 // FIXME: figure out how to safely handle things like
4275 // int foo(int x) { return 1 << (x & 255); }
4276 // int bar() { return foo(256); }
4277 case ISD::SRA_PARTS:
4278 case ISD::SRL_PARTS:
4279 case ISD::SHL_PARTS:
4280 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
4281 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
4282 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4283 else if (N3.getOpcode() == ISD::AND)
4284 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
4285 // If the and is only masking out bits that cannot effect the shift,
4286 // eliminate the and.
4287 unsigned NumBits = VT.getScalarType().getSizeInBits()*2;
4288 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
4289 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4295 // Memoize the node unless it returns a flag.
4297 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4298 FoldingSetNodeID ID;
4299 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4301 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4302 return SDValue(E, 0);
4305 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4306 } else if (NumOps == 2) {
4307 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4308 } else if (NumOps == 3) {
4309 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4312 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4314 CSEMap.InsertNode(N, IP);
4317 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4318 } else if (NumOps == 2) {
4319 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4320 } else if (NumOps == 3) {
4321 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4324 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4327 AllNodes.push_back(N);
4331 return SDValue(N, 0);
4334 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) {
4335 return getNode(Opcode, DL, VTList, 0, 0);
4338 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4340 SDValue Ops[] = { N1 };
4341 return getNode(Opcode, DL, VTList, Ops, 1);
4344 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4345 SDValue N1, SDValue N2) {
4346 SDValue Ops[] = { N1, N2 };
4347 return getNode(Opcode, DL, VTList, Ops, 2);
4350 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4351 SDValue N1, SDValue N2, SDValue N3) {
4352 SDValue Ops[] = { N1, N2, N3 };
4353 return getNode(Opcode, DL, VTList, Ops, 3);
4356 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4357 SDValue N1, SDValue N2, SDValue N3,
4359 SDValue Ops[] = { N1, N2, N3, N4 };
4360 return getNode(Opcode, DL, VTList, Ops, 4);
4363 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4364 SDValue N1, SDValue N2, SDValue N3,
4365 SDValue N4, SDValue N5) {
4366 SDValue Ops[] = { N1, N2, N3, N4, N5 };
4367 return getNode(Opcode, DL, VTList, Ops, 5);
4370 SDVTList SelectionDAG::getVTList(EVT VT) {
4371 return makeVTList(SDNode::getValueTypeList(VT), 1);
4374 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
4375 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4376 E = VTList.rend(); I != E; ++I)
4377 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
4380 EVT *Array = Allocator.Allocate<EVT>(2);
4383 SDVTList Result = makeVTList(Array, 2);
4384 VTList.push_back(Result);
4388 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
4389 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4390 E = VTList.rend(); I != E; ++I)
4391 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4395 EVT *Array = Allocator.Allocate<EVT>(3);
4399 SDVTList Result = makeVTList(Array, 3);
4400 VTList.push_back(Result);
4404 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
4405 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4406 E = VTList.rend(); I != E; ++I)
4407 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4408 I->VTs[2] == VT3 && I->VTs[3] == VT4)
4411 EVT *Array = Allocator.Allocate<EVT>(4);
4416 SDVTList Result = makeVTList(Array, 4);
4417 VTList.push_back(Result);
4421 SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) {
4423 case 0: llvm_unreachable("Cannot have nodes without results!");
4424 case 1: return getVTList(VTs[0]);
4425 case 2: return getVTList(VTs[0], VTs[1]);
4426 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
4427 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]);
4431 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4432 E = VTList.rend(); I != E; ++I) {
4433 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
4436 bool NoMatch = false;
4437 for (unsigned i = 2; i != NumVTs; ++i)
4438 if (VTs[i] != I->VTs[i]) {
4446 EVT *Array = Allocator.Allocate<EVT>(NumVTs);
4447 std::copy(VTs, VTs+NumVTs, Array);
4448 SDVTList Result = makeVTList(Array, NumVTs);
4449 VTList.push_back(Result);
4454 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
4455 /// specified operands. If the resultant node already exists in the DAG,
4456 /// this does not modify the specified node, instead it returns the node that
4457 /// already exists. If the resultant node does not exist in the DAG, the
4458 /// input node is returned. As a degenerate case, if you specify the same
4459 /// input operands as the node already has, the input node is returned.
4460 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) {
4461 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
4463 // Check to see if there is no change.
4464 if (Op == N->getOperand(0)) return N;
4466 // See if the modified node already exists.
4467 void *InsertPos = 0;
4468 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
4471 // Nope it doesn't. Remove the node from its current place in the maps.
4473 if (!RemoveNodeFromCSEMaps(N))
4476 // Now we update the operands.
4477 N->OperandList[0].set(Op);
4479 // If this gets put into a CSE map, add it.
4480 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4484 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) {
4485 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
4487 // Check to see if there is no change.
4488 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
4489 return N; // No operands changed, just return the input node.
4491 // See if the modified node already exists.
4492 void *InsertPos = 0;
4493 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
4496 // Nope it doesn't. Remove the node from its current place in the maps.
4498 if (!RemoveNodeFromCSEMaps(N))
4501 // Now we update the operands.
4502 if (N->OperandList[0] != Op1)
4503 N->OperandList[0].set(Op1);
4504 if (N->OperandList[1] != Op2)
4505 N->OperandList[1].set(Op2);
4507 // If this gets put into a CSE map, add it.
4508 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4512 SDNode *SelectionDAG::
4513 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) {
4514 SDValue Ops[] = { Op1, Op2, Op3 };
4515 return UpdateNodeOperands(N, Ops, 3);
4518 SDNode *SelectionDAG::
4519 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
4520 SDValue Op3, SDValue Op4) {
4521 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
4522 return UpdateNodeOperands(N, Ops, 4);
4525 SDNode *SelectionDAG::
4526 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
4527 SDValue Op3, SDValue Op4, SDValue Op5) {
4528 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
4529 return UpdateNodeOperands(N, Ops, 5);
4532 SDNode *SelectionDAG::
4533 UpdateNodeOperands(SDNode *N, const SDValue *Ops, unsigned NumOps) {
4534 assert(N->getNumOperands() == NumOps &&
4535 "Update with wrong number of operands");
4537 // Check to see if there is no change.
4538 bool AnyChange = false;
4539 for (unsigned i = 0; i != NumOps; ++i) {
4540 if (Ops[i] != N->getOperand(i)) {
4546 // No operands changed, just return the input node.
4547 if (!AnyChange) return N;
4549 // See if the modified node already exists.
4550 void *InsertPos = 0;
4551 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
4554 // Nope it doesn't. Remove the node from its current place in the maps.
4556 if (!RemoveNodeFromCSEMaps(N))
4559 // Now we update the operands.
4560 for (unsigned i = 0; i != NumOps; ++i)
4561 if (N->OperandList[i] != Ops[i])
4562 N->OperandList[i].set(Ops[i]);
4564 // If this gets put into a CSE map, add it.
4565 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4569 /// DropOperands - Release the operands and set this node to have
4571 void SDNode::DropOperands() {
4572 // Unlike the code in MorphNodeTo that does this, we don't need to
4573 // watch for dead nodes here.
4574 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
4580 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
4583 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4585 SDVTList VTs = getVTList(VT);
4586 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
4589 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4590 EVT VT, SDValue Op1) {
4591 SDVTList VTs = getVTList(VT);
4592 SDValue Ops[] = { Op1 };
4593 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4596 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4597 EVT VT, SDValue Op1,
4599 SDVTList VTs = getVTList(VT);
4600 SDValue Ops[] = { Op1, Op2 };
4601 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4604 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4605 EVT VT, SDValue Op1,
4606 SDValue Op2, SDValue Op3) {
4607 SDVTList VTs = getVTList(VT);
4608 SDValue Ops[] = { Op1, Op2, Op3 };
4609 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4612 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4613 EVT VT, const SDValue *Ops,
4615 SDVTList VTs = getVTList(VT);
4616 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4619 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4620 EVT VT1, EVT VT2, const SDValue *Ops,
4622 SDVTList VTs = getVTList(VT1, VT2);
4623 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4626 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4628 SDVTList VTs = getVTList(VT1, VT2);
4629 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
4632 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4633 EVT VT1, EVT VT2, EVT VT3,
4634 const SDValue *Ops, unsigned NumOps) {
4635 SDVTList VTs = getVTList(VT1, VT2, VT3);
4636 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4639 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4640 EVT VT1, EVT VT2, EVT VT3, EVT VT4,
4641 const SDValue *Ops, unsigned NumOps) {
4642 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4643 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4646 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4649 SDVTList VTs = getVTList(VT1, VT2);
4650 SDValue Ops[] = { Op1 };
4651 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4654 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4656 SDValue Op1, SDValue Op2) {
4657 SDVTList VTs = getVTList(VT1, VT2);
4658 SDValue Ops[] = { Op1, Op2 };
4659 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4662 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4664 SDValue Op1, SDValue Op2,
4666 SDVTList VTs = getVTList(VT1, VT2);
4667 SDValue Ops[] = { Op1, Op2, Op3 };
4668 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4671 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4672 EVT VT1, EVT VT2, EVT VT3,
4673 SDValue Op1, SDValue Op2,
4675 SDVTList VTs = getVTList(VT1, VT2, VT3);
4676 SDValue Ops[] = { Op1, Op2, Op3 };
4677 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4680 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4681 SDVTList VTs, const SDValue *Ops,
4683 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
4684 // Reset the NodeID to -1.
4689 /// MorphNodeTo - This *mutates* the specified node to have the specified
4690 /// return type, opcode, and operands.
4692 /// Note that MorphNodeTo returns the resultant node. If there is already a
4693 /// node of the specified opcode and operands, it returns that node instead of
4694 /// the current one. Note that the DebugLoc need not be the same.
4696 /// Using MorphNodeTo is faster than creating a new node and swapping it in
4697 /// with ReplaceAllUsesWith both because it often avoids allocating a new
4698 /// node, and because it doesn't require CSE recalculation for any of
4699 /// the node's users.
4701 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4702 SDVTList VTs, const SDValue *Ops,
4704 // If an identical node already exists, use it.
4706 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) {
4707 FoldingSetNodeID ID;
4708 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
4709 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
4713 if (!RemoveNodeFromCSEMaps(N))
4716 // Start the morphing.
4718 N->ValueList = VTs.VTs;
4719 N->NumValues = VTs.NumVTs;
4721 // Clear the operands list, updating used nodes to remove this from their
4722 // use list. Keep track of any operands that become dead as a result.
4723 SmallPtrSet<SDNode*, 16> DeadNodeSet;
4724 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
4726 SDNode *Used = Use.getNode();
4728 if (Used->use_empty())
4729 DeadNodeSet.insert(Used);
4732 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) {
4733 // Initialize the memory references information.
4734 MN->setMemRefs(0, 0);
4735 // If NumOps is larger than the # of operands we can have in a
4736 // MachineSDNode, reallocate the operand list.
4737 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) {
4738 if (MN->OperandsNeedDelete)
4739 delete[] MN->OperandList;
4740 if (NumOps > array_lengthof(MN->LocalOperands))
4741 // We're creating a final node that will live unmorphed for the
4742 // remainder of the current SelectionDAG iteration, so we can allocate
4743 // the operands directly out of a pool with no recycling metadata.
4744 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
4747 MN->InitOperands(MN->LocalOperands, Ops, NumOps);
4748 MN->OperandsNeedDelete = false;
4750 MN->InitOperands(MN->OperandList, Ops, NumOps);
4752 // If NumOps is larger than the # of operands we currently have, reallocate
4753 // the operand list.
4754 if (NumOps > N->NumOperands) {
4755 if (N->OperandsNeedDelete)
4756 delete[] N->OperandList;
4757 N->InitOperands(new SDUse[NumOps], Ops, NumOps);
4758 N->OperandsNeedDelete = true;
4760 N->InitOperands(N->OperandList, Ops, NumOps);
4763 // Delete any nodes that are still dead after adding the uses for the
4765 if (!DeadNodeSet.empty()) {
4766 SmallVector<SDNode *, 16> DeadNodes;
4767 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
4768 E = DeadNodeSet.end(); I != E; ++I)
4769 if ((*I)->use_empty())
4770 DeadNodes.push_back(*I);
4771 RemoveDeadNodes(DeadNodes);
4775 CSEMap.InsertNode(N, IP); // Memoize the new node.
4780 /// getMachineNode - These are used for target selectors to create a new node
4781 /// with specified return type(s), MachineInstr opcode, and operands.
4783 /// Note that getMachineNode returns the resultant node. If there is already a
4784 /// node of the specified opcode and operands, it returns that node instead of
4785 /// the current one.
4787 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) {
4788 SDVTList VTs = getVTList(VT);
4789 return getMachineNode(Opcode, dl, VTs, 0, 0);
4793 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) {
4794 SDVTList VTs = getVTList(VT);
4795 SDValue Ops[] = { Op1 };
4796 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4800 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4801 SDValue Op1, SDValue Op2) {
4802 SDVTList VTs = getVTList(VT);
4803 SDValue Ops[] = { Op1, Op2 };
4804 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4808 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4809 SDValue Op1, SDValue Op2, SDValue Op3) {
4810 SDVTList VTs = getVTList(VT);
4811 SDValue Ops[] = { Op1, Op2, Op3 };
4812 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4816 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4817 const SDValue *Ops, unsigned NumOps) {
4818 SDVTList VTs = getVTList(VT);
4819 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4823 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) {
4824 SDVTList VTs = getVTList(VT1, VT2);
4825 return getMachineNode(Opcode, dl, VTs, 0, 0);
4829 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4830 EVT VT1, EVT VT2, SDValue Op1) {
4831 SDVTList VTs = getVTList(VT1, VT2);
4832 SDValue Ops[] = { Op1 };
4833 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4837 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4838 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) {
4839 SDVTList VTs = getVTList(VT1, VT2);
4840 SDValue Ops[] = { Op1, Op2 };
4841 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4845 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4846 EVT VT1, EVT VT2, SDValue Op1,
4847 SDValue Op2, SDValue Op3) {
4848 SDVTList VTs = getVTList(VT1, VT2);
4849 SDValue Ops[] = { Op1, Op2, Op3 };
4850 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4854 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4856 const SDValue *Ops, unsigned NumOps) {
4857 SDVTList VTs = getVTList(VT1, VT2);
4858 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4862 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4863 EVT VT1, EVT VT2, EVT VT3,
4864 SDValue Op1, SDValue Op2) {
4865 SDVTList VTs = getVTList(VT1, VT2, VT3);
4866 SDValue Ops[] = { Op1, Op2 };
4867 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4871 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4872 EVT VT1, EVT VT2, EVT VT3,
4873 SDValue Op1, SDValue Op2, SDValue Op3) {
4874 SDVTList VTs = getVTList(VT1, VT2, VT3);
4875 SDValue Ops[] = { Op1, Op2, Op3 };
4876 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4880 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4881 EVT VT1, EVT VT2, EVT VT3,
4882 const SDValue *Ops, unsigned NumOps) {
4883 SDVTList VTs = getVTList(VT1, VT2, VT3);
4884 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4888 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1,
4889 EVT VT2, EVT VT3, EVT VT4,
4890 const SDValue *Ops, unsigned NumOps) {
4891 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4892 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4896 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4897 const std::vector<EVT> &ResultTys,
4898 const SDValue *Ops, unsigned NumOps) {
4899 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size());
4900 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4904 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs,
4905 const SDValue *Ops, unsigned NumOps) {
4906 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Flag;
4911 FoldingSetNodeID ID;
4912 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps);
4914 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4915 return cast<MachineSDNode>(E);
4918 // Allocate a new MachineSDNode.
4919 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs);
4921 // Initialize the operands list.
4922 if (NumOps > array_lengthof(N->LocalOperands))
4923 // We're creating a final node that will live unmorphed for the
4924 // remainder of the current SelectionDAG iteration, so we can allocate
4925 // the operands directly out of a pool with no recycling metadata.
4926 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
4929 N->InitOperands(N->LocalOperands, Ops, NumOps);
4930 N->OperandsNeedDelete = false;
4933 CSEMap.InsertNode(N, IP);
4935 AllNodes.push_back(N);
4937 VerifyMachineNode(N);
4942 /// getTargetExtractSubreg - A convenience function for creating
4943 /// TargetOpcode::EXTRACT_SUBREG nodes.
4945 SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT,
4947 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
4948 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL,
4949 VT, Operand, SRIdxVal);
4950 return SDValue(Subreg, 0);
4953 /// getTargetInsertSubreg - A convenience function for creating
4954 /// TargetOpcode::INSERT_SUBREG nodes.
4956 SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT,
4957 SDValue Operand, SDValue Subreg) {
4958 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
4959 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL,
4960 VT, Operand, Subreg, SRIdxVal);
4961 return SDValue(Result, 0);
4964 /// getNodeIfExists - Get the specified node if it's already available, or
4965 /// else return NULL.
4966 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
4967 const SDValue *Ops, unsigned NumOps) {
4968 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4969 FoldingSetNodeID ID;
4970 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4972 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4978 /// getDbgValue - Creates a SDDbgValue node.
4981 SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off,
4982 DebugLoc DL, unsigned O) {
4983 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O);
4987 SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off,
4988 DebugLoc DL, unsigned O) {
4989 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O);
4993 SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off,
4994 DebugLoc DL, unsigned O) {
4995 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O);
5000 /// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node
5001 /// pointed to by a use iterator is deleted, increment the use iterator
5002 /// so that it doesn't dangle.
5004 /// This class also manages a "downlink" DAGUpdateListener, to forward
5005 /// messages to ReplaceAllUsesWith's callers.
5007 class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener {
5008 SelectionDAG::DAGUpdateListener *DownLink;
5009 SDNode::use_iterator &UI;
5010 SDNode::use_iterator &UE;
5012 virtual void NodeDeleted(SDNode *N, SDNode *E) {
5013 // Increment the iterator as needed.
5014 while (UI != UE && N == *UI)
5017 // Then forward the message.
5018 if (DownLink) DownLink->NodeDeleted(N, E);
5021 virtual void NodeUpdated(SDNode *N) {
5022 // Just forward the message.
5023 if (DownLink) DownLink->NodeUpdated(N);
5027 RAUWUpdateListener(SelectionDAG::DAGUpdateListener *dl,
5028 SDNode::use_iterator &ui,
5029 SDNode::use_iterator &ue)
5030 : DownLink(dl), UI(ui), UE(ue) {}
5035 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5036 /// This can cause recursive merging of nodes in the DAG.
5038 /// This version assumes From has a single result value.
5040 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To,
5041 DAGUpdateListener *UpdateListener) {
5042 SDNode *From = FromN.getNode();
5043 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
5044 "Cannot replace with this method!");
5045 assert(From != To.getNode() && "Cannot replace uses of with self");
5047 // Iterate over all the existing uses of From. New uses will be added
5048 // to the beginning of the use list, which we avoid visiting.
5049 // This specifically avoids visiting uses of From that arise while the
5050 // replacement is happening, because any such uses would be the result
5051 // of CSE: If an existing node looks like From after one of its operands
5052 // is replaced by To, we don't want to replace of all its users with To
5053 // too. See PR3018 for more info.
5054 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5055 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5059 // This node is about to morph, remove its old self from the CSE maps.
5060 RemoveNodeFromCSEMaps(User);
5062 // A user can appear in a use list multiple times, and when this
5063 // happens the uses are usually next to each other in the list.
5064 // To help reduce the number of CSE recomputations, process all
5065 // the uses of this user that we can find this way.
5067 SDUse &Use = UI.getUse();
5070 } while (UI != UE && *UI == User);
5072 // Now that we have modified User, add it back to the CSE maps. If it
5073 // already exists there, recursively merge the results together.
5074 AddModifiedNodeToCSEMaps(User, &Listener);
5078 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5079 /// This can cause recursive merging of nodes in the DAG.
5081 /// This version assumes that for each value of From, there is a
5082 /// corresponding value in To in the same position with the same type.
5084 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To,
5085 DAGUpdateListener *UpdateListener) {
5087 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
5088 assert((!From->hasAnyUseOfValue(i) ||
5089 From->getValueType(i) == To->getValueType(i)) &&
5090 "Cannot use this version of ReplaceAllUsesWith!");
5093 // Handle the trivial case.
5097 // Iterate over just the existing users of From. See the comments in
5098 // the ReplaceAllUsesWith above.
5099 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5100 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5104 // This node is about to morph, remove its old self from the CSE maps.
5105 RemoveNodeFromCSEMaps(User);
5107 // A user can appear in a use list multiple times, and when this
5108 // happens the uses are usually next to each other in the list.
5109 // To help reduce the number of CSE recomputations, process all
5110 // the uses of this user that we can find this way.
5112 SDUse &Use = UI.getUse();
5115 } while (UI != UE && *UI == User);
5117 // Now that we have modified User, add it back to the CSE maps. If it
5118 // already exists there, recursively merge the results together.
5119 AddModifiedNodeToCSEMaps(User, &Listener);
5123 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5124 /// This can cause recursive merging of nodes in the DAG.
5126 /// This version can replace From with any result values. To must match the
5127 /// number and types of values returned by From.
5128 void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
5130 DAGUpdateListener *UpdateListener) {
5131 if (From->getNumValues() == 1) // Handle the simple case efficiently.
5132 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener);
5134 // Iterate over just the existing users of From. See the comments in
5135 // the ReplaceAllUsesWith above.
5136 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5137 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5141 // This node is about to morph, remove its old self from the CSE maps.
5142 RemoveNodeFromCSEMaps(User);
5144 // A user can appear in a use list multiple times, and when this
5145 // happens the uses are usually next to each other in the list.
5146 // To help reduce the number of CSE recomputations, process all
5147 // the uses of this user that we can find this way.
5149 SDUse &Use = UI.getUse();
5150 const SDValue &ToOp = To[Use.getResNo()];
5153 } while (UI != UE && *UI == User);
5155 // Now that we have modified User, add it back to the CSE maps. If it
5156 // already exists there, recursively merge the results together.
5157 AddModifiedNodeToCSEMaps(User, &Listener);
5161 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
5162 /// uses of other values produced by From.getNode() alone. The Deleted
5163 /// vector is handled the same way as for ReplaceAllUsesWith.
5164 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To,
5165 DAGUpdateListener *UpdateListener){
5166 // Handle the really simple, really trivial case efficiently.
5167 if (From == To) return;
5169 // Handle the simple, trivial, case efficiently.
5170 if (From.getNode()->getNumValues() == 1) {
5171 ReplaceAllUsesWith(From, To, UpdateListener);
5175 // Iterate over just the existing users of From. See the comments in
5176 // the ReplaceAllUsesWith above.
5177 SDNode::use_iterator UI = From.getNode()->use_begin(),
5178 UE = From.getNode()->use_end();
5179 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5182 bool UserRemovedFromCSEMaps = false;
5184 // A user can appear in a use list multiple times, and when this
5185 // happens the uses are usually next to each other in the list.
5186 // To help reduce the number of CSE recomputations, process all
5187 // the uses of this user that we can find this way.
5189 SDUse &Use = UI.getUse();
5191 // Skip uses of different values from the same node.
5192 if (Use.getResNo() != From.getResNo()) {
5197 // If this node hasn't been modified yet, it's still in the CSE maps,
5198 // so remove its old self from the CSE maps.
5199 if (!UserRemovedFromCSEMaps) {
5200 RemoveNodeFromCSEMaps(User);
5201 UserRemovedFromCSEMaps = true;
5206 } while (UI != UE && *UI == User);
5208 // We are iterating over all uses of the From node, so if a use
5209 // doesn't use the specific value, no changes are made.
5210 if (!UserRemovedFromCSEMaps)
5213 // Now that we have modified User, add it back to the CSE maps. If it
5214 // already exists there, recursively merge the results together.
5215 AddModifiedNodeToCSEMaps(User, &Listener);
5220 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
5221 /// to record information about a use.
5228 /// operator< - Sort Memos by User.
5229 bool operator<(const UseMemo &L, const UseMemo &R) {
5230 return (intptr_t)L.User < (intptr_t)R.User;
5234 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
5235 /// uses of other values produced by From.getNode() alone. The same value
5236 /// may appear in both the From and To list. The Deleted vector is
5237 /// handled the same way as for ReplaceAllUsesWith.
5238 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
5241 DAGUpdateListener *UpdateListener){
5242 // Handle the simple, trivial case efficiently.
5244 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener);
5246 // Read up all the uses and make records of them. This helps
5247 // processing new uses that are introduced during the
5248 // replacement process.
5249 SmallVector<UseMemo, 4> Uses;
5250 for (unsigned i = 0; i != Num; ++i) {
5251 unsigned FromResNo = From[i].getResNo();
5252 SDNode *FromNode = From[i].getNode();
5253 for (SDNode::use_iterator UI = FromNode->use_begin(),
5254 E = FromNode->use_end(); UI != E; ++UI) {
5255 SDUse &Use = UI.getUse();
5256 if (Use.getResNo() == FromResNo) {
5257 UseMemo Memo = { *UI, i, &Use };
5258 Uses.push_back(Memo);
5263 // Sort the uses, so that all the uses from a given User are together.
5264 std::sort(Uses.begin(), Uses.end());
5266 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
5267 UseIndex != UseIndexEnd; ) {
5268 // We know that this user uses some value of From. If it is the right
5269 // value, update it.
5270 SDNode *User = Uses[UseIndex].User;
5272 // This node is about to morph, remove its old self from the CSE maps.
5273 RemoveNodeFromCSEMaps(User);
5275 // The Uses array is sorted, so all the uses for a given User
5276 // are next to each other in the list.
5277 // To help reduce the number of CSE recomputations, process all
5278 // the uses of this user that we can find this way.
5280 unsigned i = Uses[UseIndex].Index;
5281 SDUse &Use = *Uses[UseIndex].Use;
5285 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
5287 // Now that we have modified User, add it back to the CSE maps. If it
5288 // already exists there, recursively merge the results together.
5289 AddModifiedNodeToCSEMaps(User, UpdateListener);
5293 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
5294 /// based on their topological order. It returns the maximum id and a vector
5295 /// of the SDNodes* in assigned order by reference.
5296 unsigned SelectionDAG::AssignTopologicalOrder() {
5298 unsigned DAGSize = 0;
5300 // SortedPos tracks the progress of the algorithm. Nodes before it are
5301 // sorted, nodes after it are unsorted. When the algorithm completes
5302 // it is at the end of the list.
5303 allnodes_iterator SortedPos = allnodes_begin();
5305 // Visit all the nodes. Move nodes with no operands to the front of
5306 // the list immediately. Annotate nodes that do have operands with their
5307 // operand count. Before we do this, the Node Id fields of the nodes
5308 // may contain arbitrary values. After, the Node Id fields for nodes
5309 // before SortedPos will contain the topological sort index, and the
5310 // Node Id fields for nodes At SortedPos and after will contain the
5311 // count of outstanding operands.
5312 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
5315 unsigned Degree = N->getNumOperands();
5317 // A node with no uses, add it to the result array immediately.
5318 N->setNodeId(DAGSize++);
5319 allnodes_iterator Q = N;
5321 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
5322 assert(SortedPos != AllNodes.end() && "Overran node list");
5325 // Temporarily use the Node Id as scratch space for the degree count.
5326 N->setNodeId(Degree);
5330 // Visit all the nodes. As we iterate, moves nodes into sorted order,
5331 // such that by the time the end is reached all nodes will be sorted.
5332 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
5335 // N is in sorted position, so all its uses have one less operand
5336 // that needs to be sorted.
5337 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
5340 unsigned Degree = P->getNodeId();
5341 assert(Degree != 0 && "Invalid node degree");
5344 // All of P's operands are sorted, so P may sorted now.
5345 P->setNodeId(DAGSize++);
5347 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
5348 assert(SortedPos != AllNodes.end() && "Overran node list");
5351 // Update P's outstanding operand count.
5352 P->setNodeId(Degree);
5355 if (I == SortedPos) {
5358 dbgs() << "Overran sorted position:\n";
5361 llvm_unreachable(0);
5365 assert(SortedPos == AllNodes.end() &&
5366 "Topological sort incomplete!");
5367 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
5368 "First node in topological sort is not the entry token!");
5369 assert(AllNodes.front().getNodeId() == 0 &&
5370 "First node in topological sort has non-zero id!");
5371 assert(AllNodes.front().getNumOperands() == 0 &&
5372 "First node in topological sort has operands!");
5373 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
5374 "Last node in topologic sort has unexpected id!");
5375 assert(AllNodes.back().use_empty() &&
5376 "Last node in topologic sort has users!");
5377 assert(DAGSize == allnodes_size() && "Node count mismatch!");
5381 /// AssignOrdering - Assign an order to the SDNode.
5382 void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) {
5383 assert(SD && "Trying to assign an order to a null node!");
5384 Ordering->add(SD, Order);
5387 /// GetOrdering - Get the order for the SDNode.
5388 unsigned SelectionDAG::GetOrdering(const SDNode *SD) const {
5389 assert(SD && "Trying to get the order of a null node!");
5390 return Ordering->getOrder(SD);
5393 /// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the
5394 /// value is produced by SD.
5395 void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) {
5396 DbgInfo->add(DB, SD, isParameter);
5398 SD->setHasDebugValue(true);
5401 //===----------------------------------------------------------------------===//
5403 //===----------------------------------------------------------------------===//
5405 HandleSDNode::~HandleSDNode() {
5409 GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, DebugLoc DL,
5410 const GlobalValue *GA,
5411 EVT VT, int64_t o, unsigned char TF)
5412 : SDNode(Opc, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) {
5416 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt,
5417 MachineMemOperand *mmo)
5418 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) {
5419 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5420 MMO->isNonTemporal());
5421 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5422 assert(isNonTemporal() == MMO->isNonTemporal() &&
5423 "Non-temporal encoding error!");
5424 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5427 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs,
5428 const SDValue *Ops, unsigned NumOps, EVT memvt,
5429 MachineMemOperand *mmo)
5430 : SDNode(Opc, dl, VTs, Ops, NumOps),
5431 MemoryVT(memvt), MMO(mmo) {
5432 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5433 MMO->isNonTemporal());
5434 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5435 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5438 /// Profile - Gather unique data for the node.
5440 void SDNode::Profile(FoldingSetNodeID &ID) const {
5441 AddNodeIDNode(ID, this);
5446 std::vector<EVT> VTs;
5449 VTs.reserve(MVT::LAST_VALUETYPE);
5450 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i)
5451 VTs.push_back(MVT((MVT::SimpleValueType)i));
5456 static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs;
5457 static ManagedStatic<EVTArray> SimpleVTArray;
5458 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
5460 /// getValueTypeList - Return a pointer to the specified value type.
5462 const EVT *SDNode::getValueTypeList(EVT VT) {
5463 if (VT.isExtended()) {
5464 sys::SmartScopedLock<true> Lock(*VTMutex);
5465 return &(*EVTs->insert(VT).first);
5467 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE &&
5468 "Value type out of range!");
5469 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy];
5473 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
5474 /// indicated value. This method ignores uses of other values defined by this
5476 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
5477 assert(Value < getNumValues() && "Bad value!");
5479 // TODO: Only iterate over uses of a given value of the node
5480 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
5481 if (UI.getUse().getResNo() == Value) {
5488 // Found exactly the right number of uses?
5493 /// hasAnyUseOfValue - Return true if there are any use of the indicated
5494 /// value. This method ignores uses of other values defined by this operation.
5495 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
5496 assert(Value < getNumValues() && "Bad value!");
5498 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
5499 if (UI.getUse().getResNo() == Value)
5506 /// isOnlyUserOf - Return true if this node is the only use of N.
5508 bool SDNode::isOnlyUserOf(SDNode *N) const {
5510 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
5521 /// isOperand - Return true if this node is an operand of N.
5523 bool SDValue::isOperandOf(SDNode *N) const {
5524 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5525 if (*this == N->getOperand(i))
5530 bool SDNode::isOperandOf(SDNode *N) const {
5531 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
5532 if (this == N->OperandList[i].getNode())
5537 /// reachesChainWithoutSideEffects - Return true if this operand (which must
5538 /// be a chain) reaches the specified operand without crossing any
5539 /// side-effecting instructions on any chain path. In practice, this looks
5540 /// through token factors and non-volatile loads. In order to remain efficient,
5541 /// this only looks a couple of nodes in, it does not do an exhaustive search.
5542 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
5543 unsigned Depth) const {
5544 if (*this == Dest) return true;
5546 // Don't search too deeply, we just want to be able to see through
5547 // TokenFactor's etc.
5548 if (Depth == 0) return false;
5550 // If this is a token factor, all inputs to the TF happen in parallel. If any
5551 // of the operands of the TF does not reach dest, then we cannot do the xform.
5552 if (getOpcode() == ISD::TokenFactor) {
5553 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
5554 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
5559 // Loads don't have side effects, look through them.
5560 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
5561 if (!Ld->isVolatile())
5562 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
5567 /// isPredecessorOf - Return true if this node is a predecessor of N. This node
5568 /// is either an operand of N or it can be reached by traversing up the operands.
5569 /// NOTE: this is an expensive method. Use it carefully.
5570 bool SDNode::isPredecessorOf(SDNode *N) const {
5571 SmallPtrSet<SDNode *, 32> Visited;
5572 SmallVector<SDNode *, 16> Worklist;
5573 Worklist.push_back(N);
5576 N = Worklist.pop_back_val();
5577 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
5578 SDNode *Op = N->getOperand(i).getNode();
5581 if (Visited.insert(Op))
5582 Worklist.push_back(Op);
5584 } while (!Worklist.empty());
5589 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
5590 assert(Num < NumOperands && "Invalid child # of SDNode!");
5591 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
5594 std::string SDNode::getOperationName(const SelectionDAG *G) const {
5595 switch (getOpcode()) {
5597 if (getOpcode() < ISD::BUILTIN_OP_END)
5598 return "<<Unknown DAG Node>>";
5599 if (isMachineOpcode()) {
5601 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo())
5602 if (getMachineOpcode() < TII->getNumOpcodes())
5603 return TII->get(getMachineOpcode()).getName();
5604 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>";
5607 const TargetLowering &TLI = G->getTargetLoweringInfo();
5608 const char *Name = TLI.getTargetNodeName(getOpcode());
5609 if (Name) return Name;
5610 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>";
5612 return "<<Unknown Node #" + utostr(getOpcode()) + ">>";
5615 case ISD::DELETED_NODE:
5616 return "<<Deleted Node!>>";
5618 case ISD::PREFETCH: return "Prefetch";
5619 case ISD::MEMBARRIER: return "MemBarrier";
5620 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
5621 case ISD::ATOMIC_SWAP: return "AtomicSwap";
5622 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
5623 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
5624 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
5625 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
5626 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
5627 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
5628 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
5629 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
5630 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
5631 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
5632 case ISD::PCMARKER: return "PCMarker";
5633 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
5634 case ISD::SRCVALUE: return "SrcValue";
5635 case ISD::MDNODE_SDNODE: return "MDNode";
5636 case ISD::EntryToken: return "EntryToken";
5637 case ISD::TokenFactor: return "TokenFactor";
5638 case ISD::AssertSext: return "AssertSext";
5639 case ISD::AssertZext: return "AssertZext";
5641 case ISD::BasicBlock: return "BasicBlock";
5642 case ISD::VALUETYPE: return "ValueType";
5643 case ISD::Register: return "Register";
5645 case ISD::Constant: return "Constant";
5646 case ISD::ConstantFP: return "ConstantFP";
5647 case ISD::GlobalAddress: return "GlobalAddress";
5648 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
5649 case ISD::FrameIndex: return "FrameIndex";
5650 case ISD::JumpTable: return "JumpTable";
5651 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
5652 case ISD::RETURNADDR: return "RETURNADDR";
5653 case ISD::FRAMEADDR: return "FRAMEADDR";
5654 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
5655 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR";
5656 case ISD::LSDAADDR: return "LSDAADDR";
5657 case ISD::EHSELECTION: return "EHSELECTION";
5658 case ISD::EH_RETURN: return "EH_RETURN";
5659 case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP";
5660 case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP";
5661 case ISD::EH_SJLJ_DISPATCHSETUP: return "EH_SJLJ_DISPATCHSETUP";
5662 case ISD::ConstantPool: return "ConstantPool";
5663 case ISD::ExternalSymbol: return "ExternalSymbol";
5664 case ISD::BlockAddress: return "BlockAddress";
5665 case ISD::INTRINSIC_WO_CHAIN:
5666 case ISD::INTRINSIC_VOID:
5667 case ISD::INTRINSIC_W_CHAIN: {
5668 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1;
5669 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue();
5670 if (IID < Intrinsic::num_intrinsics)
5671 return Intrinsic::getName((Intrinsic::ID)IID);
5672 else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo())
5673 return TII->getName(IID);
5674 llvm_unreachable("Invalid intrinsic ID");
5677 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
5678 case ISD::TargetConstant: return "TargetConstant";
5679 case ISD::TargetConstantFP:return "TargetConstantFP";
5680 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
5681 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
5682 case ISD::TargetFrameIndex: return "TargetFrameIndex";
5683 case ISD::TargetJumpTable: return "TargetJumpTable";
5684 case ISD::TargetConstantPool: return "TargetConstantPool";
5685 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
5686 case ISD::TargetBlockAddress: return "TargetBlockAddress";
5688 case ISD::CopyToReg: return "CopyToReg";
5689 case ISD::CopyFromReg: return "CopyFromReg";
5690 case ISD::UNDEF: return "undef";
5691 case ISD::MERGE_VALUES: return "merge_values";
5692 case ISD::INLINEASM: return "inlineasm";
5693 case ISD::EH_LABEL: return "eh_label";
5694 case ISD::HANDLENODE: return "handlenode";
5697 case ISD::FABS: return "fabs";
5698 case ISD::FNEG: return "fneg";
5699 case ISD::FSQRT: return "fsqrt";
5700 case ISD::FSIN: return "fsin";
5701 case ISD::FCOS: return "fcos";
5702 case ISD::FTRUNC: return "ftrunc";
5703 case ISD::FFLOOR: return "ffloor";
5704 case ISD::FCEIL: return "fceil";
5705 case ISD::FRINT: return "frint";
5706 case ISD::FNEARBYINT: return "fnearbyint";
5707 case ISD::FEXP: return "fexp";
5708 case ISD::FEXP2: return "fexp2";
5709 case ISD::FLOG: return "flog";
5710 case ISD::FLOG2: return "flog2";
5711 case ISD::FLOG10: return "flog10";
5714 case ISD::ADD: return "add";
5715 case ISD::SUB: return "sub";
5716 case ISD::MUL: return "mul";
5717 case ISD::MULHU: return "mulhu";
5718 case ISD::MULHS: return "mulhs";
5719 case ISD::SDIV: return "sdiv";
5720 case ISD::UDIV: return "udiv";
5721 case ISD::SREM: return "srem";
5722 case ISD::UREM: return "urem";
5723 case ISD::SMUL_LOHI: return "smul_lohi";
5724 case ISD::UMUL_LOHI: return "umul_lohi";
5725 case ISD::SDIVREM: return "sdivrem";
5726 case ISD::UDIVREM: return "udivrem";
5727 case ISD::AND: return "and";
5728 case ISD::OR: return "or";
5729 case ISD::XOR: return "xor";
5730 case ISD::SHL: return "shl";
5731 case ISD::SRA: return "sra";
5732 case ISD::SRL: return "srl";
5733 case ISD::ROTL: return "rotl";
5734 case ISD::ROTR: return "rotr";
5735 case ISD::FADD: return "fadd";
5736 case ISD::FSUB: return "fsub";
5737 case ISD::FMUL: return "fmul";
5738 case ISD::FDIV: return "fdiv";
5739 case ISD::FREM: return "frem";
5740 case ISD::FCOPYSIGN: return "fcopysign";
5741 case ISD::FGETSIGN: return "fgetsign";
5742 case ISD::FPOW: return "fpow";
5744 case ISD::FPOWI: return "fpowi";
5745 case ISD::SETCC: return "setcc";
5746 case ISD::VSETCC: return "vsetcc";
5747 case ISD::SELECT: return "select";
5748 case ISD::SELECT_CC: return "select_cc";
5749 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
5750 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
5751 case ISD::CONCAT_VECTORS: return "concat_vectors";
5752 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
5753 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
5754 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
5755 case ISD::CARRY_FALSE: return "carry_false";
5756 case ISD::ADDC: return "addc";
5757 case ISD::ADDE: return "adde";
5758 case ISD::SADDO: return "saddo";
5759 case ISD::UADDO: return "uaddo";
5760 case ISD::SSUBO: return "ssubo";
5761 case ISD::USUBO: return "usubo";
5762 case ISD::SMULO: return "smulo";
5763 case ISD::UMULO: return "umulo";
5764 case ISD::SUBC: return "subc";
5765 case ISD::SUBE: return "sube";
5766 case ISD::SHL_PARTS: return "shl_parts";
5767 case ISD::SRA_PARTS: return "sra_parts";
5768 case ISD::SRL_PARTS: return "srl_parts";
5770 // Conversion operators.
5771 case ISD::SIGN_EXTEND: return "sign_extend";
5772 case ISD::ZERO_EXTEND: return "zero_extend";
5773 case ISD::ANY_EXTEND: return "any_extend";
5774 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
5775 case ISD::TRUNCATE: return "truncate";
5776 case ISD::FP_ROUND: return "fp_round";
5777 case ISD::FLT_ROUNDS_: return "flt_rounds";
5778 case ISD::FP_ROUND_INREG: return "fp_round_inreg";
5779 case ISD::FP_EXTEND: return "fp_extend";
5781 case ISD::SINT_TO_FP: return "sint_to_fp";
5782 case ISD::UINT_TO_FP: return "uint_to_fp";
5783 case ISD::FP_TO_SINT: return "fp_to_sint";
5784 case ISD::FP_TO_UINT: return "fp_to_uint";
5785 case ISD::BITCAST: return "bit_convert";
5786 case ISD::FP16_TO_FP32: return "fp16_to_fp32";
5787 case ISD::FP32_TO_FP16: return "fp32_to_fp16";
5789 case ISD::CONVERT_RNDSAT: {
5790 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) {
5791 default: llvm_unreachable("Unknown cvt code!");
5792 case ISD::CVT_FF: return "cvt_ff";
5793 case ISD::CVT_FS: return "cvt_fs";
5794 case ISD::CVT_FU: return "cvt_fu";
5795 case ISD::CVT_SF: return "cvt_sf";
5796 case ISD::CVT_UF: return "cvt_uf";
5797 case ISD::CVT_SS: return "cvt_ss";
5798 case ISD::CVT_SU: return "cvt_su";
5799 case ISD::CVT_US: return "cvt_us";
5800 case ISD::CVT_UU: return "cvt_uu";
5804 // Control flow instructions
5805 case ISD::BR: return "br";
5806 case ISD::BRIND: return "brind";
5807 case ISD::BR_JT: return "br_jt";
5808 case ISD::BRCOND: return "brcond";
5809 case ISD::BR_CC: return "br_cc";
5810 case ISD::CALLSEQ_START: return "callseq_start";
5811 case ISD::CALLSEQ_END: return "callseq_end";
5814 case ISD::LOAD: return "load";
5815 case ISD::STORE: return "store";
5816 case ISD::VAARG: return "vaarg";
5817 case ISD::VACOPY: return "vacopy";
5818 case ISD::VAEND: return "vaend";
5819 case ISD::VASTART: return "vastart";
5820 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
5821 case ISD::EXTRACT_ELEMENT: return "extract_element";
5822 case ISD::BUILD_PAIR: return "build_pair";
5823 case ISD::STACKSAVE: return "stacksave";
5824 case ISD::STACKRESTORE: return "stackrestore";
5825 case ISD::TRAP: return "trap";
5828 case ISD::BSWAP: return "bswap";
5829 case ISD::CTPOP: return "ctpop";
5830 case ISD::CTTZ: return "cttz";
5831 case ISD::CTLZ: return "ctlz";
5834 case ISD::TRAMPOLINE: return "trampoline";
5837 switch (cast<CondCodeSDNode>(this)->get()) {
5838 default: llvm_unreachable("Unknown setcc condition!");
5839 case ISD::SETOEQ: return "setoeq";
5840 case ISD::SETOGT: return "setogt";
5841 case ISD::SETOGE: return "setoge";
5842 case ISD::SETOLT: return "setolt";
5843 case ISD::SETOLE: return "setole";
5844 case ISD::SETONE: return "setone";
5846 case ISD::SETO: return "seto";
5847 case ISD::SETUO: return "setuo";
5848 case ISD::SETUEQ: return "setue";
5849 case ISD::SETUGT: return "setugt";
5850 case ISD::SETUGE: return "setuge";
5851 case ISD::SETULT: return "setult";
5852 case ISD::SETULE: return "setule";
5853 case ISD::SETUNE: return "setune";
5855 case ISD::SETEQ: return "seteq";
5856 case ISD::SETGT: return "setgt";
5857 case ISD::SETGE: return "setge";
5858 case ISD::SETLT: return "setlt";
5859 case ISD::SETLE: return "setle";
5860 case ISD::SETNE: return "setne";
5865 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
5874 return "<post-inc>";
5876 return "<post-dec>";
5880 std::string ISD::ArgFlagsTy::getArgFlagsString() {
5881 std::string S = "< ";
5895 if (getByValAlign())
5896 S += "byval-align:" + utostr(getByValAlign()) + " ";
5898 S += "orig-align:" + utostr(getOrigAlign()) + " ";
5900 S += "byval-size:" + utostr(getByValSize()) + " ";
5904 void SDNode::dump() const { dump(0); }
5905 void SDNode::dump(const SelectionDAG *G) const {
5910 void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const {
5911 OS << (void*)this << ": ";
5913 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
5915 if (getValueType(i) == MVT::Other)
5918 OS << getValueType(i).getEVTString();
5920 OS << " = " << getOperationName(G);
5923 void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const {
5924 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) {
5925 if (!MN->memoperands_empty()) {
5928 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(),
5929 e = MN->memoperands_end(); i != e; ++i) {
5931 if (llvm::next(i) != e)
5936 } else if (const ShuffleVectorSDNode *SVN =
5937 dyn_cast<ShuffleVectorSDNode>(this)) {
5939 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
5940 int Idx = SVN->getMaskElt(i);
5948 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
5949 OS << '<' << CSDN->getAPIntValue() << '>';
5950 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
5951 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle)
5952 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
5953 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble)
5954 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
5957 CSDN->getValueAPF().bitcastToAPInt().dump();
5960 } else if (const GlobalAddressSDNode *GADN =
5961 dyn_cast<GlobalAddressSDNode>(this)) {
5962 int64_t offset = GADN->getOffset();
5964 WriteAsOperand(OS, GADN->getGlobal());
5967 OS << " + " << offset;
5969 OS << " " << offset;
5970 if (unsigned int TF = GADN->getTargetFlags())
5971 OS << " [TF=" << TF << ']';
5972 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
5973 OS << "<" << FIDN->getIndex() << ">";
5974 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
5975 OS << "<" << JTDN->getIndex() << ">";
5976 if (unsigned int TF = JTDN->getTargetFlags())
5977 OS << " [TF=" << TF << ']';
5978 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
5979 int offset = CP->getOffset();
5980 if (CP->isMachineConstantPoolEntry())
5981 OS << "<" << *CP->getMachineCPVal() << ">";
5983 OS << "<" << *CP->getConstVal() << ">";
5985 OS << " + " << offset;
5987 OS << " " << offset;
5988 if (unsigned int TF = CP->getTargetFlags())
5989 OS << " [TF=" << TF << ']';
5990 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
5992 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
5994 OS << LBB->getName() << " ";
5995 OS << (const void*)BBDN->getBasicBlock() << ">";
5996 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
5997 if (G && R->getReg() &&
5998 TargetRegisterInfo::isPhysicalRegister(R->getReg())) {
5999 OS << " %" << G->getTarget().getRegisterInfo()->getName(R->getReg());
6001 OS << " %reg" << R->getReg();
6003 } else if (const ExternalSymbolSDNode *ES =
6004 dyn_cast<ExternalSymbolSDNode>(this)) {
6005 OS << "'" << ES->getSymbol() << "'";
6006 if (unsigned int TF = ES->getTargetFlags())
6007 OS << " [TF=" << TF << ']';
6008 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
6010 OS << "<" << M->getValue() << ">";
6013 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) {
6015 OS << "<" << MD->getMD() << ">";
6018 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
6019 OS << ":" << N->getVT().getEVTString();
6021 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
6022 OS << "<" << *LD->getMemOperand();
6025 switch (LD->getExtensionType()) {
6026 default: doExt = false; break;
6027 case ISD::EXTLOAD: OS << ", anyext"; break;
6028 case ISD::SEXTLOAD: OS << ", sext"; break;
6029 case ISD::ZEXTLOAD: OS << ", zext"; break;
6032 OS << " from " << LD->getMemoryVT().getEVTString();
6034 const char *AM = getIndexedModeName(LD->getAddressingMode());
6039 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
6040 OS << "<" << *ST->getMemOperand();
6042 if (ST->isTruncatingStore())
6043 OS << ", trunc to " << ST->getMemoryVT().getEVTString();
6045 const char *AM = getIndexedModeName(ST->getAddressingMode());
6050 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) {
6051 OS << "<" << *M->getMemOperand() << ">";
6052 } else if (const BlockAddressSDNode *BA =
6053 dyn_cast<BlockAddressSDNode>(this)) {
6055 WriteAsOperand(OS, BA->getBlockAddress()->getFunction(), false);
6057 WriteAsOperand(OS, BA->getBlockAddress()->getBasicBlock(), false);
6059 if (unsigned int TF = BA->getTargetFlags())
6060 OS << " [TF=" << TF << ']';
6064 if (unsigned Order = G->GetOrdering(this))
6065 OS << " [ORD=" << Order << ']';
6067 if (getNodeId() != -1)
6068 OS << " [ID=" << getNodeId() << ']';
6070 DebugLoc dl = getDebugLoc();
6071 if (G && !dl.isUnknown()) {
6073 Scope(dl.getScope(G->getMachineFunction().getFunction()->getContext()));
6075 // Omit the directory, since it's usually long and uninteresting.
6077 OS << Scope.getFilename();
6080 OS << ':' << dl.getLine();
6081 if (dl.getCol() != 0)
6082 OS << ':' << dl.getCol();
6086 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
6088 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
6089 if (i) OS << ", "; else OS << " ";
6090 OS << (void*)getOperand(i).getNode();
6091 if (unsigned RN = getOperand(i).getResNo())
6094 print_details(OS, G);
6097 static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N,
6098 const SelectionDAG *G, unsigned depth,
6111 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6113 printrWithDepthHelper(OS, N->getOperand(i).getNode(), G, depth-1, indent+2);
6117 void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G,
6118 unsigned depth) const {
6119 printrWithDepthHelper(OS, this, G, depth, 0);
6122 void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const {
6123 // Don't print impossibly deep things.
6124 printrWithDepth(OS, G, 100);
6127 void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const {
6128 printrWithDepth(dbgs(), G, depth);
6131 void SDNode::dumprFull(const SelectionDAG *G) const {
6132 // Don't print impossibly deep things.
6133 dumprWithDepth(G, 100);
6136 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
6137 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6138 if (N->getOperand(i).getNode()->hasOneUse())
6139 DumpNodes(N->getOperand(i).getNode(), indent+2, G);
6141 dbgs() << "\n" << std::string(indent+2, ' ')
6142 << (void*)N->getOperand(i).getNode() << ": <multiple use>";
6146 dbgs().indent(indent);
6150 SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
6151 assert(N->getNumValues() == 1 &&
6152 "Can't unroll a vector with multiple results!");
6154 EVT VT = N->getValueType(0);
6155 unsigned NE = VT.getVectorNumElements();
6156 EVT EltVT = VT.getVectorElementType();
6157 DebugLoc dl = N->getDebugLoc();
6159 SmallVector<SDValue, 8> Scalars;
6160 SmallVector<SDValue, 4> Operands(N->getNumOperands());
6162 // If ResNE is 0, fully unroll the vector op.
6165 else if (NE > ResNE)
6169 for (i= 0; i != NE; ++i) {
6170 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) {
6171 SDValue Operand = N->getOperand(j);
6172 EVT OperandVT = Operand.getValueType();
6173 if (OperandVT.isVector()) {
6174 // A vector operand; extract a single element.
6175 EVT OperandEltVT = OperandVT.getVectorElementType();
6176 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl,
6179 getConstant(i, MVT::i32));
6181 // A scalar operand; just use it as is.
6182 Operands[j] = Operand;
6186 switch (N->getOpcode()) {
6188 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6189 &Operands[0], Operands.size()));
6196 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0],
6197 getShiftAmountOperand(Operands[1])));
6199 case ISD::SIGN_EXTEND_INREG:
6200 case ISD::FP_ROUND_INREG: {
6201 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType();
6202 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6204 getValueType(ExtVT)));
6209 for (; i < ResNE; ++i)
6210 Scalars.push_back(getUNDEF(EltVT));
6212 return getNode(ISD::BUILD_VECTOR, dl,
6213 EVT::getVectorVT(*getContext(), EltVT, ResNE),
6214 &Scalars[0], Scalars.size());
6218 /// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a
6219 /// location that is 'Dist' units away from the location that the 'Base' load
6220 /// is loading from.
6221 bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base,
6222 unsigned Bytes, int Dist) const {
6223 if (LD->getChain() != Base->getChain())
6225 EVT VT = LD->getValueType(0);
6226 if (VT.getSizeInBits() / 8 != Bytes)
6229 SDValue Loc = LD->getOperand(1);
6230 SDValue BaseLoc = Base->getOperand(1);
6231 if (Loc.getOpcode() == ISD::FrameIndex) {
6232 if (BaseLoc.getOpcode() != ISD::FrameIndex)
6234 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo();
6235 int FI = cast<FrameIndexSDNode>(Loc)->getIndex();
6236 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex();
6237 int FS = MFI->getObjectSize(FI);
6238 int BFS = MFI->getObjectSize(BFI);
6239 if (FS != BFS || FS != (int)Bytes) return false;
6240 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes);
6242 if (Loc.getOpcode() == ISD::ADD && Loc.getOperand(0) == BaseLoc) {
6243 ConstantSDNode *V = dyn_cast<ConstantSDNode>(Loc.getOperand(1));
6244 if (V && (V->getSExtValue() == Dist*Bytes))
6248 const GlobalValue *GV1 = NULL;
6249 const GlobalValue *GV2 = NULL;
6250 int64_t Offset1 = 0;
6251 int64_t Offset2 = 0;
6252 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1);
6253 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2);
6254 if (isGA1 && isGA2 && GV1 == GV2)
6255 return Offset1 == (Offset2 + Dist*Bytes);
6260 /// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if
6261 /// it cannot be inferred.
6262 unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const {
6263 // If this is a GlobalAddress + cst, return the alignment.
6264 const GlobalValue *GV;
6265 int64_t GVOffset = 0;
6266 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) {
6267 // If GV has specified alignment, then use it. Otherwise, use the preferred
6269 unsigned Align = GV->getAlignment();
6271 if (const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV)) {
6272 if (GVar->hasInitializer()) {
6273 const TargetData *TD = TLI.getTargetData();
6274 Align = TD->getPreferredAlignment(GVar);
6278 return MinAlign(Align, GVOffset);
6281 // If this is a direct reference to a stack slot, use information about the
6282 // stack slot's alignment.
6283 int FrameIdx = 1 << 31;
6284 int64_t FrameOffset = 0;
6285 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) {
6286 FrameIdx = FI->getIndex();
6287 } else if (Ptr.getOpcode() == ISD::ADD &&
6288 isa<ConstantSDNode>(Ptr.getOperand(1)) &&
6289 isa<FrameIndexSDNode>(Ptr.getOperand(0))) {
6290 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
6291 FrameOffset = Ptr.getConstantOperandVal(1);
6294 if (FrameIdx != (1 << 31)) {
6295 // FIXME: Handle FI+CST.
6296 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo();
6297 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx),
6305 void SelectionDAG::dump() const {
6306 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:";
6308 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end();
6310 const SDNode *N = I;
6311 if (!N->hasOneUse() && N != getRoot().getNode())
6312 DumpNodes(N, 2, this);
6315 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
6320 void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
6322 print_details(OS, G);
6325 typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet;
6326 static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
6327 const SelectionDAG *G, VisitedSDNodeSet &once) {
6328 if (!once.insert(N)) // If we've been here before, return now.
6331 // Dump the current SDNode, but don't end the line yet.
6332 OS << std::string(indent, ' ');
6335 // Having printed this SDNode, walk the children:
6336 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6337 const SDNode *child = N->getOperand(i).getNode();
6342 if (child->getNumOperands() == 0) {
6343 // This child has no grandchildren; print it inline right here.
6344 child->printr(OS, G);
6346 } else { // Just the address. FIXME: also print the child's opcode.
6348 if (unsigned RN = N->getOperand(i).getResNo())
6355 // Dump children that have grandchildren on their own line(s).
6356 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6357 const SDNode *child = N->getOperand(i).getNode();
6358 DumpNodesr(OS, child, indent+2, G, once);
6362 void SDNode::dumpr() const {
6363 VisitedSDNodeSet once;
6364 DumpNodesr(dbgs(), this, 0, 0, once);
6367 void SDNode::dumpr(const SelectionDAG *G) const {
6368 VisitedSDNodeSet once;
6369 DumpNodesr(dbgs(), this, 0, G, once);
6373 // getAddressSpace - Return the address space this GlobalAddress belongs to.
6374 unsigned GlobalAddressSDNode::getAddressSpace() const {
6375 return getGlobal()->getType()->getAddressSpace();
6379 const Type *ConstantPoolSDNode::getType() const {
6380 if (isMachineConstantPoolEntry())
6381 return Val.MachineCPVal->getType();
6382 return Val.ConstVal->getType();
6385 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
6387 unsigned &SplatBitSize,
6389 unsigned MinSplatBits,
6391 EVT VT = getValueType(0);
6392 assert(VT.isVector() && "Expected a vector type");
6393 unsigned sz = VT.getSizeInBits();
6394 if (MinSplatBits > sz)
6397 SplatValue = APInt(sz, 0);
6398 SplatUndef = APInt(sz, 0);
6400 // Get the bits. Bits with undefined values (when the corresponding element
6401 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
6402 // in SplatValue. If any of the values are not constant, give up and return
6404 unsigned int nOps = getNumOperands();
6405 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
6406 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
6408 for (unsigned j = 0; j < nOps; ++j) {
6409 unsigned i = isBigEndian ? nOps-1-j : j;
6410 SDValue OpVal = getOperand(i);
6411 unsigned BitPos = j * EltBitSize;
6413 if (OpVal.getOpcode() == ISD::UNDEF)
6414 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize);
6415 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
6416 SplatValue |= CN->getAPIntValue().zextOrTrunc(EltBitSize).
6417 zextOrTrunc(sz) << BitPos;
6418 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
6419 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
6424 // The build_vector is all constants or undefs. Find the smallest element
6425 // size that splats the vector.
6427 HasAnyUndefs = (SplatUndef != 0);
6430 unsigned HalfSize = sz / 2;
6431 APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize);
6432 APInt LowValue = SplatValue.trunc(HalfSize);
6433 APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize);
6434 APInt LowUndef = SplatUndef.trunc(HalfSize);
6436 // If the two halves do not match (ignoring undef bits), stop here.
6437 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
6438 MinSplatBits > HalfSize)
6441 SplatValue = HighValue | LowValue;
6442 SplatUndef = HighUndef & LowUndef;
6451 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
6452 // Find the first non-undef value in the shuffle mask.
6454 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
6457 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
6459 // Make sure all remaining elements are either undef or the same as the first
6461 for (int Idx = Mask[i]; i != e; ++i)
6462 if (Mask[i] >= 0 && Mask[i] != Idx)
6468 static void checkForCyclesHelper(const SDNode *N,
6469 SmallPtrSet<const SDNode*, 32> &Visited,
6470 SmallPtrSet<const SDNode*, 32> &Checked) {
6471 // If this node has already been checked, don't check it again.
6472 if (Checked.count(N))
6475 // If a node has already been visited on this depth-first walk, reject it as
6477 if (!Visited.insert(N)) {
6478 dbgs() << "Offending node:\n";
6480 errs() << "Detected cycle in SelectionDAG\n";
6484 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6485 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked);
6492 void llvm::checkForCycles(const llvm::SDNode *N) {
6494 assert(N && "Checking nonexistant SDNode");
6495 SmallPtrSet<const SDNode*, 32> visited;
6496 SmallPtrSet<const SDNode*, 32> checked;
6497 checkForCyclesHelper(N, visited, checked);
6501 void llvm::checkForCycles(const llvm::SelectionDAG *DAG) {
6502 checkForCycles(DAG->getRoot().getNode());