1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "SDNodeOrdering.h"
16 #include "SDNodeDbgValue.h"
17 #include "llvm/Constants.h"
18 #include "llvm/Analysis/DebugInfo.h"
19 #include "llvm/Analysis/ValueTracking.h"
20 #include "llvm/Function.h"
21 #include "llvm/GlobalAlias.h"
22 #include "llvm/GlobalVariable.h"
23 #include "llvm/Intrinsics.h"
24 #include "llvm/DerivedTypes.h"
25 #include "llvm/Assembly/Writer.h"
26 #include "llvm/CallingConv.h"
27 #include "llvm/CodeGen/MachineBasicBlock.h"
28 #include "llvm/CodeGen/MachineConstantPool.h"
29 #include "llvm/CodeGen/MachineFrameInfo.h"
30 #include "llvm/CodeGen/MachineModuleInfo.h"
31 #include "llvm/CodeGen/PseudoSourceValue.h"
32 #include "llvm/Target/TargetRegisterInfo.h"
33 #include "llvm/Target/TargetData.h"
34 #include "llvm/Target/TargetLowering.h"
35 #include "llvm/Target/TargetSelectionDAGInfo.h"
36 #include "llvm/Target/TargetOptions.h"
37 #include "llvm/Target/TargetInstrInfo.h"
38 #include "llvm/Target/TargetIntrinsicInfo.h"
39 #include "llvm/Target/TargetMachine.h"
40 #include "llvm/Support/CommandLine.h"
41 #include "llvm/Support/Debug.h"
42 #include "llvm/Support/ErrorHandling.h"
43 #include "llvm/Support/ManagedStatic.h"
44 #include "llvm/Support/MathExtras.h"
45 #include "llvm/Support/raw_ostream.h"
46 #include "llvm/Support/Mutex.h"
47 #include "llvm/ADT/SetVector.h"
48 #include "llvm/ADT/SmallPtrSet.h"
49 #include "llvm/ADT/SmallSet.h"
50 #include "llvm/ADT/SmallVector.h"
51 #include "llvm/ADT/StringExtras.h"
56 /// makeVTList - Return an instance of the SDVTList struct initialized with the
57 /// specified members.
58 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
59 SDVTList Res = {VTs, NumVTs};
63 static const fltSemantics *EVTToAPFloatSemantics(EVT VT) {
64 switch (VT.getSimpleVT().SimpleTy) {
65 default: llvm_unreachable("Unknown FP format");
66 case MVT::f32: return &APFloat::IEEEsingle;
67 case MVT::f64: return &APFloat::IEEEdouble;
68 case MVT::f80: return &APFloat::x87DoubleExtended;
69 case MVT::f128: return &APFloat::IEEEquad;
70 case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
74 SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {}
76 //===----------------------------------------------------------------------===//
77 // ConstantFPSDNode Class
78 //===----------------------------------------------------------------------===//
80 /// isExactlyValue - We don't rely on operator== working on double values, as
81 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
82 /// As such, this method can be used to do an exact bit-for-bit comparison of
83 /// two floating point values.
84 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
85 return getValueAPF().bitwiseIsEqual(V);
88 bool ConstantFPSDNode::isValueValidForType(EVT VT,
90 assert(VT.isFloatingPoint() && "Can only convert between FP types");
92 // PPC long double cannot be converted to any other type.
93 if (VT == MVT::ppcf128 ||
94 &Val.getSemantics() == &APFloat::PPCDoubleDouble)
97 // convert modifies in place, so make a copy.
98 APFloat Val2 = APFloat(Val);
100 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
105 //===----------------------------------------------------------------------===//
107 //===----------------------------------------------------------------------===//
109 /// isBuildVectorAllOnes - Return true if the specified node is a
110 /// BUILD_VECTOR where all of the elements are ~0 or undef.
111 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
112 // Look through a bit convert.
113 if (N->getOpcode() == ISD::BITCAST)
114 N = N->getOperand(0).getNode();
116 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
118 unsigned i = 0, e = N->getNumOperands();
120 // Skip over all of the undef values.
121 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
124 // Do not accept an all-undef vector.
125 if (i == e) return false;
127 // Do not accept build_vectors that aren't all constants or which have non-~0
129 SDValue NotZero = N->getOperand(i);
130 if (isa<ConstantSDNode>(NotZero)) {
131 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue())
133 } else if (isa<ConstantFPSDNode>(NotZero)) {
134 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF().
135 bitcastToAPInt().isAllOnesValue())
140 // Okay, we have at least one ~0 value, check to see if the rest match or are
142 for (++i; i != e; ++i)
143 if (N->getOperand(i) != NotZero &&
144 N->getOperand(i).getOpcode() != ISD::UNDEF)
150 /// isBuildVectorAllZeros - Return true if the specified node is a
151 /// BUILD_VECTOR where all of the elements are 0 or undef.
152 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
153 // Look through a bit convert.
154 if (N->getOpcode() == ISD::BITCAST)
155 N = N->getOperand(0).getNode();
157 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
159 unsigned i = 0, e = N->getNumOperands();
161 // Skip over all of the undef values.
162 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
165 // Do not accept an all-undef vector.
166 if (i == e) return false;
168 // Do not accept build_vectors that aren't all constants or which have non-0
170 SDValue Zero = N->getOperand(i);
171 if (isa<ConstantSDNode>(Zero)) {
172 if (!cast<ConstantSDNode>(Zero)->isNullValue())
174 } else if (isa<ConstantFPSDNode>(Zero)) {
175 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero())
180 // Okay, we have at least one 0 value, check to see if the rest match or are
182 for (++i; i != e; ++i)
183 if (N->getOperand(i) != Zero &&
184 N->getOperand(i).getOpcode() != ISD::UNDEF)
189 /// isScalarToVector - Return true if the specified node is a
190 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
191 /// element is not an undef.
192 bool ISD::isScalarToVector(const SDNode *N) {
193 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
196 if (N->getOpcode() != ISD::BUILD_VECTOR)
198 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
200 unsigned NumElems = N->getNumOperands();
203 for (unsigned i = 1; i < NumElems; ++i) {
204 SDValue V = N->getOperand(i);
205 if (V.getOpcode() != ISD::UNDEF)
211 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
212 /// when given the operation for (X op Y).
213 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
214 // To perform this operation, we just need to swap the L and G bits of the
216 unsigned OldL = (Operation >> 2) & 1;
217 unsigned OldG = (Operation >> 1) & 1;
218 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
219 (OldL << 1) | // New G bit
220 (OldG << 2)); // New L bit.
223 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
224 /// 'op' is a valid SetCC operation.
225 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
226 unsigned Operation = Op;
228 Operation ^= 7; // Flip L, G, E bits, but not U.
230 Operation ^= 15; // Flip all of the condition bits.
232 if (Operation > ISD::SETTRUE2)
233 Operation &= ~8; // Don't let N and U bits get set.
235 return ISD::CondCode(Operation);
239 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
240 /// signed operation and 2 if the result is an unsigned comparison. Return zero
241 /// if the operation does not depend on the sign of the input (setne and seteq).
242 static int isSignedOp(ISD::CondCode Opcode) {
244 default: llvm_unreachable("Illegal integer setcc operation!");
246 case ISD::SETNE: return 0;
250 case ISD::SETGE: return 1;
254 case ISD::SETUGE: return 2;
258 /// getSetCCOrOperation - Return the result of a logical OR between different
259 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
260 /// returns SETCC_INVALID if it is not possible to represent the resultant
262 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
264 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
265 // Cannot fold a signed integer setcc with an unsigned integer setcc.
266 return ISD::SETCC_INVALID;
268 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
270 // If the N and U bits get set then the resultant comparison DOES suddenly
271 // care about orderedness, and is true when ordered.
272 if (Op > ISD::SETTRUE2)
273 Op &= ~16; // Clear the U bit if the N bit is set.
275 // Canonicalize illegal integer setcc's.
276 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
279 return ISD::CondCode(Op);
282 /// getSetCCAndOperation - Return the result of a logical AND between different
283 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
284 /// function returns zero if it is not possible to represent the resultant
286 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
288 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
289 // Cannot fold a signed setcc with an unsigned setcc.
290 return ISD::SETCC_INVALID;
292 // Combine all of the condition bits.
293 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
295 // Canonicalize illegal integer setcc's.
299 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
300 case ISD::SETOEQ: // SETEQ & SETU[LG]E
301 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
302 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
303 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
310 //===----------------------------------------------------------------------===//
311 // SDNode Profile Support
312 //===----------------------------------------------------------------------===//
314 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
316 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
320 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
321 /// solely with their pointer.
322 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
323 ID.AddPointer(VTList.VTs);
326 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
328 static void AddNodeIDOperands(FoldingSetNodeID &ID,
329 const SDValue *Ops, unsigned NumOps) {
330 for (; NumOps; --NumOps, ++Ops) {
331 ID.AddPointer(Ops->getNode());
332 ID.AddInteger(Ops->getResNo());
336 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
338 static void AddNodeIDOperands(FoldingSetNodeID &ID,
339 const SDUse *Ops, unsigned NumOps) {
340 for (; NumOps; --NumOps, ++Ops) {
341 ID.AddPointer(Ops->getNode());
342 ID.AddInteger(Ops->getResNo());
346 static void AddNodeIDNode(FoldingSetNodeID &ID,
347 unsigned short OpC, SDVTList VTList,
348 const SDValue *OpList, unsigned N) {
349 AddNodeIDOpcode(ID, OpC);
350 AddNodeIDValueTypes(ID, VTList);
351 AddNodeIDOperands(ID, OpList, N);
354 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
356 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
357 switch (N->getOpcode()) {
358 case ISD::TargetExternalSymbol:
359 case ISD::ExternalSymbol:
360 llvm_unreachable("Should only be used on nodes with operands");
361 default: break; // Normal nodes don't need extra info.
362 case ISD::TargetConstant:
364 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
366 case ISD::TargetConstantFP:
367 case ISD::ConstantFP: {
368 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
371 case ISD::TargetGlobalAddress:
372 case ISD::GlobalAddress:
373 case ISD::TargetGlobalTLSAddress:
374 case ISD::GlobalTLSAddress: {
375 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
376 ID.AddPointer(GA->getGlobal());
377 ID.AddInteger(GA->getOffset());
378 ID.AddInteger(GA->getTargetFlags());
381 case ISD::BasicBlock:
382 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
385 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
389 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
391 case ISD::FrameIndex:
392 case ISD::TargetFrameIndex:
393 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
396 case ISD::TargetJumpTable:
397 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
398 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
400 case ISD::ConstantPool:
401 case ISD::TargetConstantPool: {
402 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
403 ID.AddInteger(CP->getAlignment());
404 ID.AddInteger(CP->getOffset());
405 if (CP->isMachineConstantPoolEntry())
406 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID);
408 ID.AddPointer(CP->getConstVal());
409 ID.AddInteger(CP->getTargetFlags());
413 const LoadSDNode *LD = cast<LoadSDNode>(N);
414 ID.AddInteger(LD->getMemoryVT().getRawBits());
415 ID.AddInteger(LD->getRawSubclassData());
419 const StoreSDNode *ST = cast<StoreSDNode>(N);
420 ID.AddInteger(ST->getMemoryVT().getRawBits());
421 ID.AddInteger(ST->getRawSubclassData());
424 case ISD::ATOMIC_CMP_SWAP:
425 case ISD::ATOMIC_SWAP:
426 case ISD::ATOMIC_LOAD_ADD:
427 case ISD::ATOMIC_LOAD_SUB:
428 case ISD::ATOMIC_LOAD_AND:
429 case ISD::ATOMIC_LOAD_OR:
430 case ISD::ATOMIC_LOAD_XOR:
431 case ISD::ATOMIC_LOAD_NAND:
432 case ISD::ATOMIC_LOAD_MIN:
433 case ISD::ATOMIC_LOAD_MAX:
434 case ISD::ATOMIC_LOAD_UMIN:
435 case ISD::ATOMIC_LOAD_UMAX:
436 case ISD::ATOMIC_LOAD:
437 case ISD::ATOMIC_STORE: {
438 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
439 ID.AddInteger(AT->getMemoryVT().getRawBits());
440 ID.AddInteger(AT->getRawSubclassData());
443 case ISD::VECTOR_SHUFFLE: {
444 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
445 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
447 ID.AddInteger(SVN->getMaskElt(i));
450 case ISD::TargetBlockAddress:
451 case ISD::BlockAddress: {
452 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress());
453 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags());
456 } // end switch (N->getOpcode())
459 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
461 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
462 AddNodeIDOpcode(ID, N->getOpcode());
463 // Add the return value info.
464 AddNodeIDValueTypes(ID, N->getVTList());
465 // Add the operand info.
466 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
468 // Handle SDNode leafs with special info.
469 AddNodeIDCustom(ID, N);
472 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
473 /// the CSE map that carries volatility, temporalness, indexing mode, and
474 /// extension/truncation information.
476 static inline unsigned
477 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile,
478 bool isNonTemporal) {
479 assert((ConvType & 3) == ConvType &&
480 "ConvType may not require more than 2 bits!");
481 assert((AM & 7) == AM &&
482 "AM may not require more than 3 bits!");
486 (isNonTemporal << 6);
489 //===----------------------------------------------------------------------===//
490 // SelectionDAG Class
491 //===----------------------------------------------------------------------===//
493 /// doNotCSE - Return true if CSE should not be performed for this node.
494 static bool doNotCSE(SDNode *N) {
495 if (N->getValueType(0) == MVT::Glue)
496 return true; // Never CSE anything that produces a flag.
498 switch (N->getOpcode()) {
500 case ISD::HANDLENODE:
502 return true; // Never CSE these nodes.
505 // Check that remaining values produced are not flags.
506 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
507 if (N->getValueType(i) == MVT::Glue)
508 return true; // Never CSE anything that produces a flag.
513 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
515 void SelectionDAG::RemoveDeadNodes() {
516 // Create a dummy node (which is not added to allnodes), that adds a reference
517 // to the root node, preventing it from being deleted.
518 HandleSDNode Dummy(getRoot());
520 SmallVector<SDNode*, 128> DeadNodes;
522 // Add all obviously-dead nodes to the DeadNodes worklist.
523 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
525 DeadNodes.push_back(I);
527 RemoveDeadNodes(DeadNodes);
529 // If the root changed (e.g. it was a dead load, update the root).
530 setRoot(Dummy.getValue());
533 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
534 /// given list, and any nodes that become unreachable as a result.
535 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes,
536 DAGUpdateListener *UpdateListener) {
538 // Process the worklist, deleting the nodes and adding their uses to the
540 while (!DeadNodes.empty()) {
541 SDNode *N = DeadNodes.pop_back_val();
544 UpdateListener->NodeDeleted(N, 0);
546 // Take the node out of the appropriate CSE map.
547 RemoveNodeFromCSEMaps(N);
549 // Next, brutally remove the operand list. This is safe to do, as there are
550 // no cycles in the graph.
551 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
553 SDNode *Operand = Use.getNode();
556 // Now that we removed this operand, see if there are no uses of it left.
557 if (Operand->use_empty())
558 DeadNodes.push_back(Operand);
565 void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){
566 SmallVector<SDNode*, 16> DeadNodes(1, N);
567 RemoveDeadNodes(DeadNodes, UpdateListener);
570 void SelectionDAG::DeleteNode(SDNode *N) {
571 // First take this out of the appropriate CSE map.
572 RemoveNodeFromCSEMaps(N);
574 // Finally, remove uses due to operands of this node, remove from the
575 // AllNodes list, and delete the node.
576 DeleteNodeNotInCSEMaps(N);
579 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
580 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
581 assert(N->use_empty() && "Cannot delete a node that is not dead!");
583 // Drop all of the operands and decrement used node's use counts.
589 void SelectionDAG::DeallocateNode(SDNode *N) {
590 if (N->OperandsNeedDelete)
591 delete[] N->OperandList;
593 // Set the opcode to DELETED_NODE to help catch bugs when node
594 // memory is reallocated.
595 N->NodeType = ISD::DELETED_NODE;
597 NodeAllocator.Deallocate(AllNodes.remove(N));
599 // Remove the ordering of this node.
602 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them.
603 ArrayRef<SDDbgValue*> DbgVals = DbgInfo->getSDDbgValues(N);
604 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i)
605 DbgVals[i]->setIsInvalidated();
608 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
609 /// correspond to it. This is useful when we're about to delete or repurpose
610 /// the node. We don't want future request for structurally identical nodes
611 /// to return N anymore.
612 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
614 switch (N->getOpcode()) {
615 case ISD::HANDLENODE: return false; // noop.
617 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
618 "Cond code doesn't exist!");
619 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
620 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
622 case ISD::ExternalSymbol:
623 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
625 case ISD::TargetExternalSymbol: {
626 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
627 Erased = TargetExternalSymbols.erase(
628 std::pair<std::string,unsigned char>(ESN->getSymbol(),
629 ESN->getTargetFlags()));
632 case ISD::VALUETYPE: {
633 EVT VT = cast<VTSDNode>(N)->getVT();
634 if (VT.isExtended()) {
635 Erased = ExtendedValueTypeNodes.erase(VT);
637 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0;
638 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0;
643 // Remove it from the CSE Map.
644 assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!");
645 assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!");
646 Erased = CSEMap.RemoveNode(N);
650 // Verify that the node was actually in one of the CSE maps, unless it has a
651 // flag result (which cannot be CSE'd) or is one of the special cases that are
652 // not subject to CSE.
653 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue &&
654 !N->isMachineOpcode() && !doNotCSE(N)) {
657 llvm_unreachable("Node is not in map!");
663 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
664 /// maps and modified in place. Add it back to the CSE maps, unless an identical
665 /// node already exists, in which case transfer all its users to the existing
666 /// node. This transfer can potentially trigger recursive merging.
669 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N,
670 DAGUpdateListener *UpdateListener) {
671 // For node types that aren't CSE'd, just act as if no identical node
674 SDNode *Existing = CSEMap.GetOrInsertNode(N);
676 // If there was already an existing matching node, use ReplaceAllUsesWith
677 // to replace the dead one with the existing one. This can cause
678 // recursive merging of other unrelated nodes down the line.
679 ReplaceAllUsesWith(N, Existing, UpdateListener);
681 // N is now dead. Inform the listener if it exists and delete it.
683 UpdateListener->NodeDeleted(N, Existing);
684 DeleteNodeNotInCSEMaps(N);
689 // If the node doesn't already exist, we updated it. Inform a listener if
692 UpdateListener->NodeUpdated(N);
695 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
696 /// were replaced with those specified. If this node is never memoized,
697 /// return null, otherwise return a pointer to the slot it would take. If a
698 /// node already exists with these operands, the slot will be non-null.
699 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
704 SDValue Ops[] = { Op };
706 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
707 AddNodeIDCustom(ID, N);
708 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
712 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
713 /// were replaced with those specified. If this node is never memoized,
714 /// return null, otherwise return a pointer to the slot it would take. If a
715 /// node already exists with these operands, the slot will be non-null.
716 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
717 SDValue Op1, SDValue Op2,
722 SDValue Ops[] = { Op1, Op2 };
724 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
725 AddNodeIDCustom(ID, N);
726 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
731 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
732 /// were replaced with those specified. If this node is never memoized,
733 /// return null, otherwise return a pointer to the slot it would take. If a
734 /// node already exists with these operands, the slot will be non-null.
735 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
736 const SDValue *Ops,unsigned NumOps,
742 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
743 AddNodeIDCustom(ID, N);
744 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
749 /// VerifyNodeCommon - Sanity check the given node. Aborts if it is invalid.
750 static void VerifyNodeCommon(SDNode *N) {
751 switch (N->getOpcode()) {
754 case ISD::BUILD_PAIR: {
755 EVT VT = N->getValueType(0);
756 assert(N->getNumValues() == 1 && "Too many results!");
757 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
758 "Wrong return type!");
759 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
760 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
761 "Mismatched operand types!");
762 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
763 "Wrong operand type!");
764 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
765 "Wrong return type size");
768 case ISD::BUILD_VECTOR: {
769 assert(N->getNumValues() == 1 && "Too many results!");
770 assert(N->getValueType(0).isVector() && "Wrong return type!");
771 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
772 "Wrong number of operands!");
773 EVT EltVT = N->getValueType(0).getVectorElementType();
774 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I)
775 assert((I->getValueType() == EltVT ||
776 (EltVT.isInteger() && I->getValueType().isInteger() &&
777 EltVT.bitsLE(I->getValueType()))) &&
778 "Wrong operand type!");
784 /// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid.
785 static void VerifySDNode(SDNode *N) {
786 // The SDNode allocators cannot be used to allocate nodes with fields that are
787 // not present in an SDNode!
788 assert(!isa<MemSDNode>(N) && "Bad MemSDNode!");
789 assert(!isa<ShuffleVectorSDNode>(N) && "Bad ShuffleVectorSDNode!");
790 assert(!isa<ConstantSDNode>(N) && "Bad ConstantSDNode!");
791 assert(!isa<ConstantFPSDNode>(N) && "Bad ConstantFPSDNode!");
792 assert(!isa<GlobalAddressSDNode>(N) && "Bad GlobalAddressSDNode!");
793 assert(!isa<FrameIndexSDNode>(N) && "Bad FrameIndexSDNode!");
794 assert(!isa<JumpTableSDNode>(N) && "Bad JumpTableSDNode!");
795 assert(!isa<ConstantPoolSDNode>(N) && "Bad ConstantPoolSDNode!");
796 assert(!isa<BasicBlockSDNode>(N) && "Bad BasicBlockSDNode!");
797 assert(!isa<SrcValueSDNode>(N) && "Bad SrcValueSDNode!");
798 assert(!isa<MDNodeSDNode>(N) && "Bad MDNodeSDNode!");
799 assert(!isa<RegisterSDNode>(N) && "Bad RegisterSDNode!");
800 assert(!isa<BlockAddressSDNode>(N) && "Bad BlockAddressSDNode!");
801 assert(!isa<EHLabelSDNode>(N) && "Bad EHLabelSDNode!");
802 assert(!isa<ExternalSymbolSDNode>(N) && "Bad ExternalSymbolSDNode!");
803 assert(!isa<CondCodeSDNode>(N) && "Bad CondCodeSDNode!");
804 assert(!isa<CvtRndSatSDNode>(N) && "Bad CvtRndSatSDNode!");
805 assert(!isa<VTSDNode>(N) && "Bad VTSDNode!");
806 assert(!isa<MachineSDNode>(N) && "Bad MachineSDNode!");
811 /// VerifyMachineNode - Sanity check the given MachineNode. Aborts if it is
813 static void VerifyMachineNode(SDNode *N) {
814 // The MachineNode allocators cannot be used to allocate nodes with fields
815 // that are not present in a MachineNode!
816 // Currently there are no such nodes.
822 /// getEVTAlignment - Compute the default alignment value for the
825 unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
826 Type *Ty = VT == MVT::iPTR ?
827 PointerType::get(Type::getInt8Ty(*getContext()), 0) :
828 VT.getTypeForEVT(*getContext());
830 return TLI.getTargetData()->getABITypeAlignment(Ty);
833 // EntryNode could meaningfully have debug info if we can find it...
834 SelectionDAG::SelectionDAG(const TargetMachine &tm)
835 : TM(tm), TLI(*tm.getTargetLowering()), TSI(*tm.getSelectionDAGInfo()),
836 EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Other)),
837 Root(getEntryNode()), Ordering(0) {
838 AllNodes.push_back(&EntryNode);
839 Ordering = new SDNodeOrdering();
840 DbgInfo = new SDDbgInfo();
843 void SelectionDAG::init(MachineFunction &mf) {
845 Context = &mf.getFunction()->getContext();
848 SelectionDAG::~SelectionDAG() {
854 void SelectionDAG::allnodes_clear() {
855 assert(&*AllNodes.begin() == &EntryNode);
856 AllNodes.remove(AllNodes.begin());
857 while (!AllNodes.empty())
858 DeallocateNode(AllNodes.begin());
861 void SelectionDAG::clear() {
863 OperandAllocator.Reset();
866 ExtendedValueTypeNodes.clear();
867 ExternalSymbols.clear();
868 TargetExternalSymbols.clear();
869 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
870 static_cast<CondCodeSDNode*>(0));
871 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
872 static_cast<SDNode*>(0));
874 EntryNode.UseList = 0;
875 AllNodes.push_back(&EntryNode);
876 Root = getEntryNode();
881 SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
882 return VT.bitsGT(Op.getValueType()) ?
883 getNode(ISD::SIGN_EXTEND, DL, VT, Op) :
884 getNode(ISD::TRUNCATE, DL, VT, Op);
887 SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
888 return VT.bitsGT(Op.getValueType()) ?
889 getNode(ISD::ZERO_EXTEND, DL, VT, Op) :
890 getNode(ISD::TRUNCATE, DL, VT, Op);
893 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) {
894 assert(!VT.isVector() &&
895 "getZeroExtendInReg should use the vector element type instead of "
897 if (Op.getValueType() == VT) return Op;
898 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
899 APInt Imm = APInt::getLowBitsSet(BitWidth,
901 return getNode(ISD::AND, DL, Op.getValueType(), Op,
902 getConstant(Imm, Op.getValueType()));
905 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
907 SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) {
908 EVT EltVT = VT.getScalarType();
910 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT);
911 return getNode(ISD::XOR, DL, VT, Val, NegOne);
914 SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) {
915 EVT EltVT = VT.getScalarType();
916 assert((EltVT.getSizeInBits() >= 64 ||
917 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
918 "getConstant with a uint64_t value that doesn't fit in the type!");
919 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
922 SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) {
923 return getConstant(*ConstantInt::get(*Context, Val), VT, isT);
926 SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) {
927 assert(VT.isInteger() && "Cannot create FP integer constant!");
929 EVT EltVT = VT.getScalarType();
930 assert(Val.getBitWidth() == EltVT.getSizeInBits() &&
931 "APInt size does not match type size!");
933 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
935 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
939 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
941 return SDValue(N, 0);
944 N = new (NodeAllocator) ConstantSDNode(isT, &Val, EltVT);
945 CSEMap.InsertNode(N, IP);
946 AllNodes.push_back(N);
949 SDValue Result(N, 0);
951 SmallVector<SDValue, 8> Ops;
952 Ops.assign(VT.getVectorNumElements(), Result);
953 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
958 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
959 return getConstant(Val, TLI.getPointerTy(), isTarget);
963 SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) {
964 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget);
967 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){
968 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
970 EVT EltVT = VT.getScalarType();
972 // Do the map lookup using the actual bit pattern for the floating point
973 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
974 // we don't have issues with SNANs.
975 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
977 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
981 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
983 return SDValue(N, 0);
986 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT);
987 CSEMap.InsertNode(N, IP);
988 AllNodes.push_back(N);
991 SDValue Result(N, 0);
993 SmallVector<SDValue, 8> Ops;
994 Ops.assign(VT.getVectorNumElements(), Result);
995 // FIXME DebugLoc info might be appropriate here
996 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
1001 SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) {
1002 EVT EltVT = VT.getScalarType();
1003 if (EltVT==MVT::f32)
1004 return getConstantFP(APFloat((float)Val), VT, isTarget);
1005 else if (EltVT==MVT::f64)
1006 return getConstantFP(APFloat(Val), VT, isTarget);
1007 else if (EltVT==MVT::f80 || EltVT==MVT::f128) {
1009 APFloat apf = APFloat(Val);
1010 apf.convert(*EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven,
1012 return getConstantFP(apf, VT, isTarget);
1014 assert(0 && "Unsupported type in getConstantFP");
1019 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, DebugLoc DL,
1020 EVT VT, int64_t Offset,
1022 unsigned char TargetFlags) {
1023 assert((TargetFlags == 0 || isTargetGA) &&
1024 "Cannot set target flags on target-independent globals");
1026 // Truncate (with sign-extension) the offset value to the pointer size.
1027 EVT PTy = TLI.getPointerTy();
1028 unsigned BitWidth = PTy.getSizeInBits();
1030 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth));
1032 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
1034 // If GV is an alias then use the aliasee for determining thread-localness.
1035 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
1036 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
1040 if (GVar && GVar->isThreadLocal())
1041 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
1043 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
1045 FoldingSetNodeID ID;
1046 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1048 ID.AddInteger(Offset);
1049 ID.AddInteger(TargetFlags);
1051 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1052 return SDValue(E, 0);
1054 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL, GV, VT,
1055 Offset, TargetFlags);
1056 CSEMap.InsertNode(N, IP);
1057 AllNodes.push_back(N);
1058 return SDValue(N, 0);
1061 SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
1062 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1063 FoldingSetNodeID ID;
1064 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1067 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1068 return SDValue(E, 0);
1070 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget);
1071 CSEMap.InsertNode(N, IP);
1072 AllNodes.push_back(N);
1073 return SDValue(N, 0);
1076 SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
1077 unsigned char TargetFlags) {
1078 assert((TargetFlags == 0 || isTarget) &&
1079 "Cannot set target flags on target-independent jump tables");
1080 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1081 FoldingSetNodeID ID;
1082 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1084 ID.AddInteger(TargetFlags);
1086 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1087 return SDValue(E, 0);
1089 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget,
1091 CSEMap.InsertNode(N, IP);
1092 AllNodes.push_back(N);
1093 return SDValue(N, 0);
1096 SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT,
1097 unsigned Alignment, int Offset,
1099 unsigned char TargetFlags) {
1100 assert((TargetFlags == 0 || isTarget) &&
1101 "Cannot set target flags on target-independent globals");
1103 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1104 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1105 FoldingSetNodeID ID;
1106 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1107 ID.AddInteger(Alignment);
1108 ID.AddInteger(Offset);
1110 ID.AddInteger(TargetFlags);
1112 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1113 return SDValue(E, 0);
1115 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1116 Alignment, TargetFlags);
1117 CSEMap.InsertNode(N, IP);
1118 AllNodes.push_back(N);
1119 return SDValue(N, 0);
1123 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
1124 unsigned Alignment, int Offset,
1126 unsigned char TargetFlags) {
1127 assert((TargetFlags == 0 || isTarget) &&
1128 "Cannot set target flags on target-independent globals");
1130 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1131 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1132 FoldingSetNodeID ID;
1133 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1134 ID.AddInteger(Alignment);
1135 ID.AddInteger(Offset);
1136 C->AddSelectionDAGCSEId(ID);
1137 ID.AddInteger(TargetFlags);
1139 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1140 return SDValue(E, 0);
1142 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1143 Alignment, TargetFlags);
1144 CSEMap.InsertNode(N, IP);
1145 AllNodes.push_back(N);
1146 return SDValue(N, 0);
1149 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1150 FoldingSetNodeID ID;
1151 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1154 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1155 return SDValue(E, 0);
1157 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB);
1158 CSEMap.InsertNode(N, IP);
1159 AllNodes.push_back(N);
1160 return SDValue(N, 0);
1163 SDValue SelectionDAG::getValueType(EVT VT) {
1164 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
1165 ValueTypeNodes.size())
1166 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
1168 SDNode *&N = VT.isExtended() ?
1169 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
1171 if (N) return SDValue(N, 0);
1172 N = new (NodeAllocator) VTSDNode(VT);
1173 AllNodes.push_back(N);
1174 return SDValue(N, 0);
1177 SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
1178 SDNode *&N = ExternalSymbols[Sym];
1179 if (N) return SDValue(N, 0);
1180 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT);
1181 AllNodes.push_back(N);
1182 return SDValue(N, 0);
1185 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
1186 unsigned char TargetFlags) {
1188 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1190 if (N) return SDValue(N, 0);
1191 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1192 AllNodes.push_back(N);
1193 return SDValue(N, 0);
1196 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1197 if ((unsigned)Cond >= CondCodeNodes.size())
1198 CondCodeNodes.resize(Cond+1);
1200 if (CondCodeNodes[Cond] == 0) {
1201 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond);
1202 CondCodeNodes[Cond] = N;
1203 AllNodes.push_back(N);
1206 return SDValue(CondCodeNodes[Cond], 0);
1209 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1210 // the shuffle mask M that point at N1 to point at N2, and indices that point
1211 // N2 to point at N1.
1212 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1214 int NElts = M.size();
1215 for (int i = 0; i != NElts; ++i) {
1223 SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1,
1224 SDValue N2, const int *Mask) {
1225 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE");
1226 assert(VT.isVector() && N1.getValueType().isVector() &&
1227 "Vector Shuffle VTs must be a vectors");
1228 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType()
1229 && "Vector Shuffle VTs must have same element type");
1231 // Canonicalize shuffle undef, undef -> undef
1232 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1233 return getUNDEF(VT);
1235 // Validate that all indices in Mask are within the range of the elements
1236 // input to the shuffle.
1237 unsigned NElts = VT.getVectorNumElements();
1238 SmallVector<int, 8> MaskVec;
1239 for (unsigned i = 0; i != NElts; ++i) {
1240 assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1241 MaskVec.push_back(Mask[i]);
1244 // Canonicalize shuffle v, v -> v, undef
1247 for (unsigned i = 0; i != NElts; ++i)
1248 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1251 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1252 if (N1.getOpcode() == ISD::UNDEF)
1253 commuteShuffle(N1, N2, MaskVec);
1255 // Canonicalize all index into lhs, -> shuffle lhs, undef
1256 // Canonicalize all index into rhs, -> shuffle rhs, undef
1257 bool AllLHS = true, AllRHS = true;
1258 bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1259 for (unsigned i = 0; i != NElts; ++i) {
1260 if (MaskVec[i] >= (int)NElts) {
1265 } else if (MaskVec[i] >= 0) {
1269 if (AllLHS && AllRHS)
1270 return getUNDEF(VT);
1271 if (AllLHS && !N2Undef)
1275 commuteShuffle(N1, N2, MaskVec);
1278 // If Identity shuffle, or all shuffle in to undef, return that node.
1279 bool AllUndef = true;
1280 bool Identity = true;
1281 for (unsigned i = 0; i != NElts; ++i) {
1282 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1283 if (MaskVec[i] >= 0) AllUndef = false;
1285 if (Identity && NElts == N1.getValueType().getVectorNumElements())
1288 return getUNDEF(VT);
1290 FoldingSetNodeID ID;
1291 SDValue Ops[2] = { N1, N2 };
1292 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2);
1293 for (unsigned i = 0; i != NElts; ++i)
1294 ID.AddInteger(MaskVec[i]);
1297 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1298 return SDValue(E, 0);
1300 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1301 // SDNode doesn't have access to it. This memory will be "leaked" when
1302 // the node is deallocated, but recovered when the NodeAllocator is released.
1303 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1304 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1306 ShuffleVectorSDNode *N =
1307 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc);
1308 CSEMap.InsertNode(N, IP);
1309 AllNodes.push_back(N);
1310 return SDValue(N, 0);
1313 SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl,
1314 SDValue Val, SDValue DTy,
1315 SDValue STy, SDValue Rnd, SDValue Sat,
1316 ISD::CvtCode Code) {
1317 // If the src and dest types are the same and the conversion is between
1318 // integer types of the same sign or two floats, no conversion is necessary.
1320 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1323 FoldingSetNodeID ID;
1324 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1325 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5);
1327 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1328 return SDValue(E, 0);
1330 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5,
1332 CSEMap.InsertNode(N, IP);
1333 AllNodes.push_back(N);
1334 return SDValue(N, 0);
1337 SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
1338 FoldingSetNodeID ID;
1339 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1340 ID.AddInteger(RegNo);
1342 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1343 return SDValue(E, 0);
1345 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT);
1346 CSEMap.InsertNode(N, IP);
1347 AllNodes.push_back(N);
1348 return SDValue(N, 0);
1351 SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) {
1352 FoldingSetNodeID ID;
1353 SDValue Ops[] = { Root };
1354 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1);
1355 ID.AddPointer(Label);
1357 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1358 return SDValue(E, 0);
1360 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label);
1361 CSEMap.InsertNode(N, IP);
1362 AllNodes.push_back(N);
1363 return SDValue(N, 0);
1367 SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT,
1369 unsigned char TargetFlags) {
1370 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress;
1372 FoldingSetNodeID ID;
1373 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1375 ID.AddInteger(TargetFlags);
1377 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1378 return SDValue(E, 0);
1380 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, TargetFlags);
1381 CSEMap.InsertNode(N, IP);
1382 AllNodes.push_back(N);
1383 return SDValue(N, 0);
1386 SDValue SelectionDAG::getSrcValue(const Value *V) {
1387 assert((!V || V->getType()->isPointerTy()) &&
1388 "SrcValue is not a pointer?");
1390 FoldingSetNodeID ID;
1391 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1395 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1396 return SDValue(E, 0);
1398 SDNode *N = new (NodeAllocator) SrcValueSDNode(V);
1399 CSEMap.InsertNode(N, IP);
1400 AllNodes.push_back(N);
1401 return SDValue(N, 0);
1404 /// getMDNode - Return an MDNodeSDNode which holds an MDNode.
1405 SDValue SelectionDAG::getMDNode(const MDNode *MD) {
1406 FoldingSetNodeID ID;
1407 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0);
1411 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1412 return SDValue(E, 0);
1414 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD);
1415 CSEMap.InsertNode(N, IP);
1416 AllNodes.push_back(N);
1417 return SDValue(N, 0);
1421 /// getShiftAmountOperand - Return the specified value casted to
1422 /// the target's desired shift amount type.
1423 SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) {
1424 EVT OpTy = Op.getValueType();
1425 MVT ShTy = TLI.getShiftAmountTy(LHSTy);
1426 if (OpTy == ShTy || OpTy.isVector()) return Op;
1428 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1429 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op);
1432 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1433 /// specified value type.
1434 SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
1435 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1436 unsigned ByteSize = VT.getStoreSize();
1437 Type *Ty = VT.getTypeForEVT(*getContext());
1438 unsigned StackAlign =
1439 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign);
1441 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false);
1442 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1445 /// CreateStackTemporary - Create a stack temporary suitable for holding
1446 /// either of the specified value types.
1447 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
1448 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1449 VT2.getStoreSizeInBits())/8;
1450 Type *Ty1 = VT1.getTypeForEVT(*getContext());
1451 Type *Ty2 = VT2.getTypeForEVT(*getContext());
1452 const TargetData *TD = TLI.getTargetData();
1453 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1454 TD->getPrefTypeAlignment(Ty2));
1456 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1457 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false);
1458 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1461 SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
1462 SDValue N2, ISD::CondCode Cond, DebugLoc dl) {
1463 // These setcc operations always fold.
1467 case ISD::SETFALSE2: return getConstant(0, VT);
1469 case ISD::SETTRUE2: return getConstant(1, VT);
1481 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1485 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1486 const APInt &C2 = N2C->getAPIntValue();
1487 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1488 const APInt &C1 = N1C->getAPIntValue();
1491 default: llvm_unreachable("Unknown integer setcc!");
1492 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1493 case ISD::SETNE: return getConstant(C1 != C2, VT);
1494 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1495 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1496 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1497 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1498 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1499 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1500 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1501 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1505 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1506 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1507 // No compile time operations on this type yet.
1508 if (N1C->getValueType(0) == MVT::ppcf128)
1511 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1514 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1515 return getUNDEF(VT);
1517 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1518 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1519 return getUNDEF(VT);
1521 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1522 R==APFloat::cmpLessThan, VT);
1523 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1524 return getUNDEF(VT);
1526 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1527 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1528 return getUNDEF(VT);
1530 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1531 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1532 return getUNDEF(VT);
1534 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1535 R==APFloat::cmpEqual, VT);
1536 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1537 return getUNDEF(VT);
1539 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1540 R==APFloat::cmpEqual, VT);
1541 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1542 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1543 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1544 R==APFloat::cmpEqual, VT);
1545 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1546 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1547 R==APFloat::cmpLessThan, VT);
1548 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1549 R==APFloat::cmpUnordered, VT);
1550 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1551 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1554 // Ensure that the constant occurs on the RHS.
1555 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1559 // Could not fold it.
1563 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1564 /// use this predicate to simplify operations downstream.
1565 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1566 // This predicate is not safe for vector operations.
1567 if (Op.getValueType().isVector())
1570 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1571 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1574 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1575 /// this predicate to simplify operations downstream. Mask is known to be zero
1576 /// for bits that V cannot have.
1577 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1578 unsigned Depth) const {
1579 APInt KnownZero, KnownOne;
1580 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
1581 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1582 return (KnownZero & Mask) == Mask;
1585 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1586 /// known to be either zero or one and return them in the KnownZero/KnownOne
1587 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1589 void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask,
1590 APInt &KnownZero, APInt &KnownOne,
1591 unsigned Depth) const {
1592 unsigned BitWidth = Mask.getBitWidth();
1593 assert(BitWidth == Op.getValueType().getScalarType().getSizeInBits() &&
1594 "Mask size mismatches value type size!");
1596 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1597 if (Depth == 6 || Mask == 0)
1598 return; // Limit search depth.
1600 APInt KnownZero2, KnownOne2;
1602 switch (Op.getOpcode()) {
1604 // We know all of the bits for a constant!
1605 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask;
1606 KnownZero = ~KnownOne & Mask;
1609 // If either the LHS or the RHS are Zero, the result is zero.
1610 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1611 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero,
1612 KnownZero2, KnownOne2, Depth+1);
1613 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1614 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1616 // Output known-1 bits are only known if set in both the LHS & RHS.
1617 KnownOne &= KnownOne2;
1618 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1619 KnownZero |= KnownZero2;
1622 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1623 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne,
1624 KnownZero2, KnownOne2, Depth+1);
1625 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1626 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1628 // Output known-0 bits are only known if clear in both the LHS & RHS.
1629 KnownZero &= KnownZero2;
1630 // Output known-1 are known to be set if set in either the LHS | RHS.
1631 KnownOne |= KnownOne2;
1634 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1635 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
1636 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1637 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1639 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1640 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1641 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1642 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1643 KnownZero = KnownZeroOut;
1647 APInt Mask2 = APInt::getAllOnesValue(BitWidth);
1648 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1);
1649 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1650 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1651 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1653 // If low bits are zero in either operand, output low known-0 bits.
1654 // Also compute a conserative estimate for high known-0 bits.
1655 // More trickiness is possible, but this is sufficient for the
1656 // interesting case of alignment computation.
1657 KnownOne.clearAllBits();
1658 unsigned TrailZ = KnownZero.countTrailingOnes() +
1659 KnownZero2.countTrailingOnes();
1660 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1661 KnownZero2.countLeadingOnes(),
1662 BitWidth) - BitWidth;
1664 TrailZ = std::min(TrailZ, BitWidth);
1665 LeadZ = std::min(LeadZ, BitWidth);
1666 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1667 APInt::getHighBitsSet(BitWidth, LeadZ);
1672 // For the purposes of computing leading zeros we can conservatively
1673 // treat a udiv as a logical right shift by the power of 2 known to
1674 // be less than the denominator.
1675 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1676 ComputeMaskedBits(Op.getOperand(0),
1677 AllOnes, KnownZero2, KnownOne2, Depth+1);
1678 unsigned LeadZ = KnownZero2.countLeadingOnes();
1680 KnownOne2.clearAllBits();
1681 KnownZero2.clearAllBits();
1682 ComputeMaskedBits(Op.getOperand(1),
1683 AllOnes, KnownZero2, KnownOne2, Depth+1);
1684 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1685 if (RHSUnknownLeadingOnes != BitWidth)
1686 LeadZ = std::min(BitWidth,
1687 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1689 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask;
1693 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1);
1694 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1);
1695 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1696 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1698 // Only known if known in both the LHS and RHS.
1699 KnownOne &= KnownOne2;
1700 KnownZero &= KnownZero2;
1702 case ISD::SELECT_CC:
1703 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1);
1704 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1);
1705 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1706 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1708 // Only known if known in both the LHS and RHS.
1709 KnownOne &= KnownOne2;
1710 KnownZero &= KnownZero2;
1718 if (Op.getResNo() != 1)
1720 // The boolean result conforms to getBooleanContents. Fall through.
1722 // If we know the result of a setcc has the top bits zero, use this info.
1723 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent &&
1725 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1728 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1729 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1730 unsigned ShAmt = SA->getZExtValue();
1732 // If the shift count is an invalid immediate, don't do anything.
1733 if (ShAmt >= BitWidth)
1736 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt),
1737 KnownZero, KnownOne, Depth+1);
1738 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1739 KnownZero <<= ShAmt;
1741 // low bits known zero.
1742 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1746 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1747 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1748 unsigned ShAmt = SA->getZExtValue();
1750 // If the shift count is an invalid immediate, don't do anything.
1751 if (ShAmt >= BitWidth)
1754 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt),
1755 KnownZero, KnownOne, Depth+1);
1756 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1757 KnownZero = KnownZero.lshr(ShAmt);
1758 KnownOne = KnownOne.lshr(ShAmt);
1760 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1761 KnownZero |= HighBits; // High bits known zero.
1765 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1766 unsigned ShAmt = SA->getZExtValue();
1768 // If the shift count is an invalid immediate, don't do anything.
1769 if (ShAmt >= BitWidth)
1772 APInt InDemandedMask = (Mask << ShAmt);
1773 // If any of the demanded bits are produced by the sign extension, we also
1774 // demand the input sign bit.
1775 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1776 if (HighBits.getBoolValue())
1777 InDemandedMask |= APInt::getSignBit(BitWidth);
1779 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne,
1781 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1782 KnownZero = KnownZero.lshr(ShAmt);
1783 KnownOne = KnownOne.lshr(ShAmt);
1785 // Handle the sign bits.
1786 APInt SignBit = APInt::getSignBit(BitWidth);
1787 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1789 if (KnownZero.intersects(SignBit)) {
1790 KnownZero |= HighBits; // New bits are known zero.
1791 } else if (KnownOne.intersects(SignBit)) {
1792 KnownOne |= HighBits; // New bits are known one.
1796 case ISD::SIGN_EXTEND_INREG: {
1797 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1798 unsigned EBits = EVT.getScalarType().getSizeInBits();
1800 // Sign extension. Compute the demanded bits in the result that are not
1801 // present in the input.
1802 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask;
1804 APInt InSignBit = APInt::getSignBit(EBits);
1805 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits);
1807 // If the sign extended bits are demanded, we know that the sign
1809 InSignBit = InSignBit.zext(BitWidth);
1810 if (NewBits.getBoolValue())
1811 InputDemandedBits |= InSignBit;
1813 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits,
1814 KnownZero, KnownOne, Depth+1);
1815 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1817 // If the sign bit of the input is known set or clear, then we know the
1818 // top bits of the result.
1819 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1820 KnownZero |= NewBits;
1821 KnownOne &= ~NewBits;
1822 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1823 KnownOne |= NewBits;
1824 KnownZero &= ~NewBits;
1825 } else { // Input sign bit unknown
1826 KnownZero &= ~NewBits;
1827 KnownOne &= ~NewBits;
1834 unsigned LowBits = Log2_32(BitWidth)+1;
1835 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1836 KnownOne.clearAllBits();
1840 if (ISD::isZEXTLoad(Op.getNode())) {
1841 LoadSDNode *LD = cast<LoadSDNode>(Op);
1842 EVT VT = LD->getMemoryVT();
1843 unsigned MemBits = VT.getScalarType().getSizeInBits();
1844 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask;
1848 case ISD::ZERO_EXTEND: {
1849 EVT InVT = Op.getOperand(0).getValueType();
1850 unsigned InBits = InVT.getScalarType().getSizeInBits();
1851 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1852 APInt InMask = Mask.trunc(InBits);
1853 KnownZero = KnownZero.trunc(InBits);
1854 KnownOne = KnownOne.trunc(InBits);
1855 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1856 KnownZero = KnownZero.zext(BitWidth);
1857 KnownOne = KnownOne.zext(BitWidth);
1858 KnownZero |= NewBits;
1861 case ISD::SIGN_EXTEND: {
1862 EVT InVT = Op.getOperand(0).getValueType();
1863 unsigned InBits = InVT.getScalarType().getSizeInBits();
1864 APInt InSignBit = APInt::getSignBit(InBits);
1865 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1866 APInt InMask = Mask.trunc(InBits);
1868 // If any of the sign extended bits are demanded, we know that the sign
1869 // bit is demanded. Temporarily set this bit in the mask for our callee.
1870 if (NewBits.getBoolValue())
1871 InMask |= InSignBit;
1873 KnownZero = KnownZero.trunc(InBits);
1874 KnownOne = KnownOne.trunc(InBits);
1875 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1877 // Note if the sign bit is known to be zero or one.
1878 bool SignBitKnownZero = KnownZero.isNegative();
1879 bool SignBitKnownOne = KnownOne.isNegative();
1880 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1881 "Sign bit can't be known to be both zero and one!");
1883 // If the sign bit wasn't actually demanded by our caller, we don't
1884 // want it set in the KnownZero and KnownOne result values. Reset the
1885 // mask and reapply it to the result values.
1886 InMask = Mask.trunc(InBits);
1887 KnownZero &= InMask;
1890 KnownZero = KnownZero.zext(BitWidth);
1891 KnownOne = KnownOne.zext(BitWidth);
1893 // If the sign bit is known zero or one, the top bits match.
1894 if (SignBitKnownZero)
1895 KnownZero |= NewBits;
1896 else if (SignBitKnownOne)
1897 KnownOne |= NewBits;
1900 case ISD::ANY_EXTEND: {
1901 EVT InVT = Op.getOperand(0).getValueType();
1902 unsigned InBits = InVT.getScalarType().getSizeInBits();
1903 APInt InMask = Mask.trunc(InBits);
1904 KnownZero = KnownZero.trunc(InBits);
1905 KnownOne = KnownOne.trunc(InBits);
1906 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1907 KnownZero = KnownZero.zext(BitWidth);
1908 KnownOne = KnownOne.zext(BitWidth);
1911 case ISD::TRUNCATE: {
1912 EVT InVT = Op.getOperand(0).getValueType();
1913 unsigned InBits = InVT.getScalarType().getSizeInBits();
1914 APInt InMask = Mask.zext(InBits);
1915 KnownZero = KnownZero.zext(InBits);
1916 KnownOne = KnownOne.zext(InBits);
1917 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1918 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1919 KnownZero = KnownZero.trunc(BitWidth);
1920 KnownOne = KnownOne.trunc(BitWidth);
1923 case ISD::AssertZext: {
1924 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1925 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1926 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
1928 KnownZero |= (~InMask) & Mask;
1932 // All bits are zero except the low bit.
1933 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1937 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
1938 // We know that the top bits of C-X are clear if X contains less bits
1939 // than C (i.e. no wrap-around can happen). For example, 20-X is
1940 // positive if we can prove that X is >= 0 and < 16.
1941 if (CLHS->getAPIntValue().isNonNegative()) {
1942 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
1943 // NLZ can't be BitWidth with no sign bit
1944 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
1945 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2,
1948 // If all of the MaskV bits are known to be zero, then we know the
1949 // output top bits are zero, because we now know that the output is
1951 if ((KnownZero2 & MaskV) == MaskV) {
1952 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
1953 // Top bits known zero.
1954 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask;
1962 // Output known-0 bits are known if clear or set in both the low clear bits
1963 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
1964 // low 3 bits clear.
1965 APInt Mask2 = APInt::getLowBitsSet(BitWidth,
1966 BitWidth - Mask.countLeadingZeros());
1967 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1968 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1969 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
1971 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1);
1972 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1973 KnownZeroOut = std::min(KnownZeroOut,
1974 KnownZero2.countTrailingOnes());
1976 if (Op.getOpcode() == ISD::ADD) {
1977 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
1981 // With ADDE, a carry bit may be added in, so we can only use this
1982 // information if we know (at least) that the low two bits are clear. We
1983 // then return to the caller that the low bit is unknown but that other bits
1985 if (KnownZeroOut >= 2) // ADDE
1986 KnownZero |= APInt::getBitsSet(BitWidth, 1, KnownZeroOut);
1990 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1991 const APInt &RA = Rem->getAPIntValue().abs();
1992 if (RA.isPowerOf2()) {
1993 APInt LowBits = RA - 1;
1994 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
1995 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1);
1997 // The low bits of the first operand are unchanged by the srem.
1998 KnownZero = KnownZero2 & LowBits;
1999 KnownOne = KnownOne2 & LowBits;
2001 // If the first operand is non-negative or has all low bits zero, then
2002 // the upper bits are all zero.
2003 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
2004 KnownZero |= ~LowBits;
2006 // If the first operand is negative and not all low bits are zero, then
2007 // the upper bits are all one.
2008 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0))
2009 KnownOne |= ~LowBits;
2014 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2019 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2020 const APInt &RA = Rem->getAPIntValue();
2021 if (RA.isPowerOf2()) {
2022 APInt LowBits = (RA - 1);
2023 APInt Mask2 = LowBits & Mask;
2024 KnownZero |= ~LowBits & Mask;
2025 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1);
2026 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2031 // Since the result is less than or equal to either operand, any leading
2032 // zero bits in either operand must also exist in the result.
2033 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
2034 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne,
2036 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2,
2039 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
2040 KnownZero2.countLeadingOnes());
2041 KnownOne.clearAllBits();
2042 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
2045 case ISD::FrameIndex:
2046 case ISD::TargetFrameIndex:
2047 if (unsigned Align = InferPtrAlignment(Op)) {
2048 // The low bits are known zero if the pointer is aligned.
2049 KnownZero = APInt::getLowBitsSet(BitWidth, Log2_32(Align));
2055 if (Op.getOpcode() < ISD::BUILTIN_OP_END)
2058 case ISD::INTRINSIC_WO_CHAIN:
2059 case ISD::INTRINSIC_W_CHAIN:
2060 case ISD::INTRINSIC_VOID:
2061 // Allow the target to implement this method for its nodes.
2062 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this,
2068 /// ComputeNumSignBits - Return the number of times the sign bit of the
2069 /// register is replicated into the other bits. We know that at least 1 bit
2070 /// is always equal to the sign bit (itself), but other cases can give us
2071 /// information. For example, immediately after an "SRA X, 2", we know that
2072 /// the top 3 bits are all equal to each other, so we return 3.
2073 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
2074 EVT VT = Op.getValueType();
2075 assert(VT.isInteger() && "Invalid VT!");
2076 unsigned VTBits = VT.getScalarType().getSizeInBits();
2078 unsigned FirstAnswer = 1;
2081 return 1; // Limit search depth.
2083 switch (Op.getOpcode()) {
2085 case ISD::AssertSext:
2086 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2087 return VTBits-Tmp+1;
2088 case ISD::AssertZext:
2089 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2092 case ISD::Constant: {
2093 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2094 return Val.getNumSignBits();
2097 case ISD::SIGN_EXTEND:
2098 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
2099 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2101 case ISD::SIGN_EXTEND_INREG:
2102 // Max of the input and what this extends.
2104 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits();
2107 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2108 return std::max(Tmp, Tmp2);
2111 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2112 // SRA X, C -> adds C sign bits.
2113 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2114 Tmp += C->getZExtValue();
2115 if (Tmp > VTBits) Tmp = VTBits;
2119 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2120 // shl destroys sign bits.
2121 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2122 if (C->getZExtValue() >= VTBits || // Bad shift.
2123 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
2124 return Tmp - C->getZExtValue();
2129 case ISD::XOR: // NOT is handled here.
2130 // Logical binary ops preserve the number of sign bits at the worst.
2131 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2133 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2134 FirstAnswer = std::min(Tmp, Tmp2);
2135 // We computed what we know about the sign bits as our first
2136 // answer. Now proceed to the generic code that uses
2137 // ComputeMaskedBits, and pick whichever answer is better.
2142 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2143 if (Tmp == 1) return 1; // Early out.
2144 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2145 return std::min(Tmp, Tmp2);
2153 if (Op.getResNo() != 1)
2155 // The boolean result conforms to getBooleanContents. Fall through.
2157 // If setcc returns 0/-1, all bits are sign bits.
2158 if (TLI.getBooleanContents() ==
2159 TargetLowering::ZeroOrNegativeOneBooleanContent)
2164 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2165 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2167 // Handle rotate right by N like a rotate left by 32-N.
2168 if (Op.getOpcode() == ISD::ROTR)
2169 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2171 // If we aren't rotating out all of the known-in sign bits, return the
2172 // number that are left. This handles rotl(sext(x), 1) for example.
2173 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2174 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2178 // Add can have at most one carry bit. Thus we know that the output
2179 // is, at worst, one more bit than the inputs.
2180 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2181 if (Tmp == 1) return 1; // Early out.
2183 // Special case decrementing a value (ADD X, -1):
2184 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2185 if (CRHS->isAllOnesValue()) {
2186 APInt KnownZero, KnownOne;
2187 APInt Mask = APInt::getAllOnesValue(VTBits);
2188 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
2190 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2192 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2195 // If we are subtracting one from a positive number, there is no carry
2196 // out of the result.
2197 if (KnownZero.isNegative())
2201 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2202 if (Tmp2 == 1) return 1;
2203 return std::min(Tmp, Tmp2)-1;
2207 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2208 if (Tmp2 == 1) return 1;
2211 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2212 if (CLHS->isNullValue()) {
2213 APInt KnownZero, KnownOne;
2214 APInt Mask = APInt::getAllOnesValue(VTBits);
2215 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
2216 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2218 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2221 // If the input is known to be positive (the sign bit is known clear),
2222 // the output of the NEG has the same number of sign bits as the input.
2223 if (KnownZero.isNegative())
2226 // Otherwise, we treat this like a SUB.
2229 // Sub can have at most one carry bit. Thus we know that the output
2230 // is, at worst, one more bit than the inputs.
2231 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2232 if (Tmp == 1) return 1; // Early out.
2233 return std::min(Tmp, Tmp2)-1;
2236 // FIXME: it's tricky to do anything useful for this, but it is an important
2237 // case for targets like X86.
2241 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2242 if (Op.getOpcode() == ISD::LOAD) {
2243 LoadSDNode *LD = cast<LoadSDNode>(Op);
2244 unsigned ExtType = LD->getExtensionType();
2247 case ISD::SEXTLOAD: // '17' bits known
2248 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2249 return VTBits-Tmp+1;
2250 case ISD::ZEXTLOAD: // '16' bits known
2251 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2256 // Allow the target to implement this method for its nodes.
2257 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2258 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2259 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2260 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2261 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2262 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2265 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2266 // use this information.
2267 APInt KnownZero, KnownOne;
2268 APInt Mask = APInt::getAllOnesValue(VTBits);
2269 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
2271 if (KnownZero.isNegative()) { // sign bit is 0
2273 } else if (KnownOne.isNegative()) { // sign bit is 1;
2280 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2281 // the number of identical bits in the top of the input value.
2283 Mask <<= Mask.getBitWidth()-VTBits;
2284 // Return # leading zeros. We use 'min' here in case Val was zero before
2285 // shifting. We don't want to return '64' as for an i32 "0".
2286 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2289 /// isBaseWithConstantOffset - Return true if the specified operand is an
2290 /// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an
2291 /// ISD::OR with a ConstantSDNode that is guaranteed to have the same
2292 /// semantics as an ADD. This handles the equivalence:
2293 /// X|Cst == X+Cst iff X&Cst = 0.
2294 bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const {
2295 if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) ||
2296 !isa<ConstantSDNode>(Op.getOperand(1)))
2299 if (Op.getOpcode() == ISD::OR &&
2300 !MaskedValueIsZero(Op.getOperand(0),
2301 cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue()))
2308 bool SelectionDAG::isKnownNeverNaN(SDValue Op) const {
2309 // If we're told that NaNs won't happen, assume they won't.
2313 // If the value is a constant, we can obviously see if it is a NaN or not.
2314 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2315 return !C->getValueAPF().isNaN();
2317 // TODO: Recognize more cases here.
2322 bool SelectionDAG::isKnownNeverZero(SDValue Op) const {
2323 // If the value is a constant, we can obviously see if it is a zero or not.
2324 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2325 return !C->isZero();
2327 // TODO: Recognize more cases here.
2328 switch (Op.getOpcode()) {
2331 if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2332 return !C->isNullValue();
2339 bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const {
2340 // Check the obvious case.
2341 if (A == B) return true;
2343 // For for negative and positive zero.
2344 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A))
2345 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B))
2346 if (CA->isZero() && CB->isZero()) return true;
2348 // Otherwise they may not be equal.
2352 /// getNode - Gets or creates the specified node.
2354 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) {
2355 FoldingSetNodeID ID;
2356 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2358 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2359 return SDValue(E, 0);
2361 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT));
2362 CSEMap.InsertNode(N, IP);
2364 AllNodes.push_back(N);
2368 return SDValue(N, 0);
2371 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
2372 EVT VT, SDValue Operand) {
2373 // Constant fold unary operations with an integer constant operand.
2374 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2375 const APInt &Val = C->getAPIntValue();
2378 case ISD::SIGN_EXTEND:
2379 return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), VT);
2380 case ISD::ANY_EXTEND:
2381 case ISD::ZERO_EXTEND:
2383 return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), VT);
2384 case ISD::UINT_TO_FP:
2385 case ISD::SINT_TO_FP: {
2386 // No compile time operations on ppcf128.
2387 if (VT == MVT::ppcf128) break;
2388 APFloat apf(APInt::getNullValue(VT.getSizeInBits()));
2389 (void)apf.convertFromAPInt(Val,
2390 Opcode==ISD::SINT_TO_FP,
2391 APFloat::rmNearestTiesToEven);
2392 return getConstantFP(apf, VT);
2395 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2396 return getConstantFP(Val.bitsToFloat(), VT);
2397 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2398 return getConstantFP(Val.bitsToDouble(), VT);
2401 return getConstant(Val.byteSwap(), VT);
2403 return getConstant(Val.countPopulation(), VT);
2405 return getConstant(Val.countLeadingZeros(), VT);
2407 return getConstant(Val.countTrailingZeros(), VT);
2411 // Constant fold unary operations with a floating point constant operand.
2412 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2413 APFloat V = C->getValueAPF(); // make copy
2414 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) {
2418 return getConstantFP(V, VT);
2421 return getConstantFP(V, VT);
2423 case ISD::FP_EXTEND: {
2425 // This can return overflow, underflow, or inexact; we don't care.
2426 // FIXME need to be more flexible about rounding mode.
2427 (void)V.convert(*EVTToAPFloatSemantics(VT),
2428 APFloat::rmNearestTiesToEven, &ignored);
2429 return getConstantFP(V, VT);
2431 case ISD::FP_TO_SINT:
2432 case ISD::FP_TO_UINT: {
2435 assert(integerPartWidth >= 64);
2436 // FIXME need to be more flexible about rounding mode.
2437 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2438 Opcode==ISD::FP_TO_SINT,
2439 APFloat::rmTowardZero, &ignored);
2440 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2442 APInt api(VT.getSizeInBits(), x);
2443 return getConstant(api, VT);
2446 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2447 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2448 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2449 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2455 unsigned OpOpcode = Operand.getNode()->getOpcode();
2457 case ISD::TokenFactor:
2458 case ISD::MERGE_VALUES:
2459 case ISD::CONCAT_VECTORS:
2460 return Operand; // Factor, merge or concat of one node? No need.
2461 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
2462 case ISD::FP_EXTEND:
2463 assert(VT.isFloatingPoint() &&
2464 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2465 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2466 assert((!VT.isVector() ||
2467 VT.getVectorNumElements() ==
2468 Operand.getValueType().getVectorNumElements()) &&
2469 "Vector element count mismatch!");
2470 if (Operand.getOpcode() == ISD::UNDEF)
2471 return getUNDEF(VT);
2473 case ISD::SIGN_EXTEND:
2474 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2475 "Invalid SIGN_EXTEND!");
2476 if (Operand.getValueType() == VT) return Operand; // noop extension
2477 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2478 "Invalid sext node, dst < src!");
2479 assert((!VT.isVector() ||
2480 VT.getVectorNumElements() ==
2481 Operand.getValueType().getVectorNumElements()) &&
2482 "Vector element count mismatch!");
2483 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2484 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2485 else if (OpOpcode == ISD::UNDEF)
2486 // sext(undef) = 0, because the top bits will all be the same.
2487 return getConstant(0, VT);
2489 case ISD::ZERO_EXTEND:
2490 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2491 "Invalid ZERO_EXTEND!");
2492 if (Operand.getValueType() == VT) return Operand; // noop extension
2493 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2494 "Invalid zext node, dst < src!");
2495 assert((!VT.isVector() ||
2496 VT.getVectorNumElements() ==
2497 Operand.getValueType().getVectorNumElements()) &&
2498 "Vector element count mismatch!");
2499 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2500 return getNode(ISD::ZERO_EXTEND, DL, VT,
2501 Operand.getNode()->getOperand(0));
2502 else if (OpOpcode == ISD::UNDEF)
2503 // zext(undef) = 0, because the top bits will be zero.
2504 return getConstant(0, VT);
2506 case ISD::ANY_EXTEND:
2507 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2508 "Invalid ANY_EXTEND!");
2509 if (Operand.getValueType() == VT) return Operand; // noop extension
2510 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2511 "Invalid anyext node, dst < src!");
2512 assert((!VT.isVector() ||
2513 VT.getVectorNumElements() ==
2514 Operand.getValueType().getVectorNumElements()) &&
2515 "Vector element count mismatch!");
2517 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2518 OpOpcode == ISD::ANY_EXTEND)
2519 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2520 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2521 else if (OpOpcode == ISD::UNDEF)
2522 return getUNDEF(VT);
2524 // (ext (trunx x)) -> x
2525 if (OpOpcode == ISD::TRUNCATE) {
2526 SDValue OpOp = Operand.getNode()->getOperand(0);
2527 if (OpOp.getValueType() == VT)
2532 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2533 "Invalid TRUNCATE!");
2534 if (Operand.getValueType() == VT) return Operand; // noop truncate
2535 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) &&
2536 "Invalid truncate node, src < dst!");
2537 assert((!VT.isVector() ||
2538 VT.getVectorNumElements() ==
2539 Operand.getValueType().getVectorNumElements()) &&
2540 "Vector element count mismatch!");
2541 if (OpOpcode == ISD::TRUNCATE)
2542 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2543 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2544 OpOpcode == ISD::ANY_EXTEND) {
2545 // If the source is smaller than the dest, we still need an extend.
2546 if (Operand.getNode()->getOperand(0).getValueType().getScalarType()
2547 .bitsLT(VT.getScalarType()))
2548 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2549 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2550 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2552 return Operand.getNode()->getOperand(0);
2556 // Basic sanity checking.
2557 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2558 && "Cannot BITCAST between types of different sizes!");
2559 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2560 if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x)
2561 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0));
2562 if (OpOpcode == ISD::UNDEF)
2563 return getUNDEF(VT);
2565 case ISD::SCALAR_TO_VECTOR:
2566 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2567 (VT.getVectorElementType() == Operand.getValueType() ||
2568 (VT.getVectorElementType().isInteger() &&
2569 Operand.getValueType().isInteger() &&
2570 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
2571 "Illegal SCALAR_TO_VECTOR node!");
2572 if (OpOpcode == ISD::UNDEF)
2573 return getUNDEF(VT);
2574 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2575 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2576 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2577 Operand.getConstantOperandVal(1) == 0 &&
2578 Operand.getOperand(0).getValueType() == VT)
2579 return Operand.getOperand(0);
2582 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
2583 if (UnsafeFPMath && OpOpcode == ISD::FSUB)
2584 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
2585 Operand.getNode()->getOperand(0));
2586 if (OpOpcode == ISD::FNEG) // --X -> X
2587 return Operand.getNode()->getOperand(0);
2590 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2591 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
2596 SDVTList VTs = getVTList(VT);
2597 if (VT != MVT::Glue) { // Don't CSE flag producing nodes
2598 FoldingSetNodeID ID;
2599 SDValue Ops[1] = { Operand };
2600 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2602 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2603 return SDValue(E, 0);
2605 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2606 CSEMap.InsertNode(N, IP);
2608 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2611 AllNodes.push_back(N);
2615 return SDValue(N, 0);
2618 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2620 ConstantSDNode *Cst1,
2621 ConstantSDNode *Cst2) {
2622 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
2625 case ISD::ADD: return getConstant(C1 + C2, VT);
2626 case ISD::SUB: return getConstant(C1 - C2, VT);
2627 case ISD::MUL: return getConstant(C1 * C2, VT);
2629 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2632 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2635 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2638 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2640 case ISD::AND: return getConstant(C1 & C2, VT);
2641 case ISD::OR: return getConstant(C1 | C2, VT);
2642 case ISD::XOR: return getConstant(C1 ^ C2, VT);
2643 case ISD::SHL: return getConstant(C1 << C2, VT);
2644 case ISD::SRL: return getConstant(C1.lshr(C2), VT);
2645 case ISD::SRA: return getConstant(C1.ashr(C2), VT);
2646 case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2647 case ISD::ROTR: return getConstant(C1.rotr(C2), VT);
2654 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2655 SDValue N1, SDValue N2) {
2656 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2657 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2660 case ISD::TokenFactor:
2661 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2662 N2.getValueType() == MVT::Other && "Invalid token factor!");
2663 // Fold trivial token factors.
2664 if (N1.getOpcode() == ISD::EntryToken) return N2;
2665 if (N2.getOpcode() == ISD::EntryToken) return N1;
2666 if (N1 == N2) return N1;
2668 case ISD::CONCAT_VECTORS:
2669 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2670 // one big BUILD_VECTOR.
2671 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2672 N2.getOpcode() == ISD::BUILD_VECTOR) {
2673 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
2674 N1.getNode()->op_end());
2675 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
2676 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2680 assert(VT.isInteger() && "This operator does not apply to FP types!");
2681 assert(N1.getValueType() == N2.getValueType() &&
2682 N1.getValueType() == VT && "Binary operator types must match!");
2683 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2684 // worth handling here.
2685 if (N2C && N2C->isNullValue())
2687 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2694 assert(VT.isInteger() && "This operator does not apply to FP types!");
2695 assert(N1.getValueType() == N2.getValueType() &&
2696 N1.getValueType() == VT && "Binary operator types must match!");
2697 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2698 // it's worth handling here.
2699 if (N2C && N2C->isNullValue())
2709 assert(VT.isInteger() && "This operator does not apply to FP types!");
2710 assert(N1.getValueType() == N2.getValueType() &&
2711 N1.getValueType() == VT && "Binary operator types must match!");
2719 if (Opcode == ISD::FADD) {
2721 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
2722 if (CFP->getValueAPF().isZero())
2725 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2726 if (CFP->getValueAPF().isZero())
2728 } else if (Opcode == ISD::FSUB) {
2730 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2731 if (CFP->getValueAPF().isZero())
2735 assert(VT.isFloatingPoint() && "This operator only applies to FP types!");
2736 assert(N1.getValueType() == N2.getValueType() &&
2737 N1.getValueType() == VT && "Binary operator types must match!");
2739 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2740 assert(N1.getValueType() == VT &&
2741 N1.getValueType().isFloatingPoint() &&
2742 N2.getValueType().isFloatingPoint() &&
2743 "Invalid FCOPYSIGN!");
2750 assert(VT == N1.getValueType() &&
2751 "Shift operators return type must be the same as their first arg");
2752 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2753 "Shifts only work on integers");
2754 // Verify that the shift amount VT is bit enough to hold valid shift
2755 // amounts. This catches things like trying to shift an i1024 value by an
2756 // i8, which is easy to fall into in generic code that uses
2757 // TLI.getShiftAmount().
2758 assert(N2.getValueType().getSizeInBits() >=
2759 Log2_32_Ceil(N1.getValueType().getSizeInBits()) &&
2760 "Invalid use of small shift amount with oversized value!");
2762 // Always fold shifts of i1 values so the code generator doesn't need to
2763 // handle them. Since we know the size of the shift has to be less than the
2764 // size of the value, the shift/rotate count is guaranteed to be zero.
2767 if (N2C && N2C->isNullValue())
2770 case ISD::FP_ROUND_INREG: {
2771 EVT EVT = cast<VTSDNode>(N2)->getVT();
2772 assert(VT == N1.getValueType() && "Not an inreg round!");
2773 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2774 "Cannot FP_ROUND_INREG integer types");
2775 assert(EVT.isVector() == VT.isVector() &&
2776 "FP_ROUND_INREG type should be vector iff the operand "
2778 assert((!EVT.isVector() ||
2779 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2780 "Vector element counts must match in FP_ROUND_INREG");
2781 assert(EVT.bitsLE(VT) && "Not rounding down!");
2782 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2786 assert(VT.isFloatingPoint() &&
2787 N1.getValueType().isFloatingPoint() &&
2788 VT.bitsLE(N1.getValueType()) &&
2789 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2790 if (N1.getValueType() == VT) return N1; // noop conversion.
2792 case ISD::AssertSext:
2793 case ISD::AssertZext: {
2794 EVT EVT = cast<VTSDNode>(N2)->getVT();
2795 assert(VT == N1.getValueType() && "Not an inreg extend!");
2796 assert(VT.isInteger() && EVT.isInteger() &&
2797 "Cannot *_EXTEND_INREG FP types");
2798 assert(!EVT.isVector() &&
2799 "AssertSExt/AssertZExt type should be the vector element type "
2800 "rather than the vector type!");
2801 assert(EVT.bitsLE(VT) && "Not extending!");
2802 if (VT == EVT) return N1; // noop assertion.
2805 case ISD::SIGN_EXTEND_INREG: {
2806 EVT EVT = cast<VTSDNode>(N2)->getVT();
2807 assert(VT == N1.getValueType() && "Not an inreg extend!");
2808 assert(VT.isInteger() && EVT.isInteger() &&
2809 "Cannot *_EXTEND_INREG FP types");
2810 assert(EVT.isVector() == VT.isVector() &&
2811 "SIGN_EXTEND_INREG type should be vector iff the operand "
2813 assert((!EVT.isVector() ||
2814 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2815 "Vector element counts must match in SIGN_EXTEND_INREG");
2816 assert(EVT.bitsLE(VT) && "Not extending!");
2817 if (EVT == VT) return N1; // Not actually extending
2820 APInt Val = N1C->getAPIntValue();
2821 unsigned FromBits = EVT.getScalarType().getSizeInBits();
2822 Val <<= Val.getBitWidth()-FromBits;
2823 Val = Val.ashr(Val.getBitWidth()-FromBits);
2824 return getConstant(Val, VT);
2828 case ISD::EXTRACT_VECTOR_ELT:
2829 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2830 if (N1.getOpcode() == ISD::UNDEF)
2831 return getUNDEF(VT);
2833 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2834 // expanding copies of large vectors from registers.
2836 N1.getOpcode() == ISD::CONCAT_VECTORS &&
2837 N1.getNumOperands() > 0) {
2839 N1.getOperand(0).getValueType().getVectorNumElements();
2840 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
2841 N1.getOperand(N2C->getZExtValue() / Factor),
2842 getConstant(N2C->getZExtValue() % Factor,
2843 N2.getValueType()));
2846 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2847 // expanding large vector constants.
2848 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
2849 SDValue Elt = N1.getOperand(N2C->getZExtValue());
2850 EVT VEltTy = N1.getValueType().getVectorElementType();
2851 if (Elt.getValueType() != VEltTy) {
2852 // If the vector element type is not legal, the BUILD_VECTOR operands
2853 // are promoted and implicitly truncated. Make that explicit here.
2854 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt);
2857 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT
2858 // result is implicitly extended.
2859 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt);
2864 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2865 // operations are lowered to scalars.
2866 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2867 // If the indices are the same, return the inserted element else
2868 // if the indices are known different, extract the element from
2869 // the original vector.
2870 SDValue N1Op2 = N1.getOperand(2);
2871 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode());
2873 if (N1Op2C && N2C) {
2874 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) {
2875 if (VT == N1.getOperand(1).getValueType())
2876 return N1.getOperand(1);
2878 return getSExtOrTrunc(N1.getOperand(1), DL, VT);
2881 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
2885 case ISD::EXTRACT_ELEMENT:
2886 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
2887 assert(!N1.getValueType().isVector() && !VT.isVector() &&
2888 (N1.getValueType().isInteger() == VT.isInteger()) &&
2889 N1.getValueType() != VT &&
2890 "Wrong types for EXTRACT_ELEMENT!");
2892 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2893 // 64-bit integers into 32-bit parts. Instead of building the extract of
2894 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2895 if (N1.getOpcode() == ISD::BUILD_PAIR)
2896 return N1.getOperand(N2C->getZExtValue());
2898 // EXTRACT_ELEMENT of a constant int is also very common.
2899 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2900 unsigned ElementSize = VT.getSizeInBits();
2901 unsigned Shift = ElementSize * N2C->getZExtValue();
2902 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2903 return getConstant(ShiftedVal.trunc(ElementSize), VT);
2906 case ISD::EXTRACT_SUBVECTOR: {
2908 if (VT.isSimple() && N1.getValueType().isSimple()) {
2909 assert(VT.isVector() && N1.getValueType().isVector() &&
2910 "Extract subvector VTs must be a vectors!");
2911 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() &&
2912 "Extract subvector VTs must have the same element type!");
2913 assert(VT.getSimpleVT() <= N1.getValueType().getSimpleVT() &&
2914 "Extract subvector must be from larger vector to smaller vector!");
2916 if (isa<ConstantSDNode>(Index.getNode())) {
2917 assert((VT.getVectorNumElements() +
2918 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
2919 <= N1.getValueType().getVectorNumElements())
2920 && "Extract subvector overflow!");
2923 // Trivial extraction.
2924 if (VT.getSimpleVT() == N1.getValueType().getSimpleVT())
2933 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
2934 if (SV.getNode()) return SV;
2935 } else { // Cannonicalize constant to RHS if commutative
2936 if (isCommutativeBinOp(Opcode)) {
2937 std::swap(N1C, N2C);
2943 // Constant fold FP operations.
2944 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
2945 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
2947 if (!N2CFP && isCommutativeBinOp(Opcode)) {
2948 // Cannonicalize constant to RHS if commutative
2949 std::swap(N1CFP, N2CFP);
2951 } else if (N2CFP && VT != MVT::ppcf128) {
2952 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
2953 APFloat::opStatus s;
2956 s = V1.add(V2, APFloat::rmNearestTiesToEven);
2957 if (s != APFloat::opInvalidOp)
2958 return getConstantFP(V1, VT);
2961 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
2962 if (s!=APFloat::opInvalidOp)
2963 return getConstantFP(V1, VT);
2966 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
2967 if (s!=APFloat::opInvalidOp)
2968 return getConstantFP(V1, VT);
2971 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
2972 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2973 return getConstantFP(V1, VT);
2976 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
2977 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2978 return getConstantFP(V1, VT);
2980 case ISD::FCOPYSIGN:
2982 return getConstantFP(V1, VT);
2988 // Canonicalize an UNDEF to the RHS, even over a constant.
2989 if (N1.getOpcode() == ISD::UNDEF) {
2990 if (isCommutativeBinOp(Opcode)) {
2994 case ISD::FP_ROUND_INREG:
2995 case ISD::SIGN_EXTEND_INREG:
3001 return N1; // fold op(undef, arg2) -> undef
3009 return getConstant(0, VT); // fold op(undef, arg2) -> 0
3010 // For vectors, we can't easily build an all zero vector, just return
3017 // Fold a bunch of operators when the RHS is undef.
3018 if (N2.getOpcode() == ISD::UNDEF) {
3021 if (N1.getOpcode() == ISD::UNDEF)
3022 // Handle undef ^ undef -> 0 special case. This is a common
3024 return getConstant(0, VT);
3034 return N2; // fold op(arg1, undef) -> undef
3048 return getConstant(0, VT); // fold op(arg1, undef) -> 0
3049 // For vectors, we can't easily build an all zero vector, just return
3054 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
3055 // For vectors, we can't easily build an all one vector, just return
3063 // Memoize this node if possible.
3065 SDVTList VTs = getVTList(VT);
3066 if (VT != MVT::Glue) {
3067 SDValue Ops[] = { N1, N2 };
3068 FoldingSetNodeID ID;
3069 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
3071 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3072 return SDValue(E, 0);
3074 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
3075 CSEMap.InsertNode(N, IP);
3077 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
3080 AllNodes.push_back(N);
3084 return SDValue(N, 0);
3087 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3088 SDValue N1, SDValue N2, SDValue N3) {
3089 // Perform various simplifications.
3090 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
3092 case ISD::CONCAT_VECTORS:
3093 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
3094 // one big BUILD_VECTOR.
3095 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
3096 N2.getOpcode() == ISD::BUILD_VECTOR &&
3097 N3.getOpcode() == ISD::BUILD_VECTOR) {
3098 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
3099 N1.getNode()->op_end());
3100 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
3101 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end());
3102 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
3106 // Use FoldSetCC to simplify SETCC's.
3107 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
3108 if (Simp.getNode()) return Simp;
3113 if (N1C->getZExtValue())
3114 return N2; // select true, X, Y -> X
3116 return N3; // select false, X, Y -> Y
3119 if (N2 == N3) return N2; // select C, X, X -> X
3121 case ISD::VECTOR_SHUFFLE:
3122 llvm_unreachable("should use getVectorShuffle constructor!");
3124 case ISD::INSERT_SUBVECTOR: {
3126 if (VT.isSimple() && N1.getValueType().isSimple()
3127 && N2.getValueType().isSimple()) {
3128 assert(VT.isVector() && N1.getValueType().isVector() &&
3129 N2.getValueType().isVector() &&
3130 "Insert subvector VTs must be a vectors");
3131 assert(VT == N1.getValueType() &&
3132 "Dest and insert subvector source types must match!");
3133 assert(N2.getValueType().getSimpleVT() <= N1.getValueType().getSimpleVT() &&
3134 "Insert subvector must be from smaller vector to larger vector!");
3135 if (isa<ConstantSDNode>(Index.getNode())) {
3136 assert((N2.getValueType().getVectorNumElements() +
3137 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
3138 <= VT.getVectorNumElements())
3139 && "Insert subvector overflow!");
3142 // Trivial insertion.
3143 if (VT.getSimpleVT() == N2.getValueType().getSimpleVT())
3149 // Fold bit_convert nodes from a type to themselves.
3150 if (N1.getValueType() == VT)
3155 // Memoize node if it doesn't produce a flag.
3157 SDVTList VTs = getVTList(VT);
3158 if (VT != MVT::Glue) {
3159 SDValue Ops[] = { N1, N2, N3 };
3160 FoldingSetNodeID ID;
3161 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3163 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3164 return SDValue(E, 0);
3166 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3167 CSEMap.InsertNode(N, IP);
3169 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3172 AllNodes.push_back(N);
3176 return SDValue(N, 0);
3179 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3180 SDValue N1, SDValue N2, SDValue N3,
3182 SDValue Ops[] = { N1, N2, N3, N4 };
3183 return getNode(Opcode, DL, VT, Ops, 4);
3186 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3187 SDValue N1, SDValue N2, SDValue N3,
3188 SDValue N4, SDValue N5) {
3189 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3190 return getNode(Opcode, DL, VT, Ops, 5);
3193 /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
3194 /// the incoming stack arguments to be loaded from the stack.
3195 SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) {
3196 SmallVector<SDValue, 8> ArgChains;
3198 // Include the original chain at the beginning of the list. When this is
3199 // used by target LowerCall hooks, this helps legalize find the
3200 // CALLSEQ_BEGIN node.
3201 ArgChains.push_back(Chain);
3203 // Add a chain value for each stack argument.
3204 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
3205 UE = getEntryNode().getNode()->use_end(); U != UE; ++U)
3206 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
3207 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
3208 if (FI->getIndex() < 0)
3209 ArgChains.push_back(SDValue(L, 1));
3211 // Build a tokenfactor for all the chains.
3212 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other,
3213 &ArgChains[0], ArgChains.size());
3216 /// SplatByte - Distribute ByteVal over NumBits bits.
3217 static APInt SplatByte(unsigned NumBits, uint8_t ByteVal) {
3218 APInt Val = APInt(NumBits, ByteVal);
3220 for (unsigned i = NumBits; i > 8; i >>= 1) {
3221 Val = (Val << Shift) | Val;
3227 /// getMemsetValue - Vectorized representation of the memset value
3229 static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
3231 assert(Value.getOpcode() != ISD::UNDEF);
3233 unsigned NumBits = VT.getScalarType().getSizeInBits();
3234 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
3235 APInt Val = SplatByte(NumBits, C->getZExtValue() & 255);
3237 return DAG.getConstant(Val, VT);
3238 return DAG.getConstantFP(APFloat(Val), VT);
3241 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value);
3243 // Use a multiplication with 0x010101... to extend the input to the
3245 APInt Magic = SplatByte(NumBits, 0x01);
3246 Value = DAG.getNode(ISD::MUL, dl, VT, Value, DAG.getConstant(Magic, VT));
3252 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
3253 /// used when a memcpy is turned into a memset when the source is a constant
3255 static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG,
3256 const TargetLowering &TLI,
3257 std::string &Str, unsigned Offset) {
3258 // Handle vector with all elements zero.
3261 return DAG.getConstant(0, VT);
3262 else if (VT == MVT::f32 || VT == MVT::f64)
3263 return DAG.getConstantFP(0.0, VT);
3264 else if (VT.isVector()) {
3265 unsigned NumElts = VT.getVectorNumElements();
3266 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
3267 return DAG.getNode(ISD::BITCAST, dl, VT,
3268 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(),
3271 llvm_unreachable("Expected type!");
3274 assert(!VT.isVector() && "Can't handle vector type here!");
3275 unsigned NumBits = VT.getSizeInBits();
3276 unsigned MSB = NumBits / 8;
3278 if (TLI.isLittleEndian())
3279 Offset = Offset + MSB - 1;
3280 for (unsigned i = 0; i != MSB; ++i) {
3281 Val = (Val << 8) | (unsigned char)Str[Offset];
3282 Offset += TLI.isLittleEndian() ? -1 : 1;
3284 return DAG.getConstant(Val, VT);
3287 /// getMemBasePlusOffset - Returns base and offset node for the
3289 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
3290 SelectionDAG &DAG) {
3291 EVT VT = Base.getValueType();
3292 return DAG.getNode(ISD::ADD, Base.getDebugLoc(),
3293 VT, Base, DAG.getConstant(Offset, VT));
3296 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
3298 static bool isMemSrcFromString(SDValue Src, std::string &Str) {
3299 unsigned SrcDelta = 0;
3300 GlobalAddressSDNode *G = NULL;
3301 if (Src.getOpcode() == ISD::GlobalAddress)
3302 G = cast<GlobalAddressSDNode>(Src);
3303 else if (Src.getOpcode() == ISD::ADD &&
3304 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
3305 Src.getOperand(1).getOpcode() == ISD::Constant) {
3306 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
3307 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
3312 const GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal());
3313 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false))
3319 /// FindOptimalMemOpLowering - Determines the optimial series memory ops
3320 /// to replace the memset / memcpy. Return true if the number of memory ops
3321 /// is below the threshold. It returns the types of the sequence of
3322 /// memory ops to perform memset / memcpy by reference.
3323 static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps,
3324 unsigned Limit, uint64_t Size,
3325 unsigned DstAlign, unsigned SrcAlign,
3326 bool NonScalarIntSafe,
3329 const TargetLowering &TLI) {
3330 assert((SrcAlign == 0 || SrcAlign >= DstAlign) &&
3331 "Expecting memcpy / memset source to meet alignment requirement!");
3332 // If 'SrcAlign' is zero, that means the memory operation does not need to
3333 // load the value, i.e. memset or memcpy from constant string. Otherwise,
3334 // it's the inferred alignment of the source. 'DstAlign', on the other hand,
3335 // is the specified alignment of the memory operation. If it is zero, that
3336 // means it's possible to change the alignment of the destination.
3337 // 'MemcpyStrSrc' indicates whether the memcpy source is constant so it does
3338 // not need to be loaded.
3339 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign,
3340 NonScalarIntSafe, MemcpyStrSrc,
3341 DAG.getMachineFunction());
3343 if (VT == MVT::Other) {
3344 if (DstAlign >= TLI.getTargetData()->getPointerPrefAlignment() ||
3345 TLI.allowsUnalignedMemoryAccesses(VT)) {
3346 VT = TLI.getPointerTy();
3348 switch (DstAlign & 7) {
3349 case 0: VT = MVT::i64; break;
3350 case 4: VT = MVT::i32; break;
3351 case 2: VT = MVT::i16; break;
3352 default: VT = MVT::i8; break;
3357 while (!TLI.isTypeLegal(LVT))
3358 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1);
3359 assert(LVT.isInteger());
3365 unsigned NumMemOps = 0;
3367 unsigned VTSize = VT.getSizeInBits() / 8;
3368 while (VTSize > Size) {
3369 // For now, only use non-vector load / store's for the left-over pieces.
3370 if (VT.isVector() || VT.isFloatingPoint()) {
3372 while (!TLI.isTypeLegal(VT))
3373 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3374 VTSize = VT.getSizeInBits() / 8;
3376 // This can result in a type that is not legal on the target, e.g.
3377 // 1 or 2 bytes on PPC.
3378 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3383 if (++NumMemOps > Limit)
3385 MemOps.push_back(VT);
3392 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3393 SDValue Chain, SDValue Dst,
3394 SDValue Src, uint64_t Size,
3395 unsigned Align, bool isVol,
3397 MachinePointerInfo DstPtrInfo,
3398 MachinePointerInfo SrcPtrInfo) {
3399 // Turn a memcpy of undef to nop.
3400 if (Src.getOpcode() == ISD::UNDEF)
3403 // Expand memcpy to a series of load and store ops if the size operand falls
3404 // below a certain threshold.
3405 // TODO: In the AlwaysInline case, if the size is big then generate a loop
3406 // rather than maybe a humongous number of loads and stores.
3407 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3408 std::vector<EVT> MemOps;
3409 bool DstAlignCanChange = false;
3410 MachineFunction &MF = DAG.getMachineFunction();
3411 MachineFrameInfo *MFI = MF.getFrameInfo();
3412 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize);
3413 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3414 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3415 DstAlignCanChange = true;
3416 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3417 if (Align > SrcAlign)
3420 bool CopyFromStr = isMemSrcFromString(Src, Str);
3421 bool isZeroStr = CopyFromStr && Str.empty();
3422 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(OptSize);
3424 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3425 (DstAlignCanChange ? 0 : Align),
3426 (isZeroStr ? 0 : SrcAlign),
3427 true, CopyFromStr, DAG, TLI))
3430 if (DstAlignCanChange) {
3431 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3432 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3433 if (NewAlign > Align) {
3434 // Give the stack frame object a larger alignment if needed.
3435 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3436 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3441 SmallVector<SDValue, 8> OutChains;
3442 unsigned NumMemOps = MemOps.size();
3443 uint64_t SrcOff = 0, DstOff = 0;
3444 for (unsigned i = 0; i != NumMemOps; ++i) {
3446 unsigned VTSize = VT.getSizeInBits() / 8;
3447 SDValue Value, Store;
3450 (isZeroStr || (VT.isInteger() && !VT.isVector()))) {
3451 // It's unlikely a store of a vector immediate can be done in a single
3452 // instruction. It would require a load from a constantpool first.
3453 // We only handle zero vectors here.
3454 // FIXME: Handle other cases where store of vector immediate is done in
3455 // a single instruction.
3456 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff);
3457 Store = DAG.getStore(Chain, dl, Value,
3458 getMemBasePlusOffset(Dst, DstOff, DAG),
3459 DstPtrInfo.getWithOffset(DstOff), isVol,
3462 // The type might not be legal for the target. This should only happen
3463 // if the type is smaller than a legal type, as on PPC, so the right
3464 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify
3465 // to Load/Store if NVT==VT.
3466 // FIXME does the case above also need this?
3467 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
3468 assert(NVT.bitsGE(VT));
3469 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain,
3470 getMemBasePlusOffset(Src, SrcOff, DAG),
3471 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false,
3472 MinAlign(SrcAlign, SrcOff));
3473 Store = DAG.getTruncStore(Chain, dl, Value,
3474 getMemBasePlusOffset(Dst, DstOff, DAG),
3475 DstPtrInfo.getWithOffset(DstOff), VT, isVol,
3478 OutChains.push_back(Store);
3483 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3484 &OutChains[0], OutChains.size());
3487 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3488 SDValue Chain, SDValue Dst,
3489 SDValue Src, uint64_t Size,
3490 unsigned Align, bool isVol,
3492 MachinePointerInfo DstPtrInfo,
3493 MachinePointerInfo SrcPtrInfo) {
3494 // Turn a memmove of undef to nop.
3495 if (Src.getOpcode() == ISD::UNDEF)
3498 // Expand memmove to a series of load and store ops if the size operand falls
3499 // below a certain threshold.
3500 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3501 std::vector<EVT> MemOps;
3502 bool DstAlignCanChange = false;
3503 MachineFunction &MF = DAG.getMachineFunction();
3504 MachineFrameInfo *MFI = MF.getFrameInfo();
3505 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize);
3506 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3507 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3508 DstAlignCanChange = true;
3509 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3510 if (Align > SrcAlign)
3512 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(OptSize);
3514 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3515 (DstAlignCanChange ? 0 : Align),
3516 SrcAlign, true, false, DAG, TLI))
3519 if (DstAlignCanChange) {
3520 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3521 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3522 if (NewAlign > Align) {
3523 // Give the stack frame object a larger alignment if needed.
3524 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3525 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3530 uint64_t SrcOff = 0, DstOff = 0;
3531 SmallVector<SDValue, 8> LoadValues;
3532 SmallVector<SDValue, 8> LoadChains;
3533 SmallVector<SDValue, 8> OutChains;
3534 unsigned NumMemOps = MemOps.size();
3535 for (unsigned i = 0; i < NumMemOps; i++) {
3537 unsigned VTSize = VT.getSizeInBits() / 8;
3538 SDValue Value, Store;
3540 Value = DAG.getLoad(VT, dl, Chain,
3541 getMemBasePlusOffset(Src, SrcOff, DAG),
3542 SrcPtrInfo.getWithOffset(SrcOff), isVol,
3544 LoadValues.push_back(Value);
3545 LoadChains.push_back(Value.getValue(1));
3548 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3549 &LoadChains[0], LoadChains.size());
3551 for (unsigned i = 0; i < NumMemOps; i++) {
3553 unsigned VTSize = VT.getSizeInBits() / 8;
3554 SDValue Value, Store;
3556 Store = DAG.getStore(Chain, dl, LoadValues[i],
3557 getMemBasePlusOffset(Dst, DstOff, DAG),
3558 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align);
3559 OutChains.push_back(Store);
3563 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3564 &OutChains[0], OutChains.size());
3567 static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl,
3568 SDValue Chain, SDValue Dst,
3569 SDValue Src, uint64_t Size,
3570 unsigned Align, bool isVol,
3571 MachinePointerInfo DstPtrInfo) {
3572 // Turn a memset of undef to nop.
3573 if (Src.getOpcode() == ISD::UNDEF)
3576 // Expand memset to a series of load/store ops if the size operand
3577 // falls below a certain threshold.
3578 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3579 std::vector<EVT> MemOps;
3580 bool DstAlignCanChange = false;
3581 MachineFunction &MF = DAG.getMachineFunction();
3582 MachineFrameInfo *MFI = MF.getFrameInfo();
3583 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize);
3584 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3585 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3586 DstAlignCanChange = true;
3587 bool NonScalarIntSafe =
3588 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue();
3589 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(OptSize),
3590 Size, (DstAlignCanChange ? 0 : Align), 0,
3591 NonScalarIntSafe, false, DAG, TLI))
3594 if (DstAlignCanChange) {
3595 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3596 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3597 if (NewAlign > Align) {
3598 // Give the stack frame object a larger alignment if needed.
3599 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3600 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3605 SmallVector<SDValue, 8> OutChains;
3606 uint64_t DstOff = 0;
3607 unsigned NumMemOps = MemOps.size();
3609 // Find the largest store and generate the bit pattern for it.
3610 EVT LargestVT = MemOps[0];
3611 for (unsigned i = 1; i < NumMemOps; i++)
3612 if (MemOps[i].bitsGT(LargestVT))
3613 LargestVT = MemOps[i];
3614 SDValue MemSetValue = getMemsetValue(Src, LargestVT, DAG, dl);
3616 for (unsigned i = 0; i < NumMemOps; i++) {
3619 // If this store is smaller than the largest store see whether we can get
3620 // the smaller value for free with a truncate.
3621 SDValue Value = MemSetValue;
3622 if (VT.bitsLT(LargestVT)) {
3623 if (!LargestVT.isVector() && !VT.isVector() &&
3624 TLI.isTruncateFree(LargestVT, VT))
3625 Value = DAG.getNode(ISD::TRUNCATE, dl, VT, MemSetValue);
3627 Value = getMemsetValue(Src, VT, DAG, dl);
3629 assert(Value.getValueType() == VT && "Value with wrong type.");
3630 SDValue Store = DAG.getStore(Chain, dl, Value,
3631 getMemBasePlusOffset(Dst, DstOff, DAG),
3632 DstPtrInfo.getWithOffset(DstOff),
3633 isVol, false, Align);
3634 OutChains.push_back(Store);
3635 DstOff += VT.getSizeInBits() / 8;
3638 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3639 &OutChains[0], OutChains.size());
3642 SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst,
3643 SDValue Src, SDValue Size,
3644 unsigned Align, bool isVol, bool AlwaysInline,
3645 MachinePointerInfo DstPtrInfo,
3646 MachinePointerInfo SrcPtrInfo) {
3648 // Check to see if we should lower the memcpy to loads and stores first.
3649 // For cases within the target-specified limits, this is the best choice.
3650 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3652 // Memcpy with size zero? Just return the original chain.
3653 if (ConstantSize->isNullValue())
3656 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3657 ConstantSize->getZExtValue(),Align,
3658 isVol, false, DstPtrInfo, SrcPtrInfo);
3659 if (Result.getNode())
3663 // Then check to see if we should lower the memcpy with target-specific
3664 // code. If the target chooses to do this, this is the next best.
3666 TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align,
3667 isVol, AlwaysInline,
3668 DstPtrInfo, SrcPtrInfo);
3669 if (Result.getNode())
3672 // If we really need inline code and the target declined to provide it,
3673 // use a (potentially long) sequence of loads and stores.
3675 assert(ConstantSize && "AlwaysInline requires a constant size!");
3676 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3677 ConstantSize->getZExtValue(), Align, isVol,
3678 true, DstPtrInfo, SrcPtrInfo);
3681 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc
3682 // memcpy is not guaranteed to be safe. libc memcpys aren't required to
3683 // respect volatile, so they may do things like read or write memory
3684 // beyond the given memory regions. But fixing this isn't easy, and most
3685 // people don't care.
3687 // Emit a library call.
3688 TargetLowering::ArgListTy Args;
3689 TargetLowering::ArgListEntry Entry;
3690 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3691 Entry.Node = Dst; Args.push_back(Entry);
3692 Entry.Node = Src; Args.push_back(Entry);
3693 Entry.Node = Size; Args.push_back(Entry);
3694 // FIXME: pass in DebugLoc
3695 std::pair<SDValue,SDValue> CallResult =
3696 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3697 false, false, false, false, 0,
3698 TLI.getLibcallCallingConv(RTLIB::MEMCPY), false,
3699 /*isReturnValueUsed=*/false,
3700 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY),
3701 TLI.getPointerTy()),
3703 return CallResult.second;
3706 SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst,
3707 SDValue Src, SDValue Size,
3708 unsigned Align, bool isVol,
3709 MachinePointerInfo DstPtrInfo,
3710 MachinePointerInfo SrcPtrInfo) {
3712 // Check to see if we should lower the memmove to loads and stores first.
3713 // For cases within the target-specified limits, this is the best choice.
3714 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3716 // Memmove with size zero? Just return the original chain.
3717 if (ConstantSize->isNullValue())
3721 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
3722 ConstantSize->getZExtValue(), Align, isVol,
3723 false, DstPtrInfo, SrcPtrInfo);
3724 if (Result.getNode())
3728 // Then check to see if we should lower the memmove with target-specific
3729 // code. If the target chooses to do this, this is the next best.
3731 TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3732 DstPtrInfo, SrcPtrInfo);
3733 if (Result.getNode())
3736 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may
3737 // not be safe. See memcpy above for more details.
3739 // Emit a library call.
3740 TargetLowering::ArgListTy Args;
3741 TargetLowering::ArgListEntry Entry;
3742 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3743 Entry.Node = Dst; Args.push_back(Entry);
3744 Entry.Node = Src; Args.push_back(Entry);
3745 Entry.Node = Size; Args.push_back(Entry);
3746 // FIXME: pass in DebugLoc
3747 std::pair<SDValue,SDValue> CallResult =
3748 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3749 false, false, false, false, 0,
3750 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), false,
3751 /*isReturnValueUsed=*/false,
3752 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE),
3753 TLI.getPointerTy()),
3755 return CallResult.second;
3758 SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst,
3759 SDValue Src, SDValue Size,
3760 unsigned Align, bool isVol,
3761 MachinePointerInfo DstPtrInfo) {
3763 // Check to see if we should lower the memset to stores first.
3764 // For cases within the target-specified limits, this is the best choice.
3765 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3767 // Memset with size zero? Just return the original chain.
3768 if (ConstantSize->isNullValue())
3772 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
3773 Align, isVol, DstPtrInfo);
3775 if (Result.getNode())
3779 // Then check to see if we should lower the memset with target-specific
3780 // code. If the target chooses to do this, this is the next best.
3782 TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3784 if (Result.getNode())
3787 // Emit a library call.
3788 Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext());
3789 TargetLowering::ArgListTy Args;
3790 TargetLowering::ArgListEntry Entry;
3791 Entry.Node = Dst; Entry.Ty = IntPtrTy;
3792 Args.push_back(Entry);
3793 // Extend or truncate the argument to be an i32 value for the call.
3794 if (Src.getValueType().bitsGT(MVT::i32))
3795 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
3797 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
3799 Entry.Ty = Type::getInt32Ty(*getContext());
3800 Entry.isSExt = true;
3801 Args.push_back(Entry);
3803 Entry.Ty = IntPtrTy;
3804 Entry.isSExt = false;
3805 Args.push_back(Entry);
3806 // FIXME: pass in DebugLoc
3807 std::pair<SDValue,SDValue> CallResult =
3808 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3809 false, false, false, false, 0,
3810 TLI.getLibcallCallingConv(RTLIB::MEMSET), false,
3811 /*isReturnValueUsed=*/false,
3812 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET),
3813 TLI.getPointerTy()),
3815 return CallResult.second;
3818 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3819 SDValue Chain, SDValue Ptr, SDValue Cmp,
3820 SDValue Swp, MachinePointerInfo PtrInfo,
3822 AtomicOrdering Ordering,
3823 SynchronizationScope SynchScope) {
3824 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3825 Alignment = getEVTAlignment(MemVT);
3827 MachineFunction &MF = getMachineFunction();
3828 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
3830 // For now, atomics are considered to be volatile always.
3831 Flags |= MachineMemOperand::MOVolatile;
3833 MachineMemOperand *MMO =
3834 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment);
3836 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO,
3837 Ordering, SynchScope);
3840 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3842 SDValue Ptr, SDValue Cmp,
3843 SDValue Swp, MachineMemOperand *MMO,
3844 AtomicOrdering Ordering,
3845 SynchronizationScope SynchScope) {
3846 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
3847 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3849 EVT VT = Cmp.getValueType();
3851 SDVTList VTs = getVTList(VT, MVT::Other);
3852 FoldingSetNodeID ID;
3853 ID.AddInteger(MemVT.getRawBits());
3854 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3855 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3857 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3858 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3859 return SDValue(E, 0);
3861 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
3862 Ptr, Cmp, Swp, MMO, Ordering,
3864 CSEMap.InsertNode(N, IP);
3865 AllNodes.push_back(N);
3866 return SDValue(N, 0);
3869 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3871 SDValue Ptr, SDValue Val,
3872 const Value* PtrVal,
3874 AtomicOrdering Ordering,
3875 SynchronizationScope SynchScope) {
3876 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3877 Alignment = getEVTAlignment(MemVT);
3879 MachineFunction &MF = getMachineFunction();
3880 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
3882 // For now, atomics are considered to be volatile always.
3883 Flags |= MachineMemOperand::MOVolatile;
3885 MachineMemOperand *MMO =
3886 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
3887 MemVT.getStoreSize(), Alignment);
3889 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO,
3890 Ordering, SynchScope);
3893 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3895 SDValue Ptr, SDValue Val,
3896 MachineMemOperand *MMO,
3897 AtomicOrdering Ordering,
3898 SynchronizationScope SynchScope) {
3899 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
3900 Opcode == ISD::ATOMIC_LOAD_SUB ||
3901 Opcode == ISD::ATOMIC_LOAD_AND ||
3902 Opcode == ISD::ATOMIC_LOAD_OR ||
3903 Opcode == ISD::ATOMIC_LOAD_XOR ||
3904 Opcode == ISD::ATOMIC_LOAD_NAND ||
3905 Opcode == ISD::ATOMIC_LOAD_MIN ||
3906 Opcode == ISD::ATOMIC_LOAD_MAX ||
3907 Opcode == ISD::ATOMIC_LOAD_UMIN ||
3908 Opcode == ISD::ATOMIC_LOAD_UMAX ||
3909 Opcode == ISD::ATOMIC_SWAP ||
3910 Opcode == ISD::ATOMIC_STORE) &&
3911 "Invalid Atomic Op");
3913 EVT VT = Val.getValueType();
3915 SDVTList VTs = Opcode == ISD::ATOMIC_STORE ? getVTList(MVT::Other) :
3916 getVTList(VT, MVT::Other);
3917 FoldingSetNodeID ID;
3918 ID.AddInteger(MemVT.getRawBits());
3919 SDValue Ops[] = {Chain, Ptr, Val};
3920 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3922 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3923 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3924 return SDValue(E, 0);
3926 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
3928 Ordering, SynchScope);
3929 CSEMap.InsertNode(N, IP);
3930 AllNodes.push_back(N);
3931 return SDValue(N, 0);
3934 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3935 EVT VT, SDValue Chain,
3937 const Value* PtrVal,
3939 AtomicOrdering Ordering,
3940 SynchronizationScope SynchScope) {
3941 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3942 Alignment = getEVTAlignment(MemVT);
3944 MachineFunction &MF = getMachineFunction();
3945 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
3947 // For now, atomics are considered to be volatile always.
3948 Flags |= MachineMemOperand::MOVolatile;
3950 MachineMemOperand *MMO =
3951 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
3952 MemVT.getStoreSize(), Alignment);
3954 return getAtomic(Opcode, dl, MemVT, VT, Chain, Ptr, MMO,
3955 Ordering, SynchScope);
3958 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3959 EVT VT, SDValue Chain,
3961 MachineMemOperand *MMO,
3962 AtomicOrdering Ordering,
3963 SynchronizationScope SynchScope) {
3964 assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op");
3966 SDVTList VTs = getVTList(VT, MVT::Other);
3967 FoldingSetNodeID ID;
3968 ID.AddInteger(MemVT.getRawBits());
3969 SDValue Ops[] = {Chain, Ptr};
3970 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
3972 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3973 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3974 return SDValue(E, 0);
3976 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
3977 Ptr, MMO, Ordering, SynchScope);
3978 CSEMap.InsertNode(N, IP);
3979 AllNodes.push_back(N);
3980 return SDValue(N, 0);
3983 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
3984 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps,
3989 SmallVector<EVT, 4> VTs;
3990 VTs.reserve(NumOps);
3991 for (unsigned i = 0; i < NumOps; ++i)
3992 VTs.push_back(Ops[i].getValueType());
3993 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps),
3998 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl,
3999 const EVT *VTs, unsigned NumVTs,
4000 const SDValue *Ops, unsigned NumOps,
4001 EVT MemVT, MachinePointerInfo PtrInfo,
4002 unsigned Align, bool Vol,
4003 bool ReadMem, bool WriteMem) {
4004 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps,
4005 MemVT, PtrInfo, Align, Vol,
4010 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
4011 const SDValue *Ops, unsigned NumOps,
4012 EVT MemVT, MachinePointerInfo PtrInfo,
4013 unsigned Align, bool Vol,
4014 bool ReadMem, bool WriteMem) {
4015 if (Align == 0) // Ensure that codegen never sees alignment 0
4016 Align = getEVTAlignment(MemVT);
4018 MachineFunction &MF = getMachineFunction();
4021 Flags |= MachineMemOperand::MOStore;
4023 Flags |= MachineMemOperand::MOLoad;
4025 Flags |= MachineMemOperand::MOVolatile;
4026 MachineMemOperand *MMO =
4027 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Align);
4029 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO);
4033 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
4034 const SDValue *Ops, unsigned NumOps,
4035 EVT MemVT, MachineMemOperand *MMO) {
4036 assert((Opcode == ISD::INTRINSIC_VOID ||
4037 Opcode == ISD::INTRINSIC_W_CHAIN ||
4038 Opcode == ISD::PREFETCH ||
4039 (Opcode <= INT_MAX &&
4040 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) &&
4041 "Opcode is not a memory-accessing opcode!");
4043 // Memoize the node unless it returns a flag.
4044 MemIntrinsicSDNode *N;
4045 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
4046 FoldingSetNodeID ID;
4047 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4049 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4050 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO);
4051 return SDValue(E, 0);
4054 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
4056 CSEMap.InsertNode(N, IP);
4058 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
4061 AllNodes.push_back(N);
4062 return SDValue(N, 0);
4065 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4066 /// MachinePointerInfo record from it. This is particularly useful because the
4067 /// code generator has many cases where it doesn't bother passing in a
4068 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4069 static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) {
4070 // If this is FI+Offset, we can model it.
4071 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr))
4072 return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset);
4074 // If this is (FI+Offset1)+Offset2, we can model it.
4075 if (Ptr.getOpcode() != ISD::ADD ||
4076 !isa<ConstantSDNode>(Ptr.getOperand(1)) ||
4077 !isa<FrameIndexSDNode>(Ptr.getOperand(0)))
4078 return MachinePointerInfo();
4080 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
4081 return MachinePointerInfo::getFixedStack(FI, Offset+
4082 cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue());
4085 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4086 /// MachinePointerInfo record from it. This is particularly useful because the
4087 /// code generator has many cases where it doesn't bother passing in a
4088 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4089 static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) {
4090 // If the 'Offset' value isn't a constant, we can't handle this.
4091 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp))
4092 return InferPointerInfo(Ptr, OffsetNode->getSExtValue());
4093 if (OffsetOp.getOpcode() == ISD::UNDEF)
4094 return InferPointerInfo(Ptr);
4095 return MachinePointerInfo();
4100 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4101 EVT VT, DebugLoc dl, SDValue Chain,
4102 SDValue Ptr, SDValue Offset,
4103 MachinePointerInfo PtrInfo, EVT MemVT,
4104 bool isVolatile, bool isNonTemporal,
4105 unsigned Alignment, const MDNode *TBAAInfo) {
4106 assert(Chain.getValueType() == MVT::Other &&
4107 "Invalid chain type");
4108 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4109 Alignment = getEVTAlignment(VT);
4111 unsigned Flags = MachineMemOperand::MOLoad;
4113 Flags |= MachineMemOperand::MOVolatile;
4115 Flags |= MachineMemOperand::MONonTemporal;
4117 // If we don't have a PtrInfo, infer the trivial frame index case to simplify
4120 PtrInfo = InferPointerInfo(Ptr, Offset);
4122 MachineFunction &MF = getMachineFunction();
4123 MachineMemOperand *MMO =
4124 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment,
4126 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO);
4130 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4131 EVT VT, DebugLoc dl, SDValue Chain,
4132 SDValue Ptr, SDValue Offset, EVT MemVT,
4133 MachineMemOperand *MMO) {
4135 ExtType = ISD::NON_EXTLOAD;
4136 } else if (ExtType == ISD::NON_EXTLOAD) {
4137 assert(VT == MemVT && "Non-extending load from different memory type!");
4140 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) &&
4141 "Should only be an extending load, not truncating!");
4142 assert(VT.isInteger() == MemVT.isInteger() &&
4143 "Cannot convert from FP to Int or Int -> FP!");
4144 assert(VT.isVector() == MemVT.isVector() &&
4145 "Cannot use trunc store to convert to or from a vector!");
4146 assert((!VT.isVector() ||
4147 VT.getVectorNumElements() == MemVT.getVectorNumElements()) &&
4148 "Cannot use trunc store to change the number of vector elements!");
4151 bool Indexed = AM != ISD::UNINDEXED;
4152 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
4153 "Unindexed load with an offset!");
4155 SDVTList VTs = Indexed ?
4156 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
4157 SDValue Ops[] = { Chain, Ptr, Offset };
4158 FoldingSetNodeID ID;
4159 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
4160 ID.AddInteger(MemVT.getRawBits());
4161 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(),
4162 MMO->isNonTemporal()));
4164 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4165 cast<LoadSDNode>(E)->refineAlignment(MMO);
4166 return SDValue(E, 0);
4168 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType,
4170 CSEMap.InsertNode(N, IP);
4171 AllNodes.push_back(N);
4172 return SDValue(N, 0);
4175 SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl,
4176 SDValue Chain, SDValue Ptr,
4177 MachinePointerInfo PtrInfo,
4178 bool isVolatile, bool isNonTemporal,
4179 unsigned Alignment, const MDNode *TBAAInfo) {
4180 SDValue Undef = getUNDEF(Ptr.getValueType());
4181 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
4182 PtrInfo, VT, isVolatile, isNonTemporal, Alignment, TBAAInfo);
4185 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT,
4186 SDValue Chain, SDValue Ptr,
4187 MachinePointerInfo PtrInfo, EVT MemVT,
4188 bool isVolatile, bool isNonTemporal,
4189 unsigned Alignment, const MDNode *TBAAInfo) {
4190 SDValue Undef = getUNDEF(Ptr.getValueType());
4191 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
4192 PtrInfo, MemVT, isVolatile, isNonTemporal, Alignment,
4198 SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base,
4199 SDValue Offset, ISD::MemIndexedMode AM) {
4200 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
4201 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
4202 "Load is already a indexed load!");
4203 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl,
4204 LD->getChain(), Base, Offset, LD->getPointerInfo(),
4206 LD->isVolatile(), LD->isNonTemporal(), LD->getAlignment());
4209 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4210 SDValue Ptr, MachinePointerInfo PtrInfo,
4211 bool isVolatile, bool isNonTemporal,
4212 unsigned Alignment, const MDNode *TBAAInfo) {
4213 assert(Chain.getValueType() == MVT::Other &&
4214 "Invalid chain type");
4215 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4216 Alignment = getEVTAlignment(Val.getValueType());
4218 unsigned Flags = MachineMemOperand::MOStore;
4220 Flags |= MachineMemOperand::MOVolatile;
4222 Flags |= MachineMemOperand::MONonTemporal;
4225 PtrInfo = InferPointerInfo(Ptr);
4227 MachineFunction &MF = getMachineFunction();
4228 MachineMemOperand *MMO =
4229 MF.getMachineMemOperand(PtrInfo, Flags,
4230 Val.getValueType().getStoreSize(), Alignment,
4233 return getStore(Chain, dl, Val, Ptr, MMO);
4236 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4237 SDValue Ptr, MachineMemOperand *MMO) {
4238 assert(Chain.getValueType() == MVT::Other &&
4239 "Invalid chain type");
4240 EVT VT = Val.getValueType();
4241 SDVTList VTs = getVTList(MVT::Other);
4242 SDValue Undef = getUNDEF(Ptr.getValueType());
4243 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4244 FoldingSetNodeID ID;
4245 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4246 ID.AddInteger(VT.getRawBits());
4247 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
4248 MMO->isNonTemporal()));
4250 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4251 cast<StoreSDNode>(E)->refineAlignment(MMO);
4252 return SDValue(E, 0);
4254 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4256 CSEMap.InsertNode(N, IP);
4257 AllNodes.push_back(N);
4258 return SDValue(N, 0);
4261 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4262 SDValue Ptr, MachinePointerInfo PtrInfo,
4263 EVT SVT,bool isVolatile, bool isNonTemporal,
4265 const MDNode *TBAAInfo) {
4266 assert(Chain.getValueType() == MVT::Other &&
4267 "Invalid chain type");
4268 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4269 Alignment = getEVTAlignment(SVT);
4271 unsigned Flags = MachineMemOperand::MOStore;
4273 Flags |= MachineMemOperand::MOVolatile;
4275 Flags |= MachineMemOperand::MONonTemporal;
4278 PtrInfo = InferPointerInfo(Ptr);
4280 MachineFunction &MF = getMachineFunction();
4281 MachineMemOperand *MMO =
4282 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment,
4285 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO);
4288 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4289 SDValue Ptr, EVT SVT,
4290 MachineMemOperand *MMO) {
4291 EVT VT = Val.getValueType();
4293 assert(Chain.getValueType() == MVT::Other &&
4294 "Invalid chain type");
4296 return getStore(Chain, dl, Val, Ptr, MMO);
4298 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) &&
4299 "Should only be a truncating store, not extending!");
4300 assert(VT.isInteger() == SVT.isInteger() &&
4301 "Can't do FP-INT conversion!");
4302 assert(VT.isVector() == SVT.isVector() &&
4303 "Cannot use trunc store to convert to or from a vector!");
4304 assert((!VT.isVector() ||
4305 VT.getVectorNumElements() == SVT.getVectorNumElements()) &&
4306 "Cannot use trunc store to change the number of vector elements!");
4308 SDVTList VTs = getVTList(MVT::Other);
4309 SDValue Undef = getUNDEF(Ptr.getValueType());
4310 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4311 FoldingSetNodeID ID;
4312 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4313 ID.AddInteger(SVT.getRawBits());
4314 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(),
4315 MMO->isNonTemporal()));
4317 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4318 cast<StoreSDNode>(E)->refineAlignment(MMO);
4319 return SDValue(E, 0);
4321 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4323 CSEMap.InsertNode(N, IP);
4324 AllNodes.push_back(N);
4325 return SDValue(N, 0);
4329 SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base,
4330 SDValue Offset, ISD::MemIndexedMode AM) {
4331 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
4332 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
4333 "Store is already a indexed store!");
4334 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
4335 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
4336 FoldingSetNodeID ID;
4337 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4338 ID.AddInteger(ST->getMemoryVT().getRawBits());
4339 ID.AddInteger(ST->getRawSubclassData());
4341 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4342 return SDValue(E, 0);
4344 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM,
4345 ST->isTruncatingStore(),
4347 ST->getMemOperand());
4348 CSEMap.InsertNode(N, IP);
4349 AllNodes.push_back(N);
4350 return SDValue(N, 0);
4353 SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl,
4354 SDValue Chain, SDValue Ptr,
4357 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) };
4358 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 4);
4361 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4362 const SDUse *Ops, unsigned NumOps) {
4364 case 0: return getNode(Opcode, DL, VT);
4365 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4366 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4367 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4371 // Copy from an SDUse array into an SDValue array for use with
4372 // the regular getNode logic.
4373 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
4374 return getNode(Opcode, DL, VT, &NewOps[0], NumOps);
4377 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4378 const SDValue *Ops, unsigned NumOps) {
4380 case 0: return getNode(Opcode, DL, VT);
4381 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4382 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4383 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4389 case ISD::SELECT_CC: {
4390 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
4391 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
4392 "LHS and RHS of condition must have same type!");
4393 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4394 "True and False arms of SelectCC must have same type!");
4395 assert(Ops[2].getValueType() == VT &&
4396 "select_cc node must be of same type as true and false value!");
4400 assert(NumOps == 5 && "BR_CC takes 5 operands!");
4401 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4402 "LHS/RHS of comparison should match types!");
4409 SDVTList VTs = getVTList(VT);
4411 if (VT != MVT::Glue) {
4412 FoldingSetNodeID ID;
4413 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
4416 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4417 return SDValue(E, 0);
4419 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4420 CSEMap.InsertNode(N, IP);
4422 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4425 AllNodes.push_back(N);
4429 return SDValue(N, 0);
4432 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4433 const std::vector<EVT> &ResultTys,
4434 const SDValue *Ops, unsigned NumOps) {
4435 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()),
4439 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4440 const EVT *VTs, unsigned NumVTs,
4441 const SDValue *Ops, unsigned NumOps) {
4443 return getNode(Opcode, DL, VTs[0], Ops, NumOps);
4444 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps);
4447 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4448 const SDValue *Ops, unsigned NumOps) {
4449 if (VTList.NumVTs == 1)
4450 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps);
4454 // FIXME: figure out how to safely handle things like
4455 // int foo(int x) { return 1 << (x & 255); }
4456 // int bar() { return foo(256); }
4457 case ISD::SRA_PARTS:
4458 case ISD::SRL_PARTS:
4459 case ISD::SHL_PARTS:
4460 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
4461 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
4462 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4463 else if (N3.getOpcode() == ISD::AND)
4464 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
4465 // If the and is only masking out bits that cannot effect the shift,
4466 // eliminate the and.
4467 unsigned NumBits = VT.getScalarType().getSizeInBits()*2;
4468 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
4469 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4475 // Memoize the node unless it returns a flag.
4477 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
4478 FoldingSetNodeID ID;
4479 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4481 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4482 return SDValue(E, 0);
4485 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4486 } else if (NumOps == 2) {
4487 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4488 } else if (NumOps == 3) {
4489 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4492 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4494 CSEMap.InsertNode(N, IP);
4497 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4498 } else if (NumOps == 2) {
4499 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4500 } else if (NumOps == 3) {
4501 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4504 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4507 AllNodes.push_back(N);
4511 return SDValue(N, 0);
4514 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) {
4515 return getNode(Opcode, DL, VTList, 0, 0);
4518 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4520 SDValue Ops[] = { N1 };
4521 return getNode(Opcode, DL, VTList, Ops, 1);
4524 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4525 SDValue N1, SDValue N2) {
4526 SDValue Ops[] = { N1, N2 };
4527 return getNode(Opcode, DL, VTList, Ops, 2);
4530 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4531 SDValue N1, SDValue N2, SDValue N3) {
4532 SDValue Ops[] = { N1, N2, N3 };
4533 return getNode(Opcode, DL, VTList, Ops, 3);
4536 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4537 SDValue N1, SDValue N2, SDValue N3,
4539 SDValue Ops[] = { N1, N2, N3, N4 };
4540 return getNode(Opcode, DL, VTList, Ops, 4);
4543 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4544 SDValue N1, SDValue N2, SDValue N3,
4545 SDValue N4, SDValue N5) {
4546 SDValue Ops[] = { N1, N2, N3, N4, N5 };
4547 return getNode(Opcode, DL, VTList, Ops, 5);
4550 SDVTList SelectionDAG::getVTList(EVT VT) {
4551 return makeVTList(SDNode::getValueTypeList(VT), 1);
4554 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
4555 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4556 E = VTList.rend(); I != E; ++I)
4557 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
4560 EVT *Array = Allocator.Allocate<EVT>(2);
4563 SDVTList Result = makeVTList(Array, 2);
4564 VTList.push_back(Result);
4568 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
4569 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4570 E = VTList.rend(); I != E; ++I)
4571 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4575 EVT *Array = Allocator.Allocate<EVT>(3);
4579 SDVTList Result = makeVTList(Array, 3);
4580 VTList.push_back(Result);
4584 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
4585 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4586 E = VTList.rend(); I != E; ++I)
4587 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4588 I->VTs[2] == VT3 && I->VTs[3] == VT4)
4591 EVT *Array = Allocator.Allocate<EVT>(4);
4596 SDVTList Result = makeVTList(Array, 4);
4597 VTList.push_back(Result);
4601 SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) {
4603 case 0: llvm_unreachable("Cannot have nodes without results!");
4604 case 1: return getVTList(VTs[0]);
4605 case 2: return getVTList(VTs[0], VTs[1]);
4606 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
4607 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]);
4611 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4612 E = VTList.rend(); I != E; ++I) {
4613 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
4616 bool NoMatch = false;
4617 for (unsigned i = 2; i != NumVTs; ++i)
4618 if (VTs[i] != I->VTs[i]) {
4626 EVT *Array = Allocator.Allocate<EVT>(NumVTs);
4627 std::copy(VTs, VTs+NumVTs, Array);
4628 SDVTList Result = makeVTList(Array, NumVTs);
4629 VTList.push_back(Result);
4634 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
4635 /// specified operands. If the resultant node already exists in the DAG,
4636 /// this does not modify the specified node, instead it returns the node that
4637 /// already exists. If the resultant node does not exist in the DAG, the
4638 /// input node is returned. As a degenerate case, if you specify the same
4639 /// input operands as the node already has, the input node is returned.
4640 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) {
4641 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
4643 // Check to see if there is no change.
4644 if (Op == N->getOperand(0)) return N;
4646 // See if the modified node already exists.
4647 void *InsertPos = 0;
4648 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
4651 // Nope it doesn't. Remove the node from its current place in the maps.
4653 if (!RemoveNodeFromCSEMaps(N))
4656 // Now we update the operands.
4657 N->OperandList[0].set(Op);
4659 // If this gets put into a CSE map, add it.
4660 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4664 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) {
4665 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
4667 // Check to see if there is no change.
4668 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
4669 return N; // No operands changed, just return the input node.
4671 // See if the modified node already exists.
4672 void *InsertPos = 0;
4673 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
4676 // Nope it doesn't. Remove the node from its current place in the maps.
4678 if (!RemoveNodeFromCSEMaps(N))
4681 // Now we update the operands.
4682 if (N->OperandList[0] != Op1)
4683 N->OperandList[0].set(Op1);
4684 if (N->OperandList[1] != Op2)
4685 N->OperandList[1].set(Op2);
4687 // If this gets put into a CSE map, add it.
4688 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4692 SDNode *SelectionDAG::
4693 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) {
4694 SDValue Ops[] = { Op1, Op2, Op3 };
4695 return UpdateNodeOperands(N, Ops, 3);
4698 SDNode *SelectionDAG::
4699 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
4700 SDValue Op3, SDValue Op4) {
4701 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
4702 return UpdateNodeOperands(N, Ops, 4);
4705 SDNode *SelectionDAG::
4706 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
4707 SDValue Op3, SDValue Op4, SDValue Op5) {
4708 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
4709 return UpdateNodeOperands(N, Ops, 5);
4712 SDNode *SelectionDAG::
4713 UpdateNodeOperands(SDNode *N, const SDValue *Ops, unsigned NumOps) {
4714 assert(N->getNumOperands() == NumOps &&
4715 "Update with wrong number of operands");
4717 // Check to see if there is no change.
4718 bool AnyChange = false;
4719 for (unsigned i = 0; i != NumOps; ++i) {
4720 if (Ops[i] != N->getOperand(i)) {
4726 // No operands changed, just return the input node.
4727 if (!AnyChange) return N;
4729 // See if the modified node already exists.
4730 void *InsertPos = 0;
4731 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
4734 // Nope it doesn't. Remove the node from its current place in the maps.
4736 if (!RemoveNodeFromCSEMaps(N))
4739 // Now we update the operands.
4740 for (unsigned i = 0; i != NumOps; ++i)
4741 if (N->OperandList[i] != Ops[i])
4742 N->OperandList[i].set(Ops[i]);
4744 // If this gets put into a CSE map, add it.
4745 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4749 /// DropOperands - Release the operands and set this node to have
4751 void SDNode::DropOperands() {
4752 // Unlike the code in MorphNodeTo that does this, we don't need to
4753 // watch for dead nodes here.
4754 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
4760 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
4763 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4765 SDVTList VTs = getVTList(VT);
4766 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
4769 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4770 EVT VT, SDValue Op1) {
4771 SDVTList VTs = getVTList(VT);
4772 SDValue Ops[] = { Op1 };
4773 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4776 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4777 EVT VT, SDValue Op1,
4779 SDVTList VTs = getVTList(VT);
4780 SDValue Ops[] = { Op1, Op2 };
4781 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4784 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4785 EVT VT, SDValue Op1,
4786 SDValue Op2, SDValue Op3) {
4787 SDVTList VTs = getVTList(VT);
4788 SDValue Ops[] = { Op1, Op2, Op3 };
4789 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4792 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4793 EVT VT, const SDValue *Ops,
4795 SDVTList VTs = getVTList(VT);
4796 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4799 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4800 EVT VT1, EVT VT2, const SDValue *Ops,
4802 SDVTList VTs = getVTList(VT1, VT2);
4803 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4806 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4808 SDVTList VTs = getVTList(VT1, VT2);
4809 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
4812 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4813 EVT VT1, EVT VT2, EVT VT3,
4814 const SDValue *Ops, unsigned NumOps) {
4815 SDVTList VTs = getVTList(VT1, VT2, VT3);
4816 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4819 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4820 EVT VT1, EVT VT2, EVT VT3, EVT VT4,
4821 const SDValue *Ops, unsigned NumOps) {
4822 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4823 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4826 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4829 SDVTList VTs = getVTList(VT1, VT2);
4830 SDValue Ops[] = { Op1 };
4831 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4834 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4836 SDValue Op1, SDValue Op2) {
4837 SDVTList VTs = getVTList(VT1, VT2);
4838 SDValue Ops[] = { Op1, Op2 };
4839 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4842 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4844 SDValue Op1, SDValue Op2,
4846 SDVTList VTs = getVTList(VT1, VT2);
4847 SDValue Ops[] = { Op1, Op2, Op3 };
4848 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4851 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4852 EVT VT1, EVT VT2, EVT VT3,
4853 SDValue Op1, SDValue Op2,
4855 SDVTList VTs = getVTList(VT1, VT2, VT3);
4856 SDValue Ops[] = { Op1, Op2, Op3 };
4857 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4860 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4861 SDVTList VTs, const SDValue *Ops,
4863 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
4864 // Reset the NodeID to -1.
4869 /// MorphNodeTo - This *mutates* the specified node to have the specified
4870 /// return type, opcode, and operands.
4872 /// Note that MorphNodeTo returns the resultant node. If there is already a
4873 /// node of the specified opcode and operands, it returns that node instead of
4874 /// the current one. Note that the DebugLoc need not be the same.
4876 /// Using MorphNodeTo is faster than creating a new node and swapping it in
4877 /// with ReplaceAllUsesWith both because it often avoids allocating a new
4878 /// node, and because it doesn't require CSE recalculation for any of
4879 /// the node's users.
4881 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4882 SDVTList VTs, const SDValue *Ops,
4884 // If an identical node already exists, use it.
4886 if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) {
4887 FoldingSetNodeID ID;
4888 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
4889 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
4893 if (!RemoveNodeFromCSEMaps(N))
4896 // Start the morphing.
4898 N->ValueList = VTs.VTs;
4899 N->NumValues = VTs.NumVTs;
4901 // Clear the operands list, updating used nodes to remove this from their
4902 // use list. Keep track of any operands that become dead as a result.
4903 SmallPtrSet<SDNode*, 16> DeadNodeSet;
4904 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
4906 SDNode *Used = Use.getNode();
4908 if (Used->use_empty())
4909 DeadNodeSet.insert(Used);
4912 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) {
4913 // Initialize the memory references information.
4914 MN->setMemRefs(0, 0);
4915 // If NumOps is larger than the # of operands we can have in a
4916 // MachineSDNode, reallocate the operand list.
4917 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) {
4918 if (MN->OperandsNeedDelete)
4919 delete[] MN->OperandList;
4920 if (NumOps > array_lengthof(MN->LocalOperands))
4921 // We're creating a final node that will live unmorphed for the
4922 // remainder of the current SelectionDAG iteration, so we can allocate
4923 // the operands directly out of a pool with no recycling metadata.
4924 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
4927 MN->InitOperands(MN->LocalOperands, Ops, NumOps);
4928 MN->OperandsNeedDelete = false;
4930 MN->InitOperands(MN->OperandList, Ops, NumOps);
4932 // If NumOps is larger than the # of operands we currently have, reallocate
4933 // the operand list.
4934 if (NumOps > N->NumOperands) {
4935 if (N->OperandsNeedDelete)
4936 delete[] N->OperandList;
4937 N->InitOperands(new SDUse[NumOps], Ops, NumOps);
4938 N->OperandsNeedDelete = true;
4940 N->InitOperands(N->OperandList, Ops, NumOps);
4943 // Delete any nodes that are still dead after adding the uses for the
4945 if (!DeadNodeSet.empty()) {
4946 SmallVector<SDNode *, 16> DeadNodes;
4947 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
4948 E = DeadNodeSet.end(); I != E; ++I)
4949 if ((*I)->use_empty())
4950 DeadNodes.push_back(*I);
4951 RemoveDeadNodes(DeadNodes);
4955 CSEMap.InsertNode(N, IP); // Memoize the new node.
4960 /// getMachineNode - These are used for target selectors to create a new node
4961 /// with specified return type(s), MachineInstr opcode, and operands.
4963 /// Note that getMachineNode returns the resultant node. If there is already a
4964 /// node of the specified opcode and operands, it returns that node instead of
4965 /// the current one.
4967 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) {
4968 SDVTList VTs = getVTList(VT);
4969 return getMachineNode(Opcode, dl, VTs, 0, 0);
4973 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) {
4974 SDVTList VTs = getVTList(VT);
4975 SDValue Ops[] = { Op1 };
4976 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4980 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4981 SDValue Op1, SDValue Op2) {
4982 SDVTList VTs = getVTList(VT);
4983 SDValue Ops[] = { Op1, Op2 };
4984 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4988 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4989 SDValue Op1, SDValue Op2, SDValue Op3) {
4990 SDVTList VTs = getVTList(VT);
4991 SDValue Ops[] = { Op1, Op2, Op3 };
4992 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4996 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4997 const SDValue *Ops, unsigned NumOps) {
4998 SDVTList VTs = getVTList(VT);
4999 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5003 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) {
5004 SDVTList VTs = getVTList(VT1, VT2);
5005 return getMachineNode(Opcode, dl, VTs, 0, 0);
5009 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5010 EVT VT1, EVT VT2, SDValue Op1) {
5011 SDVTList VTs = getVTList(VT1, VT2);
5012 SDValue Ops[] = { Op1 };
5013 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5017 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5018 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) {
5019 SDVTList VTs = getVTList(VT1, VT2);
5020 SDValue Ops[] = { Op1, Op2 };
5021 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5025 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5026 EVT VT1, EVT VT2, SDValue Op1,
5027 SDValue Op2, SDValue Op3) {
5028 SDVTList VTs = getVTList(VT1, VT2);
5029 SDValue Ops[] = { Op1, Op2, Op3 };
5030 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5034 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5036 const SDValue *Ops, unsigned NumOps) {
5037 SDVTList VTs = getVTList(VT1, VT2);
5038 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5042 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5043 EVT VT1, EVT VT2, EVT VT3,
5044 SDValue Op1, SDValue Op2) {
5045 SDVTList VTs = getVTList(VT1, VT2, VT3);
5046 SDValue Ops[] = { Op1, Op2 };
5047 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5051 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5052 EVT VT1, EVT VT2, EVT VT3,
5053 SDValue Op1, SDValue Op2, SDValue Op3) {
5054 SDVTList VTs = getVTList(VT1, VT2, VT3);
5055 SDValue Ops[] = { Op1, Op2, Op3 };
5056 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5060 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5061 EVT VT1, EVT VT2, EVT VT3,
5062 const SDValue *Ops, unsigned NumOps) {
5063 SDVTList VTs = getVTList(VT1, VT2, VT3);
5064 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5068 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1,
5069 EVT VT2, EVT VT3, EVT VT4,
5070 const SDValue *Ops, unsigned NumOps) {
5071 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
5072 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5076 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5077 const std::vector<EVT> &ResultTys,
5078 const SDValue *Ops, unsigned NumOps) {
5079 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size());
5080 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5084 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs,
5085 const SDValue *Ops, unsigned NumOps) {
5086 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue;
5091 FoldingSetNodeID ID;
5092 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps);
5094 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
5095 return cast<MachineSDNode>(E);
5098 // Allocate a new MachineSDNode.
5099 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs);
5101 // Initialize the operands list.
5102 if (NumOps > array_lengthof(N->LocalOperands))
5103 // We're creating a final node that will live unmorphed for the
5104 // remainder of the current SelectionDAG iteration, so we can allocate
5105 // the operands directly out of a pool with no recycling metadata.
5106 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
5109 N->InitOperands(N->LocalOperands, Ops, NumOps);
5110 N->OperandsNeedDelete = false;
5113 CSEMap.InsertNode(N, IP);
5115 AllNodes.push_back(N);
5117 VerifyMachineNode(N);
5122 /// getTargetExtractSubreg - A convenience function for creating
5123 /// TargetOpcode::EXTRACT_SUBREG nodes.
5125 SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT,
5127 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
5128 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL,
5129 VT, Operand, SRIdxVal);
5130 return SDValue(Subreg, 0);
5133 /// getTargetInsertSubreg - A convenience function for creating
5134 /// TargetOpcode::INSERT_SUBREG nodes.
5136 SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT,
5137 SDValue Operand, SDValue Subreg) {
5138 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
5139 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL,
5140 VT, Operand, Subreg, SRIdxVal);
5141 return SDValue(Result, 0);
5144 /// getNodeIfExists - Get the specified node if it's already available, or
5145 /// else return NULL.
5146 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
5147 const SDValue *Ops, unsigned NumOps) {
5148 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
5149 FoldingSetNodeID ID;
5150 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
5152 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
5158 /// getDbgValue - Creates a SDDbgValue node.
5161 SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off,
5162 DebugLoc DL, unsigned O) {
5163 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O);
5167 SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off,
5168 DebugLoc DL, unsigned O) {
5169 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O);
5173 SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off,
5174 DebugLoc DL, unsigned O) {
5175 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O);
5180 /// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node
5181 /// pointed to by a use iterator is deleted, increment the use iterator
5182 /// so that it doesn't dangle.
5184 /// This class also manages a "downlink" DAGUpdateListener, to forward
5185 /// messages to ReplaceAllUsesWith's callers.
5187 class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener {
5188 SelectionDAG::DAGUpdateListener *DownLink;
5189 SDNode::use_iterator &UI;
5190 SDNode::use_iterator &UE;
5192 virtual void NodeDeleted(SDNode *N, SDNode *E) {
5193 // Increment the iterator as needed.
5194 while (UI != UE && N == *UI)
5197 // Then forward the message.
5198 if (DownLink) DownLink->NodeDeleted(N, E);
5201 virtual void NodeUpdated(SDNode *N) {
5202 // Just forward the message.
5203 if (DownLink) DownLink->NodeUpdated(N);
5207 RAUWUpdateListener(SelectionDAG::DAGUpdateListener *dl,
5208 SDNode::use_iterator &ui,
5209 SDNode::use_iterator &ue)
5210 : DownLink(dl), UI(ui), UE(ue) {}
5215 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5216 /// This can cause recursive merging of nodes in the DAG.
5218 /// This version assumes From has a single result value.
5220 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To,
5221 DAGUpdateListener *UpdateListener) {
5222 SDNode *From = FromN.getNode();
5223 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
5224 "Cannot replace with this method!");
5225 assert(From != To.getNode() && "Cannot replace uses of with self");
5227 // Iterate over all the existing uses of From. New uses will be added
5228 // to the beginning of the use list, which we avoid visiting.
5229 // This specifically avoids visiting uses of From that arise while the
5230 // replacement is happening, because any such uses would be the result
5231 // of CSE: If an existing node looks like From after one of its operands
5232 // is replaced by To, we don't want to replace of all its users with To
5233 // too. See PR3018 for more info.
5234 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5235 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5239 // This node is about to morph, remove its old self from the CSE maps.
5240 RemoveNodeFromCSEMaps(User);
5242 // A user can appear in a use list multiple times, and when this
5243 // happens the uses are usually next to each other in the list.
5244 // To help reduce the number of CSE recomputations, process all
5245 // the uses of this user that we can find this way.
5247 SDUse &Use = UI.getUse();
5250 } while (UI != UE && *UI == User);
5252 // Now that we have modified User, add it back to the CSE maps. If it
5253 // already exists there, recursively merge the results together.
5254 AddModifiedNodeToCSEMaps(User, &Listener);
5258 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5259 /// This can cause recursive merging of nodes in the DAG.
5261 /// This version assumes that for each value of From, there is a
5262 /// corresponding value in To in the same position with the same type.
5264 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To,
5265 DAGUpdateListener *UpdateListener) {
5267 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
5268 assert((!From->hasAnyUseOfValue(i) ||
5269 From->getValueType(i) == To->getValueType(i)) &&
5270 "Cannot use this version of ReplaceAllUsesWith!");
5273 // Handle the trivial case.
5277 // Iterate over just the existing users of From. See the comments in
5278 // the ReplaceAllUsesWith above.
5279 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5280 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5284 // This node is about to morph, remove its old self from the CSE maps.
5285 RemoveNodeFromCSEMaps(User);
5287 // A user can appear in a use list multiple times, and when this
5288 // happens the uses are usually next to each other in the list.
5289 // To help reduce the number of CSE recomputations, process all
5290 // the uses of this user that we can find this way.
5292 SDUse &Use = UI.getUse();
5295 } while (UI != UE && *UI == User);
5297 // Now that we have modified User, add it back to the CSE maps. If it
5298 // already exists there, recursively merge the results together.
5299 AddModifiedNodeToCSEMaps(User, &Listener);
5303 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5304 /// This can cause recursive merging of nodes in the DAG.
5306 /// This version can replace From with any result values. To must match the
5307 /// number and types of values returned by From.
5308 void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
5310 DAGUpdateListener *UpdateListener) {
5311 if (From->getNumValues() == 1) // Handle the simple case efficiently.
5312 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener);
5314 // Iterate over just the existing users of From. See the comments in
5315 // the ReplaceAllUsesWith above.
5316 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5317 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5321 // This node is about to morph, remove its old self from the CSE maps.
5322 RemoveNodeFromCSEMaps(User);
5324 // A user can appear in a use list multiple times, and when this
5325 // happens the uses are usually next to each other in the list.
5326 // To help reduce the number of CSE recomputations, process all
5327 // the uses of this user that we can find this way.
5329 SDUse &Use = UI.getUse();
5330 const SDValue &ToOp = To[Use.getResNo()];
5333 } while (UI != UE && *UI == User);
5335 // Now that we have modified User, add it back to the CSE maps. If it
5336 // already exists there, recursively merge the results together.
5337 AddModifiedNodeToCSEMaps(User, &Listener);
5341 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
5342 /// uses of other values produced by From.getNode() alone. The Deleted
5343 /// vector is handled the same way as for ReplaceAllUsesWith.
5344 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To,
5345 DAGUpdateListener *UpdateListener){
5346 // Handle the really simple, really trivial case efficiently.
5347 if (From == To) return;
5349 // Handle the simple, trivial, case efficiently.
5350 if (From.getNode()->getNumValues() == 1) {
5351 ReplaceAllUsesWith(From, To, UpdateListener);
5355 // Iterate over just the existing users of From. See the comments in
5356 // the ReplaceAllUsesWith above.
5357 SDNode::use_iterator UI = From.getNode()->use_begin(),
5358 UE = From.getNode()->use_end();
5359 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5362 bool UserRemovedFromCSEMaps = false;
5364 // A user can appear in a use list multiple times, and when this
5365 // happens the uses are usually next to each other in the list.
5366 // To help reduce the number of CSE recomputations, process all
5367 // the uses of this user that we can find this way.
5369 SDUse &Use = UI.getUse();
5371 // Skip uses of different values from the same node.
5372 if (Use.getResNo() != From.getResNo()) {
5377 // If this node hasn't been modified yet, it's still in the CSE maps,
5378 // so remove its old self from the CSE maps.
5379 if (!UserRemovedFromCSEMaps) {
5380 RemoveNodeFromCSEMaps(User);
5381 UserRemovedFromCSEMaps = true;
5386 } while (UI != UE && *UI == User);
5388 // We are iterating over all uses of the From node, so if a use
5389 // doesn't use the specific value, no changes are made.
5390 if (!UserRemovedFromCSEMaps)
5393 // Now that we have modified User, add it back to the CSE maps. If it
5394 // already exists there, recursively merge the results together.
5395 AddModifiedNodeToCSEMaps(User, &Listener);
5400 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
5401 /// to record information about a use.
5408 /// operator< - Sort Memos by User.
5409 bool operator<(const UseMemo &L, const UseMemo &R) {
5410 return (intptr_t)L.User < (intptr_t)R.User;
5414 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
5415 /// uses of other values produced by From.getNode() alone. The same value
5416 /// may appear in both the From and To list. The Deleted vector is
5417 /// handled the same way as for ReplaceAllUsesWith.
5418 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
5421 DAGUpdateListener *UpdateListener){
5422 // Handle the simple, trivial case efficiently.
5424 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener);
5426 // Read up all the uses and make records of them. This helps
5427 // processing new uses that are introduced during the
5428 // replacement process.
5429 SmallVector<UseMemo, 4> Uses;
5430 for (unsigned i = 0; i != Num; ++i) {
5431 unsigned FromResNo = From[i].getResNo();
5432 SDNode *FromNode = From[i].getNode();
5433 for (SDNode::use_iterator UI = FromNode->use_begin(),
5434 E = FromNode->use_end(); UI != E; ++UI) {
5435 SDUse &Use = UI.getUse();
5436 if (Use.getResNo() == FromResNo) {
5437 UseMemo Memo = { *UI, i, &Use };
5438 Uses.push_back(Memo);
5443 // Sort the uses, so that all the uses from a given User are together.
5444 std::sort(Uses.begin(), Uses.end());
5446 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
5447 UseIndex != UseIndexEnd; ) {
5448 // We know that this user uses some value of From. If it is the right
5449 // value, update it.
5450 SDNode *User = Uses[UseIndex].User;
5452 // This node is about to morph, remove its old self from the CSE maps.
5453 RemoveNodeFromCSEMaps(User);
5455 // The Uses array is sorted, so all the uses for a given User
5456 // are next to each other in the list.
5457 // To help reduce the number of CSE recomputations, process all
5458 // the uses of this user that we can find this way.
5460 unsigned i = Uses[UseIndex].Index;
5461 SDUse &Use = *Uses[UseIndex].Use;
5465 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
5467 // Now that we have modified User, add it back to the CSE maps. If it
5468 // already exists there, recursively merge the results together.
5469 AddModifiedNodeToCSEMaps(User, UpdateListener);
5473 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
5474 /// based on their topological order. It returns the maximum id and a vector
5475 /// of the SDNodes* in assigned order by reference.
5476 unsigned SelectionDAG::AssignTopologicalOrder() {
5478 unsigned DAGSize = 0;
5480 // SortedPos tracks the progress of the algorithm. Nodes before it are
5481 // sorted, nodes after it are unsorted. When the algorithm completes
5482 // it is at the end of the list.
5483 allnodes_iterator SortedPos = allnodes_begin();
5485 // Visit all the nodes. Move nodes with no operands to the front of
5486 // the list immediately. Annotate nodes that do have operands with their
5487 // operand count. Before we do this, the Node Id fields of the nodes
5488 // may contain arbitrary values. After, the Node Id fields for nodes
5489 // before SortedPos will contain the topological sort index, and the
5490 // Node Id fields for nodes At SortedPos and after will contain the
5491 // count of outstanding operands.
5492 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
5495 unsigned Degree = N->getNumOperands();
5497 // A node with no uses, add it to the result array immediately.
5498 N->setNodeId(DAGSize++);
5499 allnodes_iterator Q = N;
5501 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
5502 assert(SortedPos != AllNodes.end() && "Overran node list");
5505 // Temporarily use the Node Id as scratch space for the degree count.
5506 N->setNodeId(Degree);
5510 // Visit all the nodes. As we iterate, moves nodes into sorted order,
5511 // such that by the time the end is reached all nodes will be sorted.
5512 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
5515 // N is in sorted position, so all its uses have one less operand
5516 // that needs to be sorted.
5517 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
5520 unsigned Degree = P->getNodeId();
5521 assert(Degree != 0 && "Invalid node degree");
5524 // All of P's operands are sorted, so P may sorted now.
5525 P->setNodeId(DAGSize++);
5527 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
5528 assert(SortedPos != AllNodes.end() && "Overran node list");
5531 // Update P's outstanding operand count.
5532 P->setNodeId(Degree);
5535 if (I == SortedPos) {
5538 dbgs() << "Overran sorted position:\n";
5541 llvm_unreachable(0);
5545 assert(SortedPos == AllNodes.end() &&
5546 "Topological sort incomplete!");
5547 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
5548 "First node in topological sort is not the entry token!");
5549 assert(AllNodes.front().getNodeId() == 0 &&
5550 "First node in topological sort has non-zero id!");
5551 assert(AllNodes.front().getNumOperands() == 0 &&
5552 "First node in topological sort has operands!");
5553 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
5554 "Last node in topologic sort has unexpected id!");
5555 assert(AllNodes.back().use_empty() &&
5556 "Last node in topologic sort has users!");
5557 assert(DAGSize == allnodes_size() && "Node count mismatch!");
5561 /// AssignOrdering - Assign an order to the SDNode.
5562 void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) {
5563 assert(SD && "Trying to assign an order to a null node!");
5564 Ordering->add(SD, Order);
5567 /// GetOrdering - Get the order for the SDNode.
5568 unsigned SelectionDAG::GetOrdering(const SDNode *SD) const {
5569 assert(SD && "Trying to get the order of a null node!");
5570 return Ordering->getOrder(SD);
5573 /// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the
5574 /// value is produced by SD.
5575 void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) {
5576 DbgInfo->add(DB, SD, isParameter);
5578 SD->setHasDebugValue(true);
5581 /// TransferDbgValues - Transfer SDDbgValues.
5582 void SelectionDAG::TransferDbgValues(SDValue From, SDValue To) {
5583 if (From == To || !From.getNode()->getHasDebugValue())
5585 SDNode *FromNode = From.getNode();
5586 SDNode *ToNode = To.getNode();
5587 ArrayRef<SDDbgValue *> DVs = GetDbgValues(FromNode);
5588 SmallVector<SDDbgValue *, 2> ClonedDVs;
5589 for (ArrayRef<SDDbgValue *>::iterator I = DVs.begin(), E = DVs.end();
5591 SDDbgValue *Dbg = *I;
5592 if (Dbg->getKind() == SDDbgValue::SDNODE) {
5593 SDDbgValue *Clone = getDbgValue(Dbg->getMDPtr(), ToNode, To.getResNo(),
5594 Dbg->getOffset(), Dbg->getDebugLoc(),
5596 ClonedDVs.push_back(Clone);
5599 for (SmallVector<SDDbgValue *, 2>::iterator I = ClonedDVs.begin(),
5600 E = ClonedDVs.end(); I != E; ++I)
5601 AddDbgValue(*I, ToNode, false);
5604 //===----------------------------------------------------------------------===//
5606 //===----------------------------------------------------------------------===//
5608 HandleSDNode::~HandleSDNode() {
5612 GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, DebugLoc DL,
5613 const GlobalValue *GA,
5614 EVT VT, int64_t o, unsigned char TF)
5615 : SDNode(Opc, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) {
5619 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt,
5620 MachineMemOperand *mmo)
5621 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) {
5622 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5623 MMO->isNonTemporal());
5624 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5625 assert(isNonTemporal() == MMO->isNonTemporal() &&
5626 "Non-temporal encoding error!");
5627 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5630 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs,
5631 const SDValue *Ops, unsigned NumOps, EVT memvt,
5632 MachineMemOperand *mmo)
5633 : SDNode(Opc, dl, VTs, Ops, NumOps),
5634 MemoryVT(memvt), MMO(mmo) {
5635 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5636 MMO->isNonTemporal());
5637 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5638 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5641 /// Profile - Gather unique data for the node.
5643 void SDNode::Profile(FoldingSetNodeID &ID) const {
5644 AddNodeIDNode(ID, this);
5649 std::vector<EVT> VTs;
5652 VTs.reserve(MVT::LAST_VALUETYPE);
5653 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i)
5654 VTs.push_back(MVT((MVT::SimpleValueType)i));
5659 static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs;
5660 static ManagedStatic<EVTArray> SimpleVTArray;
5661 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
5663 /// getValueTypeList - Return a pointer to the specified value type.
5665 const EVT *SDNode::getValueTypeList(EVT VT) {
5666 if (VT.isExtended()) {
5667 sys::SmartScopedLock<true> Lock(*VTMutex);
5668 return &(*EVTs->insert(VT).first);
5670 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE &&
5671 "Value type out of range!");
5672 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy];
5676 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
5677 /// indicated value. This method ignores uses of other values defined by this
5679 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
5680 assert(Value < getNumValues() && "Bad value!");
5682 // TODO: Only iterate over uses of a given value of the node
5683 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
5684 if (UI.getUse().getResNo() == Value) {
5691 // Found exactly the right number of uses?
5696 /// hasAnyUseOfValue - Return true if there are any use of the indicated
5697 /// value. This method ignores uses of other values defined by this operation.
5698 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
5699 assert(Value < getNumValues() && "Bad value!");
5701 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
5702 if (UI.getUse().getResNo() == Value)
5709 /// isOnlyUserOf - Return true if this node is the only use of N.
5711 bool SDNode::isOnlyUserOf(SDNode *N) const {
5713 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
5724 /// isOperand - Return true if this node is an operand of N.
5726 bool SDValue::isOperandOf(SDNode *N) const {
5727 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5728 if (*this == N->getOperand(i))
5733 bool SDNode::isOperandOf(SDNode *N) const {
5734 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
5735 if (this == N->OperandList[i].getNode())
5740 /// reachesChainWithoutSideEffects - Return true if this operand (which must
5741 /// be a chain) reaches the specified operand without crossing any
5742 /// side-effecting instructions on any chain path. In practice, this looks
5743 /// through token factors and non-volatile loads. In order to remain efficient,
5744 /// this only looks a couple of nodes in, it does not do an exhaustive search.
5745 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
5746 unsigned Depth) const {
5747 if (*this == Dest) return true;
5749 // Don't search too deeply, we just want to be able to see through
5750 // TokenFactor's etc.
5751 if (Depth == 0) return false;
5753 // If this is a token factor, all inputs to the TF happen in parallel. If any
5754 // of the operands of the TF does not reach dest, then we cannot do the xform.
5755 if (getOpcode() == ISD::TokenFactor) {
5756 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
5757 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
5762 // Loads don't have side effects, look through them.
5763 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
5764 if (!Ld->isVolatile())
5765 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
5770 /// hasPredecessor - Return true if N is a predecessor of this node.
5771 /// N is either an operand of this node, or can be reached by recursively
5772 /// traversing up the operands.
5773 /// NOTE: This is an expensive method. Use it carefully.
5774 bool SDNode::hasPredecessor(const SDNode *N) const {
5775 SmallPtrSet<const SDNode *, 32> Visited;
5776 SmallVector<const SDNode *, 16> Worklist;
5777 return hasPredecessorHelper(N, Visited, Worklist);
5780 bool SDNode::hasPredecessorHelper(const SDNode *N,
5781 SmallPtrSet<const SDNode *, 32> &Visited,
5782 SmallVector<const SDNode *, 16> &Worklist) const {
5783 if (Visited.empty()) {
5784 Worklist.push_back(this);
5786 // Take a look in the visited set. If we've already encountered this node
5787 // we needn't search further.
5788 if (Visited.count(N))
5792 // Haven't visited N yet. Continue the search.
5793 while (!Worklist.empty()) {
5794 const SDNode *M = Worklist.pop_back_val();
5795 for (unsigned i = 0, e = M->getNumOperands(); i != e; ++i) {
5796 SDNode *Op = M->getOperand(i).getNode();
5797 if (Visited.insert(Op))
5798 Worklist.push_back(Op);
5807 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
5808 assert(Num < NumOperands && "Invalid child # of SDNode!");
5809 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
5812 std::string SDNode::getOperationName(const SelectionDAG *G) const {
5813 switch (getOpcode()) {
5815 if (getOpcode() < ISD::BUILTIN_OP_END)
5816 return "<<Unknown DAG Node>>";
5817 if (isMachineOpcode()) {
5819 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo())
5820 if (getMachineOpcode() < TII->getNumOpcodes())
5821 return TII->get(getMachineOpcode()).getName();
5822 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>";
5825 const TargetLowering &TLI = G->getTargetLoweringInfo();
5826 const char *Name = TLI.getTargetNodeName(getOpcode());
5827 if (Name) return Name;
5828 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>";
5830 return "<<Unknown Node #" + utostr(getOpcode()) + ">>";
5833 case ISD::DELETED_NODE:
5834 return "<<Deleted Node!>>";
5836 case ISD::PREFETCH: return "Prefetch";
5837 case ISD::MEMBARRIER: return "MemBarrier";
5838 case ISD::ATOMIC_FENCE: return "AtomicFence";
5839 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
5840 case ISD::ATOMIC_SWAP: return "AtomicSwap";
5841 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
5842 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
5843 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
5844 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
5845 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
5846 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
5847 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
5848 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
5849 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
5850 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
5851 case ISD::ATOMIC_LOAD: return "AtomicLoad";
5852 case ISD::ATOMIC_STORE: return "AtomicStore";
5853 case ISD::PCMARKER: return "PCMarker";
5854 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
5855 case ISD::SRCVALUE: return "SrcValue";
5856 case ISD::MDNODE_SDNODE: return "MDNode";
5857 case ISD::EntryToken: return "EntryToken";
5858 case ISD::TokenFactor: return "TokenFactor";
5859 case ISD::AssertSext: return "AssertSext";
5860 case ISD::AssertZext: return "AssertZext";
5862 case ISD::BasicBlock: return "BasicBlock";
5863 case ISD::VALUETYPE: return "ValueType";
5864 case ISD::Register: return "Register";
5866 case ISD::Constant: return "Constant";
5867 case ISD::ConstantFP: return "ConstantFP";
5868 case ISD::GlobalAddress: return "GlobalAddress";
5869 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
5870 case ISD::FrameIndex: return "FrameIndex";
5871 case ISD::JumpTable: return "JumpTable";
5872 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
5873 case ISD::RETURNADDR: return "RETURNADDR";
5874 case ISD::FRAMEADDR: return "FRAMEADDR";
5875 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
5876 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR";
5877 case ISD::LSDAADDR: return "LSDAADDR";
5878 case ISD::EHSELECTION: return "EHSELECTION";
5879 case ISD::EH_RETURN: return "EH_RETURN";
5880 case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP";
5881 case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP";
5882 case ISD::EH_SJLJ_DISPATCHSETUP: return "EH_SJLJ_DISPATCHSETUP";
5883 case ISD::ConstantPool: return "ConstantPool";
5884 case ISD::ExternalSymbol: return "ExternalSymbol";
5885 case ISD::BlockAddress: return "BlockAddress";
5886 case ISD::INTRINSIC_WO_CHAIN:
5887 case ISD::INTRINSIC_VOID:
5888 case ISD::INTRINSIC_W_CHAIN: {
5889 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1;
5890 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue();
5891 if (IID < Intrinsic::num_intrinsics)
5892 return Intrinsic::getName((Intrinsic::ID)IID);
5893 else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo())
5894 return TII->getName(IID);
5895 llvm_unreachable("Invalid intrinsic ID");
5898 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
5899 case ISD::TargetConstant: return "TargetConstant";
5900 case ISD::TargetConstantFP:return "TargetConstantFP";
5901 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
5902 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
5903 case ISD::TargetFrameIndex: return "TargetFrameIndex";
5904 case ISD::TargetJumpTable: return "TargetJumpTable";
5905 case ISD::TargetConstantPool: return "TargetConstantPool";
5906 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
5907 case ISD::TargetBlockAddress: return "TargetBlockAddress";
5909 case ISD::CopyToReg: return "CopyToReg";
5910 case ISD::CopyFromReg: return "CopyFromReg";
5911 case ISD::UNDEF: return "undef";
5912 case ISD::MERGE_VALUES: return "merge_values";
5913 case ISD::INLINEASM: return "inlineasm";
5914 case ISD::EH_LABEL: return "eh_label";
5915 case ISD::HANDLENODE: return "handlenode";
5918 case ISD::FABS: return "fabs";
5919 case ISD::FNEG: return "fneg";
5920 case ISD::FSQRT: return "fsqrt";
5921 case ISD::FSIN: return "fsin";
5922 case ISD::FCOS: return "fcos";
5923 case ISD::FTRUNC: return "ftrunc";
5924 case ISD::FFLOOR: return "ffloor";
5925 case ISD::FCEIL: return "fceil";
5926 case ISD::FRINT: return "frint";
5927 case ISD::FNEARBYINT: return "fnearbyint";
5928 case ISD::FEXP: return "fexp";
5929 case ISD::FEXP2: return "fexp2";
5930 case ISD::FLOG: return "flog";
5931 case ISD::FLOG2: return "flog2";
5932 case ISD::FLOG10: return "flog10";
5935 case ISD::ADD: return "add";
5936 case ISD::SUB: return "sub";
5937 case ISD::MUL: return "mul";
5938 case ISD::MULHU: return "mulhu";
5939 case ISD::MULHS: return "mulhs";
5940 case ISD::SDIV: return "sdiv";
5941 case ISD::UDIV: return "udiv";
5942 case ISD::SREM: return "srem";
5943 case ISD::UREM: return "urem";
5944 case ISD::SMUL_LOHI: return "smul_lohi";
5945 case ISD::UMUL_LOHI: return "umul_lohi";
5946 case ISD::SDIVREM: return "sdivrem";
5947 case ISD::UDIVREM: return "udivrem";
5948 case ISD::AND: return "and";
5949 case ISD::OR: return "or";
5950 case ISD::XOR: return "xor";
5951 case ISD::SHL: return "shl";
5952 case ISD::SRA: return "sra";
5953 case ISD::SRL: return "srl";
5954 case ISD::ROTL: return "rotl";
5955 case ISD::ROTR: return "rotr";
5956 case ISD::FADD: return "fadd";
5957 case ISD::FSUB: return "fsub";
5958 case ISD::FMUL: return "fmul";
5959 case ISD::FDIV: return "fdiv";
5960 case ISD::FMA: return "fma";
5961 case ISD::FREM: return "frem";
5962 case ISD::FCOPYSIGN: return "fcopysign";
5963 case ISD::FGETSIGN: return "fgetsign";
5964 case ISD::FPOW: return "fpow";
5966 case ISD::FPOWI: return "fpowi";
5967 case ISD::SETCC: return "setcc";
5968 case ISD::VSETCC: return "vsetcc";
5969 case ISD::SELECT: return "select";
5970 case ISD::SELECT_CC: return "select_cc";
5971 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
5972 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
5973 case ISD::CONCAT_VECTORS: return "concat_vectors";
5974 case ISD::INSERT_SUBVECTOR: return "insert_subvector";
5975 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
5976 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
5977 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
5978 case ISD::CARRY_FALSE: return "carry_false";
5979 case ISD::ADDC: return "addc";
5980 case ISD::ADDE: return "adde";
5981 case ISD::SADDO: return "saddo";
5982 case ISD::UADDO: return "uaddo";
5983 case ISD::SSUBO: return "ssubo";
5984 case ISD::USUBO: return "usubo";
5985 case ISD::SMULO: return "smulo";
5986 case ISD::UMULO: return "umulo";
5987 case ISD::SUBC: return "subc";
5988 case ISD::SUBE: return "sube";
5989 case ISD::SHL_PARTS: return "shl_parts";
5990 case ISD::SRA_PARTS: return "sra_parts";
5991 case ISD::SRL_PARTS: return "srl_parts";
5993 // Conversion operators.
5994 case ISD::SIGN_EXTEND: return "sign_extend";
5995 case ISD::ZERO_EXTEND: return "zero_extend";
5996 case ISD::ANY_EXTEND: return "any_extend";
5997 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
5998 case ISD::TRUNCATE: return "truncate";
5999 case ISD::FP_ROUND: return "fp_round";
6000 case ISD::FLT_ROUNDS_: return "flt_rounds";
6001 case ISD::FP_ROUND_INREG: return "fp_round_inreg";
6002 case ISD::FP_EXTEND: return "fp_extend";
6004 case ISD::SINT_TO_FP: return "sint_to_fp";
6005 case ISD::UINT_TO_FP: return "uint_to_fp";
6006 case ISD::FP_TO_SINT: return "fp_to_sint";
6007 case ISD::FP_TO_UINT: return "fp_to_uint";
6008 case ISD::BITCAST: return "bitcast";
6009 case ISD::FP16_TO_FP32: return "fp16_to_fp32";
6010 case ISD::FP32_TO_FP16: return "fp32_to_fp16";
6012 case ISD::CONVERT_RNDSAT: {
6013 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) {
6014 default: llvm_unreachable("Unknown cvt code!");
6015 case ISD::CVT_FF: return "cvt_ff";
6016 case ISD::CVT_FS: return "cvt_fs";
6017 case ISD::CVT_FU: return "cvt_fu";
6018 case ISD::CVT_SF: return "cvt_sf";
6019 case ISD::CVT_UF: return "cvt_uf";
6020 case ISD::CVT_SS: return "cvt_ss";
6021 case ISD::CVT_SU: return "cvt_su";
6022 case ISD::CVT_US: return "cvt_us";
6023 case ISD::CVT_UU: return "cvt_uu";
6027 // Control flow instructions
6028 case ISD::BR: return "br";
6029 case ISD::BRIND: return "brind";
6030 case ISD::BR_JT: return "br_jt";
6031 case ISD::BRCOND: return "brcond";
6032 case ISD::BR_CC: return "br_cc";
6033 case ISD::CALLSEQ_START: return "callseq_start";
6034 case ISD::CALLSEQ_END: return "callseq_end";
6037 case ISD::LOAD: return "load";
6038 case ISD::STORE: return "store";
6039 case ISD::VAARG: return "vaarg";
6040 case ISD::VACOPY: return "vacopy";
6041 case ISD::VAEND: return "vaend";
6042 case ISD::VASTART: return "vastart";
6043 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
6044 case ISD::EXTRACT_ELEMENT: return "extract_element";
6045 case ISD::BUILD_PAIR: return "build_pair";
6046 case ISD::STACKSAVE: return "stacksave";
6047 case ISD::STACKRESTORE: return "stackrestore";
6048 case ISD::TRAP: return "trap";
6051 case ISD::BSWAP: return "bswap";
6052 case ISD::CTPOP: return "ctpop";
6053 case ISD::CTTZ: return "cttz";
6054 case ISD::CTLZ: return "ctlz";
6057 case ISD::TRAMPOLINE: return "trampoline";
6060 switch (cast<CondCodeSDNode>(this)->get()) {
6061 default: llvm_unreachable("Unknown setcc condition!");
6062 case ISD::SETOEQ: return "setoeq";
6063 case ISD::SETOGT: return "setogt";
6064 case ISD::SETOGE: return "setoge";
6065 case ISD::SETOLT: return "setolt";
6066 case ISD::SETOLE: return "setole";
6067 case ISD::SETONE: return "setone";
6069 case ISD::SETO: return "seto";
6070 case ISD::SETUO: return "setuo";
6071 case ISD::SETUEQ: return "setue";
6072 case ISD::SETUGT: return "setugt";
6073 case ISD::SETUGE: return "setuge";
6074 case ISD::SETULT: return "setult";
6075 case ISD::SETULE: return "setule";
6076 case ISD::SETUNE: return "setune";
6078 case ISD::SETEQ: return "seteq";
6079 case ISD::SETGT: return "setgt";
6080 case ISD::SETGE: return "setge";
6081 case ISD::SETLT: return "setlt";
6082 case ISD::SETLE: return "setle";
6083 case ISD::SETNE: return "setne";
6088 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
6097 return "<post-inc>";
6099 return "<post-dec>";
6103 std::string ISD::ArgFlagsTy::getArgFlagsString() {
6104 std::string S = "< ";
6118 if (getByValAlign())
6119 S += "byval-align:" + utostr(getByValAlign()) + " ";
6121 S += "orig-align:" + utostr(getOrigAlign()) + " ";
6123 S += "byval-size:" + utostr(getByValSize()) + " ";
6127 void SDNode::dump() const { dump(0); }
6128 void SDNode::dump(const SelectionDAG *G) const {
6133 void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const {
6134 OS << (void*)this << ": ";
6136 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
6138 if (getValueType(i) == MVT::Other)
6141 OS << getValueType(i).getEVTString();
6143 OS << " = " << getOperationName(G);
6146 void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const {
6147 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) {
6148 if (!MN->memoperands_empty()) {
6151 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(),
6152 e = MN->memoperands_end(); i != e; ++i) {
6154 if (llvm::next(i) != e)
6159 } else if (const ShuffleVectorSDNode *SVN =
6160 dyn_cast<ShuffleVectorSDNode>(this)) {
6162 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
6163 int Idx = SVN->getMaskElt(i);
6171 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
6172 OS << '<' << CSDN->getAPIntValue() << '>';
6173 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
6174 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle)
6175 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
6176 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble)
6177 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
6180 CSDN->getValueAPF().bitcastToAPInt().dump();
6183 } else if (const GlobalAddressSDNode *GADN =
6184 dyn_cast<GlobalAddressSDNode>(this)) {
6185 int64_t offset = GADN->getOffset();
6187 WriteAsOperand(OS, GADN->getGlobal());
6190 OS << " + " << offset;
6192 OS << " " << offset;
6193 if (unsigned int TF = GADN->getTargetFlags())
6194 OS << " [TF=" << TF << ']';
6195 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
6196 OS << "<" << FIDN->getIndex() << ">";
6197 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
6198 OS << "<" << JTDN->getIndex() << ">";
6199 if (unsigned int TF = JTDN->getTargetFlags())
6200 OS << " [TF=" << TF << ']';
6201 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
6202 int offset = CP->getOffset();
6203 if (CP->isMachineConstantPoolEntry())
6204 OS << "<" << *CP->getMachineCPVal() << ">";
6206 OS << "<" << *CP->getConstVal() << ">";
6208 OS << " + " << offset;
6210 OS << " " << offset;
6211 if (unsigned int TF = CP->getTargetFlags())
6212 OS << " [TF=" << TF << ']';
6213 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
6215 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
6217 OS << LBB->getName() << " ";
6218 OS << (const void*)BBDN->getBasicBlock() << ">";
6219 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
6220 OS << ' ' << PrintReg(R->getReg(), G ? G->getTarget().getRegisterInfo() :0);
6221 } else if (const ExternalSymbolSDNode *ES =
6222 dyn_cast<ExternalSymbolSDNode>(this)) {
6223 OS << "'" << ES->getSymbol() << "'";
6224 if (unsigned int TF = ES->getTargetFlags())
6225 OS << " [TF=" << TF << ']';
6226 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
6228 OS << "<" << M->getValue() << ">";
6231 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) {
6233 OS << "<" << MD->getMD() << ">";
6236 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
6237 OS << ":" << N->getVT().getEVTString();
6239 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
6240 OS << "<" << *LD->getMemOperand();
6243 switch (LD->getExtensionType()) {
6244 default: doExt = false; break;
6245 case ISD::EXTLOAD: OS << ", anyext"; break;
6246 case ISD::SEXTLOAD: OS << ", sext"; break;
6247 case ISD::ZEXTLOAD: OS << ", zext"; break;
6250 OS << " from " << LD->getMemoryVT().getEVTString();
6252 const char *AM = getIndexedModeName(LD->getAddressingMode());
6257 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
6258 OS << "<" << *ST->getMemOperand();
6260 if (ST->isTruncatingStore())
6261 OS << ", trunc to " << ST->getMemoryVT().getEVTString();
6263 const char *AM = getIndexedModeName(ST->getAddressingMode());
6268 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) {
6269 OS << "<" << *M->getMemOperand() << ">";
6270 } else if (const BlockAddressSDNode *BA =
6271 dyn_cast<BlockAddressSDNode>(this)) {
6273 WriteAsOperand(OS, BA->getBlockAddress()->getFunction(), false);
6275 WriteAsOperand(OS, BA->getBlockAddress()->getBasicBlock(), false);
6277 if (unsigned int TF = BA->getTargetFlags())
6278 OS << " [TF=" << TF << ']';
6282 if (unsigned Order = G->GetOrdering(this))
6283 OS << " [ORD=" << Order << ']';
6285 if (getNodeId() != -1)
6286 OS << " [ID=" << getNodeId() << ']';
6288 DebugLoc dl = getDebugLoc();
6289 if (G && !dl.isUnknown()) {
6291 Scope(dl.getScope(G->getMachineFunction().getFunction()->getContext()));
6293 // Omit the directory, since it's usually long and uninteresting.
6295 OS << Scope.getFilename();
6298 OS << ':' << dl.getLine();
6299 if (dl.getCol() != 0)
6300 OS << ':' << dl.getCol();
6304 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
6306 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
6307 if (i) OS << ", "; else OS << " ";
6308 OS << (void*)getOperand(i).getNode();
6309 if (unsigned RN = getOperand(i).getResNo())
6312 print_details(OS, G);
6315 static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N,
6316 const SelectionDAG *G, unsigned depth,
6329 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6330 // Don't follow chain operands.
6331 if (N->getOperand(i).getValueType() == MVT::Other)
6334 printrWithDepthHelper(OS, N->getOperand(i).getNode(), G, depth-1, indent+2);
6338 void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G,
6339 unsigned depth) const {
6340 printrWithDepthHelper(OS, this, G, depth, 0);
6343 void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const {
6344 // Don't print impossibly deep things.
6345 printrWithDepth(OS, G, 10);
6348 void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const {
6349 printrWithDepth(dbgs(), G, depth);
6352 void SDNode::dumprFull(const SelectionDAG *G) const {
6353 // Don't print impossibly deep things.
6354 dumprWithDepth(G, 10);
6357 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
6358 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6359 if (N->getOperand(i).getNode()->hasOneUse())
6360 DumpNodes(N->getOperand(i).getNode(), indent+2, G);
6362 dbgs() << "\n" << std::string(indent+2, ' ')
6363 << (void*)N->getOperand(i).getNode() << ": <multiple use>";
6367 dbgs().indent(indent);
6371 SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
6372 assert(N->getNumValues() == 1 &&
6373 "Can't unroll a vector with multiple results!");
6375 EVT VT = N->getValueType(0);
6376 unsigned NE = VT.getVectorNumElements();
6377 EVT EltVT = VT.getVectorElementType();
6378 DebugLoc dl = N->getDebugLoc();
6380 SmallVector<SDValue, 8> Scalars;
6381 SmallVector<SDValue, 4> Operands(N->getNumOperands());
6383 // If ResNE is 0, fully unroll the vector op.
6386 else if (NE > ResNE)
6390 for (i= 0; i != NE; ++i) {
6391 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) {
6392 SDValue Operand = N->getOperand(j);
6393 EVT OperandVT = Operand.getValueType();
6394 if (OperandVT.isVector()) {
6395 // A vector operand; extract a single element.
6396 EVT OperandEltVT = OperandVT.getVectorElementType();
6397 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl,
6400 getConstant(i, TLI.getPointerTy()));
6402 // A scalar operand; just use it as is.
6403 Operands[j] = Operand;
6407 switch (N->getOpcode()) {
6409 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6410 &Operands[0], Operands.size()));
6417 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0],
6418 getShiftAmountOperand(Operands[0].getValueType(),
6421 case ISD::SIGN_EXTEND_INREG:
6422 case ISD::FP_ROUND_INREG: {
6423 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType();
6424 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6426 getValueType(ExtVT)));
6431 for (; i < ResNE; ++i)
6432 Scalars.push_back(getUNDEF(EltVT));
6434 return getNode(ISD::BUILD_VECTOR, dl,
6435 EVT::getVectorVT(*getContext(), EltVT, ResNE),
6436 &Scalars[0], Scalars.size());
6440 /// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a
6441 /// location that is 'Dist' units away from the location that the 'Base' load
6442 /// is loading from.
6443 bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base,
6444 unsigned Bytes, int Dist) const {
6445 if (LD->getChain() != Base->getChain())
6447 EVT VT = LD->getValueType(0);
6448 if (VT.getSizeInBits() / 8 != Bytes)
6451 SDValue Loc = LD->getOperand(1);
6452 SDValue BaseLoc = Base->getOperand(1);
6453 if (Loc.getOpcode() == ISD::FrameIndex) {
6454 if (BaseLoc.getOpcode() != ISD::FrameIndex)
6456 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo();
6457 int FI = cast<FrameIndexSDNode>(Loc)->getIndex();
6458 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex();
6459 int FS = MFI->getObjectSize(FI);
6460 int BFS = MFI->getObjectSize(BFI);
6461 if (FS != BFS || FS != (int)Bytes) return false;
6462 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes);
6466 if (isBaseWithConstantOffset(Loc) && Loc.getOperand(0) == BaseLoc &&
6467 cast<ConstantSDNode>(Loc.getOperand(1))->getSExtValue() == Dist*Bytes)
6470 const GlobalValue *GV1 = NULL;
6471 const GlobalValue *GV2 = NULL;
6472 int64_t Offset1 = 0;
6473 int64_t Offset2 = 0;
6474 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1);
6475 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2);
6476 if (isGA1 && isGA2 && GV1 == GV2)
6477 return Offset1 == (Offset2 + Dist*Bytes);
6482 /// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if
6483 /// it cannot be inferred.
6484 unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const {
6485 // If this is a GlobalAddress + cst, return the alignment.
6486 const GlobalValue *GV;
6487 int64_t GVOffset = 0;
6488 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) {
6489 // If GV has specified alignment, then use it. Otherwise, use the preferred
6491 unsigned Align = GV->getAlignment();
6493 if (const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV)) {
6494 if (GVar->hasInitializer()) {
6495 const TargetData *TD = TLI.getTargetData();
6496 Align = TD->getPreferredAlignment(GVar);
6500 return MinAlign(Align, GVOffset);
6503 // If this is a direct reference to a stack slot, use information about the
6504 // stack slot's alignment.
6505 int FrameIdx = 1 << 31;
6506 int64_t FrameOffset = 0;
6507 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) {
6508 FrameIdx = FI->getIndex();
6509 } else if (isBaseWithConstantOffset(Ptr) &&
6510 isa<FrameIndexSDNode>(Ptr.getOperand(0))) {
6512 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
6513 FrameOffset = Ptr.getConstantOperandVal(1);
6516 if (FrameIdx != (1 << 31)) {
6517 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo();
6518 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx),
6526 void SelectionDAG::dump() const {
6527 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:";
6529 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end();
6531 const SDNode *N = I;
6532 if (!N->hasOneUse() && N != getRoot().getNode())
6533 DumpNodes(N, 2, this);
6536 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
6541 void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
6543 print_details(OS, G);
6546 typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet;
6547 static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
6548 const SelectionDAG *G, VisitedSDNodeSet &once) {
6549 if (!once.insert(N)) // If we've been here before, return now.
6552 // Dump the current SDNode, but don't end the line yet.
6553 OS << std::string(indent, ' ');
6556 // Having printed this SDNode, walk the children:
6557 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6558 const SDNode *child = N->getOperand(i).getNode();
6563 if (child->getNumOperands() == 0) {
6564 // This child has no grandchildren; print it inline right here.
6565 child->printr(OS, G);
6567 } else { // Just the address. FIXME: also print the child's opcode.
6569 if (unsigned RN = N->getOperand(i).getResNo())
6576 // Dump children that have grandchildren on their own line(s).
6577 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6578 const SDNode *child = N->getOperand(i).getNode();
6579 DumpNodesr(OS, child, indent+2, G, once);
6583 void SDNode::dumpr() const {
6584 VisitedSDNodeSet once;
6585 DumpNodesr(dbgs(), this, 0, 0, once);
6588 void SDNode::dumpr(const SelectionDAG *G) const {
6589 VisitedSDNodeSet once;
6590 DumpNodesr(dbgs(), this, 0, G, once);
6594 // getAddressSpace - Return the address space this GlobalAddress belongs to.
6595 unsigned GlobalAddressSDNode::getAddressSpace() const {
6596 return getGlobal()->getType()->getAddressSpace();
6600 Type *ConstantPoolSDNode::getType() const {
6601 if (isMachineConstantPoolEntry())
6602 return Val.MachineCPVal->getType();
6603 return Val.ConstVal->getType();
6606 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
6608 unsigned &SplatBitSize,
6610 unsigned MinSplatBits,
6612 EVT VT = getValueType(0);
6613 assert(VT.isVector() && "Expected a vector type");
6614 unsigned sz = VT.getSizeInBits();
6615 if (MinSplatBits > sz)
6618 SplatValue = APInt(sz, 0);
6619 SplatUndef = APInt(sz, 0);
6621 // Get the bits. Bits with undefined values (when the corresponding element
6622 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
6623 // in SplatValue. If any of the values are not constant, give up and return
6625 unsigned int nOps = getNumOperands();
6626 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
6627 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
6629 for (unsigned j = 0; j < nOps; ++j) {
6630 unsigned i = isBigEndian ? nOps-1-j : j;
6631 SDValue OpVal = getOperand(i);
6632 unsigned BitPos = j * EltBitSize;
6634 if (OpVal.getOpcode() == ISD::UNDEF)
6635 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize);
6636 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
6637 SplatValue |= CN->getAPIntValue().zextOrTrunc(EltBitSize).
6638 zextOrTrunc(sz) << BitPos;
6639 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
6640 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
6645 // The build_vector is all constants or undefs. Find the smallest element
6646 // size that splats the vector.
6648 HasAnyUndefs = (SplatUndef != 0);
6651 unsigned HalfSize = sz / 2;
6652 APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize);
6653 APInt LowValue = SplatValue.trunc(HalfSize);
6654 APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize);
6655 APInt LowUndef = SplatUndef.trunc(HalfSize);
6657 // If the two halves do not match (ignoring undef bits), stop here.
6658 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
6659 MinSplatBits > HalfSize)
6662 SplatValue = HighValue | LowValue;
6663 SplatUndef = HighUndef & LowUndef;
6672 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
6673 // Find the first non-undef value in the shuffle mask.
6675 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
6678 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
6680 // Make sure all remaining elements are either undef or the same as the first
6682 for (int Idx = Mask[i]; i != e; ++i)
6683 if (Mask[i] >= 0 && Mask[i] != Idx)
6689 static void checkForCyclesHelper(const SDNode *N,
6690 SmallPtrSet<const SDNode*, 32> &Visited,
6691 SmallPtrSet<const SDNode*, 32> &Checked) {
6692 // If this node has already been checked, don't check it again.
6693 if (Checked.count(N))
6696 // If a node has already been visited on this depth-first walk, reject it as
6698 if (!Visited.insert(N)) {
6699 dbgs() << "Offending node:\n";
6701 errs() << "Detected cycle in SelectionDAG\n";
6705 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6706 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked);
6713 void llvm::checkForCycles(const llvm::SDNode *N) {
6715 assert(N && "Checking nonexistant SDNode");
6716 SmallPtrSet<const SDNode*, 32> visited;
6717 SmallPtrSet<const SDNode*, 32> checked;
6718 checkForCyclesHelper(N, visited, checked);
6722 void llvm::checkForCycles(const llvm::SelectionDAG *DAG) {
6723 checkForCycles(DAG->getRoot().getNode());