1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "SDNodeOrdering.h"
16 #include "SDNodeDbgValue.h"
17 #include "llvm/Constants.h"
18 #include "llvm/Analysis/DebugInfo.h"
19 #include "llvm/Analysis/ValueTracking.h"
20 #include "llvm/Function.h"
21 #include "llvm/GlobalAlias.h"
22 #include "llvm/GlobalVariable.h"
23 #include "llvm/Intrinsics.h"
24 #include "llvm/DerivedTypes.h"
25 #include "llvm/Assembly/Writer.h"
26 #include "llvm/CallingConv.h"
27 #include "llvm/CodeGen/MachineBasicBlock.h"
28 #include "llvm/CodeGen/MachineConstantPool.h"
29 #include "llvm/CodeGen/MachineFrameInfo.h"
30 #include "llvm/CodeGen/MachineModuleInfo.h"
31 #include "llvm/CodeGen/PseudoSourceValue.h"
32 #include "llvm/Target/TargetRegisterInfo.h"
33 #include "llvm/Target/TargetData.h"
34 #include "llvm/Target/TargetLowering.h"
35 #include "llvm/Target/TargetSelectionDAGInfo.h"
36 #include "llvm/Target/TargetOptions.h"
37 #include "llvm/Target/TargetInstrInfo.h"
38 #include "llvm/Target/TargetIntrinsicInfo.h"
39 #include "llvm/Target/TargetMachine.h"
40 #include "llvm/Support/CommandLine.h"
41 #include "llvm/Support/Debug.h"
42 #include "llvm/Support/ErrorHandling.h"
43 #include "llvm/Support/ManagedStatic.h"
44 #include "llvm/Support/MathExtras.h"
45 #include "llvm/Support/raw_ostream.h"
46 #include "llvm/Support/Mutex.h"
47 #include "llvm/ADT/SetVector.h"
48 #include "llvm/ADT/SmallPtrSet.h"
49 #include "llvm/ADT/SmallSet.h"
50 #include "llvm/ADT/SmallVector.h"
51 #include "llvm/ADT/StringExtras.h"
56 /// makeVTList - Return an instance of the SDVTList struct initialized with the
57 /// specified members.
58 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
59 SDVTList Res = {VTs, NumVTs};
63 static const fltSemantics *EVTToAPFloatSemantics(EVT VT) {
64 switch (VT.getSimpleVT().SimpleTy) {
65 default: llvm_unreachable("Unknown FP format");
66 case MVT::f32: return &APFloat::IEEEsingle;
67 case MVT::f64: return &APFloat::IEEEdouble;
68 case MVT::f80: return &APFloat::x87DoubleExtended;
69 case MVT::f128: return &APFloat::IEEEquad;
70 case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
74 SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {}
76 //===----------------------------------------------------------------------===//
77 // ConstantFPSDNode Class
78 //===----------------------------------------------------------------------===//
80 /// isExactlyValue - We don't rely on operator== working on double values, as
81 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
82 /// As such, this method can be used to do an exact bit-for-bit comparison of
83 /// two floating point values.
84 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
85 return getValueAPF().bitwiseIsEqual(V);
88 bool ConstantFPSDNode::isValueValidForType(EVT VT,
90 assert(VT.isFloatingPoint() && "Can only convert between FP types");
92 // PPC long double cannot be converted to any other type.
93 if (VT == MVT::ppcf128 ||
94 &Val.getSemantics() == &APFloat::PPCDoubleDouble)
97 // convert modifies in place, so make a copy.
98 APFloat Val2 = APFloat(Val);
100 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
105 //===----------------------------------------------------------------------===//
107 //===----------------------------------------------------------------------===//
109 /// isBuildVectorAllOnes - Return true if the specified node is a
110 /// BUILD_VECTOR where all of the elements are ~0 or undef.
111 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
112 // Look through a bit convert.
113 if (N->getOpcode() == ISD::BITCAST)
114 N = N->getOperand(0).getNode();
116 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
118 unsigned i = 0, e = N->getNumOperands();
120 // Skip over all of the undef values.
121 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
124 // Do not accept an all-undef vector.
125 if (i == e) return false;
127 // Do not accept build_vectors that aren't all constants or which have non-~0
129 SDValue NotZero = N->getOperand(i);
130 if (isa<ConstantSDNode>(NotZero)) {
131 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue())
133 } else if (isa<ConstantFPSDNode>(NotZero)) {
134 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF().
135 bitcastToAPInt().isAllOnesValue())
140 // Okay, we have at least one ~0 value, check to see if the rest match or are
142 for (++i; i != e; ++i)
143 if (N->getOperand(i) != NotZero &&
144 N->getOperand(i).getOpcode() != ISD::UNDEF)
150 /// isBuildVectorAllZeros - Return true if the specified node is a
151 /// BUILD_VECTOR where all of the elements are 0 or undef.
152 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
153 // Look through a bit convert.
154 if (N->getOpcode() == ISD::BITCAST)
155 N = N->getOperand(0).getNode();
157 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
159 unsigned i = 0, e = N->getNumOperands();
161 // Skip over all of the undef values.
162 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
165 // Do not accept an all-undef vector.
166 if (i == e) return false;
168 // Do not accept build_vectors that aren't all constants or which have non-0
170 SDValue Zero = N->getOperand(i);
171 if (isa<ConstantSDNode>(Zero)) {
172 if (!cast<ConstantSDNode>(Zero)->isNullValue())
174 } else if (isa<ConstantFPSDNode>(Zero)) {
175 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero())
180 // Okay, we have at least one 0 value, check to see if the rest match or are
182 for (++i; i != e; ++i)
183 if (N->getOperand(i) != Zero &&
184 N->getOperand(i).getOpcode() != ISD::UNDEF)
189 /// isScalarToVector - Return true if the specified node is a
190 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
191 /// element is not an undef.
192 bool ISD::isScalarToVector(const SDNode *N) {
193 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
196 if (N->getOpcode() != ISD::BUILD_VECTOR)
198 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
200 unsigned NumElems = N->getNumOperands();
203 for (unsigned i = 1; i < NumElems; ++i) {
204 SDValue V = N->getOperand(i);
205 if (V.getOpcode() != ISD::UNDEF)
211 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
212 /// when given the operation for (X op Y).
213 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
214 // To perform this operation, we just need to swap the L and G bits of the
216 unsigned OldL = (Operation >> 2) & 1;
217 unsigned OldG = (Operation >> 1) & 1;
218 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
219 (OldL << 1) | // New G bit
220 (OldG << 2)); // New L bit.
223 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
224 /// 'op' is a valid SetCC operation.
225 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
226 unsigned Operation = Op;
228 Operation ^= 7; // Flip L, G, E bits, but not U.
230 Operation ^= 15; // Flip all of the condition bits.
232 if (Operation > ISD::SETTRUE2)
233 Operation &= ~8; // Don't let N and U bits get set.
235 return ISD::CondCode(Operation);
239 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
240 /// signed operation and 2 if the result is an unsigned comparison. Return zero
241 /// if the operation does not depend on the sign of the input (setne and seteq).
242 static int isSignedOp(ISD::CondCode Opcode) {
244 default: llvm_unreachable("Illegal integer setcc operation!");
246 case ISD::SETNE: return 0;
250 case ISD::SETGE: return 1;
254 case ISD::SETUGE: return 2;
258 /// getSetCCOrOperation - Return the result of a logical OR between different
259 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
260 /// returns SETCC_INVALID if it is not possible to represent the resultant
262 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
264 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
265 // Cannot fold a signed integer setcc with an unsigned integer setcc.
266 return ISD::SETCC_INVALID;
268 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
270 // If the N and U bits get set then the resultant comparison DOES suddenly
271 // care about orderedness, and is true when ordered.
272 if (Op > ISD::SETTRUE2)
273 Op &= ~16; // Clear the U bit if the N bit is set.
275 // Canonicalize illegal integer setcc's.
276 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
279 return ISD::CondCode(Op);
282 /// getSetCCAndOperation - Return the result of a logical AND between different
283 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
284 /// function returns zero if it is not possible to represent the resultant
286 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
288 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
289 // Cannot fold a signed setcc with an unsigned setcc.
290 return ISD::SETCC_INVALID;
292 // Combine all of the condition bits.
293 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
295 // Canonicalize illegal integer setcc's.
299 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
300 case ISD::SETOEQ: // SETEQ & SETU[LG]E
301 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
302 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
303 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
310 //===----------------------------------------------------------------------===//
311 // SDNode Profile Support
312 //===----------------------------------------------------------------------===//
314 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
316 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
320 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
321 /// solely with their pointer.
322 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
323 ID.AddPointer(VTList.VTs);
326 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
328 static void AddNodeIDOperands(FoldingSetNodeID &ID,
329 const SDValue *Ops, unsigned NumOps) {
330 for (; NumOps; --NumOps, ++Ops) {
331 ID.AddPointer(Ops->getNode());
332 ID.AddInteger(Ops->getResNo());
336 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
338 static void AddNodeIDOperands(FoldingSetNodeID &ID,
339 const SDUse *Ops, unsigned NumOps) {
340 for (; NumOps; --NumOps, ++Ops) {
341 ID.AddPointer(Ops->getNode());
342 ID.AddInteger(Ops->getResNo());
346 static void AddNodeIDNode(FoldingSetNodeID &ID,
347 unsigned short OpC, SDVTList VTList,
348 const SDValue *OpList, unsigned N) {
349 AddNodeIDOpcode(ID, OpC);
350 AddNodeIDValueTypes(ID, VTList);
351 AddNodeIDOperands(ID, OpList, N);
354 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
356 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
357 switch (N->getOpcode()) {
358 case ISD::TargetExternalSymbol:
359 case ISD::ExternalSymbol:
360 llvm_unreachable("Should only be used on nodes with operands");
361 default: break; // Normal nodes don't need extra info.
362 case ISD::TargetConstant:
364 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
366 case ISD::TargetConstantFP:
367 case ISD::ConstantFP: {
368 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
371 case ISD::TargetGlobalAddress:
372 case ISD::GlobalAddress:
373 case ISD::TargetGlobalTLSAddress:
374 case ISD::GlobalTLSAddress: {
375 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
376 ID.AddPointer(GA->getGlobal());
377 ID.AddInteger(GA->getOffset());
378 ID.AddInteger(GA->getTargetFlags());
381 case ISD::BasicBlock:
382 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
385 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
389 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
391 case ISD::FrameIndex:
392 case ISD::TargetFrameIndex:
393 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
396 case ISD::TargetJumpTable:
397 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
398 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
400 case ISD::ConstantPool:
401 case ISD::TargetConstantPool: {
402 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
403 ID.AddInteger(CP->getAlignment());
404 ID.AddInteger(CP->getOffset());
405 if (CP->isMachineConstantPoolEntry())
406 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID);
408 ID.AddPointer(CP->getConstVal());
409 ID.AddInteger(CP->getTargetFlags());
413 const LoadSDNode *LD = cast<LoadSDNode>(N);
414 ID.AddInteger(LD->getMemoryVT().getRawBits());
415 ID.AddInteger(LD->getRawSubclassData());
419 const StoreSDNode *ST = cast<StoreSDNode>(N);
420 ID.AddInteger(ST->getMemoryVT().getRawBits());
421 ID.AddInteger(ST->getRawSubclassData());
424 case ISD::ATOMIC_CMP_SWAP:
425 case ISD::ATOMIC_SWAP:
426 case ISD::ATOMIC_LOAD_ADD:
427 case ISD::ATOMIC_LOAD_SUB:
428 case ISD::ATOMIC_LOAD_AND:
429 case ISD::ATOMIC_LOAD_OR:
430 case ISD::ATOMIC_LOAD_XOR:
431 case ISD::ATOMIC_LOAD_NAND:
432 case ISD::ATOMIC_LOAD_MIN:
433 case ISD::ATOMIC_LOAD_MAX:
434 case ISD::ATOMIC_LOAD_UMIN:
435 case ISD::ATOMIC_LOAD_UMAX:
436 case ISD::ATOMIC_LOAD:
437 case ISD::ATOMIC_STORE: {
438 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
439 ID.AddInteger(AT->getMemoryVT().getRawBits());
440 ID.AddInteger(AT->getRawSubclassData());
443 case ISD::VECTOR_SHUFFLE: {
444 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
445 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
447 ID.AddInteger(SVN->getMaskElt(i));
450 case ISD::TargetBlockAddress:
451 case ISD::BlockAddress: {
452 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress());
453 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags());
456 } // end switch (N->getOpcode())
459 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
461 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
462 AddNodeIDOpcode(ID, N->getOpcode());
463 // Add the return value info.
464 AddNodeIDValueTypes(ID, N->getVTList());
465 // Add the operand info.
466 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
468 // Handle SDNode leafs with special info.
469 AddNodeIDCustom(ID, N);
472 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
473 /// the CSE map that carries volatility, temporalness, indexing mode, and
474 /// extension/truncation information.
476 static inline unsigned
477 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile,
478 bool isNonTemporal) {
479 assert((ConvType & 3) == ConvType &&
480 "ConvType may not require more than 2 bits!");
481 assert((AM & 7) == AM &&
482 "AM may not require more than 3 bits!");
486 (isNonTemporal << 6);
489 //===----------------------------------------------------------------------===//
490 // SelectionDAG Class
491 //===----------------------------------------------------------------------===//
493 /// doNotCSE - Return true if CSE should not be performed for this node.
494 static bool doNotCSE(SDNode *N) {
495 if (N->getValueType(0) == MVT::Glue)
496 return true; // Never CSE anything that produces a flag.
498 switch (N->getOpcode()) {
500 case ISD::HANDLENODE:
502 return true; // Never CSE these nodes.
505 // Check that remaining values produced are not flags.
506 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
507 if (N->getValueType(i) == MVT::Glue)
508 return true; // Never CSE anything that produces a flag.
513 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
515 void SelectionDAG::RemoveDeadNodes() {
516 // Create a dummy node (which is not added to allnodes), that adds a reference
517 // to the root node, preventing it from being deleted.
518 HandleSDNode Dummy(getRoot());
520 SmallVector<SDNode*, 128> DeadNodes;
522 // Add all obviously-dead nodes to the DeadNodes worklist.
523 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
525 DeadNodes.push_back(I);
527 RemoveDeadNodes(DeadNodes);
529 // If the root changed (e.g. it was a dead load, update the root).
530 setRoot(Dummy.getValue());
533 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
534 /// given list, and any nodes that become unreachable as a result.
535 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes,
536 DAGUpdateListener *UpdateListener) {
538 // Process the worklist, deleting the nodes and adding their uses to the
540 while (!DeadNodes.empty()) {
541 SDNode *N = DeadNodes.pop_back_val();
544 UpdateListener->NodeDeleted(N, 0);
546 // Take the node out of the appropriate CSE map.
547 RemoveNodeFromCSEMaps(N);
549 // Next, brutally remove the operand list. This is safe to do, as there are
550 // no cycles in the graph.
551 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
553 SDNode *Operand = Use.getNode();
556 // Now that we removed this operand, see if there are no uses of it left.
557 if (Operand->use_empty())
558 DeadNodes.push_back(Operand);
565 void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){
566 SmallVector<SDNode*, 16> DeadNodes(1, N);
567 RemoveDeadNodes(DeadNodes, UpdateListener);
570 void SelectionDAG::DeleteNode(SDNode *N) {
571 // First take this out of the appropriate CSE map.
572 RemoveNodeFromCSEMaps(N);
574 // Finally, remove uses due to operands of this node, remove from the
575 // AllNodes list, and delete the node.
576 DeleteNodeNotInCSEMaps(N);
579 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
580 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
581 assert(N->use_empty() && "Cannot delete a node that is not dead!");
583 // Drop all of the operands and decrement used node's use counts.
589 void SelectionDAG::DeallocateNode(SDNode *N) {
590 if (N->OperandsNeedDelete)
591 delete[] N->OperandList;
593 // Set the opcode to DELETED_NODE to help catch bugs when node
594 // memory is reallocated.
595 N->NodeType = ISD::DELETED_NODE;
597 NodeAllocator.Deallocate(AllNodes.remove(N));
599 // Remove the ordering of this node.
602 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them.
603 ArrayRef<SDDbgValue*> DbgVals = DbgInfo->getSDDbgValues(N);
604 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i)
605 DbgVals[i]->setIsInvalidated();
608 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
609 /// correspond to it. This is useful when we're about to delete or repurpose
610 /// the node. We don't want future request for structurally identical nodes
611 /// to return N anymore.
612 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
614 switch (N->getOpcode()) {
615 case ISD::HANDLENODE: return false; // noop.
617 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
618 "Cond code doesn't exist!");
619 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
620 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
622 case ISD::ExternalSymbol:
623 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
625 case ISD::TargetExternalSymbol: {
626 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
627 Erased = TargetExternalSymbols.erase(
628 std::pair<std::string,unsigned char>(ESN->getSymbol(),
629 ESN->getTargetFlags()));
632 case ISD::VALUETYPE: {
633 EVT VT = cast<VTSDNode>(N)->getVT();
634 if (VT.isExtended()) {
635 Erased = ExtendedValueTypeNodes.erase(VT);
637 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0;
638 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0;
643 // Remove it from the CSE Map.
644 assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!");
645 assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!");
646 Erased = CSEMap.RemoveNode(N);
650 // Verify that the node was actually in one of the CSE maps, unless it has a
651 // flag result (which cannot be CSE'd) or is one of the special cases that are
652 // not subject to CSE.
653 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue &&
654 !N->isMachineOpcode() && !doNotCSE(N)) {
657 llvm_unreachable("Node is not in map!");
663 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
664 /// maps and modified in place. Add it back to the CSE maps, unless an identical
665 /// node already exists, in which case transfer all its users to the existing
666 /// node. This transfer can potentially trigger recursive merging.
669 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N,
670 DAGUpdateListener *UpdateListener) {
671 // For node types that aren't CSE'd, just act as if no identical node
674 SDNode *Existing = CSEMap.GetOrInsertNode(N);
676 // If there was already an existing matching node, use ReplaceAllUsesWith
677 // to replace the dead one with the existing one. This can cause
678 // recursive merging of other unrelated nodes down the line.
679 ReplaceAllUsesWith(N, Existing, UpdateListener);
681 // N is now dead. Inform the listener if it exists and delete it.
683 UpdateListener->NodeDeleted(N, Existing);
684 DeleteNodeNotInCSEMaps(N);
689 // If the node doesn't already exist, we updated it. Inform a listener if
692 UpdateListener->NodeUpdated(N);
695 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
696 /// were replaced with those specified. If this node is never memoized,
697 /// return null, otherwise return a pointer to the slot it would take. If a
698 /// node already exists with these operands, the slot will be non-null.
699 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
704 SDValue Ops[] = { Op };
706 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
707 AddNodeIDCustom(ID, N);
708 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
712 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
713 /// were replaced with those specified. If this node is never memoized,
714 /// return null, otherwise return a pointer to the slot it would take. If a
715 /// node already exists with these operands, the slot will be non-null.
716 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
717 SDValue Op1, SDValue Op2,
722 SDValue Ops[] = { Op1, Op2 };
724 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
725 AddNodeIDCustom(ID, N);
726 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
731 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
732 /// were replaced with those specified. If this node is never memoized,
733 /// return null, otherwise return a pointer to the slot it would take. If a
734 /// node already exists with these operands, the slot will be non-null.
735 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
736 const SDValue *Ops,unsigned NumOps,
742 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
743 AddNodeIDCustom(ID, N);
744 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
749 /// VerifyNodeCommon - Sanity check the given node. Aborts if it is invalid.
750 static void VerifyNodeCommon(SDNode *N) {
751 switch (N->getOpcode()) {
754 case ISD::BUILD_PAIR: {
755 EVT VT = N->getValueType(0);
756 assert(N->getNumValues() == 1 && "Too many results!");
757 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
758 "Wrong return type!");
759 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
760 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
761 "Mismatched operand types!");
762 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
763 "Wrong operand type!");
764 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
765 "Wrong return type size");
768 case ISD::BUILD_VECTOR: {
769 assert(N->getNumValues() == 1 && "Too many results!");
770 assert(N->getValueType(0).isVector() && "Wrong return type!");
771 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
772 "Wrong number of operands!");
773 EVT EltVT = N->getValueType(0).getVectorElementType();
774 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I)
775 assert((I->getValueType() == EltVT ||
776 (EltVT.isInteger() && I->getValueType().isInteger() &&
777 EltVT.bitsLE(I->getValueType()))) &&
778 "Wrong operand type!");
784 /// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid.
785 static void VerifySDNode(SDNode *N) {
786 // The SDNode allocators cannot be used to allocate nodes with fields that are
787 // not present in an SDNode!
788 assert(!isa<MemSDNode>(N) && "Bad MemSDNode!");
789 assert(!isa<ShuffleVectorSDNode>(N) && "Bad ShuffleVectorSDNode!");
790 assert(!isa<ConstantSDNode>(N) && "Bad ConstantSDNode!");
791 assert(!isa<ConstantFPSDNode>(N) && "Bad ConstantFPSDNode!");
792 assert(!isa<GlobalAddressSDNode>(N) && "Bad GlobalAddressSDNode!");
793 assert(!isa<FrameIndexSDNode>(N) && "Bad FrameIndexSDNode!");
794 assert(!isa<JumpTableSDNode>(N) && "Bad JumpTableSDNode!");
795 assert(!isa<ConstantPoolSDNode>(N) && "Bad ConstantPoolSDNode!");
796 assert(!isa<BasicBlockSDNode>(N) && "Bad BasicBlockSDNode!");
797 assert(!isa<SrcValueSDNode>(N) && "Bad SrcValueSDNode!");
798 assert(!isa<MDNodeSDNode>(N) && "Bad MDNodeSDNode!");
799 assert(!isa<RegisterSDNode>(N) && "Bad RegisterSDNode!");
800 assert(!isa<BlockAddressSDNode>(N) && "Bad BlockAddressSDNode!");
801 assert(!isa<EHLabelSDNode>(N) && "Bad EHLabelSDNode!");
802 assert(!isa<ExternalSymbolSDNode>(N) && "Bad ExternalSymbolSDNode!");
803 assert(!isa<CondCodeSDNode>(N) && "Bad CondCodeSDNode!");
804 assert(!isa<CvtRndSatSDNode>(N) && "Bad CvtRndSatSDNode!");
805 assert(!isa<VTSDNode>(N) && "Bad VTSDNode!");
806 assert(!isa<MachineSDNode>(N) && "Bad MachineSDNode!");
811 /// VerifyMachineNode - Sanity check the given MachineNode. Aborts if it is
813 static void VerifyMachineNode(SDNode *N) {
814 // The MachineNode allocators cannot be used to allocate nodes with fields
815 // that are not present in a MachineNode!
816 // Currently there are no such nodes.
822 /// getEVTAlignment - Compute the default alignment value for the
825 unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
826 Type *Ty = VT == MVT::iPTR ?
827 PointerType::get(Type::getInt8Ty(*getContext()), 0) :
828 VT.getTypeForEVT(*getContext());
830 return TLI.getTargetData()->getABITypeAlignment(Ty);
833 // EntryNode could meaningfully have debug info if we can find it...
834 SelectionDAG::SelectionDAG(const TargetMachine &tm)
835 : TM(tm), TLI(*tm.getTargetLowering()), TSI(*tm.getSelectionDAGInfo()),
836 EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Other)),
837 Root(getEntryNode()), Ordering(0) {
838 AllNodes.push_back(&EntryNode);
839 Ordering = new SDNodeOrdering();
840 DbgInfo = new SDDbgInfo();
843 void SelectionDAG::init(MachineFunction &mf) {
845 Context = &mf.getFunction()->getContext();
848 SelectionDAG::~SelectionDAG() {
854 void SelectionDAG::allnodes_clear() {
855 assert(&*AllNodes.begin() == &EntryNode);
856 AllNodes.remove(AllNodes.begin());
857 while (!AllNodes.empty())
858 DeallocateNode(AllNodes.begin());
861 void SelectionDAG::clear() {
863 OperandAllocator.Reset();
866 ExtendedValueTypeNodes.clear();
867 ExternalSymbols.clear();
868 TargetExternalSymbols.clear();
869 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
870 static_cast<CondCodeSDNode*>(0));
871 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
872 static_cast<SDNode*>(0));
874 EntryNode.UseList = 0;
875 AllNodes.push_back(&EntryNode);
876 Root = getEntryNode();
881 SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
882 return VT.bitsGT(Op.getValueType()) ?
883 getNode(ISD::SIGN_EXTEND, DL, VT, Op) :
884 getNode(ISD::TRUNCATE, DL, VT, Op);
887 SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
888 return VT.bitsGT(Op.getValueType()) ?
889 getNode(ISD::ZERO_EXTEND, DL, VT, Op) :
890 getNode(ISD::TRUNCATE, DL, VT, Op);
893 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) {
894 assert(!VT.isVector() &&
895 "getZeroExtendInReg should use the vector element type instead of "
897 if (Op.getValueType() == VT) return Op;
898 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
899 APInt Imm = APInt::getLowBitsSet(BitWidth,
901 return getNode(ISD::AND, DL, Op.getValueType(), Op,
902 getConstant(Imm, Op.getValueType()));
905 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
907 SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) {
908 EVT EltVT = VT.getScalarType();
910 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT);
911 return getNode(ISD::XOR, DL, VT, Val, NegOne);
914 SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) {
915 EVT EltVT = VT.getScalarType();
916 assert((EltVT.getSizeInBits() >= 64 ||
917 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
918 "getConstant with a uint64_t value that doesn't fit in the type!");
919 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
922 SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) {
923 return getConstant(*ConstantInt::get(*Context, Val), VT, isT);
926 SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) {
927 assert(VT.isInteger() && "Cannot create FP integer constant!");
929 EVT EltVT = VT.getScalarType();
930 const ConstantInt *Elt = &Val;
932 // In some cases the vector type is legal but the element type is illegal and
933 // needs to be promoted, for example v8i8 on ARM. In this case, promote the
934 // inserted value (the type does not need to match the vector element type).
935 // Any extra bits introduced will be truncated away.
936 if (VT.isVector() && TLI.getTypeAction(*getContext(), EltVT) ==
937 TargetLowering::TypePromoteInteger) {
938 EltVT = TLI.getTypeToTransformTo(*getContext(), EltVT);
939 APInt NewVal = Elt->getValue().zext(EltVT.getSizeInBits());
940 Elt = ConstantInt::get(*getContext(), NewVal);
943 assert(Elt->getBitWidth() == EltVT.getSizeInBits() &&
944 "APInt size does not match type size!");
945 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
947 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
951 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
953 return SDValue(N, 0);
956 N = new (NodeAllocator) ConstantSDNode(isT, Elt, EltVT);
957 CSEMap.InsertNode(N, IP);
958 AllNodes.push_back(N);
961 SDValue Result(N, 0);
963 SmallVector<SDValue, 8> Ops;
964 Ops.assign(VT.getVectorNumElements(), Result);
965 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
970 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
971 return getConstant(Val, TLI.getPointerTy(), isTarget);
975 SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) {
976 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget);
979 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){
980 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
982 EVT EltVT = VT.getScalarType();
984 // Do the map lookup using the actual bit pattern for the floating point
985 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
986 // we don't have issues with SNANs.
987 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
989 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
993 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
995 return SDValue(N, 0);
998 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT);
999 CSEMap.InsertNode(N, IP);
1000 AllNodes.push_back(N);
1003 SDValue Result(N, 0);
1004 if (VT.isVector()) {
1005 SmallVector<SDValue, 8> Ops;
1006 Ops.assign(VT.getVectorNumElements(), Result);
1007 // FIXME DebugLoc info might be appropriate here
1008 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
1013 SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) {
1014 EVT EltVT = VT.getScalarType();
1015 if (EltVT==MVT::f32)
1016 return getConstantFP(APFloat((float)Val), VT, isTarget);
1017 else if (EltVT==MVT::f64)
1018 return getConstantFP(APFloat(Val), VT, isTarget);
1019 else if (EltVT==MVT::f80 || EltVT==MVT::f128) {
1021 APFloat apf = APFloat(Val);
1022 apf.convert(*EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven,
1024 return getConstantFP(apf, VT, isTarget);
1026 assert(0 && "Unsupported type in getConstantFP");
1031 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, DebugLoc DL,
1032 EVT VT, int64_t Offset,
1034 unsigned char TargetFlags) {
1035 assert((TargetFlags == 0 || isTargetGA) &&
1036 "Cannot set target flags on target-independent globals");
1038 // Truncate (with sign-extension) the offset value to the pointer size.
1039 EVT PTy = TLI.getPointerTy();
1040 unsigned BitWidth = PTy.getSizeInBits();
1042 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth));
1044 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
1046 // If GV is an alias then use the aliasee for determining thread-localness.
1047 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
1048 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
1052 if (GVar && GVar->isThreadLocal())
1053 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
1055 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
1057 FoldingSetNodeID ID;
1058 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1060 ID.AddInteger(Offset);
1061 ID.AddInteger(TargetFlags);
1063 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1064 return SDValue(E, 0);
1066 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL, GV, VT,
1067 Offset, TargetFlags);
1068 CSEMap.InsertNode(N, IP);
1069 AllNodes.push_back(N);
1070 return SDValue(N, 0);
1073 SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
1074 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1075 FoldingSetNodeID ID;
1076 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1079 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1080 return SDValue(E, 0);
1082 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget);
1083 CSEMap.InsertNode(N, IP);
1084 AllNodes.push_back(N);
1085 return SDValue(N, 0);
1088 SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
1089 unsigned char TargetFlags) {
1090 assert((TargetFlags == 0 || isTarget) &&
1091 "Cannot set target flags on target-independent jump tables");
1092 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1093 FoldingSetNodeID ID;
1094 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1096 ID.AddInteger(TargetFlags);
1098 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1099 return SDValue(E, 0);
1101 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget,
1103 CSEMap.InsertNode(N, IP);
1104 AllNodes.push_back(N);
1105 return SDValue(N, 0);
1108 SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT,
1109 unsigned Alignment, int Offset,
1111 unsigned char TargetFlags) {
1112 assert((TargetFlags == 0 || isTarget) &&
1113 "Cannot set target flags on target-independent globals");
1115 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1116 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1117 FoldingSetNodeID ID;
1118 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1119 ID.AddInteger(Alignment);
1120 ID.AddInteger(Offset);
1122 ID.AddInteger(TargetFlags);
1124 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1125 return SDValue(E, 0);
1127 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1128 Alignment, TargetFlags);
1129 CSEMap.InsertNode(N, IP);
1130 AllNodes.push_back(N);
1131 return SDValue(N, 0);
1135 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
1136 unsigned Alignment, int Offset,
1138 unsigned char TargetFlags) {
1139 assert((TargetFlags == 0 || isTarget) &&
1140 "Cannot set target flags on target-independent globals");
1142 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1143 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1144 FoldingSetNodeID ID;
1145 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1146 ID.AddInteger(Alignment);
1147 ID.AddInteger(Offset);
1148 C->AddSelectionDAGCSEId(ID);
1149 ID.AddInteger(TargetFlags);
1151 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1152 return SDValue(E, 0);
1154 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1155 Alignment, TargetFlags);
1156 CSEMap.InsertNode(N, IP);
1157 AllNodes.push_back(N);
1158 return SDValue(N, 0);
1161 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1162 FoldingSetNodeID ID;
1163 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1166 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1167 return SDValue(E, 0);
1169 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB);
1170 CSEMap.InsertNode(N, IP);
1171 AllNodes.push_back(N);
1172 return SDValue(N, 0);
1175 SDValue SelectionDAG::getValueType(EVT VT) {
1176 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
1177 ValueTypeNodes.size())
1178 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
1180 SDNode *&N = VT.isExtended() ?
1181 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
1183 if (N) return SDValue(N, 0);
1184 N = new (NodeAllocator) VTSDNode(VT);
1185 AllNodes.push_back(N);
1186 return SDValue(N, 0);
1189 SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
1190 SDNode *&N = ExternalSymbols[Sym];
1191 if (N) return SDValue(N, 0);
1192 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT);
1193 AllNodes.push_back(N);
1194 return SDValue(N, 0);
1197 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
1198 unsigned char TargetFlags) {
1200 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1202 if (N) return SDValue(N, 0);
1203 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1204 AllNodes.push_back(N);
1205 return SDValue(N, 0);
1208 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1209 if ((unsigned)Cond >= CondCodeNodes.size())
1210 CondCodeNodes.resize(Cond+1);
1212 if (CondCodeNodes[Cond] == 0) {
1213 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond);
1214 CondCodeNodes[Cond] = N;
1215 AllNodes.push_back(N);
1218 return SDValue(CondCodeNodes[Cond], 0);
1221 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1222 // the shuffle mask M that point at N1 to point at N2, and indices that point
1223 // N2 to point at N1.
1224 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1226 int NElts = M.size();
1227 for (int i = 0; i != NElts; ++i) {
1235 SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1,
1236 SDValue N2, const int *Mask) {
1237 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE");
1238 assert(VT.isVector() && N1.getValueType().isVector() &&
1239 "Vector Shuffle VTs must be a vectors");
1240 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType()
1241 && "Vector Shuffle VTs must have same element type");
1243 // Canonicalize shuffle undef, undef -> undef
1244 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1245 return getUNDEF(VT);
1247 // Validate that all indices in Mask are within the range of the elements
1248 // input to the shuffle.
1249 unsigned NElts = VT.getVectorNumElements();
1250 SmallVector<int, 8> MaskVec;
1251 for (unsigned i = 0; i != NElts; ++i) {
1252 assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1253 MaskVec.push_back(Mask[i]);
1256 // Canonicalize shuffle v, v -> v, undef
1259 for (unsigned i = 0; i != NElts; ++i)
1260 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1263 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1264 if (N1.getOpcode() == ISD::UNDEF)
1265 commuteShuffle(N1, N2, MaskVec);
1267 // Canonicalize all index into lhs, -> shuffle lhs, undef
1268 // Canonicalize all index into rhs, -> shuffle rhs, undef
1269 bool AllLHS = true, AllRHS = true;
1270 bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1271 for (unsigned i = 0; i != NElts; ++i) {
1272 if (MaskVec[i] >= (int)NElts) {
1277 } else if (MaskVec[i] >= 0) {
1281 if (AllLHS && AllRHS)
1282 return getUNDEF(VT);
1283 if (AllLHS && !N2Undef)
1287 commuteShuffle(N1, N2, MaskVec);
1290 // If Identity shuffle, or all shuffle in to undef, return that node.
1291 bool AllUndef = true;
1292 bool Identity = true;
1293 for (unsigned i = 0; i != NElts; ++i) {
1294 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1295 if (MaskVec[i] >= 0) AllUndef = false;
1297 if (Identity && NElts == N1.getValueType().getVectorNumElements())
1300 return getUNDEF(VT);
1302 FoldingSetNodeID ID;
1303 SDValue Ops[2] = { N1, N2 };
1304 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2);
1305 for (unsigned i = 0; i != NElts; ++i)
1306 ID.AddInteger(MaskVec[i]);
1309 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1310 return SDValue(E, 0);
1312 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1313 // SDNode doesn't have access to it. This memory will be "leaked" when
1314 // the node is deallocated, but recovered when the NodeAllocator is released.
1315 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1316 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1318 ShuffleVectorSDNode *N =
1319 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc);
1320 CSEMap.InsertNode(N, IP);
1321 AllNodes.push_back(N);
1322 return SDValue(N, 0);
1325 SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl,
1326 SDValue Val, SDValue DTy,
1327 SDValue STy, SDValue Rnd, SDValue Sat,
1328 ISD::CvtCode Code) {
1329 // If the src and dest types are the same and the conversion is between
1330 // integer types of the same sign or two floats, no conversion is necessary.
1332 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1335 FoldingSetNodeID ID;
1336 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1337 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5);
1339 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1340 return SDValue(E, 0);
1342 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5,
1344 CSEMap.InsertNode(N, IP);
1345 AllNodes.push_back(N);
1346 return SDValue(N, 0);
1349 SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
1350 FoldingSetNodeID ID;
1351 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1352 ID.AddInteger(RegNo);
1354 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1355 return SDValue(E, 0);
1357 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT);
1358 CSEMap.InsertNode(N, IP);
1359 AllNodes.push_back(N);
1360 return SDValue(N, 0);
1363 SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) {
1364 FoldingSetNodeID ID;
1365 SDValue Ops[] = { Root };
1366 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1);
1367 ID.AddPointer(Label);
1369 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1370 return SDValue(E, 0);
1372 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label);
1373 CSEMap.InsertNode(N, IP);
1374 AllNodes.push_back(N);
1375 return SDValue(N, 0);
1379 SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT,
1381 unsigned char TargetFlags) {
1382 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress;
1384 FoldingSetNodeID ID;
1385 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1387 ID.AddInteger(TargetFlags);
1389 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1390 return SDValue(E, 0);
1392 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, TargetFlags);
1393 CSEMap.InsertNode(N, IP);
1394 AllNodes.push_back(N);
1395 return SDValue(N, 0);
1398 SDValue SelectionDAG::getSrcValue(const Value *V) {
1399 assert((!V || V->getType()->isPointerTy()) &&
1400 "SrcValue is not a pointer?");
1402 FoldingSetNodeID ID;
1403 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1407 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1408 return SDValue(E, 0);
1410 SDNode *N = new (NodeAllocator) SrcValueSDNode(V);
1411 CSEMap.InsertNode(N, IP);
1412 AllNodes.push_back(N);
1413 return SDValue(N, 0);
1416 /// getMDNode - Return an MDNodeSDNode which holds an MDNode.
1417 SDValue SelectionDAG::getMDNode(const MDNode *MD) {
1418 FoldingSetNodeID ID;
1419 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0);
1423 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1424 return SDValue(E, 0);
1426 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD);
1427 CSEMap.InsertNode(N, IP);
1428 AllNodes.push_back(N);
1429 return SDValue(N, 0);
1433 /// getShiftAmountOperand - Return the specified value casted to
1434 /// the target's desired shift amount type.
1435 SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) {
1436 EVT OpTy = Op.getValueType();
1437 MVT ShTy = TLI.getShiftAmountTy(LHSTy);
1438 if (OpTy == ShTy || OpTy.isVector()) return Op;
1440 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1441 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op);
1444 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1445 /// specified value type.
1446 SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
1447 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1448 unsigned ByteSize = VT.getStoreSize();
1449 Type *Ty = VT.getTypeForEVT(*getContext());
1450 unsigned StackAlign =
1451 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign);
1453 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false);
1454 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1457 /// CreateStackTemporary - Create a stack temporary suitable for holding
1458 /// either of the specified value types.
1459 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
1460 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1461 VT2.getStoreSizeInBits())/8;
1462 Type *Ty1 = VT1.getTypeForEVT(*getContext());
1463 Type *Ty2 = VT2.getTypeForEVT(*getContext());
1464 const TargetData *TD = TLI.getTargetData();
1465 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1466 TD->getPrefTypeAlignment(Ty2));
1468 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1469 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false);
1470 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1473 SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
1474 SDValue N2, ISD::CondCode Cond, DebugLoc dl) {
1475 // These setcc operations always fold.
1479 case ISD::SETFALSE2: return getConstant(0, VT);
1481 case ISD::SETTRUE2: return getConstant(1, VT);
1493 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1497 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1498 const APInt &C2 = N2C->getAPIntValue();
1499 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1500 const APInt &C1 = N1C->getAPIntValue();
1503 default: llvm_unreachable("Unknown integer setcc!");
1504 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1505 case ISD::SETNE: return getConstant(C1 != C2, VT);
1506 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1507 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1508 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1509 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1510 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1511 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1512 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1513 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1517 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1518 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1519 // No compile time operations on this type yet.
1520 if (N1C->getValueType(0) == MVT::ppcf128)
1523 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1526 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1527 return getUNDEF(VT);
1529 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1530 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1531 return getUNDEF(VT);
1533 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1534 R==APFloat::cmpLessThan, VT);
1535 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1536 return getUNDEF(VT);
1538 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1539 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1540 return getUNDEF(VT);
1542 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1543 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1544 return getUNDEF(VT);
1546 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1547 R==APFloat::cmpEqual, VT);
1548 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1549 return getUNDEF(VT);
1551 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1552 R==APFloat::cmpEqual, VT);
1553 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1554 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1555 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1556 R==APFloat::cmpEqual, VT);
1557 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1558 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1559 R==APFloat::cmpLessThan, VT);
1560 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1561 R==APFloat::cmpUnordered, VT);
1562 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1563 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1566 // Ensure that the constant occurs on the RHS.
1567 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1571 // Could not fold it.
1575 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1576 /// use this predicate to simplify operations downstream.
1577 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1578 // This predicate is not safe for vector operations.
1579 if (Op.getValueType().isVector())
1582 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1583 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1586 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1587 /// this predicate to simplify operations downstream. Mask is known to be zero
1588 /// for bits that V cannot have.
1589 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1590 unsigned Depth) const {
1591 APInt KnownZero, KnownOne;
1592 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
1593 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1594 return (KnownZero & Mask) == Mask;
1597 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1598 /// known to be either zero or one and return them in the KnownZero/KnownOne
1599 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1601 void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask,
1602 APInt &KnownZero, APInt &KnownOne,
1603 unsigned Depth) const {
1604 unsigned BitWidth = Mask.getBitWidth();
1605 assert(BitWidth == Op.getValueType().getScalarType().getSizeInBits() &&
1606 "Mask size mismatches value type size!");
1608 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1609 if (Depth == 6 || Mask == 0)
1610 return; // Limit search depth.
1612 APInt KnownZero2, KnownOne2;
1614 switch (Op.getOpcode()) {
1616 // We know all of the bits for a constant!
1617 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask;
1618 KnownZero = ~KnownOne & Mask;
1621 // If either the LHS or the RHS are Zero, the result is zero.
1622 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1623 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero,
1624 KnownZero2, KnownOne2, Depth+1);
1625 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1626 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1628 // Output known-1 bits are only known if set in both the LHS & RHS.
1629 KnownOne &= KnownOne2;
1630 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1631 KnownZero |= KnownZero2;
1634 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1635 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne,
1636 KnownZero2, KnownOne2, Depth+1);
1637 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1638 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1640 // Output known-0 bits are only known if clear in both the LHS & RHS.
1641 KnownZero &= KnownZero2;
1642 // Output known-1 are known to be set if set in either the LHS | RHS.
1643 KnownOne |= KnownOne2;
1646 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1647 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
1648 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1649 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1651 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1652 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1653 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1654 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1655 KnownZero = KnownZeroOut;
1659 APInt Mask2 = APInt::getAllOnesValue(BitWidth);
1660 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1);
1661 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1662 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1663 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1665 // If low bits are zero in either operand, output low known-0 bits.
1666 // Also compute a conserative estimate for high known-0 bits.
1667 // More trickiness is possible, but this is sufficient for the
1668 // interesting case of alignment computation.
1669 KnownOne.clearAllBits();
1670 unsigned TrailZ = KnownZero.countTrailingOnes() +
1671 KnownZero2.countTrailingOnes();
1672 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1673 KnownZero2.countLeadingOnes(),
1674 BitWidth) - BitWidth;
1676 TrailZ = std::min(TrailZ, BitWidth);
1677 LeadZ = std::min(LeadZ, BitWidth);
1678 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1679 APInt::getHighBitsSet(BitWidth, LeadZ);
1684 // For the purposes of computing leading zeros we can conservatively
1685 // treat a udiv as a logical right shift by the power of 2 known to
1686 // be less than the denominator.
1687 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1688 ComputeMaskedBits(Op.getOperand(0),
1689 AllOnes, KnownZero2, KnownOne2, Depth+1);
1690 unsigned LeadZ = KnownZero2.countLeadingOnes();
1692 KnownOne2.clearAllBits();
1693 KnownZero2.clearAllBits();
1694 ComputeMaskedBits(Op.getOperand(1),
1695 AllOnes, KnownZero2, KnownOne2, Depth+1);
1696 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1697 if (RHSUnknownLeadingOnes != BitWidth)
1698 LeadZ = std::min(BitWidth,
1699 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1701 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask;
1705 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1);
1706 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1);
1707 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1708 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1710 // Only known if known in both the LHS and RHS.
1711 KnownOne &= KnownOne2;
1712 KnownZero &= KnownZero2;
1714 case ISD::SELECT_CC:
1715 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1);
1716 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1);
1717 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1718 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1720 // Only known if known in both the LHS and RHS.
1721 KnownOne &= KnownOne2;
1722 KnownZero &= KnownZero2;
1730 if (Op.getResNo() != 1)
1732 // The boolean result conforms to getBooleanContents. Fall through.
1734 // If we know the result of a setcc has the top bits zero, use this info.
1735 if (TLI.getBooleanContents(Op.getValueType().isVector()) ==
1736 TargetLowering::ZeroOrOneBooleanContent && BitWidth > 1)
1737 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1740 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1741 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1742 unsigned ShAmt = SA->getZExtValue();
1744 // If the shift count is an invalid immediate, don't do anything.
1745 if (ShAmt >= BitWidth)
1748 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt),
1749 KnownZero, KnownOne, Depth+1);
1750 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1751 KnownZero <<= ShAmt;
1753 // low bits known zero.
1754 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1758 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1759 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1760 unsigned ShAmt = SA->getZExtValue();
1762 // If the shift count is an invalid immediate, don't do anything.
1763 if (ShAmt >= BitWidth)
1766 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt),
1767 KnownZero, KnownOne, Depth+1);
1768 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1769 KnownZero = KnownZero.lshr(ShAmt);
1770 KnownOne = KnownOne.lshr(ShAmt);
1772 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1773 KnownZero |= HighBits; // High bits known zero.
1777 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1778 unsigned ShAmt = SA->getZExtValue();
1780 // If the shift count is an invalid immediate, don't do anything.
1781 if (ShAmt >= BitWidth)
1784 APInt InDemandedMask = (Mask << ShAmt);
1785 // If any of the demanded bits are produced by the sign extension, we also
1786 // demand the input sign bit.
1787 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1788 if (HighBits.getBoolValue())
1789 InDemandedMask |= APInt::getSignBit(BitWidth);
1791 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne,
1793 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1794 KnownZero = KnownZero.lshr(ShAmt);
1795 KnownOne = KnownOne.lshr(ShAmt);
1797 // Handle the sign bits.
1798 APInt SignBit = APInt::getSignBit(BitWidth);
1799 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1801 if (KnownZero.intersects(SignBit)) {
1802 KnownZero |= HighBits; // New bits are known zero.
1803 } else if (KnownOne.intersects(SignBit)) {
1804 KnownOne |= HighBits; // New bits are known one.
1808 case ISD::SIGN_EXTEND_INREG: {
1809 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1810 unsigned EBits = EVT.getScalarType().getSizeInBits();
1812 // Sign extension. Compute the demanded bits in the result that are not
1813 // present in the input.
1814 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask;
1816 APInt InSignBit = APInt::getSignBit(EBits);
1817 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits);
1819 // If the sign extended bits are demanded, we know that the sign
1821 InSignBit = InSignBit.zext(BitWidth);
1822 if (NewBits.getBoolValue())
1823 InputDemandedBits |= InSignBit;
1825 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits,
1826 KnownZero, KnownOne, Depth+1);
1827 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1829 // If the sign bit of the input is known set or clear, then we know the
1830 // top bits of the result.
1831 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1832 KnownZero |= NewBits;
1833 KnownOne &= ~NewBits;
1834 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1835 KnownOne |= NewBits;
1836 KnownZero &= ~NewBits;
1837 } else { // Input sign bit unknown
1838 KnownZero &= ~NewBits;
1839 KnownOne &= ~NewBits;
1846 unsigned LowBits = Log2_32(BitWidth)+1;
1847 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1848 KnownOne.clearAllBits();
1852 if (ISD::isZEXTLoad(Op.getNode())) {
1853 LoadSDNode *LD = cast<LoadSDNode>(Op);
1854 EVT VT = LD->getMemoryVT();
1855 unsigned MemBits = VT.getScalarType().getSizeInBits();
1856 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask;
1860 case ISD::ZERO_EXTEND: {
1861 EVT InVT = Op.getOperand(0).getValueType();
1862 unsigned InBits = InVT.getScalarType().getSizeInBits();
1863 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1864 APInt InMask = Mask.trunc(InBits);
1865 KnownZero = KnownZero.trunc(InBits);
1866 KnownOne = KnownOne.trunc(InBits);
1867 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1868 KnownZero = KnownZero.zext(BitWidth);
1869 KnownOne = KnownOne.zext(BitWidth);
1870 KnownZero |= NewBits;
1873 case ISD::SIGN_EXTEND: {
1874 EVT InVT = Op.getOperand(0).getValueType();
1875 unsigned InBits = InVT.getScalarType().getSizeInBits();
1876 APInt InSignBit = APInt::getSignBit(InBits);
1877 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1878 APInt InMask = Mask.trunc(InBits);
1880 // If any of the sign extended bits are demanded, we know that the sign
1881 // bit is demanded. Temporarily set this bit in the mask for our callee.
1882 if (NewBits.getBoolValue())
1883 InMask |= InSignBit;
1885 KnownZero = KnownZero.trunc(InBits);
1886 KnownOne = KnownOne.trunc(InBits);
1887 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1889 // Note if the sign bit is known to be zero or one.
1890 bool SignBitKnownZero = KnownZero.isNegative();
1891 bool SignBitKnownOne = KnownOne.isNegative();
1892 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1893 "Sign bit can't be known to be both zero and one!");
1895 // If the sign bit wasn't actually demanded by our caller, we don't
1896 // want it set in the KnownZero and KnownOne result values. Reset the
1897 // mask and reapply it to the result values.
1898 InMask = Mask.trunc(InBits);
1899 KnownZero &= InMask;
1902 KnownZero = KnownZero.zext(BitWidth);
1903 KnownOne = KnownOne.zext(BitWidth);
1905 // If the sign bit is known zero or one, the top bits match.
1906 if (SignBitKnownZero)
1907 KnownZero |= NewBits;
1908 else if (SignBitKnownOne)
1909 KnownOne |= NewBits;
1912 case ISD::ANY_EXTEND: {
1913 EVT InVT = Op.getOperand(0).getValueType();
1914 unsigned InBits = InVT.getScalarType().getSizeInBits();
1915 APInt InMask = Mask.trunc(InBits);
1916 KnownZero = KnownZero.trunc(InBits);
1917 KnownOne = KnownOne.trunc(InBits);
1918 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1919 KnownZero = KnownZero.zext(BitWidth);
1920 KnownOne = KnownOne.zext(BitWidth);
1923 case ISD::TRUNCATE: {
1924 EVT InVT = Op.getOperand(0).getValueType();
1925 unsigned InBits = InVT.getScalarType().getSizeInBits();
1926 APInt InMask = Mask.zext(InBits);
1927 KnownZero = KnownZero.zext(InBits);
1928 KnownOne = KnownOne.zext(InBits);
1929 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1930 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1931 KnownZero = KnownZero.trunc(BitWidth);
1932 KnownOne = KnownOne.trunc(BitWidth);
1935 case ISD::AssertZext: {
1936 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1937 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1938 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
1940 KnownZero |= (~InMask) & Mask;
1944 // All bits are zero except the low bit.
1945 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1949 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
1950 // We know that the top bits of C-X are clear if X contains less bits
1951 // than C (i.e. no wrap-around can happen). For example, 20-X is
1952 // positive if we can prove that X is >= 0 and < 16.
1953 if (CLHS->getAPIntValue().isNonNegative()) {
1954 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
1955 // NLZ can't be BitWidth with no sign bit
1956 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
1957 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2,
1960 // If all of the MaskV bits are known to be zero, then we know the
1961 // output top bits are zero, because we now know that the output is
1963 if ((KnownZero2 & MaskV) == MaskV) {
1964 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
1965 // Top bits known zero.
1966 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask;
1974 // Output known-0 bits are known if clear or set in both the low clear bits
1975 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
1976 // low 3 bits clear.
1977 APInt Mask2 = APInt::getLowBitsSet(BitWidth,
1978 BitWidth - Mask.countLeadingZeros());
1979 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1980 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1981 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
1983 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1);
1984 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1985 KnownZeroOut = std::min(KnownZeroOut,
1986 KnownZero2.countTrailingOnes());
1988 if (Op.getOpcode() == ISD::ADD) {
1989 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
1993 // With ADDE, a carry bit may be added in, so we can only use this
1994 // information if we know (at least) that the low two bits are clear. We
1995 // then return to the caller that the low bit is unknown but that other bits
1997 if (KnownZeroOut >= 2) // ADDE
1998 KnownZero |= APInt::getBitsSet(BitWidth, 1, KnownZeroOut);
2002 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2003 const APInt &RA = Rem->getAPIntValue().abs();
2004 if (RA.isPowerOf2()) {
2005 APInt LowBits = RA - 1;
2006 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
2007 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1);
2009 // The low bits of the first operand are unchanged by the srem.
2010 KnownZero = KnownZero2 & LowBits;
2011 KnownOne = KnownOne2 & LowBits;
2013 // If the first operand is non-negative or has all low bits zero, then
2014 // the upper bits are all zero.
2015 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
2016 KnownZero |= ~LowBits;
2018 // If the first operand is negative and not all low bits are zero, then
2019 // the upper bits are all one.
2020 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0))
2021 KnownOne |= ~LowBits;
2026 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2031 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2032 const APInt &RA = Rem->getAPIntValue();
2033 if (RA.isPowerOf2()) {
2034 APInt LowBits = (RA - 1);
2035 APInt Mask2 = LowBits & Mask;
2036 KnownZero |= ~LowBits & Mask;
2037 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1);
2038 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2043 // Since the result is less than or equal to either operand, any leading
2044 // zero bits in either operand must also exist in the result.
2045 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
2046 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne,
2048 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2,
2051 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
2052 KnownZero2.countLeadingOnes());
2053 KnownOne.clearAllBits();
2054 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
2057 case ISD::FrameIndex:
2058 case ISD::TargetFrameIndex:
2059 if (unsigned Align = InferPtrAlignment(Op)) {
2060 // The low bits are known zero if the pointer is aligned.
2061 KnownZero = APInt::getLowBitsSet(BitWidth, Log2_32(Align));
2067 if (Op.getOpcode() < ISD::BUILTIN_OP_END)
2070 case ISD::INTRINSIC_WO_CHAIN:
2071 case ISD::INTRINSIC_W_CHAIN:
2072 case ISD::INTRINSIC_VOID:
2073 // Allow the target to implement this method for its nodes.
2074 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this,
2080 /// ComputeNumSignBits - Return the number of times the sign bit of the
2081 /// register is replicated into the other bits. We know that at least 1 bit
2082 /// is always equal to the sign bit (itself), but other cases can give us
2083 /// information. For example, immediately after an "SRA X, 2", we know that
2084 /// the top 3 bits are all equal to each other, so we return 3.
2085 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
2086 EVT VT = Op.getValueType();
2087 assert(VT.isInteger() && "Invalid VT!");
2088 unsigned VTBits = VT.getScalarType().getSizeInBits();
2090 unsigned FirstAnswer = 1;
2093 return 1; // Limit search depth.
2095 switch (Op.getOpcode()) {
2097 case ISD::AssertSext:
2098 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2099 return VTBits-Tmp+1;
2100 case ISD::AssertZext:
2101 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2104 case ISD::Constant: {
2105 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2106 return Val.getNumSignBits();
2109 case ISD::SIGN_EXTEND:
2110 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
2111 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2113 case ISD::SIGN_EXTEND_INREG:
2114 // Max of the input and what this extends.
2116 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits();
2119 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2120 return std::max(Tmp, Tmp2);
2123 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2124 // SRA X, C -> adds C sign bits.
2125 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2126 Tmp += C->getZExtValue();
2127 if (Tmp > VTBits) Tmp = VTBits;
2131 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2132 // shl destroys sign bits.
2133 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2134 if (C->getZExtValue() >= VTBits || // Bad shift.
2135 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
2136 return Tmp - C->getZExtValue();
2141 case ISD::XOR: // NOT is handled here.
2142 // Logical binary ops preserve the number of sign bits at the worst.
2143 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2145 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2146 FirstAnswer = std::min(Tmp, Tmp2);
2147 // We computed what we know about the sign bits as our first
2148 // answer. Now proceed to the generic code that uses
2149 // ComputeMaskedBits, and pick whichever answer is better.
2154 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2155 if (Tmp == 1) return 1; // Early out.
2156 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2157 return std::min(Tmp, Tmp2);
2165 if (Op.getResNo() != 1)
2167 // The boolean result conforms to getBooleanContents. Fall through.
2169 // If setcc returns 0/-1, all bits are sign bits.
2170 if (TLI.getBooleanContents(Op.getValueType().isVector()) ==
2171 TargetLowering::ZeroOrNegativeOneBooleanContent)
2176 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2177 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2179 // Handle rotate right by N like a rotate left by 32-N.
2180 if (Op.getOpcode() == ISD::ROTR)
2181 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2183 // If we aren't rotating out all of the known-in sign bits, return the
2184 // number that are left. This handles rotl(sext(x), 1) for example.
2185 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2186 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2190 // Add can have at most one carry bit. Thus we know that the output
2191 // is, at worst, one more bit than the inputs.
2192 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2193 if (Tmp == 1) return 1; // Early out.
2195 // Special case decrementing a value (ADD X, -1):
2196 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2197 if (CRHS->isAllOnesValue()) {
2198 APInt KnownZero, KnownOne;
2199 APInt Mask = APInt::getAllOnesValue(VTBits);
2200 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
2202 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2204 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2207 // If we are subtracting one from a positive number, there is no carry
2208 // out of the result.
2209 if (KnownZero.isNegative())
2213 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2214 if (Tmp2 == 1) return 1;
2215 return std::min(Tmp, Tmp2)-1;
2219 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2220 if (Tmp2 == 1) return 1;
2223 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2224 if (CLHS->isNullValue()) {
2225 APInt KnownZero, KnownOne;
2226 APInt Mask = APInt::getAllOnesValue(VTBits);
2227 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
2228 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2230 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2233 // If the input is known to be positive (the sign bit is known clear),
2234 // the output of the NEG has the same number of sign bits as the input.
2235 if (KnownZero.isNegative())
2238 // Otherwise, we treat this like a SUB.
2241 // Sub can have at most one carry bit. Thus we know that the output
2242 // is, at worst, one more bit than the inputs.
2243 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2244 if (Tmp == 1) return 1; // Early out.
2245 return std::min(Tmp, Tmp2)-1;
2248 // FIXME: it's tricky to do anything useful for this, but it is an important
2249 // case for targets like X86.
2253 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2254 if (Op.getOpcode() == ISD::LOAD) {
2255 LoadSDNode *LD = cast<LoadSDNode>(Op);
2256 unsigned ExtType = LD->getExtensionType();
2259 case ISD::SEXTLOAD: // '17' bits known
2260 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2261 return VTBits-Tmp+1;
2262 case ISD::ZEXTLOAD: // '16' bits known
2263 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2268 // Allow the target to implement this method for its nodes.
2269 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2270 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2271 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2272 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2273 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2274 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2277 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2278 // use this information.
2279 APInt KnownZero, KnownOne;
2280 APInt Mask = APInt::getAllOnesValue(VTBits);
2281 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
2283 if (KnownZero.isNegative()) { // sign bit is 0
2285 } else if (KnownOne.isNegative()) { // sign bit is 1;
2292 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2293 // the number of identical bits in the top of the input value.
2295 Mask <<= Mask.getBitWidth()-VTBits;
2296 // Return # leading zeros. We use 'min' here in case Val was zero before
2297 // shifting. We don't want to return '64' as for an i32 "0".
2298 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2301 /// isBaseWithConstantOffset - Return true if the specified operand is an
2302 /// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an
2303 /// ISD::OR with a ConstantSDNode that is guaranteed to have the same
2304 /// semantics as an ADD. This handles the equivalence:
2305 /// X|Cst == X+Cst iff X&Cst = 0.
2306 bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const {
2307 if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) ||
2308 !isa<ConstantSDNode>(Op.getOperand(1)))
2311 if (Op.getOpcode() == ISD::OR &&
2312 !MaskedValueIsZero(Op.getOperand(0),
2313 cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue()))
2320 bool SelectionDAG::isKnownNeverNaN(SDValue Op) const {
2321 // If we're told that NaNs won't happen, assume they won't.
2325 // If the value is a constant, we can obviously see if it is a NaN or not.
2326 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2327 return !C->getValueAPF().isNaN();
2329 // TODO: Recognize more cases here.
2334 bool SelectionDAG::isKnownNeverZero(SDValue Op) const {
2335 // If the value is a constant, we can obviously see if it is a zero or not.
2336 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2337 return !C->isZero();
2339 // TODO: Recognize more cases here.
2340 switch (Op.getOpcode()) {
2343 if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2344 return !C->isNullValue();
2351 bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const {
2352 // Check the obvious case.
2353 if (A == B) return true;
2355 // For for negative and positive zero.
2356 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A))
2357 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B))
2358 if (CA->isZero() && CB->isZero()) return true;
2360 // Otherwise they may not be equal.
2364 /// getNode - Gets or creates the specified node.
2366 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) {
2367 FoldingSetNodeID ID;
2368 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2370 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2371 return SDValue(E, 0);
2373 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT));
2374 CSEMap.InsertNode(N, IP);
2376 AllNodes.push_back(N);
2380 return SDValue(N, 0);
2383 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
2384 EVT VT, SDValue Operand) {
2385 // Constant fold unary operations with an integer constant operand.
2386 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2387 const APInt &Val = C->getAPIntValue();
2390 case ISD::SIGN_EXTEND:
2391 return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), VT);
2392 case ISD::ANY_EXTEND:
2393 case ISD::ZERO_EXTEND:
2395 return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), VT);
2396 case ISD::UINT_TO_FP:
2397 case ISD::SINT_TO_FP: {
2398 // No compile time operations on ppcf128.
2399 if (VT == MVT::ppcf128) break;
2400 APFloat apf(APInt::getNullValue(VT.getSizeInBits()));
2401 (void)apf.convertFromAPInt(Val,
2402 Opcode==ISD::SINT_TO_FP,
2403 APFloat::rmNearestTiesToEven);
2404 return getConstantFP(apf, VT);
2407 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2408 return getConstantFP(Val.bitsToFloat(), VT);
2409 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2410 return getConstantFP(Val.bitsToDouble(), VT);
2413 return getConstant(Val.byteSwap(), VT);
2415 return getConstant(Val.countPopulation(), VT);
2417 return getConstant(Val.countLeadingZeros(), VT);
2419 return getConstant(Val.countTrailingZeros(), VT);
2423 // Constant fold unary operations with a floating point constant operand.
2424 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2425 APFloat V = C->getValueAPF(); // make copy
2426 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) {
2430 return getConstantFP(V, VT);
2433 return getConstantFP(V, VT);
2435 case ISD::FP_EXTEND: {
2437 // This can return overflow, underflow, or inexact; we don't care.
2438 // FIXME need to be more flexible about rounding mode.
2439 (void)V.convert(*EVTToAPFloatSemantics(VT),
2440 APFloat::rmNearestTiesToEven, &ignored);
2441 return getConstantFP(V, VT);
2443 case ISD::FP_TO_SINT:
2444 case ISD::FP_TO_UINT: {
2447 assert(integerPartWidth >= 64);
2448 // FIXME need to be more flexible about rounding mode.
2449 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2450 Opcode==ISD::FP_TO_SINT,
2451 APFloat::rmTowardZero, &ignored);
2452 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2454 APInt api(VT.getSizeInBits(), x);
2455 return getConstant(api, VT);
2458 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2459 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2460 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2461 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2467 unsigned OpOpcode = Operand.getNode()->getOpcode();
2469 case ISD::TokenFactor:
2470 case ISD::MERGE_VALUES:
2471 case ISD::CONCAT_VECTORS:
2472 return Operand; // Factor, merge or concat of one node? No need.
2473 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
2474 case ISD::FP_EXTEND:
2475 assert(VT.isFloatingPoint() &&
2476 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2477 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2478 assert((!VT.isVector() ||
2479 VT.getVectorNumElements() ==
2480 Operand.getValueType().getVectorNumElements()) &&
2481 "Vector element count mismatch!");
2482 if (Operand.getOpcode() == ISD::UNDEF)
2483 return getUNDEF(VT);
2485 case ISD::SIGN_EXTEND:
2486 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2487 "Invalid SIGN_EXTEND!");
2488 if (Operand.getValueType() == VT) return Operand; // noop extension
2489 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2490 "Invalid sext node, dst < src!");
2491 assert((!VT.isVector() ||
2492 VT.getVectorNumElements() ==
2493 Operand.getValueType().getVectorNumElements()) &&
2494 "Vector element count mismatch!");
2495 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2496 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2497 else if (OpOpcode == ISD::UNDEF)
2498 // sext(undef) = 0, because the top bits will all be the same.
2499 return getConstant(0, VT);
2501 case ISD::ZERO_EXTEND:
2502 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2503 "Invalid ZERO_EXTEND!");
2504 if (Operand.getValueType() == VT) return Operand; // noop extension
2505 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2506 "Invalid zext node, dst < src!");
2507 assert((!VT.isVector() ||
2508 VT.getVectorNumElements() ==
2509 Operand.getValueType().getVectorNumElements()) &&
2510 "Vector element count mismatch!");
2511 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2512 return getNode(ISD::ZERO_EXTEND, DL, VT,
2513 Operand.getNode()->getOperand(0));
2514 else if (OpOpcode == ISD::UNDEF)
2515 // zext(undef) = 0, because the top bits will be zero.
2516 return getConstant(0, VT);
2518 case ISD::ANY_EXTEND:
2519 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2520 "Invalid ANY_EXTEND!");
2521 if (Operand.getValueType() == VT) return Operand; // noop extension
2522 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2523 "Invalid anyext node, dst < src!");
2524 assert((!VT.isVector() ||
2525 VT.getVectorNumElements() ==
2526 Operand.getValueType().getVectorNumElements()) &&
2527 "Vector element count mismatch!");
2529 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2530 OpOpcode == ISD::ANY_EXTEND)
2531 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2532 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2533 else if (OpOpcode == ISD::UNDEF)
2534 return getUNDEF(VT);
2536 // (ext (trunx x)) -> x
2537 if (OpOpcode == ISD::TRUNCATE) {
2538 SDValue OpOp = Operand.getNode()->getOperand(0);
2539 if (OpOp.getValueType() == VT)
2544 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2545 "Invalid TRUNCATE!");
2546 if (Operand.getValueType() == VT) return Operand; // noop truncate
2547 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) &&
2548 "Invalid truncate node, src < dst!");
2549 assert((!VT.isVector() ||
2550 VT.getVectorNumElements() ==
2551 Operand.getValueType().getVectorNumElements()) &&
2552 "Vector element count mismatch!");
2553 if (OpOpcode == ISD::TRUNCATE)
2554 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2555 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2556 OpOpcode == ISD::ANY_EXTEND) {
2557 // If the source is smaller than the dest, we still need an extend.
2558 if (Operand.getNode()->getOperand(0).getValueType().getScalarType()
2559 .bitsLT(VT.getScalarType()))
2560 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2561 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2562 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2564 return Operand.getNode()->getOperand(0);
2568 // Basic sanity checking.
2569 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2570 && "Cannot BITCAST between types of different sizes!");
2571 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2572 if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x)
2573 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0));
2574 if (OpOpcode == ISD::UNDEF)
2575 return getUNDEF(VT);
2577 case ISD::SCALAR_TO_VECTOR:
2578 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2579 (VT.getVectorElementType() == Operand.getValueType() ||
2580 (VT.getVectorElementType().isInteger() &&
2581 Operand.getValueType().isInteger() &&
2582 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
2583 "Illegal SCALAR_TO_VECTOR node!");
2584 if (OpOpcode == ISD::UNDEF)
2585 return getUNDEF(VT);
2586 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2587 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2588 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2589 Operand.getConstantOperandVal(1) == 0 &&
2590 Operand.getOperand(0).getValueType() == VT)
2591 return Operand.getOperand(0);
2594 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
2595 if (UnsafeFPMath && OpOpcode == ISD::FSUB)
2596 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
2597 Operand.getNode()->getOperand(0));
2598 if (OpOpcode == ISD::FNEG) // --X -> X
2599 return Operand.getNode()->getOperand(0);
2602 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2603 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
2608 SDVTList VTs = getVTList(VT);
2609 if (VT != MVT::Glue) { // Don't CSE flag producing nodes
2610 FoldingSetNodeID ID;
2611 SDValue Ops[1] = { Operand };
2612 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2614 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2615 return SDValue(E, 0);
2617 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2618 CSEMap.InsertNode(N, IP);
2620 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2623 AllNodes.push_back(N);
2627 return SDValue(N, 0);
2630 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2632 ConstantSDNode *Cst1,
2633 ConstantSDNode *Cst2) {
2634 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
2637 case ISD::ADD: return getConstant(C1 + C2, VT);
2638 case ISD::SUB: return getConstant(C1 - C2, VT);
2639 case ISD::MUL: return getConstant(C1 * C2, VT);
2641 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2644 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2647 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2650 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2652 case ISD::AND: return getConstant(C1 & C2, VT);
2653 case ISD::OR: return getConstant(C1 | C2, VT);
2654 case ISD::XOR: return getConstant(C1 ^ C2, VT);
2655 case ISD::SHL: return getConstant(C1 << C2, VT);
2656 case ISD::SRL: return getConstant(C1.lshr(C2), VT);
2657 case ISD::SRA: return getConstant(C1.ashr(C2), VT);
2658 case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2659 case ISD::ROTR: return getConstant(C1.rotr(C2), VT);
2666 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2667 SDValue N1, SDValue N2) {
2668 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2669 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2672 case ISD::TokenFactor:
2673 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2674 N2.getValueType() == MVT::Other && "Invalid token factor!");
2675 // Fold trivial token factors.
2676 if (N1.getOpcode() == ISD::EntryToken) return N2;
2677 if (N2.getOpcode() == ISD::EntryToken) return N1;
2678 if (N1 == N2) return N1;
2680 case ISD::CONCAT_VECTORS:
2681 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2682 // one big BUILD_VECTOR.
2683 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2684 N2.getOpcode() == ISD::BUILD_VECTOR) {
2685 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
2686 N1.getNode()->op_end());
2687 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
2688 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2692 assert(VT.isInteger() && "This operator does not apply to FP types!");
2693 assert(N1.getValueType() == N2.getValueType() &&
2694 N1.getValueType() == VT && "Binary operator types must match!");
2695 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2696 // worth handling here.
2697 if (N2C && N2C->isNullValue())
2699 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2706 assert(VT.isInteger() && "This operator does not apply to FP types!");
2707 assert(N1.getValueType() == N2.getValueType() &&
2708 N1.getValueType() == VT && "Binary operator types must match!");
2709 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2710 // it's worth handling here.
2711 if (N2C && N2C->isNullValue())
2721 assert(VT.isInteger() && "This operator does not apply to FP types!");
2722 assert(N1.getValueType() == N2.getValueType() &&
2723 N1.getValueType() == VT && "Binary operator types must match!");
2731 if (Opcode == ISD::FADD) {
2733 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
2734 if (CFP->getValueAPF().isZero())
2737 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2738 if (CFP->getValueAPF().isZero())
2740 } else if (Opcode == ISD::FSUB) {
2742 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2743 if (CFP->getValueAPF().isZero())
2747 assert(VT.isFloatingPoint() && "This operator only applies to FP types!");
2748 assert(N1.getValueType() == N2.getValueType() &&
2749 N1.getValueType() == VT && "Binary operator types must match!");
2751 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2752 assert(N1.getValueType() == VT &&
2753 N1.getValueType().isFloatingPoint() &&
2754 N2.getValueType().isFloatingPoint() &&
2755 "Invalid FCOPYSIGN!");
2762 assert(VT == N1.getValueType() &&
2763 "Shift operators return type must be the same as their first arg");
2764 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2765 "Shifts only work on integers");
2766 // Verify that the shift amount VT is bit enough to hold valid shift
2767 // amounts. This catches things like trying to shift an i1024 value by an
2768 // i8, which is easy to fall into in generic code that uses
2769 // TLI.getShiftAmount().
2770 assert(N2.getValueType().getSizeInBits() >=
2771 Log2_32_Ceil(N1.getValueType().getSizeInBits()) &&
2772 "Invalid use of small shift amount with oversized value!");
2774 // Always fold shifts of i1 values so the code generator doesn't need to
2775 // handle them. Since we know the size of the shift has to be less than the
2776 // size of the value, the shift/rotate count is guaranteed to be zero.
2779 if (N2C && N2C->isNullValue())
2782 case ISD::FP_ROUND_INREG: {
2783 EVT EVT = cast<VTSDNode>(N2)->getVT();
2784 assert(VT == N1.getValueType() && "Not an inreg round!");
2785 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2786 "Cannot FP_ROUND_INREG integer types");
2787 assert(EVT.isVector() == VT.isVector() &&
2788 "FP_ROUND_INREG type should be vector iff the operand "
2790 assert((!EVT.isVector() ||
2791 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2792 "Vector element counts must match in FP_ROUND_INREG");
2793 assert(EVT.bitsLE(VT) && "Not rounding down!");
2794 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2798 assert(VT.isFloatingPoint() &&
2799 N1.getValueType().isFloatingPoint() &&
2800 VT.bitsLE(N1.getValueType()) &&
2801 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2802 if (N1.getValueType() == VT) return N1; // noop conversion.
2804 case ISD::AssertSext:
2805 case ISD::AssertZext: {
2806 EVT EVT = cast<VTSDNode>(N2)->getVT();
2807 assert(VT == N1.getValueType() && "Not an inreg extend!");
2808 assert(VT.isInteger() && EVT.isInteger() &&
2809 "Cannot *_EXTEND_INREG FP types");
2810 assert(!EVT.isVector() &&
2811 "AssertSExt/AssertZExt type should be the vector element type "
2812 "rather than the vector type!");
2813 assert(EVT.bitsLE(VT) && "Not extending!");
2814 if (VT == EVT) return N1; // noop assertion.
2817 case ISD::SIGN_EXTEND_INREG: {
2818 EVT EVT = cast<VTSDNode>(N2)->getVT();
2819 assert(VT == N1.getValueType() && "Not an inreg extend!");
2820 assert(VT.isInteger() && EVT.isInteger() &&
2821 "Cannot *_EXTEND_INREG FP types");
2822 assert(EVT.isVector() == VT.isVector() &&
2823 "SIGN_EXTEND_INREG type should be vector iff the operand "
2825 assert((!EVT.isVector() ||
2826 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2827 "Vector element counts must match in SIGN_EXTEND_INREG");
2828 assert(EVT.bitsLE(VT) && "Not extending!");
2829 if (EVT == VT) return N1; // Not actually extending
2832 APInt Val = N1C->getAPIntValue();
2833 unsigned FromBits = EVT.getScalarType().getSizeInBits();
2834 Val <<= Val.getBitWidth()-FromBits;
2835 Val = Val.ashr(Val.getBitWidth()-FromBits);
2836 return getConstant(Val, VT);
2840 case ISD::EXTRACT_VECTOR_ELT:
2841 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2842 if (N1.getOpcode() == ISD::UNDEF)
2843 return getUNDEF(VT);
2845 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2846 // expanding copies of large vectors from registers.
2848 N1.getOpcode() == ISD::CONCAT_VECTORS &&
2849 N1.getNumOperands() > 0) {
2851 N1.getOperand(0).getValueType().getVectorNumElements();
2852 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
2853 N1.getOperand(N2C->getZExtValue() / Factor),
2854 getConstant(N2C->getZExtValue() % Factor,
2855 N2.getValueType()));
2858 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2859 // expanding large vector constants.
2860 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
2861 SDValue Elt = N1.getOperand(N2C->getZExtValue());
2862 EVT VEltTy = N1.getValueType().getVectorElementType();
2863 if (Elt.getValueType() != VEltTy) {
2864 // If the vector element type is not legal, the BUILD_VECTOR operands
2865 // are promoted and implicitly truncated. Make that explicit here.
2866 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt);
2869 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT
2870 // result is implicitly extended.
2871 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt);
2876 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2877 // operations are lowered to scalars.
2878 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2879 // If the indices are the same, return the inserted element else
2880 // if the indices are known different, extract the element from
2881 // the original vector.
2882 SDValue N1Op2 = N1.getOperand(2);
2883 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode());
2885 if (N1Op2C && N2C) {
2886 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) {
2887 if (VT == N1.getOperand(1).getValueType())
2888 return N1.getOperand(1);
2890 return getSExtOrTrunc(N1.getOperand(1), DL, VT);
2893 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
2897 case ISD::EXTRACT_ELEMENT:
2898 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
2899 assert(!N1.getValueType().isVector() && !VT.isVector() &&
2900 (N1.getValueType().isInteger() == VT.isInteger()) &&
2901 N1.getValueType() != VT &&
2902 "Wrong types for EXTRACT_ELEMENT!");
2904 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2905 // 64-bit integers into 32-bit parts. Instead of building the extract of
2906 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2907 if (N1.getOpcode() == ISD::BUILD_PAIR)
2908 return N1.getOperand(N2C->getZExtValue());
2910 // EXTRACT_ELEMENT of a constant int is also very common.
2911 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2912 unsigned ElementSize = VT.getSizeInBits();
2913 unsigned Shift = ElementSize * N2C->getZExtValue();
2914 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2915 return getConstant(ShiftedVal.trunc(ElementSize), VT);
2918 case ISD::EXTRACT_SUBVECTOR: {
2920 if (VT.isSimple() && N1.getValueType().isSimple()) {
2921 assert(VT.isVector() && N1.getValueType().isVector() &&
2922 "Extract subvector VTs must be a vectors!");
2923 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() &&
2924 "Extract subvector VTs must have the same element type!");
2925 assert(VT.getSimpleVT() <= N1.getValueType().getSimpleVT() &&
2926 "Extract subvector must be from larger vector to smaller vector!");
2928 if (isa<ConstantSDNode>(Index.getNode())) {
2929 assert((VT.getVectorNumElements() +
2930 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
2931 <= N1.getValueType().getVectorNumElements())
2932 && "Extract subvector overflow!");
2935 // Trivial extraction.
2936 if (VT.getSimpleVT() == N1.getValueType().getSimpleVT())
2945 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
2946 if (SV.getNode()) return SV;
2947 } else { // Cannonicalize constant to RHS if commutative
2948 if (isCommutativeBinOp(Opcode)) {
2949 std::swap(N1C, N2C);
2955 // Constant fold FP operations.
2956 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
2957 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
2959 if (!N2CFP && isCommutativeBinOp(Opcode)) {
2960 // Cannonicalize constant to RHS if commutative
2961 std::swap(N1CFP, N2CFP);
2963 } else if (N2CFP && VT != MVT::ppcf128) {
2964 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
2965 APFloat::opStatus s;
2968 s = V1.add(V2, APFloat::rmNearestTiesToEven);
2969 if (s != APFloat::opInvalidOp)
2970 return getConstantFP(V1, VT);
2973 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
2974 if (s!=APFloat::opInvalidOp)
2975 return getConstantFP(V1, VT);
2978 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
2979 if (s!=APFloat::opInvalidOp)
2980 return getConstantFP(V1, VT);
2983 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
2984 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2985 return getConstantFP(V1, VT);
2988 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
2989 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2990 return getConstantFP(V1, VT);
2992 case ISD::FCOPYSIGN:
2994 return getConstantFP(V1, VT);
3000 // Canonicalize an UNDEF to the RHS, even over a constant.
3001 if (N1.getOpcode() == ISD::UNDEF) {
3002 if (isCommutativeBinOp(Opcode)) {
3006 case ISD::FP_ROUND_INREG:
3007 case ISD::SIGN_EXTEND_INREG:
3013 return N1; // fold op(undef, arg2) -> undef
3021 return getConstant(0, VT); // fold op(undef, arg2) -> 0
3022 // For vectors, we can't easily build an all zero vector, just return
3029 // Fold a bunch of operators when the RHS is undef.
3030 if (N2.getOpcode() == ISD::UNDEF) {
3033 if (N1.getOpcode() == ISD::UNDEF)
3034 // Handle undef ^ undef -> 0 special case. This is a common
3036 return getConstant(0, VT);
3046 return N2; // fold op(arg1, undef) -> undef
3060 return getConstant(0, VT); // fold op(arg1, undef) -> 0
3061 // For vectors, we can't easily build an all zero vector, just return
3066 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
3067 // For vectors, we can't easily build an all one vector, just return
3075 // Memoize this node if possible.
3077 SDVTList VTs = getVTList(VT);
3078 if (VT != MVT::Glue) {
3079 SDValue Ops[] = { N1, N2 };
3080 FoldingSetNodeID ID;
3081 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
3083 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3084 return SDValue(E, 0);
3086 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
3087 CSEMap.InsertNode(N, IP);
3089 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
3092 AllNodes.push_back(N);
3096 return SDValue(N, 0);
3099 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3100 SDValue N1, SDValue N2, SDValue N3) {
3101 // Perform various simplifications.
3102 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
3104 case ISD::CONCAT_VECTORS:
3105 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
3106 // one big BUILD_VECTOR.
3107 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
3108 N2.getOpcode() == ISD::BUILD_VECTOR &&
3109 N3.getOpcode() == ISD::BUILD_VECTOR) {
3110 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
3111 N1.getNode()->op_end());
3112 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
3113 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end());
3114 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
3118 // Use FoldSetCC to simplify SETCC's.
3119 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
3120 if (Simp.getNode()) return Simp;
3125 if (N1C->getZExtValue())
3126 return N2; // select true, X, Y -> X
3128 return N3; // select false, X, Y -> Y
3131 if (N2 == N3) return N2; // select C, X, X -> X
3133 case ISD::VECTOR_SHUFFLE:
3134 llvm_unreachable("should use getVectorShuffle constructor!");
3136 case ISD::INSERT_SUBVECTOR: {
3138 if (VT.isSimple() && N1.getValueType().isSimple()
3139 && N2.getValueType().isSimple()) {
3140 assert(VT.isVector() && N1.getValueType().isVector() &&
3141 N2.getValueType().isVector() &&
3142 "Insert subvector VTs must be a vectors");
3143 assert(VT == N1.getValueType() &&
3144 "Dest and insert subvector source types must match!");
3145 assert(N2.getValueType().getSimpleVT() <= N1.getValueType().getSimpleVT() &&
3146 "Insert subvector must be from smaller vector to larger vector!");
3147 if (isa<ConstantSDNode>(Index.getNode())) {
3148 assert((N2.getValueType().getVectorNumElements() +
3149 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
3150 <= VT.getVectorNumElements())
3151 && "Insert subvector overflow!");
3154 // Trivial insertion.
3155 if (VT.getSimpleVT() == N2.getValueType().getSimpleVT())
3161 // Fold bit_convert nodes from a type to themselves.
3162 if (N1.getValueType() == VT)
3167 // Memoize node if it doesn't produce a flag.
3169 SDVTList VTs = getVTList(VT);
3170 if (VT != MVT::Glue) {
3171 SDValue Ops[] = { N1, N2, N3 };
3172 FoldingSetNodeID ID;
3173 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3175 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3176 return SDValue(E, 0);
3178 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3179 CSEMap.InsertNode(N, IP);
3181 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3184 AllNodes.push_back(N);
3188 return SDValue(N, 0);
3191 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3192 SDValue N1, SDValue N2, SDValue N3,
3194 SDValue Ops[] = { N1, N2, N3, N4 };
3195 return getNode(Opcode, DL, VT, Ops, 4);
3198 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3199 SDValue N1, SDValue N2, SDValue N3,
3200 SDValue N4, SDValue N5) {
3201 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3202 return getNode(Opcode, DL, VT, Ops, 5);
3205 /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
3206 /// the incoming stack arguments to be loaded from the stack.
3207 SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) {
3208 SmallVector<SDValue, 8> ArgChains;
3210 // Include the original chain at the beginning of the list. When this is
3211 // used by target LowerCall hooks, this helps legalize find the
3212 // CALLSEQ_BEGIN node.
3213 ArgChains.push_back(Chain);
3215 // Add a chain value for each stack argument.
3216 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
3217 UE = getEntryNode().getNode()->use_end(); U != UE; ++U)
3218 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
3219 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
3220 if (FI->getIndex() < 0)
3221 ArgChains.push_back(SDValue(L, 1));
3223 // Build a tokenfactor for all the chains.
3224 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other,
3225 &ArgChains[0], ArgChains.size());
3228 /// SplatByte - Distribute ByteVal over NumBits bits.
3229 static APInt SplatByte(unsigned NumBits, uint8_t ByteVal) {
3230 APInt Val = APInt(NumBits, ByteVal);
3232 for (unsigned i = NumBits; i > 8; i >>= 1) {
3233 Val = (Val << Shift) | Val;
3239 /// getMemsetValue - Vectorized representation of the memset value
3241 static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
3243 assert(Value.getOpcode() != ISD::UNDEF);
3245 unsigned NumBits = VT.getScalarType().getSizeInBits();
3246 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
3247 APInt Val = SplatByte(NumBits, C->getZExtValue() & 255);
3249 return DAG.getConstant(Val, VT);
3250 return DAG.getConstantFP(APFloat(Val), VT);
3253 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value);
3255 // Use a multiplication with 0x010101... to extend the input to the
3257 APInt Magic = SplatByte(NumBits, 0x01);
3258 Value = DAG.getNode(ISD::MUL, dl, VT, Value, DAG.getConstant(Magic, VT));
3264 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
3265 /// used when a memcpy is turned into a memset when the source is a constant
3267 static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG,
3268 const TargetLowering &TLI,
3269 std::string &Str, unsigned Offset) {
3270 // Handle vector with all elements zero.
3273 return DAG.getConstant(0, VT);
3274 else if (VT == MVT::f32 || VT == MVT::f64)
3275 return DAG.getConstantFP(0.0, VT);
3276 else if (VT.isVector()) {
3277 unsigned NumElts = VT.getVectorNumElements();
3278 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
3279 return DAG.getNode(ISD::BITCAST, dl, VT,
3280 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(),
3283 llvm_unreachable("Expected type!");
3286 assert(!VT.isVector() && "Can't handle vector type here!");
3287 unsigned NumBits = VT.getSizeInBits();
3288 unsigned MSB = NumBits / 8;
3290 if (TLI.isLittleEndian())
3291 Offset = Offset + MSB - 1;
3292 for (unsigned i = 0; i != MSB; ++i) {
3293 Val = (Val << 8) | (unsigned char)Str[Offset];
3294 Offset += TLI.isLittleEndian() ? -1 : 1;
3296 return DAG.getConstant(Val, VT);
3299 /// getMemBasePlusOffset - Returns base and offset node for the
3301 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
3302 SelectionDAG &DAG) {
3303 EVT VT = Base.getValueType();
3304 return DAG.getNode(ISD::ADD, Base.getDebugLoc(),
3305 VT, Base, DAG.getConstant(Offset, VT));
3308 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
3310 static bool isMemSrcFromString(SDValue Src, std::string &Str) {
3311 unsigned SrcDelta = 0;
3312 GlobalAddressSDNode *G = NULL;
3313 if (Src.getOpcode() == ISD::GlobalAddress)
3314 G = cast<GlobalAddressSDNode>(Src);
3315 else if (Src.getOpcode() == ISD::ADD &&
3316 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
3317 Src.getOperand(1).getOpcode() == ISD::Constant) {
3318 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
3319 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
3324 const GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal());
3325 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false))
3331 /// FindOptimalMemOpLowering - Determines the optimial series memory ops
3332 /// to replace the memset / memcpy. Return true if the number of memory ops
3333 /// is below the threshold. It returns the types of the sequence of
3334 /// memory ops to perform memset / memcpy by reference.
3335 static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps,
3336 unsigned Limit, uint64_t Size,
3337 unsigned DstAlign, unsigned SrcAlign,
3338 bool NonScalarIntSafe,
3341 const TargetLowering &TLI) {
3342 assert((SrcAlign == 0 || SrcAlign >= DstAlign) &&
3343 "Expecting memcpy / memset source to meet alignment requirement!");
3344 // If 'SrcAlign' is zero, that means the memory operation does not need to
3345 // load the value, i.e. memset or memcpy from constant string. Otherwise,
3346 // it's the inferred alignment of the source. 'DstAlign', on the other hand,
3347 // is the specified alignment of the memory operation. If it is zero, that
3348 // means it's possible to change the alignment of the destination.
3349 // 'MemcpyStrSrc' indicates whether the memcpy source is constant so it does
3350 // not need to be loaded.
3351 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign,
3352 NonScalarIntSafe, MemcpyStrSrc,
3353 DAG.getMachineFunction());
3355 if (VT == MVT::Other) {
3356 if (DstAlign >= TLI.getTargetData()->getPointerPrefAlignment() ||
3357 TLI.allowsUnalignedMemoryAccesses(VT)) {
3358 VT = TLI.getPointerTy();
3360 switch (DstAlign & 7) {
3361 case 0: VT = MVT::i64; break;
3362 case 4: VT = MVT::i32; break;
3363 case 2: VT = MVT::i16; break;
3364 default: VT = MVT::i8; break;
3369 while (!TLI.isTypeLegal(LVT))
3370 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1);
3371 assert(LVT.isInteger());
3377 unsigned NumMemOps = 0;
3379 unsigned VTSize = VT.getSizeInBits() / 8;
3380 while (VTSize > Size) {
3381 // For now, only use non-vector load / store's for the left-over pieces.
3382 if (VT.isVector() || VT.isFloatingPoint()) {
3384 while (!TLI.isTypeLegal(VT))
3385 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3386 VTSize = VT.getSizeInBits() / 8;
3388 // This can result in a type that is not legal on the target, e.g.
3389 // 1 or 2 bytes on PPC.
3390 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3395 if (++NumMemOps > Limit)
3397 MemOps.push_back(VT);
3404 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3405 SDValue Chain, SDValue Dst,
3406 SDValue Src, uint64_t Size,
3407 unsigned Align, bool isVol,
3409 MachinePointerInfo DstPtrInfo,
3410 MachinePointerInfo SrcPtrInfo) {
3411 // Turn a memcpy of undef to nop.
3412 if (Src.getOpcode() == ISD::UNDEF)
3415 // Expand memcpy to a series of load and store ops if the size operand falls
3416 // below a certain threshold.
3417 // TODO: In the AlwaysInline case, if the size is big then generate a loop
3418 // rather than maybe a humongous number of loads and stores.
3419 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3420 std::vector<EVT> MemOps;
3421 bool DstAlignCanChange = false;
3422 MachineFunction &MF = DAG.getMachineFunction();
3423 MachineFrameInfo *MFI = MF.getFrameInfo();
3424 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize);
3425 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3426 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3427 DstAlignCanChange = true;
3428 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3429 if (Align > SrcAlign)
3432 bool CopyFromStr = isMemSrcFromString(Src, Str);
3433 bool isZeroStr = CopyFromStr && Str.empty();
3434 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(OptSize);
3436 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3437 (DstAlignCanChange ? 0 : Align),
3438 (isZeroStr ? 0 : SrcAlign),
3439 true, CopyFromStr, DAG, TLI))
3442 if (DstAlignCanChange) {
3443 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3444 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3445 if (NewAlign > Align) {
3446 // Give the stack frame object a larger alignment if needed.
3447 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3448 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3453 SmallVector<SDValue, 8> OutChains;
3454 unsigned NumMemOps = MemOps.size();
3455 uint64_t SrcOff = 0, DstOff = 0;
3456 for (unsigned i = 0; i != NumMemOps; ++i) {
3458 unsigned VTSize = VT.getSizeInBits() / 8;
3459 SDValue Value, Store;
3462 (isZeroStr || (VT.isInteger() && !VT.isVector()))) {
3463 // It's unlikely a store of a vector immediate can be done in a single
3464 // instruction. It would require a load from a constantpool first.
3465 // We only handle zero vectors here.
3466 // FIXME: Handle other cases where store of vector immediate is done in
3467 // a single instruction.
3468 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff);
3469 Store = DAG.getStore(Chain, dl, Value,
3470 getMemBasePlusOffset(Dst, DstOff, DAG),
3471 DstPtrInfo.getWithOffset(DstOff), isVol,
3474 // The type might not be legal for the target. This should only happen
3475 // if the type is smaller than a legal type, as on PPC, so the right
3476 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify
3477 // to Load/Store if NVT==VT.
3478 // FIXME does the case above also need this?
3479 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
3480 assert(NVT.bitsGE(VT));
3481 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain,
3482 getMemBasePlusOffset(Src, SrcOff, DAG),
3483 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false,
3484 MinAlign(SrcAlign, SrcOff));
3485 Store = DAG.getTruncStore(Chain, dl, Value,
3486 getMemBasePlusOffset(Dst, DstOff, DAG),
3487 DstPtrInfo.getWithOffset(DstOff), VT, isVol,
3490 OutChains.push_back(Store);
3495 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3496 &OutChains[0], OutChains.size());
3499 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3500 SDValue Chain, SDValue Dst,
3501 SDValue Src, uint64_t Size,
3502 unsigned Align, bool isVol,
3504 MachinePointerInfo DstPtrInfo,
3505 MachinePointerInfo SrcPtrInfo) {
3506 // Turn a memmove of undef to nop.
3507 if (Src.getOpcode() == ISD::UNDEF)
3510 // Expand memmove to a series of load and store ops if the size operand falls
3511 // below a certain threshold.
3512 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3513 std::vector<EVT> MemOps;
3514 bool DstAlignCanChange = false;
3515 MachineFunction &MF = DAG.getMachineFunction();
3516 MachineFrameInfo *MFI = MF.getFrameInfo();
3517 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize);
3518 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3519 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3520 DstAlignCanChange = true;
3521 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3522 if (Align > SrcAlign)
3524 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(OptSize);
3526 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3527 (DstAlignCanChange ? 0 : Align),
3528 SrcAlign, true, false, DAG, TLI))
3531 if (DstAlignCanChange) {
3532 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3533 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3534 if (NewAlign > Align) {
3535 // Give the stack frame object a larger alignment if needed.
3536 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3537 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3542 uint64_t SrcOff = 0, DstOff = 0;
3543 SmallVector<SDValue, 8> LoadValues;
3544 SmallVector<SDValue, 8> LoadChains;
3545 SmallVector<SDValue, 8> OutChains;
3546 unsigned NumMemOps = MemOps.size();
3547 for (unsigned i = 0; i < NumMemOps; i++) {
3549 unsigned VTSize = VT.getSizeInBits() / 8;
3550 SDValue Value, Store;
3552 Value = DAG.getLoad(VT, dl, Chain,
3553 getMemBasePlusOffset(Src, SrcOff, DAG),
3554 SrcPtrInfo.getWithOffset(SrcOff), isVol,
3556 LoadValues.push_back(Value);
3557 LoadChains.push_back(Value.getValue(1));
3560 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3561 &LoadChains[0], LoadChains.size());
3563 for (unsigned i = 0; i < NumMemOps; i++) {
3565 unsigned VTSize = VT.getSizeInBits() / 8;
3566 SDValue Value, Store;
3568 Store = DAG.getStore(Chain, dl, LoadValues[i],
3569 getMemBasePlusOffset(Dst, DstOff, DAG),
3570 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align);
3571 OutChains.push_back(Store);
3575 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3576 &OutChains[0], OutChains.size());
3579 static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl,
3580 SDValue Chain, SDValue Dst,
3581 SDValue Src, uint64_t Size,
3582 unsigned Align, bool isVol,
3583 MachinePointerInfo DstPtrInfo) {
3584 // Turn a memset of undef to nop.
3585 if (Src.getOpcode() == ISD::UNDEF)
3588 // Expand memset to a series of load/store ops if the size operand
3589 // falls below a certain threshold.
3590 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3591 std::vector<EVT> MemOps;
3592 bool DstAlignCanChange = false;
3593 MachineFunction &MF = DAG.getMachineFunction();
3594 MachineFrameInfo *MFI = MF.getFrameInfo();
3595 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize);
3596 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3597 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3598 DstAlignCanChange = true;
3599 bool NonScalarIntSafe =
3600 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue();
3601 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(OptSize),
3602 Size, (DstAlignCanChange ? 0 : Align), 0,
3603 NonScalarIntSafe, false, DAG, TLI))
3606 if (DstAlignCanChange) {
3607 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3608 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3609 if (NewAlign > Align) {
3610 // Give the stack frame object a larger alignment if needed.
3611 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3612 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3617 SmallVector<SDValue, 8> OutChains;
3618 uint64_t DstOff = 0;
3619 unsigned NumMemOps = MemOps.size();
3621 // Find the largest store and generate the bit pattern for it.
3622 EVT LargestVT = MemOps[0];
3623 for (unsigned i = 1; i < NumMemOps; i++)
3624 if (MemOps[i].bitsGT(LargestVT))
3625 LargestVT = MemOps[i];
3626 SDValue MemSetValue = getMemsetValue(Src, LargestVT, DAG, dl);
3628 for (unsigned i = 0; i < NumMemOps; i++) {
3631 // If this store is smaller than the largest store see whether we can get
3632 // the smaller value for free with a truncate.
3633 SDValue Value = MemSetValue;
3634 if (VT.bitsLT(LargestVT)) {
3635 if (!LargestVT.isVector() && !VT.isVector() &&
3636 TLI.isTruncateFree(LargestVT, VT))
3637 Value = DAG.getNode(ISD::TRUNCATE, dl, VT, MemSetValue);
3639 Value = getMemsetValue(Src, VT, DAG, dl);
3641 assert(Value.getValueType() == VT && "Value with wrong type.");
3642 SDValue Store = DAG.getStore(Chain, dl, Value,
3643 getMemBasePlusOffset(Dst, DstOff, DAG),
3644 DstPtrInfo.getWithOffset(DstOff),
3645 isVol, false, Align);
3646 OutChains.push_back(Store);
3647 DstOff += VT.getSizeInBits() / 8;
3650 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3651 &OutChains[0], OutChains.size());
3654 SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst,
3655 SDValue Src, SDValue Size,
3656 unsigned Align, bool isVol, bool AlwaysInline,
3657 MachinePointerInfo DstPtrInfo,
3658 MachinePointerInfo SrcPtrInfo) {
3660 // Check to see if we should lower the memcpy to loads and stores first.
3661 // For cases within the target-specified limits, this is the best choice.
3662 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3664 // Memcpy with size zero? Just return the original chain.
3665 if (ConstantSize->isNullValue())
3668 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3669 ConstantSize->getZExtValue(),Align,
3670 isVol, false, DstPtrInfo, SrcPtrInfo);
3671 if (Result.getNode())
3675 // Then check to see if we should lower the memcpy with target-specific
3676 // code. If the target chooses to do this, this is the next best.
3678 TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align,
3679 isVol, AlwaysInline,
3680 DstPtrInfo, SrcPtrInfo);
3681 if (Result.getNode())
3684 // If we really need inline code and the target declined to provide it,
3685 // use a (potentially long) sequence of loads and stores.
3687 assert(ConstantSize && "AlwaysInline requires a constant size!");
3688 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3689 ConstantSize->getZExtValue(), Align, isVol,
3690 true, DstPtrInfo, SrcPtrInfo);
3693 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc
3694 // memcpy is not guaranteed to be safe. libc memcpys aren't required to
3695 // respect volatile, so they may do things like read or write memory
3696 // beyond the given memory regions. But fixing this isn't easy, and most
3697 // people don't care.
3699 // Emit a library call.
3700 TargetLowering::ArgListTy Args;
3701 TargetLowering::ArgListEntry Entry;
3702 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3703 Entry.Node = Dst; Args.push_back(Entry);
3704 Entry.Node = Src; Args.push_back(Entry);
3705 Entry.Node = Size; Args.push_back(Entry);
3706 // FIXME: pass in DebugLoc
3707 std::pair<SDValue,SDValue> CallResult =
3708 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3709 false, false, false, false, 0,
3710 TLI.getLibcallCallingConv(RTLIB::MEMCPY), false,
3711 /*isReturnValueUsed=*/false,
3712 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY),
3713 TLI.getPointerTy()),
3715 return CallResult.second;
3718 SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst,
3719 SDValue Src, SDValue Size,
3720 unsigned Align, bool isVol,
3721 MachinePointerInfo DstPtrInfo,
3722 MachinePointerInfo SrcPtrInfo) {
3724 // Check to see if we should lower the memmove to loads and stores first.
3725 // For cases within the target-specified limits, this is the best choice.
3726 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3728 // Memmove with size zero? Just return the original chain.
3729 if (ConstantSize->isNullValue())
3733 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
3734 ConstantSize->getZExtValue(), Align, isVol,
3735 false, DstPtrInfo, SrcPtrInfo);
3736 if (Result.getNode())
3740 // Then check to see if we should lower the memmove with target-specific
3741 // code. If the target chooses to do this, this is the next best.
3743 TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3744 DstPtrInfo, SrcPtrInfo);
3745 if (Result.getNode())
3748 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may
3749 // not be safe. See memcpy above for more details.
3751 // Emit a library call.
3752 TargetLowering::ArgListTy Args;
3753 TargetLowering::ArgListEntry Entry;
3754 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3755 Entry.Node = Dst; Args.push_back(Entry);
3756 Entry.Node = Src; Args.push_back(Entry);
3757 Entry.Node = Size; Args.push_back(Entry);
3758 // FIXME: pass in DebugLoc
3759 std::pair<SDValue,SDValue> CallResult =
3760 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3761 false, false, false, false, 0,
3762 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), false,
3763 /*isReturnValueUsed=*/false,
3764 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE),
3765 TLI.getPointerTy()),
3767 return CallResult.second;
3770 SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst,
3771 SDValue Src, SDValue Size,
3772 unsigned Align, bool isVol,
3773 MachinePointerInfo DstPtrInfo) {
3775 // Check to see if we should lower the memset to stores first.
3776 // For cases within the target-specified limits, this is the best choice.
3777 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3779 // Memset with size zero? Just return the original chain.
3780 if (ConstantSize->isNullValue())
3784 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
3785 Align, isVol, DstPtrInfo);
3787 if (Result.getNode())
3791 // Then check to see if we should lower the memset with target-specific
3792 // code. If the target chooses to do this, this is the next best.
3794 TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3796 if (Result.getNode())
3799 // Emit a library call.
3800 Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext());
3801 TargetLowering::ArgListTy Args;
3802 TargetLowering::ArgListEntry Entry;
3803 Entry.Node = Dst; Entry.Ty = IntPtrTy;
3804 Args.push_back(Entry);
3805 // Extend or truncate the argument to be an i32 value for the call.
3806 if (Src.getValueType().bitsGT(MVT::i32))
3807 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
3809 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
3811 Entry.Ty = Type::getInt32Ty(*getContext());
3812 Entry.isSExt = true;
3813 Args.push_back(Entry);
3815 Entry.Ty = IntPtrTy;
3816 Entry.isSExt = false;
3817 Args.push_back(Entry);
3818 // FIXME: pass in DebugLoc
3819 std::pair<SDValue,SDValue> CallResult =
3820 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3821 false, false, false, false, 0,
3822 TLI.getLibcallCallingConv(RTLIB::MEMSET), false,
3823 /*isReturnValueUsed=*/false,
3824 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET),
3825 TLI.getPointerTy()),
3827 return CallResult.second;
3830 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3831 SDValue Chain, SDValue Ptr, SDValue Cmp,
3832 SDValue Swp, MachinePointerInfo PtrInfo,
3834 AtomicOrdering Ordering,
3835 SynchronizationScope SynchScope) {
3836 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3837 Alignment = getEVTAlignment(MemVT);
3839 MachineFunction &MF = getMachineFunction();
3840 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
3842 // For now, atomics are considered to be volatile always.
3843 // FIXME: Volatile isn't really correct; we should keep track of atomic
3844 // orderings in the memoperand.
3845 Flags |= MachineMemOperand::MOVolatile;
3847 MachineMemOperand *MMO =
3848 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment);
3850 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO,
3851 Ordering, SynchScope);
3854 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3856 SDValue Ptr, SDValue Cmp,
3857 SDValue Swp, MachineMemOperand *MMO,
3858 AtomicOrdering Ordering,
3859 SynchronizationScope SynchScope) {
3860 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
3861 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3863 EVT VT = Cmp.getValueType();
3865 SDVTList VTs = getVTList(VT, MVT::Other);
3866 FoldingSetNodeID ID;
3867 ID.AddInteger(MemVT.getRawBits());
3868 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3869 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3871 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3872 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3873 return SDValue(E, 0);
3875 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
3876 Ptr, Cmp, Swp, MMO, Ordering,
3878 CSEMap.InsertNode(N, IP);
3879 AllNodes.push_back(N);
3880 return SDValue(N, 0);
3883 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3885 SDValue Ptr, SDValue Val,
3886 const Value* PtrVal,
3888 AtomicOrdering Ordering,
3889 SynchronizationScope SynchScope) {
3890 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3891 Alignment = getEVTAlignment(MemVT);
3893 MachineFunction &MF = getMachineFunction();
3894 // A monotonic store does not load; a release store "loads" in the sense
3895 // that other stores cannot be sunk past it.
3896 // (An atomicrmw obviously both loads and stores.)
3897 unsigned Flags = MachineMemOperand::MOStore;
3898 if (Opcode != ISD::ATOMIC_STORE || Ordering > Monotonic)
3899 Flags |= MachineMemOperand::MOLoad;
3901 // For now, atomics are considered to be volatile always.
3902 // FIXME: Volatile isn't really correct; we should keep track of atomic
3903 // orderings in the memoperand.
3904 Flags |= MachineMemOperand::MOVolatile;
3906 MachineMemOperand *MMO =
3907 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
3908 MemVT.getStoreSize(), Alignment);
3910 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO,
3911 Ordering, SynchScope);
3914 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3916 SDValue Ptr, SDValue Val,
3917 MachineMemOperand *MMO,
3918 AtomicOrdering Ordering,
3919 SynchronizationScope SynchScope) {
3920 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
3921 Opcode == ISD::ATOMIC_LOAD_SUB ||
3922 Opcode == ISD::ATOMIC_LOAD_AND ||
3923 Opcode == ISD::ATOMIC_LOAD_OR ||
3924 Opcode == ISD::ATOMIC_LOAD_XOR ||
3925 Opcode == ISD::ATOMIC_LOAD_NAND ||
3926 Opcode == ISD::ATOMIC_LOAD_MIN ||
3927 Opcode == ISD::ATOMIC_LOAD_MAX ||
3928 Opcode == ISD::ATOMIC_LOAD_UMIN ||
3929 Opcode == ISD::ATOMIC_LOAD_UMAX ||
3930 Opcode == ISD::ATOMIC_SWAP ||
3931 Opcode == ISD::ATOMIC_STORE) &&
3932 "Invalid Atomic Op");
3934 EVT VT = Val.getValueType();
3936 SDVTList VTs = Opcode == ISD::ATOMIC_STORE ? getVTList(MVT::Other) :
3937 getVTList(VT, MVT::Other);
3938 FoldingSetNodeID ID;
3939 ID.AddInteger(MemVT.getRawBits());
3940 SDValue Ops[] = {Chain, Ptr, Val};
3941 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3943 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3944 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3945 return SDValue(E, 0);
3947 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
3949 Ordering, SynchScope);
3950 CSEMap.InsertNode(N, IP);
3951 AllNodes.push_back(N);
3952 return SDValue(N, 0);
3955 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3956 EVT VT, SDValue Chain,
3958 const Value* PtrVal,
3960 AtomicOrdering Ordering,
3961 SynchronizationScope SynchScope) {
3962 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3963 Alignment = getEVTAlignment(MemVT);
3965 MachineFunction &MF = getMachineFunction();
3966 // A monotonic load does not store; an acquire load "stores" in the sense
3967 // that other loads cannot be hoisted past it.
3968 unsigned Flags = MachineMemOperand::MOLoad;
3969 if (Ordering > Monotonic)
3970 Flags |= MachineMemOperand::MOStore;
3972 // For now, atomics are considered to be volatile always.
3973 // FIXME: Volatile isn't really correct; we should keep track of atomic
3974 // orderings in the memoperand.
3975 Flags |= MachineMemOperand::MOVolatile;
3977 MachineMemOperand *MMO =
3978 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
3979 MemVT.getStoreSize(), Alignment);
3981 return getAtomic(Opcode, dl, MemVT, VT, Chain, Ptr, MMO,
3982 Ordering, SynchScope);
3985 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3986 EVT VT, SDValue Chain,
3988 MachineMemOperand *MMO,
3989 AtomicOrdering Ordering,
3990 SynchronizationScope SynchScope) {
3991 assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op");
3993 SDVTList VTs = getVTList(VT, MVT::Other);
3994 FoldingSetNodeID ID;
3995 ID.AddInteger(MemVT.getRawBits());
3996 SDValue Ops[] = {Chain, Ptr};
3997 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
3999 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4000 cast<AtomicSDNode>(E)->refineAlignment(MMO);
4001 return SDValue(E, 0);
4003 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
4004 Ptr, MMO, Ordering, SynchScope);
4005 CSEMap.InsertNode(N, IP);
4006 AllNodes.push_back(N);
4007 return SDValue(N, 0);
4010 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
4011 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps,
4016 SmallVector<EVT, 4> VTs;
4017 VTs.reserve(NumOps);
4018 for (unsigned i = 0; i < NumOps; ++i)
4019 VTs.push_back(Ops[i].getValueType());
4020 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps),
4025 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl,
4026 const EVT *VTs, unsigned NumVTs,
4027 const SDValue *Ops, unsigned NumOps,
4028 EVT MemVT, MachinePointerInfo PtrInfo,
4029 unsigned Align, bool Vol,
4030 bool ReadMem, bool WriteMem) {
4031 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps,
4032 MemVT, PtrInfo, Align, Vol,
4037 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
4038 const SDValue *Ops, unsigned NumOps,
4039 EVT MemVT, MachinePointerInfo PtrInfo,
4040 unsigned Align, bool Vol,
4041 bool ReadMem, bool WriteMem) {
4042 if (Align == 0) // Ensure that codegen never sees alignment 0
4043 Align = getEVTAlignment(MemVT);
4045 MachineFunction &MF = getMachineFunction();
4048 Flags |= MachineMemOperand::MOStore;
4050 Flags |= MachineMemOperand::MOLoad;
4052 Flags |= MachineMemOperand::MOVolatile;
4053 MachineMemOperand *MMO =
4054 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Align);
4056 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO);
4060 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
4061 const SDValue *Ops, unsigned NumOps,
4062 EVT MemVT, MachineMemOperand *MMO) {
4063 assert((Opcode == ISD::INTRINSIC_VOID ||
4064 Opcode == ISD::INTRINSIC_W_CHAIN ||
4065 Opcode == ISD::PREFETCH ||
4066 (Opcode <= INT_MAX &&
4067 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) &&
4068 "Opcode is not a memory-accessing opcode!");
4070 // Memoize the node unless it returns a flag.
4071 MemIntrinsicSDNode *N;
4072 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
4073 FoldingSetNodeID ID;
4074 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4076 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4077 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO);
4078 return SDValue(E, 0);
4081 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
4083 CSEMap.InsertNode(N, IP);
4085 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
4088 AllNodes.push_back(N);
4089 return SDValue(N, 0);
4092 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4093 /// MachinePointerInfo record from it. This is particularly useful because the
4094 /// code generator has many cases where it doesn't bother passing in a
4095 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4096 static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) {
4097 // If this is FI+Offset, we can model it.
4098 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr))
4099 return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset);
4101 // If this is (FI+Offset1)+Offset2, we can model it.
4102 if (Ptr.getOpcode() != ISD::ADD ||
4103 !isa<ConstantSDNode>(Ptr.getOperand(1)) ||
4104 !isa<FrameIndexSDNode>(Ptr.getOperand(0)))
4105 return MachinePointerInfo();
4107 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
4108 return MachinePointerInfo::getFixedStack(FI, Offset+
4109 cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue());
4112 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4113 /// MachinePointerInfo record from it. This is particularly useful because the
4114 /// code generator has many cases where it doesn't bother passing in a
4115 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4116 static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) {
4117 // If the 'Offset' value isn't a constant, we can't handle this.
4118 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp))
4119 return InferPointerInfo(Ptr, OffsetNode->getSExtValue());
4120 if (OffsetOp.getOpcode() == ISD::UNDEF)
4121 return InferPointerInfo(Ptr);
4122 return MachinePointerInfo();
4127 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4128 EVT VT, DebugLoc dl, SDValue Chain,
4129 SDValue Ptr, SDValue Offset,
4130 MachinePointerInfo PtrInfo, EVT MemVT,
4131 bool isVolatile, bool isNonTemporal,
4132 unsigned Alignment, const MDNode *TBAAInfo) {
4133 assert(Chain.getValueType() == MVT::Other &&
4134 "Invalid chain type");
4135 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4136 Alignment = getEVTAlignment(VT);
4138 unsigned Flags = MachineMemOperand::MOLoad;
4140 Flags |= MachineMemOperand::MOVolatile;
4142 Flags |= MachineMemOperand::MONonTemporal;
4144 // If we don't have a PtrInfo, infer the trivial frame index case to simplify
4147 PtrInfo = InferPointerInfo(Ptr, Offset);
4149 MachineFunction &MF = getMachineFunction();
4150 MachineMemOperand *MMO =
4151 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment,
4153 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO);
4157 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4158 EVT VT, DebugLoc dl, SDValue Chain,
4159 SDValue Ptr, SDValue Offset, EVT MemVT,
4160 MachineMemOperand *MMO) {
4162 ExtType = ISD::NON_EXTLOAD;
4163 } else if (ExtType == ISD::NON_EXTLOAD) {
4164 assert(VT == MemVT && "Non-extending load from different memory type!");
4167 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) &&
4168 "Should only be an extending load, not truncating!");
4169 assert(VT.isInteger() == MemVT.isInteger() &&
4170 "Cannot convert from FP to Int or Int -> FP!");
4171 assert(VT.isVector() == MemVT.isVector() &&
4172 "Cannot use trunc store to convert to or from a vector!");
4173 assert((!VT.isVector() ||
4174 VT.getVectorNumElements() == MemVT.getVectorNumElements()) &&
4175 "Cannot use trunc store to change the number of vector elements!");
4178 bool Indexed = AM != ISD::UNINDEXED;
4179 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
4180 "Unindexed load with an offset!");
4182 SDVTList VTs = Indexed ?
4183 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
4184 SDValue Ops[] = { Chain, Ptr, Offset };
4185 FoldingSetNodeID ID;
4186 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
4187 ID.AddInteger(MemVT.getRawBits());
4188 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(),
4189 MMO->isNonTemporal()));
4191 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4192 cast<LoadSDNode>(E)->refineAlignment(MMO);
4193 return SDValue(E, 0);
4195 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType,
4197 CSEMap.InsertNode(N, IP);
4198 AllNodes.push_back(N);
4199 return SDValue(N, 0);
4202 SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl,
4203 SDValue Chain, SDValue Ptr,
4204 MachinePointerInfo PtrInfo,
4205 bool isVolatile, bool isNonTemporal,
4206 unsigned Alignment, const MDNode *TBAAInfo) {
4207 SDValue Undef = getUNDEF(Ptr.getValueType());
4208 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
4209 PtrInfo, VT, isVolatile, isNonTemporal, Alignment, TBAAInfo);
4212 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT,
4213 SDValue Chain, SDValue Ptr,
4214 MachinePointerInfo PtrInfo, EVT MemVT,
4215 bool isVolatile, bool isNonTemporal,
4216 unsigned Alignment, const MDNode *TBAAInfo) {
4217 SDValue Undef = getUNDEF(Ptr.getValueType());
4218 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
4219 PtrInfo, MemVT, isVolatile, isNonTemporal, Alignment,
4225 SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base,
4226 SDValue Offset, ISD::MemIndexedMode AM) {
4227 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
4228 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
4229 "Load is already a indexed load!");
4230 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl,
4231 LD->getChain(), Base, Offset, LD->getPointerInfo(),
4233 LD->isVolatile(), LD->isNonTemporal(), LD->getAlignment());
4236 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4237 SDValue Ptr, MachinePointerInfo PtrInfo,
4238 bool isVolatile, bool isNonTemporal,
4239 unsigned Alignment, const MDNode *TBAAInfo) {
4240 assert(Chain.getValueType() == MVT::Other &&
4241 "Invalid chain type");
4242 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4243 Alignment = getEVTAlignment(Val.getValueType());
4245 unsigned Flags = MachineMemOperand::MOStore;
4247 Flags |= MachineMemOperand::MOVolatile;
4249 Flags |= MachineMemOperand::MONonTemporal;
4252 PtrInfo = InferPointerInfo(Ptr);
4254 MachineFunction &MF = getMachineFunction();
4255 MachineMemOperand *MMO =
4256 MF.getMachineMemOperand(PtrInfo, Flags,
4257 Val.getValueType().getStoreSize(), Alignment,
4260 return getStore(Chain, dl, Val, Ptr, MMO);
4263 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4264 SDValue Ptr, MachineMemOperand *MMO) {
4265 assert(Chain.getValueType() == MVT::Other &&
4266 "Invalid chain type");
4267 EVT VT = Val.getValueType();
4268 SDVTList VTs = getVTList(MVT::Other);
4269 SDValue Undef = getUNDEF(Ptr.getValueType());
4270 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4271 FoldingSetNodeID ID;
4272 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4273 ID.AddInteger(VT.getRawBits());
4274 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
4275 MMO->isNonTemporal()));
4277 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4278 cast<StoreSDNode>(E)->refineAlignment(MMO);
4279 return SDValue(E, 0);
4281 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4283 CSEMap.InsertNode(N, IP);
4284 AllNodes.push_back(N);
4285 return SDValue(N, 0);
4288 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4289 SDValue Ptr, MachinePointerInfo PtrInfo,
4290 EVT SVT,bool isVolatile, bool isNonTemporal,
4292 const MDNode *TBAAInfo) {
4293 assert(Chain.getValueType() == MVT::Other &&
4294 "Invalid chain type");
4295 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4296 Alignment = getEVTAlignment(SVT);
4298 unsigned Flags = MachineMemOperand::MOStore;
4300 Flags |= MachineMemOperand::MOVolatile;
4302 Flags |= MachineMemOperand::MONonTemporal;
4305 PtrInfo = InferPointerInfo(Ptr);
4307 MachineFunction &MF = getMachineFunction();
4308 MachineMemOperand *MMO =
4309 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment,
4312 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO);
4315 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4316 SDValue Ptr, EVT SVT,
4317 MachineMemOperand *MMO) {
4318 EVT VT = Val.getValueType();
4320 assert(Chain.getValueType() == MVT::Other &&
4321 "Invalid chain type");
4323 return getStore(Chain, dl, Val, Ptr, MMO);
4325 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) &&
4326 "Should only be a truncating store, not extending!");
4327 assert(VT.isInteger() == SVT.isInteger() &&
4328 "Can't do FP-INT conversion!");
4329 assert(VT.isVector() == SVT.isVector() &&
4330 "Cannot use trunc store to convert to or from a vector!");
4331 assert((!VT.isVector() ||
4332 VT.getVectorNumElements() == SVT.getVectorNumElements()) &&
4333 "Cannot use trunc store to change the number of vector elements!");
4335 SDVTList VTs = getVTList(MVT::Other);
4336 SDValue Undef = getUNDEF(Ptr.getValueType());
4337 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4338 FoldingSetNodeID ID;
4339 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4340 ID.AddInteger(SVT.getRawBits());
4341 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(),
4342 MMO->isNonTemporal()));
4344 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4345 cast<StoreSDNode>(E)->refineAlignment(MMO);
4346 return SDValue(E, 0);
4348 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4350 CSEMap.InsertNode(N, IP);
4351 AllNodes.push_back(N);
4352 return SDValue(N, 0);
4356 SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base,
4357 SDValue Offset, ISD::MemIndexedMode AM) {
4358 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
4359 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
4360 "Store is already a indexed store!");
4361 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
4362 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
4363 FoldingSetNodeID ID;
4364 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4365 ID.AddInteger(ST->getMemoryVT().getRawBits());
4366 ID.AddInteger(ST->getRawSubclassData());
4368 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4369 return SDValue(E, 0);
4371 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM,
4372 ST->isTruncatingStore(),
4374 ST->getMemOperand());
4375 CSEMap.InsertNode(N, IP);
4376 AllNodes.push_back(N);
4377 return SDValue(N, 0);
4380 SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl,
4381 SDValue Chain, SDValue Ptr,
4384 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) };
4385 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 4);
4388 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4389 const SDUse *Ops, unsigned NumOps) {
4391 case 0: return getNode(Opcode, DL, VT);
4392 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4393 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4394 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4398 // Copy from an SDUse array into an SDValue array for use with
4399 // the regular getNode logic.
4400 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
4401 return getNode(Opcode, DL, VT, &NewOps[0], NumOps);
4404 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4405 const SDValue *Ops, unsigned NumOps) {
4407 case 0: return getNode(Opcode, DL, VT);
4408 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4409 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4410 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4416 case ISD::SELECT_CC: {
4417 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
4418 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
4419 "LHS and RHS of condition must have same type!");
4420 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4421 "True and False arms of SelectCC must have same type!");
4422 assert(Ops[2].getValueType() == VT &&
4423 "select_cc node must be of same type as true and false value!");
4427 assert(NumOps == 5 && "BR_CC takes 5 operands!");
4428 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4429 "LHS/RHS of comparison should match types!");
4436 SDVTList VTs = getVTList(VT);
4438 if (VT != MVT::Glue) {
4439 FoldingSetNodeID ID;
4440 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
4443 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4444 return SDValue(E, 0);
4446 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4447 CSEMap.InsertNode(N, IP);
4449 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4452 AllNodes.push_back(N);
4456 return SDValue(N, 0);
4459 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4460 const std::vector<EVT> &ResultTys,
4461 const SDValue *Ops, unsigned NumOps) {
4462 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()),
4466 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4467 const EVT *VTs, unsigned NumVTs,
4468 const SDValue *Ops, unsigned NumOps) {
4470 return getNode(Opcode, DL, VTs[0], Ops, NumOps);
4471 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps);
4474 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4475 const SDValue *Ops, unsigned NumOps) {
4476 if (VTList.NumVTs == 1)
4477 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps);
4481 // FIXME: figure out how to safely handle things like
4482 // int foo(int x) { return 1 << (x & 255); }
4483 // int bar() { return foo(256); }
4484 case ISD::SRA_PARTS:
4485 case ISD::SRL_PARTS:
4486 case ISD::SHL_PARTS:
4487 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
4488 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
4489 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4490 else if (N3.getOpcode() == ISD::AND)
4491 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
4492 // If the and is only masking out bits that cannot effect the shift,
4493 // eliminate the and.
4494 unsigned NumBits = VT.getScalarType().getSizeInBits()*2;
4495 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
4496 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4502 // Memoize the node unless it returns a flag.
4504 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
4505 FoldingSetNodeID ID;
4506 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4508 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4509 return SDValue(E, 0);
4512 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4513 } else if (NumOps == 2) {
4514 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4515 } else if (NumOps == 3) {
4516 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4519 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4521 CSEMap.InsertNode(N, IP);
4524 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4525 } else if (NumOps == 2) {
4526 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4527 } else if (NumOps == 3) {
4528 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4531 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4534 AllNodes.push_back(N);
4538 return SDValue(N, 0);
4541 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) {
4542 return getNode(Opcode, DL, VTList, 0, 0);
4545 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4547 SDValue Ops[] = { N1 };
4548 return getNode(Opcode, DL, VTList, Ops, 1);
4551 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4552 SDValue N1, SDValue N2) {
4553 SDValue Ops[] = { N1, N2 };
4554 return getNode(Opcode, DL, VTList, Ops, 2);
4557 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4558 SDValue N1, SDValue N2, SDValue N3) {
4559 SDValue Ops[] = { N1, N2, N3 };
4560 return getNode(Opcode, DL, VTList, Ops, 3);
4563 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4564 SDValue N1, SDValue N2, SDValue N3,
4566 SDValue Ops[] = { N1, N2, N3, N4 };
4567 return getNode(Opcode, DL, VTList, Ops, 4);
4570 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4571 SDValue N1, SDValue N2, SDValue N3,
4572 SDValue N4, SDValue N5) {
4573 SDValue Ops[] = { N1, N2, N3, N4, N5 };
4574 return getNode(Opcode, DL, VTList, Ops, 5);
4577 SDVTList SelectionDAG::getVTList(EVT VT) {
4578 return makeVTList(SDNode::getValueTypeList(VT), 1);
4581 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
4582 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4583 E = VTList.rend(); I != E; ++I)
4584 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
4587 EVT *Array = Allocator.Allocate<EVT>(2);
4590 SDVTList Result = makeVTList(Array, 2);
4591 VTList.push_back(Result);
4595 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
4596 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4597 E = VTList.rend(); I != E; ++I)
4598 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4602 EVT *Array = Allocator.Allocate<EVT>(3);
4606 SDVTList Result = makeVTList(Array, 3);
4607 VTList.push_back(Result);
4611 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
4612 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4613 E = VTList.rend(); I != E; ++I)
4614 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4615 I->VTs[2] == VT3 && I->VTs[3] == VT4)
4618 EVT *Array = Allocator.Allocate<EVT>(4);
4623 SDVTList Result = makeVTList(Array, 4);
4624 VTList.push_back(Result);
4628 SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) {
4630 case 0: llvm_unreachable("Cannot have nodes without results!");
4631 case 1: return getVTList(VTs[0]);
4632 case 2: return getVTList(VTs[0], VTs[1]);
4633 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
4634 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]);
4638 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4639 E = VTList.rend(); I != E; ++I) {
4640 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
4643 bool NoMatch = false;
4644 for (unsigned i = 2; i != NumVTs; ++i)
4645 if (VTs[i] != I->VTs[i]) {
4653 EVT *Array = Allocator.Allocate<EVT>(NumVTs);
4654 std::copy(VTs, VTs+NumVTs, Array);
4655 SDVTList Result = makeVTList(Array, NumVTs);
4656 VTList.push_back(Result);
4661 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
4662 /// specified operands. If the resultant node already exists in the DAG,
4663 /// this does not modify the specified node, instead it returns the node that
4664 /// already exists. If the resultant node does not exist in the DAG, the
4665 /// input node is returned. As a degenerate case, if you specify the same
4666 /// input operands as the node already has, the input node is returned.
4667 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) {
4668 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
4670 // Check to see if there is no change.
4671 if (Op == N->getOperand(0)) return N;
4673 // See if the modified node already exists.
4674 void *InsertPos = 0;
4675 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
4678 // Nope it doesn't. Remove the node from its current place in the maps.
4680 if (!RemoveNodeFromCSEMaps(N))
4683 // Now we update the operands.
4684 N->OperandList[0].set(Op);
4686 // If this gets put into a CSE map, add it.
4687 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4691 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) {
4692 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
4694 // Check to see if there is no change.
4695 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
4696 return N; // No operands changed, just return the input node.
4698 // See if the modified node already exists.
4699 void *InsertPos = 0;
4700 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
4703 // Nope it doesn't. Remove the node from its current place in the maps.
4705 if (!RemoveNodeFromCSEMaps(N))
4708 // Now we update the operands.
4709 if (N->OperandList[0] != Op1)
4710 N->OperandList[0].set(Op1);
4711 if (N->OperandList[1] != Op2)
4712 N->OperandList[1].set(Op2);
4714 // If this gets put into a CSE map, add it.
4715 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4719 SDNode *SelectionDAG::
4720 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) {
4721 SDValue Ops[] = { Op1, Op2, Op3 };
4722 return UpdateNodeOperands(N, Ops, 3);
4725 SDNode *SelectionDAG::
4726 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
4727 SDValue Op3, SDValue Op4) {
4728 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
4729 return UpdateNodeOperands(N, Ops, 4);
4732 SDNode *SelectionDAG::
4733 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
4734 SDValue Op3, SDValue Op4, SDValue Op5) {
4735 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
4736 return UpdateNodeOperands(N, Ops, 5);
4739 SDNode *SelectionDAG::
4740 UpdateNodeOperands(SDNode *N, const SDValue *Ops, unsigned NumOps) {
4741 assert(N->getNumOperands() == NumOps &&
4742 "Update with wrong number of operands");
4744 // Check to see if there is no change.
4745 bool AnyChange = false;
4746 for (unsigned i = 0; i != NumOps; ++i) {
4747 if (Ops[i] != N->getOperand(i)) {
4753 // No operands changed, just return the input node.
4754 if (!AnyChange) return N;
4756 // See if the modified node already exists.
4757 void *InsertPos = 0;
4758 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
4761 // Nope it doesn't. Remove the node from its current place in the maps.
4763 if (!RemoveNodeFromCSEMaps(N))
4766 // Now we update the operands.
4767 for (unsigned i = 0; i != NumOps; ++i)
4768 if (N->OperandList[i] != Ops[i])
4769 N->OperandList[i].set(Ops[i]);
4771 // If this gets put into a CSE map, add it.
4772 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4776 /// DropOperands - Release the operands and set this node to have
4778 void SDNode::DropOperands() {
4779 // Unlike the code in MorphNodeTo that does this, we don't need to
4780 // watch for dead nodes here.
4781 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
4787 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
4790 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4792 SDVTList VTs = getVTList(VT);
4793 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
4796 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4797 EVT VT, SDValue Op1) {
4798 SDVTList VTs = getVTList(VT);
4799 SDValue Ops[] = { Op1 };
4800 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4803 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4804 EVT VT, SDValue Op1,
4806 SDVTList VTs = getVTList(VT);
4807 SDValue Ops[] = { Op1, Op2 };
4808 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4811 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4812 EVT VT, SDValue Op1,
4813 SDValue Op2, SDValue Op3) {
4814 SDVTList VTs = getVTList(VT);
4815 SDValue Ops[] = { Op1, Op2, Op3 };
4816 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4819 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4820 EVT VT, const SDValue *Ops,
4822 SDVTList VTs = getVTList(VT);
4823 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4826 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4827 EVT VT1, EVT VT2, const SDValue *Ops,
4829 SDVTList VTs = getVTList(VT1, VT2);
4830 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4833 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4835 SDVTList VTs = getVTList(VT1, VT2);
4836 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
4839 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4840 EVT VT1, EVT VT2, EVT VT3,
4841 const SDValue *Ops, unsigned NumOps) {
4842 SDVTList VTs = getVTList(VT1, VT2, VT3);
4843 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4846 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4847 EVT VT1, EVT VT2, EVT VT3, EVT VT4,
4848 const SDValue *Ops, unsigned NumOps) {
4849 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4850 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4853 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4856 SDVTList VTs = getVTList(VT1, VT2);
4857 SDValue Ops[] = { Op1 };
4858 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4861 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4863 SDValue Op1, SDValue Op2) {
4864 SDVTList VTs = getVTList(VT1, VT2);
4865 SDValue Ops[] = { Op1, Op2 };
4866 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4869 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4871 SDValue Op1, SDValue Op2,
4873 SDVTList VTs = getVTList(VT1, VT2);
4874 SDValue Ops[] = { Op1, Op2, Op3 };
4875 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4878 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4879 EVT VT1, EVT VT2, EVT VT3,
4880 SDValue Op1, SDValue Op2,
4882 SDVTList VTs = getVTList(VT1, VT2, VT3);
4883 SDValue Ops[] = { Op1, Op2, Op3 };
4884 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4887 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4888 SDVTList VTs, const SDValue *Ops,
4890 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
4891 // Reset the NodeID to -1.
4896 /// MorphNodeTo - This *mutates* the specified node to have the specified
4897 /// return type, opcode, and operands.
4899 /// Note that MorphNodeTo returns the resultant node. If there is already a
4900 /// node of the specified opcode and operands, it returns that node instead of
4901 /// the current one. Note that the DebugLoc need not be the same.
4903 /// Using MorphNodeTo is faster than creating a new node and swapping it in
4904 /// with ReplaceAllUsesWith both because it often avoids allocating a new
4905 /// node, and because it doesn't require CSE recalculation for any of
4906 /// the node's users.
4908 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4909 SDVTList VTs, const SDValue *Ops,
4911 // If an identical node already exists, use it.
4913 if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) {
4914 FoldingSetNodeID ID;
4915 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
4916 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
4920 if (!RemoveNodeFromCSEMaps(N))
4923 // Start the morphing.
4925 N->ValueList = VTs.VTs;
4926 N->NumValues = VTs.NumVTs;
4928 // Clear the operands list, updating used nodes to remove this from their
4929 // use list. Keep track of any operands that become dead as a result.
4930 SmallPtrSet<SDNode*, 16> DeadNodeSet;
4931 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
4933 SDNode *Used = Use.getNode();
4935 if (Used->use_empty())
4936 DeadNodeSet.insert(Used);
4939 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) {
4940 // Initialize the memory references information.
4941 MN->setMemRefs(0, 0);
4942 // If NumOps is larger than the # of operands we can have in a
4943 // MachineSDNode, reallocate the operand list.
4944 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) {
4945 if (MN->OperandsNeedDelete)
4946 delete[] MN->OperandList;
4947 if (NumOps > array_lengthof(MN->LocalOperands))
4948 // We're creating a final node that will live unmorphed for the
4949 // remainder of the current SelectionDAG iteration, so we can allocate
4950 // the operands directly out of a pool with no recycling metadata.
4951 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
4954 MN->InitOperands(MN->LocalOperands, Ops, NumOps);
4955 MN->OperandsNeedDelete = false;
4957 MN->InitOperands(MN->OperandList, Ops, NumOps);
4959 // If NumOps is larger than the # of operands we currently have, reallocate
4960 // the operand list.
4961 if (NumOps > N->NumOperands) {
4962 if (N->OperandsNeedDelete)
4963 delete[] N->OperandList;
4964 N->InitOperands(new SDUse[NumOps], Ops, NumOps);
4965 N->OperandsNeedDelete = true;
4967 N->InitOperands(N->OperandList, Ops, NumOps);
4970 // Delete any nodes that are still dead after adding the uses for the
4972 if (!DeadNodeSet.empty()) {
4973 SmallVector<SDNode *, 16> DeadNodes;
4974 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
4975 E = DeadNodeSet.end(); I != E; ++I)
4976 if ((*I)->use_empty())
4977 DeadNodes.push_back(*I);
4978 RemoveDeadNodes(DeadNodes);
4982 CSEMap.InsertNode(N, IP); // Memoize the new node.
4987 /// getMachineNode - These are used for target selectors to create a new node
4988 /// with specified return type(s), MachineInstr opcode, and operands.
4990 /// Note that getMachineNode returns the resultant node. If there is already a
4991 /// node of the specified opcode and operands, it returns that node instead of
4992 /// the current one.
4994 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) {
4995 SDVTList VTs = getVTList(VT);
4996 return getMachineNode(Opcode, dl, VTs, 0, 0);
5000 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) {
5001 SDVTList VTs = getVTList(VT);
5002 SDValue Ops[] = { Op1 };
5003 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5007 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
5008 SDValue Op1, SDValue Op2) {
5009 SDVTList VTs = getVTList(VT);
5010 SDValue Ops[] = { Op1, Op2 };
5011 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5015 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
5016 SDValue Op1, SDValue Op2, SDValue Op3) {
5017 SDVTList VTs = getVTList(VT);
5018 SDValue Ops[] = { Op1, Op2, Op3 };
5019 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5023 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
5024 const SDValue *Ops, unsigned NumOps) {
5025 SDVTList VTs = getVTList(VT);
5026 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5030 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) {
5031 SDVTList VTs = getVTList(VT1, VT2);
5032 return getMachineNode(Opcode, dl, VTs, 0, 0);
5036 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5037 EVT VT1, EVT VT2, SDValue Op1) {
5038 SDVTList VTs = getVTList(VT1, VT2);
5039 SDValue Ops[] = { Op1 };
5040 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5044 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5045 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) {
5046 SDVTList VTs = getVTList(VT1, VT2);
5047 SDValue Ops[] = { Op1, Op2 };
5048 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5052 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5053 EVT VT1, EVT VT2, SDValue Op1,
5054 SDValue Op2, SDValue Op3) {
5055 SDVTList VTs = getVTList(VT1, VT2);
5056 SDValue Ops[] = { Op1, Op2, Op3 };
5057 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5061 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5063 const SDValue *Ops, unsigned NumOps) {
5064 SDVTList VTs = getVTList(VT1, VT2);
5065 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5069 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5070 EVT VT1, EVT VT2, EVT VT3,
5071 SDValue Op1, SDValue Op2) {
5072 SDVTList VTs = getVTList(VT1, VT2, VT3);
5073 SDValue Ops[] = { Op1, Op2 };
5074 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5078 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5079 EVT VT1, EVT VT2, EVT VT3,
5080 SDValue Op1, SDValue Op2, SDValue Op3) {
5081 SDVTList VTs = getVTList(VT1, VT2, VT3);
5082 SDValue Ops[] = { Op1, Op2, Op3 };
5083 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5087 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5088 EVT VT1, EVT VT2, EVT VT3,
5089 const SDValue *Ops, unsigned NumOps) {
5090 SDVTList VTs = getVTList(VT1, VT2, VT3);
5091 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5095 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1,
5096 EVT VT2, EVT VT3, EVT VT4,
5097 const SDValue *Ops, unsigned NumOps) {
5098 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
5099 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5103 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5104 const std::vector<EVT> &ResultTys,
5105 const SDValue *Ops, unsigned NumOps) {
5106 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size());
5107 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5111 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs,
5112 const SDValue *Ops, unsigned NumOps) {
5113 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue;
5118 FoldingSetNodeID ID;
5119 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps);
5121 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
5122 return cast<MachineSDNode>(E);
5125 // Allocate a new MachineSDNode.
5126 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs);
5128 // Initialize the operands list.
5129 if (NumOps > array_lengthof(N->LocalOperands))
5130 // We're creating a final node that will live unmorphed for the
5131 // remainder of the current SelectionDAG iteration, so we can allocate
5132 // the operands directly out of a pool with no recycling metadata.
5133 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
5136 N->InitOperands(N->LocalOperands, Ops, NumOps);
5137 N->OperandsNeedDelete = false;
5140 CSEMap.InsertNode(N, IP);
5142 AllNodes.push_back(N);
5144 VerifyMachineNode(N);
5149 /// getTargetExtractSubreg - A convenience function for creating
5150 /// TargetOpcode::EXTRACT_SUBREG nodes.
5152 SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT,
5154 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
5155 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL,
5156 VT, Operand, SRIdxVal);
5157 return SDValue(Subreg, 0);
5160 /// getTargetInsertSubreg - A convenience function for creating
5161 /// TargetOpcode::INSERT_SUBREG nodes.
5163 SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT,
5164 SDValue Operand, SDValue Subreg) {
5165 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
5166 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL,
5167 VT, Operand, Subreg, SRIdxVal);
5168 return SDValue(Result, 0);
5171 /// getNodeIfExists - Get the specified node if it's already available, or
5172 /// else return NULL.
5173 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
5174 const SDValue *Ops, unsigned NumOps) {
5175 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
5176 FoldingSetNodeID ID;
5177 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
5179 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
5185 /// getDbgValue - Creates a SDDbgValue node.
5188 SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off,
5189 DebugLoc DL, unsigned O) {
5190 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O);
5194 SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off,
5195 DebugLoc DL, unsigned O) {
5196 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O);
5200 SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off,
5201 DebugLoc DL, unsigned O) {
5202 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O);
5207 /// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node
5208 /// pointed to by a use iterator is deleted, increment the use iterator
5209 /// so that it doesn't dangle.
5211 /// This class also manages a "downlink" DAGUpdateListener, to forward
5212 /// messages to ReplaceAllUsesWith's callers.
5214 class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener {
5215 SelectionDAG::DAGUpdateListener *DownLink;
5216 SDNode::use_iterator &UI;
5217 SDNode::use_iterator &UE;
5219 virtual void NodeDeleted(SDNode *N, SDNode *E) {
5220 // Increment the iterator as needed.
5221 while (UI != UE && N == *UI)
5224 // Then forward the message.
5225 if (DownLink) DownLink->NodeDeleted(N, E);
5228 virtual void NodeUpdated(SDNode *N) {
5229 // Just forward the message.
5230 if (DownLink) DownLink->NodeUpdated(N);
5234 RAUWUpdateListener(SelectionDAG::DAGUpdateListener *dl,
5235 SDNode::use_iterator &ui,
5236 SDNode::use_iterator &ue)
5237 : DownLink(dl), UI(ui), UE(ue) {}
5242 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5243 /// This can cause recursive merging of nodes in the DAG.
5245 /// This version assumes From has a single result value.
5247 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To,
5248 DAGUpdateListener *UpdateListener) {
5249 SDNode *From = FromN.getNode();
5250 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
5251 "Cannot replace with this method!");
5252 assert(From != To.getNode() && "Cannot replace uses of with self");
5254 // Iterate over all the existing uses of From. New uses will be added
5255 // to the beginning of the use list, which we avoid visiting.
5256 // This specifically avoids visiting uses of From that arise while the
5257 // replacement is happening, because any such uses would be the result
5258 // of CSE: If an existing node looks like From after one of its operands
5259 // is replaced by To, we don't want to replace of all its users with To
5260 // too. See PR3018 for more info.
5261 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5262 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5266 // This node is about to morph, remove its old self from the CSE maps.
5267 RemoveNodeFromCSEMaps(User);
5269 // A user can appear in a use list multiple times, and when this
5270 // happens the uses are usually next to each other in the list.
5271 // To help reduce the number of CSE recomputations, process all
5272 // the uses of this user that we can find this way.
5274 SDUse &Use = UI.getUse();
5277 } while (UI != UE && *UI == User);
5279 // Now that we have modified User, add it back to the CSE maps. If it
5280 // already exists there, recursively merge the results together.
5281 AddModifiedNodeToCSEMaps(User, &Listener);
5285 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5286 /// This can cause recursive merging of nodes in the DAG.
5288 /// This version assumes that for each value of From, there is a
5289 /// corresponding value in To in the same position with the same type.
5291 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To,
5292 DAGUpdateListener *UpdateListener) {
5294 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
5295 assert((!From->hasAnyUseOfValue(i) ||
5296 From->getValueType(i) == To->getValueType(i)) &&
5297 "Cannot use this version of ReplaceAllUsesWith!");
5300 // Handle the trivial case.
5304 // Iterate over just the existing users of From. See the comments in
5305 // the ReplaceAllUsesWith above.
5306 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5307 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5311 // This node is about to morph, remove its old self from the CSE maps.
5312 RemoveNodeFromCSEMaps(User);
5314 // A user can appear in a use list multiple times, and when this
5315 // happens the uses are usually next to each other in the list.
5316 // To help reduce the number of CSE recomputations, process all
5317 // the uses of this user that we can find this way.
5319 SDUse &Use = UI.getUse();
5322 } while (UI != UE && *UI == User);
5324 // Now that we have modified User, add it back to the CSE maps. If it
5325 // already exists there, recursively merge the results together.
5326 AddModifiedNodeToCSEMaps(User, &Listener);
5330 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5331 /// This can cause recursive merging of nodes in the DAG.
5333 /// This version can replace From with any result values. To must match the
5334 /// number and types of values returned by From.
5335 void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
5337 DAGUpdateListener *UpdateListener) {
5338 if (From->getNumValues() == 1) // Handle the simple case efficiently.
5339 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener);
5341 // Iterate over just the existing users of From. See the comments in
5342 // the ReplaceAllUsesWith above.
5343 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5344 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5348 // This node is about to morph, remove its old self from the CSE maps.
5349 RemoveNodeFromCSEMaps(User);
5351 // A user can appear in a use list multiple times, and when this
5352 // happens the uses are usually next to each other in the list.
5353 // To help reduce the number of CSE recomputations, process all
5354 // the uses of this user that we can find this way.
5356 SDUse &Use = UI.getUse();
5357 const SDValue &ToOp = To[Use.getResNo()];
5360 } while (UI != UE && *UI == User);
5362 // Now that we have modified User, add it back to the CSE maps. If it
5363 // already exists there, recursively merge the results together.
5364 AddModifiedNodeToCSEMaps(User, &Listener);
5368 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
5369 /// uses of other values produced by From.getNode() alone. The Deleted
5370 /// vector is handled the same way as for ReplaceAllUsesWith.
5371 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To,
5372 DAGUpdateListener *UpdateListener){
5373 // Handle the really simple, really trivial case efficiently.
5374 if (From == To) return;
5376 // Handle the simple, trivial, case efficiently.
5377 if (From.getNode()->getNumValues() == 1) {
5378 ReplaceAllUsesWith(From, To, UpdateListener);
5382 // Iterate over just the existing users of From. See the comments in
5383 // the ReplaceAllUsesWith above.
5384 SDNode::use_iterator UI = From.getNode()->use_begin(),
5385 UE = From.getNode()->use_end();
5386 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5389 bool UserRemovedFromCSEMaps = false;
5391 // A user can appear in a use list multiple times, and when this
5392 // happens the uses are usually next to each other in the list.
5393 // To help reduce the number of CSE recomputations, process all
5394 // the uses of this user that we can find this way.
5396 SDUse &Use = UI.getUse();
5398 // Skip uses of different values from the same node.
5399 if (Use.getResNo() != From.getResNo()) {
5404 // If this node hasn't been modified yet, it's still in the CSE maps,
5405 // so remove its old self from the CSE maps.
5406 if (!UserRemovedFromCSEMaps) {
5407 RemoveNodeFromCSEMaps(User);
5408 UserRemovedFromCSEMaps = true;
5413 } while (UI != UE && *UI == User);
5415 // We are iterating over all uses of the From node, so if a use
5416 // doesn't use the specific value, no changes are made.
5417 if (!UserRemovedFromCSEMaps)
5420 // Now that we have modified User, add it back to the CSE maps. If it
5421 // already exists there, recursively merge the results together.
5422 AddModifiedNodeToCSEMaps(User, &Listener);
5427 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
5428 /// to record information about a use.
5435 /// operator< - Sort Memos by User.
5436 bool operator<(const UseMemo &L, const UseMemo &R) {
5437 return (intptr_t)L.User < (intptr_t)R.User;
5441 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
5442 /// uses of other values produced by From.getNode() alone. The same value
5443 /// may appear in both the From and To list. The Deleted vector is
5444 /// handled the same way as for ReplaceAllUsesWith.
5445 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
5448 DAGUpdateListener *UpdateListener){
5449 // Handle the simple, trivial case efficiently.
5451 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener);
5453 // Read up all the uses and make records of them. This helps
5454 // processing new uses that are introduced during the
5455 // replacement process.
5456 SmallVector<UseMemo, 4> Uses;
5457 for (unsigned i = 0; i != Num; ++i) {
5458 unsigned FromResNo = From[i].getResNo();
5459 SDNode *FromNode = From[i].getNode();
5460 for (SDNode::use_iterator UI = FromNode->use_begin(),
5461 E = FromNode->use_end(); UI != E; ++UI) {
5462 SDUse &Use = UI.getUse();
5463 if (Use.getResNo() == FromResNo) {
5464 UseMemo Memo = { *UI, i, &Use };
5465 Uses.push_back(Memo);
5470 // Sort the uses, so that all the uses from a given User are together.
5471 std::sort(Uses.begin(), Uses.end());
5473 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
5474 UseIndex != UseIndexEnd; ) {
5475 // We know that this user uses some value of From. If it is the right
5476 // value, update it.
5477 SDNode *User = Uses[UseIndex].User;
5479 // This node is about to morph, remove its old self from the CSE maps.
5480 RemoveNodeFromCSEMaps(User);
5482 // The Uses array is sorted, so all the uses for a given User
5483 // are next to each other in the list.
5484 // To help reduce the number of CSE recomputations, process all
5485 // the uses of this user that we can find this way.
5487 unsigned i = Uses[UseIndex].Index;
5488 SDUse &Use = *Uses[UseIndex].Use;
5492 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
5494 // Now that we have modified User, add it back to the CSE maps. If it
5495 // already exists there, recursively merge the results together.
5496 AddModifiedNodeToCSEMaps(User, UpdateListener);
5500 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
5501 /// based on their topological order. It returns the maximum id and a vector
5502 /// of the SDNodes* in assigned order by reference.
5503 unsigned SelectionDAG::AssignTopologicalOrder() {
5505 unsigned DAGSize = 0;
5507 // SortedPos tracks the progress of the algorithm. Nodes before it are
5508 // sorted, nodes after it are unsorted. When the algorithm completes
5509 // it is at the end of the list.
5510 allnodes_iterator SortedPos = allnodes_begin();
5512 // Visit all the nodes. Move nodes with no operands to the front of
5513 // the list immediately. Annotate nodes that do have operands with their
5514 // operand count. Before we do this, the Node Id fields of the nodes
5515 // may contain arbitrary values. After, the Node Id fields for nodes
5516 // before SortedPos will contain the topological sort index, and the
5517 // Node Id fields for nodes At SortedPos and after will contain the
5518 // count of outstanding operands.
5519 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
5522 unsigned Degree = N->getNumOperands();
5524 // A node with no uses, add it to the result array immediately.
5525 N->setNodeId(DAGSize++);
5526 allnodes_iterator Q = N;
5528 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
5529 assert(SortedPos != AllNodes.end() && "Overran node list");
5532 // Temporarily use the Node Id as scratch space for the degree count.
5533 N->setNodeId(Degree);
5537 // Visit all the nodes. As we iterate, moves nodes into sorted order,
5538 // such that by the time the end is reached all nodes will be sorted.
5539 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
5542 // N is in sorted position, so all its uses have one less operand
5543 // that needs to be sorted.
5544 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
5547 unsigned Degree = P->getNodeId();
5548 assert(Degree != 0 && "Invalid node degree");
5551 // All of P's operands are sorted, so P may sorted now.
5552 P->setNodeId(DAGSize++);
5554 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
5555 assert(SortedPos != AllNodes.end() && "Overran node list");
5558 // Update P's outstanding operand count.
5559 P->setNodeId(Degree);
5562 if (I == SortedPos) {
5565 dbgs() << "Overran sorted position:\n";
5568 llvm_unreachable(0);
5572 assert(SortedPos == AllNodes.end() &&
5573 "Topological sort incomplete!");
5574 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
5575 "First node in topological sort is not the entry token!");
5576 assert(AllNodes.front().getNodeId() == 0 &&
5577 "First node in topological sort has non-zero id!");
5578 assert(AllNodes.front().getNumOperands() == 0 &&
5579 "First node in topological sort has operands!");
5580 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
5581 "Last node in topologic sort has unexpected id!");
5582 assert(AllNodes.back().use_empty() &&
5583 "Last node in topologic sort has users!");
5584 assert(DAGSize == allnodes_size() && "Node count mismatch!");
5588 /// AssignOrdering - Assign an order to the SDNode.
5589 void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) {
5590 assert(SD && "Trying to assign an order to a null node!");
5591 Ordering->add(SD, Order);
5594 /// GetOrdering - Get the order for the SDNode.
5595 unsigned SelectionDAG::GetOrdering(const SDNode *SD) const {
5596 assert(SD && "Trying to get the order of a null node!");
5597 return Ordering->getOrder(SD);
5600 /// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the
5601 /// value is produced by SD.
5602 void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) {
5603 DbgInfo->add(DB, SD, isParameter);
5605 SD->setHasDebugValue(true);
5608 /// TransferDbgValues - Transfer SDDbgValues.
5609 void SelectionDAG::TransferDbgValues(SDValue From, SDValue To) {
5610 if (From == To || !From.getNode()->getHasDebugValue())
5612 SDNode *FromNode = From.getNode();
5613 SDNode *ToNode = To.getNode();
5614 ArrayRef<SDDbgValue *> DVs = GetDbgValues(FromNode);
5615 SmallVector<SDDbgValue *, 2> ClonedDVs;
5616 for (ArrayRef<SDDbgValue *>::iterator I = DVs.begin(), E = DVs.end();
5618 SDDbgValue *Dbg = *I;
5619 if (Dbg->getKind() == SDDbgValue::SDNODE) {
5620 SDDbgValue *Clone = getDbgValue(Dbg->getMDPtr(), ToNode, To.getResNo(),
5621 Dbg->getOffset(), Dbg->getDebugLoc(),
5623 ClonedDVs.push_back(Clone);
5626 for (SmallVector<SDDbgValue *, 2>::iterator I = ClonedDVs.begin(),
5627 E = ClonedDVs.end(); I != E; ++I)
5628 AddDbgValue(*I, ToNode, false);
5631 //===----------------------------------------------------------------------===//
5633 //===----------------------------------------------------------------------===//
5635 HandleSDNode::~HandleSDNode() {
5639 GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, DebugLoc DL,
5640 const GlobalValue *GA,
5641 EVT VT, int64_t o, unsigned char TF)
5642 : SDNode(Opc, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) {
5646 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt,
5647 MachineMemOperand *mmo)
5648 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) {
5649 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5650 MMO->isNonTemporal());
5651 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5652 assert(isNonTemporal() == MMO->isNonTemporal() &&
5653 "Non-temporal encoding error!");
5654 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5657 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs,
5658 const SDValue *Ops, unsigned NumOps, EVT memvt,
5659 MachineMemOperand *mmo)
5660 : SDNode(Opc, dl, VTs, Ops, NumOps),
5661 MemoryVT(memvt), MMO(mmo) {
5662 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5663 MMO->isNonTemporal());
5664 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5665 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5668 /// Profile - Gather unique data for the node.
5670 void SDNode::Profile(FoldingSetNodeID &ID) const {
5671 AddNodeIDNode(ID, this);
5676 std::vector<EVT> VTs;
5679 VTs.reserve(MVT::LAST_VALUETYPE);
5680 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i)
5681 VTs.push_back(MVT((MVT::SimpleValueType)i));
5686 static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs;
5687 static ManagedStatic<EVTArray> SimpleVTArray;
5688 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
5690 /// getValueTypeList - Return a pointer to the specified value type.
5692 const EVT *SDNode::getValueTypeList(EVT VT) {
5693 if (VT.isExtended()) {
5694 sys::SmartScopedLock<true> Lock(*VTMutex);
5695 return &(*EVTs->insert(VT).first);
5697 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE &&
5698 "Value type out of range!");
5699 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy];
5703 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
5704 /// indicated value. This method ignores uses of other values defined by this
5706 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
5707 assert(Value < getNumValues() && "Bad value!");
5709 // TODO: Only iterate over uses of a given value of the node
5710 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
5711 if (UI.getUse().getResNo() == Value) {
5718 // Found exactly the right number of uses?
5723 /// hasAnyUseOfValue - Return true if there are any use of the indicated
5724 /// value. This method ignores uses of other values defined by this operation.
5725 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
5726 assert(Value < getNumValues() && "Bad value!");
5728 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
5729 if (UI.getUse().getResNo() == Value)
5736 /// isOnlyUserOf - Return true if this node is the only use of N.
5738 bool SDNode::isOnlyUserOf(SDNode *N) const {
5740 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
5751 /// isOperand - Return true if this node is an operand of N.
5753 bool SDValue::isOperandOf(SDNode *N) const {
5754 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5755 if (*this == N->getOperand(i))
5760 bool SDNode::isOperandOf(SDNode *N) const {
5761 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
5762 if (this == N->OperandList[i].getNode())
5767 /// reachesChainWithoutSideEffects - Return true if this operand (which must
5768 /// be a chain) reaches the specified operand without crossing any
5769 /// side-effecting instructions on any chain path. In practice, this looks
5770 /// through token factors and non-volatile loads. In order to remain efficient,
5771 /// this only looks a couple of nodes in, it does not do an exhaustive search.
5772 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
5773 unsigned Depth) const {
5774 if (*this == Dest) return true;
5776 // Don't search too deeply, we just want to be able to see through
5777 // TokenFactor's etc.
5778 if (Depth == 0) return false;
5780 // If this is a token factor, all inputs to the TF happen in parallel. If any
5781 // of the operands of the TF does not reach dest, then we cannot do the xform.
5782 if (getOpcode() == ISD::TokenFactor) {
5783 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
5784 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
5789 // Loads don't have side effects, look through them.
5790 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
5791 if (!Ld->isVolatile())
5792 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
5797 /// hasPredecessor - Return true if N is a predecessor of this node.
5798 /// N is either an operand of this node, or can be reached by recursively
5799 /// traversing up the operands.
5800 /// NOTE: This is an expensive method. Use it carefully.
5801 bool SDNode::hasPredecessor(const SDNode *N) const {
5802 SmallPtrSet<const SDNode *, 32> Visited;
5803 SmallVector<const SDNode *, 16> Worklist;
5804 return hasPredecessorHelper(N, Visited, Worklist);
5807 bool SDNode::hasPredecessorHelper(const SDNode *N,
5808 SmallPtrSet<const SDNode *, 32> &Visited,
5809 SmallVector<const SDNode *, 16> &Worklist) const {
5810 if (Visited.empty()) {
5811 Worklist.push_back(this);
5813 // Take a look in the visited set. If we've already encountered this node
5814 // we needn't search further.
5815 if (Visited.count(N))
5819 // Haven't visited N yet. Continue the search.
5820 while (!Worklist.empty()) {
5821 const SDNode *M = Worklist.pop_back_val();
5822 for (unsigned i = 0, e = M->getNumOperands(); i != e; ++i) {
5823 SDNode *Op = M->getOperand(i).getNode();
5824 if (Visited.insert(Op))
5825 Worklist.push_back(Op);
5834 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
5835 assert(Num < NumOperands && "Invalid child # of SDNode!");
5836 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
5839 std::string SDNode::getOperationName(const SelectionDAG *G) const {
5840 switch (getOpcode()) {
5842 if (getOpcode() < ISD::BUILTIN_OP_END)
5843 return "<<Unknown DAG Node>>";
5844 if (isMachineOpcode()) {
5846 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo())
5847 if (getMachineOpcode() < TII->getNumOpcodes())
5848 return TII->get(getMachineOpcode()).getName();
5849 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>";
5852 const TargetLowering &TLI = G->getTargetLoweringInfo();
5853 const char *Name = TLI.getTargetNodeName(getOpcode());
5854 if (Name) return Name;
5855 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>";
5857 return "<<Unknown Node #" + utostr(getOpcode()) + ">>";
5860 case ISD::DELETED_NODE:
5861 return "<<Deleted Node!>>";
5863 case ISD::PREFETCH: return "Prefetch";
5864 case ISD::MEMBARRIER: return "MemBarrier";
5865 case ISD::ATOMIC_FENCE: return "AtomicFence";
5866 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
5867 case ISD::ATOMIC_SWAP: return "AtomicSwap";
5868 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
5869 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
5870 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
5871 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
5872 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
5873 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
5874 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
5875 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
5876 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
5877 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
5878 case ISD::ATOMIC_LOAD: return "AtomicLoad";
5879 case ISD::ATOMIC_STORE: return "AtomicStore";
5880 case ISD::PCMARKER: return "PCMarker";
5881 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
5882 case ISD::SRCVALUE: return "SrcValue";
5883 case ISD::MDNODE_SDNODE: return "MDNode";
5884 case ISD::EntryToken: return "EntryToken";
5885 case ISD::TokenFactor: return "TokenFactor";
5886 case ISD::AssertSext: return "AssertSext";
5887 case ISD::AssertZext: return "AssertZext";
5889 case ISD::BasicBlock: return "BasicBlock";
5890 case ISD::VALUETYPE: return "ValueType";
5891 case ISD::Register: return "Register";
5893 case ISD::Constant: return "Constant";
5894 case ISD::ConstantFP: return "ConstantFP";
5895 case ISD::GlobalAddress: return "GlobalAddress";
5896 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
5897 case ISD::FrameIndex: return "FrameIndex";
5898 case ISD::JumpTable: return "JumpTable";
5899 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
5900 case ISD::RETURNADDR: return "RETURNADDR";
5901 case ISD::FRAMEADDR: return "FRAMEADDR";
5902 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
5903 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR";
5904 case ISD::LSDAADDR: return "LSDAADDR";
5905 case ISD::EHSELECTION: return "EHSELECTION";
5906 case ISD::EH_RETURN: return "EH_RETURN";
5907 case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP";
5908 case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP";
5909 case ISD::EH_SJLJ_DISPATCHSETUP: return "EH_SJLJ_DISPATCHSETUP";
5910 case ISD::ConstantPool: return "ConstantPool";
5911 case ISD::ExternalSymbol: return "ExternalSymbol";
5912 case ISD::BlockAddress: return "BlockAddress";
5913 case ISD::INTRINSIC_WO_CHAIN:
5914 case ISD::INTRINSIC_VOID:
5915 case ISD::INTRINSIC_W_CHAIN: {
5916 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1;
5917 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue();
5918 if (IID < Intrinsic::num_intrinsics)
5919 return Intrinsic::getName((Intrinsic::ID)IID);
5920 else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo())
5921 return TII->getName(IID);
5922 llvm_unreachable("Invalid intrinsic ID");
5925 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
5926 case ISD::TargetConstant: return "TargetConstant";
5927 case ISD::TargetConstantFP:return "TargetConstantFP";
5928 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
5929 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
5930 case ISD::TargetFrameIndex: return "TargetFrameIndex";
5931 case ISD::TargetJumpTable: return "TargetJumpTable";
5932 case ISD::TargetConstantPool: return "TargetConstantPool";
5933 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
5934 case ISD::TargetBlockAddress: return "TargetBlockAddress";
5936 case ISD::CopyToReg: return "CopyToReg";
5937 case ISD::CopyFromReg: return "CopyFromReg";
5938 case ISD::UNDEF: return "undef";
5939 case ISD::MERGE_VALUES: return "merge_values";
5940 case ISD::INLINEASM: return "inlineasm";
5941 case ISD::EH_LABEL: return "eh_label";
5942 case ISD::HANDLENODE: return "handlenode";
5945 case ISD::FABS: return "fabs";
5946 case ISD::FNEG: return "fneg";
5947 case ISD::FSQRT: return "fsqrt";
5948 case ISD::FSIN: return "fsin";
5949 case ISD::FCOS: return "fcos";
5950 case ISD::FTRUNC: return "ftrunc";
5951 case ISD::FFLOOR: return "ffloor";
5952 case ISD::FCEIL: return "fceil";
5953 case ISD::FRINT: return "frint";
5954 case ISD::FNEARBYINT: return "fnearbyint";
5955 case ISD::FEXP: return "fexp";
5956 case ISD::FEXP2: return "fexp2";
5957 case ISD::FLOG: return "flog";
5958 case ISD::FLOG2: return "flog2";
5959 case ISD::FLOG10: return "flog10";
5962 case ISD::ADD: return "add";
5963 case ISD::SUB: return "sub";
5964 case ISD::MUL: return "mul";
5965 case ISD::MULHU: return "mulhu";
5966 case ISD::MULHS: return "mulhs";
5967 case ISD::SDIV: return "sdiv";
5968 case ISD::UDIV: return "udiv";
5969 case ISD::SREM: return "srem";
5970 case ISD::UREM: return "urem";
5971 case ISD::SMUL_LOHI: return "smul_lohi";
5972 case ISD::UMUL_LOHI: return "umul_lohi";
5973 case ISD::SDIVREM: return "sdivrem";
5974 case ISD::UDIVREM: return "udivrem";
5975 case ISD::AND: return "and";
5976 case ISD::OR: return "or";
5977 case ISD::XOR: return "xor";
5978 case ISD::SHL: return "shl";
5979 case ISD::SRA: return "sra";
5980 case ISD::SRL: return "srl";
5981 case ISD::ROTL: return "rotl";
5982 case ISD::ROTR: return "rotr";
5983 case ISD::FADD: return "fadd";
5984 case ISD::FSUB: return "fsub";
5985 case ISD::FMUL: return "fmul";
5986 case ISD::FDIV: return "fdiv";
5987 case ISD::FMA: return "fma";
5988 case ISD::FREM: return "frem";
5989 case ISD::FCOPYSIGN: return "fcopysign";
5990 case ISD::FGETSIGN: return "fgetsign";
5991 case ISD::FPOW: return "fpow";
5993 case ISD::FPOWI: return "fpowi";
5994 case ISD::SETCC: return "setcc";
5995 case ISD::SELECT: return "select";
5996 case ISD::VSELECT: return "vselect";
5997 case ISD::SELECT_CC: return "select_cc";
5998 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
5999 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
6000 case ISD::CONCAT_VECTORS: return "concat_vectors";
6001 case ISD::INSERT_SUBVECTOR: return "insert_subvector";
6002 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
6003 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
6004 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
6005 case ISD::CARRY_FALSE: return "carry_false";
6006 case ISD::ADDC: return "addc";
6007 case ISD::ADDE: return "adde";
6008 case ISD::SADDO: return "saddo";
6009 case ISD::UADDO: return "uaddo";
6010 case ISD::SSUBO: return "ssubo";
6011 case ISD::USUBO: return "usubo";
6012 case ISD::SMULO: return "smulo";
6013 case ISD::UMULO: return "umulo";
6014 case ISD::SUBC: return "subc";
6015 case ISD::SUBE: return "sube";
6016 case ISD::SHL_PARTS: return "shl_parts";
6017 case ISD::SRA_PARTS: return "sra_parts";
6018 case ISD::SRL_PARTS: return "srl_parts";
6020 // Conversion operators.
6021 case ISD::SIGN_EXTEND: return "sign_extend";
6022 case ISD::ZERO_EXTEND: return "zero_extend";
6023 case ISD::ANY_EXTEND: return "any_extend";
6024 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
6025 case ISD::TRUNCATE: return "truncate";
6026 case ISD::FP_ROUND: return "fp_round";
6027 case ISD::FLT_ROUNDS_: return "flt_rounds";
6028 case ISD::FP_ROUND_INREG: return "fp_round_inreg";
6029 case ISD::FP_EXTEND: return "fp_extend";
6031 case ISD::SINT_TO_FP: return "sint_to_fp";
6032 case ISD::UINT_TO_FP: return "uint_to_fp";
6033 case ISD::FP_TO_SINT: return "fp_to_sint";
6034 case ISD::FP_TO_UINT: return "fp_to_uint";
6035 case ISD::BITCAST: return "bitcast";
6036 case ISD::FP16_TO_FP32: return "fp16_to_fp32";
6037 case ISD::FP32_TO_FP16: return "fp32_to_fp16";
6039 case ISD::CONVERT_RNDSAT: {
6040 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) {
6041 default: llvm_unreachable("Unknown cvt code!");
6042 case ISD::CVT_FF: return "cvt_ff";
6043 case ISD::CVT_FS: return "cvt_fs";
6044 case ISD::CVT_FU: return "cvt_fu";
6045 case ISD::CVT_SF: return "cvt_sf";
6046 case ISD::CVT_UF: return "cvt_uf";
6047 case ISD::CVT_SS: return "cvt_ss";
6048 case ISD::CVT_SU: return "cvt_su";
6049 case ISD::CVT_US: return "cvt_us";
6050 case ISD::CVT_UU: return "cvt_uu";
6054 // Control flow instructions
6055 case ISD::BR: return "br";
6056 case ISD::BRIND: return "brind";
6057 case ISD::BR_JT: return "br_jt";
6058 case ISD::BRCOND: return "brcond";
6059 case ISD::BR_CC: return "br_cc";
6060 case ISD::CALLSEQ_START: return "callseq_start";
6061 case ISD::CALLSEQ_END: return "callseq_end";
6064 case ISD::LOAD: return "load";
6065 case ISD::STORE: return "store";
6066 case ISD::VAARG: return "vaarg";
6067 case ISD::VACOPY: return "vacopy";
6068 case ISD::VAEND: return "vaend";
6069 case ISD::VASTART: return "vastart";
6070 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
6071 case ISD::EXTRACT_ELEMENT: return "extract_element";
6072 case ISD::BUILD_PAIR: return "build_pair";
6073 case ISD::STACKSAVE: return "stacksave";
6074 case ISD::STACKRESTORE: return "stackrestore";
6075 case ISD::TRAP: return "trap";
6078 case ISD::BSWAP: return "bswap";
6079 case ISD::CTPOP: return "ctpop";
6080 case ISD::CTTZ: return "cttz";
6081 case ISD::CTLZ: return "ctlz";
6084 case ISD::INIT_TRAMPOLINE: return "init_trampoline";
6085 case ISD::ADJUST_TRAMPOLINE: return "adjust_trampoline";
6088 switch (cast<CondCodeSDNode>(this)->get()) {
6089 default: llvm_unreachable("Unknown setcc condition!");
6090 case ISD::SETOEQ: return "setoeq";
6091 case ISD::SETOGT: return "setogt";
6092 case ISD::SETOGE: return "setoge";
6093 case ISD::SETOLT: return "setolt";
6094 case ISD::SETOLE: return "setole";
6095 case ISD::SETONE: return "setone";
6097 case ISD::SETO: return "seto";
6098 case ISD::SETUO: return "setuo";
6099 case ISD::SETUEQ: return "setue";
6100 case ISD::SETUGT: return "setugt";
6101 case ISD::SETUGE: return "setuge";
6102 case ISD::SETULT: return "setult";
6103 case ISD::SETULE: return "setule";
6104 case ISD::SETUNE: return "setune";
6106 case ISD::SETEQ: return "seteq";
6107 case ISD::SETGT: return "setgt";
6108 case ISD::SETGE: return "setge";
6109 case ISD::SETLT: return "setlt";
6110 case ISD::SETLE: return "setle";
6111 case ISD::SETNE: return "setne";
6116 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
6125 return "<post-inc>";
6127 return "<post-dec>";
6131 std::string ISD::ArgFlagsTy::getArgFlagsString() {
6132 std::string S = "< ";
6146 if (getByValAlign())
6147 S += "byval-align:" + utostr(getByValAlign()) + " ";
6149 S += "orig-align:" + utostr(getOrigAlign()) + " ";
6151 S += "byval-size:" + utostr(getByValSize()) + " ";
6155 void SDNode::dump() const { dump(0); }
6156 void SDNode::dump(const SelectionDAG *G) const {
6161 void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const {
6162 OS << (void*)this << ": ";
6164 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
6166 if (getValueType(i) == MVT::Other)
6169 OS << getValueType(i).getEVTString();
6171 OS << " = " << getOperationName(G);
6174 void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const {
6175 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) {
6176 if (!MN->memoperands_empty()) {
6179 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(),
6180 e = MN->memoperands_end(); i != e; ++i) {
6182 if (llvm::next(i) != e)
6187 } else if (const ShuffleVectorSDNode *SVN =
6188 dyn_cast<ShuffleVectorSDNode>(this)) {
6190 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
6191 int Idx = SVN->getMaskElt(i);
6199 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
6200 OS << '<' << CSDN->getAPIntValue() << '>';
6201 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
6202 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle)
6203 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
6204 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble)
6205 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
6208 CSDN->getValueAPF().bitcastToAPInt().dump();
6211 } else if (const GlobalAddressSDNode *GADN =
6212 dyn_cast<GlobalAddressSDNode>(this)) {
6213 int64_t offset = GADN->getOffset();
6215 WriteAsOperand(OS, GADN->getGlobal());
6218 OS << " + " << offset;
6220 OS << " " << offset;
6221 if (unsigned int TF = GADN->getTargetFlags())
6222 OS << " [TF=" << TF << ']';
6223 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
6224 OS << "<" << FIDN->getIndex() << ">";
6225 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
6226 OS << "<" << JTDN->getIndex() << ">";
6227 if (unsigned int TF = JTDN->getTargetFlags())
6228 OS << " [TF=" << TF << ']';
6229 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
6230 int offset = CP->getOffset();
6231 if (CP->isMachineConstantPoolEntry())
6232 OS << "<" << *CP->getMachineCPVal() << ">";
6234 OS << "<" << *CP->getConstVal() << ">";
6236 OS << " + " << offset;
6238 OS << " " << offset;
6239 if (unsigned int TF = CP->getTargetFlags())
6240 OS << " [TF=" << TF << ']';
6241 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
6243 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
6245 OS << LBB->getName() << " ";
6246 OS << (const void*)BBDN->getBasicBlock() << ">";
6247 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
6248 OS << ' ' << PrintReg(R->getReg(), G ? G->getTarget().getRegisterInfo() :0);
6249 } else if (const ExternalSymbolSDNode *ES =
6250 dyn_cast<ExternalSymbolSDNode>(this)) {
6251 OS << "'" << ES->getSymbol() << "'";
6252 if (unsigned int TF = ES->getTargetFlags())
6253 OS << " [TF=" << TF << ']';
6254 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
6256 OS << "<" << M->getValue() << ">";
6259 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) {
6261 OS << "<" << MD->getMD() << ">";
6264 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
6265 OS << ":" << N->getVT().getEVTString();
6267 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
6268 OS << "<" << *LD->getMemOperand();
6271 switch (LD->getExtensionType()) {
6272 default: doExt = false; break;
6273 case ISD::EXTLOAD: OS << ", anyext"; break;
6274 case ISD::SEXTLOAD: OS << ", sext"; break;
6275 case ISD::ZEXTLOAD: OS << ", zext"; break;
6278 OS << " from " << LD->getMemoryVT().getEVTString();
6280 const char *AM = getIndexedModeName(LD->getAddressingMode());
6285 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
6286 OS << "<" << *ST->getMemOperand();
6288 if (ST->isTruncatingStore())
6289 OS << ", trunc to " << ST->getMemoryVT().getEVTString();
6291 const char *AM = getIndexedModeName(ST->getAddressingMode());
6296 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) {
6297 OS << "<" << *M->getMemOperand() << ">";
6298 } else if (const BlockAddressSDNode *BA =
6299 dyn_cast<BlockAddressSDNode>(this)) {
6301 WriteAsOperand(OS, BA->getBlockAddress()->getFunction(), false);
6303 WriteAsOperand(OS, BA->getBlockAddress()->getBasicBlock(), false);
6305 if (unsigned int TF = BA->getTargetFlags())
6306 OS << " [TF=" << TF << ']';
6310 if (unsigned Order = G->GetOrdering(this))
6311 OS << " [ORD=" << Order << ']';
6313 if (getNodeId() != -1)
6314 OS << " [ID=" << getNodeId() << ']';
6316 DebugLoc dl = getDebugLoc();
6317 if (G && !dl.isUnknown()) {
6319 Scope(dl.getScope(G->getMachineFunction().getFunction()->getContext()));
6321 // Omit the directory, since it's usually long and uninteresting.
6323 OS << Scope.getFilename();
6326 OS << ':' << dl.getLine();
6327 if (dl.getCol() != 0)
6328 OS << ':' << dl.getCol();
6332 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
6334 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
6335 if (i) OS << ", "; else OS << " ";
6336 OS << (void*)getOperand(i).getNode();
6337 if (unsigned RN = getOperand(i).getResNo())
6340 print_details(OS, G);
6343 static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N,
6344 const SelectionDAG *G, unsigned depth,
6357 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6358 // Don't follow chain operands.
6359 if (N->getOperand(i).getValueType() == MVT::Other)
6362 printrWithDepthHelper(OS, N->getOperand(i).getNode(), G, depth-1, indent+2);
6366 void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G,
6367 unsigned depth) const {
6368 printrWithDepthHelper(OS, this, G, depth, 0);
6371 void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const {
6372 // Don't print impossibly deep things.
6373 printrWithDepth(OS, G, 10);
6376 void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const {
6377 printrWithDepth(dbgs(), G, depth);
6380 void SDNode::dumprFull(const SelectionDAG *G) const {
6381 // Don't print impossibly deep things.
6382 dumprWithDepth(G, 10);
6385 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
6386 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6387 if (N->getOperand(i).getNode()->hasOneUse())
6388 DumpNodes(N->getOperand(i).getNode(), indent+2, G);
6390 dbgs() << "\n" << std::string(indent+2, ' ')
6391 << (void*)N->getOperand(i).getNode() << ": <multiple use>";
6395 dbgs().indent(indent);
6399 SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
6400 assert(N->getNumValues() == 1 &&
6401 "Can't unroll a vector with multiple results!");
6403 EVT VT = N->getValueType(0);
6404 unsigned NE = VT.getVectorNumElements();
6405 EVT EltVT = VT.getVectorElementType();
6406 DebugLoc dl = N->getDebugLoc();
6408 SmallVector<SDValue, 8> Scalars;
6409 SmallVector<SDValue, 4> Operands(N->getNumOperands());
6411 // If ResNE is 0, fully unroll the vector op.
6414 else if (NE > ResNE)
6418 for (i= 0; i != NE; ++i) {
6419 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) {
6420 SDValue Operand = N->getOperand(j);
6421 EVT OperandVT = Operand.getValueType();
6422 if (OperandVT.isVector()) {
6423 // A vector operand; extract a single element.
6424 EVT OperandEltVT = OperandVT.getVectorElementType();
6425 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl,
6428 getConstant(i, TLI.getPointerTy()));
6430 // A scalar operand; just use it as is.
6431 Operands[j] = Operand;
6435 switch (N->getOpcode()) {
6437 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6438 &Operands[0], Operands.size()));
6445 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0],
6446 getShiftAmountOperand(Operands[0].getValueType(),
6449 case ISD::SIGN_EXTEND_INREG:
6450 case ISD::FP_ROUND_INREG: {
6451 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType();
6452 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6454 getValueType(ExtVT)));
6459 for (; i < ResNE; ++i)
6460 Scalars.push_back(getUNDEF(EltVT));
6462 return getNode(ISD::BUILD_VECTOR, dl,
6463 EVT::getVectorVT(*getContext(), EltVT, ResNE),
6464 &Scalars[0], Scalars.size());
6468 /// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a
6469 /// location that is 'Dist' units away from the location that the 'Base' load
6470 /// is loading from.
6471 bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base,
6472 unsigned Bytes, int Dist) const {
6473 if (LD->getChain() != Base->getChain())
6475 EVT VT = LD->getValueType(0);
6476 if (VT.getSizeInBits() / 8 != Bytes)
6479 SDValue Loc = LD->getOperand(1);
6480 SDValue BaseLoc = Base->getOperand(1);
6481 if (Loc.getOpcode() == ISD::FrameIndex) {
6482 if (BaseLoc.getOpcode() != ISD::FrameIndex)
6484 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo();
6485 int FI = cast<FrameIndexSDNode>(Loc)->getIndex();
6486 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex();
6487 int FS = MFI->getObjectSize(FI);
6488 int BFS = MFI->getObjectSize(BFI);
6489 if (FS != BFS || FS != (int)Bytes) return false;
6490 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes);
6494 if (isBaseWithConstantOffset(Loc) && Loc.getOperand(0) == BaseLoc &&
6495 cast<ConstantSDNode>(Loc.getOperand(1))->getSExtValue() == Dist*Bytes)
6498 const GlobalValue *GV1 = NULL;
6499 const GlobalValue *GV2 = NULL;
6500 int64_t Offset1 = 0;
6501 int64_t Offset2 = 0;
6502 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1);
6503 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2);
6504 if (isGA1 && isGA2 && GV1 == GV2)
6505 return Offset1 == (Offset2 + Dist*Bytes);
6510 /// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if
6511 /// it cannot be inferred.
6512 unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const {
6513 // If this is a GlobalAddress + cst, return the alignment.
6514 const GlobalValue *GV;
6515 int64_t GVOffset = 0;
6516 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) {
6517 // If GV has specified alignment, then use it. Otherwise, use the preferred
6519 unsigned Align = GV->getAlignment();
6521 if (const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV)) {
6522 if (GVar->hasInitializer()) {
6523 const TargetData *TD = TLI.getTargetData();
6524 Align = TD->getPreferredAlignment(GVar);
6528 return MinAlign(Align, GVOffset);
6531 // If this is a direct reference to a stack slot, use information about the
6532 // stack slot's alignment.
6533 int FrameIdx = 1 << 31;
6534 int64_t FrameOffset = 0;
6535 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) {
6536 FrameIdx = FI->getIndex();
6537 } else if (isBaseWithConstantOffset(Ptr) &&
6538 isa<FrameIndexSDNode>(Ptr.getOperand(0))) {
6540 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
6541 FrameOffset = Ptr.getConstantOperandVal(1);
6544 if (FrameIdx != (1 << 31)) {
6545 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo();
6546 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx),
6554 void SelectionDAG::dump() const {
6555 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:";
6557 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end();
6559 const SDNode *N = I;
6560 if (!N->hasOneUse() && N != getRoot().getNode())
6561 DumpNodes(N, 2, this);
6564 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
6569 void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
6571 print_details(OS, G);
6574 typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet;
6575 static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
6576 const SelectionDAG *G, VisitedSDNodeSet &once) {
6577 if (!once.insert(N)) // If we've been here before, return now.
6580 // Dump the current SDNode, but don't end the line yet.
6581 OS << std::string(indent, ' ');
6584 // Having printed this SDNode, walk the children:
6585 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6586 const SDNode *child = N->getOperand(i).getNode();
6591 if (child->getNumOperands() == 0) {
6592 // This child has no grandchildren; print it inline right here.
6593 child->printr(OS, G);
6595 } else { // Just the address. FIXME: also print the child's opcode.
6597 if (unsigned RN = N->getOperand(i).getResNo())
6604 // Dump children that have grandchildren on their own line(s).
6605 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6606 const SDNode *child = N->getOperand(i).getNode();
6607 DumpNodesr(OS, child, indent+2, G, once);
6611 void SDNode::dumpr() const {
6612 VisitedSDNodeSet once;
6613 DumpNodesr(dbgs(), this, 0, 0, once);
6616 void SDNode::dumpr(const SelectionDAG *G) const {
6617 VisitedSDNodeSet once;
6618 DumpNodesr(dbgs(), this, 0, G, once);
6622 // getAddressSpace - Return the address space this GlobalAddress belongs to.
6623 unsigned GlobalAddressSDNode::getAddressSpace() const {
6624 return getGlobal()->getType()->getAddressSpace();
6628 Type *ConstantPoolSDNode::getType() const {
6629 if (isMachineConstantPoolEntry())
6630 return Val.MachineCPVal->getType();
6631 return Val.ConstVal->getType();
6634 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
6636 unsigned &SplatBitSize,
6638 unsigned MinSplatBits,
6640 EVT VT = getValueType(0);
6641 assert(VT.isVector() && "Expected a vector type");
6642 unsigned sz = VT.getSizeInBits();
6643 if (MinSplatBits > sz)
6646 SplatValue = APInt(sz, 0);
6647 SplatUndef = APInt(sz, 0);
6649 // Get the bits. Bits with undefined values (when the corresponding element
6650 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
6651 // in SplatValue. If any of the values are not constant, give up and return
6653 unsigned int nOps = getNumOperands();
6654 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
6655 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
6657 for (unsigned j = 0; j < nOps; ++j) {
6658 unsigned i = isBigEndian ? nOps-1-j : j;
6659 SDValue OpVal = getOperand(i);
6660 unsigned BitPos = j * EltBitSize;
6662 if (OpVal.getOpcode() == ISD::UNDEF)
6663 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize);
6664 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
6665 SplatValue |= CN->getAPIntValue().zextOrTrunc(EltBitSize).
6666 zextOrTrunc(sz) << BitPos;
6667 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
6668 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
6673 // The build_vector is all constants or undefs. Find the smallest element
6674 // size that splats the vector.
6676 HasAnyUndefs = (SplatUndef != 0);
6679 unsigned HalfSize = sz / 2;
6680 APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize);
6681 APInt LowValue = SplatValue.trunc(HalfSize);
6682 APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize);
6683 APInt LowUndef = SplatUndef.trunc(HalfSize);
6685 // If the two halves do not match (ignoring undef bits), stop here.
6686 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
6687 MinSplatBits > HalfSize)
6690 SplatValue = HighValue | LowValue;
6691 SplatUndef = HighUndef & LowUndef;
6700 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
6701 // Find the first non-undef value in the shuffle mask.
6703 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
6706 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
6708 // Make sure all remaining elements are either undef or the same as the first
6710 for (int Idx = Mask[i]; i != e; ++i)
6711 if (Mask[i] >= 0 && Mask[i] != Idx)
6717 static void checkForCyclesHelper(const SDNode *N,
6718 SmallPtrSet<const SDNode*, 32> &Visited,
6719 SmallPtrSet<const SDNode*, 32> &Checked) {
6720 // If this node has already been checked, don't check it again.
6721 if (Checked.count(N))
6724 // If a node has already been visited on this depth-first walk, reject it as
6726 if (!Visited.insert(N)) {
6727 dbgs() << "Offending node:\n";
6729 errs() << "Detected cycle in SelectionDAG\n";
6733 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6734 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked);
6741 void llvm::checkForCycles(const llvm::SDNode *N) {
6743 assert(N && "Checking nonexistant SDNode");
6744 SmallPtrSet<const SDNode*, 32> visited;
6745 SmallPtrSet<const SDNode*, 32> checked;
6746 checkForCyclesHelper(N, visited, checked);
6750 void llvm::checkForCycles(const llvm::SelectionDAG *DAG) {
6751 checkForCycles(DAG->getRoot().getNode());