1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "SDNodeDbgValue.h"
16 #include "llvm/ADT/SetVector.h"
17 #include "llvm/ADT/SmallPtrSet.h"
18 #include "llvm/ADT/SmallSet.h"
19 #include "llvm/ADT/SmallVector.h"
20 #include "llvm/ADT/StringExtras.h"
21 #include "llvm/Analysis/ValueTracking.h"
22 #include "llvm/CodeGen/MachineBasicBlock.h"
23 #include "llvm/CodeGen/MachineConstantPool.h"
24 #include "llvm/CodeGen/MachineFrameInfo.h"
25 #include "llvm/CodeGen/MachineModuleInfo.h"
26 #include "llvm/IR/CallingConv.h"
27 #include "llvm/IR/Constants.h"
28 #include "llvm/IR/DataLayout.h"
29 #include "llvm/IR/DebugInfo.h"
30 #include "llvm/IR/DerivedTypes.h"
31 #include "llvm/IR/Function.h"
32 #include "llvm/IR/GlobalAlias.h"
33 #include "llvm/IR/GlobalVariable.h"
34 #include "llvm/IR/Intrinsics.h"
35 #include "llvm/Support/CommandLine.h"
36 #include "llvm/Support/Debug.h"
37 #include "llvm/Support/ErrorHandling.h"
38 #include "llvm/Support/ManagedStatic.h"
39 #include "llvm/Support/MathExtras.h"
40 #include "llvm/Support/Mutex.h"
41 #include "llvm/Support/raw_ostream.h"
42 #include "llvm/Target/TargetInstrInfo.h"
43 #include "llvm/Target/TargetIntrinsicInfo.h"
44 #include "llvm/Target/TargetLowering.h"
45 #include "llvm/Target/TargetMachine.h"
46 #include "llvm/Target/TargetOptions.h"
47 #include "llvm/Target/TargetRegisterInfo.h"
48 #include "llvm/Target/TargetSelectionDAGInfo.h"
54 /// makeVTList - Return an instance of the SDVTList struct initialized with the
55 /// specified members.
56 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
57 SDVTList Res = {VTs, NumVTs};
61 // Default null implementations of the callbacks.
62 void SelectionDAG::DAGUpdateListener::NodeDeleted(SDNode*, SDNode*) {}
63 void SelectionDAG::DAGUpdateListener::NodeUpdated(SDNode*) {}
65 //===----------------------------------------------------------------------===//
66 // ConstantFPSDNode Class
67 //===----------------------------------------------------------------------===//
69 /// isExactlyValue - We don't rely on operator== working on double values, as
70 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
71 /// As such, this method can be used to do an exact bit-for-bit comparison of
72 /// two floating point values.
73 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
74 return getValueAPF().bitwiseIsEqual(V);
77 bool ConstantFPSDNode::isValueValidForType(EVT VT,
79 assert(VT.isFloatingPoint() && "Can only convert between FP types");
81 // convert modifies in place, so make a copy.
82 APFloat Val2 = APFloat(Val);
84 (void) Val2.convert(SelectionDAG::EVTToAPFloatSemantics(VT),
85 APFloat::rmNearestTiesToEven,
90 //===----------------------------------------------------------------------===//
92 //===----------------------------------------------------------------------===//
94 /// isBuildVectorAllOnes - Return true if the specified node is a
95 /// BUILD_VECTOR where all of the elements are ~0 or undef.
96 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
97 // Look through a bit convert.
98 if (N->getOpcode() == ISD::BITCAST)
99 N = N->getOperand(0).getNode();
101 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
103 unsigned i = 0, e = N->getNumOperands();
105 // Skip over all of the undef values.
106 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
109 // Do not accept an all-undef vector.
110 if (i == e) return false;
112 // Do not accept build_vectors that aren't all constants or which have non-~0
113 // elements. We have to be a bit careful here, as the type of the constant
114 // may not be the same as the type of the vector elements due to type
115 // legalization (the elements are promoted to a legal type for the target and
116 // a vector of a type may be legal when the base element type is not).
117 // We only want to check enough bits to cover the vector elements, because
118 // we care if the resultant vector is all ones, not whether the individual
120 SDValue NotZero = N->getOperand(i);
121 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits();
122 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(NotZero)) {
123 if (CN->getAPIntValue().countTrailingOnes() < EltSize)
125 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(NotZero)) {
126 if (CFPN->getValueAPF().bitcastToAPInt().countTrailingOnes() < EltSize)
131 // Okay, we have at least one ~0 value, check to see if the rest match or are
132 // undefs. Even with the above element type twiddling, this should be OK, as
133 // the same type legalization should have applied to all the elements.
134 for (++i; i != e; ++i)
135 if (N->getOperand(i) != NotZero &&
136 N->getOperand(i).getOpcode() != ISD::UNDEF)
142 /// isBuildVectorAllZeros - Return true if the specified node is a
143 /// BUILD_VECTOR where all of the elements are 0 or undef.
144 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
145 // Look through a bit convert.
146 if (N->getOpcode() == ISD::BITCAST)
147 N = N->getOperand(0).getNode();
149 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
151 bool IsAllUndef = true;
152 for (unsigned i = 0, e = N->getNumOperands(); i < e; ++i) {
153 if (N->getOperand(i).getOpcode() == ISD::UNDEF)
156 // Do not accept build_vectors that aren't all constants or which have non-0
157 // elements. We have to be a bit careful here, as the type of the constant
158 // may not be the same as the type of the vector elements due to type
159 // legalization (the elements are promoted to a legal type for the target
160 // and a vector of a type may be legal when the base element type is not).
161 // We only want to check enough bits to cover the vector elements, because
162 // we care if the resultant vector is all zeros, not whether the individual
164 SDValue Zero = N->getOperand(i);
165 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits();
166 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Zero)) {
167 if (CN->getAPIntValue().countTrailingZeros() < EltSize)
169 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(Zero)) {
170 if (CFPN->getValueAPF().bitcastToAPInt().countTrailingZeros() < EltSize)
176 // Do not accept an all-undef vector.
182 /// \brief Return true if the specified node is a BUILD_VECTOR node of
183 /// all ConstantSDNode or undef.
184 bool ISD::isBuildVectorOfConstantSDNodes(const SDNode *N) {
185 if (N->getOpcode() != ISD::BUILD_VECTOR)
188 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
189 SDValue Op = N->getOperand(i);
190 if (Op.getOpcode() == ISD::UNDEF)
192 if (!isa<ConstantSDNode>(Op))
198 /// isScalarToVector - Return true if the specified node is a
199 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
200 /// element is not an undef.
201 bool ISD::isScalarToVector(const SDNode *N) {
202 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
205 if (N->getOpcode() != ISD::BUILD_VECTOR)
207 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
209 unsigned NumElems = N->getNumOperands();
212 for (unsigned i = 1; i < NumElems; ++i) {
213 SDValue V = N->getOperand(i);
214 if (V.getOpcode() != ISD::UNDEF)
220 /// allOperandsUndef - Return true if the node has at least one operand
221 /// and all operands of the specified node are ISD::UNDEF.
222 bool ISD::allOperandsUndef(const SDNode *N) {
223 // Return false if the node has no operands.
224 // This is "logically inconsistent" with the definition of "all" but
225 // is probably the desired behavior.
226 if (N->getNumOperands() == 0)
229 for (unsigned i = 0, e = N->getNumOperands(); i != e ; ++i)
230 if (N->getOperand(i).getOpcode() != ISD::UNDEF)
236 ISD::NodeType ISD::getExtForLoadExtType(ISD::LoadExtType ExtType) {
239 return ISD::ANY_EXTEND;
241 return ISD::SIGN_EXTEND;
243 return ISD::ZERO_EXTEND;
248 llvm_unreachable("Invalid LoadExtType");
251 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
252 /// when given the operation for (X op Y).
253 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
254 // To perform this operation, we just need to swap the L and G bits of the
256 unsigned OldL = (Operation >> 2) & 1;
257 unsigned OldG = (Operation >> 1) & 1;
258 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
259 (OldL << 1) | // New G bit
260 (OldG << 2)); // New L bit.
263 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
264 /// 'op' is a valid SetCC operation.
265 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
266 unsigned Operation = Op;
268 Operation ^= 7; // Flip L, G, E bits, but not U.
270 Operation ^= 15; // Flip all of the condition bits.
272 if (Operation > ISD::SETTRUE2)
273 Operation &= ~8; // Don't let N and U bits get set.
275 return ISD::CondCode(Operation);
279 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
280 /// signed operation and 2 if the result is an unsigned comparison. Return zero
281 /// if the operation does not depend on the sign of the input (setne and seteq).
282 static int isSignedOp(ISD::CondCode Opcode) {
284 default: llvm_unreachable("Illegal integer setcc operation!");
286 case ISD::SETNE: return 0;
290 case ISD::SETGE: return 1;
294 case ISD::SETUGE: return 2;
298 /// getSetCCOrOperation - Return the result of a logical OR between different
299 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
300 /// returns SETCC_INVALID if it is not possible to represent the resultant
302 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
304 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
305 // Cannot fold a signed integer setcc with an unsigned integer setcc.
306 return ISD::SETCC_INVALID;
308 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
310 // If the N and U bits get set then the resultant comparison DOES suddenly
311 // care about orderedness, and is true when ordered.
312 if (Op > ISD::SETTRUE2)
313 Op &= ~16; // Clear the U bit if the N bit is set.
315 // Canonicalize illegal integer setcc's.
316 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
319 return ISD::CondCode(Op);
322 /// getSetCCAndOperation - Return the result of a logical AND between different
323 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
324 /// function returns zero if it is not possible to represent the resultant
326 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
328 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
329 // Cannot fold a signed setcc with an unsigned setcc.
330 return ISD::SETCC_INVALID;
332 // Combine all of the condition bits.
333 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
335 // Canonicalize illegal integer setcc's.
339 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
340 case ISD::SETOEQ: // SETEQ & SETU[LG]E
341 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
342 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
343 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
350 //===----------------------------------------------------------------------===//
351 // SDNode Profile Support
352 //===----------------------------------------------------------------------===//
354 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
356 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
360 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
361 /// solely with their pointer.
362 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
363 ID.AddPointer(VTList.VTs);
366 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
368 static void AddNodeIDOperands(FoldingSetNodeID &ID,
369 ArrayRef<SDValue> Ops) {
370 for (auto& Op : Ops) {
371 ID.AddPointer(Op.getNode());
372 ID.AddInteger(Op.getResNo());
376 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
378 static void AddNodeIDOperands(FoldingSetNodeID &ID,
379 ArrayRef<SDUse> Ops) {
380 for (auto& Op : Ops) {
381 ID.AddPointer(Op.getNode());
382 ID.AddInteger(Op.getResNo());
386 static void AddBinaryNodeIDCustom(FoldingSetNodeID &ID, bool nuw, bool nsw,
390 ID.AddBoolean(exact);
393 /// AddBinaryNodeIDCustom - Add BinarySDNodes special infos
394 static void AddBinaryNodeIDCustom(FoldingSetNodeID &ID, unsigned Opcode,
395 bool nuw, bool nsw, bool exact) {
396 if (isBinOpWithFlags(Opcode))
397 AddBinaryNodeIDCustom(ID, nuw, nsw, exact);
400 static void AddNodeIDNode(FoldingSetNodeID &ID, unsigned short OpC,
401 SDVTList VTList, ArrayRef<SDValue> OpList) {
402 AddNodeIDOpcode(ID, OpC);
403 AddNodeIDValueTypes(ID, VTList);
404 AddNodeIDOperands(ID, OpList);
407 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
409 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
410 switch (N->getOpcode()) {
411 case ISD::TargetExternalSymbol:
412 case ISD::ExternalSymbol:
413 llvm_unreachable("Should only be used on nodes with operands");
414 default: break; // Normal nodes don't need extra info.
415 case ISD::TargetConstant:
416 case ISD::Constant: {
417 const ConstantSDNode *C = cast<ConstantSDNode>(N);
418 ID.AddPointer(C->getConstantIntValue());
419 ID.AddBoolean(C->isOpaque());
422 case ISD::TargetConstantFP:
423 case ISD::ConstantFP: {
424 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
427 case ISD::TargetGlobalAddress:
428 case ISD::GlobalAddress:
429 case ISD::TargetGlobalTLSAddress:
430 case ISD::GlobalTLSAddress: {
431 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
432 ID.AddPointer(GA->getGlobal());
433 ID.AddInteger(GA->getOffset());
434 ID.AddInteger(GA->getTargetFlags());
435 ID.AddInteger(GA->getAddressSpace());
438 case ISD::BasicBlock:
439 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
442 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
444 case ISD::RegisterMask:
445 ID.AddPointer(cast<RegisterMaskSDNode>(N)->getRegMask());
448 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
450 case ISD::FrameIndex:
451 case ISD::TargetFrameIndex:
452 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
455 case ISD::TargetJumpTable:
456 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
457 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
459 case ISD::ConstantPool:
460 case ISD::TargetConstantPool: {
461 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
462 ID.AddInteger(CP->getAlignment());
463 ID.AddInteger(CP->getOffset());
464 if (CP->isMachineConstantPoolEntry())
465 CP->getMachineCPVal()->addSelectionDAGCSEId(ID);
467 ID.AddPointer(CP->getConstVal());
468 ID.AddInteger(CP->getTargetFlags());
471 case ISD::TargetIndex: {
472 const TargetIndexSDNode *TI = cast<TargetIndexSDNode>(N);
473 ID.AddInteger(TI->getIndex());
474 ID.AddInteger(TI->getOffset());
475 ID.AddInteger(TI->getTargetFlags());
479 const LoadSDNode *LD = cast<LoadSDNode>(N);
480 ID.AddInteger(LD->getMemoryVT().getRawBits());
481 ID.AddInteger(LD->getRawSubclassData());
482 ID.AddInteger(LD->getPointerInfo().getAddrSpace());
486 const StoreSDNode *ST = cast<StoreSDNode>(N);
487 ID.AddInteger(ST->getMemoryVT().getRawBits());
488 ID.AddInteger(ST->getRawSubclassData());
489 ID.AddInteger(ST->getPointerInfo().getAddrSpace());
500 const BinaryWithFlagsSDNode *BinNode = cast<BinaryWithFlagsSDNode>(N);
501 AddBinaryNodeIDCustom(ID, N->getOpcode(), BinNode->hasNoUnsignedWrap(),
502 BinNode->hasNoSignedWrap(), BinNode->isExact());
505 case ISD::ATOMIC_CMP_SWAP:
506 case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS:
507 case ISD::ATOMIC_SWAP:
508 case ISD::ATOMIC_LOAD_ADD:
509 case ISD::ATOMIC_LOAD_SUB:
510 case ISD::ATOMIC_LOAD_AND:
511 case ISD::ATOMIC_LOAD_OR:
512 case ISD::ATOMIC_LOAD_XOR:
513 case ISD::ATOMIC_LOAD_NAND:
514 case ISD::ATOMIC_LOAD_MIN:
515 case ISD::ATOMIC_LOAD_MAX:
516 case ISD::ATOMIC_LOAD_UMIN:
517 case ISD::ATOMIC_LOAD_UMAX:
518 case ISD::ATOMIC_LOAD:
519 case ISD::ATOMIC_STORE: {
520 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
521 ID.AddInteger(AT->getMemoryVT().getRawBits());
522 ID.AddInteger(AT->getRawSubclassData());
523 ID.AddInteger(AT->getPointerInfo().getAddrSpace());
526 case ISD::PREFETCH: {
527 const MemSDNode *PF = cast<MemSDNode>(N);
528 ID.AddInteger(PF->getPointerInfo().getAddrSpace());
531 case ISD::VECTOR_SHUFFLE: {
532 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
533 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
535 ID.AddInteger(SVN->getMaskElt(i));
538 case ISD::TargetBlockAddress:
539 case ISD::BlockAddress: {
540 const BlockAddressSDNode *BA = cast<BlockAddressSDNode>(N);
541 ID.AddPointer(BA->getBlockAddress());
542 ID.AddInteger(BA->getOffset());
543 ID.AddInteger(BA->getTargetFlags());
546 } // end switch (N->getOpcode())
548 // Target specific memory nodes could also have address spaces to check.
549 if (N->isTargetMemoryOpcode())
550 ID.AddInteger(cast<MemSDNode>(N)->getPointerInfo().getAddrSpace());
553 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
555 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
556 AddNodeIDOpcode(ID, N->getOpcode());
557 // Add the return value info.
558 AddNodeIDValueTypes(ID, N->getVTList());
559 // Add the operand info.
560 AddNodeIDOperands(ID, N->ops());
562 // Handle SDNode leafs with special info.
563 AddNodeIDCustom(ID, N);
566 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
567 /// the CSE map that carries volatility, temporalness, indexing mode, and
568 /// extension/truncation information.
570 static inline unsigned
571 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile,
572 bool isNonTemporal, bool isInvariant) {
573 assert((ConvType & 3) == ConvType &&
574 "ConvType may not require more than 2 bits!");
575 assert((AM & 7) == AM &&
576 "AM may not require more than 3 bits!");
580 (isNonTemporal << 6) |
584 //===----------------------------------------------------------------------===//
585 // SelectionDAG Class
586 //===----------------------------------------------------------------------===//
588 /// doNotCSE - Return true if CSE should not be performed for this node.
589 static bool doNotCSE(SDNode *N) {
590 if (N->getValueType(0) == MVT::Glue)
591 return true; // Never CSE anything that produces a flag.
593 switch (N->getOpcode()) {
595 case ISD::HANDLENODE:
597 return true; // Never CSE these nodes.
600 // Check that remaining values produced are not flags.
601 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
602 if (N->getValueType(i) == MVT::Glue)
603 return true; // Never CSE anything that produces a flag.
608 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
610 void SelectionDAG::RemoveDeadNodes() {
611 // Create a dummy node (which is not added to allnodes), that adds a reference
612 // to the root node, preventing it from being deleted.
613 HandleSDNode Dummy(getRoot());
615 SmallVector<SDNode*, 128> DeadNodes;
617 // Add all obviously-dead nodes to the DeadNodes worklist.
618 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
620 DeadNodes.push_back(I);
622 RemoveDeadNodes(DeadNodes);
624 // If the root changed (e.g. it was a dead load, update the root).
625 setRoot(Dummy.getValue());
628 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
629 /// given list, and any nodes that become unreachable as a result.
630 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes) {
632 // Process the worklist, deleting the nodes and adding their uses to the
634 while (!DeadNodes.empty()) {
635 SDNode *N = DeadNodes.pop_back_val();
637 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
638 DUL->NodeDeleted(N, nullptr);
640 // Take the node out of the appropriate CSE map.
641 RemoveNodeFromCSEMaps(N);
643 // Next, brutally remove the operand list. This is safe to do, as there are
644 // no cycles in the graph.
645 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
647 SDNode *Operand = Use.getNode();
650 // Now that we removed this operand, see if there are no uses of it left.
651 if (Operand->use_empty())
652 DeadNodes.push_back(Operand);
659 void SelectionDAG::RemoveDeadNode(SDNode *N){
660 SmallVector<SDNode*, 16> DeadNodes(1, N);
662 // Create a dummy node that adds a reference to the root node, preventing
663 // it from being deleted. (This matters if the root is an operand of the
665 HandleSDNode Dummy(getRoot());
667 RemoveDeadNodes(DeadNodes);
670 void SelectionDAG::DeleteNode(SDNode *N) {
671 // First take this out of the appropriate CSE map.
672 RemoveNodeFromCSEMaps(N);
674 // Finally, remove uses due to operands of this node, remove from the
675 // AllNodes list, and delete the node.
676 DeleteNodeNotInCSEMaps(N);
679 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
680 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
681 assert(N->use_empty() && "Cannot delete a node that is not dead!");
683 // Drop all of the operands and decrement used node's use counts.
689 void SelectionDAG::DeallocateNode(SDNode *N) {
690 if (N->OperandsNeedDelete)
691 delete[] N->OperandList;
693 // Set the opcode to DELETED_NODE to help catch bugs when node
694 // memory is reallocated.
695 N->NodeType = ISD::DELETED_NODE;
697 NodeAllocator.Deallocate(AllNodes.remove(N));
699 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them.
700 ArrayRef<SDDbgValue*> DbgVals = DbgInfo->getSDDbgValues(N);
701 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i)
702 DbgVals[i]->setIsInvalidated();
705 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
706 /// correspond to it. This is useful when we're about to delete or repurpose
707 /// the node. We don't want future request for structurally identical nodes
708 /// to return N anymore.
709 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
711 switch (N->getOpcode()) {
712 case ISD::HANDLENODE: return false; // noop.
714 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
715 "Cond code doesn't exist!");
716 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != nullptr;
717 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = nullptr;
719 case ISD::ExternalSymbol:
720 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
722 case ISD::TargetExternalSymbol: {
723 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
724 Erased = TargetExternalSymbols.erase(
725 std::pair<std::string,unsigned char>(ESN->getSymbol(),
726 ESN->getTargetFlags()));
729 case ISD::VALUETYPE: {
730 EVT VT = cast<VTSDNode>(N)->getVT();
731 if (VT.isExtended()) {
732 Erased = ExtendedValueTypeNodes.erase(VT);
734 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != nullptr;
735 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = nullptr;
740 // Remove it from the CSE Map.
741 assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!");
742 assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!");
743 Erased = CSEMap.RemoveNode(N);
747 // Verify that the node was actually in one of the CSE maps, unless it has a
748 // flag result (which cannot be CSE'd) or is one of the special cases that are
749 // not subject to CSE.
750 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue &&
751 !N->isMachineOpcode() && !doNotCSE(N)) {
754 llvm_unreachable("Node is not in map!");
760 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
761 /// maps and modified in place. Add it back to the CSE maps, unless an identical
762 /// node already exists, in which case transfer all its users to the existing
763 /// node. This transfer can potentially trigger recursive merging.
766 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N) {
767 // For node types that aren't CSE'd, just act as if no identical node
770 SDNode *Existing = CSEMap.GetOrInsertNode(N);
772 // If there was already an existing matching node, use ReplaceAllUsesWith
773 // to replace the dead one with the existing one. This can cause
774 // recursive merging of other unrelated nodes down the line.
775 ReplaceAllUsesWith(N, Existing);
777 // N is now dead. Inform the listeners and delete it.
778 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
779 DUL->NodeDeleted(N, Existing);
780 DeleteNodeNotInCSEMaps(N);
785 // If the node doesn't already exist, we updated it. Inform listeners.
786 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
790 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
791 /// were replaced with those specified. If this node is never memoized,
792 /// return null, otherwise return a pointer to the slot it would take. If a
793 /// node already exists with these operands, the slot will be non-null.
794 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
799 SDValue Ops[] = { Op };
801 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops);
802 AddNodeIDCustom(ID, N);
803 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
807 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
808 /// were replaced with those specified. If this node is never memoized,
809 /// return null, otherwise return a pointer to the slot it would take. If a
810 /// node already exists with these operands, the slot will be non-null.
811 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
812 SDValue Op1, SDValue Op2,
817 SDValue Ops[] = { Op1, Op2 };
819 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops);
820 AddNodeIDCustom(ID, N);
821 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
826 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
827 /// were replaced with those specified. If this node is never memoized,
828 /// return null, otherwise return a pointer to the slot it would take. If a
829 /// node already exists with these operands, the slot will be non-null.
830 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, ArrayRef<SDValue> Ops,
836 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops);
837 AddNodeIDCustom(ID, N);
838 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
843 /// VerifyNodeCommon - Sanity check the given node. Aborts if it is invalid.
844 static void VerifyNodeCommon(SDNode *N) {
845 switch (N->getOpcode()) {
848 case ISD::BUILD_PAIR: {
849 EVT VT = N->getValueType(0);
850 assert(N->getNumValues() == 1 && "Too many results!");
851 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
852 "Wrong return type!");
853 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
854 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
855 "Mismatched operand types!");
856 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
857 "Wrong operand type!");
858 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
859 "Wrong return type size");
862 case ISD::BUILD_VECTOR: {
863 assert(N->getNumValues() == 1 && "Too many results!");
864 assert(N->getValueType(0).isVector() && "Wrong return type!");
865 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
866 "Wrong number of operands!");
867 EVT EltVT = N->getValueType(0).getVectorElementType();
868 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) {
869 assert((I->getValueType() == EltVT ||
870 (EltVT.isInteger() && I->getValueType().isInteger() &&
871 EltVT.bitsLE(I->getValueType()))) &&
872 "Wrong operand type!");
873 assert(I->getValueType() == N->getOperand(0).getValueType() &&
874 "Operands must all have the same type");
881 /// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid.
882 static void VerifySDNode(SDNode *N) {
883 // The SDNode allocators cannot be used to allocate nodes with fields that are
884 // not present in an SDNode!
885 assert(!isa<MemSDNode>(N) && "Bad MemSDNode!");
886 assert(!isa<ShuffleVectorSDNode>(N) && "Bad ShuffleVectorSDNode!");
887 assert(!isa<ConstantSDNode>(N) && "Bad ConstantSDNode!");
888 assert(!isa<ConstantFPSDNode>(N) && "Bad ConstantFPSDNode!");
889 assert(!isa<GlobalAddressSDNode>(N) && "Bad GlobalAddressSDNode!");
890 assert(!isa<FrameIndexSDNode>(N) && "Bad FrameIndexSDNode!");
891 assert(!isa<JumpTableSDNode>(N) && "Bad JumpTableSDNode!");
892 assert(!isa<ConstantPoolSDNode>(N) && "Bad ConstantPoolSDNode!");
893 assert(!isa<BasicBlockSDNode>(N) && "Bad BasicBlockSDNode!");
894 assert(!isa<SrcValueSDNode>(N) && "Bad SrcValueSDNode!");
895 assert(!isa<MDNodeSDNode>(N) && "Bad MDNodeSDNode!");
896 assert(!isa<RegisterSDNode>(N) && "Bad RegisterSDNode!");
897 assert(!isa<BlockAddressSDNode>(N) && "Bad BlockAddressSDNode!");
898 assert(!isa<EHLabelSDNode>(N) && "Bad EHLabelSDNode!");
899 assert(!isa<ExternalSymbolSDNode>(N) && "Bad ExternalSymbolSDNode!");
900 assert(!isa<CondCodeSDNode>(N) && "Bad CondCodeSDNode!");
901 assert(!isa<CvtRndSatSDNode>(N) && "Bad CvtRndSatSDNode!");
902 assert(!isa<VTSDNode>(N) && "Bad VTSDNode!");
903 assert(!isa<MachineSDNode>(N) && "Bad MachineSDNode!");
908 /// VerifyMachineNode - Sanity check the given MachineNode. Aborts if it is
910 static void VerifyMachineNode(SDNode *N) {
911 // The MachineNode allocators cannot be used to allocate nodes with fields
912 // that are not present in a MachineNode!
913 // Currently there are no such nodes.
919 /// getEVTAlignment - Compute the default alignment value for the
922 unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
923 Type *Ty = VT == MVT::iPTR ?
924 PointerType::get(Type::getInt8Ty(*getContext()), 0) :
925 VT.getTypeForEVT(*getContext());
927 return TM.getTargetLowering()->getDataLayout()->getABITypeAlignment(Ty);
930 // EntryNode could meaningfully have debug info if we can find it...
931 SelectionDAG::SelectionDAG(const TargetMachine &tm, CodeGenOpt::Level OL)
932 : TM(tm), TSI(*tm.getSelectionDAGInfo()), TLI(nullptr), OptLevel(OL),
933 EntryNode(ISD::EntryToken, 0, DebugLoc(), getVTList(MVT::Other)),
934 Root(getEntryNode()), NewNodesMustHaveLegalTypes(false),
935 UpdateListeners(nullptr) {
936 AllNodes.push_back(&EntryNode);
937 DbgInfo = new SDDbgInfo();
940 void SelectionDAG::init(MachineFunction &mf, const TargetLowering *tli) {
943 Context = &mf.getFunction()->getContext();
946 SelectionDAG::~SelectionDAG() {
947 assert(!UpdateListeners && "Dangling registered DAGUpdateListeners");
952 void SelectionDAG::allnodes_clear() {
953 assert(&*AllNodes.begin() == &EntryNode);
954 AllNodes.remove(AllNodes.begin());
955 while (!AllNodes.empty())
956 DeallocateNode(AllNodes.begin());
959 BinarySDNode *SelectionDAG::GetBinarySDNode(unsigned Opcode, SDLoc DL,
960 SDVTList VTs, SDValue N1,
961 SDValue N2, bool nuw, bool nsw,
963 if (isBinOpWithFlags(Opcode)) {
964 BinaryWithFlagsSDNode *FN = new (NodeAllocator) BinaryWithFlagsSDNode(
965 Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs, N1, N2);
966 FN->setHasNoUnsignedWrap(nuw);
967 FN->setHasNoSignedWrap(nsw);
968 FN->setIsExact(exact);
973 BinarySDNode *N = new (NodeAllocator)
974 BinarySDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs, N1, N2);
978 void SelectionDAG::clear() {
980 OperandAllocator.Reset();
983 ExtendedValueTypeNodes.clear();
984 ExternalSymbols.clear();
985 TargetExternalSymbols.clear();
986 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
987 static_cast<CondCodeSDNode*>(nullptr));
988 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
989 static_cast<SDNode*>(nullptr));
991 EntryNode.UseList = nullptr;
992 AllNodes.push_back(&EntryNode);
993 Root = getEntryNode();
997 SDValue SelectionDAG::getAnyExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) {
998 return VT.bitsGT(Op.getValueType()) ?
999 getNode(ISD::ANY_EXTEND, DL, VT, Op) :
1000 getNode(ISD::TRUNCATE, DL, VT, Op);
1003 SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) {
1004 return VT.bitsGT(Op.getValueType()) ?
1005 getNode(ISD::SIGN_EXTEND, DL, VT, Op) :
1006 getNode(ISD::TRUNCATE, DL, VT, Op);
1009 SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) {
1010 return VT.bitsGT(Op.getValueType()) ?
1011 getNode(ISD::ZERO_EXTEND, DL, VT, Op) :
1012 getNode(ISD::TRUNCATE, DL, VT, Op);
1015 SDValue SelectionDAG::getBoolExtOrTrunc(SDValue Op, SDLoc SL, EVT VT) {
1016 if (VT.bitsLE(Op.getValueType()))
1017 return getNode(ISD::TRUNCATE, SL, VT, Op);
1019 TargetLowering::BooleanContent BType = TLI->getBooleanContents(VT.isVector());
1020 return getNode(TLI->getExtendForContent(BType), SL, VT, Op);
1023 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, SDLoc DL, EVT VT) {
1024 assert(!VT.isVector() &&
1025 "getZeroExtendInReg should use the vector element type instead of "
1026 "the vector type!");
1027 if (Op.getValueType() == VT) return Op;
1028 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1029 APInt Imm = APInt::getLowBitsSet(BitWidth,
1030 VT.getSizeInBits());
1031 return getNode(ISD::AND, DL, Op.getValueType(), Op,
1032 getConstant(Imm, Op.getValueType()));
1035 SDValue SelectionDAG::getZeroExtendVectorInReg(SDValue Op, SDLoc DL, EVT VT) {
1036 assert(VT.isVector() && "This DAG node is restricted to vector types.");
1037 assert(VT.getSizeInBits() == Op.getValueType().getSizeInBits() &&
1038 "The sizes of the input and result must match in order to perform the "
1039 "extend in-register.");
1040 assert(VT.getVectorNumElements() < Op.getValueType().getVectorNumElements() &&
1041 "The destination vector type must have fewer lanes than the input.");
1042 return getNode(ISD::ZERO_EXTEND_VECTOR_INREG, DL, VT, Op);
1045 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
1047 SDValue SelectionDAG::getNOT(SDLoc DL, SDValue Val, EVT VT) {
1048 EVT EltVT = VT.getScalarType();
1050 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT);
1051 return getNode(ISD::XOR, DL, VT, Val, NegOne);
1054 SDValue SelectionDAG::getLogicalNOT(SDLoc DL, SDValue Val, EVT VT) {
1055 EVT EltVT = VT.getScalarType();
1057 switch (TLI->getBooleanContents(VT.isVector())) {
1058 case TargetLowering::ZeroOrOneBooleanContent:
1059 case TargetLowering::UndefinedBooleanContent:
1060 TrueValue = getConstant(1, VT);
1062 case TargetLowering::ZeroOrNegativeOneBooleanContent:
1063 TrueValue = getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()),
1067 return getNode(ISD::XOR, DL, VT, Val, TrueValue);
1070 SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT, bool isO) {
1071 EVT EltVT = VT.getScalarType();
1072 assert((EltVT.getSizeInBits() >= 64 ||
1073 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
1074 "getConstant with a uint64_t value that doesn't fit in the type!");
1075 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT, isO);
1078 SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT, bool isO)
1080 return getConstant(*ConstantInt::get(*Context, Val), VT, isT, isO);
1083 SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT,
1085 assert(VT.isInteger() && "Cannot create FP integer constant!");
1087 EVT EltVT = VT.getScalarType();
1088 const ConstantInt *Elt = &Val;
1090 const TargetLowering *TLI = TM.getTargetLowering();
1092 // In some cases the vector type is legal but the element type is illegal and
1093 // needs to be promoted, for example v8i8 on ARM. In this case, promote the
1094 // inserted value (the type does not need to match the vector element type).
1095 // Any extra bits introduced will be truncated away.
1096 if (VT.isVector() && TLI->getTypeAction(*getContext(), EltVT) ==
1097 TargetLowering::TypePromoteInteger) {
1098 EltVT = TLI->getTypeToTransformTo(*getContext(), EltVT);
1099 APInt NewVal = Elt->getValue().zext(EltVT.getSizeInBits());
1100 Elt = ConstantInt::get(*getContext(), NewVal);
1102 // In other cases the element type is illegal and needs to be expanded, for
1103 // example v2i64 on MIPS32. In this case, find the nearest legal type, split
1104 // the value into n parts and use a vector type with n-times the elements.
1105 // Then bitcast to the type requested.
1106 // Legalizing constants too early makes the DAGCombiner's job harder so we
1107 // only legalize if the DAG tells us we must produce legal types.
1108 else if (NewNodesMustHaveLegalTypes && VT.isVector() &&
1109 TLI->getTypeAction(*getContext(), EltVT) ==
1110 TargetLowering::TypeExpandInteger) {
1111 APInt NewVal = Elt->getValue();
1112 EVT ViaEltVT = TLI->getTypeToTransformTo(*getContext(), EltVT);
1113 unsigned ViaEltSizeInBits = ViaEltVT.getSizeInBits();
1114 unsigned ViaVecNumElts = VT.getSizeInBits() / ViaEltSizeInBits;
1115 EVT ViaVecVT = EVT::getVectorVT(*getContext(), ViaEltVT, ViaVecNumElts);
1117 // Check the temporary vector is the correct size. If this fails then
1118 // getTypeToTransformTo() probably returned a type whose size (in bits)
1119 // isn't a power-of-2 factor of the requested type size.
1120 assert(ViaVecVT.getSizeInBits() == VT.getSizeInBits());
1122 SmallVector<SDValue, 2> EltParts;
1123 for (unsigned i = 0; i < ViaVecNumElts / VT.getVectorNumElements(); ++i) {
1124 EltParts.push_back(getConstant(NewVal.lshr(i * ViaEltSizeInBits)
1125 .trunc(ViaEltSizeInBits),
1126 ViaEltVT, isT, isO));
1129 // EltParts is currently in little endian order. If we actually want
1130 // big-endian order then reverse it now.
1131 if (TLI->isBigEndian())
1132 std::reverse(EltParts.begin(), EltParts.end());
1134 // The elements must be reversed when the element order is different
1135 // to the endianness of the elements (because the BITCAST is itself a
1136 // vector shuffle in this situation). However, we do not need any code to
1137 // perform this reversal because getConstant() is producing a vector
1139 // This situation occurs in MIPS MSA.
1141 SmallVector<SDValue, 8> Ops;
1142 for (unsigned i = 0; i < VT.getVectorNumElements(); ++i)
1143 Ops.insert(Ops.end(), EltParts.begin(), EltParts.end());
1145 SDValue Result = getNode(ISD::BITCAST, SDLoc(), VT,
1146 getNode(ISD::BUILD_VECTOR, SDLoc(), ViaVecVT,
1151 assert(Elt->getBitWidth() == EltVT.getSizeInBits() &&
1152 "APInt size does not match type size!");
1153 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
1154 FoldingSetNodeID ID;
1155 AddNodeIDNode(ID, Opc, getVTList(EltVT), None);
1159 SDNode *N = nullptr;
1160 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
1162 return SDValue(N, 0);
1165 N = new (NodeAllocator) ConstantSDNode(isT, isO, Elt, EltVT);
1166 CSEMap.InsertNode(N, IP);
1167 AllNodes.push_back(N);
1170 SDValue Result(N, 0);
1171 if (VT.isVector()) {
1172 SmallVector<SDValue, 8> Ops;
1173 Ops.assign(VT.getVectorNumElements(), Result);
1174 Result = getNode(ISD::BUILD_VECTOR, SDLoc(), VT, Ops);
1179 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
1180 return getConstant(Val, TM.getTargetLowering()->getPointerTy(), isTarget);
1184 SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) {
1185 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget);
1188 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){
1189 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
1191 EVT EltVT = VT.getScalarType();
1193 // Do the map lookup using the actual bit pattern for the floating point
1194 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
1195 // we don't have issues with SNANs.
1196 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
1197 FoldingSetNodeID ID;
1198 AddNodeIDNode(ID, Opc, getVTList(EltVT), None);
1201 SDNode *N = nullptr;
1202 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
1204 return SDValue(N, 0);
1207 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT);
1208 CSEMap.InsertNode(N, IP);
1209 AllNodes.push_back(N);
1212 SDValue Result(N, 0);
1213 if (VT.isVector()) {
1214 SmallVector<SDValue, 8> Ops;
1215 Ops.assign(VT.getVectorNumElements(), Result);
1216 // FIXME SDLoc info might be appropriate here
1217 Result = getNode(ISD::BUILD_VECTOR, SDLoc(), VT, Ops);
1222 SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) {
1223 EVT EltVT = VT.getScalarType();
1224 if (EltVT==MVT::f32)
1225 return getConstantFP(APFloat((float)Val), VT, isTarget);
1226 else if (EltVT==MVT::f64)
1227 return getConstantFP(APFloat(Val), VT, isTarget);
1228 else if (EltVT==MVT::f80 || EltVT==MVT::f128 || EltVT==MVT::ppcf128 ||
1231 APFloat apf = APFloat(Val);
1232 apf.convert(EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven,
1234 return getConstantFP(apf, VT, isTarget);
1236 llvm_unreachable("Unsupported type in getConstantFP");
1239 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, SDLoc DL,
1240 EVT VT, int64_t Offset,
1242 unsigned char TargetFlags) {
1243 assert((TargetFlags == 0 || isTargetGA) &&
1244 "Cannot set target flags on target-independent globals");
1245 const TargetLowering *TLI = TM.getTargetLowering();
1247 // Truncate (with sign-extension) the offset value to the pointer size.
1248 unsigned BitWidth = TLI->getPointerTypeSizeInBits(GV->getType());
1250 Offset = SignExtend64(Offset, BitWidth);
1253 if (GV->isThreadLocal())
1254 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
1256 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
1258 FoldingSetNodeID ID;
1259 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1261 ID.AddInteger(Offset);
1262 ID.AddInteger(TargetFlags);
1263 ID.AddInteger(GV->getType()->getAddressSpace());
1265 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1266 return SDValue(E, 0);
1268 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL.getIROrder(),
1269 DL.getDebugLoc(), GV, VT,
1270 Offset, TargetFlags);
1271 CSEMap.InsertNode(N, IP);
1272 AllNodes.push_back(N);
1273 return SDValue(N, 0);
1276 SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
1277 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1278 FoldingSetNodeID ID;
1279 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1282 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1283 return SDValue(E, 0);
1285 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget);
1286 CSEMap.InsertNode(N, IP);
1287 AllNodes.push_back(N);
1288 return SDValue(N, 0);
1291 SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
1292 unsigned char TargetFlags) {
1293 assert((TargetFlags == 0 || isTarget) &&
1294 "Cannot set target flags on target-independent jump tables");
1295 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1296 FoldingSetNodeID ID;
1297 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1299 ID.AddInteger(TargetFlags);
1301 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1302 return SDValue(E, 0);
1304 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget,
1306 CSEMap.InsertNode(N, IP);
1307 AllNodes.push_back(N);
1308 return SDValue(N, 0);
1311 SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT,
1312 unsigned Alignment, int Offset,
1314 unsigned char TargetFlags) {
1315 assert((TargetFlags == 0 || isTarget) &&
1316 "Cannot set target flags on target-independent globals");
1319 TM.getTargetLowering()->getDataLayout()->getPrefTypeAlignment(C->getType());
1320 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1321 FoldingSetNodeID ID;
1322 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1323 ID.AddInteger(Alignment);
1324 ID.AddInteger(Offset);
1326 ID.AddInteger(TargetFlags);
1328 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1329 return SDValue(E, 0);
1331 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1332 Alignment, TargetFlags);
1333 CSEMap.InsertNode(N, IP);
1334 AllNodes.push_back(N);
1335 return SDValue(N, 0);
1339 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
1340 unsigned Alignment, int Offset,
1342 unsigned char TargetFlags) {
1343 assert((TargetFlags == 0 || isTarget) &&
1344 "Cannot set target flags on target-independent globals");
1347 TM.getTargetLowering()->getDataLayout()->getPrefTypeAlignment(C->getType());
1348 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1349 FoldingSetNodeID ID;
1350 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1351 ID.AddInteger(Alignment);
1352 ID.AddInteger(Offset);
1353 C->addSelectionDAGCSEId(ID);
1354 ID.AddInteger(TargetFlags);
1356 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1357 return SDValue(E, 0);
1359 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1360 Alignment, TargetFlags);
1361 CSEMap.InsertNode(N, IP);
1362 AllNodes.push_back(N);
1363 return SDValue(N, 0);
1366 SDValue SelectionDAG::getTargetIndex(int Index, EVT VT, int64_t Offset,
1367 unsigned char TargetFlags) {
1368 FoldingSetNodeID ID;
1369 AddNodeIDNode(ID, ISD::TargetIndex, getVTList(VT), None);
1370 ID.AddInteger(Index);
1371 ID.AddInteger(Offset);
1372 ID.AddInteger(TargetFlags);
1374 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1375 return SDValue(E, 0);
1377 SDNode *N = new (NodeAllocator) TargetIndexSDNode(Index, VT, Offset,
1379 CSEMap.InsertNode(N, IP);
1380 AllNodes.push_back(N);
1381 return SDValue(N, 0);
1384 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1385 FoldingSetNodeID ID;
1386 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), None);
1389 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1390 return SDValue(E, 0);
1392 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB);
1393 CSEMap.InsertNode(N, IP);
1394 AllNodes.push_back(N);
1395 return SDValue(N, 0);
1398 SDValue SelectionDAG::getValueType(EVT VT) {
1399 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
1400 ValueTypeNodes.size())
1401 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
1403 SDNode *&N = VT.isExtended() ?
1404 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
1406 if (N) return SDValue(N, 0);
1407 N = new (NodeAllocator) VTSDNode(VT);
1408 AllNodes.push_back(N);
1409 return SDValue(N, 0);
1412 SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
1413 SDNode *&N = ExternalSymbols[Sym];
1414 if (N) return SDValue(N, 0);
1415 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT);
1416 AllNodes.push_back(N);
1417 return SDValue(N, 0);
1420 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
1421 unsigned char TargetFlags) {
1423 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1425 if (N) return SDValue(N, 0);
1426 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1427 AllNodes.push_back(N);
1428 return SDValue(N, 0);
1431 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1432 if ((unsigned)Cond >= CondCodeNodes.size())
1433 CondCodeNodes.resize(Cond+1);
1435 if (!CondCodeNodes[Cond]) {
1436 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond);
1437 CondCodeNodes[Cond] = N;
1438 AllNodes.push_back(N);
1441 return SDValue(CondCodeNodes[Cond], 0);
1444 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1445 // the shuffle mask M that point at N1 to point at N2, and indices that point
1446 // N2 to point at N1.
1447 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1449 int NElts = M.size();
1450 for (int i = 0; i != NElts; ++i) {
1458 SDValue SelectionDAG::getVectorShuffle(EVT VT, SDLoc dl, SDValue N1,
1459 SDValue N2, const int *Mask) {
1460 assert(VT == N1.getValueType() && VT == N2.getValueType() &&
1461 "Invalid VECTOR_SHUFFLE");
1463 // Canonicalize shuffle undef, undef -> undef
1464 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1465 return getUNDEF(VT);
1467 // Validate that all indices in Mask are within the range of the elements
1468 // input to the shuffle.
1469 unsigned NElts = VT.getVectorNumElements();
1470 SmallVector<int, 8> MaskVec;
1471 for (unsigned i = 0; i != NElts; ++i) {
1472 assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1473 MaskVec.push_back(Mask[i]);
1476 // Canonicalize shuffle v, v -> v, undef
1479 for (unsigned i = 0; i != NElts; ++i)
1480 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1483 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1484 if (N1.getOpcode() == ISD::UNDEF)
1485 commuteShuffle(N1, N2, MaskVec);
1487 // Canonicalize all index into lhs, -> shuffle lhs, undef
1488 // Canonicalize all index into rhs, -> shuffle rhs, undef
1489 bool AllLHS = true, AllRHS = true;
1490 bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1491 for (unsigned i = 0; i != NElts; ++i) {
1492 if (MaskVec[i] >= (int)NElts) {
1497 } else if (MaskVec[i] >= 0) {
1501 if (AllLHS && AllRHS)
1502 return getUNDEF(VT);
1503 if (AllLHS && !N2Undef)
1507 commuteShuffle(N1, N2, MaskVec);
1509 // Reset our undef status after accounting for the mask.
1510 N2Undef = N2.getOpcode() == ISD::UNDEF;
1511 // Re-check whether both sides ended up undef.
1512 if (N1.getOpcode() == ISD::UNDEF && N2Undef)
1513 return getUNDEF(VT);
1515 // If Identity shuffle return that node.
1516 bool Identity = true;
1517 for (unsigned i = 0; i != NElts; ++i) {
1518 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1520 if (Identity && NElts)
1523 // Shuffling a constant splat doesn't change the result.
1527 // Look through any bitcasts. We check that these don't change the number
1528 // (and size) of elements and just changes their types.
1529 while (V.getOpcode() == ISD::BITCAST)
1530 V = V->getOperand(0);
1532 // A splat should always show up as a build vector node.
1533 if (auto *BV = dyn_cast<BuildVectorSDNode>(V)) {
1534 BitVector UndefElements;
1535 SDValue Splat = BV->getSplatValue(&UndefElements);
1536 // If this is a splat of an undef, shuffling it is also undef.
1537 if (Splat && Splat.getOpcode() == ISD::UNDEF)
1538 return getUNDEF(VT);
1540 // We only have a splat which can skip shuffles if there is a splatted
1541 // value and no undef lanes rearranged by the shuffle.
1542 if (Splat && UndefElements.none()) {
1543 // Splat of <x, x, ..., x>, return <x, x, ..., x>, provided that the
1544 // number of elements match or the value splatted is a zero constant.
1545 if (V.getValueType().getVectorNumElements() ==
1546 VT.getVectorNumElements())
1548 if (auto *C = dyn_cast<ConstantSDNode>(Splat))
1549 if (C->isNullValue())
1555 FoldingSetNodeID ID;
1556 SDValue Ops[2] = { N1, N2 };
1557 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops);
1558 for (unsigned i = 0; i != NElts; ++i)
1559 ID.AddInteger(MaskVec[i]);
1562 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1563 return SDValue(E, 0);
1565 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1566 // SDNode doesn't have access to it. This memory will be "leaked" when
1567 // the node is deallocated, but recovered when the NodeAllocator is released.
1568 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1569 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1571 ShuffleVectorSDNode *N =
1572 new (NodeAllocator) ShuffleVectorSDNode(VT, dl.getIROrder(),
1573 dl.getDebugLoc(), N1, N2,
1575 CSEMap.InsertNode(N, IP);
1576 AllNodes.push_back(N);
1577 return SDValue(N, 0);
1580 SDValue SelectionDAG::getConvertRndSat(EVT VT, SDLoc dl,
1581 SDValue Val, SDValue DTy,
1582 SDValue STy, SDValue Rnd, SDValue Sat,
1583 ISD::CvtCode Code) {
1584 // If the src and dest types are the same and the conversion is between
1585 // integer types of the same sign or two floats, no conversion is necessary.
1587 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1590 FoldingSetNodeID ID;
1591 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1592 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), Ops);
1594 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1595 return SDValue(E, 0);
1597 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl.getIROrder(),
1600 CSEMap.InsertNode(N, IP);
1601 AllNodes.push_back(N);
1602 return SDValue(N, 0);
1605 SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
1606 FoldingSetNodeID ID;
1607 AddNodeIDNode(ID, ISD::Register, getVTList(VT), None);
1608 ID.AddInteger(RegNo);
1610 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1611 return SDValue(E, 0);
1613 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT);
1614 CSEMap.InsertNode(N, IP);
1615 AllNodes.push_back(N);
1616 return SDValue(N, 0);
1619 SDValue SelectionDAG::getRegisterMask(const uint32_t *RegMask) {
1620 FoldingSetNodeID ID;
1621 AddNodeIDNode(ID, ISD::RegisterMask, getVTList(MVT::Untyped), None);
1622 ID.AddPointer(RegMask);
1624 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1625 return SDValue(E, 0);
1627 SDNode *N = new (NodeAllocator) RegisterMaskSDNode(RegMask);
1628 CSEMap.InsertNode(N, IP);
1629 AllNodes.push_back(N);
1630 return SDValue(N, 0);
1633 SDValue SelectionDAG::getEHLabel(SDLoc dl, SDValue Root, MCSymbol *Label) {
1634 FoldingSetNodeID ID;
1635 SDValue Ops[] = { Root };
1636 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), Ops);
1637 ID.AddPointer(Label);
1639 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1640 return SDValue(E, 0);
1642 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl.getIROrder(),
1643 dl.getDebugLoc(), Root, Label);
1644 CSEMap.InsertNode(N, IP);
1645 AllNodes.push_back(N);
1646 return SDValue(N, 0);
1650 SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT,
1653 unsigned char TargetFlags) {
1654 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress;
1656 FoldingSetNodeID ID;
1657 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1659 ID.AddInteger(Offset);
1660 ID.AddInteger(TargetFlags);
1662 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1663 return SDValue(E, 0);
1665 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, Offset,
1667 CSEMap.InsertNode(N, IP);
1668 AllNodes.push_back(N);
1669 return SDValue(N, 0);
1672 SDValue SelectionDAG::getSrcValue(const Value *V) {
1673 assert((!V || V->getType()->isPointerTy()) &&
1674 "SrcValue is not a pointer?");
1676 FoldingSetNodeID ID;
1677 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), None);
1681 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1682 return SDValue(E, 0);
1684 SDNode *N = new (NodeAllocator) SrcValueSDNode(V);
1685 CSEMap.InsertNode(N, IP);
1686 AllNodes.push_back(N);
1687 return SDValue(N, 0);
1690 /// getMDNode - Return an MDNodeSDNode which holds an MDNode.
1691 SDValue SelectionDAG::getMDNode(const MDNode *MD) {
1692 FoldingSetNodeID ID;
1693 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), None);
1697 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1698 return SDValue(E, 0);
1700 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD);
1701 CSEMap.InsertNode(N, IP);
1702 AllNodes.push_back(N);
1703 return SDValue(N, 0);
1706 /// getAddrSpaceCast - Return an AddrSpaceCastSDNode.
1707 SDValue SelectionDAG::getAddrSpaceCast(SDLoc dl, EVT VT, SDValue Ptr,
1708 unsigned SrcAS, unsigned DestAS) {
1709 SDValue Ops[] = {Ptr};
1710 FoldingSetNodeID ID;
1711 AddNodeIDNode(ID, ISD::ADDRSPACECAST, getVTList(VT), Ops);
1712 ID.AddInteger(SrcAS);
1713 ID.AddInteger(DestAS);
1716 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1717 return SDValue(E, 0);
1719 SDNode *N = new (NodeAllocator) AddrSpaceCastSDNode(dl.getIROrder(),
1721 VT, Ptr, SrcAS, DestAS);
1722 CSEMap.InsertNode(N, IP);
1723 AllNodes.push_back(N);
1724 return SDValue(N, 0);
1727 /// getShiftAmountOperand - Return the specified value casted to
1728 /// the target's desired shift amount type.
1729 SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) {
1730 EVT OpTy = Op.getValueType();
1731 EVT ShTy = TM.getTargetLowering()->getShiftAmountTy(LHSTy);
1732 if (OpTy == ShTy || OpTy.isVector()) return Op;
1734 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1735 return getNode(Opcode, SDLoc(Op), ShTy, Op);
1738 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1739 /// specified value type.
1740 SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
1741 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1742 unsigned ByteSize = VT.getStoreSize();
1743 Type *Ty = VT.getTypeForEVT(*getContext());
1744 const TargetLowering *TLI = TM.getTargetLowering();
1745 unsigned StackAlign =
1746 std::max((unsigned)TLI->getDataLayout()->getPrefTypeAlignment(Ty), minAlign);
1748 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false);
1749 return getFrameIndex(FrameIdx, TLI->getPointerTy());
1752 /// CreateStackTemporary - Create a stack temporary suitable for holding
1753 /// either of the specified value types.
1754 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
1755 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1756 VT2.getStoreSizeInBits())/8;
1757 Type *Ty1 = VT1.getTypeForEVT(*getContext());
1758 Type *Ty2 = VT2.getTypeForEVT(*getContext());
1759 const TargetLowering *TLI = TM.getTargetLowering();
1760 const DataLayout *TD = TLI->getDataLayout();
1761 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1762 TD->getPrefTypeAlignment(Ty2));
1764 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1765 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false);
1766 return getFrameIndex(FrameIdx, TLI->getPointerTy());
1769 SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
1770 SDValue N2, ISD::CondCode Cond, SDLoc dl) {
1771 // These setcc operations always fold.
1775 case ISD::SETFALSE2: return getConstant(0, VT);
1777 case ISD::SETTRUE2: {
1778 const TargetLowering *TLI = TM.getTargetLowering();
1779 TargetLowering::BooleanContent Cnt = TLI->getBooleanContents(VT.isVector());
1781 Cnt == TargetLowering::ZeroOrNegativeOneBooleanContent ? -1ULL : 1, VT);
1794 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1798 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1799 const APInt &C2 = N2C->getAPIntValue();
1800 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1801 const APInt &C1 = N1C->getAPIntValue();
1804 default: llvm_unreachable("Unknown integer setcc!");
1805 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1806 case ISD::SETNE: return getConstant(C1 != C2, VT);
1807 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1808 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1809 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1810 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1811 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1812 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1813 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1814 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1818 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1819 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1820 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1823 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1824 return getUNDEF(VT);
1826 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1827 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1828 return getUNDEF(VT);
1830 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1831 R==APFloat::cmpLessThan, VT);
1832 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1833 return getUNDEF(VT);
1835 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1836 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1837 return getUNDEF(VT);
1839 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1840 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1841 return getUNDEF(VT);
1843 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1844 R==APFloat::cmpEqual, VT);
1845 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1846 return getUNDEF(VT);
1848 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1849 R==APFloat::cmpEqual, VT);
1850 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1851 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1852 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1853 R==APFloat::cmpEqual, VT);
1854 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1855 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1856 R==APFloat::cmpLessThan, VT);
1857 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1858 R==APFloat::cmpUnordered, VT);
1859 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1860 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1863 // Ensure that the constant occurs on the RHS.
1864 ISD::CondCode SwappedCond = ISD::getSetCCSwappedOperands(Cond);
1865 MVT CompVT = N1.getValueType().getSimpleVT();
1866 if (!TM.getTargetLowering()->isCondCodeLegal(SwappedCond, CompVT))
1869 return getSetCC(dl, VT, N2, N1, SwappedCond);
1873 // Could not fold it.
1877 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1878 /// use this predicate to simplify operations downstream.
1879 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1880 // This predicate is not safe for vector operations.
1881 if (Op.getValueType().isVector())
1884 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1885 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1888 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1889 /// this predicate to simplify operations downstream. Mask is known to be zero
1890 /// for bits that V cannot have.
1891 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1892 unsigned Depth) const {
1893 APInt KnownZero, KnownOne;
1894 computeKnownBits(Op, KnownZero, KnownOne, Depth);
1895 return (KnownZero & Mask) == Mask;
1898 /// Determine which bits of Op are known to be either zero or one and return
1899 /// them in the KnownZero/KnownOne bitsets.
1900 void SelectionDAG::computeKnownBits(SDValue Op, APInt &KnownZero,
1901 APInt &KnownOne, unsigned Depth) const {
1902 const TargetLowering *TLI = TM.getTargetLowering();
1903 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1905 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1907 return; // Limit search depth.
1909 APInt KnownZero2, KnownOne2;
1911 switch (Op.getOpcode()) {
1913 // We know all of the bits for a constant!
1914 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue();
1915 KnownZero = ~KnownOne;
1918 // If either the LHS or the RHS are Zero, the result is zero.
1919 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1920 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1922 // Output known-1 bits are only known if set in both the LHS & RHS.
1923 KnownOne &= KnownOne2;
1924 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1925 KnownZero |= KnownZero2;
1928 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1929 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1931 // Output known-0 bits are only known if clear in both the LHS & RHS.
1932 KnownZero &= KnownZero2;
1933 // Output known-1 are known to be set if set in either the LHS | RHS.
1934 KnownOne |= KnownOne2;
1937 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1938 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1940 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1941 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1942 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1943 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1944 KnownZero = KnownZeroOut;
1948 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1949 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1951 // If low bits are zero in either operand, output low known-0 bits.
1952 // Also compute a conserative estimate for high known-0 bits.
1953 // More trickiness is possible, but this is sufficient for the
1954 // interesting case of alignment computation.
1955 KnownOne.clearAllBits();
1956 unsigned TrailZ = KnownZero.countTrailingOnes() +
1957 KnownZero2.countTrailingOnes();
1958 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1959 KnownZero2.countLeadingOnes(),
1960 BitWidth) - BitWidth;
1962 TrailZ = std::min(TrailZ, BitWidth);
1963 LeadZ = std::min(LeadZ, BitWidth);
1964 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1965 APInt::getHighBitsSet(BitWidth, LeadZ);
1969 // For the purposes of computing leading zeros we can conservatively
1970 // treat a udiv as a logical right shift by the power of 2 known to
1971 // be less than the denominator.
1972 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1973 unsigned LeadZ = KnownZero2.countLeadingOnes();
1975 KnownOne2.clearAllBits();
1976 KnownZero2.clearAllBits();
1977 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
1978 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1979 if (RHSUnknownLeadingOnes != BitWidth)
1980 LeadZ = std::min(BitWidth,
1981 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1983 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ);
1987 computeKnownBits(Op.getOperand(2), KnownZero, KnownOne, Depth+1);
1988 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
1990 // Only known if known in both the LHS and RHS.
1991 KnownOne &= KnownOne2;
1992 KnownZero &= KnownZero2;
1994 case ISD::SELECT_CC:
1995 computeKnownBits(Op.getOperand(3), KnownZero, KnownOne, Depth+1);
1996 computeKnownBits(Op.getOperand(2), KnownZero2, KnownOne2, Depth+1);
1998 // Only known if known in both the LHS and RHS.
1999 KnownOne &= KnownOne2;
2000 KnownZero &= KnownZero2;
2008 if (Op.getResNo() != 1)
2010 // The boolean result conforms to getBooleanContents. Fall through.
2012 // If we know the result of a setcc has the top bits zero, use this info.
2013 if (TLI->getBooleanContents(Op.getValueType().isVector()) ==
2014 TargetLowering::ZeroOrOneBooleanContent && BitWidth > 1)
2015 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
2018 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
2019 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2020 unsigned ShAmt = SA->getZExtValue();
2022 // If the shift count is an invalid immediate, don't do anything.
2023 if (ShAmt >= BitWidth)
2026 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2027 KnownZero <<= ShAmt;
2029 // low bits known zero.
2030 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
2034 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
2035 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2036 unsigned ShAmt = SA->getZExtValue();
2038 // If the shift count is an invalid immediate, don't do anything.
2039 if (ShAmt >= BitWidth)
2042 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2043 KnownZero = KnownZero.lshr(ShAmt);
2044 KnownOne = KnownOne.lshr(ShAmt);
2046 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
2047 KnownZero |= HighBits; // High bits known zero.
2051 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2052 unsigned ShAmt = SA->getZExtValue();
2054 // If the shift count is an invalid immediate, don't do anything.
2055 if (ShAmt >= BitWidth)
2058 // If any of the demanded bits are produced by the sign extension, we also
2059 // demand the input sign bit.
2060 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
2062 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2063 KnownZero = KnownZero.lshr(ShAmt);
2064 KnownOne = KnownOne.lshr(ShAmt);
2066 // Handle the sign bits.
2067 APInt SignBit = APInt::getSignBit(BitWidth);
2068 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
2070 if (KnownZero.intersects(SignBit)) {
2071 KnownZero |= HighBits; // New bits are known zero.
2072 } else if (KnownOne.intersects(SignBit)) {
2073 KnownOne |= HighBits; // New bits are known one.
2077 case ISD::SIGN_EXTEND_INREG: {
2078 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
2079 unsigned EBits = EVT.getScalarType().getSizeInBits();
2081 // Sign extension. Compute the demanded bits in the result that are not
2082 // present in the input.
2083 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits);
2085 APInt InSignBit = APInt::getSignBit(EBits);
2086 APInt InputDemandedBits = APInt::getLowBitsSet(BitWidth, EBits);
2088 // If the sign extended bits are demanded, we know that the sign
2090 InSignBit = InSignBit.zext(BitWidth);
2091 if (NewBits.getBoolValue())
2092 InputDemandedBits |= InSignBit;
2094 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2095 KnownOne &= InputDemandedBits;
2096 KnownZero &= InputDemandedBits;
2098 // If the sign bit of the input is known set or clear, then we know the
2099 // top bits of the result.
2100 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
2101 KnownZero |= NewBits;
2102 KnownOne &= ~NewBits;
2103 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
2104 KnownOne |= NewBits;
2105 KnownZero &= ~NewBits;
2106 } else { // Input sign bit unknown
2107 KnownZero &= ~NewBits;
2108 KnownOne &= ~NewBits;
2113 case ISD::CTTZ_ZERO_UNDEF:
2115 case ISD::CTLZ_ZERO_UNDEF:
2117 unsigned LowBits = Log2_32(BitWidth)+1;
2118 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
2119 KnownOne.clearAllBits();
2123 LoadSDNode *LD = cast<LoadSDNode>(Op);
2124 // If this is a ZEXTLoad and we are looking at the loaded value.
2125 if (ISD::isZEXTLoad(Op.getNode()) && Op.getResNo() == 0) {
2126 EVT VT = LD->getMemoryVT();
2127 unsigned MemBits = VT.getScalarType().getSizeInBits();
2128 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits);
2129 } else if (const MDNode *Ranges = LD->getRanges()) {
2130 computeKnownBitsFromRangeMetadata(*Ranges, KnownZero);
2134 case ISD::ZERO_EXTEND: {
2135 EVT InVT = Op.getOperand(0).getValueType();
2136 unsigned InBits = InVT.getScalarType().getSizeInBits();
2137 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
2138 KnownZero = KnownZero.trunc(InBits);
2139 KnownOne = KnownOne.trunc(InBits);
2140 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2141 KnownZero = KnownZero.zext(BitWidth);
2142 KnownOne = KnownOne.zext(BitWidth);
2143 KnownZero |= NewBits;
2146 case ISD::SIGN_EXTEND: {
2147 EVT InVT = Op.getOperand(0).getValueType();
2148 unsigned InBits = InVT.getScalarType().getSizeInBits();
2149 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
2151 KnownZero = KnownZero.trunc(InBits);
2152 KnownOne = KnownOne.trunc(InBits);
2153 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2155 // Note if the sign bit is known to be zero or one.
2156 bool SignBitKnownZero = KnownZero.isNegative();
2157 bool SignBitKnownOne = KnownOne.isNegative();
2159 KnownZero = KnownZero.zext(BitWidth);
2160 KnownOne = KnownOne.zext(BitWidth);
2162 // If the sign bit is known zero or one, the top bits match.
2163 if (SignBitKnownZero)
2164 KnownZero |= NewBits;
2165 else if (SignBitKnownOne)
2166 KnownOne |= NewBits;
2169 case ISD::ANY_EXTEND: {
2170 EVT InVT = Op.getOperand(0).getValueType();
2171 unsigned InBits = InVT.getScalarType().getSizeInBits();
2172 KnownZero = KnownZero.trunc(InBits);
2173 KnownOne = KnownOne.trunc(InBits);
2174 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2175 KnownZero = KnownZero.zext(BitWidth);
2176 KnownOne = KnownOne.zext(BitWidth);
2179 case ISD::TRUNCATE: {
2180 EVT InVT = Op.getOperand(0).getValueType();
2181 unsigned InBits = InVT.getScalarType().getSizeInBits();
2182 KnownZero = KnownZero.zext(InBits);
2183 KnownOne = KnownOne.zext(InBits);
2184 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2185 KnownZero = KnownZero.trunc(BitWidth);
2186 KnownOne = KnownOne.trunc(BitWidth);
2189 case ISD::AssertZext: {
2190 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
2191 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
2192 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2193 KnownZero |= (~InMask);
2194 KnownOne &= (~KnownZero);
2198 // All bits are zero except the low bit.
2199 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
2203 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
2204 // We know that the top bits of C-X are clear if X contains less bits
2205 // than C (i.e. no wrap-around can happen). For example, 20-X is
2206 // positive if we can prove that X is >= 0 and < 16.
2207 if (CLHS->getAPIntValue().isNonNegative()) {
2208 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
2209 // NLZ can't be BitWidth with no sign bit
2210 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
2211 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2213 // If all of the MaskV bits are known to be zero, then we know the
2214 // output top bits are zero, because we now know that the output is
2216 if ((KnownZero2 & MaskV) == MaskV) {
2217 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
2218 // Top bits known zero.
2219 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2);
2227 // Output known-0 bits are known if clear or set in both the low clear bits
2228 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
2229 // low 3 bits clear.
2230 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2231 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
2233 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2234 KnownZeroOut = std::min(KnownZeroOut,
2235 KnownZero2.countTrailingOnes());
2237 if (Op.getOpcode() == ISD::ADD) {
2238 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
2242 // With ADDE, a carry bit may be added in, so we can only use this
2243 // information if we know (at least) that the low two bits are clear. We
2244 // then return to the caller that the low bit is unknown but that other bits
2246 if (KnownZeroOut >= 2) // ADDE
2247 KnownZero |= APInt::getBitsSet(BitWidth, 1, KnownZeroOut);
2251 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2252 const APInt &RA = Rem->getAPIntValue().abs();
2253 if (RA.isPowerOf2()) {
2254 APInt LowBits = RA - 1;
2255 computeKnownBits(Op.getOperand(0), KnownZero2,KnownOne2,Depth+1);
2257 // The low bits of the first operand are unchanged by the srem.
2258 KnownZero = KnownZero2 & LowBits;
2259 KnownOne = KnownOne2 & LowBits;
2261 // If the first operand is non-negative or has all low bits zero, then
2262 // the upper bits are all zero.
2263 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
2264 KnownZero |= ~LowBits;
2266 // If the first operand is negative and not all low bits are zero, then
2267 // the upper bits are all one.
2268 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0))
2269 KnownOne |= ~LowBits;
2270 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2275 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2276 const APInt &RA = Rem->getAPIntValue();
2277 if (RA.isPowerOf2()) {
2278 APInt LowBits = (RA - 1);
2279 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth + 1);
2281 // The upper bits are all zero, the lower ones are unchanged.
2282 KnownZero = KnownZero2 | ~LowBits;
2283 KnownOne = KnownOne2 & LowBits;
2288 // Since the result is less than or equal to either operand, any leading
2289 // zero bits in either operand must also exist in the result.
2290 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2291 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2293 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
2294 KnownZero2.countLeadingOnes());
2295 KnownOne.clearAllBits();
2296 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders);
2299 case ISD::FrameIndex:
2300 case ISD::TargetFrameIndex:
2301 if (unsigned Align = InferPtrAlignment(Op)) {
2302 // The low bits are known zero if the pointer is aligned.
2303 KnownZero = APInt::getLowBitsSet(BitWidth, Log2_32(Align));
2309 if (Op.getOpcode() < ISD::BUILTIN_OP_END)
2312 case ISD::INTRINSIC_WO_CHAIN:
2313 case ISD::INTRINSIC_W_CHAIN:
2314 case ISD::INTRINSIC_VOID:
2315 // Allow the target to implement this method for its nodes.
2316 TLI->computeKnownBitsForTargetNode(Op, KnownZero, KnownOne, *this, Depth);
2320 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
2323 /// ComputeNumSignBits - Return the number of times the sign bit of the
2324 /// register is replicated into the other bits. We know that at least 1 bit
2325 /// is always equal to the sign bit (itself), but other cases can give us
2326 /// information. For example, immediately after an "SRA X, 2", we know that
2327 /// the top 3 bits are all equal to each other, so we return 3.
2328 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
2329 const TargetLowering *TLI = TM.getTargetLowering();
2330 EVT VT = Op.getValueType();
2331 assert(VT.isInteger() && "Invalid VT!");
2332 unsigned VTBits = VT.getScalarType().getSizeInBits();
2334 unsigned FirstAnswer = 1;
2337 return 1; // Limit search depth.
2339 switch (Op.getOpcode()) {
2341 case ISD::AssertSext:
2342 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2343 return VTBits-Tmp+1;
2344 case ISD::AssertZext:
2345 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2348 case ISD::Constant: {
2349 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2350 return Val.getNumSignBits();
2353 case ISD::SIGN_EXTEND:
2355 VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
2356 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2358 case ISD::SIGN_EXTEND_INREG:
2359 // Max of the input and what this extends.
2361 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits();
2364 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2365 return std::max(Tmp, Tmp2);
2368 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2369 // SRA X, C -> adds C sign bits.
2370 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2371 Tmp += C->getZExtValue();
2372 if (Tmp > VTBits) Tmp = VTBits;
2376 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2377 // shl destroys sign bits.
2378 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2379 if (C->getZExtValue() >= VTBits || // Bad shift.
2380 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
2381 return Tmp - C->getZExtValue();
2386 case ISD::XOR: // NOT is handled here.
2387 // Logical binary ops preserve the number of sign bits at the worst.
2388 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2390 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2391 FirstAnswer = std::min(Tmp, Tmp2);
2392 // We computed what we know about the sign bits as our first
2393 // answer. Now proceed to the generic code that uses
2394 // computeKnownBits, and pick whichever answer is better.
2399 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2400 if (Tmp == 1) return 1; // Early out.
2401 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2402 return std::min(Tmp, Tmp2);
2410 if (Op.getResNo() != 1)
2412 // The boolean result conforms to getBooleanContents. Fall through.
2414 // If setcc returns 0/-1, all bits are sign bits.
2415 if (TLI->getBooleanContents(Op.getValueType().isVector()) ==
2416 TargetLowering::ZeroOrNegativeOneBooleanContent)
2421 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2422 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2424 // Handle rotate right by N like a rotate left by 32-N.
2425 if (Op.getOpcode() == ISD::ROTR)
2426 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2428 // If we aren't rotating out all of the known-in sign bits, return the
2429 // number that are left. This handles rotl(sext(x), 1) for example.
2430 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2431 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2435 // Add can have at most one carry bit. Thus we know that the output
2436 // is, at worst, one more bit than the inputs.
2437 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2438 if (Tmp == 1) return 1; // Early out.
2440 // Special case decrementing a value (ADD X, -1):
2441 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2442 if (CRHS->isAllOnesValue()) {
2443 APInt KnownZero, KnownOne;
2444 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2446 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2448 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue())
2451 // If we are subtracting one from a positive number, there is no carry
2452 // out of the result.
2453 if (KnownZero.isNegative())
2457 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2458 if (Tmp2 == 1) return 1;
2459 return std::min(Tmp, Tmp2)-1;
2462 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2463 if (Tmp2 == 1) return 1;
2466 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2467 if (CLHS->isNullValue()) {
2468 APInt KnownZero, KnownOne;
2469 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
2470 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2472 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue())
2475 // If the input is known to be positive (the sign bit is known clear),
2476 // the output of the NEG has the same number of sign bits as the input.
2477 if (KnownZero.isNegative())
2480 // Otherwise, we treat this like a SUB.
2483 // Sub can have at most one carry bit. Thus we know that the output
2484 // is, at worst, one more bit than the inputs.
2485 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2486 if (Tmp == 1) return 1; // Early out.
2487 return std::min(Tmp, Tmp2)-1;
2489 // FIXME: it's tricky to do anything useful for this, but it is an important
2490 // case for targets like X86.
2494 // If we are looking at the loaded value of the SDNode.
2495 if (Op.getResNo() == 0) {
2496 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2497 if (LoadSDNode *LD = dyn_cast<LoadSDNode>(Op)) {
2498 unsigned ExtType = LD->getExtensionType();
2501 case ISD::SEXTLOAD: // '17' bits known
2502 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2503 return VTBits-Tmp+1;
2504 case ISD::ZEXTLOAD: // '16' bits known
2505 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2511 // Allow the target to implement this method for its nodes.
2512 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2513 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2514 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2515 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2516 unsigned NumBits = TLI->ComputeNumSignBitsForTargetNode(Op, *this, Depth);
2517 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2520 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2521 // use this information.
2522 APInt KnownZero, KnownOne;
2523 computeKnownBits(Op, KnownZero, KnownOne, Depth);
2526 if (KnownZero.isNegative()) { // sign bit is 0
2528 } else if (KnownOne.isNegative()) { // sign bit is 1;
2535 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2536 // the number of identical bits in the top of the input value.
2538 Mask <<= Mask.getBitWidth()-VTBits;
2539 // Return # leading zeros. We use 'min' here in case Val was zero before
2540 // shifting. We don't want to return '64' as for an i32 "0".
2541 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2544 /// isBaseWithConstantOffset - Return true if the specified operand is an
2545 /// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an
2546 /// ISD::OR with a ConstantSDNode that is guaranteed to have the same
2547 /// semantics as an ADD. This handles the equivalence:
2548 /// X|Cst == X+Cst iff X&Cst = 0.
2549 bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const {
2550 if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) ||
2551 !isa<ConstantSDNode>(Op.getOperand(1)))
2554 if (Op.getOpcode() == ISD::OR &&
2555 !MaskedValueIsZero(Op.getOperand(0),
2556 cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue()))
2563 bool SelectionDAG::isKnownNeverNaN(SDValue Op) const {
2564 // If we're told that NaNs won't happen, assume they won't.
2565 if (getTarget().Options.NoNaNsFPMath)
2568 // If the value is a constant, we can obviously see if it is a NaN or not.
2569 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2570 return !C->getValueAPF().isNaN();
2572 // TODO: Recognize more cases here.
2577 bool SelectionDAG::isKnownNeverZero(SDValue Op) const {
2578 // If the value is a constant, we can obviously see if it is a zero or not.
2579 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2580 return !C->isZero();
2582 // TODO: Recognize more cases here.
2583 switch (Op.getOpcode()) {
2586 if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2587 return !C->isNullValue();
2594 bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const {
2595 // Check the obvious case.
2596 if (A == B) return true;
2598 // For for negative and positive zero.
2599 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A))
2600 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B))
2601 if (CA->isZero() && CB->isZero()) return true;
2603 // Otherwise they may not be equal.
2607 /// getNode - Gets or creates the specified node.
2609 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT) {
2610 FoldingSetNodeID ID;
2611 AddNodeIDNode(ID, Opcode, getVTList(VT), None);
2613 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2614 return SDValue(E, 0);
2616 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(),
2617 DL.getDebugLoc(), getVTList(VT));
2618 CSEMap.InsertNode(N, IP);
2620 AllNodes.push_back(N);
2624 return SDValue(N, 0);
2627 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL,
2628 EVT VT, SDValue Operand) {
2629 // Constant fold unary operations with an integer constant operand. Even
2630 // opaque constant will be folded, because the folding of unary operations
2631 // doesn't create new constants with different values. Nevertheless, the
2632 // opaque flag is preserved during folding to prevent future folding with
2634 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2635 const APInt &Val = C->getAPIntValue();
2638 case ISD::SIGN_EXTEND:
2639 return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), VT,
2640 C->isTargetOpcode(), C->isOpaque());
2641 case ISD::ANY_EXTEND:
2642 case ISD::ZERO_EXTEND:
2644 return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), VT,
2645 C->isTargetOpcode(), C->isOpaque());
2646 case ISD::UINT_TO_FP:
2647 case ISD::SINT_TO_FP: {
2648 APFloat apf(EVTToAPFloatSemantics(VT),
2649 APInt::getNullValue(VT.getSizeInBits()));
2650 (void)apf.convertFromAPInt(Val,
2651 Opcode==ISD::SINT_TO_FP,
2652 APFloat::rmNearestTiesToEven);
2653 return getConstantFP(apf, VT);
2656 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2657 return getConstantFP(APFloat(APFloat::IEEEsingle, Val), VT);
2658 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2659 return getConstantFP(APFloat(APFloat::IEEEdouble, Val), VT);
2662 return getConstant(Val.byteSwap(), VT, C->isTargetOpcode(),
2665 return getConstant(Val.countPopulation(), VT, C->isTargetOpcode(),
2668 case ISD::CTLZ_ZERO_UNDEF:
2669 return getConstant(Val.countLeadingZeros(), VT, C->isTargetOpcode(),
2672 case ISD::CTTZ_ZERO_UNDEF:
2673 return getConstant(Val.countTrailingZeros(), VT, C->isTargetOpcode(),
2678 // Constant fold unary operations with a floating point constant operand.
2679 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2680 APFloat V = C->getValueAPF(); // make copy
2684 return getConstantFP(V, VT);
2687 return getConstantFP(V, VT);
2689 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardPositive);
2690 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2691 return getConstantFP(V, VT);
2695 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardZero);
2696 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2697 return getConstantFP(V, VT);
2701 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardNegative);
2702 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2703 return getConstantFP(V, VT);
2706 case ISD::FP_EXTEND: {
2708 // This can return overflow, underflow, or inexact; we don't care.
2709 // FIXME need to be more flexible about rounding mode.
2710 (void)V.convert(EVTToAPFloatSemantics(VT),
2711 APFloat::rmNearestTiesToEven, &ignored);
2712 return getConstantFP(V, VT);
2714 case ISD::FP_TO_SINT:
2715 case ISD::FP_TO_UINT: {
2718 assert(integerPartWidth >= 64);
2719 // FIXME need to be more flexible about rounding mode.
2720 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2721 Opcode==ISD::FP_TO_SINT,
2722 APFloat::rmTowardZero, &ignored);
2723 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2725 APInt api(VT.getSizeInBits(), x);
2726 return getConstant(api, VT);
2729 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2730 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2731 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2732 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2737 unsigned OpOpcode = Operand.getNode()->getOpcode();
2739 case ISD::TokenFactor:
2740 case ISD::MERGE_VALUES:
2741 case ISD::CONCAT_VECTORS:
2742 return Operand; // Factor, merge or concat of one node? No need.
2743 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
2744 case ISD::FP_EXTEND:
2745 assert(VT.isFloatingPoint() &&
2746 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2747 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2748 assert((!VT.isVector() ||
2749 VT.getVectorNumElements() ==
2750 Operand.getValueType().getVectorNumElements()) &&
2751 "Vector element count mismatch!");
2752 if (Operand.getOpcode() == ISD::UNDEF)
2753 return getUNDEF(VT);
2755 case ISD::SIGN_EXTEND:
2756 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2757 "Invalid SIGN_EXTEND!");
2758 if (Operand.getValueType() == VT) return Operand; // noop extension
2759 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2760 "Invalid sext node, dst < src!");
2761 assert((!VT.isVector() ||
2762 VT.getVectorNumElements() ==
2763 Operand.getValueType().getVectorNumElements()) &&
2764 "Vector element count mismatch!");
2765 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2766 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2767 else if (OpOpcode == ISD::UNDEF)
2768 // sext(undef) = 0, because the top bits will all be the same.
2769 return getConstant(0, VT);
2771 case ISD::ZERO_EXTEND:
2772 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2773 "Invalid ZERO_EXTEND!");
2774 if (Operand.getValueType() == VT) return Operand; // noop extension
2775 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2776 "Invalid zext node, dst < src!");
2777 assert((!VT.isVector() ||
2778 VT.getVectorNumElements() ==
2779 Operand.getValueType().getVectorNumElements()) &&
2780 "Vector element count mismatch!");
2781 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2782 return getNode(ISD::ZERO_EXTEND, DL, VT,
2783 Operand.getNode()->getOperand(0));
2784 else if (OpOpcode == ISD::UNDEF)
2785 // zext(undef) = 0, because the top bits will be zero.
2786 return getConstant(0, VT);
2788 case ISD::ANY_EXTEND:
2789 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2790 "Invalid ANY_EXTEND!");
2791 if (Operand.getValueType() == VT) return Operand; // noop extension
2792 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2793 "Invalid anyext node, dst < src!");
2794 assert((!VT.isVector() ||
2795 VT.getVectorNumElements() ==
2796 Operand.getValueType().getVectorNumElements()) &&
2797 "Vector element count mismatch!");
2799 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2800 OpOpcode == ISD::ANY_EXTEND)
2801 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2802 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2803 else if (OpOpcode == ISD::UNDEF)
2804 return getUNDEF(VT);
2806 // (ext (trunx x)) -> x
2807 if (OpOpcode == ISD::TRUNCATE) {
2808 SDValue OpOp = Operand.getNode()->getOperand(0);
2809 if (OpOp.getValueType() == VT)
2814 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2815 "Invalid TRUNCATE!");
2816 if (Operand.getValueType() == VT) return Operand; // noop truncate
2817 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) &&
2818 "Invalid truncate node, src < dst!");
2819 assert((!VT.isVector() ||
2820 VT.getVectorNumElements() ==
2821 Operand.getValueType().getVectorNumElements()) &&
2822 "Vector element count mismatch!");
2823 if (OpOpcode == ISD::TRUNCATE)
2824 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2825 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2826 OpOpcode == ISD::ANY_EXTEND) {
2827 // If the source is smaller than the dest, we still need an extend.
2828 if (Operand.getNode()->getOperand(0).getValueType().getScalarType()
2829 .bitsLT(VT.getScalarType()))
2830 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2831 if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2832 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2833 return Operand.getNode()->getOperand(0);
2835 if (OpOpcode == ISD::UNDEF)
2836 return getUNDEF(VT);
2839 // Basic sanity checking.
2840 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2841 && "Cannot BITCAST between types of different sizes!");
2842 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2843 if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x)
2844 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0));
2845 if (OpOpcode == ISD::UNDEF)
2846 return getUNDEF(VT);
2848 case ISD::SCALAR_TO_VECTOR:
2849 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2850 (VT.getVectorElementType() == Operand.getValueType() ||
2851 (VT.getVectorElementType().isInteger() &&
2852 Operand.getValueType().isInteger() &&
2853 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
2854 "Illegal SCALAR_TO_VECTOR node!");
2855 if (OpOpcode == ISD::UNDEF)
2856 return getUNDEF(VT);
2857 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2858 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2859 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2860 Operand.getConstantOperandVal(1) == 0 &&
2861 Operand.getOperand(0).getValueType() == VT)
2862 return Operand.getOperand(0);
2865 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
2866 if (getTarget().Options.UnsafeFPMath && OpOpcode == ISD::FSUB)
2867 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
2868 Operand.getNode()->getOperand(0));
2869 if (OpOpcode == ISD::FNEG) // --X -> X
2870 return Operand.getNode()->getOperand(0);
2873 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2874 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
2879 SDVTList VTs = getVTList(VT);
2880 if (VT != MVT::Glue) { // Don't CSE flag producing nodes
2881 FoldingSetNodeID ID;
2882 SDValue Ops[1] = { Operand };
2883 AddNodeIDNode(ID, Opcode, VTs, Ops);
2885 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2886 return SDValue(E, 0);
2888 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(),
2889 DL.getDebugLoc(), VTs, Operand);
2890 CSEMap.InsertNode(N, IP);
2892 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(),
2893 DL.getDebugLoc(), VTs, Operand);
2896 AllNodes.push_back(N);
2900 return SDValue(N, 0);
2903 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, EVT VT,
2904 SDNode *Cst1, SDNode *Cst2) {
2905 // If the opcode is a target-specific ISD node, there's nothing we can
2906 // do here and the operand rules may not line up with the below, so
2908 if (Opcode >= ISD::BUILTIN_OP_END)
2911 SmallVector<std::pair<ConstantSDNode *, ConstantSDNode *>, 4> Inputs;
2912 SmallVector<SDValue, 4> Outputs;
2913 EVT SVT = VT.getScalarType();
2915 ConstantSDNode *Scalar1 = dyn_cast<ConstantSDNode>(Cst1);
2916 ConstantSDNode *Scalar2 = dyn_cast<ConstantSDNode>(Cst2);
2917 if (Scalar1 && Scalar2 && (Scalar1->isOpaque() || Scalar2->isOpaque()))
2920 if (Scalar1 && Scalar2)
2921 // Scalar instruction.
2922 Inputs.push_back(std::make_pair(Scalar1, Scalar2));
2924 // For vectors extract each constant element into Inputs so we can constant
2925 // fold them individually.
2926 BuildVectorSDNode *BV1 = dyn_cast<BuildVectorSDNode>(Cst1);
2927 BuildVectorSDNode *BV2 = dyn_cast<BuildVectorSDNode>(Cst2);
2931 assert(BV1->getNumOperands() == BV2->getNumOperands() && "Out of sync!");
2933 for (unsigned I = 0, E = BV1->getNumOperands(); I != E; ++I) {
2934 ConstantSDNode *V1 = dyn_cast<ConstantSDNode>(BV1->getOperand(I));
2935 ConstantSDNode *V2 = dyn_cast<ConstantSDNode>(BV2->getOperand(I));
2936 if (!V1 || !V2) // Not a constant, bail.
2939 if (V1->isOpaque() || V2->isOpaque())
2942 // Avoid BUILD_VECTOR nodes that perform implicit truncation.
2943 // FIXME: This is valid and could be handled by truncating the APInts.
2944 if (V1->getValueType(0) != SVT || V2->getValueType(0) != SVT)
2947 Inputs.push_back(std::make_pair(V1, V2));
2951 // We have a number of constant values, constant fold them element by element.
2952 for (unsigned I = 0, E = Inputs.size(); I != E; ++I) {
2953 const APInt &C1 = Inputs[I].first->getAPIntValue();
2954 const APInt &C2 = Inputs[I].second->getAPIntValue();
2958 Outputs.push_back(getConstant(C1 + C2, SVT));
2961 Outputs.push_back(getConstant(C1 - C2, SVT));
2964 Outputs.push_back(getConstant(C1 * C2, SVT));
2967 if (!C2.getBoolValue())
2969 Outputs.push_back(getConstant(C1.udiv(C2), SVT));
2972 if (!C2.getBoolValue())
2974 Outputs.push_back(getConstant(C1.urem(C2), SVT));
2977 if (!C2.getBoolValue())
2979 Outputs.push_back(getConstant(C1.sdiv(C2), SVT));
2982 if (!C2.getBoolValue())
2984 Outputs.push_back(getConstant(C1.srem(C2), SVT));
2987 Outputs.push_back(getConstant(C1 & C2, SVT));
2990 Outputs.push_back(getConstant(C1 | C2, SVT));
2993 Outputs.push_back(getConstant(C1 ^ C2, SVT));
2996 Outputs.push_back(getConstant(C1 << C2, SVT));
2999 Outputs.push_back(getConstant(C1.lshr(C2), SVT));
3002 Outputs.push_back(getConstant(C1.ashr(C2), SVT));
3005 Outputs.push_back(getConstant(C1.rotl(C2), SVT));
3008 Outputs.push_back(getConstant(C1.rotr(C2), SVT));
3015 assert((Scalar1 && Scalar2) || (VT.getVectorNumElements() == Outputs.size() &&
3016 "Expected a scalar or vector!"));
3018 // Handle the scalar case first.
3020 return Outputs.back();
3022 // We may have a vector type but a scalar result. Create a splat.
3023 Outputs.resize(VT.getVectorNumElements(), Outputs.back());
3025 // Build a big vector out of the scalar elements we generated.
3026 return getNode(ISD::BUILD_VECTOR, SDLoc(), VT, Outputs);
3029 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT, SDValue N1,
3030 SDValue N2, bool nuw, bool nsw, bool exact) {
3031 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
3032 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
3035 case ISD::TokenFactor:
3036 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
3037 N2.getValueType() == MVT::Other && "Invalid token factor!");
3038 // Fold trivial token factors.
3039 if (N1.getOpcode() == ISD::EntryToken) return N2;
3040 if (N2.getOpcode() == ISD::EntryToken) return N1;
3041 if (N1 == N2) return N1;
3043 case ISD::CONCAT_VECTORS:
3044 // Concat of UNDEFs is UNDEF.
3045 if (N1.getOpcode() == ISD::UNDEF &&
3046 N2.getOpcode() == ISD::UNDEF)
3047 return getUNDEF(VT);
3049 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
3050 // one big BUILD_VECTOR.
3051 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
3052 N2.getOpcode() == ISD::BUILD_VECTOR) {
3053 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
3054 N1.getNode()->op_end());
3055 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
3056 return getNode(ISD::BUILD_VECTOR, DL, VT, Elts);
3060 assert(VT.isInteger() && "This operator does not apply to FP types!");
3061 assert(N1.getValueType() == N2.getValueType() &&
3062 N1.getValueType() == VT && "Binary operator types must match!");
3063 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
3064 // worth handling here.
3065 if (N2C && N2C->isNullValue())
3067 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
3074 assert(VT.isInteger() && "This operator does not apply to FP types!");
3075 assert(N1.getValueType() == N2.getValueType() &&
3076 N1.getValueType() == VT && "Binary operator types must match!");
3077 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
3078 // it's worth handling here.
3079 if (N2C && N2C->isNullValue())
3089 assert(VT.isInteger() && "This operator does not apply to FP types!");
3090 assert(N1.getValueType() == N2.getValueType() &&
3091 N1.getValueType() == VT && "Binary operator types must match!");
3098 if (getTarget().Options.UnsafeFPMath) {
3099 if (Opcode == ISD::FADD) {
3101 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
3102 if (CFP->getValueAPF().isZero())
3105 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
3106 if (CFP->getValueAPF().isZero())
3108 } else if (Opcode == ISD::FSUB) {
3110 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
3111 if (CFP->getValueAPF().isZero())
3113 } else if (Opcode == ISD::FMUL) {
3114 ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1);
3117 // If the first operand isn't the constant, try the second
3119 CFP = dyn_cast<ConstantFPSDNode>(N2);
3126 return SDValue(CFP,0);
3128 if (CFP->isExactlyValue(1.0))
3133 assert(VT.isFloatingPoint() && "This operator only applies to FP types!");
3134 assert(N1.getValueType() == N2.getValueType() &&
3135 N1.getValueType() == VT && "Binary operator types must match!");
3137 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
3138 assert(N1.getValueType() == VT &&
3139 N1.getValueType().isFloatingPoint() &&
3140 N2.getValueType().isFloatingPoint() &&
3141 "Invalid FCOPYSIGN!");
3148 assert(VT == N1.getValueType() &&
3149 "Shift operators return type must be the same as their first arg");
3150 assert(VT.isInteger() && N2.getValueType().isInteger() &&
3151 "Shifts only work on integers");
3152 assert((!VT.isVector() || VT == N2.getValueType()) &&
3153 "Vector shift amounts must be in the same as their first arg");
3154 // Verify that the shift amount VT is bit enough to hold valid shift
3155 // amounts. This catches things like trying to shift an i1024 value by an
3156 // i8, which is easy to fall into in generic code that uses
3157 // TLI.getShiftAmount().
3158 assert(N2.getValueType().getSizeInBits() >=
3159 Log2_32_Ceil(N1.getValueType().getSizeInBits()) &&
3160 "Invalid use of small shift amount with oversized value!");
3162 // Always fold shifts of i1 values so the code generator doesn't need to
3163 // handle them. Since we know the size of the shift has to be less than the
3164 // size of the value, the shift/rotate count is guaranteed to be zero.
3167 if (N2C && N2C->isNullValue())
3170 case ISD::FP_ROUND_INREG: {
3171 EVT EVT = cast<VTSDNode>(N2)->getVT();
3172 assert(VT == N1.getValueType() && "Not an inreg round!");
3173 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
3174 "Cannot FP_ROUND_INREG integer types");
3175 assert(EVT.isVector() == VT.isVector() &&
3176 "FP_ROUND_INREG type should be vector iff the operand "
3178 assert((!EVT.isVector() ||
3179 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
3180 "Vector element counts must match in FP_ROUND_INREG");
3181 assert(EVT.bitsLE(VT) && "Not rounding down!");
3183 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
3187 assert(VT.isFloatingPoint() &&
3188 N1.getValueType().isFloatingPoint() &&
3189 VT.bitsLE(N1.getValueType()) &&
3190 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
3191 if (N1.getValueType() == VT) return N1; // noop conversion.
3193 case ISD::AssertSext:
3194 case ISD::AssertZext: {
3195 EVT EVT = cast<VTSDNode>(N2)->getVT();
3196 assert(VT == N1.getValueType() && "Not an inreg extend!");
3197 assert(VT.isInteger() && EVT.isInteger() &&
3198 "Cannot *_EXTEND_INREG FP types");
3199 assert(!EVT.isVector() &&
3200 "AssertSExt/AssertZExt type should be the vector element type "
3201 "rather than the vector type!");
3202 assert(EVT.bitsLE(VT) && "Not extending!");
3203 if (VT == EVT) return N1; // noop assertion.
3206 case ISD::SIGN_EXTEND_INREG: {
3207 EVT EVT = cast<VTSDNode>(N2)->getVT();
3208 assert(VT == N1.getValueType() && "Not an inreg extend!");
3209 assert(VT.isInteger() && EVT.isInteger() &&
3210 "Cannot *_EXTEND_INREG FP types");
3211 assert(EVT.isVector() == VT.isVector() &&
3212 "SIGN_EXTEND_INREG type should be vector iff the operand "
3214 assert((!EVT.isVector() ||
3215 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
3216 "Vector element counts must match in SIGN_EXTEND_INREG");
3217 assert(EVT.bitsLE(VT) && "Not extending!");
3218 if (EVT == VT) return N1; // Not actually extending
3221 APInt Val = N1C->getAPIntValue();
3222 unsigned FromBits = EVT.getScalarType().getSizeInBits();
3223 Val <<= Val.getBitWidth()-FromBits;
3224 Val = Val.ashr(Val.getBitWidth()-FromBits);
3225 return getConstant(Val, VT);
3229 case ISD::EXTRACT_VECTOR_ELT:
3230 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
3231 if (N1.getOpcode() == ISD::UNDEF)
3232 return getUNDEF(VT);
3234 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
3235 // expanding copies of large vectors from registers.
3237 N1.getOpcode() == ISD::CONCAT_VECTORS &&
3238 N1.getNumOperands() > 0) {
3240 N1.getOperand(0).getValueType().getVectorNumElements();
3241 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
3242 N1.getOperand(N2C->getZExtValue() / Factor),
3243 getConstant(N2C->getZExtValue() % Factor,
3244 N2.getValueType()));
3247 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
3248 // expanding large vector constants.
3249 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
3250 SDValue Elt = N1.getOperand(N2C->getZExtValue());
3252 if (VT != Elt.getValueType())
3253 // If the vector element type is not legal, the BUILD_VECTOR operands
3254 // are promoted and implicitly truncated, and the result implicitly
3255 // extended. Make that explicit here.
3256 Elt = getAnyExtOrTrunc(Elt, DL, VT);
3261 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
3262 // operations are lowered to scalars.
3263 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
3264 // If the indices are the same, return the inserted element else
3265 // if the indices are known different, extract the element from
3266 // the original vector.
3267 SDValue N1Op2 = N1.getOperand(2);
3268 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode());
3270 if (N1Op2C && N2C) {
3271 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) {
3272 if (VT == N1.getOperand(1).getValueType())
3273 return N1.getOperand(1);
3275 return getSExtOrTrunc(N1.getOperand(1), DL, VT);
3278 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
3282 case ISD::EXTRACT_ELEMENT:
3283 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
3284 assert(!N1.getValueType().isVector() && !VT.isVector() &&
3285 (N1.getValueType().isInteger() == VT.isInteger()) &&
3286 N1.getValueType() != VT &&
3287 "Wrong types for EXTRACT_ELEMENT!");
3289 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
3290 // 64-bit integers into 32-bit parts. Instead of building the extract of
3291 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
3292 if (N1.getOpcode() == ISD::BUILD_PAIR)
3293 return N1.getOperand(N2C->getZExtValue());
3295 // EXTRACT_ELEMENT of a constant int is also very common.
3296 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
3297 unsigned ElementSize = VT.getSizeInBits();
3298 unsigned Shift = ElementSize * N2C->getZExtValue();
3299 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
3300 return getConstant(ShiftedVal.trunc(ElementSize), VT);
3303 case ISD::EXTRACT_SUBVECTOR: {
3305 if (VT.isSimple() && N1.getValueType().isSimple()) {
3306 assert(VT.isVector() && N1.getValueType().isVector() &&
3307 "Extract subvector VTs must be a vectors!");
3308 assert(VT.getVectorElementType() ==
3309 N1.getValueType().getVectorElementType() &&
3310 "Extract subvector VTs must have the same element type!");
3311 assert(VT.getSimpleVT() <= N1.getSimpleValueType() &&
3312 "Extract subvector must be from larger vector to smaller vector!");
3314 if (isa<ConstantSDNode>(Index.getNode())) {
3315 assert((VT.getVectorNumElements() +
3316 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
3317 <= N1.getValueType().getVectorNumElements())
3318 && "Extract subvector overflow!");
3321 // Trivial extraction.
3322 if (VT.getSimpleVT() == N1.getSimpleValueType())
3329 // Perform trivial constant folding.
3330 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1.getNode(), N2.getNode());
3331 if (SV.getNode()) return SV;
3333 // Canonicalize constant to RHS if commutative.
3334 if (N1C && !N2C && isCommutativeBinOp(Opcode)) {
3335 std::swap(N1C, N2C);
3339 // Constant fold FP operations.
3340 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
3341 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
3343 if (!N2CFP && isCommutativeBinOp(Opcode)) {
3344 // Canonicalize constant to RHS if commutative.
3345 std::swap(N1CFP, N2CFP);
3348 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
3349 APFloat::opStatus s;
3352 s = V1.add(V2, APFloat::rmNearestTiesToEven);
3353 if (s != APFloat::opInvalidOp)
3354 return getConstantFP(V1, VT);
3357 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
3358 if (s!=APFloat::opInvalidOp)
3359 return getConstantFP(V1, VT);
3362 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
3363 if (s!=APFloat::opInvalidOp)
3364 return getConstantFP(V1, VT);
3367 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
3368 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
3369 return getConstantFP(V1, VT);
3372 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
3373 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
3374 return getConstantFP(V1, VT);
3376 case ISD::FCOPYSIGN:
3378 return getConstantFP(V1, VT);
3383 if (Opcode == ISD::FP_ROUND) {
3384 APFloat V = N1CFP->getValueAPF(); // make copy
3386 // This can return overflow, underflow, or inexact; we don't care.
3387 // FIXME need to be more flexible about rounding mode.
3388 (void)V.convert(EVTToAPFloatSemantics(VT),
3389 APFloat::rmNearestTiesToEven, &ignored);
3390 return getConstantFP(V, VT);
3394 // Canonicalize an UNDEF to the RHS, even over a constant.
3395 if (N1.getOpcode() == ISD::UNDEF) {
3396 if (isCommutativeBinOp(Opcode)) {
3400 case ISD::FP_ROUND_INREG:
3401 case ISD::SIGN_EXTEND_INREG:
3407 return N1; // fold op(undef, arg2) -> undef
3415 return getConstant(0, VT); // fold op(undef, arg2) -> 0
3416 // For vectors, we can't easily build an all zero vector, just return
3423 // Fold a bunch of operators when the RHS is undef.
3424 if (N2.getOpcode() == ISD::UNDEF) {
3427 if (N1.getOpcode() == ISD::UNDEF)
3428 // Handle undef ^ undef -> 0 special case. This is a common
3430 return getConstant(0, VT);
3440 return N2; // fold op(arg1, undef) -> undef
3446 if (getTarget().Options.UnsafeFPMath)
3454 return getConstant(0, VT); // fold op(arg1, undef) -> 0
3455 // For vectors, we can't easily build an all zero vector, just return
3460 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
3461 // For vectors, we can't easily build an all one vector, just return
3469 // Memoize this node if possible.
3471 SDVTList VTs = getVTList(VT);
3472 const bool BinOpHasFlags = isBinOpWithFlags(Opcode);
3473 if (VT != MVT::Glue) {
3474 SDValue Ops[] = {N1, N2};
3475 FoldingSetNodeID ID;
3476 AddNodeIDNode(ID, Opcode, VTs, Ops);
3478 AddBinaryNodeIDCustom(ID, Opcode, nuw, nsw, exact);
3480 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3481 return SDValue(E, 0);
3483 N = GetBinarySDNode(Opcode, DL, VTs, N1, N2, nuw, nsw, exact);
3485 CSEMap.InsertNode(N, IP);
3488 N = GetBinarySDNode(Opcode, DL, VTs, N1, N2, nuw, nsw, exact);
3491 AllNodes.push_back(N);
3495 return SDValue(N, 0);
3498 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
3499 SDValue N1, SDValue N2, SDValue N3) {
3500 // Perform various simplifications.
3501 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
3504 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1);
3505 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2);
3506 ConstantFPSDNode *N3CFP = dyn_cast<ConstantFPSDNode>(N3);
3507 if (N1CFP && N2CFP && N3CFP) {
3508 APFloat V1 = N1CFP->getValueAPF();
3509 const APFloat &V2 = N2CFP->getValueAPF();
3510 const APFloat &V3 = N3CFP->getValueAPF();
3511 APFloat::opStatus s =
3512 V1.fusedMultiplyAdd(V2, V3, APFloat::rmNearestTiesToEven);
3513 if (s != APFloat::opInvalidOp)
3514 return getConstantFP(V1, VT);
3518 case ISD::CONCAT_VECTORS:
3519 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
3520 // one big BUILD_VECTOR.
3521 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
3522 N2.getOpcode() == ISD::BUILD_VECTOR &&
3523 N3.getOpcode() == ISD::BUILD_VECTOR) {
3524 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
3525 N1.getNode()->op_end());
3526 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
3527 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end());
3528 return getNode(ISD::BUILD_VECTOR, DL, VT, Elts);
3532 // Use FoldSetCC to simplify SETCC's.
3533 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
3534 if (Simp.getNode()) return Simp;
3539 if (N1C->getZExtValue())
3540 return N2; // select true, X, Y -> X
3541 return N3; // select false, X, Y -> Y
3544 if (N2 == N3) return N2; // select C, X, X -> X
3546 case ISD::VECTOR_SHUFFLE:
3547 llvm_unreachable("should use getVectorShuffle constructor!");
3548 case ISD::INSERT_SUBVECTOR: {
3550 if (VT.isSimple() && N1.getValueType().isSimple()
3551 && N2.getValueType().isSimple()) {
3552 assert(VT.isVector() && N1.getValueType().isVector() &&
3553 N2.getValueType().isVector() &&
3554 "Insert subvector VTs must be a vectors");
3555 assert(VT == N1.getValueType() &&
3556 "Dest and insert subvector source types must match!");
3557 assert(N2.getSimpleValueType() <= N1.getSimpleValueType() &&
3558 "Insert subvector must be from smaller vector to larger vector!");
3559 if (isa<ConstantSDNode>(Index.getNode())) {
3560 assert((N2.getValueType().getVectorNumElements() +
3561 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
3562 <= VT.getVectorNumElements())
3563 && "Insert subvector overflow!");
3566 // Trivial insertion.
3567 if (VT.getSimpleVT() == N2.getSimpleValueType())
3573 // Fold bit_convert nodes from a type to themselves.
3574 if (N1.getValueType() == VT)
3579 // Memoize node if it doesn't produce a flag.
3581 SDVTList VTs = getVTList(VT);
3582 if (VT != MVT::Glue) {
3583 SDValue Ops[] = { N1, N2, N3 };
3584 FoldingSetNodeID ID;
3585 AddNodeIDNode(ID, Opcode, VTs, Ops);
3587 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3588 return SDValue(E, 0);
3590 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(),
3591 DL.getDebugLoc(), VTs, N1, N2, N3);
3592 CSEMap.InsertNode(N, IP);
3594 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(),
3595 DL.getDebugLoc(), VTs, N1, N2, N3);
3598 AllNodes.push_back(N);
3602 return SDValue(N, 0);
3605 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
3606 SDValue N1, SDValue N2, SDValue N3,
3608 SDValue Ops[] = { N1, N2, N3, N4 };
3609 return getNode(Opcode, DL, VT, Ops);
3612 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
3613 SDValue N1, SDValue N2, SDValue N3,
3614 SDValue N4, SDValue N5) {
3615 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3616 return getNode(Opcode, DL, VT, Ops);
3619 /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
3620 /// the incoming stack arguments to be loaded from the stack.
3621 SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) {
3622 SmallVector<SDValue, 8> ArgChains;
3624 // Include the original chain at the beginning of the list. When this is
3625 // used by target LowerCall hooks, this helps legalize find the
3626 // CALLSEQ_BEGIN node.
3627 ArgChains.push_back(Chain);
3629 // Add a chain value for each stack argument.
3630 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
3631 UE = getEntryNode().getNode()->use_end(); U != UE; ++U)
3632 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
3633 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
3634 if (FI->getIndex() < 0)
3635 ArgChains.push_back(SDValue(L, 1));
3637 // Build a tokenfactor for all the chains.
3638 return getNode(ISD::TokenFactor, SDLoc(Chain), MVT::Other, ArgChains);
3641 /// getMemsetValue - Vectorized representation of the memset value
3643 static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
3645 assert(Value.getOpcode() != ISD::UNDEF);
3647 unsigned NumBits = VT.getScalarType().getSizeInBits();
3648 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
3649 assert(C->getAPIntValue().getBitWidth() == 8);
3650 APInt Val = APInt::getSplat(NumBits, C->getAPIntValue());
3652 return DAG.getConstant(Val, VT);
3653 return DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(VT), Val), VT);
3656 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value);
3658 // Use a multiplication with 0x010101... to extend the input to the
3660 APInt Magic = APInt::getSplat(NumBits, APInt(8, 0x01));
3661 Value = DAG.getNode(ISD::MUL, dl, VT, Value, DAG.getConstant(Magic, VT));
3667 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
3668 /// used when a memcpy is turned into a memset when the source is a constant
3670 static SDValue getMemsetStringVal(EVT VT, SDLoc dl, SelectionDAG &DAG,
3671 const TargetLowering &TLI, StringRef Str) {
3672 // Handle vector with all elements zero.
3675 return DAG.getConstant(0, VT);
3676 else if (VT == MVT::f32 || VT == MVT::f64 || VT == MVT::f128)
3677 return DAG.getConstantFP(0.0, VT);
3678 else if (VT.isVector()) {
3679 unsigned NumElts = VT.getVectorNumElements();
3680 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
3681 return DAG.getNode(ISD::BITCAST, dl, VT,
3682 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(),
3685 llvm_unreachable("Expected type!");
3688 assert(!VT.isVector() && "Can't handle vector type here!");
3689 unsigned NumVTBits = VT.getSizeInBits();
3690 unsigned NumVTBytes = NumVTBits / 8;
3691 unsigned NumBytes = std::min(NumVTBytes, unsigned(Str.size()));
3693 APInt Val(NumVTBits, 0);
3694 if (TLI.isLittleEndian()) {
3695 for (unsigned i = 0; i != NumBytes; ++i)
3696 Val |= (uint64_t)(unsigned char)Str[i] << i*8;
3698 for (unsigned i = 0; i != NumBytes; ++i)
3699 Val |= (uint64_t)(unsigned char)Str[i] << (NumVTBytes-i-1)*8;
3702 // If the "cost" of materializing the integer immediate is less than the cost
3703 // of a load, then it is cost effective to turn the load into the immediate.
3704 Type *Ty = VT.getTypeForEVT(*DAG.getContext());
3705 if (TLI.shouldConvertConstantLoadToIntImm(Val, Ty))
3706 return DAG.getConstant(Val, VT);
3707 return SDValue(nullptr, 0);
3710 /// getMemBasePlusOffset - Returns base and offset node for the
3712 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, SDLoc dl,
3713 SelectionDAG &DAG) {
3714 EVT VT = Base.getValueType();
3715 return DAG.getNode(ISD::ADD, dl,
3716 VT, Base, DAG.getConstant(Offset, VT));
3719 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
3721 static bool isMemSrcFromString(SDValue Src, StringRef &Str) {
3722 unsigned SrcDelta = 0;
3723 GlobalAddressSDNode *G = nullptr;
3724 if (Src.getOpcode() == ISD::GlobalAddress)
3725 G = cast<GlobalAddressSDNode>(Src);
3726 else if (Src.getOpcode() == ISD::ADD &&
3727 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
3728 Src.getOperand(1).getOpcode() == ISD::Constant) {
3729 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
3730 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
3735 return getConstantStringInfo(G->getGlobal(), Str, SrcDelta, false);
3738 /// FindOptimalMemOpLowering - Determines the optimial series memory ops
3739 /// to replace the memset / memcpy. Return true if the number of memory ops
3740 /// is below the threshold. It returns the types of the sequence of
3741 /// memory ops to perform memset / memcpy by reference.
3742 static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps,
3743 unsigned Limit, uint64_t Size,
3744 unsigned DstAlign, unsigned SrcAlign,
3750 const TargetLowering &TLI) {
3751 assert((SrcAlign == 0 || SrcAlign >= DstAlign) &&
3752 "Expecting memcpy / memset source to meet alignment requirement!");
3753 // If 'SrcAlign' is zero, that means the memory operation does not need to
3754 // load the value, i.e. memset or memcpy from constant string. Otherwise,
3755 // it's the inferred alignment of the source. 'DstAlign', on the other hand,
3756 // is the specified alignment of the memory operation. If it is zero, that
3757 // means it's possible to change the alignment of the destination.
3758 // 'MemcpyStrSrc' indicates whether the memcpy source is constant so it does
3759 // not need to be loaded.
3760 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign,
3761 IsMemset, ZeroMemset, MemcpyStrSrc,
3762 DAG.getMachineFunction());
3764 if (VT == MVT::Other) {
3766 if (DstAlign >= TLI.getDataLayout()->getPointerPrefAlignment(AS) ||
3767 TLI.allowsUnalignedMemoryAccesses(VT, AS)) {
3768 VT = TLI.getPointerTy();
3770 switch (DstAlign & 7) {
3771 case 0: VT = MVT::i64; break;
3772 case 4: VT = MVT::i32; break;
3773 case 2: VT = MVT::i16; break;
3774 default: VT = MVT::i8; break;
3779 while (!TLI.isTypeLegal(LVT))
3780 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1);
3781 assert(LVT.isInteger());
3787 unsigned NumMemOps = 0;
3789 unsigned VTSize = VT.getSizeInBits() / 8;
3790 while (VTSize > Size) {
3791 // For now, only use non-vector load / store's for the left-over pieces.
3796 if (VT.isVector() || VT.isFloatingPoint()) {
3797 NewVT = (VT.getSizeInBits() > 64) ? MVT::i64 : MVT::i32;
3798 if (TLI.isOperationLegalOrCustom(ISD::STORE, NewVT) &&
3799 TLI.isSafeMemOpType(NewVT.getSimpleVT()))
3801 else if (NewVT == MVT::i64 &&
3802 TLI.isOperationLegalOrCustom(ISD::STORE, MVT::f64) &&
3803 TLI.isSafeMemOpType(MVT::f64)) {
3804 // i64 is usually not legal on 32-bit targets, but f64 may be.
3812 NewVT = (MVT::SimpleValueType)(NewVT.getSimpleVT().SimpleTy - 1);
3813 if (NewVT == MVT::i8)
3815 } while (!TLI.isSafeMemOpType(NewVT.getSimpleVT()));
3817 NewVTSize = NewVT.getSizeInBits() / 8;
3819 // If the new VT cannot cover all of the remaining bits, then consider
3820 // issuing a (or a pair of) unaligned and overlapping load / store.
3821 // FIXME: Only does this for 64-bit or more since we don't have proper
3822 // cost model for unaligned load / store.
3825 if (NumMemOps && AllowOverlap &&
3826 VTSize >= 8 && NewVTSize < Size &&
3827 TLI.allowsUnalignedMemoryAccesses(VT, AS, &Fast) && Fast)
3835 if (++NumMemOps > Limit)
3838 MemOps.push_back(VT);
3845 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, SDLoc dl,
3846 SDValue Chain, SDValue Dst,
3847 SDValue Src, uint64_t Size,
3848 unsigned Align, bool isVol,
3850 MachinePointerInfo DstPtrInfo,
3851 MachinePointerInfo SrcPtrInfo) {
3852 // Turn a memcpy of undef to nop.
3853 if (Src.getOpcode() == ISD::UNDEF)
3856 // Expand memcpy to a series of load and store ops if the size operand falls
3857 // below a certain threshold.
3858 // TODO: In the AlwaysInline case, if the size is big then generate a loop
3859 // rather than maybe a humongous number of loads and stores.
3860 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3861 std::vector<EVT> MemOps;
3862 bool DstAlignCanChange = false;
3863 MachineFunction &MF = DAG.getMachineFunction();
3864 MachineFrameInfo *MFI = MF.getFrameInfo();
3866 MF.getFunction()->getAttributes().
3867 hasAttribute(AttributeSet::FunctionIndex, Attribute::OptimizeForSize);
3868 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3869 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3870 DstAlignCanChange = true;
3871 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3872 if (Align > SrcAlign)
3875 bool CopyFromStr = isMemSrcFromString(Src, Str);
3876 bool isZeroStr = CopyFromStr && Str.empty();
3877 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(OptSize);
3879 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3880 (DstAlignCanChange ? 0 : Align),
3881 (isZeroStr ? 0 : SrcAlign),
3882 false, false, CopyFromStr, true, DAG, TLI))
3885 if (DstAlignCanChange) {
3886 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3887 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
3889 // Don't promote to an alignment that would require dynamic stack
3891 const TargetRegisterInfo *TRI = MF.getTarget().getRegisterInfo();
3892 if (!TRI->needsStackRealignment(MF))
3893 while (NewAlign > Align &&
3894 TLI.getDataLayout()->exceedsNaturalStackAlignment(NewAlign))
3897 if (NewAlign > Align) {
3898 // Give the stack frame object a larger alignment if needed.
3899 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3900 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3905 SmallVector<SDValue, 8> OutChains;
3906 unsigned NumMemOps = MemOps.size();
3907 uint64_t SrcOff = 0, DstOff = 0;
3908 for (unsigned i = 0; i != NumMemOps; ++i) {
3910 unsigned VTSize = VT.getSizeInBits() / 8;
3911 SDValue Value, Store;
3913 if (VTSize > Size) {
3914 // Issuing an unaligned load / store pair that overlaps with the previous
3915 // pair. Adjust the offset accordingly.
3916 assert(i == NumMemOps-1 && i != 0);
3917 SrcOff -= VTSize - Size;
3918 DstOff -= VTSize - Size;
3922 (isZeroStr || (VT.isInteger() && !VT.isVector()))) {
3923 // It's unlikely a store of a vector immediate can be done in a single
3924 // instruction. It would require a load from a constantpool first.
3925 // We only handle zero vectors here.
3926 // FIXME: Handle other cases where store of vector immediate is done in
3927 // a single instruction.
3928 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str.substr(SrcOff));
3929 if (Value.getNode())
3930 Store = DAG.getStore(Chain, dl, Value,
3931 getMemBasePlusOffset(Dst, DstOff, dl, DAG),
3932 DstPtrInfo.getWithOffset(DstOff), isVol,
3936 if (!Store.getNode()) {
3937 // The type might not be legal for the target. This should only happen
3938 // if the type is smaller than a legal type, as on PPC, so the right
3939 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify
3940 // to Load/Store if NVT==VT.
3941 // FIXME does the case above also need this?
3942 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
3943 assert(NVT.bitsGE(VT));
3944 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain,
3945 getMemBasePlusOffset(Src, SrcOff, dl, DAG),
3946 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false,
3947 MinAlign(SrcAlign, SrcOff));
3948 Store = DAG.getTruncStore(Chain, dl, Value,
3949 getMemBasePlusOffset(Dst, DstOff, dl, DAG),
3950 DstPtrInfo.getWithOffset(DstOff), VT, isVol,
3953 OutChains.push_back(Store);
3959 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains);
3962 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, SDLoc dl,
3963 SDValue Chain, SDValue Dst,
3964 SDValue Src, uint64_t Size,
3965 unsigned Align, bool isVol,
3967 MachinePointerInfo DstPtrInfo,
3968 MachinePointerInfo SrcPtrInfo) {
3969 // Turn a memmove of undef to nop.
3970 if (Src.getOpcode() == ISD::UNDEF)
3973 // Expand memmove to a series of load and store ops if the size operand falls
3974 // below a certain threshold.
3975 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3976 std::vector<EVT> MemOps;
3977 bool DstAlignCanChange = false;
3978 MachineFunction &MF = DAG.getMachineFunction();
3979 MachineFrameInfo *MFI = MF.getFrameInfo();
3980 bool OptSize = MF.getFunction()->getAttributes().
3981 hasAttribute(AttributeSet::FunctionIndex, Attribute::OptimizeForSize);
3982 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3983 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3984 DstAlignCanChange = true;
3985 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3986 if (Align > SrcAlign)
3988 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(OptSize);
3990 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3991 (DstAlignCanChange ? 0 : Align), SrcAlign,
3992 false, false, false, false, DAG, TLI))
3995 if (DstAlignCanChange) {
3996 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3997 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
3998 if (NewAlign > Align) {
3999 // Give the stack frame object a larger alignment if needed.
4000 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
4001 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
4006 uint64_t SrcOff = 0, DstOff = 0;
4007 SmallVector<SDValue, 8> LoadValues;
4008 SmallVector<SDValue, 8> LoadChains;
4009 SmallVector<SDValue, 8> OutChains;
4010 unsigned NumMemOps = MemOps.size();
4011 for (unsigned i = 0; i < NumMemOps; i++) {
4013 unsigned VTSize = VT.getSizeInBits() / 8;
4016 Value = DAG.getLoad(VT, dl, Chain,
4017 getMemBasePlusOffset(Src, SrcOff, dl, DAG),
4018 SrcPtrInfo.getWithOffset(SrcOff), isVol,
4019 false, false, SrcAlign);
4020 LoadValues.push_back(Value);
4021 LoadChains.push_back(Value.getValue(1));
4024 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, LoadChains);
4026 for (unsigned i = 0; i < NumMemOps; i++) {
4028 unsigned VTSize = VT.getSizeInBits() / 8;
4031 Store = DAG.getStore(Chain, dl, LoadValues[i],
4032 getMemBasePlusOffset(Dst, DstOff, dl, DAG),
4033 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align);
4034 OutChains.push_back(Store);
4038 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains);
4041 /// \brief Lower the call to 'memset' intrinsic function into a series of store
4044 /// \param DAG Selection DAG where lowered code is placed.
4045 /// \param dl Link to corresponding IR location.
4046 /// \param Chain Control flow dependency.
4047 /// \param Dst Pointer to destination memory location.
4048 /// \param Src Value of byte to write into the memory.
4049 /// \param Size Number of bytes to write.
4050 /// \param Align Alignment of the destination in bytes.
4051 /// \param isVol True if destination is volatile.
4052 /// \param DstPtrInfo IR information on the memory pointer.
4053 /// \returns New head in the control flow, if lowering was successful, empty
4054 /// SDValue otherwise.
4056 /// The function tries to replace 'llvm.memset' intrinsic with several store
4057 /// operations and value calculation code. This is usually profitable for small
4059 static SDValue getMemsetStores(SelectionDAG &DAG, SDLoc dl,
4060 SDValue Chain, SDValue Dst,
4061 SDValue Src, uint64_t Size,
4062 unsigned Align, bool isVol,
4063 MachinePointerInfo DstPtrInfo) {
4064 // Turn a memset of undef to nop.
4065 if (Src.getOpcode() == ISD::UNDEF)
4068 // Expand memset to a series of load/store ops if the size operand
4069 // falls below a certain threshold.
4070 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
4071 std::vector<EVT> MemOps;
4072 bool DstAlignCanChange = false;
4073 MachineFunction &MF = DAG.getMachineFunction();
4074 MachineFrameInfo *MFI = MF.getFrameInfo();
4075 bool OptSize = MF.getFunction()->getAttributes().
4076 hasAttribute(AttributeSet::FunctionIndex, Attribute::OptimizeForSize);
4077 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
4078 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
4079 DstAlignCanChange = true;
4081 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue();
4082 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(OptSize),
4083 Size, (DstAlignCanChange ? 0 : Align), 0,
4084 true, IsZeroVal, false, true, DAG, TLI))
4087 if (DstAlignCanChange) {
4088 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
4089 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
4090 if (NewAlign > Align) {
4091 // Give the stack frame object a larger alignment if needed.
4092 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
4093 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
4098 SmallVector<SDValue, 8> OutChains;
4099 uint64_t DstOff = 0;
4100 unsigned NumMemOps = MemOps.size();
4102 // Find the largest store and generate the bit pattern for it.
4103 EVT LargestVT = MemOps[0];
4104 for (unsigned i = 1; i < NumMemOps; i++)
4105 if (MemOps[i].bitsGT(LargestVT))
4106 LargestVT = MemOps[i];
4107 SDValue MemSetValue = getMemsetValue(Src, LargestVT, DAG, dl);
4109 for (unsigned i = 0; i < NumMemOps; i++) {
4111 unsigned VTSize = VT.getSizeInBits() / 8;
4112 if (VTSize > Size) {
4113 // Issuing an unaligned load / store pair that overlaps with the previous
4114 // pair. Adjust the offset accordingly.
4115 assert(i == NumMemOps-1 && i != 0);
4116 DstOff -= VTSize - Size;
4119 // If this store is smaller than the largest store see whether we can get
4120 // the smaller value for free with a truncate.
4121 SDValue Value = MemSetValue;
4122 if (VT.bitsLT(LargestVT)) {
4123 if (!LargestVT.isVector() && !VT.isVector() &&
4124 TLI.isTruncateFree(LargestVT, VT))
4125 Value = DAG.getNode(ISD::TRUNCATE, dl, VT, MemSetValue);
4127 Value = getMemsetValue(Src, VT, DAG, dl);
4129 assert(Value.getValueType() == VT && "Value with wrong type.");
4130 SDValue Store = DAG.getStore(Chain, dl, Value,
4131 getMemBasePlusOffset(Dst, DstOff, dl, DAG),
4132 DstPtrInfo.getWithOffset(DstOff),
4133 isVol, false, Align);
4134 OutChains.push_back(Store);
4135 DstOff += VT.getSizeInBits() / 8;
4139 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains);
4142 SDValue SelectionDAG::getMemcpy(SDValue Chain, SDLoc dl, SDValue Dst,
4143 SDValue Src, SDValue Size,
4144 unsigned Align, bool isVol, bool AlwaysInline,
4145 MachinePointerInfo DstPtrInfo,
4146 MachinePointerInfo SrcPtrInfo) {
4147 assert(Align && "The SDAG layer expects explicit alignment and reserves 0");
4149 // Check to see if we should lower the memcpy to loads and stores first.
4150 // For cases within the target-specified limits, this is the best choice.
4151 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
4153 // Memcpy with size zero? Just return the original chain.
4154 if (ConstantSize->isNullValue())
4157 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
4158 ConstantSize->getZExtValue(),Align,
4159 isVol, false, DstPtrInfo, SrcPtrInfo);
4160 if (Result.getNode())
4164 // Then check to see if we should lower the memcpy with target-specific
4165 // code. If the target chooses to do this, this is the next best.
4167 TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align,
4168 isVol, AlwaysInline,
4169 DstPtrInfo, SrcPtrInfo);
4170 if (Result.getNode())
4173 // If we really need inline code and the target declined to provide it,
4174 // use a (potentially long) sequence of loads and stores.
4176 assert(ConstantSize && "AlwaysInline requires a constant size!");
4177 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
4178 ConstantSize->getZExtValue(), Align, isVol,
4179 true, DstPtrInfo, SrcPtrInfo);
4182 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc
4183 // memcpy is not guaranteed to be safe. libc memcpys aren't required to
4184 // respect volatile, so they may do things like read or write memory
4185 // beyond the given memory regions. But fixing this isn't easy, and most
4186 // people don't care.
4188 const TargetLowering *TLI = TM.getTargetLowering();
4190 // Emit a library call.
4191 TargetLowering::ArgListTy Args;
4192 TargetLowering::ArgListEntry Entry;
4193 Entry.Ty = TLI->getDataLayout()->getIntPtrType(*getContext());
4194 Entry.Node = Dst; Args.push_back(Entry);
4195 Entry.Node = Src; Args.push_back(Entry);
4196 Entry.Node = Size; Args.push_back(Entry);
4197 // FIXME: pass in SDLoc
4198 TargetLowering::CallLoweringInfo CLI(*this);
4199 CLI.setDebugLoc(dl).setChain(Chain)
4200 .setCallee(TLI->getLibcallCallingConv(RTLIB::MEMCPY),
4201 Type::getVoidTy(*getContext()),
4202 getExternalSymbol(TLI->getLibcallName(RTLIB::MEMCPY),
4203 TLI->getPointerTy()), std::move(Args), 0)
4204 .setDiscardResult();
4205 std::pair<SDValue,SDValue> CallResult = TLI->LowerCallTo(CLI);
4207 return CallResult.second;
4210 SDValue SelectionDAG::getMemmove(SDValue Chain, SDLoc dl, SDValue Dst,
4211 SDValue Src, SDValue Size,
4212 unsigned Align, bool isVol,
4213 MachinePointerInfo DstPtrInfo,
4214 MachinePointerInfo SrcPtrInfo) {
4215 assert(Align && "The SDAG layer expects explicit alignment and reserves 0");
4217 // Check to see if we should lower the memmove to loads and stores first.
4218 // For cases within the target-specified limits, this is the best choice.
4219 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
4221 // Memmove with size zero? Just return the original chain.
4222 if (ConstantSize->isNullValue())
4226 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
4227 ConstantSize->getZExtValue(), Align, isVol,
4228 false, DstPtrInfo, SrcPtrInfo);
4229 if (Result.getNode())
4233 // Then check to see if we should lower the memmove with target-specific
4234 // code. If the target chooses to do this, this is the next best.
4236 TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol,
4237 DstPtrInfo, SrcPtrInfo);
4238 if (Result.getNode())
4241 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may
4242 // not be safe. See memcpy above for more details.
4244 const TargetLowering *TLI = TM.getTargetLowering();
4246 // Emit a library call.
4247 TargetLowering::ArgListTy Args;
4248 TargetLowering::ArgListEntry Entry;
4249 Entry.Ty = TLI->getDataLayout()->getIntPtrType(*getContext());
4250 Entry.Node = Dst; Args.push_back(Entry);
4251 Entry.Node = Src; Args.push_back(Entry);
4252 Entry.Node = Size; Args.push_back(Entry);
4253 // FIXME: pass in SDLoc
4254 TargetLowering::CallLoweringInfo CLI(*this);
4255 CLI.setDebugLoc(dl).setChain(Chain)
4256 .setCallee(TLI->getLibcallCallingConv(RTLIB::MEMMOVE),
4257 Type::getVoidTy(*getContext()),
4258 getExternalSymbol(TLI->getLibcallName(RTLIB::MEMMOVE),
4259 TLI->getPointerTy()), std::move(Args), 0)
4260 .setDiscardResult();
4261 std::pair<SDValue,SDValue> CallResult = TLI->LowerCallTo(CLI);
4263 return CallResult.second;
4266 SDValue SelectionDAG::getMemset(SDValue Chain, SDLoc dl, SDValue Dst,
4267 SDValue Src, SDValue Size,
4268 unsigned Align, bool isVol,
4269 MachinePointerInfo DstPtrInfo) {
4270 assert(Align && "The SDAG layer expects explicit alignment and reserves 0");
4272 // Check to see if we should lower the memset to stores first.
4273 // For cases within the target-specified limits, this is the best choice.
4274 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
4276 // Memset with size zero? Just return the original chain.
4277 if (ConstantSize->isNullValue())
4281 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
4282 Align, isVol, DstPtrInfo);
4284 if (Result.getNode())
4288 // Then check to see if we should lower the memset with target-specific
4289 // code. If the target chooses to do this, this is the next best.
4291 TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol,
4293 if (Result.getNode())
4296 // Emit a library call.
4297 const TargetLowering *TLI = TM.getTargetLowering();
4298 Type *IntPtrTy = TLI->getDataLayout()->getIntPtrType(*getContext());
4299 TargetLowering::ArgListTy Args;
4300 TargetLowering::ArgListEntry Entry;
4301 Entry.Node = Dst; Entry.Ty = IntPtrTy;
4302 Args.push_back(Entry);
4303 // Extend or truncate the argument to be an i32 value for the call.
4304 if (Src.getValueType().bitsGT(MVT::i32))
4305 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
4307 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
4309 Entry.Ty = Type::getInt32Ty(*getContext());
4310 Entry.isSExt = true;
4311 Args.push_back(Entry);
4313 Entry.Ty = IntPtrTy;
4314 Entry.isSExt = false;
4315 Args.push_back(Entry);
4317 // FIXME: pass in SDLoc
4318 TargetLowering::CallLoweringInfo CLI(*this);
4319 CLI.setDebugLoc(dl).setChain(Chain)
4320 .setCallee(TLI->getLibcallCallingConv(RTLIB::MEMSET),
4321 Type::getVoidTy(*getContext()),
4322 getExternalSymbol(TLI->getLibcallName(RTLIB::MEMSET),
4323 TLI->getPointerTy()), std::move(Args), 0)
4324 .setDiscardResult();
4326 std::pair<SDValue,SDValue> CallResult = TLI->LowerCallTo(CLI);
4327 return CallResult.second;
4330 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4331 SDVTList VTList, ArrayRef<SDValue> Ops,
4332 MachineMemOperand *MMO,
4333 AtomicOrdering SuccessOrdering,
4334 AtomicOrdering FailureOrdering,
4335 SynchronizationScope SynchScope) {
4336 FoldingSetNodeID ID;
4337 ID.AddInteger(MemVT.getRawBits());
4338 AddNodeIDNode(ID, Opcode, VTList, Ops);
4339 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4341 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4342 cast<AtomicSDNode>(E)->refineAlignment(MMO);
4343 return SDValue(E, 0);
4346 // Allocate the operands array for the node out of the BumpPtrAllocator, since
4347 // SDNode doesn't have access to it. This memory will be "leaked" when
4348 // the node is deallocated, but recovered when the allocator is released.
4349 // If the number of operands is less than 5 we use AtomicSDNode's internal
4351 unsigned NumOps = Ops.size();
4352 SDUse *DynOps = NumOps > 4 ? OperandAllocator.Allocate<SDUse>(NumOps)
4355 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl.getIROrder(),
4356 dl.getDebugLoc(), VTList, MemVT,
4357 Ops.data(), DynOps, NumOps, MMO,
4358 SuccessOrdering, FailureOrdering,
4360 CSEMap.InsertNode(N, IP);
4361 AllNodes.push_back(N);
4362 return SDValue(N, 0);
4365 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4366 SDVTList VTList, ArrayRef<SDValue> Ops,
4367 MachineMemOperand *MMO,
4368 AtomicOrdering Ordering,
4369 SynchronizationScope SynchScope) {
4370 return getAtomic(Opcode, dl, MemVT, VTList, Ops, MMO, Ordering,
4371 Ordering, SynchScope);
4374 SDValue SelectionDAG::getAtomicCmpSwap(
4375 unsigned Opcode, SDLoc dl, EVT MemVT, SDVTList VTs, SDValue Chain,
4376 SDValue Ptr, SDValue Cmp, SDValue Swp, MachinePointerInfo PtrInfo,
4377 unsigned Alignment, AtomicOrdering SuccessOrdering,
4378 AtomicOrdering FailureOrdering, SynchronizationScope SynchScope) {
4379 assert(Opcode == ISD::ATOMIC_CMP_SWAP ||
4380 Opcode == ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS);
4381 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
4383 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4384 Alignment = getEVTAlignment(MemVT);
4386 MachineFunction &MF = getMachineFunction();
4388 // FIXME: Volatile isn't really correct; we should keep track of atomic
4389 // orderings in the memoperand.
4390 unsigned Flags = MachineMemOperand::MOVolatile;
4391 Flags |= MachineMemOperand::MOLoad;
4392 Flags |= MachineMemOperand::MOStore;
4394 MachineMemOperand *MMO =
4395 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment);
4397 return getAtomicCmpSwap(Opcode, dl, MemVT, VTs, Chain, Ptr, Cmp, Swp, MMO,
4398 SuccessOrdering, FailureOrdering, SynchScope);
4401 SDValue SelectionDAG::getAtomicCmpSwap(unsigned Opcode, SDLoc dl, EVT MemVT,
4402 SDVTList VTs, SDValue Chain, SDValue Ptr,
4403 SDValue Cmp, SDValue Swp,
4404 MachineMemOperand *MMO,
4405 AtomicOrdering SuccessOrdering,
4406 AtomicOrdering FailureOrdering,
4407 SynchronizationScope SynchScope) {
4408 assert(Opcode == ISD::ATOMIC_CMP_SWAP ||
4409 Opcode == ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS);
4410 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
4412 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
4413 return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO,
4414 SuccessOrdering, FailureOrdering, SynchScope);
4417 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4419 SDValue Ptr, SDValue Val,
4420 const Value* PtrVal,
4422 AtomicOrdering Ordering,
4423 SynchronizationScope SynchScope) {
4424 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4425 Alignment = getEVTAlignment(MemVT);
4427 MachineFunction &MF = getMachineFunction();
4428 // An atomic store does not load. An atomic load does not store.
4429 // (An atomicrmw obviously both loads and stores.)
4430 // For now, atomics are considered to be volatile always, and they are
4432 // FIXME: Volatile isn't really correct; we should keep track of atomic
4433 // orderings in the memoperand.
4434 unsigned Flags = MachineMemOperand::MOVolatile;
4435 if (Opcode != ISD::ATOMIC_STORE)
4436 Flags |= MachineMemOperand::MOLoad;
4437 if (Opcode != ISD::ATOMIC_LOAD)
4438 Flags |= MachineMemOperand::MOStore;
4440 MachineMemOperand *MMO =
4441 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
4442 MemVT.getStoreSize(), Alignment);
4444 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO,
4445 Ordering, SynchScope);
4448 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4450 SDValue Ptr, SDValue Val,
4451 MachineMemOperand *MMO,
4452 AtomicOrdering Ordering,
4453 SynchronizationScope SynchScope) {
4454 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
4455 Opcode == ISD::ATOMIC_LOAD_SUB ||
4456 Opcode == ISD::ATOMIC_LOAD_AND ||
4457 Opcode == ISD::ATOMIC_LOAD_OR ||
4458 Opcode == ISD::ATOMIC_LOAD_XOR ||
4459 Opcode == ISD::ATOMIC_LOAD_NAND ||
4460 Opcode == ISD::ATOMIC_LOAD_MIN ||
4461 Opcode == ISD::ATOMIC_LOAD_MAX ||
4462 Opcode == ISD::ATOMIC_LOAD_UMIN ||
4463 Opcode == ISD::ATOMIC_LOAD_UMAX ||
4464 Opcode == ISD::ATOMIC_SWAP ||
4465 Opcode == ISD::ATOMIC_STORE) &&
4466 "Invalid Atomic Op");
4468 EVT VT = Val.getValueType();
4470 SDVTList VTs = Opcode == ISD::ATOMIC_STORE ? getVTList(MVT::Other) :
4471 getVTList(VT, MVT::Other);
4472 SDValue Ops[] = {Chain, Ptr, Val};
4473 return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO, Ordering, SynchScope);
4476 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4477 EVT VT, SDValue Chain,
4479 MachineMemOperand *MMO,
4480 AtomicOrdering Ordering,
4481 SynchronizationScope SynchScope) {
4482 assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op");
4484 SDVTList VTs = getVTList(VT, MVT::Other);
4485 SDValue Ops[] = {Chain, Ptr};
4486 return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO, Ordering, SynchScope);
4489 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
4490 SDValue SelectionDAG::getMergeValues(ArrayRef<SDValue> Ops, SDLoc dl) {
4491 if (Ops.size() == 1)
4494 SmallVector<EVT, 4> VTs;
4495 VTs.reserve(Ops.size());
4496 for (unsigned i = 0; i < Ops.size(); ++i)
4497 VTs.push_back(Ops[i].getValueType());
4498 return getNode(ISD::MERGE_VALUES, dl, getVTList(VTs), Ops);
4502 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDLoc dl, SDVTList VTList,
4503 ArrayRef<SDValue> Ops,
4504 EVT MemVT, MachinePointerInfo PtrInfo,
4505 unsigned Align, bool Vol,
4506 bool ReadMem, bool WriteMem) {
4507 if (Align == 0) // Ensure that codegen never sees alignment 0
4508 Align = getEVTAlignment(MemVT);
4510 MachineFunction &MF = getMachineFunction();
4513 Flags |= MachineMemOperand::MOStore;
4515 Flags |= MachineMemOperand::MOLoad;
4517 Flags |= MachineMemOperand::MOVolatile;
4518 MachineMemOperand *MMO =
4519 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Align);
4521 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, MemVT, MMO);
4525 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDLoc dl, SDVTList VTList,
4526 ArrayRef<SDValue> Ops, EVT MemVT,
4527 MachineMemOperand *MMO) {
4528 assert((Opcode == ISD::INTRINSIC_VOID ||
4529 Opcode == ISD::INTRINSIC_W_CHAIN ||
4530 Opcode == ISD::PREFETCH ||
4531 Opcode == ISD::LIFETIME_START ||
4532 Opcode == ISD::LIFETIME_END ||
4533 (Opcode <= INT_MAX &&
4534 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) &&
4535 "Opcode is not a memory-accessing opcode!");
4537 // Memoize the node unless it returns a flag.
4538 MemIntrinsicSDNode *N;
4539 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
4540 FoldingSetNodeID ID;
4541 AddNodeIDNode(ID, Opcode, VTList, Ops);
4542 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4544 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4545 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO);
4546 return SDValue(E, 0);
4549 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl.getIROrder(),
4550 dl.getDebugLoc(), VTList, Ops,
4552 CSEMap.InsertNode(N, IP);
4554 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl.getIROrder(),
4555 dl.getDebugLoc(), VTList, Ops,
4558 AllNodes.push_back(N);
4559 return SDValue(N, 0);
4562 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4563 /// MachinePointerInfo record from it. This is particularly useful because the
4564 /// code generator has many cases where it doesn't bother passing in a
4565 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4566 static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) {
4567 // If this is FI+Offset, we can model it.
4568 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr))
4569 return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset);
4571 // If this is (FI+Offset1)+Offset2, we can model it.
4572 if (Ptr.getOpcode() != ISD::ADD ||
4573 !isa<ConstantSDNode>(Ptr.getOperand(1)) ||
4574 !isa<FrameIndexSDNode>(Ptr.getOperand(0)))
4575 return MachinePointerInfo();
4577 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
4578 return MachinePointerInfo::getFixedStack(FI, Offset+
4579 cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue());
4582 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4583 /// MachinePointerInfo record from it. This is particularly useful because the
4584 /// code generator has many cases where it doesn't bother passing in a
4585 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4586 static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) {
4587 // If the 'Offset' value isn't a constant, we can't handle this.
4588 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp))
4589 return InferPointerInfo(Ptr, OffsetNode->getSExtValue());
4590 if (OffsetOp.getOpcode() == ISD::UNDEF)
4591 return InferPointerInfo(Ptr);
4592 return MachinePointerInfo();
4597 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4598 EVT VT, SDLoc dl, SDValue Chain,
4599 SDValue Ptr, SDValue Offset,
4600 MachinePointerInfo PtrInfo, EVT MemVT,
4601 bool isVolatile, bool isNonTemporal, bool isInvariant,
4602 unsigned Alignment, const MDNode *TBAAInfo,
4603 const MDNode *Ranges) {
4604 assert(Chain.getValueType() == MVT::Other &&
4605 "Invalid chain type");
4606 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4607 Alignment = getEVTAlignment(VT);
4609 unsigned Flags = MachineMemOperand::MOLoad;
4611 Flags |= MachineMemOperand::MOVolatile;
4613 Flags |= MachineMemOperand::MONonTemporal;
4615 Flags |= MachineMemOperand::MOInvariant;
4617 // If we don't have a PtrInfo, infer the trivial frame index case to simplify
4619 if (PtrInfo.V.isNull())
4620 PtrInfo = InferPointerInfo(Ptr, Offset);
4622 MachineFunction &MF = getMachineFunction();
4623 MachineMemOperand *MMO =
4624 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment,
4626 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO);
4630 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4631 EVT VT, SDLoc dl, SDValue Chain,
4632 SDValue Ptr, SDValue Offset, EVT MemVT,
4633 MachineMemOperand *MMO) {
4635 ExtType = ISD::NON_EXTLOAD;
4636 } else if (ExtType == ISD::NON_EXTLOAD) {
4637 assert(VT == MemVT && "Non-extending load from different memory type!");
4640 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) &&
4641 "Should only be an extending load, not truncating!");
4642 assert(VT.isInteger() == MemVT.isInteger() &&
4643 "Cannot convert from FP to Int or Int -> FP!");
4644 assert(VT.isVector() == MemVT.isVector() &&
4645 "Cannot use trunc store to convert to or from a vector!");
4646 assert((!VT.isVector() ||
4647 VT.getVectorNumElements() == MemVT.getVectorNumElements()) &&
4648 "Cannot use trunc store to change the number of vector elements!");
4651 bool Indexed = AM != ISD::UNINDEXED;
4652 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
4653 "Unindexed load with an offset!");
4655 SDVTList VTs = Indexed ?
4656 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
4657 SDValue Ops[] = { Chain, Ptr, Offset };
4658 FoldingSetNodeID ID;
4659 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops);
4660 ID.AddInteger(MemVT.getRawBits());
4661 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(),
4662 MMO->isNonTemporal(),
4663 MMO->isInvariant()));
4664 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4666 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4667 cast<LoadSDNode>(E)->refineAlignment(MMO);
4668 return SDValue(E, 0);
4670 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl.getIROrder(),
4671 dl.getDebugLoc(), VTs, AM, ExtType,
4673 CSEMap.InsertNode(N, IP);
4674 AllNodes.push_back(N);
4675 return SDValue(N, 0);
4678 SDValue SelectionDAG::getLoad(EVT VT, SDLoc dl,
4679 SDValue Chain, SDValue Ptr,
4680 MachinePointerInfo PtrInfo,
4681 bool isVolatile, bool isNonTemporal,
4682 bool isInvariant, unsigned Alignment,
4683 const MDNode *TBAAInfo,
4684 const MDNode *Ranges) {
4685 SDValue Undef = getUNDEF(Ptr.getValueType());
4686 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
4687 PtrInfo, VT, isVolatile, isNonTemporal, isInvariant, Alignment,
4691 SDValue SelectionDAG::getLoad(EVT VT, SDLoc dl,
4692 SDValue Chain, SDValue Ptr,
4693 MachineMemOperand *MMO) {
4694 SDValue Undef = getUNDEF(Ptr.getValueType());
4695 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
4699 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, SDLoc dl, EVT VT,
4700 SDValue Chain, SDValue Ptr,
4701 MachinePointerInfo PtrInfo, EVT MemVT,
4702 bool isVolatile, bool isNonTemporal,
4703 unsigned Alignment, const MDNode *TBAAInfo) {
4704 SDValue Undef = getUNDEF(Ptr.getValueType());
4705 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
4706 PtrInfo, MemVT, isVolatile, isNonTemporal, false, Alignment,
4711 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, SDLoc dl, EVT VT,
4712 SDValue Chain, SDValue Ptr, EVT MemVT,
4713 MachineMemOperand *MMO) {
4714 SDValue Undef = getUNDEF(Ptr.getValueType());
4715 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
4720 SelectionDAG::getIndexedLoad(SDValue OrigLoad, SDLoc dl, SDValue Base,
4721 SDValue Offset, ISD::MemIndexedMode AM) {
4722 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
4723 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
4724 "Load is already a indexed load!");
4725 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl,
4726 LD->getChain(), Base, Offset, LD->getPointerInfo(),
4727 LD->getMemoryVT(), LD->isVolatile(), LD->isNonTemporal(),
4728 false, LD->getAlignment());
4731 SDValue SelectionDAG::getStore(SDValue Chain, SDLoc dl, SDValue Val,
4732 SDValue Ptr, MachinePointerInfo PtrInfo,
4733 bool isVolatile, bool isNonTemporal,
4734 unsigned Alignment, const MDNode *TBAAInfo) {
4735 assert(Chain.getValueType() == MVT::Other &&
4736 "Invalid chain type");
4737 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4738 Alignment = getEVTAlignment(Val.getValueType());
4740 unsigned Flags = MachineMemOperand::MOStore;
4742 Flags |= MachineMemOperand::MOVolatile;
4744 Flags |= MachineMemOperand::MONonTemporal;
4746 if (PtrInfo.V.isNull())
4747 PtrInfo = InferPointerInfo(Ptr);
4749 MachineFunction &MF = getMachineFunction();
4750 MachineMemOperand *MMO =
4751 MF.getMachineMemOperand(PtrInfo, Flags,
4752 Val.getValueType().getStoreSize(), Alignment,
4755 return getStore(Chain, dl, Val, Ptr, MMO);
4758 SDValue SelectionDAG::getStore(SDValue Chain, SDLoc dl, SDValue Val,
4759 SDValue Ptr, MachineMemOperand *MMO) {
4760 assert(Chain.getValueType() == MVT::Other &&
4761 "Invalid chain type");
4762 EVT VT = Val.getValueType();
4763 SDVTList VTs = getVTList(MVT::Other);
4764 SDValue Undef = getUNDEF(Ptr.getValueType());
4765 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4766 FoldingSetNodeID ID;
4767 AddNodeIDNode(ID, ISD::STORE, VTs, Ops);
4768 ID.AddInteger(VT.getRawBits());
4769 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
4770 MMO->isNonTemporal(), MMO->isInvariant()));
4771 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4773 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4774 cast<StoreSDNode>(E)->refineAlignment(MMO);
4775 return SDValue(E, 0);
4777 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl.getIROrder(),
4778 dl.getDebugLoc(), VTs,
4779 ISD::UNINDEXED, false, VT, MMO);
4780 CSEMap.InsertNode(N, IP);
4781 AllNodes.push_back(N);
4782 return SDValue(N, 0);
4785 SDValue SelectionDAG::getTruncStore(SDValue Chain, SDLoc dl, SDValue Val,
4786 SDValue Ptr, MachinePointerInfo PtrInfo,
4787 EVT SVT,bool isVolatile, bool isNonTemporal,
4789 const MDNode *TBAAInfo) {
4790 assert(Chain.getValueType() == MVT::Other &&
4791 "Invalid chain type");
4792 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4793 Alignment = getEVTAlignment(SVT);
4795 unsigned Flags = MachineMemOperand::MOStore;
4797 Flags |= MachineMemOperand::MOVolatile;
4799 Flags |= MachineMemOperand::MONonTemporal;
4801 if (PtrInfo.V.isNull())
4802 PtrInfo = InferPointerInfo(Ptr);
4804 MachineFunction &MF = getMachineFunction();
4805 MachineMemOperand *MMO =
4806 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment,
4809 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO);
4812 SDValue SelectionDAG::getTruncStore(SDValue Chain, SDLoc dl, SDValue Val,
4813 SDValue Ptr, EVT SVT,
4814 MachineMemOperand *MMO) {
4815 EVT VT = Val.getValueType();
4817 assert(Chain.getValueType() == MVT::Other &&
4818 "Invalid chain type");
4820 return getStore(Chain, dl, Val, Ptr, MMO);
4822 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) &&
4823 "Should only be a truncating store, not extending!");
4824 assert(VT.isInteger() == SVT.isInteger() &&
4825 "Can't do FP-INT conversion!");
4826 assert(VT.isVector() == SVT.isVector() &&
4827 "Cannot use trunc store to convert to or from a vector!");
4828 assert((!VT.isVector() ||
4829 VT.getVectorNumElements() == SVT.getVectorNumElements()) &&
4830 "Cannot use trunc store to change the number of vector elements!");
4832 SDVTList VTs = getVTList(MVT::Other);
4833 SDValue Undef = getUNDEF(Ptr.getValueType());
4834 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4835 FoldingSetNodeID ID;
4836 AddNodeIDNode(ID, ISD::STORE, VTs, Ops);
4837 ID.AddInteger(SVT.getRawBits());
4838 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(),
4839 MMO->isNonTemporal(), MMO->isInvariant()));
4840 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4842 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4843 cast<StoreSDNode>(E)->refineAlignment(MMO);
4844 return SDValue(E, 0);
4846 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl.getIROrder(),
4847 dl.getDebugLoc(), VTs,
4848 ISD::UNINDEXED, true, SVT, MMO);
4849 CSEMap.InsertNode(N, IP);
4850 AllNodes.push_back(N);
4851 return SDValue(N, 0);
4855 SelectionDAG::getIndexedStore(SDValue OrigStore, SDLoc dl, SDValue Base,
4856 SDValue Offset, ISD::MemIndexedMode AM) {
4857 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
4858 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
4859 "Store is already a indexed store!");
4860 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
4861 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
4862 FoldingSetNodeID ID;
4863 AddNodeIDNode(ID, ISD::STORE, VTs, Ops);
4864 ID.AddInteger(ST->getMemoryVT().getRawBits());
4865 ID.AddInteger(ST->getRawSubclassData());
4866 ID.AddInteger(ST->getPointerInfo().getAddrSpace());
4868 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4869 return SDValue(E, 0);
4871 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl.getIROrder(),
4872 dl.getDebugLoc(), VTs, AM,
4873 ST->isTruncatingStore(),
4875 ST->getMemOperand());
4876 CSEMap.InsertNode(N, IP);
4877 AllNodes.push_back(N);
4878 return SDValue(N, 0);
4881 SDValue SelectionDAG::getVAArg(EVT VT, SDLoc dl,
4882 SDValue Chain, SDValue Ptr,
4885 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) };
4886 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops);
4889 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
4890 ArrayRef<SDUse> Ops) {
4891 switch (Ops.size()) {
4892 case 0: return getNode(Opcode, DL, VT);
4893 case 1: return getNode(Opcode, DL, VT, static_cast<const SDValue>(Ops[0]));
4894 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4895 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4899 // Copy from an SDUse array into an SDValue array for use with
4900 // the regular getNode logic.
4901 SmallVector<SDValue, 8> NewOps(Ops.begin(), Ops.end());
4902 return getNode(Opcode, DL, VT, NewOps);
4905 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
4906 ArrayRef<SDValue> Ops) {
4907 unsigned NumOps = Ops.size();
4909 case 0: return getNode(Opcode, DL, VT);
4910 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4911 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4912 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4918 case ISD::SELECT_CC: {
4919 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
4920 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
4921 "LHS and RHS of condition must have same type!");
4922 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4923 "True and False arms of SelectCC must have same type!");
4924 assert(Ops[2].getValueType() == VT &&
4925 "select_cc node must be of same type as true and false value!");
4929 assert(NumOps == 5 && "BR_CC takes 5 operands!");
4930 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4931 "LHS/RHS of comparison should match types!");
4938 SDVTList VTs = getVTList(VT);
4940 if (VT != MVT::Glue) {
4941 FoldingSetNodeID ID;
4942 AddNodeIDNode(ID, Opcode, VTs, Ops);
4945 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4946 return SDValue(E, 0);
4948 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
4950 CSEMap.InsertNode(N, IP);
4952 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
4956 AllNodes.push_back(N);
4960 return SDValue(N, 0);
4963 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL,
4964 ArrayRef<EVT> ResultTys, ArrayRef<SDValue> Ops) {
4965 return getNode(Opcode, DL, getVTList(ResultTys), Ops);
4968 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
4969 ArrayRef<SDValue> Ops) {
4970 if (VTList.NumVTs == 1)
4971 return getNode(Opcode, DL, VTList.VTs[0], Ops);
4975 // FIXME: figure out how to safely handle things like
4976 // int foo(int x) { return 1 << (x & 255); }
4977 // int bar() { return foo(256); }
4978 case ISD::SRA_PARTS:
4979 case ISD::SRL_PARTS:
4980 case ISD::SHL_PARTS:
4981 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
4982 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
4983 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4984 else if (N3.getOpcode() == ISD::AND)
4985 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
4986 // If the and is only masking out bits that cannot effect the shift,
4987 // eliminate the and.
4988 unsigned NumBits = VT.getScalarType().getSizeInBits()*2;
4989 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
4990 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4996 // Memoize the node unless it returns a flag.
4998 unsigned NumOps = Ops.size();
4999 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
5000 FoldingSetNodeID ID;
5001 AddNodeIDNode(ID, Opcode, VTList, Ops);
5003 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
5004 return SDValue(E, 0);
5007 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(),
5008 DL.getDebugLoc(), VTList, Ops[0]);
5009 } else if (NumOps == 2) {
5010 N = new (NodeAllocator) BinarySDNode(Opcode, DL.getIROrder(),
5011 DL.getDebugLoc(), VTList, Ops[0],
5013 } else if (NumOps == 3) {
5014 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(),
5015 DL.getDebugLoc(), VTList, Ops[0],
5018 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
5021 CSEMap.InsertNode(N, IP);
5024 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(),
5025 DL.getDebugLoc(), VTList, Ops[0]);
5026 } else if (NumOps == 2) {
5027 N = new (NodeAllocator) BinarySDNode(Opcode, DL.getIROrder(),
5028 DL.getDebugLoc(), VTList, Ops[0],
5030 } else if (NumOps == 3) {
5031 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(),
5032 DL.getDebugLoc(), VTList, Ops[0],
5035 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
5039 AllNodes.push_back(N);
5043 return SDValue(N, 0);
5046 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList) {
5047 return getNode(Opcode, DL, VTList, ArrayRef<SDValue>());
5050 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5052 SDValue Ops[] = { N1 };
5053 return getNode(Opcode, DL, VTList, Ops);
5056 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5057 SDValue N1, SDValue N2) {
5058 SDValue Ops[] = { N1, N2 };
5059 return getNode(Opcode, DL, VTList, Ops);
5062 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5063 SDValue N1, SDValue N2, SDValue N3) {
5064 SDValue Ops[] = { N1, N2, N3 };
5065 return getNode(Opcode, DL, VTList, Ops);
5068 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5069 SDValue N1, SDValue N2, SDValue N3,
5071 SDValue Ops[] = { N1, N2, N3, N4 };
5072 return getNode(Opcode, DL, VTList, Ops);
5075 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5076 SDValue N1, SDValue N2, SDValue N3,
5077 SDValue N4, SDValue N5) {
5078 SDValue Ops[] = { N1, N2, N3, N4, N5 };
5079 return getNode(Opcode, DL, VTList, Ops);
5082 SDVTList SelectionDAG::getVTList(EVT VT) {
5083 return makeVTList(SDNode::getValueTypeList(VT), 1);
5086 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
5087 FoldingSetNodeID ID;
5089 ID.AddInteger(VT1.getRawBits());
5090 ID.AddInteger(VT2.getRawBits());
5093 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5095 EVT *Array = Allocator.Allocate<EVT>(2);
5098 Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, 2);
5099 VTListMap.InsertNode(Result, IP);
5101 return Result->getSDVTList();
5104 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
5105 FoldingSetNodeID ID;
5107 ID.AddInteger(VT1.getRawBits());
5108 ID.AddInteger(VT2.getRawBits());
5109 ID.AddInteger(VT3.getRawBits());
5112 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5114 EVT *Array = Allocator.Allocate<EVT>(3);
5118 Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, 3);
5119 VTListMap.InsertNode(Result, IP);
5121 return Result->getSDVTList();
5124 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
5125 FoldingSetNodeID ID;
5127 ID.AddInteger(VT1.getRawBits());
5128 ID.AddInteger(VT2.getRawBits());
5129 ID.AddInteger(VT3.getRawBits());
5130 ID.AddInteger(VT4.getRawBits());
5133 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5135 EVT *Array = Allocator.Allocate<EVT>(4);
5140 Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, 4);
5141 VTListMap.InsertNode(Result, IP);
5143 return Result->getSDVTList();
5146 SDVTList SelectionDAG::getVTList(ArrayRef<EVT> VTs) {
5147 unsigned NumVTs = VTs.size();
5148 FoldingSetNodeID ID;
5149 ID.AddInteger(NumVTs);
5150 for (unsigned index = 0; index < NumVTs; index++) {
5151 ID.AddInteger(VTs[index].getRawBits());
5155 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5157 EVT *Array = Allocator.Allocate<EVT>(NumVTs);
5158 std::copy(VTs.begin(), VTs.end(), Array);
5159 Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, NumVTs);
5160 VTListMap.InsertNode(Result, IP);
5162 return Result->getSDVTList();
5166 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
5167 /// specified operands. If the resultant node already exists in the DAG,
5168 /// this does not modify the specified node, instead it returns the node that
5169 /// already exists. If the resultant node does not exist in the DAG, the
5170 /// input node is returned. As a degenerate case, if you specify the same
5171 /// input operands as the node already has, the input node is returned.
5172 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) {
5173 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
5175 // Check to see if there is no change.
5176 if (Op == N->getOperand(0)) return N;
5178 // See if the modified node already exists.
5179 void *InsertPos = nullptr;
5180 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
5183 // Nope it doesn't. Remove the node from its current place in the maps.
5185 if (!RemoveNodeFromCSEMaps(N))
5186 InsertPos = nullptr;
5188 // Now we update the operands.
5189 N->OperandList[0].set(Op);
5191 // If this gets put into a CSE map, add it.
5192 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
5196 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) {
5197 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
5199 // Check to see if there is no change.
5200 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
5201 return N; // No operands changed, just return the input node.
5203 // See if the modified node already exists.
5204 void *InsertPos = nullptr;
5205 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
5208 // Nope it doesn't. Remove the node from its current place in the maps.
5210 if (!RemoveNodeFromCSEMaps(N))
5211 InsertPos = nullptr;
5213 // Now we update the operands.
5214 if (N->OperandList[0] != Op1)
5215 N->OperandList[0].set(Op1);
5216 if (N->OperandList[1] != Op2)
5217 N->OperandList[1].set(Op2);
5219 // If this gets put into a CSE map, add it.
5220 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
5224 SDNode *SelectionDAG::
5225 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) {
5226 SDValue Ops[] = { Op1, Op2, Op3 };
5227 return UpdateNodeOperands(N, Ops);
5230 SDNode *SelectionDAG::
5231 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
5232 SDValue Op3, SDValue Op4) {
5233 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
5234 return UpdateNodeOperands(N, Ops);
5237 SDNode *SelectionDAG::
5238 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
5239 SDValue Op3, SDValue Op4, SDValue Op5) {
5240 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
5241 return UpdateNodeOperands(N, Ops);
5244 SDNode *SelectionDAG::
5245 UpdateNodeOperands(SDNode *N, ArrayRef<SDValue> Ops) {
5246 unsigned NumOps = Ops.size();
5247 assert(N->getNumOperands() == NumOps &&
5248 "Update with wrong number of operands");
5250 // Check to see if there is no change.
5251 bool AnyChange = false;
5252 for (unsigned i = 0; i != NumOps; ++i) {
5253 if (Ops[i] != N->getOperand(i)) {
5259 // No operands changed, just return the input node.
5260 if (!AnyChange) return N;
5262 // See if the modified node already exists.
5263 void *InsertPos = nullptr;
5264 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, InsertPos))
5267 // Nope it doesn't. Remove the node from its current place in the maps.
5269 if (!RemoveNodeFromCSEMaps(N))
5270 InsertPos = nullptr;
5272 // Now we update the operands.
5273 for (unsigned i = 0; i != NumOps; ++i)
5274 if (N->OperandList[i] != Ops[i])
5275 N->OperandList[i].set(Ops[i]);
5277 // If this gets put into a CSE map, add it.
5278 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
5282 /// DropOperands - Release the operands and set this node to have
5284 void SDNode::DropOperands() {
5285 // Unlike the code in MorphNodeTo that does this, we don't need to
5286 // watch for dead nodes here.
5287 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
5293 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
5296 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5298 SDVTList VTs = getVTList(VT);
5299 return SelectNodeTo(N, MachineOpc, VTs, None);
5302 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5303 EVT VT, SDValue Op1) {
5304 SDVTList VTs = getVTList(VT);
5305 SDValue Ops[] = { Op1 };
5306 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5309 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5310 EVT VT, SDValue Op1,
5312 SDVTList VTs = getVTList(VT);
5313 SDValue Ops[] = { Op1, Op2 };
5314 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5317 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5318 EVT VT, SDValue Op1,
5319 SDValue Op2, SDValue Op3) {
5320 SDVTList VTs = getVTList(VT);
5321 SDValue Ops[] = { Op1, Op2, Op3 };
5322 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5325 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5326 EVT VT, ArrayRef<SDValue> Ops) {
5327 SDVTList VTs = getVTList(VT);
5328 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5331 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5332 EVT VT1, EVT VT2, ArrayRef<SDValue> Ops) {
5333 SDVTList VTs = getVTList(VT1, VT2);
5334 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5337 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5339 SDVTList VTs = getVTList(VT1, VT2);
5340 return SelectNodeTo(N, MachineOpc, VTs, None);
5343 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5344 EVT VT1, EVT VT2, EVT VT3,
5345 ArrayRef<SDValue> Ops) {
5346 SDVTList VTs = getVTList(VT1, VT2, VT3);
5347 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5350 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5351 EVT VT1, EVT VT2, EVT VT3, EVT VT4,
5352 ArrayRef<SDValue> Ops) {
5353 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
5354 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5357 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5360 SDVTList VTs = getVTList(VT1, VT2);
5361 SDValue Ops[] = { Op1 };
5362 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5365 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5367 SDValue Op1, SDValue Op2) {
5368 SDVTList VTs = getVTList(VT1, VT2);
5369 SDValue Ops[] = { Op1, Op2 };
5370 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5373 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5375 SDValue Op1, SDValue Op2,
5377 SDVTList VTs = getVTList(VT1, VT2);
5378 SDValue Ops[] = { Op1, Op2, Op3 };
5379 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5382 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5383 EVT VT1, EVT VT2, EVT VT3,
5384 SDValue Op1, SDValue Op2,
5386 SDVTList VTs = getVTList(VT1, VT2, VT3);
5387 SDValue Ops[] = { Op1, Op2, Op3 };
5388 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5391 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5392 SDVTList VTs,ArrayRef<SDValue> Ops) {
5393 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops);
5394 // Reset the NodeID to -1.
5399 /// UpdadeSDLocOnMergedSDNode - If the opt level is -O0 then it throws away
5400 /// the line number information on the merged node since it is not possible to
5401 /// preserve the information that operation is associated with multiple lines.
5402 /// This will make the debugger working better at -O0, were there is a higher
5403 /// probability having other instructions associated with that line.
5405 /// For IROrder, we keep the smaller of the two
5406 SDNode *SelectionDAG::UpdadeSDLocOnMergedSDNode(SDNode *N, SDLoc OLoc) {
5407 DebugLoc NLoc = N->getDebugLoc();
5408 if (!(NLoc.isUnknown()) && (OptLevel == CodeGenOpt::None) &&
5409 (OLoc.getDebugLoc() != NLoc)) {
5410 N->setDebugLoc(DebugLoc());
5412 unsigned Order = std::min(N->getIROrder(), OLoc.getIROrder());
5413 N->setIROrder(Order);
5417 /// MorphNodeTo - This *mutates* the specified node to have the specified
5418 /// return type, opcode, and operands.
5420 /// Note that MorphNodeTo returns the resultant node. If there is already a
5421 /// node of the specified opcode and operands, it returns that node instead of
5422 /// the current one. Note that the SDLoc need not be the same.
5424 /// Using MorphNodeTo is faster than creating a new node and swapping it in
5425 /// with ReplaceAllUsesWith both because it often avoids allocating a new
5426 /// node, and because it doesn't require CSE recalculation for any of
5427 /// the node's users.
5429 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
5430 SDVTList VTs, ArrayRef<SDValue> Ops) {
5431 unsigned NumOps = Ops.size();
5432 // If an identical node already exists, use it.
5434 if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) {
5435 FoldingSetNodeID ID;
5436 AddNodeIDNode(ID, Opc, VTs, Ops);
5437 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
5438 return UpdadeSDLocOnMergedSDNode(ON, SDLoc(N));
5441 if (!RemoveNodeFromCSEMaps(N))
5444 // Start the morphing.
5446 N->ValueList = VTs.VTs;
5447 N->NumValues = VTs.NumVTs;
5449 // Clear the operands list, updating used nodes to remove this from their
5450 // use list. Keep track of any operands that become dead as a result.
5451 SmallPtrSet<SDNode*, 16> DeadNodeSet;
5452 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
5454 SDNode *Used = Use.getNode();
5456 if (Used->use_empty())
5457 DeadNodeSet.insert(Used);
5460 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) {
5461 // Initialize the memory references information.
5462 MN->setMemRefs(nullptr, nullptr);
5463 // If NumOps is larger than the # of operands we can have in a
5464 // MachineSDNode, reallocate the operand list.
5465 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) {
5466 if (MN->OperandsNeedDelete)
5467 delete[] MN->OperandList;
5468 if (NumOps > array_lengthof(MN->LocalOperands))
5469 // We're creating a final node that will live unmorphed for the
5470 // remainder of the current SelectionDAG iteration, so we can allocate
5471 // the operands directly out of a pool with no recycling metadata.
5472 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
5473 Ops.data(), NumOps);
5475 MN->InitOperands(MN->LocalOperands, Ops.data(), NumOps);
5476 MN->OperandsNeedDelete = false;
5478 MN->InitOperands(MN->OperandList, Ops.data(), NumOps);
5480 // If NumOps is larger than the # of operands we currently have, reallocate
5481 // the operand list.
5482 if (NumOps > N->NumOperands) {
5483 if (N->OperandsNeedDelete)
5484 delete[] N->OperandList;
5485 N->InitOperands(new SDUse[NumOps], Ops.data(), NumOps);
5486 N->OperandsNeedDelete = true;
5488 N->InitOperands(N->OperandList, Ops.data(), NumOps);
5491 // Delete any nodes that are still dead after adding the uses for the
5493 if (!DeadNodeSet.empty()) {
5494 SmallVector<SDNode *, 16> DeadNodes;
5495 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
5496 E = DeadNodeSet.end(); I != E; ++I)
5497 if ((*I)->use_empty())
5498 DeadNodes.push_back(*I);
5499 RemoveDeadNodes(DeadNodes);
5503 CSEMap.InsertNode(N, IP); // Memoize the new node.
5508 /// getMachineNode - These are used for target selectors to create a new node
5509 /// with specified return type(s), MachineInstr opcode, and operands.
5511 /// Note that getMachineNode returns the resultant node. If there is already a
5512 /// node of the specified opcode and operands, it returns that node instead of
5513 /// the current one.
5515 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT) {
5516 SDVTList VTs = getVTList(VT);
5517 return getMachineNode(Opcode, dl, VTs, None);
5521 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT, SDValue Op1) {
5522 SDVTList VTs = getVTList(VT);
5523 SDValue Ops[] = { Op1 };
5524 return getMachineNode(Opcode, dl, VTs, Ops);
5528 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT,
5529 SDValue Op1, SDValue Op2) {
5530 SDVTList VTs = getVTList(VT);
5531 SDValue Ops[] = { Op1, Op2 };
5532 return getMachineNode(Opcode, dl, VTs, Ops);
5536 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT,
5537 SDValue Op1, SDValue Op2, SDValue Op3) {
5538 SDVTList VTs = getVTList(VT);
5539 SDValue Ops[] = { Op1, Op2, Op3 };
5540 return getMachineNode(Opcode, dl, VTs, Ops);
5544 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT,
5545 ArrayRef<SDValue> Ops) {
5546 SDVTList VTs = getVTList(VT);
5547 return getMachineNode(Opcode, dl, VTs, Ops);
5551 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1, EVT VT2) {
5552 SDVTList VTs = getVTList(VT1, VT2);
5553 return getMachineNode(Opcode, dl, VTs, None);
5557 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5558 EVT VT1, EVT VT2, SDValue Op1) {
5559 SDVTList VTs = getVTList(VT1, VT2);
5560 SDValue Ops[] = { Op1 };
5561 return getMachineNode(Opcode, dl, VTs, Ops);
5565 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5566 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) {
5567 SDVTList VTs = getVTList(VT1, VT2);
5568 SDValue Ops[] = { Op1, Op2 };
5569 return getMachineNode(Opcode, dl, VTs, Ops);
5573 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5574 EVT VT1, EVT VT2, SDValue Op1,
5575 SDValue Op2, SDValue Op3) {
5576 SDVTList VTs = getVTList(VT1, VT2);
5577 SDValue Ops[] = { Op1, Op2, Op3 };
5578 return getMachineNode(Opcode, dl, VTs, Ops);
5582 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5584 ArrayRef<SDValue> Ops) {
5585 SDVTList VTs = getVTList(VT1, VT2);
5586 return getMachineNode(Opcode, dl, VTs, Ops);
5590 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5591 EVT VT1, EVT VT2, EVT VT3,
5592 SDValue Op1, SDValue Op2) {
5593 SDVTList VTs = getVTList(VT1, VT2, VT3);
5594 SDValue Ops[] = { Op1, Op2 };
5595 return getMachineNode(Opcode, dl, VTs, Ops);
5599 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5600 EVT VT1, EVT VT2, EVT VT3,
5601 SDValue Op1, SDValue Op2, SDValue Op3) {
5602 SDVTList VTs = getVTList(VT1, VT2, VT3);
5603 SDValue Ops[] = { Op1, Op2, Op3 };
5604 return getMachineNode(Opcode, dl, VTs, Ops);
5608 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5609 EVT VT1, EVT VT2, EVT VT3,
5610 ArrayRef<SDValue> Ops) {
5611 SDVTList VTs = getVTList(VT1, VT2, VT3);
5612 return getMachineNode(Opcode, dl, VTs, Ops);
5616 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1,
5617 EVT VT2, EVT VT3, EVT VT4,
5618 ArrayRef<SDValue> Ops) {
5619 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
5620 return getMachineNode(Opcode, dl, VTs, Ops);
5624 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5625 ArrayRef<EVT> ResultTys,
5626 ArrayRef<SDValue> Ops) {
5627 SDVTList VTs = getVTList(ResultTys);
5628 return getMachineNode(Opcode, dl, VTs, Ops);
5632 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc DL, SDVTList VTs,
5633 ArrayRef<SDValue> OpsArray) {
5634 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue;
5637 const SDValue *Ops = OpsArray.data();
5638 unsigned NumOps = OpsArray.size();
5641 FoldingSetNodeID ID;
5642 AddNodeIDNode(ID, ~Opcode, VTs, OpsArray);
5644 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
5645 return cast<MachineSDNode>(UpdadeSDLocOnMergedSDNode(E, DL));
5649 // Allocate a new MachineSDNode.
5650 N = new (NodeAllocator) MachineSDNode(~Opcode, DL.getIROrder(),
5651 DL.getDebugLoc(), VTs);
5653 // Initialize the operands list.
5654 if (NumOps > array_lengthof(N->LocalOperands))
5655 // We're creating a final node that will live unmorphed for the
5656 // remainder of the current SelectionDAG iteration, so we can allocate
5657 // the operands directly out of a pool with no recycling metadata.
5658 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
5661 N->InitOperands(N->LocalOperands, Ops, NumOps);
5662 N->OperandsNeedDelete = false;
5665 CSEMap.InsertNode(N, IP);
5667 AllNodes.push_back(N);
5669 VerifyMachineNode(N);
5674 /// getTargetExtractSubreg - A convenience function for creating
5675 /// TargetOpcode::EXTRACT_SUBREG nodes.
5677 SelectionDAG::getTargetExtractSubreg(int SRIdx, SDLoc DL, EVT VT,
5679 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
5680 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL,
5681 VT, Operand, SRIdxVal);
5682 return SDValue(Subreg, 0);
5685 /// getTargetInsertSubreg - A convenience function for creating
5686 /// TargetOpcode::INSERT_SUBREG nodes.
5688 SelectionDAG::getTargetInsertSubreg(int SRIdx, SDLoc DL, EVT VT,
5689 SDValue Operand, SDValue Subreg) {
5690 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
5691 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL,
5692 VT, Operand, Subreg, SRIdxVal);
5693 return SDValue(Result, 0);
5696 /// getNodeIfExists - Get the specified node if it's already available, or
5697 /// else return NULL.
5698 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
5699 ArrayRef<SDValue> Ops, bool nuw, bool nsw,
5701 if (VTList.VTs[VTList.NumVTs - 1] != MVT::Glue) {
5702 FoldingSetNodeID ID;
5703 AddNodeIDNode(ID, Opcode, VTList, Ops);
5704 if (isBinOpWithFlags(Opcode))
5705 AddBinaryNodeIDCustom(ID, nuw, nsw, exact);
5707 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
5713 /// getDbgValue - Creates a SDDbgValue node.
5717 SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R,
5718 bool IsIndirect, uint64_t Off,
5719 DebugLoc DL, unsigned O) {
5720 return new (Allocator) SDDbgValue(MDPtr, N, R, IsIndirect, Off, DL, O);
5725 SelectionDAG::getConstantDbgValue(MDNode *MDPtr, const Value *C,
5727 DebugLoc DL, unsigned O) {
5728 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O);
5733 SelectionDAG::getFrameIndexDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off,
5734 DebugLoc DL, unsigned O) {
5735 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O);
5740 /// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node
5741 /// pointed to by a use iterator is deleted, increment the use iterator
5742 /// so that it doesn't dangle.
5744 class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener {
5745 SDNode::use_iterator &UI;
5746 SDNode::use_iterator &UE;
5748 void NodeDeleted(SDNode *N, SDNode *E) override {
5749 // Increment the iterator as needed.
5750 while (UI != UE && N == *UI)
5755 RAUWUpdateListener(SelectionDAG &d,
5756 SDNode::use_iterator &ui,
5757 SDNode::use_iterator &ue)
5758 : SelectionDAG::DAGUpdateListener(d), UI(ui), UE(ue) {}
5763 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5764 /// This can cause recursive merging of nodes in the DAG.
5766 /// This version assumes From has a single result value.
5768 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To) {
5769 SDNode *From = FromN.getNode();
5770 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
5771 "Cannot replace with this method!");
5772 assert(From != To.getNode() && "Cannot replace uses of with self");
5774 // Iterate over all the existing uses of From. New uses will be added
5775 // to the beginning of the use list, which we avoid visiting.
5776 // This specifically avoids visiting uses of From that arise while the
5777 // replacement is happening, because any such uses would be the result
5778 // of CSE: If an existing node looks like From after one of its operands
5779 // is replaced by To, we don't want to replace of all its users with To
5780 // too. See PR3018 for more info.
5781 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5782 RAUWUpdateListener Listener(*this, UI, UE);
5786 // This node is about to morph, remove its old self from the CSE maps.
5787 RemoveNodeFromCSEMaps(User);
5789 // A user can appear in a use list multiple times, and when this
5790 // happens the uses are usually next to each other in the list.
5791 // To help reduce the number of CSE recomputations, process all
5792 // the uses of this user that we can find this way.
5794 SDUse &Use = UI.getUse();
5797 } while (UI != UE && *UI == User);
5799 // Now that we have modified User, add it back to the CSE maps. If it
5800 // already exists there, recursively merge the results together.
5801 AddModifiedNodeToCSEMaps(User);
5804 // If we just RAUW'd the root, take note.
5805 if (FromN == getRoot())
5809 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5810 /// This can cause recursive merging of nodes in the DAG.
5812 /// This version assumes that for each value of From, there is a
5813 /// corresponding value in To in the same position with the same type.
5815 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To) {
5817 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
5818 assert((!From->hasAnyUseOfValue(i) ||
5819 From->getValueType(i) == To->getValueType(i)) &&
5820 "Cannot use this version of ReplaceAllUsesWith!");
5823 // Handle the trivial case.
5827 // Iterate over just the existing users of From. See the comments in
5828 // the ReplaceAllUsesWith above.
5829 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5830 RAUWUpdateListener Listener(*this, UI, UE);
5834 // This node is about to morph, remove its old self from the CSE maps.
5835 RemoveNodeFromCSEMaps(User);
5837 // A user can appear in a use list multiple times, and when this
5838 // happens the uses are usually next to each other in the list.
5839 // To help reduce the number of CSE recomputations, process all
5840 // the uses of this user that we can find this way.
5842 SDUse &Use = UI.getUse();
5845 } while (UI != UE && *UI == User);
5847 // Now that we have modified User, add it back to the CSE maps. If it
5848 // already exists there, recursively merge the results together.
5849 AddModifiedNodeToCSEMaps(User);
5852 // If we just RAUW'd the root, take note.
5853 if (From == getRoot().getNode())
5854 setRoot(SDValue(To, getRoot().getResNo()));
5857 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5858 /// This can cause recursive merging of nodes in the DAG.
5860 /// This version can replace From with any result values. To must match the
5861 /// number and types of values returned by From.
5862 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, const SDValue *To) {
5863 if (From->getNumValues() == 1) // Handle the simple case efficiently.
5864 return ReplaceAllUsesWith(SDValue(From, 0), To[0]);
5866 // Iterate over just the existing users of From. See the comments in
5867 // the ReplaceAllUsesWith above.
5868 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5869 RAUWUpdateListener Listener(*this, UI, UE);
5873 // This node is about to morph, remove its old self from the CSE maps.
5874 RemoveNodeFromCSEMaps(User);
5876 // A user can appear in a use list multiple times, and when this
5877 // happens the uses are usually next to each other in the list.
5878 // To help reduce the number of CSE recomputations, process all
5879 // the uses of this user that we can find this way.
5881 SDUse &Use = UI.getUse();
5882 const SDValue &ToOp = To[Use.getResNo()];
5885 } while (UI != UE && *UI == User);
5887 // Now that we have modified User, add it back to the CSE maps. If it
5888 // already exists there, recursively merge the results together.
5889 AddModifiedNodeToCSEMaps(User);
5892 // If we just RAUW'd the root, take note.
5893 if (From == getRoot().getNode())
5894 setRoot(SDValue(To[getRoot().getResNo()]));
5897 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
5898 /// uses of other values produced by From.getNode() alone. The Deleted
5899 /// vector is handled the same way as for ReplaceAllUsesWith.
5900 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To){
5901 // Handle the really simple, really trivial case efficiently.
5902 if (From == To) return;
5904 // Handle the simple, trivial, case efficiently.
5905 if (From.getNode()->getNumValues() == 1) {
5906 ReplaceAllUsesWith(From, To);
5910 // Iterate over just the existing users of From. See the comments in
5911 // the ReplaceAllUsesWith above.
5912 SDNode::use_iterator UI = From.getNode()->use_begin(),
5913 UE = From.getNode()->use_end();
5914 RAUWUpdateListener Listener(*this, UI, UE);
5917 bool UserRemovedFromCSEMaps = false;
5919 // A user can appear in a use list multiple times, and when this
5920 // happens the uses are usually next to each other in the list.
5921 // To help reduce the number of CSE recomputations, process all
5922 // the uses of this user that we can find this way.
5924 SDUse &Use = UI.getUse();
5926 // Skip uses of different values from the same node.
5927 if (Use.getResNo() != From.getResNo()) {
5932 // If this node hasn't been modified yet, it's still in the CSE maps,
5933 // so remove its old self from the CSE maps.
5934 if (!UserRemovedFromCSEMaps) {
5935 RemoveNodeFromCSEMaps(User);
5936 UserRemovedFromCSEMaps = true;
5941 } while (UI != UE && *UI == User);
5943 // We are iterating over all uses of the From node, so if a use
5944 // doesn't use the specific value, no changes are made.
5945 if (!UserRemovedFromCSEMaps)
5948 // Now that we have modified User, add it back to the CSE maps. If it
5949 // already exists there, recursively merge the results together.
5950 AddModifiedNodeToCSEMaps(User);
5953 // If we just RAUW'd the root, take note.
5954 if (From == getRoot())
5959 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
5960 /// to record information about a use.
5967 /// operator< - Sort Memos by User.
5968 bool operator<(const UseMemo &L, const UseMemo &R) {
5969 return (intptr_t)L.User < (intptr_t)R.User;
5973 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
5974 /// uses of other values produced by From.getNode() alone. The same value
5975 /// may appear in both the From and To list. The Deleted vector is
5976 /// handled the same way as for ReplaceAllUsesWith.
5977 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
5980 // Handle the simple, trivial case efficiently.
5982 return ReplaceAllUsesOfValueWith(*From, *To);
5984 // Read up all the uses and make records of them. This helps
5985 // processing new uses that are introduced during the
5986 // replacement process.
5987 SmallVector<UseMemo, 4> Uses;
5988 for (unsigned i = 0; i != Num; ++i) {
5989 unsigned FromResNo = From[i].getResNo();
5990 SDNode *FromNode = From[i].getNode();
5991 for (SDNode::use_iterator UI = FromNode->use_begin(),
5992 E = FromNode->use_end(); UI != E; ++UI) {
5993 SDUse &Use = UI.getUse();
5994 if (Use.getResNo() == FromResNo) {
5995 UseMemo Memo = { *UI, i, &Use };
5996 Uses.push_back(Memo);
6001 // Sort the uses, so that all the uses from a given User are together.
6002 std::sort(Uses.begin(), Uses.end());
6004 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
6005 UseIndex != UseIndexEnd; ) {
6006 // We know that this user uses some value of From. If it is the right
6007 // value, update it.
6008 SDNode *User = Uses[UseIndex].User;
6010 // This node is about to morph, remove its old self from the CSE maps.
6011 RemoveNodeFromCSEMaps(User);
6013 // The Uses array is sorted, so all the uses for a given User
6014 // are next to each other in the list.
6015 // To help reduce the number of CSE recomputations, process all
6016 // the uses of this user that we can find this way.
6018 unsigned i = Uses[UseIndex].Index;
6019 SDUse &Use = *Uses[UseIndex].Use;
6023 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
6025 // Now that we have modified User, add it back to the CSE maps. If it
6026 // already exists there, recursively merge the results together.
6027 AddModifiedNodeToCSEMaps(User);
6031 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
6032 /// based on their topological order. It returns the maximum id and a vector
6033 /// of the SDNodes* in assigned order by reference.
6034 unsigned SelectionDAG::AssignTopologicalOrder() {
6036 unsigned DAGSize = 0;
6038 // SortedPos tracks the progress of the algorithm. Nodes before it are
6039 // sorted, nodes after it are unsorted. When the algorithm completes
6040 // it is at the end of the list.
6041 allnodes_iterator SortedPos = allnodes_begin();
6043 // Visit all the nodes. Move nodes with no operands to the front of
6044 // the list immediately. Annotate nodes that do have operands with their
6045 // operand count. Before we do this, the Node Id fields of the nodes
6046 // may contain arbitrary values. After, the Node Id fields for nodes
6047 // before SortedPos will contain the topological sort index, and the
6048 // Node Id fields for nodes At SortedPos and after will contain the
6049 // count of outstanding operands.
6050 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
6052 checkForCycles(N, this);
6053 unsigned Degree = N->getNumOperands();
6055 // A node with no uses, add it to the result array immediately.
6056 N->setNodeId(DAGSize++);
6057 allnodes_iterator Q = N;
6059 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
6060 assert(SortedPos != AllNodes.end() && "Overran node list");
6063 // Temporarily use the Node Id as scratch space for the degree count.
6064 N->setNodeId(Degree);
6068 // Visit all the nodes. As we iterate, move nodes into sorted order,
6069 // such that by the time the end is reached all nodes will be sorted.
6070 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
6072 checkForCycles(N, this);
6073 // N is in sorted position, so all its uses have one less operand
6074 // that needs to be sorted.
6075 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
6078 unsigned Degree = P->getNodeId();
6079 assert(Degree != 0 && "Invalid node degree");
6082 // All of P's operands are sorted, so P may sorted now.
6083 P->setNodeId(DAGSize++);
6085 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
6086 assert(SortedPos != AllNodes.end() && "Overran node list");
6089 // Update P's outstanding operand count.
6090 P->setNodeId(Degree);
6093 if (I == SortedPos) {
6096 dbgs() << "Overran sorted position:\n";
6097 S->dumprFull(this); dbgs() << "\n";
6098 dbgs() << "Checking if this is due to cycles\n";
6099 checkForCycles(this, true);
6101 llvm_unreachable(nullptr);
6105 assert(SortedPos == AllNodes.end() &&
6106 "Topological sort incomplete!");
6107 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
6108 "First node in topological sort is not the entry token!");
6109 assert(AllNodes.front().getNodeId() == 0 &&
6110 "First node in topological sort has non-zero id!");
6111 assert(AllNodes.front().getNumOperands() == 0 &&
6112 "First node in topological sort has operands!");
6113 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
6114 "Last node in topologic sort has unexpected id!");
6115 assert(AllNodes.back().use_empty() &&
6116 "Last node in topologic sort has users!");
6117 assert(DAGSize == allnodes_size() && "Node count mismatch!");
6121 /// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the
6122 /// value is produced by SD.
6123 void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) {
6124 DbgInfo->add(DB, SD, isParameter);
6126 SD->setHasDebugValue(true);
6129 /// TransferDbgValues - Transfer SDDbgValues.
6130 void SelectionDAG::TransferDbgValues(SDValue From, SDValue To) {
6131 if (From == To || !From.getNode()->getHasDebugValue())
6133 SDNode *FromNode = From.getNode();
6134 SDNode *ToNode = To.getNode();
6135 ArrayRef<SDDbgValue *> DVs = GetDbgValues(FromNode);
6136 SmallVector<SDDbgValue *, 2> ClonedDVs;
6137 for (ArrayRef<SDDbgValue *>::iterator I = DVs.begin(), E = DVs.end();
6139 SDDbgValue *Dbg = *I;
6140 if (Dbg->getKind() == SDDbgValue::SDNODE) {
6141 SDDbgValue *Clone = getDbgValue(Dbg->getMDPtr(), ToNode, To.getResNo(),
6143 Dbg->getOffset(), Dbg->getDebugLoc(),
6145 ClonedDVs.push_back(Clone);
6148 for (SmallVectorImpl<SDDbgValue *>::iterator I = ClonedDVs.begin(),
6149 E = ClonedDVs.end(); I != E; ++I)
6150 AddDbgValue(*I, ToNode, false);
6153 //===----------------------------------------------------------------------===//
6155 //===----------------------------------------------------------------------===//
6157 HandleSDNode::~HandleSDNode() {
6161 GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, unsigned Order,
6162 DebugLoc DL, const GlobalValue *GA,
6163 EVT VT, int64_t o, unsigned char TF)
6164 : SDNode(Opc, Order, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) {
6168 AddrSpaceCastSDNode::AddrSpaceCastSDNode(unsigned Order, DebugLoc dl, EVT VT,
6169 SDValue X, unsigned SrcAS,
6171 : UnarySDNode(ISD::ADDRSPACECAST, Order, dl, getSDVTList(VT), X),
6172 SrcAddrSpace(SrcAS), DestAddrSpace(DestAS) {}
6174 MemSDNode::MemSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs,
6175 EVT memvt, MachineMemOperand *mmo)
6176 : SDNode(Opc, Order, dl, VTs), MemoryVT(memvt), MMO(mmo) {
6177 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
6178 MMO->isNonTemporal(), MMO->isInvariant());
6179 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
6180 assert(isNonTemporal() == MMO->isNonTemporal() &&
6181 "Non-temporal encoding error!");
6182 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
6185 MemSDNode::MemSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs,
6186 ArrayRef<SDValue> Ops, EVT memvt, MachineMemOperand *mmo)
6187 : SDNode(Opc, Order, dl, VTs, Ops),
6188 MemoryVT(memvt), MMO(mmo) {
6189 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
6190 MMO->isNonTemporal(), MMO->isInvariant());
6191 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
6192 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
6195 /// Profile - Gather unique data for the node.
6197 void SDNode::Profile(FoldingSetNodeID &ID) const {
6198 AddNodeIDNode(ID, this);
6203 std::vector<EVT> VTs;
6206 VTs.reserve(MVT::LAST_VALUETYPE);
6207 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i)
6208 VTs.push_back(MVT((MVT::SimpleValueType)i));
6213 static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs;
6214 static ManagedStatic<EVTArray> SimpleVTArray;
6215 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
6217 /// getValueTypeList - Return a pointer to the specified value type.
6219 const EVT *SDNode::getValueTypeList(EVT VT) {
6220 if (VT.isExtended()) {
6221 sys::SmartScopedLock<true> Lock(*VTMutex);
6222 return &(*EVTs->insert(VT).first);
6224 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE &&
6225 "Value type out of range!");
6226 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy];
6230 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
6231 /// indicated value. This method ignores uses of other values defined by this
6233 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
6234 assert(Value < getNumValues() && "Bad value!");
6236 // TODO: Only iterate over uses of a given value of the node
6237 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
6238 if (UI.getUse().getResNo() == Value) {
6245 // Found exactly the right number of uses?
6250 /// hasAnyUseOfValue - Return true if there are any use of the indicated
6251 /// value. This method ignores uses of other values defined by this operation.
6252 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
6253 assert(Value < getNumValues() && "Bad value!");
6255 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
6256 if (UI.getUse().getResNo() == Value)
6263 /// isOnlyUserOf - Return true if this node is the only use of N.
6265 bool SDNode::isOnlyUserOf(SDNode *N) const {
6267 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
6278 /// isOperand - Return true if this node is an operand of N.
6280 bool SDValue::isOperandOf(SDNode *N) const {
6281 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6282 if (*this == N->getOperand(i))
6287 bool SDNode::isOperandOf(SDNode *N) const {
6288 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
6289 if (this == N->OperandList[i].getNode())
6294 /// reachesChainWithoutSideEffects - Return true if this operand (which must
6295 /// be a chain) reaches the specified operand without crossing any
6296 /// side-effecting instructions on any chain path. In practice, this looks
6297 /// through token factors and non-volatile loads. In order to remain efficient,
6298 /// this only looks a couple of nodes in, it does not do an exhaustive search.
6299 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
6300 unsigned Depth) const {
6301 if (*this == Dest) return true;
6303 // Don't search too deeply, we just want to be able to see through
6304 // TokenFactor's etc.
6305 if (Depth == 0) return false;
6307 // If this is a token factor, all inputs to the TF happen in parallel. If any
6308 // of the operands of the TF does not reach dest, then we cannot do the xform.
6309 if (getOpcode() == ISD::TokenFactor) {
6310 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
6311 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
6316 // Loads don't have side effects, look through them.
6317 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
6318 if (!Ld->isVolatile())
6319 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
6324 /// hasPredecessor - Return true if N is a predecessor of this node.
6325 /// N is either an operand of this node, or can be reached by recursively
6326 /// traversing up the operands.
6327 /// NOTE: This is an expensive method. Use it carefully.
6328 bool SDNode::hasPredecessor(const SDNode *N) const {
6329 SmallPtrSet<const SDNode *, 32> Visited;
6330 SmallVector<const SDNode *, 16> Worklist;
6331 return hasPredecessorHelper(N, Visited, Worklist);
6335 SDNode::hasPredecessorHelper(const SDNode *N,
6336 SmallPtrSet<const SDNode *, 32> &Visited,
6337 SmallVectorImpl<const SDNode *> &Worklist) const {
6338 if (Visited.empty()) {
6339 Worklist.push_back(this);
6341 // Take a look in the visited set. If we've already encountered this node
6342 // we needn't search further.
6343 if (Visited.count(N))
6347 // Haven't visited N yet. Continue the search.
6348 while (!Worklist.empty()) {
6349 const SDNode *M = Worklist.pop_back_val();
6350 for (unsigned i = 0, e = M->getNumOperands(); i != e; ++i) {
6351 SDNode *Op = M->getOperand(i).getNode();
6352 if (Visited.insert(Op))
6353 Worklist.push_back(Op);
6362 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
6363 assert(Num < NumOperands && "Invalid child # of SDNode!");
6364 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
6367 SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
6368 assert(N->getNumValues() == 1 &&
6369 "Can't unroll a vector with multiple results!");
6371 EVT VT = N->getValueType(0);
6372 unsigned NE = VT.getVectorNumElements();
6373 EVT EltVT = VT.getVectorElementType();
6376 SmallVector<SDValue, 8> Scalars;
6377 SmallVector<SDValue, 4> Operands(N->getNumOperands());
6379 // If ResNE is 0, fully unroll the vector op.
6382 else if (NE > ResNE)
6386 for (i= 0; i != NE; ++i) {
6387 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) {
6388 SDValue Operand = N->getOperand(j);
6389 EVT OperandVT = Operand.getValueType();
6390 if (OperandVT.isVector()) {
6391 // A vector operand; extract a single element.
6392 const TargetLowering *TLI = TM.getTargetLowering();
6393 EVT OperandEltVT = OperandVT.getVectorElementType();
6394 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl,
6397 getConstant(i, TLI->getVectorIdxTy()));
6399 // A scalar operand; just use it as is.
6400 Operands[j] = Operand;
6404 switch (N->getOpcode()) {
6406 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands));
6409 Scalars.push_back(getNode(ISD::SELECT, dl, EltVT, Operands));
6416 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0],
6417 getShiftAmountOperand(Operands[0].getValueType(),
6420 case ISD::SIGN_EXTEND_INREG:
6421 case ISD::FP_ROUND_INREG: {
6422 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType();
6423 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6425 getValueType(ExtVT)));
6430 for (; i < ResNE; ++i)
6431 Scalars.push_back(getUNDEF(EltVT));
6433 return getNode(ISD::BUILD_VECTOR, dl,
6434 EVT::getVectorVT(*getContext(), EltVT, ResNE), Scalars);
6438 /// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a
6439 /// location that is 'Dist' units away from the location that the 'Base' load
6440 /// is loading from.
6441 bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base,
6442 unsigned Bytes, int Dist) const {
6443 if (LD->getChain() != Base->getChain())
6445 EVT VT = LD->getValueType(0);
6446 if (VT.getSizeInBits() / 8 != Bytes)
6449 SDValue Loc = LD->getOperand(1);
6450 SDValue BaseLoc = Base->getOperand(1);
6451 if (Loc.getOpcode() == ISD::FrameIndex) {
6452 if (BaseLoc.getOpcode() != ISD::FrameIndex)
6454 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo();
6455 int FI = cast<FrameIndexSDNode>(Loc)->getIndex();
6456 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex();
6457 int FS = MFI->getObjectSize(FI);
6458 int BFS = MFI->getObjectSize(BFI);
6459 if (FS != BFS || FS != (int)Bytes) return false;
6460 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes);
6464 if (isBaseWithConstantOffset(Loc) && Loc.getOperand(0) == BaseLoc &&
6465 cast<ConstantSDNode>(Loc.getOperand(1))->getSExtValue() == Dist*Bytes)
6468 const GlobalValue *GV1 = nullptr;
6469 const GlobalValue *GV2 = nullptr;
6470 int64_t Offset1 = 0;
6471 int64_t Offset2 = 0;
6472 const TargetLowering *TLI = TM.getTargetLowering();
6473 bool isGA1 = TLI->isGAPlusOffset(Loc.getNode(), GV1, Offset1);
6474 bool isGA2 = TLI->isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2);
6475 if (isGA1 && isGA2 && GV1 == GV2)
6476 return Offset1 == (Offset2 + Dist*Bytes);
6481 /// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if
6482 /// it cannot be inferred.
6483 unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const {
6484 // If this is a GlobalAddress + cst, return the alignment.
6485 const GlobalValue *GV;
6486 int64_t GVOffset = 0;
6487 const TargetLowering *TLI = TM.getTargetLowering();
6488 if (TLI->isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) {
6489 unsigned PtrWidth = TLI->getPointerTypeSizeInBits(GV->getType());
6490 APInt KnownZero(PtrWidth, 0), KnownOne(PtrWidth, 0);
6491 llvm::computeKnownBits(const_cast<GlobalValue*>(GV), KnownZero, KnownOne,
6492 TLI->getDataLayout());
6493 unsigned AlignBits = KnownZero.countTrailingOnes();
6494 unsigned Align = AlignBits ? 1 << std::min(31U, AlignBits) : 0;
6496 return MinAlign(Align, GVOffset);
6499 // If this is a direct reference to a stack slot, use information about the
6500 // stack slot's alignment.
6501 int FrameIdx = 1 << 31;
6502 int64_t FrameOffset = 0;
6503 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) {
6504 FrameIdx = FI->getIndex();
6505 } else if (isBaseWithConstantOffset(Ptr) &&
6506 isa<FrameIndexSDNode>(Ptr.getOperand(0))) {
6508 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
6509 FrameOffset = Ptr.getConstantOperandVal(1);
6512 if (FrameIdx != (1 << 31)) {
6513 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo();
6514 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx),
6522 /// GetSplitDestVTs - Compute the VTs needed for the low/hi parts of a type
6523 /// which is split (or expanded) into two not necessarily identical pieces.
6524 std::pair<EVT, EVT> SelectionDAG::GetSplitDestVTs(const EVT &VT) const {
6525 // Currently all types are split in half.
6527 if (!VT.isVector()) {
6528 LoVT = HiVT = TLI->getTypeToTransformTo(*getContext(), VT);
6530 unsigned NumElements = VT.getVectorNumElements();
6531 assert(!(NumElements & 1) && "Splitting vector, but not in half!");
6532 LoVT = HiVT = EVT::getVectorVT(*getContext(), VT.getVectorElementType(),
6535 return std::make_pair(LoVT, HiVT);
6538 /// SplitVector - Split the vector with EXTRACT_SUBVECTOR and return the
6540 std::pair<SDValue, SDValue>
6541 SelectionDAG::SplitVector(const SDValue &N, const SDLoc &DL, const EVT &LoVT,
6543 assert(LoVT.getVectorNumElements() + HiVT.getVectorNumElements() <=
6544 N.getValueType().getVectorNumElements() &&
6545 "More vector elements requested than available!");
6547 Lo = getNode(ISD::EXTRACT_SUBVECTOR, DL, LoVT, N,
6548 getConstant(0, TLI->getVectorIdxTy()));
6549 Hi = getNode(ISD::EXTRACT_SUBVECTOR, DL, HiVT, N,
6550 getConstant(LoVT.getVectorNumElements(), TLI->getVectorIdxTy()));
6551 return std::make_pair(Lo, Hi);
6554 void SelectionDAG::ExtractVectorElements(SDValue Op,
6555 SmallVectorImpl<SDValue> &Args,
6556 unsigned Start, unsigned Count) {
6557 EVT VT = Op.getValueType();
6559 Count = VT.getVectorNumElements();
6561 EVT EltVT = VT.getVectorElementType();
6562 EVT IdxTy = TLI->getVectorIdxTy();
6564 for (unsigned i = Start, e = Start + Count; i != e; ++i) {
6565 Args.push_back(getNode(ISD::EXTRACT_VECTOR_ELT, SL, EltVT,
6566 Op, getConstant(i, IdxTy)));
6570 // getAddressSpace - Return the address space this GlobalAddress belongs to.
6571 unsigned GlobalAddressSDNode::getAddressSpace() const {
6572 return getGlobal()->getType()->getAddressSpace();
6576 Type *ConstantPoolSDNode::getType() const {
6577 if (isMachineConstantPoolEntry())
6578 return Val.MachineCPVal->getType();
6579 return Val.ConstVal->getType();
6582 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
6584 unsigned &SplatBitSize,
6586 unsigned MinSplatBits,
6587 bool isBigEndian) const {
6588 EVT VT = getValueType(0);
6589 assert(VT.isVector() && "Expected a vector type");
6590 unsigned sz = VT.getSizeInBits();
6591 if (MinSplatBits > sz)
6594 SplatValue = APInt(sz, 0);
6595 SplatUndef = APInt(sz, 0);
6597 // Get the bits. Bits with undefined values (when the corresponding element
6598 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
6599 // in SplatValue. If any of the values are not constant, give up and return
6601 unsigned int nOps = getNumOperands();
6602 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
6603 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
6605 for (unsigned j = 0; j < nOps; ++j) {
6606 unsigned i = isBigEndian ? nOps-1-j : j;
6607 SDValue OpVal = getOperand(i);
6608 unsigned BitPos = j * EltBitSize;
6610 if (OpVal.getOpcode() == ISD::UNDEF)
6611 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize);
6612 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
6613 SplatValue |= CN->getAPIntValue().zextOrTrunc(EltBitSize).
6614 zextOrTrunc(sz) << BitPos;
6615 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
6616 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
6621 // The build_vector is all constants or undefs. Find the smallest element
6622 // size that splats the vector.
6624 HasAnyUndefs = (SplatUndef != 0);
6627 unsigned HalfSize = sz / 2;
6628 APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize);
6629 APInt LowValue = SplatValue.trunc(HalfSize);
6630 APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize);
6631 APInt LowUndef = SplatUndef.trunc(HalfSize);
6633 // If the two halves do not match (ignoring undef bits), stop here.
6634 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
6635 MinSplatBits > HalfSize)
6638 SplatValue = HighValue | LowValue;
6639 SplatUndef = HighUndef & LowUndef;
6648 SDValue BuildVectorSDNode::getSplatValue(BitVector *UndefElements) const {
6649 if (UndefElements) {
6650 UndefElements->clear();
6651 UndefElements->resize(getNumOperands());
6654 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
6655 SDValue Op = getOperand(i);
6656 if (Op.getOpcode() == ISD::UNDEF) {
6658 (*UndefElements)[i] = true;
6659 } else if (!Splatted) {
6661 } else if (Splatted != Op) {
6667 assert(getOperand(0).getOpcode() == ISD::UNDEF &&
6668 "Can only have a splat without a constant for all undefs.");
6669 return getOperand(0);
6676 BuildVectorSDNode::getConstantSplatNode(BitVector *UndefElements) const {
6677 return dyn_cast_or_null<ConstantSDNode>(
6678 getSplatValue(UndefElements).getNode());
6682 BuildVectorSDNode::getConstantFPSplatNode(BitVector *UndefElements) const {
6683 return dyn_cast_or_null<ConstantFPSDNode>(
6684 getSplatValue(UndefElements).getNode());
6687 bool BuildVectorSDNode::isConstant() const {
6688 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
6689 unsigned Opc = getOperand(i).getOpcode();
6690 if (Opc != ISD::UNDEF && Opc != ISD::Constant && Opc != ISD::ConstantFP)
6696 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
6697 // Find the first non-undef value in the shuffle mask.
6699 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
6702 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
6704 // Make sure all remaining elements are either undef or the same as the first
6706 for (int Idx = Mask[i]; i != e; ++i)
6707 if (Mask[i] >= 0 && Mask[i] != Idx)
6713 static void checkForCyclesHelper(const SDNode *N,
6714 SmallPtrSet<const SDNode*, 32> &Visited,
6715 SmallPtrSet<const SDNode*, 32> &Checked,
6716 const llvm::SelectionDAG *DAG) {
6717 // If this node has already been checked, don't check it again.
6718 if (Checked.count(N))
6721 // If a node has already been visited on this depth-first walk, reject it as
6723 if (!Visited.insert(N)) {
6724 errs() << "Detected cycle in SelectionDAG\n";
6725 dbgs() << "Offending node:\n";
6726 N->dumprFull(DAG); dbgs() << "\n";
6730 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6731 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked, DAG);
6738 void llvm::checkForCycles(const llvm::SDNode *N,
6739 const llvm::SelectionDAG *DAG,
6747 assert(N && "Checking nonexistent SDNode");
6748 SmallPtrSet<const SDNode*, 32> visited;
6749 SmallPtrSet<const SDNode*, 32> checked;
6750 checkForCyclesHelper(N, visited, checked, DAG);
6755 void llvm::checkForCycles(const llvm::SelectionDAG *DAG, bool force) {
6756 checkForCycles(DAG->getRoot().getNode(), DAG, force);