1 //===------- LegalizeVectorTypes.cpp - Legalization of vector types -------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file performs vector type splitting and scalarization for LegalizeTypes.
11 // Scalarization is the act of changing a computation in an illegal one-element
12 // vector type to be a computation in its scalar element type. For example,
13 // implementing <1 x f32> arithmetic in a scalar f32 register. This is needed
14 // as a base case when scalarizing vector arithmetic like <4 x f32>, which
15 // eventually decomposes to scalars if the target doesn't support v4f32 or v2f32
17 // Splitting is the act of changing a computation in an invalid vector type to
18 // be a computation in two vectors of half the size. For example, implementing
19 // <128 x f32> operations in terms of two <64 x f32> operations.
21 //===----------------------------------------------------------------------===//
23 #include "LegalizeTypes.h"
24 #include "llvm/CodeGen/PseudoSourceValue.h"
25 #include "llvm/Target/TargetData.h"
26 #include "llvm/Support/ErrorHandling.h"
27 #include "llvm/Support/raw_ostream.h"
30 //===----------------------------------------------------------------------===//
31 // Result Vector Scalarization: <1 x ty> -> ty.
32 //===----------------------------------------------------------------------===//
34 void DAGTypeLegalizer::ScalarizeVectorResult(SDNode *N, unsigned ResNo) {
35 DEBUG(dbgs() << "Scalarize node result " << ResNo << ": ";
38 SDValue R = SDValue();
40 switch (N->getOpcode()) {
43 dbgs() << "ScalarizeVectorResult #" << ResNo << ": ";
47 llvm_unreachable("Do not know how to scalarize the result of this operator!");
49 case ISD::BIT_CONVERT: R = ScalarizeVecRes_BIT_CONVERT(N); break;
50 case ISD::BUILD_VECTOR: R = N->getOperand(0); break;
51 case ISD::CONVERT_RNDSAT: R = ScalarizeVecRes_CONVERT_RNDSAT(N); break;
52 case ISD::EXTRACT_SUBVECTOR: R = ScalarizeVecRes_EXTRACT_SUBVECTOR(N); break;
53 case ISD::FP_ROUND_INREG: R = ScalarizeVecRes_InregOp(N); break;
54 case ISD::FPOWI: R = ScalarizeVecRes_FPOWI(N); break;
55 case ISD::INSERT_VECTOR_ELT: R = ScalarizeVecRes_INSERT_VECTOR_ELT(N); break;
56 case ISD::LOAD: R = ScalarizeVecRes_LOAD(cast<LoadSDNode>(N));break;
57 case ISD::SCALAR_TO_VECTOR: R = ScalarizeVecRes_SCALAR_TO_VECTOR(N); break;
58 case ISD::SIGN_EXTEND_INREG: R = ScalarizeVecRes_InregOp(N); break;
59 case ISD::SELECT: R = ScalarizeVecRes_SELECT(N); break;
60 case ISD::SELECT_CC: R = ScalarizeVecRes_SELECT_CC(N); break;
61 case ISD::SETCC: R = ScalarizeVecRes_SETCC(N); break;
62 case ISD::UNDEF: R = ScalarizeVecRes_UNDEF(N); break;
63 case ISD::VECTOR_SHUFFLE: R = ScalarizeVecRes_VECTOR_SHUFFLE(N); break;
64 case ISD::VSETCC: R = ScalarizeVecRes_VSETCC(N); break;
84 case ISD::SIGN_EXTEND:
85 case ISD::ZERO_EXTEND:
87 R = ScalarizeVecRes_UnaryOp(N);
109 R = ScalarizeVecRes_BinOp(N);
113 // If R is null, the sub-method took care of registering the result.
115 SetScalarizedVector(SDValue(N, ResNo), R);
118 SDValue DAGTypeLegalizer::ScalarizeVecRes_BinOp(SDNode *N) {
119 SDValue LHS = GetScalarizedVector(N->getOperand(0));
120 SDValue RHS = GetScalarizedVector(N->getOperand(1));
121 return DAG.getNode(N->getOpcode(), N->getDebugLoc(),
122 LHS.getValueType(), LHS, RHS);
125 SDValue DAGTypeLegalizer::ScalarizeVecRes_BIT_CONVERT(SDNode *N) {
126 EVT NewVT = N->getValueType(0).getVectorElementType();
127 return DAG.getNode(ISD::BIT_CONVERT, N->getDebugLoc(),
128 NewVT, N->getOperand(0));
131 SDValue DAGTypeLegalizer::ScalarizeVecRes_CONVERT_RNDSAT(SDNode *N) {
132 EVT NewVT = N->getValueType(0).getVectorElementType();
133 SDValue Op0 = GetScalarizedVector(N->getOperand(0));
134 return DAG.getConvertRndSat(NewVT, N->getDebugLoc(),
135 Op0, DAG.getValueType(NewVT),
136 DAG.getValueType(Op0.getValueType()),
139 cast<CvtRndSatSDNode>(N)->getCvtCode());
142 SDValue DAGTypeLegalizer::ScalarizeVecRes_EXTRACT_SUBVECTOR(SDNode *N) {
143 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, N->getDebugLoc(),
144 N->getValueType(0).getVectorElementType(),
145 N->getOperand(0), N->getOperand(1));
148 SDValue DAGTypeLegalizer::ScalarizeVecRes_FPOWI(SDNode *N) {
149 SDValue Op = GetScalarizedVector(N->getOperand(0));
150 return DAG.getNode(ISD::FPOWI, N->getDebugLoc(),
151 Op.getValueType(), Op, N->getOperand(1));
154 SDValue DAGTypeLegalizer::ScalarizeVecRes_INSERT_VECTOR_ELT(SDNode *N) {
155 // The value to insert may have a wider type than the vector element type,
156 // so be sure to truncate it to the element type if necessary.
157 SDValue Op = N->getOperand(1);
158 EVT EltVT = N->getValueType(0).getVectorElementType();
159 if (Op.getValueType() != EltVT)
160 // FIXME: Can this happen for floating point types?
161 Op = DAG.getNode(ISD::TRUNCATE, N->getDebugLoc(), EltVT, Op);
165 SDValue DAGTypeLegalizer::ScalarizeVecRes_LOAD(LoadSDNode *N) {
166 assert(N->isUnindexed() && "Indexed vector load?");
168 SDValue Result = DAG.getLoad(ISD::UNINDEXED, N->getDebugLoc(),
169 N->getExtensionType(),
170 N->getValueType(0).getVectorElementType(),
171 N->getChain(), N->getBasePtr(),
172 DAG.getUNDEF(N->getBasePtr().getValueType()),
173 N->getSrcValue(), N->getSrcValueOffset(),
174 N->getMemoryVT().getVectorElementType(),
175 N->isVolatile(), N->isNonTemporal(),
176 N->getOriginalAlignment());
178 // Legalized the chain result - switch anything that used the old chain to
180 ReplaceValueWith(SDValue(N, 1), Result.getValue(1));
184 SDValue DAGTypeLegalizer::ScalarizeVecRes_UnaryOp(SDNode *N) {
185 // Get the dest type - it doesn't always match the input type, e.g. int_to_fp.
186 EVT DestVT = N->getValueType(0).getVectorElementType();
187 SDValue Op = GetScalarizedVector(N->getOperand(0));
188 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), DestVT, Op);
191 SDValue DAGTypeLegalizer::ScalarizeVecRes_InregOp(SDNode *N) {
192 EVT EltVT = N->getValueType(0).getVectorElementType();
193 EVT ExtVT = cast<VTSDNode>(N->getOperand(1))->getVT().getVectorElementType();
194 SDValue LHS = GetScalarizedVector(N->getOperand(0));
195 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), EltVT,
196 LHS, DAG.getValueType(ExtVT));
199 SDValue DAGTypeLegalizer::ScalarizeVecRes_SCALAR_TO_VECTOR(SDNode *N) {
200 // If the operand is wider than the vector element type then it is implicitly
201 // truncated. Make that explicit here.
202 EVT EltVT = N->getValueType(0).getVectorElementType();
203 SDValue InOp = N->getOperand(0);
204 if (InOp.getValueType() != EltVT)
205 return DAG.getNode(ISD::TRUNCATE, N->getDebugLoc(), EltVT, InOp);
209 SDValue DAGTypeLegalizer::ScalarizeVecRes_SELECT(SDNode *N) {
210 SDValue LHS = GetScalarizedVector(N->getOperand(1));
211 return DAG.getNode(ISD::SELECT, N->getDebugLoc(),
212 LHS.getValueType(), N->getOperand(0), LHS,
213 GetScalarizedVector(N->getOperand(2)));
216 SDValue DAGTypeLegalizer::ScalarizeVecRes_SELECT_CC(SDNode *N) {
217 SDValue LHS = GetScalarizedVector(N->getOperand(2));
218 return DAG.getNode(ISD::SELECT_CC, N->getDebugLoc(), LHS.getValueType(),
219 N->getOperand(0), N->getOperand(1),
220 LHS, GetScalarizedVector(N->getOperand(3)),
224 SDValue DAGTypeLegalizer::ScalarizeVecRes_SETCC(SDNode *N) {
225 SDValue LHS = GetScalarizedVector(N->getOperand(0));
226 SDValue RHS = GetScalarizedVector(N->getOperand(1));
227 DebugLoc DL = N->getDebugLoc();
229 // Turn it into a scalar SETCC.
230 return DAG.getNode(ISD::SETCC, DL, MVT::i1, LHS, RHS, N->getOperand(2));
233 SDValue DAGTypeLegalizer::ScalarizeVecRes_UNDEF(SDNode *N) {
234 return DAG.getUNDEF(N->getValueType(0).getVectorElementType());
237 SDValue DAGTypeLegalizer::ScalarizeVecRes_VECTOR_SHUFFLE(SDNode *N) {
238 // Figure out if the scalar is the LHS or RHS and return it.
239 SDValue Arg = N->getOperand(2).getOperand(0);
240 if (Arg.getOpcode() == ISD::UNDEF)
241 return DAG.getUNDEF(N->getValueType(0).getVectorElementType());
242 unsigned Op = !cast<ConstantSDNode>(Arg)->isNullValue();
243 return GetScalarizedVector(N->getOperand(Op));
246 SDValue DAGTypeLegalizer::ScalarizeVecRes_VSETCC(SDNode *N) {
247 SDValue LHS = GetScalarizedVector(N->getOperand(0));
248 SDValue RHS = GetScalarizedVector(N->getOperand(1));
249 EVT NVT = N->getValueType(0).getVectorElementType();
250 EVT SVT = TLI.getSetCCResultType(LHS.getValueType());
251 DebugLoc DL = N->getDebugLoc();
253 // Turn it into a scalar SETCC.
254 SDValue Res = DAG.getNode(ISD::SETCC, DL, SVT, LHS, RHS, N->getOperand(2));
256 // VSETCC always returns a sign-extended value, while SETCC may not. The
257 // SETCC result type may not match the vector element type. Correct these.
258 if (NVT.bitsLE(SVT)) {
259 // The SETCC result type is bigger than the vector element type.
260 // Ensure the SETCC result is sign-extended.
261 if (TLI.getBooleanContents() !=
262 TargetLowering::ZeroOrNegativeOneBooleanContent)
263 Res = DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, SVT, Res,
264 DAG.getValueType(MVT::i1));
265 // Truncate to the final type.
266 return DAG.getNode(ISD::TRUNCATE, DL, NVT, Res);
269 // The SETCC result type is smaller than the vector element type.
270 // If the SetCC result is not sign-extended, chop it down to MVT::i1.
271 if (TLI.getBooleanContents() !=
272 TargetLowering::ZeroOrNegativeOneBooleanContent)
273 Res = DAG.getNode(ISD::TRUNCATE, DL, MVT::i1, Res);
274 // Sign extend to the final type.
275 return DAG.getNode(ISD::SIGN_EXTEND, DL, NVT, Res);
279 //===----------------------------------------------------------------------===//
280 // Operand Vector Scalarization <1 x ty> -> ty.
281 //===----------------------------------------------------------------------===//
283 bool DAGTypeLegalizer::ScalarizeVectorOperand(SDNode *N, unsigned OpNo) {
284 DEBUG(dbgs() << "Scalarize node operand " << OpNo << ": ";
287 SDValue Res = SDValue();
289 if (Res.getNode() == 0) {
290 switch (N->getOpcode()) {
293 dbgs() << "ScalarizeVectorOperand Op #" << OpNo << ": ";
297 llvm_unreachable("Do not know how to scalarize this operator's operand!");
298 case ISD::BIT_CONVERT:
299 Res = ScalarizeVecOp_BIT_CONVERT(N);
301 case ISD::CONCAT_VECTORS:
302 Res = ScalarizeVecOp_CONCAT_VECTORS(N);
304 case ISD::EXTRACT_VECTOR_ELT:
305 Res = ScalarizeVecOp_EXTRACT_VECTOR_ELT(N);
308 Res = ScalarizeVecOp_STORE(cast<StoreSDNode>(N), OpNo);
313 // If the result is null, the sub-method took care of registering results etc.
314 if (!Res.getNode()) return false;
316 // If the result is N, the sub-method updated N in place. Tell the legalizer
318 if (Res.getNode() == N)
321 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
322 "Invalid operand expansion");
324 ReplaceValueWith(SDValue(N, 0), Res);
328 /// ScalarizeVecOp_BIT_CONVERT - If the value to convert is a vector that needs
329 /// to be scalarized, it must be <1 x ty>. Convert the element instead.
330 SDValue DAGTypeLegalizer::ScalarizeVecOp_BIT_CONVERT(SDNode *N) {
331 SDValue Elt = GetScalarizedVector(N->getOperand(0));
332 return DAG.getNode(ISD::BIT_CONVERT, N->getDebugLoc(),
333 N->getValueType(0), Elt);
336 /// ScalarizeVecOp_CONCAT_VECTORS - The vectors to concatenate have length one -
337 /// use a BUILD_VECTOR instead.
338 SDValue DAGTypeLegalizer::ScalarizeVecOp_CONCAT_VECTORS(SDNode *N) {
339 SmallVector<SDValue, 8> Ops(N->getNumOperands());
340 for (unsigned i = 0, e = N->getNumOperands(); i < e; ++i)
341 Ops[i] = GetScalarizedVector(N->getOperand(i));
342 return DAG.getNode(ISD::BUILD_VECTOR, N->getDebugLoc(), N->getValueType(0),
343 &Ops[0], Ops.size());
346 /// ScalarizeVecOp_EXTRACT_VECTOR_ELT - If the input is a vector that needs to
347 /// be scalarized, it must be <1 x ty>, so just return the element, ignoring the
349 SDValue DAGTypeLegalizer::ScalarizeVecOp_EXTRACT_VECTOR_ELT(SDNode *N) {
350 SDValue Res = GetScalarizedVector(N->getOperand(0));
351 if (Res.getValueType() != N->getValueType(0))
352 Res = DAG.getNode(ISD::ANY_EXTEND, N->getDebugLoc(), N->getValueType(0),
357 /// ScalarizeVecOp_STORE - If the value to store is a vector that needs to be
358 /// scalarized, it must be <1 x ty>. Just store the element.
359 SDValue DAGTypeLegalizer::ScalarizeVecOp_STORE(StoreSDNode *N, unsigned OpNo){
360 assert(N->isUnindexed() && "Indexed store of one-element vector?");
361 assert(OpNo == 1 && "Do not know how to scalarize this operand!");
362 DebugLoc dl = N->getDebugLoc();
364 if (N->isTruncatingStore())
365 return DAG.getTruncStore(N->getChain(), dl,
366 GetScalarizedVector(N->getOperand(1)),
368 N->getSrcValue(), N->getSrcValueOffset(),
369 N->getMemoryVT().getVectorElementType(),
370 N->isVolatile(), N->isNonTemporal(),
373 return DAG.getStore(N->getChain(), dl, GetScalarizedVector(N->getOperand(1)),
374 N->getBasePtr(), N->getSrcValue(), N->getSrcValueOffset(),
375 N->isVolatile(), N->isNonTemporal(),
376 N->getOriginalAlignment());
380 //===----------------------------------------------------------------------===//
381 // Result Vector Splitting
382 //===----------------------------------------------------------------------===//
384 /// SplitVectorResult - This method is called when the specified result of the
385 /// specified node is found to need vector splitting. At this point, the node
386 /// may also have invalid operands or may have other results that need
387 /// legalization, we just know that (at least) one result needs vector
389 void DAGTypeLegalizer::SplitVectorResult(SDNode *N, unsigned ResNo) {
390 DEBUG(dbgs() << "Split node result: ";
395 switch (N->getOpcode()) {
398 dbgs() << "SplitVectorResult #" << ResNo << ": ";
402 llvm_unreachable("Do not know how to split the result of this operator!");
404 case ISD::MERGE_VALUES: SplitRes_MERGE_VALUES(N, Lo, Hi); break;
405 case ISD::SELECT: SplitRes_SELECT(N, Lo, Hi); break;
406 case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break;
407 case ISD::UNDEF: SplitRes_UNDEF(N, Lo, Hi); break;
409 case ISD::BIT_CONVERT: SplitVecRes_BIT_CONVERT(N, Lo, Hi); break;
410 case ISD::BUILD_VECTOR: SplitVecRes_BUILD_VECTOR(N, Lo, Hi); break;
411 case ISD::CONCAT_VECTORS: SplitVecRes_CONCAT_VECTORS(N, Lo, Hi); break;
412 case ISD::CONVERT_RNDSAT: SplitVecRes_CONVERT_RNDSAT(N, Lo, Hi); break;
413 case ISD::EXTRACT_SUBVECTOR: SplitVecRes_EXTRACT_SUBVECTOR(N, Lo, Hi); break;
414 case ISD::FP_ROUND_INREG: SplitVecRes_InregOp(N, Lo, Hi); break;
415 case ISD::FPOWI: SplitVecRes_FPOWI(N, Lo, Hi); break;
416 case ISD::INSERT_VECTOR_ELT: SplitVecRes_INSERT_VECTOR_ELT(N, Lo, Hi); break;
417 case ISD::SCALAR_TO_VECTOR: SplitVecRes_SCALAR_TO_VECTOR(N, Lo, Hi); break;
418 case ISD::SIGN_EXTEND_INREG: SplitVecRes_InregOp(N, Lo, Hi); break;
420 SplitVecRes_LOAD(cast<LoadSDNode>(N), Lo, Hi);
424 SplitVecRes_SETCC(N, Lo, Hi);
426 case ISD::VECTOR_SHUFFLE:
427 SplitVecRes_VECTOR_SHUFFLE(cast<ShuffleVectorSDNode>(N), Lo, Hi);
442 case ISD::FNEARBYINT:
443 case ISD::FP_TO_SINT:
444 case ISD::FP_TO_UINT:
445 case ISD::SINT_TO_FP:
446 case ISD::UINT_TO_FP:
448 case ISD::SIGN_EXTEND:
449 case ISD::ZERO_EXTEND:
450 case ISD::ANY_EXTEND:
456 SplitVecRes_UnaryOp(N, Lo, Hi);
478 SplitVecRes_BinOp(N, Lo, Hi);
482 // If Lo/Hi is null, the sub-method took care of registering results etc.
484 SetSplitVector(SDValue(N, ResNo), Lo, Hi);
487 void DAGTypeLegalizer::SplitVecRes_BinOp(SDNode *N, SDValue &Lo,
489 SDValue LHSLo, LHSHi;
490 GetSplitVector(N->getOperand(0), LHSLo, LHSHi);
491 SDValue RHSLo, RHSHi;
492 GetSplitVector(N->getOperand(1), RHSLo, RHSHi);
493 DebugLoc dl = N->getDebugLoc();
495 Lo = DAG.getNode(N->getOpcode(), dl, LHSLo.getValueType(), LHSLo, RHSLo);
496 Hi = DAG.getNode(N->getOpcode(), dl, LHSHi.getValueType(), LHSHi, RHSHi);
499 void DAGTypeLegalizer::SplitVecRes_BIT_CONVERT(SDNode *N, SDValue &Lo,
501 // We know the result is a vector. The input may be either a vector or a
504 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
505 DebugLoc dl = N->getDebugLoc();
507 SDValue InOp = N->getOperand(0);
508 EVT InVT = InOp.getValueType();
510 // Handle some special cases efficiently.
511 switch (getTypeAction(InVT)) {
513 assert(false && "Unknown type action!");
517 case ScalarizeVector:
521 // A scalar to vector conversion, where the scalar needs expansion.
522 // If the vector is being split in two then we can just convert the
525 GetExpandedOp(InOp, Lo, Hi);
526 if (TLI.isBigEndian())
528 Lo = DAG.getNode(ISD::BIT_CONVERT, dl, LoVT, Lo);
529 Hi = DAG.getNode(ISD::BIT_CONVERT, dl, HiVT, Hi);
534 // If the input is a vector that needs to be split, convert each split
535 // piece of the input now.
536 GetSplitVector(InOp, Lo, Hi);
537 Lo = DAG.getNode(ISD::BIT_CONVERT, dl, LoVT, Lo);
538 Hi = DAG.getNode(ISD::BIT_CONVERT, dl, HiVT, Hi);
542 // In the general case, convert the input to an integer and split it by hand.
543 EVT LoIntVT = EVT::getIntegerVT(*DAG.getContext(), LoVT.getSizeInBits());
544 EVT HiIntVT = EVT::getIntegerVT(*DAG.getContext(), HiVT.getSizeInBits());
545 if (TLI.isBigEndian())
546 std::swap(LoIntVT, HiIntVT);
548 SplitInteger(BitConvertToInteger(InOp), LoIntVT, HiIntVT, Lo, Hi);
550 if (TLI.isBigEndian())
552 Lo = DAG.getNode(ISD::BIT_CONVERT, dl, LoVT, Lo);
553 Hi = DAG.getNode(ISD::BIT_CONVERT, dl, HiVT, Hi);
556 void DAGTypeLegalizer::SplitVecRes_BUILD_VECTOR(SDNode *N, SDValue &Lo,
559 DebugLoc dl = N->getDebugLoc();
560 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
561 unsigned LoNumElts = LoVT.getVectorNumElements();
562 SmallVector<SDValue, 8> LoOps(N->op_begin(), N->op_begin()+LoNumElts);
563 Lo = DAG.getNode(ISD::BUILD_VECTOR, dl, LoVT, &LoOps[0], LoOps.size());
565 SmallVector<SDValue, 8> HiOps(N->op_begin()+LoNumElts, N->op_end());
566 Hi = DAG.getNode(ISD::BUILD_VECTOR, dl, HiVT, &HiOps[0], HiOps.size());
569 void DAGTypeLegalizer::SplitVecRes_CONCAT_VECTORS(SDNode *N, SDValue &Lo,
571 assert(!(N->getNumOperands() & 1) && "Unsupported CONCAT_VECTORS");
572 DebugLoc dl = N->getDebugLoc();
573 unsigned NumSubvectors = N->getNumOperands() / 2;
574 if (NumSubvectors == 1) {
575 Lo = N->getOperand(0);
576 Hi = N->getOperand(1);
581 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
583 SmallVector<SDValue, 8> LoOps(N->op_begin(), N->op_begin()+NumSubvectors);
584 Lo = DAG.getNode(ISD::CONCAT_VECTORS, dl, LoVT, &LoOps[0], LoOps.size());
586 SmallVector<SDValue, 8> HiOps(N->op_begin()+NumSubvectors, N->op_end());
587 Hi = DAG.getNode(ISD::CONCAT_VECTORS, dl, HiVT, &HiOps[0], HiOps.size());
590 void DAGTypeLegalizer::SplitVecRes_CONVERT_RNDSAT(SDNode *N, SDValue &Lo,
593 DebugLoc dl = N->getDebugLoc();
594 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
596 SDValue DTyOpLo = DAG.getValueType(LoVT);
597 SDValue DTyOpHi = DAG.getValueType(HiVT);
599 SDValue RndOp = N->getOperand(3);
600 SDValue SatOp = N->getOperand(4);
601 ISD::CvtCode CvtCode = cast<CvtRndSatSDNode>(N)->getCvtCode();
605 EVT InVT = N->getOperand(0).getValueType();
606 switch (getTypeAction(InVT)) {
607 default: llvm_unreachable("Unexpected type action!");
609 EVT InNVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(),
610 LoVT.getVectorNumElements());
611 VLo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, N->getOperand(0),
612 DAG.getIntPtrConstant(0));
613 VHi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, N->getOperand(0),
614 DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
618 GetSplitVector(N->getOperand(0), VLo, VHi);
621 // If the result needs to be split and the input needs to be widened,
622 // the two types must have different lengths. Use the widened result
623 // and extract from it to do the split.
624 SDValue InOp = GetWidenedVector(N->getOperand(0));
625 EVT InNVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(),
626 LoVT.getVectorNumElements());
627 VLo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, InOp,
628 DAG.getIntPtrConstant(0));
629 VHi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, InOp,
630 DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
635 SDValue STyOpLo = DAG.getValueType(VLo.getValueType());
636 SDValue STyOpHi = DAG.getValueType(VHi.getValueType());
638 Lo = DAG.getConvertRndSat(LoVT, dl, VLo, DTyOpLo, STyOpLo, RndOp, SatOp,
640 Hi = DAG.getConvertRndSat(HiVT, dl, VHi, DTyOpHi, STyOpHi, RndOp, SatOp,
644 void DAGTypeLegalizer::SplitVecRes_EXTRACT_SUBVECTOR(SDNode *N, SDValue &Lo,
646 SDValue Vec = N->getOperand(0);
647 SDValue Idx = N->getOperand(1);
648 EVT IdxVT = Idx.getValueType();
649 DebugLoc dl = N->getDebugLoc();
652 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
654 Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, LoVT, Vec, Idx);
655 Idx = DAG.getNode(ISD::ADD, dl, IdxVT, Idx,
656 DAG.getConstant(LoVT.getVectorNumElements(), IdxVT));
657 Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, HiVT, Vec, Idx);
660 void DAGTypeLegalizer::SplitVecRes_FPOWI(SDNode *N, SDValue &Lo,
662 DebugLoc dl = N->getDebugLoc();
663 GetSplitVector(N->getOperand(0), Lo, Hi);
664 Lo = DAG.getNode(ISD::FPOWI, dl, Lo.getValueType(), Lo, N->getOperand(1));
665 Hi = DAG.getNode(ISD::FPOWI, dl, Hi.getValueType(), Hi, N->getOperand(1));
668 void DAGTypeLegalizer::SplitVecRes_InregOp(SDNode *N, SDValue &Lo,
670 SDValue LHSLo, LHSHi;
671 GetSplitVector(N->getOperand(0), LHSLo, LHSHi);
672 DebugLoc dl = N->getDebugLoc();
675 GetSplitDestVTs(cast<VTSDNode>(N->getOperand(1))->getVT(), LoVT, HiVT);
677 Lo = DAG.getNode(N->getOpcode(), dl, LHSLo.getValueType(), LHSLo,
678 DAG.getValueType(LoVT));
679 Hi = DAG.getNode(N->getOpcode(), dl, LHSHi.getValueType(), LHSHi,
680 DAG.getValueType(HiVT));
683 void DAGTypeLegalizer::SplitVecRes_INSERT_VECTOR_ELT(SDNode *N, SDValue &Lo,
685 SDValue Vec = N->getOperand(0);
686 SDValue Elt = N->getOperand(1);
687 SDValue Idx = N->getOperand(2);
688 DebugLoc dl = N->getDebugLoc();
689 GetSplitVector(Vec, Lo, Hi);
691 if (ConstantSDNode *CIdx = dyn_cast<ConstantSDNode>(Idx)) {
692 unsigned IdxVal = CIdx->getZExtValue();
693 unsigned LoNumElts = Lo.getValueType().getVectorNumElements();
694 if (IdxVal < LoNumElts)
695 Lo = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl,
696 Lo.getValueType(), Lo, Elt, Idx);
698 Hi = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, Hi.getValueType(), Hi, Elt,
699 DAG.getIntPtrConstant(IdxVal - LoNumElts));
703 // Spill the vector to the stack.
704 EVT VecVT = Vec.getValueType();
705 EVT EltVT = VecVT.getVectorElementType();
706 SDValue StackPtr = DAG.CreateStackTemporary(VecVT);
707 SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, Vec, StackPtr, NULL, 0,
710 // Store the new element. This may be larger than the vector element type,
711 // so use a truncating store.
712 SDValue EltPtr = GetVectorElementPointer(StackPtr, EltVT, Idx);
713 const Type *VecType = VecVT.getTypeForEVT(*DAG.getContext());
715 TLI.getTargetData()->getPrefTypeAlignment(VecType);
716 Store = DAG.getTruncStore(Store, dl, Elt, EltPtr, NULL, 0, EltVT,
719 // Load the Lo part from the stack slot.
720 Lo = DAG.getLoad(Lo.getValueType(), dl, Store, StackPtr, NULL, 0,
723 // Increment the pointer to the other part.
724 unsigned IncrementSize = Lo.getValueType().getSizeInBits() / 8;
725 StackPtr = DAG.getNode(ISD::ADD, dl, StackPtr.getValueType(), StackPtr,
726 DAG.getIntPtrConstant(IncrementSize));
728 // Load the Hi part from the stack slot.
729 Hi = DAG.getLoad(Hi.getValueType(), dl, Store, StackPtr, NULL, 0, false,
730 false, MinAlign(Alignment, IncrementSize));
733 void DAGTypeLegalizer::SplitVecRes_SCALAR_TO_VECTOR(SDNode *N, SDValue &Lo,
736 DebugLoc dl = N->getDebugLoc();
737 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
738 Lo = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, LoVT, N->getOperand(0));
739 Hi = DAG.getUNDEF(HiVT);
742 void DAGTypeLegalizer::SplitVecRes_LOAD(LoadSDNode *LD, SDValue &Lo,
744 assert(ISD::isUNINDEXEDLoad(LD) && "Indexed load during type legalization!");
746 DebugLoc dl = LD->getDebugLoc();
747 GetSplitDestVTs(LD->getValueType(0), LoVT, HiVT);
749 ISD::LoadExtType ExtType = LD->getExtensionType();
750 SDValue Ch = LD->getChain();
751 SDValue Ptr = LD->getBasePtr();
752 SDValue Offset = DAG.getUNDEF(Ptr.getValueType());
753 const Value *SV = LD->getSrcValue();
754 int SVOffset = LD->getSrcValueOffset();
755 EVT MemoryVT = LD->getMemoryVT();
756 unsigned Alignment = LD->getOriginalAlignment();
757 bool isVolatile = LD->isVolatile();
758 bool isNonTemporal = LD->isNonTemporal();
760 EVT LoMemVT, HiMemVT;
761 GetSplitDestVTs(MemoryVT, LoMemVT, HiMemVT);
763 Lo = DAG.getLoad(ISD::UNINDEXED, dl, ExtType, LoVT, Ch, Ptr, Offset,
764 SV, SVOffset, LoMemVT, isVolatile, isNonTemporal, Alignment);
766 unsigned IncrementSize = LoMemVT.getSizeInBits()/8;
767 Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr,
768 DAG.getIntPtrConstant(IncrementSize));
769 SVOffset += IncrementSize;
770 Hi = DAG.getLoad(ISD::UNINDEXED, dl, ExtType, HiVT, Ch, Ptr, Offset,
771 SV, SVOffset, HiMemVT, isVolatile, isNonTemporal, Alignment);
773 // Build a factor node to remember that this load is independent of the
775 Ch = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Lo.getValue(1),
778 // Legalized the chain result - switch anything that used the old chain to
780 ReplaceValueWith(SDValue(LD, 1), Ch);
783 void DAGTypeLegalizer::SplitVecRes_SETCC(SDNode *N, SDValue &Lo, SDValue &Hi) {
785 DebugLoc DL = N->getDebugLoc();
786 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
789 EVT InVT = N->getOperand(0).getValueType();
790 SDValue LL, LH, RL, RH;
791 EVT InNVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(),
792 LoVT.getVectorNumElements());
793 LL = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(0),
794 DAG.getIntPtrConstant(0));
795 LH = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(0),
796 DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
798 RL = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(1),
799 DAG.getIntPtrConstant(0));
800 RH = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(1),
801 DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
803 Lo = DAG.getNode(N->getOpcode(), DL, LoVT, LL, RL, N->getOperand(2));
804 Hi = DAG.getNode(N->getOpcode(), DL, HiVT, LH, RH, N->getOperand(2));
807 void DAGTypeLegalizer::SplitVecRes_UnaryOp(SDNode *N, SDValue &Lo,
809 // Get the dest types - they may not match the input types, e.g. int_to_fp.
811 DebugLoc dl = N->getDebugLoc();
812 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
815 EVT InVT = N->getOperand(0).getValueType();
816 switch (getTypeAction(InVT)) {
817 default: llvm_unreachable("Unexpected type action!");
819 EVT InNVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(),
820 LoVT.getVectorNumElements());
821 Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, N->getOperand(0),
822 DAG.getIntPtrConstant(0));
823 Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, N->getOperand(0),
824 DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
828 GetSplitVector(N->getOperand(0), Lo, Hi);
831 // If the result needs to be split and the input needs to be widened,
832 // the two types must have different lengths. Use the widened result
833 // and extract from it to do the split.
834 SDValue InOp = GetWidenedVector(N->getOperand(0));
835 EVT InNVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(),
836 LoVT.getVectorNumElements());
837 Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, InOp,
838 DAG.getIntPtrConstant(0));
839 Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, InOp,
840 DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
845 Lo = DAG.getNode(N->getOpcode(), dl, LoVT, Lo);
846 Hi = DAG.getNode(N->getOpcode(), dl, HiVT, Hi);
849 void DAGTypeLegalizer::SplitVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N,
850 SDValue &Lo, SDValue &Hi) {
851 // The low and high parts of the original input give four input vectors.
853 DebugLoc dl = N->getDebugLoc();
854 GetSplitVector(N->getOperand(0), Inputs[0], Inputs[1]);
855 GetSplitVector(N->getOperand(1), Inputs[2], Inputs[3]);
856 EVT NewVT = Inputs[0].getValueType();
857 unsigned NewElts = NewVT.getVectorNumElements();
859 // If Lo or Hi uses elements from at most two of the four input vectors, then
860 // express it as a vector shuffle of those two inputs. Otherwise extract the
861 // input elements by hand and construct the Lo/Hi output using a BUILD_VECTOR.
862 SmallVector<int, 16> Ops;
863 for (unsigned High = 0; High < 2; ++High) {
864 SDValue &Output = High ? Hi : Lo;
866 // Build a shuffle mask for the output, discovering on the fly which
867 // input vectors to use as shuffle operands (recorded in InputUsed).
868 // If building a suitable shuffle vector proves too hard, then bail
869 // out with useBuildVector set.
870 unsigned InputUsed[2] = { -1U, -1U }; // Not yet discovered.
871 unsigned FirstMaskIdx = High * NewElts;
872 bool useBuildVector = false;
873 for (unsigned MaskOffset = 0; MaskOffset < NewElts; ++MaskOffset) {
874 // The mask element. This indexes into the input.
875 int Idx = N->getMaskElt(FirstMaskIdx + MaskOffset);
877 // The input vector this mask element indexes into.
878 unsigned Input = (unsigned)Idx / NewElts;
880 if (Input >= array_lengthof(Inputs)) {
881 // The mask element does not index into any input vector.
886 // Turn the index into an offset from the start of the input vector.
887 Idx -= Input * NewElts;
889 // Find or create a shuffle vector operand to hold this input.
891 for (OpNo = 0; OpNo < array_lengthof(InputUsed); ++OpNo) {
892 if (InputUsed[OpNo] == Input) {
893 // This input vector is already an operand.
895 } else if (InputUsed[OpNo] == -1U) {
896 // Create a new operand for this input vector.
897 InputUsed[OpNo] = Input;
902 if (OpNo >= array_lengthof(InputUsed)) {
903 // More than two input vectors used! Give up on trying to create a
904 // shuffle vector. Insert all elements into a BUILD_VECTOR instead.
905 useBuildVector = true;
909 // Add the mask index for the new shuffle vector.
910 Ops.push_back(Idx + OpNo * NewElts);
913 if (useBuildVector) {
914 EVT EltVT = NewVT.getVectorElementType();
915 SmallVector<SDValue, 16> SVOps;
917 // Extract the input elements by hand.
918 for (unsigned MaskOffset = 0; MaskOffset < NewElts; ++MaskOffset) {
919 // The mask element. This indexes into the input.
920 int Idx = N->getMaskElt(FirstMaskIdx + MaskOffset);
922 // The input vector this mask element indexes into.
923 unsigned Input = (unsigned)Idx / NewElts;
925 if (Input >= array_lengthof(Inputs)) {
926 // The mask element is "undef" or indexes off the end of the input.
927 SVOps.push_back(DAG.getUNDEF(EltVT));
931 // Turn the index into an offset from the start of the input vector.
932 Idx -= Input * NewElts;
934 // Extract the vector element by hand.
935 SVOps.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT,
936 Inputs[Input], DAG.getIntPtrConstant(Idx)));
939 // Construct the Lo/Hi output using a BUILD_VECTOR.
940 Output = DAG.getNode(ISD::BUILD_VECTOR,dl,NewVT, &SVOps[0], SVOps.size());
941 } else if (InputUsed[0] == -1U) {
942 // No input vectors were used! The result is undefined.
943 Output = DAG.getUNDEF(NewVT);
945 SDValue Op0 = Inputs[InputUsed[0]];
946 // If only one input was used, use an undefined vector for the other.
947 SDValue Op1 = InputUsed[1] == -1U ?
948 DAG.getUNDEF(NewVT) : Inputs[InputUsed[1]];
949 // At least one input vector was used. Create a new shuffle vector.
950 Output = DAG.getVectorShuffle(NewVT, dl, Op0, Op1, &Ops[0]);
958 //===----------------------------------------------------------------------===//
959 // Operand Vector Splitting
960 //===----------------------------------------------------------------------===//
962 /// SplitVectorOperand - This method is called when the specified operand of the
963 /// specified node is found to need vector splitting. At this point, all of the
964 /// result types of the node are known to be legal, but other operands of the
965 /// node may need legalization as well as the specified one.
966 bool DAGTypeLegalizer::SplitVectorOperand(SDNode *N, unsigned OpNo) {
967 DEBUG(dbgs() << "Split node operand: ";
970 SDValue Res = SDValue();
972 if (Res.getNode() == 0) {
973 switch (N->getOpcode()) {
976 dbgs() << "SplitVectorOperand Op #" << OpNo << ": ";
980 llvm_unreachable("Do not know how to split this operator's operand!");
982 case ISD::BIT_CONVERT: Res = SplitVecOp_BIT_CONVERT(N); break;
983 case ISD::EXTRACT_SUBVECTOR: Res = SplitVecOp_EXTRACT_SUBVECTOR(N); break;
984 case ISD::EXTRACT_VECTOR_ELT:Res = SplitVecOp_EXTRACT_VECTOR_ELT(N); break;
986 Res = SplitVecOp_STORE(cast<StoreSDNode>(N), OpNo);
992 case ISD::FP_TO_SINT:
993 case ISD::FP_TO_UINT:
994 case ISD::SINT_TO_FP:
995 case ISD::UINT_TO_FP:
997 case ISD::SIGN_EXTEND:
998 case ISD::ZERO_EXTEND:
999 case ISD::ANY_EXTEND:
1000 Res = SplitVecOp_UnaryOp(N);
1005 // If the result is null, the sub-method took care of registering results etc.
1006 if (!Res.getNode()) return false;
1008 // If the result is N, the sub-method updated N in place. Tell the legalizer
1010 if (Res.getNode() == N)
1013 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
1014 "Invalid operand expansion");
1016 ReplaceValueWith(SDValue(N, 0), Res);
1020 SDValue DAGTypeLegalizer::SplitVecOp_UnaryOp(SDNode *N) {
1021 // The result has a legal vector type, but the input needs splitting.
1022 EVT ResVT = N->getValueType(0);
1024 DebugLoc dl = N->getDebugLoc();
1025 GetSplitVector(N->getOperand(0), Lo, Hi);
1026 EVT InVT = Lo.getValueType();
1028 EVT OutVT = EVT::getVectorVT(*DAG.getContext(), ResVT.getVectorElementType(),
1029 InVT.getVectorNumElements());
1031 Lo = DAG.getNode(N->getOpcode(), dl, OutVT, Lo);
1032 Hi = DAG.getNode(N->getOpcode(), dl, OutVT, Hi);
1034 return DAG.getNode(ISD::CONCAT_VECTORS, dl, ResVT, Lo, Hi);
1037 SDValue DAGTypeLegalizer::SplitVecOp_BIT_CONVERT(SDNode *N) {
1038 // For example, i64 = BIT_CONVERT v4i16 on alpha. Typically the vector will
1039 // end up being split all the way down to individual components. Convert the
1040 // split pieces into integers and reassemble.
1042 GetSplitVector(N->getOperand(0), Lo, Hi);
1043 Lo = BitConvertToInteger(Lo);
1044 Hi = BitConvertToInteger(Hi);
1046 if (TLI.isBigEndian())
1049 return DAG.getNode(ISD::BIT_CONVERT, N->getDebugLoc(), N->getValueType(0),
1050 JoinIntegers(Lo, Hi));
1053 SDValue DAGTypeLegalizer::SplitVecOp_EXTRACT_SUBVECTOR(SDNode *N) {
1054 // We know that the extracted result type is legal. For now, assume the index
1056 EVT SubVT = N->getValueType(0);
1057 SDValue Idx = N->getOperand(1);
1058 DebugLoc dl = N->getDebugLoc();
1060 GetSplitVector(N->getOperand(0), Lo, Hi);
1062 uint64_t LoElts = Lo.getValueType().getVectorNumElements();
1063 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
1065 if (IdxVal < LoElts) {
1066 assert(IdxVal + SubVT.getVectorNumElements() <= LoElts &&
1067 "Extracted subvector crosses vector split!");
1068 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, SubVT, Lo, Idx);
1070 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, SubVT, Hi,
1071 DAG.getConstant(IdxVal - LoElts, Idx.getValueType()));
1075 SDValue DAGTypeLegalizer::SplitVecOp_EXTRACT_VECTOR_ELT(SDNode *N) {
1076 SDValue Vec = N->getOperand(0);
1077 SDValue Idx = N->getOperand(1);
1078 EVT VecVT = Vec.getValueType();
1080 if (isa<ConstantSDNode>(Idx)) {
1081 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
1082 assert(IdxVal < VecVT.getVectorNumElements() && "Invalid vector index!");
1085 GetSplitVector(Vec, Lo, Hi);
1087 uint64_t LoElts = Lo.getValueType().getVectorNumElements();
1089 if (IdxVal < LoElts)
1090 return DAG.UpdateNodeOperands(SDValue(N, 0), Lo, Idx);
1091 return DAG.UpdateNodeOperands(SDValue(N, 0), Hi,
1092 DAG.getConstant(IdxVal - LoElts,
1093 Idx.getValueType()));
1096 // Store the vector to the stack.
1097 EVT EltVT = VecVT.getVectorElementType();
1098 DebugLoc dl = N->getDebugLoc();
1099 SDValue StackPtr = DAG.CreateStackTemporary(VecVT);
1100 int SPFI = cast<FrameIndexSDNode>(StackPtr.getNode())->getIndex();
1101 const Value *SV = PseudoSourceValue::getFixedStack(SPFI);
1102 SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, Vec, StackPtr, SV, 0,
1105 // Load back the required element.
1106 StackPtr = GetVectorElementPointer(StackPtr, EltVT, Idx);
1107 return DAG.getExtLoad(ISD::EXTLOAD, dl, N->getValueType(0), Store, StackPtr,
1108 SV, 0, EltVT, false, false, 0);
1111 SDValue DAGTypeLegalizer::SplitVecOp_STORE(StoreSDNode *N, unsigned OpNo) {
1112 assert(N->isUnindexed() && "Indexed store of vector?");
1113 assert(OpNo == 1 && "Can only split the stored value");
1114 DebugLoc dl = N->getDebugLoc();
1116 bool isTruncating = N->isTruncatingStore();
1117 SDValue Ch = N->getChain();
1118 SDValue Ptr = N->getBasePtr();
1119 int SVOffset = N->getSrcValueOffset();
1120 EVT MemoryVT = N->getMemoryVT();
1121 unsigned Alignment = N->getOriginalAlignment();
1122 bool isVol = N->isVolatile();
1123 bool isNT = N->isNonTemporal();
1125 GetSplitVector(N->getOperand(1), Lo, Hi);
1127 EVT LoMemVT, HiMemVT;
1128 GetSplitDestVTs(MemoryVT, LoMemVT, HiMemVT);
1130 unsigned IncrementSize = LoMemVT.getSizeInBits()/8;
1133 Lo = DAG.getTruncStore(Ch, dl, Lo, Ptr, N->getSrcValue(), SVOffset,
1134 LoMemVT, isVol, isNT, Alignment);
1136 Lo = DAG.getStore(Ch, dl, Lo, Ptr, N->getSrcValue(), SVOffset,
1137 isVol, isNT, Alignment);
1139 // Increment the pointer to the other half.
1140 Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr,
1141 DAG.getIntPtrConstant(IncrementSize));
1142 SVOffset += IncrementSize;
1145 Hi = DAG.getTruncStore(Ch, dl, Hi, Ptr, N->getSrcValue(), SVOffset,
1146 HiMemVT, isVol, isNT, Alignment);
1148 Hi = DAG.getStore(Ch, dl, Hi, Ptr, N->getSrcValue(), SVOffset,
1149 isVol, isNT, Alignment);
1151 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Lo, Hi);
1155 //===----------------------------------------------------------------------===//
1156 // Result Vector Widening
1157 //===----------------------------------------------------------------------===//
1159 void DAGTypeLegalizer::WidenVectorResult(SDNode *N, unsigned ResNo) {
1160 DEBUG(dbgs() << "Widen node result " << ResNo << ": ";
1164 // See if the target wants to custom widen this node.
1165 if (CustomWidenLowerNode(N, N->getValueType(ResNo)))
1168 SDValue Res = SDValue();
1169 switch (N->getOpcode()) {
1172 dbgs() << "WidenVectorResult #" << ResNo << ": ";
1176 llvm_unreachable("Do not know how to widen the result of this operator!");
1178 case ISD::BIT_CONVERT: Res = WidenVecRes_BIT_CONVERT(N); break;
1179 case ISD::BUILD_VECTOR: Res = WidenVecRes_BUILD_VECTOR(N); break;
1180 case ISD::CONCAT_VECTORS: Res = WidenVecRes_CONCAT_VECTORS(N); break;
1181 case ISD::CONVERT_RNDSAT: Res = WidenVecRes_CONVERT_RNDSAT(N); break;
1182 case ISD::EXTRACT_SUBVECTOR: Res = WidenVecRes_EXTRACT_SUBVECTOR(N); break;
1183 case ISD::FP_ROUND_INREG: Res = WidenVecRes_InregOp(N); break;
1184 case ISD::INSERT_VECTOR_ELT: Res = WidenVecRes_INSERT_VECTOR_ELT(N); break;
1185 case ISD::LOAD: Res = WidenVecRes_LOAD(N); break;
1186 case ISD::SCALAR_TO_VECTOR: Res = WidenVecRes_SCALAR_TO_VECTOR(N); break;
1187 case ISD::SIGN_EXTEND_INREG: Res = WidenVecRes_InregOp(N); break;
1188 case ISD::SELECT: Res = WidenVecRes_SELECT(N); break;
1189 case ISD::SELECT_CC: Res = WidenVecRes_SELECT_CC(N); break;
1190 case ISD::SETCC: Res = WidenVecRes_SETCC(N); break;
1191 case ISD::UNDEF: Res = WidenVecRes_UNDEF(N); break;
1192 case ISD::VECTOR_SHUFFLE:
1193 Res = WidenVecRes_VECTOR_SHUFFLE(cast<ShuffleVectorSDNode>(N));
1196 Res = WidenVecRes_VSETCC(N);
1203 case ISD::FCOPYSIGN:
1219 Res = WidenVecRes_Binary(N);
1223 Res = WidenVecRes_POWI(N);
1229 Res = WidenVecRes_Shift(N);
1233 case ISD::FP_TO_SINT:
1234 case ISD::FP_TO_UINT:
1235 case ISD::SINT_TO_FP:
1236 case ISD::UINT_TO_FP:
1238 case ISD::SIGN_EXTEND:
1239 case ISD::ZERO_EXTEND:
1240 case ISD::ANY_EXTEND:
1241 Res = WidenVecRes_Convert(N);
1257 Res = WidenVecRes_Unary(N);
1261 // If Res is null, the sub-method took care of registering the result.
1263 SetWidenedVector(SDValue(N, ResNo), Res);
1266 SDValue DAGTypeLegalizer::WidenVecRes_Binary(SDNode *N) {
1267 // Binary op widening.
1268 unsigned Opcode = N->getOpcode();
1269 DebugLoc dl = N->getDebugLoc();
1270 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1271 EVT WidenEltVT = WidenVT.getVectorElementType();
1273 unsigned NumElts = VT.getVectorNumElements();
1274 while (!TLI.isTypeSynthesizable(VT) && NumElts != 1) {
1275 NumElts = NumElts / 2;
1276 VT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NumElts);
1279 if (NumElts != 1 && !TLI.canOpTrap(N->getOpcode(), VT)) {
1280 // Operation doesn't trap so just widen as normal.
1281 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
1282 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1283 return DAG.getNode(N->getOpcode(), dl, WidenVT, InOp1, InOp2);
1284 } else if (NumElts == 1) {
1285 // No legal vector version so unroll the vector operation and then widen.
1286 return DAG.UnrollVectorOp(N, WidenVT.getVectorNumElements());
1288 // Since the operation can trap, apply operation on the original vector.
1290 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
1291 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1292 unsigned CurNumElts = N->getValueType(0).getVectorNumElements();
1294 SmallVector<SDValue, 16> ConcatOps(CurNumElts);
1295 unsigned ConcatEnd = 0; // Current ConcatOps index.
1296 int Idx = 0; // Current Idx into input vectors.
1298 // NumElts := greatest synthesizable vector size (at most WidenVT)
1299 // while (orig. vector has unhandled elements) {
1300 // take munches of size NumElts from the beginning and add to ConcatOps
1301 // NumElts := next smaller supported vector size or 1
1303 while (CurNumElts != 0) {
1304 while (CurNumElts >= NumElts) {
1305 SDValue EOp1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, InOp1,
1306 DAG.getIntPtrConstant(Idx));
1307 SDValue EOp2 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, InOp2,
1308 DAG.getIntPtrConstant(Idx));
1309 ConcatOps[ConcatEnd++] = DAG.getNode(Opcode, dl, VT, EOp1, EOp2);
1311 CurNumElts -= NumElts;
1314 NumElts = NumElts / 2;
1315 VT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NumElts);
1316 } while (!TLI.isTypeSynthesizable(VT) && NumElts != 1);
1319 for (unsigned i = 0; i != CurNumElts; ++i, ++Idx) {
1320 SDValue EOp1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, WidenEltVT,
1321 InOp1, DAG.getIntPtrConstant(Idx));
1322 SDValue EOp2 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, WidenEltVT,
1323 InOp2, DAG.getIntPtrConstant(Idx));
1324 ConcatOps[ConcatEnd++] = DAG.getNode(Opcode, dl, WidenEltVT,
1331 // Check to see if we have a single operation with the widen type.
1332 if (ConcatEnd == 1) {
1333 VT = ConcatOps[0].getValueType();
1335 return ConcatOps[0];
1338 // while (Some element of ConcatOps is not of type MaxVT) {
1339 // From the end of ConcatOps, collect elements of the same type and put
1340 // them into an op of the next larger supported type
1342 while (ConcatOps[ConcatEnd-1].getValueType() != MaxVT) {
1343 Idx = ConcatEnd - 1;
1344 VT = ConcatOps[Idx--].getValueType();
1345 while (Idx >= 0 && ConcatOps[Idx].getValueType() == VT)
1348 int NextSize = VT.isVector() ? VT.getVectorNumElements() : 1;
1352 NextVT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NextSize);
1353 } while (!TLI.isTypeSynthesizable(NextVT));
1355 if (!VT.isVector()) {
1356 // Scalar type, create an INSERT_VECTOR_ELEMENT of type NextVT
1357 SDValue VecOp = DAG.getUNDEF(NextVT);
1358 unsigned NumToInsert = ConcatEnd - Idx - 1;
1359 for (unsigned i = 0, OpIdx = Idx+1; i < NumToInsert; i++, OpIdx++) {
1360 VecOp = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NextVT, VecOp,
1361 ConcatOps[OpIdx], DAG.getIntPtrConstant(i));
1363 ConcatOps[Idx+1] = VecOp;
1364 ConcatEnd = Idx + 2;
1367 // Vector type, create a CONCAT_VECTORS of type NextVT
1368 SDValue undefVec = DAG.getUNDEF(VT);
1369 unsigned OpsToConcat = NextSize/VT.getVectorNumElements();
1370 SmallVector<SDValue, 16> SubConcatOps(OpsToConcat);
1371 unsigned RealVals = ConcatEnd - Idx - 1;
1372 unsigned SubConcatEnd = 0;
1373 unsigned SubConcatIdx = Idx + 1;
1374 while (SubConcatEnd < RealVals)
1375 SubConcatOps[SubConcatEnd++] = ConcatOps[++Idx];
1376 while (SubConcatEnd < OpsToConcat)
1377 SubConcatOps[SubConcatEnd++] = undefVec;
1378 ConcatOps[SubConcatIdx] = DAG.getNode(ISD::CONCAT_VECTORS, dl,
1379 NextVT, &SubConcatOps[0],
1381 ConcatEnd = SubConcatIdx + 1;
1385 // Check to see if we have a single operation with the widen type.
1386 if (ConcatEnd == 1) {
1387 VT = ConcatOps[0].getValueType();
1389 return ConcatOps[0];
1392 // add undefs of size MaxVT until ConcatOps grows to length of WidenVT
1394 WidenVT.getVectorNumElements()/MaxVT.getVectorNumElements();
1395 if (NumOps != ConcatEnd ) {
1396 SDValue UndefVal = DAG.getUNDEF(MaxVT);
1397 for (unsigned j = ConcatEnd; j < NumOps; ++j)
1398 ConcatOps[j] = UndefVal;
1400 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &ConcatOps[0], NumOps);
1404 SDValue DAGTypeLegalizer::WidenVecRes_Convert(SDNode *N) {
1405 SDValue InOp = N->getOperand(0);
1406 DebugLoc dl = N->getDebugLoc();
1408 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1409 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1411 EVT InVT = InOp.getValueType();
1412 EVT InEltVT = InVT.getVectorElementType();
1413 EVT InWidenVT = EVT::getVectorVT(*DAG.getContext(), InEltVT, WidenNumElts);
1415 unsigned Opcode = N->getOpcode();
1416 unsigned InVTNumElts = InVT.getVectorNumElements();
1418 if (getTypeAction(InVT) == WidenVector) {
1419 InOp = GetWidenedVector(N->getOperand(0));
1420 InVT = InOp.getValueType();
1421 InVTNumElts = InVT.getVectorNumElements();
1422 if (InVTNumElts == WidenNumElts)
1423 return DAG.getNode(Opcode, dl, WidenVT, InOp);
1426 if (TLI.isTypeSynthesizable(InWidenVT)) {
1427 // Because the result and the input are different vector types, widening
1428 // the result could create a legal type but widening the input might make
1429 // it an illegal type that might lead to repeatedly splitting the input
1430 // and then widening it. To avoid this, we widen the input only if
1431 // it results in a legal type.
1432 if (WidenNumElts % InVTNumElts == 0) {
1433 // Widen the input and call convert on the widened input vector.
1434 unsigned NumConcat = WidenNumElts/InVTNumElts;
1435 SmallVector<SDValue, 16> Ops(NumConcat);
1437 SDValue UndefVal = DAG.getUNDEF(InVT);
1438 for (unsigned i = 1; i != NumConcat; ++i)
1440 return DAG.getNode(Opcode, dl, WidenVT,
1441 DAG.getNode(ISD::CONCAT_VECTORS, dl, InWidenVT,
1442 &Ops[0], NumConcat));
1445 if (InVTNumElts % WidenNumElts == 0) {
1446 // Extract the input and convert the shorten input vector.
1447 return DAG.getNode(Opcode, dl, WidenVT,
1448 DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InWidenVT,
1449 InOp, DAG.getIntPtrConstant(0)));
1453 // Otherwise unroll into some nasty scalar code and rebuild the vector.
1454 SmallVector<SDValue, 16> Ops(WidenNumElts);
1455 EVT EltVT = WidenVT.getVectorElementType();
1456 unsigned MinElts = std::min(InVTNumElts, WidenNumElts);
1458 for (i=0; i < MinElts; ++i)
1459 Ops[i] = DAG.getNode(Opcode, dl, EltVT,
1460 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, InEltVT, InOp,
1461 DAG.getIntPtrConstant(i)));
1463 SDValue UndefVal = DAG.getUNDEF(EltVT);
1464 for (; i < WidenNumElts; ++i)
1467 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], WidenNumElts);
1470 SDValue DAGTypeLegalizer::WidenVecRes_POWI(SDNode *N) {
1471 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1472 SDValue InOp = GetWidenedVector(N->getOperand(0));
1473 SDValue ShOp = N->getOperand(1);
1474 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), WidenVT, InOp, ShOp);
1477 SDValue DAGTypeLegalizer::WidenVecRes_Shift(SDNode *N) {
1478 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1479 SDValue InOp = GetWidenedVector(N->getOperand(0));
1480 SDValue ShOp = N->getOperand(1);
1482 EVT ShVT = ShOp.getValueType();
1483 if (getTypeAction(ShVT) == WidenVector) {
1484 ShOp = GetWidenedVector(ShOp);
1485 ShVT = ShOp.getValueType();
1487 EVT ShWidenVT = EVT::getVectorVT(*DAG.getContext(),
1488 ShVT.getVectorElementType(),
1489 WidenVT.getVectorNumElements());
1490 if (ShVT != ShWidenVT)
1491 ShOp = ModifyToType(ShOp, ShWidenVT);
1493 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), WidenVT, InOp, ShOp);
1496 SDValue DAGTypeLegalizer::WidenVecRes_Unary(SDNode *N) {
1497 // Unary op widening.
1498 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1499 SDValue InOp = GetWidenedVector(N->getOperand(0));
1500 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), WidenVT, InOp);
1503 SDValue DAGTypeLegalizer::WidenVecRes_InregOp(SDNode *N) {
1504 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1505 EVT ExtVT = EVT::getVectorVT(*DAG.getContext(),
1506 cast<VTSDNode>(N->getOperand(1))->getVT()
1507 .getVectorElementType(),
1508 WidenVT.getVectorNumElements());
1509 SDValue WidenLHS = GetWidenedVector(N->getOperand(0));
1510 return DAG.getNode(N->getOpcode(), N->getDebugLoc(),
1511 WidenVT, WidenLHS, DAG.getValueType(ExtVT));
1514 SDValue DAGTypeLegalizer::WidenVecRes_BIT_CONVERT(SDNode *N) {
1515 SDValue InOp = N->getOperand(0);
1516 EVT InVT = InOp.getValueType();
1517 EVT VT = N->getValueType(0);
1518 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1519 DebugLoc dl = N->getDebugLoc();
1521 switch (getTypeAction(InVT)) {
1523 assert(false && "Unknown type action!");
1527 case PromoteInteger:
1528 // If the InOp is promoted to the same size, convert it. Otherwise,
1529 // fall out of the switch and widen the promoted input.
1530 InOp = GetPromotedInteger(InOp);
1531 InVT = InOp.getValueType();
1532 if (WidenVT.bitsEq(InVT))
1533 return DAG.getNode(ISD::BIT_CONVERT, dl, WidenVT, InOp);
1538 case ScalarizeVector:
1542 // If the InOp is widened to the same size, convert it. Otherwise, fall
1543 // out of the switch and widen the widened input.
1544 InOp = GetWidenedVector(InOp);
1545 InVT = InOp.getValueType();
1546 if (WidenVT.bitsEq(InVT))
1547 // The input widens to the same size. Convert to the widen value.
1548 return DAG.getNode(ISD::BIT_CONVERT, dl, WidenVT, InOp);
1552 unsigned WidenSize = WidenVT.getSizeInBits();
1553 unsigned InSize = InVT.getSizeInBits();
1554 if (WidenSize % InSize == 0) {
1555 // Determine new input vector type. The new input vector type will use
1556 // the same element type (if its a vector) or use the input type as a
1557 // vector. It is the same size as the type to widen to.
1559 unsigned NewNumElts = WidenSize / InSize;
1560 if (InVT.isVector()) {
1561 EVT InEltVT = InVT.getVectorElementType();
1562 NewInVT= EVT::getVectorVT(*DAG.getContext(), InEltVT,
1563 WidenSize / InEltVT.getSizeInBits());
1565 NewInVT = EVT::getVectorVT(*DAG.getContext(), InVT, NewNumElts);
1568 if (TLI.isTypeSynthesizable(NewInVT)) {
1569 // Because the result and the input are different vector types, widening
1570 // the result could create a legal type but widening the input might make
1571 // it an illegal type that might lead to repeatedly splitting the input
1572 // and then widening it. To avoid this, we widen the input only if
1573 // it results in a legal type.
1574 SmallVector<SDValue, 16> Ops(NewNumElts);
1575 SDValue UndefVal = DAG.getUNDEF(InVT);
1577 for (unsigned i = 1; i < NewNumElts; ++i)
1581 if (InVT.isVector())
1582 NewVec = DAG.getNode(ISD::CONCAT_VECTORS, dl,
1583 NewInVT, &Ops[0], NewNumElts);
1585 NewVec = DAG.getNode(ISD::BUILD_VECTOR, dl,
1586 NewInVT, &Ops[0], NewNumElts);
1587 return DAG.getNode(ISD::BIT_CONVERT, dl, WidenVT, NewVec);
1591 return CreateStackStoreLoad(InOp, WidenVT);
1594 SDValue DAGTypeLegalizer::WidenVecRes_BUILD_VECTOR(SDNode *N) {
1595 DebugLoc dl = N->getDebugLoc();
1596 // Build a vector with undefined for the new nodes.
1597 EVT VT = N->getValueType(0);
1598 EVT EltVT = VT.getVectorElementType();
1599 unsigned NumElts = VT.getVectorNumElements();
1601 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1602 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1604 SmallVector<SDValue, 16> NewOps(N->op_begin(), N->op_end());
1605 NewOps.reserve(WidenNumElts);
1606 for (unsigned i = NumElts; i < WidenNumElts; ++i)
1607 NewOps.push_back(DAG.getUNDEF(EltVT));
1609 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &NewOps[0], NewOps.size());
1612 SDValue DAGTypeLegalizer::WidenVecRes_CONCAT_VECTORS(SDNode *N) {
1613 EVT InVT = N->getOperand(0).getValueType();
1614 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1615 DebugLoc dl = N->getDebugLoc();
1616 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1617 unsigned NumOperands = N->getNumOperands();
1619 bool InputWidened = false; // Indicates we need to widen the input.
1620 if (getTypeAction(InVT) != WidenVector) {
1621 if (WidenVT.getVectorNumElements() % InVT.getVectorNumElements() == 0) {
1622 // Add undef vectors to widen to correct length.
1623 unsigned NumConcat = WidenVT.getVectorNumElements() /
1624 InVT.getVectorNumElements();
1625 SDValue UndefVal = DAG.getUNDEF(InVT);
1626 SmallVector<SDValue, 16> Ops(NumConcat);
1627 for (unsigned i=0; i < NumOperands; ++i)
1628 Ops[i] = N->getOperand(i);
1629 for (unsigned i = NumOperands; i != NumConcat; ++i)
1631 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &Ops[0], NumConcat);
1634 InputWidened = true;
1635 if (WidenVT == TLI.getTypeToTransformTo(*DAG.getContext(), InVT)) {
1636 // The inputs and the result are widen to the same value.
1638 for (i=1; i < NumOperands; ++i)
1639 if (N->getOperand(i).getOpcode() != ISD::UNDEF)
1642 if (i > NumOperands)
1643 // Everything but the first operand is an UNDEF so just return the
1644 // widened first operand.
1645 return GetWidenedVector(N->getOperand(0));
1647 if (NumOperands == 2) {
1648 // Replace concat of two operands with a shuffle.
1649 SmallVector<int, 16> MaskOps(WidenNumElts);
1650 for (unsigned i=0; i < WidenNumElts/2; ++i) {
1652 MaskOps[i+WidenNumElts/2] = i+WidenNumElts;
1654 return DAG.getVectorShuffle(WidenVT, dl,
1655 GetWidenedVector(N->getOperand(0)),
1656 GetWidenedVector(N->getOperand(1)),
1662 // Fall back to use extracts and build vector.
1663 EVT EltVT = WidenVT.getVectorElementType();
1664 unsigned NumInElts = InVT.getVectorNumElements();
1665 SmallVector<SDValue, 16> Ops(WidenNumElts);
1667 for (unsigned i=0; i < NumOperands; ++i) {
1668 SDValue InOp = N->getOperand(i);
1670 InOp = GetWidenedVector(InOp);
1671 for (unsigned j=0; j < NumInElts; ++j)
1672 Ops[Idx++] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
1673 DAG.getIntPtrConstant(j));
1675 SDValue UndefVal = DAG.getUNDEF(EltVT);
1676 for (; Idx < WidenNumElts; ++Idx)
1677 Ops[Idx] = UndefVal;
1678 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], WidenNumElts);
1681 SDValue DAGTypeLegalizer::WidenVecRes_CONVERT_RNDSAT(SDNode *N) {
1682 DebugLoc dl = N->getDebugLoc();
1683 SDValue InOp = N->getOperand(0);
1684 SDValue RndOp = N->getOperand(3);
1685 SDValue SatOp = N->getOperand(4);
1687 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(),
1688 N->getValueType(0));
1689 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1691 EVT InVT = InOp.getValueType();
1692 EVT InEltVT = InVT.getVectorElementType();
1693 EVT InWidenVT = EVT::getVectorVT(*DAG.getContext(), InEltVT, WidenNumElts);
1695 SDValue DTyOp = DAG.getValueType(WidenVT);
1696 SDValue STyOp = DAG.getValueType(InWidenVT);
1697 ISD::CvtCode CvtCode = cast<CvtRndSatSDNode>(N)->getCvtCode();
1699 unsigned InVTNumElts = InVT.getVectorNumElements();
1700 if (getTypeAction(InVT) == WidenVector) {
1701 InOp = GetWidenedVector(InOp);
1702 InVT = InOp.getValueType();
1703 InVTNumElts = InVT.getVectorNumElements();
1704 if (InVTNumElts == WidenNumElts)
1705 return DAG.getConvertRndSat(WidenVT, dl, InOp, DTyOp, STyOp, RndOp,
1709 if (TLI.isTypeSynthesizable(InWidenVT)) {
1710 // Because the result and the input are different vector types, widening
1711 // the result could create a legal type but widening the input might make
1712 // it an illegal type that might lead to repeatedly splitting the input
1713 // and then widening it. To avoid this, we widen the input only if
1714 // it results in a legal type.
1715 if (WidenNumElts % InVTNumElts == 0) {
1716 // Widen the input and call convert on the widened input vector.
1717 unsigned NumConcat = WidenNumElts/InVTNumElts;
1718 SmallVector<SDValue, 16> Ops(NumConcat);
1720 SDValue UndefVal = DAG.getUNDEF(InVT);
1721 for (unsigned i = 1; i != NumConcat; ++i) {
1724 InOp = DAG.getNode(ISD::CONCAT_VECTORS, dl, InWidenVT, &Ops[0],NumConcat);
1725 return DAG.getConvertRndSat(WidenVT, dl, InOp, DTyOp, STyOp, RndOp,
1729 if (InVTNumElts % WidenNumElts == 0) {
1730 // Extract the input and convert the shorten input vector.
1731 InOp = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InWidenVT, InOp,
1732 DAG.getIntPtrConstant(0));
1733 return DAG.getConvertRndSat(WidenVT, dl, InOp, DTyOp, STyOp, RndOp,
1738 // Otherwise unroll into some nasty scalar code and rebuild the vector.
1739 SmallVector<SDValue, 16> Ops(WidenNumElts);
1740 EVT EltVT = WidenVT.getVectorElementType();
1741 DTyOp = DAG.getValueType(EltVT);
1742 STyOp = DAG.getValueType(InEltVT);
1744 unsigned MinElts = std::min(InVTNumElts, WidenNumElts);
1746 for (i=0; i < MinElts; ++i) {
1747 SDValue ExtVal = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, InEltVT, InOp,
1748 DAG.getIntPtrConstant(i));
1749 Ops[i] = DAG.getConvertRndSat(WidenVT, dl, ExtVal, DTyOp, STyOp, RndOp,
1753 SDValue UndefVal = DAG.getUNDEF(EltVT);
1754 for (; i < WidenNumElts; ++i)
1757 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], WidenNumElts);
1760 SDValue DAGTypeLegalizer::WidenVecRes_EXTRACT_SUBVECTOR(SDNode *N) {
1761 EVT VT = N->getValueType(0);
1762 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1763 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1764 SDValue InOp = N->getOperand(0);
1765 SDValue Idx = N->getOperand(1);
1766 DebugLoc dl = N->getDebugLoc();
1768 if (getTypeAction(InOp.getValueType()) == WidenVector)
1769 InOp = GetWidenedVector(InOp);
1771 EVT InVT = InOp.getValueType();
1773 ConstantSDNode *CIdx = dyn_cast<ConstantSDNode>(Idx);
1775 unsigned IdxVal = CIdx->getZExtValue();
1776 // Check if we can just return the input vector after widening.
1777 if (IdxVal == 0 && InVT == WidenVT)
1780 // Check if we can extract from the vector.
1781 unsigned InNumElts = InVT.getVectorNumElements();
1782 if (IdxVal % WidenNumElts == 0 && IdxVal + WidenNumElts < InNumElts)
1783 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, WidenVT, InOp, Idx);
1786 // We could try widening the input to the right length but for now, extract
1787 // the original elements, fill the rest with undefs and build a vector.
1788 SmallVector<SDValue, 16> Ops(WidenNumElts);
1789 EVT EltVT = VT.getVectorElementType();
1790 EVT IdxVT = Idx.getValueType();
1791 unsigned NumElts = VT.getVectorNumElements();
1794 unsigned IdxVal = CIdx->getZExtValue();
1795 for (i=0; i < NumElts; ++i)
1796 Ops[i] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
1797 DAG.getConstant(IdxVal+i, IdxVT));
1799 Ops[0] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp, Idx);
1800 for (i=1; i < NumElts; ++i) {
1801 SDValue NewIdx = DAG.getNode(ISD::ADD, dl, Idx.getValueType(), Idx,
1802 DAG.getConstant(i, IdxVT));
1803 Ops[i] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp, NewIdx);
1807 SDValue UndefVal = DAG.getUNDEF(EltVT);
1808 for (; i < WidenNumElts; ++i)
1810 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], WidenNumElts);
1813 SDValue DAGTypeLegalizer::WidenVecRes_INSERT_VECTOR_ELT(SDNode *N) {
1814 SDValue InOp = GetWidenedVector(N->getOperand(0));
1815 return DAG.getNode(ISD::INSERT_VECTOR_ELT, N->getDebugLoc(),
1816 InOp.getValueType(), InOp,
1817 N->getOperand(1), N->getOperand(2));
1820 SDValue DAGTypeLegalizer::WidenVecRes_LOAD(SDNode *N) {
1821 LoadSDNode *LD = cast<LoadSDNode>(N);
1822 ISD::LoadExtType ExtType = LD->getExtensionType();
1825 SmallVector<SDValue, 16> LdChain; // Chain for the series of load
1826 if (ExtType != ISD::NON_EXTLOAD)
1827 Result = GenWidenVectorExtLoads(LdChain, LD, ExtType);
1829 Result = GenWidenVectorLoads(LdChain, LD);
1831 // If we generate a single load, we can use that for the chain. Otherwise,
1832 // build a factor node to remember the multiple loads are independent and
1835 if (LdChain.size() == 1)
1836 NewChain = LdChain[0];
1838 NewChain = DAG.getNode(ISD::TokenFactor, LD->getDebugLoc(), MVT::Other,
1839 &LdChain[0], LdChain.size());
1841 // Modified the chain - switch anything that used the old chain to use
1843 ReplaceValueWith(SDValue(N, 1), NewChain);
1848 SDValue DAGTypeLegalizer::WidenVecRes_SCALAR_TO_VECTOR(SDNode *N) {
1849 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1850 return DAG.getNode(ISD::SCALAR_TO_VECTOR, N->getDebugLoc(),
1851 WidenVT, N->getOperand(0));
1854 SDValue DAGTypeLegalizer::WidenVecRes_SELECT(SDNode *N) {
1855 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1856 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1858 SDValue Cond1 = N->getOperand(0);
1859 EVT CondVT = Cond1.getValueType();
1860 if (CondVT.isVector()) {
1861 EVT CondEltVT = CondVT.getVectorElementType();
1862 EVT CondWidenVT = EVT::getVectorVT(*DAG.getContext(),
1863 CondEltVT, WidenNumElts);
1864 if (getTypeAction(CondVT) == WidenVector)
1865 Cond1 = GetWidenedVector(Cond1);
1867 if (Cond1.getValueType() != CondWidenVT)
1868 Cond1 = ModifyToType(Cond1, CondWidenVT);
1871 SDValue InOp1 = GetWidenedVector(N->getOperand(1));
1872 SDValue InOp2 = GetWidenedVector(N->getOperand(2));
1873 assert(InOp1.getValueType() == WidenVT && InOp2.getValueType() == WidenVT);
1874 return DAG.getNode(ISD::SELECT, N->getDebugLoc(),
1875 WidenVT, Cond1, InOp1, InOp2);
1878 SDValue DAGTypeLegalizer::WidenVecRes_SELECT_CC(SDNode *N) {
1879 SDValue InOp1 = GetWidenedVector(N->getOperand(2));
1880 SDValue InOp2 = GetWidenedVector(N->getOperand(3));
1881 return DAG.getNode(ISD::SELECT_CC, N->getDebugLoc(),
1882 InOp1.getValueType(), N->getOperand(0),
1883 N->getOperand(1), InOp1, InOp2, N->getOperand(4));
1886 SDValue DAGTypeLegalizer::WidenVecRes_SETCC(SDNode *N) {
1887 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1888 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
1889 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1890 return DAG.getNode(ISD::SETCC, N->getDebugLoc(), WidenVT,
1891 InOp1, InOp2, N->getOperand(2));
1894 SDValue DAGTypeLegalizer::WidenVecRes_UNDEF(SDNode *N) {
1895 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1896 return DAG.getUNDEF(WidenVT);
1899 SDValue DAGTypeLegalizer::WidenVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N) {
1900 EVT VT = N->getValueType(0);
1901 DebugLoc dl = N->getDebugLoc();
1903 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1904 unsigned NumElts = VT.getVectorNumElements();
1905 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1907 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
1908 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1910 // Adjust mask based on new input vector length.
1911 SmallVector<int, 16> NewMask;
1912 for (unsigned i = 0; i != NumElts; ++i) {
1913 int Idx = N->getMaskElt(i);
1914 if (Idx < (int)NumElts)
1915 NewMask.push_back(Idx);
1917 NewMask.push_back(Idx - NumElts + WidenNumElts);
1919 for (unsigned i = NumElts; i != WidenNumElts; ++i)
1920 NewMask.push_back(-1);
1921 return DAG.getVectorShuffle(WidenVT, dl, InOp1, InOp2, &NewMask[0]);
1924 SDValue DAGTypeLegalizer::WidenVecRes_VSETCC(SDNode *N) {
1925 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1926 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1928 SDValue InOp1 = N->getOperand(0);
1929 EVT InVT = InOp1.getValueType();
1930 assert(InVT.isVector() && "can not widen non vector type");
1931 EVT WidenInVT = EVT::getVectorVT(*DAG.getContext(),
1932 InVT.getVectorElementType(), WidenNumElts);
1933 InOp1 = GetWidenedVector(InOp1);
1934 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1936 // Assume that the input and output will be widen appropriately. If not,
1937 // we will have to unroll it at some point.
1938 assert(InOp1.getValueType() == WidenInVT &&
1939 InOp2.getValueType() == WidenInVT &&
1940 "Input not widened to expected type!");
1941 return DAG.getNode(ISD::VSETCC, N->getDebugLoc(),
1942 WidenVT, InOp1, InOp2, N->getOperand(2));
1946 //===----------------------------------------------------------------------===//
1947 // Widen Vector Operand
1948 //===----------------------------------------------------------------------===//
1949 bool DAGTypeLegalizer::WidenVectorOperand(SDNode *N, unsigned ResNo) {
1950 DEBUG(dbgs() << "Widen node operand " << ResNo << ": ";
1953 SDValue Res = SDValue();
1955 switch (N->getOpcode()) {
1958 dbgs() << "WidenVectorOperand op #" << ResNo << ": ";
1962 llvm_unreachable("Do not know how to widen this operator's operand!");
1964 case ISD::BIT_CONVERT: Res = WidenVecOp_BIT_CONVERT(N); break;
1965 case ISD::CONCAT_VECTORS: Res = WidenVecOp_CONCAT_VECTORS(N); break;
1966 case ISD::EXTRACT_SUBVECTOR: Res = WidenVecOp_EXTRACT_SUBVECTOR(N); break;
1967 case ISD::EXTRACT_VECTOR_ELT: Res = WidenVecOp_EXTRACT_VECTOR_ELT(N); break;
1968 case ISD::STORE: Res = WidenVecOp_STORE(N); break;
1971 case ISD::FP_TO_SINT:
1972 case ISD::FP_TO_UINT:
1973 case ISD::SINT_TO_FP:
1974 case ISD::UINT_TO_FP:
1976 case ISD::SIGN_EXTEND:
1977 case ISD::ZERO_EXTEND:
1978 case ISD::ANY_EXTEND:
1979 Res = WidenVecOp_Convert(N);
1983 // If Res is null, the sub-method took care of registering the result.
1984 if (!Res.getNode()) return false;
1986 // If the result is N, the sub-method updated N in place. Tell the legalizer
1988 if (Res.getNode() == N)
1992 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
1993 "Invalid operand expansion");
1995 ReplaceValueWith(SDValue(N, 0), Res);
1999 SDValue DAGTypeLegalizer::WidenVecOp_Convert(SDNode *N) {
2000 // Since the result is legal and the input is illegal, it is unlikely
2001 // that we can fix the input to a legal type so unroll the convert
2002 // into some scalar code and create a nasty build vector.
2003 EVT VT = N->getValueType(0);
2004 EVT EltVT = VT.getVectorElementType();
2005 DebugLoc dl = N->getDebugLoc();
2006 unsigned NumElts = VT.getVectorNumElements();
2007 SDValue InOp = N->getOperand(0);
2008 if (getTypeAction(InOp.getValueType()) == WidenVector)
2009 InOp = GetWidenedVector(InOp);
2010 EVT InVT = InOp.getValueType();
2011 EVT InEltVT = InVT.getVectorElementType();
2013 unsigned Opcode = N->getOpcode();
2014 SmallVector<SDValue, 16> Ops(NumElts);
2015 for (unsigned i=0; i < NumElts; ++i)
2016 Ops[i] = DAG.getNode(Opcode, dl, EltVT,
2017 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, InEltVT, InOp,
2018 DAG.getIntPtrConstant(i)));
2020 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, &Ops[0], NumElts);
2023 SDValue DAGTypeLegalizer::WidenVecOp_BIT_CONVERT(SDNode *N) {
2024 EVT VT = N->getValueType(0);
2025 SDValue InOp = GetWidenedVector(N->getOperand(0));
2026 EVT InWidenVT = InOp.getValueType();
2027 DebugLoc dl = N->getDebugLoc();
2029 // Check if we can convert between two legal vector types and extract.
2030 unsigned InWidenSize = InWidenVT.getSizeInBits();
2031 unsigned Size = VT.getSizeInBits();
2032 if (InWidenSize % Size == 0 && !VT.isVector()) {
2033 unsigned NewNumElts = InWidenSize / Size;
2034 EVT NewVT = EVT::getVectorVT(*DAG.getContext(), VT, NewNumElts);
2035 if (TLI.isTypeSynthesizable(NewVT)) {
2036 SDValue BitOp = DAG.getNode(ISD::BIT_CONVERT, dl, NewVT, InOp);
2037 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, VT, BitOp,
2038 DAG.getIntPtrConstant(0));
2042 return CreateStackStoreLoad(InOp, VT);
2045 SDValue DAGTypeLegalizer::WidenVecOp_CONCAT_VECTORS(SDNode *N) {
2046 // If the input vector is not legal, it is likely that we will not find a
2047 // legal vector of the same size. Replace the concatenate vector with a
2048 // nasty build vector.
2049 EVT VT = N->getValueType(0);
2050 EVT EltVT = VT.getVectorElementType();
2051 DebugLoc dl = N->getDebugLoc();
2052 unsigned NumElts = VT.getVectorNumElements();
2053 SmallVector<SDValue, 16> Ops(NumElts);
2055 EVT InVT = N->getOperand(0).getValueType();
2056 unsigned NumInElts = InVT.getVectorNumElements();
2059 unsigned NumOperands = N->getNumOperands();
2060 for (unsigned i=0; i < NumOperands; ++i) {
2061 SDValue InOp = N->getOperand(i);
2062 if (getTypeAction(InOp.getValueType()) == WidenVector)
2063 InOp = GetWidenedVector(InOp);
2064 for (unsigned j=0; j < NumInElts; ++j)
2065 Ops[Idx++] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
2066 DAG.getIntPtrConstant(j));
2068 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, &Ops[0], NumElts);
2071 SDValue DAGTypeLegalizer::WidenVecOp_EXTRACT_SUBVECTOR(SDNode *N) {
2072 SDValue InOp = GetWidenedVector(N->getOperand(0));
2073 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, N->getDebugLoc(),
2074 N->getValueType(0), InOp, N->getOperand(1));
2077 SDValue DAGTypeLegalizer::WidenVecOp_EXTRACT_VECTOR_ELT(SDNode *N) {
2078 SDValue InOp = GetWidenedVector(N->getOperand(0));
2079 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, N->getDebugLoc(),
2080 N->getValueType(0), InOp, N->getOperand(1));
2083 SDValue DAGTypeLegalizer::WidenVecOp_STORE(SDNode *N) {
2084 // We have to widen the value but we want only to store the original
2086 StoreSDNode *ST = cast<StoreSDNode>(N);
2088 SmallVector<SDValue, 16> StChain;
2089 if (ST->isTruncatingStore())
2090 GenWidenVectorTruncStores(StChain, ST);
2092 GenWidenVectorStores(StChain, ST);
2094 if (StChain.size() == 1)
2097 return DAG.getNode(ISD::TokenFactor, ST->getDebugLoc(),
2098 MVT::Other,&StChain[0],StChain.size());
2101 //===----------------------------------------------------------------------===//
2102 // Vector Widening Utilities
2103 //===----------------------------------------------------------------------===//
2105 // Utility function to find the type to chop up a widen vector for load/store
2106 // TLI: Target lowering used to determine legal types.
2107 // Width: Width left need to load/store.
2108 // WidenVT: The widen vector type to load to/store from
2109 // Align: If 0, don't allow use of a wider type
2110 // WidenEx: If Align is not 0, the amount additional we can load/store from.
2112 static EVT FindMemType(SelectionDAG& DAG, const TargetLowering &TLI,
2113 unsigned Width, EVT WidenVT,
2114 unsigned Align = 0, unsigned WidenEx = 0) {
2115 EVT WidenEltVT = WidenVT.getVectorElementType();
2116 unsigned WidenWidth = WidenVT.getSizeInBits();
2117 unsigned WidenEltWidth = WidenEltVT.getSizeInBits();
2118 unsigned AlignInBits = Align*8;
2120 // If we have one element to load/store, return it.
2121 EVT RetVT = WidenEltVT;
2122 if (Width == WidenEltWidth)
2125 // See if there is larger legal integer than the element type to load/store
2127 for (VT = (unsigned)MVT::LAST_INTEGER_VALUETYPE;
2128 VT >= (unsigned)MVT::FIRST_INTEGER_VALUETYPE; --VT) {
2129 EVT MemVT((MVT::SimpleValueType) VT);
2130 unsigned MemVTWidth = MemVT.getSizeInBits();
2131 if (MemVT.getSizeInBits() <= WidenEltWidth)
2133 if (TLI.isTypeSynthesizable(MemVT) && (WidenWidth % MemVTWidth) == 0 &&
2134 (MemVTWidth <= Width ||
2135 (Align!=0 && MemVTWidth<=AlignInBits && MemVTWidth<=Width+WidenEx))) {
2141 // See if there is a larger vector type to load/store that has the same vector
2142 // element type and is evenly divisible with the WidenVT.
2143 for (VT = (unsigned)MVT::LAST_VECTOR_VALUETYPE;
2144 VT >= (unsigned)MVT::FIRST_VECTOR_VALUETYPE; --VT) {
2145 EVT MemVT = (MVT::SimpleValueType) VT;
2146 unsigned MemVTWidth = MemVT.getSizeInBits();
2147 if (TLI.isTypeSynthesizable(MemVT) && WidenEltVT == MemVT.getVectorElementType() &&
2148 (WidenWidth % MemVTWidth) == 0 &&
2149 (MemVTWidth <= Width ||
2150 (Align!=0 && MemVTWidth<=AlignInBits && MemVTWidth<=Width+WidenEx))) {
2151 if (RetVT.getSizeInBits() < MemVTWidth || MemVT == WidenVT)
2159 // Builds a vector type from scalar loads
2160 // VecTy: Resulting Vector type
2161 // LDOps: Load operators to build a vector type
2162 // [Start,End) the list of loads to use.
2163 static SDValue BuildVectorFromScalar(SelectionDAG& DAG, EVT VecTy,
2164 SmallVector<SDValue, 16>& LdOps,
2165 unsigned Start, unsigned End) {
2166 DebugLoc dl = LdOps[Start].getDebugLoc();
2167 EVT LdTy = LdOps[Start].getValueType();
2168 unsigned Width = VecTy.getSizeInBits();
2169 unsigned NumElts = Width / LdTy.getSizeInBits();
2170 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), LdTy, NumElts);
2173 SDValue VecOp = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, NewVecVT,LdOps[Start]);
2175 for (unsigned i = Start + 1; i != End; ++i) {
2176 EVT NewLdTy = LdOps[i].getValueType();
2177 if (NewLdTy != LdTy) {
2178 NumElts = Width / NewLdTy.getSizeInBits();
2179 NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewLdTy, NumElts);
2180 VecOp = DAG.getNode(ISD::BIT_CONVERT, dl, NewVecVT, VecOp);
2181 // Readjust position and vector position based on new load type
2182 Idx = Idx * LdTy.getSizeInBits() / NewLdTy.getSizeInBits();
2185 VecOp = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NewVecVT, VecOp, LdOps[i],
2186 DAG.getIntPtrConstant(Idx++));
2188 return DAG.getNode(ISD::BIT_CONVERT, dl, VecTy, VecOp);
2191 SDValue DAGTypeLegalizer::GenWidenVectorLoads(SmallVector<SDValue, 16>& LdChain,
2193 // The strategy assumes that we can efficiently load powers of two widths.
2194 // The routines chops the vector into the largest vector loads with the same
2195 // element type or scalar loads and then recombines it to the widen vector
2197 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(),LD->getValueType(0));
2198 unsigned WidenWidth = WidenVT.getSizeInBits();
2199 EVT LdVT = LD->getMemoryVT();
2200 DebugLoc dl = LD->getDebugLoc();
2201 assert(LdVT.isVector() && WidenVT.isVector());
2202 assert(LdVT.getVectorElementType() == WidenVT.getVectorElementType());
2205 SDValue Chain = LD->getChain();
2206 SDValue BasePtr = LD->getBasePtr();
2207 int SVOffset = LD->getSrcValueOffset();
2208 unsigned Align = LD->getAlignment();
2209 bool isVolatile = LD->isVolatile();
2210 bool isNonTemporal = LD->isNonTemporal();
2211 const Value *SV = LD->getSrcValue();
2213 int LdWidth = LdVT.getSizeInBits();
2214 int WidthDiff = WidenWidth - LdWidth; // Difference
2215 unsigned LdAlign = (isVolatile) ? 0 : Align; // Allow wider loads
2217 // Find the vector type that can load from.
2218 EVT NewVT = FindMemType(DAG, TLI, LdWidth, WidenVT, LdAlign, WidthDiff);
2219 int NewVTWidth = NewVT.getSizeInBits();
2220 SDValue LdOp = DAG.getLoad(NewVT, dl, Chain, BasePtr, SV, SVOffset,
2221 isVolatile, isNonTemporal, Align);
2222 LdChain.push_back(LdOp.getValue(1));
2224 // Check if we can load the element with one instruction
2225 if (LdWidth <= NewVTWidth) {
2226 if (NewVT.isVector()) {
2227 if (NewVT != WidenVT) {
2228 assert(WidenWidth % NewVTWidth == 0);
2229 unsigned NumConcat = WidenWidth / NewVTWidth;
2230 SmallVector<SDValue, 16> ConcatOps(NumConcat);
2231 SDValue UndefVal = DAG.getUNDEF(NewVT);
2232 ConcatOps[0] = LdOp;
2233 for (unsigned i = 1; i != NumConcat; ++i)
2234 ConcatOps[i] = UndefVal;
2235 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &ConcatOps[0],
2240 unsigned NumElts = WidenWidth / NewVTWidth;
2241 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewVT, NumElts);
2242 SDValue VecOp = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, NewVecVT, LdOp);
2243 return DAG.getNode(ISD::BIT_CONVERT, dl, WidenVT, VecOp);
2247 // Load vector by using multiple loads from largest vector to scalar
2248 SmallVector<SDValue, 16> LdOps;
2249 LdOps.push_back(LdOp);
2251 LdWidth -= NewVTWidth;
2252 unsigned Offset = 0;
2254 while (LdWidth > 0) {
2255 unsigned Increment = NewVTWidth / 8;
2256 Offset += Increment;
2257 BasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr,
2258 DAG.getIntPtrConstant(Increment));
2260 if (LdWidth < NewVTWidth) {
2261 // Our current type we are using is too large, find a better size
2262 NewVT = FindMemType(DAG, TLI, LdWidth, WidenVT, LdAlign, WidthDiff);
2263 NewVTWidth = NewVT.getSizeInBits();
2266 SDValue LdOp = DAG.getLoad(NewVT, dl, Chain, BasePtr, SV,
2267 SVOffset+Offset, isVolatile,
2268 isNonTemporal, MinAlign(Align, Increment));
2269 LdChain.push_back(LdOp.getValue(1));
2270 LdOps.push_back(LdOp);
2272 LdWidth -= NewVTWidth;
2275 // Build the vector from the loads operations
2276 unsigned End = LdOps.size();
2277 if (LdOps[0].getValueType().isVector()) {
2278 // If the load contains vectors, build the vector using concat vector.
2279 // All of the vectors used to loads are power of 2 and the scalars load
2280 // can be combined to make a power of 2 vector.
2281 SmallVector<SDValue, 16> ConcatOps(End);
2284 EVT LdTy = LdOps[i].getValueType();
2285 // First combine the scalar loads to a vector
2286 if (!LdTy.isVector()) {
2287 for (--i; i >= 0; --i) {
2288 LdTy = LdOps[i].getValueType();
2289 if (LdTy.isVector())
2292 ConcatOps[--Idx] = BuildVectorFromScalar(DAG, LdTy, LdOps, i+1, End);
2294 ConcatOps[--Idx] = LdOps[i];
2295 for (--i; i >= 0; --i) {
2296 EVT NewLdTy = LdOps[i].getValueType();
2297 if (NewLdTy != LdTy) {
2298 // Create a larger vector
2299 ConcatOps[End-1] = DAG.getNode(ISD::CONCAT_VECTORS, dl, NewLdTy,
2300 &ConcatOps[Idx], End - Idx);
2304 ConcatOps[--Idx] = LdOps[i];
2307 if (WidenWidth != LdTy.getSizeInBits()*(End - Idx)) {
2308 // We need to fill the rest with undefs to build the vector
2309 unsigned NumOps = WidenWidth / LdTy.getSizeInBits();
2310 SmallVector<SDValue, 16> WidenOps(NumOps);
2311 SDValue UndefVal = DAG.getUNDEF(LdTy);
2313 for (; i != End-Idx; ++i)
2314 WidenOps[i] = ConcatOps[Idx+i];
2315 for (; i != NumOps; ++i)
2316 WidenOps[i] = UndefVal;
2317 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &WidenOps[0],NumOps);
2319 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT,
2320 &ConcatOps[Idx], End - Idx);
2321 } else // All the loads are scalar loads.
2322 return BuildVectorFromScalar(DAG, WidenVT, LdOps, 0, End);
2326 DAGTypeLegalizer::GenWidenVectorExtLoads(SmallVector<SDValue, 16>& LdChain,
2328 ISD::LoadExtType ExtType) {
2329 // For extension loads, it may not be more efficient to chop up the vector
2330 // and then extended it. Instead, we unroll the load and build a new vector.
2331 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(),LD->getValueType(0));
2332 EVT LdVT = LD->getMemoryVT();
2333 DebugLoc dl = LD->getDebugLoc();
2334 assert(LdVT.isVector() && WidenVT.isVector());
2337 SDValue Chain = LD->getChain();
2338 SDValue BasePtr = LD->getBasePtr();
2339 int SVOffset = LD->getSrcValueOffset();
2340 unsigned Align = LD->getAlignment();
2341 bool isVolatile = LD->isVolatile();
2342 bool isNonTemporal = LD->isNonTemporal();
2343 const Value *SV = LD->getSrcValue();
2345 EVT EltVT = WidenVT.getVectorElementType();
2346 EVT LdEltVT = LdVT.getVectorElementType();
2347 unsigned NumElts = LdVT.getVectorNumElements();
2349 // Load each element and widen
2350 unsigned WidenNumElts = WidenVT.getVectorNumElements();
2351 SmallVector<SDValue, 16> Ops(WidenNumElts);
2352 unsigned Increment = LdEltVT.getSizeInBits() / 8;
2353 Ops[0] = DAG.getExtLoad(ExtType, dl, EltVT, Chain, BasePtr, SV, SVOffset,
2354 LdEltVT, isVolatile, isNonTemporal, Align);
2355 LdChain.push_back(Ops[0].getValue(1));
2356 unsigned i = 0, Offset = Increment;
2357 for (i=1; i < NumElts; ++i, Offset += Increment) {
2358 SDValue NewBasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(),
2359 BasePtr, DAG.getIntPtrConstant(Offset));
2360 Ops[i] = DAG.getExtLoad(ExtType, dl, EltVT, Chain, NewBasePtr, SV,
2361 SVOffset + Offset, LdEltVT, isVolatile,
2362 isNonTemporal, Align);
2363 LdChain.push_back(Ops[i].getValue(1));
2366 // Fill the rest with undefs
2367 SDValue UndefVal = DAG.getUNDEF(EltVT);
2368 for (; i != WidenNumElts; ++i)
2371 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], Ops.size());
2375 void DAGTypeLegalizer::GenWidenVectorStores(SmallVector<SDValue, 16>& StChain,
2377 // The strategy assumes that we can efficiently store powers of two widths.
2378 // The routines chops the vector into the largest vector stores with the same
2379 // element type or scalar stores.
2380 SDValue Chain = ST->getChain();
2381 SDValue BasePtr = ST->getBasePtr();
2382 const Value *SV = ST->getSrcValue();
2383 int SVOffset = ST->getSrcValueOffset();
2384 unsigned Align = ST->getAlignment();
2385 bool isVolatile = ST->isVolatile();
2386 bool isNonTemporal = ST->isNonTemporal();
2387 SDValue ValOp = GetWidenedVector(ST->getValue());
2388 DebugLoc dl = ST->getDebugLoc();
2390 EVT StVT = ST->getMemoryVT();
2391 unsigned StWidth = StVT.getSizeInBits();
2392 EVT ValVT = ValOp.getValueType();
2393 unsigned ValWidth = ValVT.getSizeInBits();
2394 EVT ValEltVT = ValVT.getVectorElementType();
2395 unsigned ValEltWidth = ValEltVT.getSizeInBits();
2396 assert(StVT.getVectorElementType() == ValEltVT);
2398 int Idx = 0; // current index to store
2399 unsigned Offset = 0; // offset from base to store
2400 while (StWidth != 0) {
2401 // Find the largest vector type we can store with
2402 EVT NewVT = FindMemType(DAG, TLI, StWidth, ValVT);
2403 unsigned NewVTWidth = NewVT.getSizeInBits();
2404 unsigned Increment = NewVTWidth / 8;
2405 if (NewVT.isVector()) {
2406 unsigned NumVTElts = NewVT.getVectorNumElements();
2408 SDValue EOp = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, NewVT, ValOp,
2409 DAG.getIntPtrConstant(Idx));
2410 StChain.push_back(DAG.getStore(Chain, dl, EOp, BasePtr, SV,
2411 SVOffset + Offset, isVolatile,
2413 MinAlign(Align, Offset)));
2414 StWidth -= NewVTWidth;
2415 Offset += Increment;
2417 BasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr,
2418 DAG.getIntPtrConstant(Increment));
2419 } while (StWidth != 0 && StWidth >= NewVTWidth);
2421 // Cast the vector to the scalar type we can store
2422 unsigned NumElts = ValWidth / NewVTWidth;
2423 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewVT, NumElts);
2424 SDValue VecOp = DAG.getNode(ISD::BIT_CONVERT, dl, NewVecVT, ValOp);
2425 // Readjust index position based on new vector type
2426 Idx = Idx * ValEltWidth / NewVTWidth;
2428 SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NewVT, VecOp,
2429 DAG.getIntPtrConstant(Idx++));
2430 StChain.push_back(DAG.getStore(Chain, dl, EOp, BasePtr, SV,
2431 SVOffset + Offset, isVolatile,
2432 isNonTemporal, MinAlign(Align, Offset)));
2433 StWidth -= NewVTWidth;
2434 Offset += Increment;
2435 BasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr,
2436 DAG.getIntPtrConstant(Increment));
2437 } while (StWidth != 0 && StWidth >= NewVTWidth);
2438 // Restore index back to be relative to the original widen element type
2439 Idx = Idx * NewVTWidth / ValEltWidth;
2445 DAGTypeLegalizer::GenWidenVectorTruncStores(SmallVector<SDValue, 16>& StChain,
2447 // For extension loads, it may not be more efficient to truncate the vector
2448 // and then store it. Instead, we extract each element and then store it.
2449 SDValue Chain = ST->getChain();
2450 SDValue BasePtr = ST->getBasePtr();
2451 const Value *SV = ST->getSrcValue();
2452 int SVOffset = ST->getSrcValueOffset();
2453 unsigned Align = ST->getAlignment();
2454 bool isVolatile = ST->isVolatile();
2455 bool isNonTemporal = ST->isNonTemporal();
2456 SDValue ValOp = GetWidenedVector(ST->getValue());
2457 DebugLoc dl = ST->getDebugLoc();
2459 EVT StVT = ST->getMemoryVT();
2460 EVT ValVT = ValOp.getValueType();
2462 // It must be true that we the widen vector type is bigger than where
2463 // we need to store.
2464 assert(StVT.isVector() && ValOp.getValueType().isVector());
2465 assert(StVT.bitsLT(ValOp.getValueType()));
2467 // For truncating stores, we can not play the tricks of chopping legal
2468 // vector types and bit cast it to the right type. Instead, we unroll
2470 EVT StEltVT = StVT.getVectorElementType();
2471 EVT ValEltVT = ValVT.getVectorElementType();
2472 unsigned Increment = ValEltVT.getSizeInBits() / 8;
2473 unsigned NumElts = StVT.getVectorNumElements();
2474 SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ValEltVT, ValOp,
2475 DAG.getIntPtrConstant(0));
2476 StChain.push_back(DAG.getTruncStore(Chain, dl, EOp, BasePtr, SV,
2478 isVolatile, isNonTemporal, Align));
2479 unsigned Offset = Increment;
2480 for (unsigned i=1; i < NumElts; ++i, Offset += Increment) {
2481 SDValue NewBasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(),
2482 BasePtr, DAG.getIntPtrConstant(Offset));
2483 SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ValEltVT, ValOp,
2484 DAG.getIntPtrConstant(0));
2485 StChain.push_back(DAG.getTruncStore(Chain, dl, EOp, NewBasePtr, SV,
2486 SVOffset + Offset, StEltVT,
2487 isVolatile, isNonTemporal,
2488 MinAlign(Align, Offset)));
2492 /// Modifies a vector input (widen or narrows) to a vector of NVT. The
2493 /// input vector must have the same element type as NVT.
2494 SDValue DAGTypeLegalizer::ModifyToType(SDValue InOp, EVT NVT) {
2495 // Note that InOp might have been widened so it might already have
2496 // the right width or it might need be narrowed.
2497 EVT InVT = InOp.getValueType();
2498 assert(InVT.getVectorElementType() == NVT.getVectorElementType() &&
2499 "input and widen element type must match");
2500 DebugLoc dl = InOp.getDebugLoc();
2502 // Check if InOp already has the right width.
2506 unsigned InNumElts = InVT.getVectorNumElements();
2507 unsigned WidenNumElts = NVT.getVectorNumElements();
2508 if (WidenNumElts > InNumElts && WidenNumElts % InNumElts == 0) {
2509 unsigned NumConcat = WidenNumElts / InNumElts;
2510 SmallVector<SDValue, 16> Ops(NumConcat);
2511 SDValue UndefVal = DAG.getUNDEF(InVT);
2513 for (unsigned i = 1; i != NumConcat; ++i)
2516 return DAG.getNode(ISD::CONCAT_VECTORS, dl, NVT, &Ops[0], NumConcat);
2519 if (WidenNumElts < InNumElts && InNumElts % WidenNumElts)
2520 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, NVT, InOp,
2521 DAG.getIntPtrConstant(0));
2523 // Fall back to extract and build.
2524 SmallVector<SDValue, 16> Ops(WidenNumElts);
2525 EVT EltVT = NVT.getVectorElementType();
2526 unsigned MinNumElts = std::min(WidenNumElts, InNumElts);
2528 for (Idx = 0; Idx < MinNumElts; ++Idx)
2529 Ops[Idx] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
2530 DAG.getIntPtrConstant(Idx));
2532 SDValue UndefVal = DAG.getUNDEF(EltVT);
2533 for ( ; Idx < WidenNumElts; ++Idx)
2534 Ops[Idx] = UndefVal;
2535 return DAG.getNode(ISD::BUILD_VECTOR, dl, NVT, &Ops[0], WidenNumElts);