1 //===------- LegalizeVectorTypes.cpp - Legalization of vector types -------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file performs vector type splitting and scalarization for LegalizeTypes.
11 // Scalarization is the act of changing a computation in an illegal one-element
12 // vector type to be a computation in its scalar element type. For example,
13 // implementing <1 x f32> arithmetic in a scalar f32 register. This is needed
14 // as a base case when scalarizing vector arithmetic like <4 x f32>, which
15 // eventually decomposes to scalars if the target doesn't support v4f32 or v2f32
17 // Splitting is the act of changing a computation in an invalid vector type to
18 // be a computation in two vectors of half the size. For example, implementing
19 // <128 x f32> operations in terms of two <64 x f32> operations.
21 //===----------------------------------------------------------------------===//
23 #include "LegalizeTypes.h"
24 #include "llvm/CodeGen/PseudoSourceValue.h"
25 #include "llvm/Target/TargetData.h"
26 #include "llvm/Support/ErrorHandling.h"
27 #include "llvm/Support/raw_ostream.h"
30 //===----------------------------------------------------------------------===//
31 // Result Vector Scalarization: <1 x ty> -> ty.
32 //===----------------------------------------------------------------------===//
34 void DAGTypeLegalizer::ScalarizeVectorResult(SDNode *N, unsigned ResNo) {
35 DEBUG(dbgs() << "Scalarize node result " << ResNo << ": ";
38 SDValue R = SDValue();
40 switch (N->getOpcode()) {
43 dbgs() << "ScalarizeVectorResult #" << ResNo << ": ";
47 llvm_unreachable("Do not know how to scalarize the result of this operator!");
49 case ISD::BIT_CONVERT: R = ScalarizeVecRes_BIT_CONVERT(N); break;
50 case ISD::BUILD_VECTOR: R = N->getOperand(0); break;
51 case ISD::CONVERT_RNDSAT: R = ScalarizeVecRes_CONVERT_RNDSAT(N); break;
52 case ISD::EXTRACT_SUBVECTOR: R = ScalarizeVecRes_EXTRACT_SUBVECTOR(N); break;
53 case ISD::FP_ROUND_INREG: R = ScalarizeVecRes_InregOp(N); break;
54 case ISD::FPOWI: R = ScalarizeVecRes_FPOWI(N); break;
55 case ISD::INSERT_VECTOR_ELT: R = ScalarizeVecRes_INSERT_VECTOR_ELT(N); break;
56 case ISD::LOAD: R = ScalarizeVecRes_LOAD(cast<LoadSDNode>(N));break;
57 case ISD::SCALAR_TO_VECTOR: R = ScalarizeVecRes_SCALAR_TO_VECTOR(N); break;
58 case ISD::SIGN_EXTEND_INREG: R = ScalarizeVecRes_InregOp(N); break;
59 case ISD::SELECT: R = ScalarizeVecRes_SELECT(N); break;
60 case ISD::SELECT_CC: R = ScalarizeVecRes_SELECT_CC(N); break;
61 case ISD::SETCC: R = ScalarizeVecRes_SETCC(N); break;
62 case ISD::UNDEF: R = ScalarizeVecRes_UNDEF(N); break;
63 case ISD::VECTOR_SHUFFLE: R = ScalarizeVecRes_VECTOR_SHUFFLE(N); break;
64 case ISD::VSETCC: R = ScalarizeVecRes_VSETCC(N); break;
84 case ISD::SIGN_EXTEND:
85 case ISD::ZERO_EXTEND:
87 R = ScalarizeVecRes_UnaryOp(N);
109 R = ScalarizeVecRes_BinOp(N);
113 // If R is null, the sub-method took care of registering the result.
115 SetScalarizedVector(SDValue(N, ResNo), R);
118 SDValue DAGTypeLegalizer::ScalarizeVecRes_BinOp(SDNode *N) {
119 SDValue LHS = GetScalarizedVector(N->getOperand(0));
120 SDValue RHS = GetScalarizedVector(N->getOperand(1));
121 return DAG.getNode(N->getOpcode(), N->getDebugLoc(),
122 LHS.getValueType(), LHS, RHS);
125 SDValue DAGTypeLegalizer::ScalarizeVecRes_BIT_CONVERT(SDNode *N) {
126 EVT NewVT = N->getValueType(0).getVectorElementType();
127 return DAG.getNode(ISD::BIT_CONVERT, N->getDebugLoc(),
128 NewVT, N->getOperand(0));
131 SDValue DAGTypeLegalizer::ScalarizeVecRes_CONVERT_RNDSAT(SDNode *N) {
132 EVT NewVT = N->getValueType(0).getVectorElementType();
133 SDValue Op0 = GetScalarizedVector(N->getOperand(0));
134 return DAG.getConvertRndSat(NewVT, N->getDebugLoc(),
135 Op0, DAG.getValueType(NewVT),
136 DAG.getValueType(Op0.getValueType()),
139 cast<CvtRndSatSDNode>(N)->getCvtCode());
142 SDValue DAGTypeLegalizer::ScalarizeVecRes_EXTRACT_SUBVECTOR(SDNode *N) {
143 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, N->getDebugLoc(),
144 N->getValueType(0).getVectorElementType(),
145 N->getOperand(0), N->getOperand(1));
148 SDValue DAGTypeLegalizer::ScalarizeVecRes_FPOWI(SDNode *N) {
149 SDValue Op = GetScalarizedVector(N->getOperand(0));
150 return DAG.getNode(ISD::FPOWI, N->getDebugLoc(),
151 Op.getValueType(), Op, N->getOperand(1));
154 SDValue DAGTypeLegalizer::ScalarizeVecRes_INSERT_VECTOR_ELT(SDNode *N) {
155 // The value to insert may have a wider type than the vector element type,
156 // so be sure to truncate it to the element type if necessary.
157 SDValue Op = N->getOperand(1);
158 EVT EltVT = N->getValueType(0).getVectorElementType();
159 if (Op.getValueType() != EltVT)
160 // FIXME: Can this happen for floating point types?
161 Op = DAG.getNode(ISD::TRUNCATE, N->getDebugLoc(), EltVT, Op);
165 SDValue DAGTypeLegalizer::ScalarizeVecRes_LOAD(LoadSDNode *N) {
166 assert(N->isUnindexed() && "Indexed vector load?");
168 SDValue Result = DAG.getLoad(ISD::UNINDEXED, N->getDebugLoc(),
169 N->getExtensionType(),
170 N->getValueType(0).getVectorElementType(),
171 N->getChain(), N->getBasePtr(),
172 DAG.getUNDEF(N->getBasePtr().getValueType()),
173 N->getSrcValue(), N->getSrcValueOffset(),
174 N->getMemoryVT().getVectorElementType(),
175 N->isVolatile(), N->isNonTemporal(),
176 N->getOriginalAlignment());
178 // Legalized the chain result - switch anything that used the old chain to
180 ReplaceValueWith(SDValue(N, 1), Result.getValue(1));
184 SDValue DAGTypeLegalizer::ScalarizeVecRes_UnaryOp(SDNode *N) {
185 // Get the dest type - it doesn't always match the input type, e.g. int_to_fp.
186 EVT DestVT = N->getValueType(0).getVectorElementType();
187 SDValue Op = GetScalarizedVector(N->getOperand(0));
188 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), DestVT, Op);
191 SDValue DAGTypeLegalizer::ScalarizeVecRes_InregOp(SDNode *N) {
192 EVT EltVT = N->getValueType(0).getVectorElementType();
193 EVT ExtVT = cast<VTSDNode>(N->getOperand(1))->getVT().getVectorElementType();
194 SDValue LHS = GetScalarizedVector(N->getOperand(0));
195 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), EltVT,
196 LHS, DAG.getValueType(ExtVT));
199 SDValue DAGTypeLegalizer::ScalarizeVecRes_SCALAR_TO_VECTOR(SDNode *N) {
200 // If the operand is wider than the vector element type then it is implicitly
201 // truncated. Make that explicit here.
202 EVT EltVT = N->getValueType(0).getVectorElementType();
203 SDValue InOp = N->getOperand(0);
204 if (InOp.getValueType() != EltVT)
205 return DAG.getNode(ISD::TRUNCATE, N->getDebugLoc(), EltVT, InOp);
209 SDValue DAGTypeLegalizer::ScalarizeVecRes_SELECT(SDNode *N) {
210 SDValue LHS = GetScalarizedVector(N->getOperand(1));
211 return DAG.getNode(ISD::SELECT, N->getDebugLoc(),
212 LHS.getValueType(), N->getOperand(0), LHS,
213 GetScalarizedVector(N->getOperand(2)));
216 SDValue DAGTypeLegalizer::ScalarizeVecRes_SELECT_CC(SDNode *N) {
217 SDValue LHS = GetScalarizedVector(N->getOperand(2));
218 return DAG.getNode(ISD::SELECT_CC, N->getDebugLoc(), LHS.getValueType(),
219 N->getOperand(0), N->getOperand(1),
220 LHS, GetScalarizedVector(N->getOperand(3)),
224 SDValue DAGTypeLegalizer::ScalarizeVecRes_SETCC(SDNode *N) {
225 SDValue LHS = GetScalarizedVector(N->getOperand(0));
226 SDValue RHS = GetScalarizedVector(N->getOperand(1));
227 DebugLoc DL = N->getDebugLoc();
229 // Turn it into a scalar SETCC.
230 return DAG.getNode(ISD::SETCC, DL, MVT::i1, LHS, RHS, N->getOperand(2));
233 SDValue DAGTypeLegalizer::ScalarizeVecRes_UNDEF(SDNode *N) {
234 return DAG.getUNDEF(N->getValueType(0).getVectorElementType());
237 SDValue DAGTypeLegalizer::ScalarizeVecRes_VECTOR_SHUFFLE(SDNode *N) {
238 // Figure out if the scalar is the LHS or RHS and return it.
239 SDValue Arg = N->getOperand(2).getOperand(0);
240 if (Arg.getOpcode() == ISD::UNDEF)
241 return DAG.getUNDEF(N->getValueType(0).getVectorElementType());
242 unsigned Op = !cast<ConstantSDNode>(Arg)->isNullValue();
243 return GetScalarizedVector(N->getOperand(Op));
246 SDValue DAGTypeLegalizer::ScalarizeVecRes_VSETCC(SDNode *N) {
247 SDValue LHS = GetScalarizedVector(N->getOperand(0));
248 SDValue RHS = GetScalarizedVector(N->getOperand(1));
249 EVT NVT = N->getValueType(0).getVectorElementType();
250 EVT SVT = TLI.getSetCCResultType(LHS.getValueType());
251 DebugLoc DL = N->getDebugLoc();
253 // Turn it into a scalar SETCC.
254 SDValue Res = DAG.getNode(ISD::SETCC, DL, SVT, LHS, RHS, N->getOperand(2));
256 // VSETCC always returns a sign-extended value, while SETCC may not. The
257 // SETCC result type may not match the vector element type. Correct these.
258 if (NVT.bitsLE(SVT)) {
259 // The SETCC result type is bigger than the vector element type.
260 // Ensure the SETCC result is sign-extended.
261 if (TLI.getBooleanContents() !=
262 TargetLowering::ZeroOrNegativeOneBooleanContent)
263 Res = DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, SVT, Res,
264 DAG.getValueType(MVT::i1));
265 // Truncate to the final type.
266 return DAG.getNode(ISD::TRUNCATE, DL, NVT, Res);
269 // The SETCC result type is smaller than the vector element type.
270 // If the SetCC result is not sign-extended, chop it down to MVT::i1.
271 if (TLI.getBooleanContents() !=
272 TargetLowering::ZeroOrNegativeOneBooleanContent)
273 Res = DAG.getNode(ISD::TRUNCATE, DL, MVT::i1, Res);
274 // Sign extend to the final type.
275 return DAG.getNode(ISD::SIGN_EXTEND, DL, NVT, Res);
279 //===----------------------------------------------------------------------===//
280 // Operand Vector Scalarization <1 x ty> -> ty.
281 //===----------------------------------------------------------------------===//
283 bool DAGTypeLegalizer::ScalarizeVectorOperand(SDNode *N, unsigned OpNo) {
284 DEBUG(dbgs() << "Scalarize node operand " << OpNo << ": ";
287 SDValue Res = SDValue();
289 if (Res.getNode() == 0) {
290 switch (N->getOpcode()) {
293 dbgs() << "ScalarizeVectorOperand Op #" << OpNo << ": ";
297 llvm_unreachable("Do not know how to scalarize this operator's operand!");
298 case ISD::BIT_CONVERT:
299 Res = ScalarizeVecOp_BIT_CONVERT(N);
301 case ISD::CONCAT_VECTORS:
302 Res = ScalarizeVecOp_CONCAT_VECTORS(N);
304 case ISD::EXTRACT_VECTOR_ELT:
305 Res = ScalarizeVecOp_EXTRACT_VECTOR_ELT(N);
308 Res = ScalarizeVecOp_STORE(cast<StoreSDNode>(N), OpNo);
313 // If the result is null, the sub-method took care of registering results etc.
314 if (!Res.getNode()) return false;
316 // If the result is N, the sub-method updated N in place. Tell the legalizer
318 if (Res.getNode() == N)
321 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
322 "Invalid operand expansion");
324 ReplaceValueWith(SDValue(N, 0), Res);
328 /// ScalarizeVecOp_BIT_CONVERT - If the value to convert is a vector that needs
329 /// to be scalarized, it must be <1 x ty>. Convert the element instead.
330 SDValue DAGTypeLegalizer::ScalarizeVecOp_BIT_CONVERT(SDNode *N) {
331 SDValue Elt = GetScalarizedVector(N->getOperand(0));
332 return DAG.getNode(ISD::BIT_CONVERT, N->getDebugLoc(),
333 N->getValueType(0), Elt);
336 /// ScalarizeVecOp_CONCAT_VECTORS - The vectors to concatenate have length one -
337 /// use a BUILD_VECTOR instead.
338 SDValue DAGTypeLegalizer::ScalarizeVecOp_CONCAT_VECTORS(SDNode *N) {
339 SmallVector<SDValue, 8> Ops(N->getNumOperands());
340 for (unsigned i = 0, e = N->getNumOperands(); i < e; ++i)
341 Ops[i] = GetScalarizedVector(N->getOperand(i));
342 return DAG.getNode(ISD::BUILD_VECTOR, N->getDebugLoc(), N->getValueType(0),
343 &Ops[0], Ops.size());
346 /// ScalarizeVecOp_EXTRACT_VECTOR_ELT - If the input is a vector that needs to
347 /// be scalarized, it must be <1 x ty>, so just return the element, ignoring the
349 SDValue DAGTypeLegalizer::ScalarizeVecOp_EXTRACT_VECTOR_ELT(SDNode *N) {
350 SDValue Res = GetScalarizedVector(N->getOperand(0));
351 if (Res.getValueType() != N->getValueType(0))
352 Res = DAG.getNode(ISD::ANY_EXTEND, N->getDebugLoc(), N->getValueType(0),
357 /// ScalarizeVecOp_STORE - If the value to store is a vector that needs to be
358 /// scalarized, it must be <1 x ty>. Just store the element.
359 SDValue DAGTypeLegalizer::ScalarizeVecOp_STORE(StoreSDNode *N, unsigned OpNo){
360 assert(N->isUnindexed() && "Indexed store of one-element vector?");
361 assert(OpNo == 1 && "Do not know how to scalarize this operand!");
362 DebugLoc dl = N->getDebugLoc();
364 if (N->isTruncatingStore())
365 return DAG.getTruncStore(N->getChain(), dl,
366 GetScalarizedVector(N->getOperand(1)),
368 N->getSrcValue(), N->getSrcValueOffset(),
369 N->getMemoryVT().getVectorElementType(),
370 N->isVolatile(), N->isNonTemporal(),
373 return DAG.getStore(N->getChain(), dl, GetScalarizedVector(N->getOperand(1)),
374 N->getBasePtr(), N->getSrcValue(), N->getSrcValueOffset(),
375 N->isVolatile(), N->isNonTemporal(),
376 N->getOriginalAlignment());
380 //===----------------------------------------------------------------------===//
381 // Result Vector Splitting
382 //===----------------------------------------------------------------------===//
384 /// SplitVectorResult - This method is called when the specified result of the
385 /// specified node is found to need vector splitting. At this point, the node
386 /// may also have invalid operands or may have other results that need
387 /// legalization, we just know that (at least) one result needs vector
389 void DAGTypeLegalizer::SplitVectorResult(SDNode *N, unsigned ResNo) {
390 DEBUG(dbgs() << "Split node result: ";
395 switch (N->getOpcode()) {
398 dbgs() << "SplitVectorResult #" << ResNo << ": ";
402 llvm_unreachable("Do not know how to split the result of this operator!");
404 case ISD::MERGE_VALUES: SplitRes_MERGE_VALUES(N, Lo, Hi); break;
405 case ISD::SELECT: SplitRes_SELECT(N, Lo, Hi); break;
406 case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break;
407 case ISD::UNDEF: SplitRes_UNDEF(N, Lo, Hi); break;
409 case ISD::BIT_CONVERT: SplitVecRes_BIT_CONVERT(N, Lo, Hi); break;
410 case ISD::BUILD_VECTOR: SplitVecRes_BUILD_VECTOR(N, Lo, Hi); break;
411 case ISD::CONCAT_VECTORS: SplitVecRes_CONCAT_VECTORS(N, Lo, Hi); break;
412 case ISD::CONVERT_RNDSAT: SplitVecRes_CONVERT_RNDSAT(N, Lo, Hi); break;
413 case ISD::EXTRACT_SUBVECTOR: SplitVecRes_EXTRACT_SUBVECTOR(N, Lo, Hi); break;
414 case ISD::FP_ROUND_INREG: SplitVecRes_InregOp(N, Lo, Hi); break;
415 case ISD::FPOWI: SplitVecRes_FPOWI(N, Lo, Hi); break;
416 case ISD::INSERT_VECTOR_ELT: SplitVecRes_INSERT_VECTOR_ELT(N, Lo, Hi); break;
417 case ISD::SCALAR_TO_VECTOR: SplitVecRes_SCALAR_TO_VECTOR(N, Lo, Hi); break;
418 case ISD::SIGN_EXTEND_INREG: SplitVecRes_InregOp(N, Lo, Hi); break;
420 SplitVecRes_LOAD(cast<LoadSDNode>(N), Lo, Hi);
424 SplitVecRes_SETCC(N, Lo, Hi);
426 case ISD::VECTOR_SHUFFLE:
427 SplitVecRes_VECTOR_SHUFFLE(cast<ShuffleVectorSDNode>(N), Lo, Hi);
442 case ISD::FNEARBYINT:
443 case ISD::FP_TO_SINT:
444 case ISD::FP_TO_UINT:
445 case ISD::SINT_TO_FP:
446 case ISD::UINT_TO_FP:
448 case ISD::SIGN_EXTEND:
449 case ISD::ZERO_EXTEND:
450 case ISD::ANY_EXTEND:
456 SplitVecRes_UnaryOp(N, Lo, Hi);
478 SplitVecRes_BinOp(N, Lo, Hi);
482 // If Lo/Hi is null, the sub-method took care of registering results etc.
484 SetSplitVector(SDValue(N, ResNo), Lo, Hi);
487 void DAGTypeLegalizer::SplitVecRes_BinOp(SDNode *N, SDValue &Lo,
489 SDValue LHSLo, LHSHi;
490 GetSplitVector(N->getOperand(0), LHSLo, LHSHi);
491 SDValue RHSLo, RHSHi;
492 GetSplitVector(N->getOperand(1), RHSLo, RHSHi);
493 DebugLoc dl = N->getDebugLoc();
495 Lo = DAG.getNode(N->getOpcode(), dl, LHSLo.getValueType(), LHSLo, RHSLo);
496 Hi = DAG.getNode(N->getOpcode(), dl, LHSHi.getValueType(), LHSHi, RHSHi);
499 void DAGTypeLegalizer::SplitVecRes_BIT_CONVERT(SDNode *N, SDValue &Lo,
501 // We know the result is a vector. The input may be either a vector or a
504 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
505 DebugLoc dl = N->getDebugLoc();
507 SDValue InOp = N->getOperand(0);
508 EVT InVT = InOp.getValueType();
510 // Handle some special cases efficiently.
511 switch (getTypeAction(InVT)) {
513 assert(false && "Unknown type action!");
517 case ScalarizeVector:
521 // A scalar to vector conversion, where the scalar needs expansion.
522 // If the vector is being split in two then we can just convert the
525 GetExpandedOp(InOp, Lo, Hi);
526 if (TLI.isBigEndian())
528 Lo = DAG.getNode(ISD::BIT_CONVERT, dl, LoVT, Lo);
529 Hi = DAG.getNode(ISD::BIT_CONVERT, dl, HiVT, Hi);
534 // If the input is a vector that needs to be split, convert each split
535 // piece of the input now.
536 GetSplitVector(InOp, Lo, Hi);
537 Lo = DAG.getNode(ISD::BIT_CONVERT, dl, LoVT, Lo);
538 Hi = DAG.getNode(ISD::BIT_CONVERT, dl, HiVT, Hi);
542 // In the general case, convert the input to an integer and split it by hand.
543 EVT LoIntVT = EVT::getIntegerVT(*DAG.getContext(), LoVT.getSizeInBits());
544 EVT HiIntVT = EVT::getIntegerVT(*DAG.getContext(), HiVT.getSizeInBits());
545 if (TLI.isBigEndian())
546 std::swap(LoIntVT, HiIntVT);
548 SplitInteger(BitConvertToInteger(InOp), LoIntVT, HiIntVT, Lo, Hi);
550 if (TLI.isBigEndian())
552 Lo = DAG.getNode(ISD::BIT_CONVERT, dl, LoVT, Lo);
553 Hi = DAG.getNode(ISD::BIT_CONVERT, dl, HiVT, Hi);
556 void DAGTypeLegalizer::SplitVecRes_BUILD_VECTOR(SDNode *N, SDValue &Lo,
559 DebugLoc dl = N->getDebugLoc();
560 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
561 unsigned LoNumElts = LoVT.getVectorNumElements();
562 SmallVector<SDValue, 8> LoOps(N->op_begin(), N->op_begin()+LoNumElts);
563 Lo = DAG.getNode(ISD::BUILD_VECTOR, dl, LoVT, &LoOps[0], LoOps.size());
565 SmallVector<SDValue, 8> HiOps(N->op_begin()+LoNumElts, N->op_end());
566 Hi = DAG.getNode(ISD::BUILD_VECTOR, dl, HiVT, &HiOps[0], HiOps.size());
569 void DAGTypeLegalizer::SplitVecRes_CONCAT_VECTORS(SDNode *N, SDValue &Lo,
571 assert(!(N->getNumOperands() & 1) && "Unsupported CONCAT_VECTORS");
572 DebugLoc dl = N->getDebugLoc();
573 unsigned NumSubvectors = N->getNumOperands() / 2;
574 if (NumSubvectors == 1) {
575 Lo = N->getOperand(0);
576 Hi = N->getOperand(1);
581 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
583 SmallVector<SDValue, 8> LoOps(N->op_begin(), N->op_begin()+NumSubvectors);
584 Lo = DAG.getNode(ISD::CONCAT_VECTORS, dl, LoVT, &LoOps[0], LoOps.size());
586 SmallVector<SDValue, 8> HiOps(N->op_begin()+NumSubvectors, N->op_end());
587 Hi = DAG.getNode(ISD::CONCAT_VECTORS, dl, HiVT, &HiOps[0], HiOps.size());
590 void DAGTypeLegalizer::SplitVecRes_CONVERT_RNDSAT(SDNode *N, SDValue &Lo,
593 DebugLoc dl = N->getDebugLoc();
594 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
596 SDValue DTyOpLo = DAG.getValueType(LoVT);
597 SDValue DTyOpHi = DAG.getValueType(HiVT);
599 SDValue RndOp = N->getOperand(3);
600 SDValue SatOp = N->getOperand(4);
601 ISD::CvtCode CvtCode = cast<CvtRndSatSDNode>(N)->getCvtCode();
605 EVT InVT = N->getOperand(0).getValueType();
606 switch (getTypeAction(InVT)) {
607 default: llvm_unreachable("Unexpected type action!");
609 EVT InNVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(),
610 LoVT.getVectorNumElements());
611 VLo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, N->getOperand(0),
612 DAG.getIntPtrConstant(0));
613 VHi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, N->getOperand(0),
614 DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
618 GetSplitVector(N->getOperand(0), VLo, VHi);
621 // If the result needs to be split and the input needs to be widened,
622 // the two types must have different lengths. Use the widened result
623 // and extract from it to do the split.
624 SDValue InOp = GetWidenedVector(N->getOperand(0));
625 EVT InNVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(),
626 LoVT.getVectorNumElements());
627 VLo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, InOp,
628 DAG.getIntPtrConstant(0));
629 VHi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, InOp,
630 DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
635 SDValue STyOpLo = DAG.getValueType(VLo.getValueType());
636 SDValue STyOpHi = DAG.getValueType(VHi.getValueType());
638 Lo = DAG.getConvertRndSat(LoVT, dl, VLo, DTyOpLo, STyOpLo, RndOp, SatOp,
640 Hi = DAG.getConvertRndSat(HiVT, dl, VHi, DTyOpHi, STyOpHi, RndOp, SatOp,
644 void DAGTypeLegalizer::SplitVecRes_EXTRACT_SUBVECTOR(SDNode *N, SDValue &Lo,
646 SDValue Vec = N->getOperand(0);
647 SDValue Idx = N->getOperand(1);
648 EVT IdxVT = Idx.getValueType();
649 DebugLoc dl = N->getDebugLoc();
652 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
654 Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, LoVT, Vec, Idx);
655 Idx = DAG.getNode(ISD::ADD, dl, IdxVT, Idx,
656 DAG.getConstant(LoVT.getVectorNumElements(), IdxVT));
657 Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, HiVT, Vec, Idx);
660 void DAGTypeLegalizer::SplitVecRes_FPOWI(SDNode *N, SDValue &Lo,
662 DebugLoc dl = N->getDebugLoc();
663 GetSplitVector(N->getOperand(0), Lo, Hi);
664 Lo = DAG.getNode(ISD::FPOWI, dl, Lo.getValueType(), Lo, N->getOperand(1));
665 Hi = DAG.getNode(ISD::FPOWI, dl, Hi.getValueType(), Hi, N->getOperand(1));
668 void DAGTypeLegalizer::SplitVecRes_InregOp(SDNode *N, SDValue &Lo,
670 SDValue LHSLo, LHSHi;
671 GetSplitVector(N->getOperand(0), LHSLo, LHSHi);
672 DebugLoc dl = N->getDebugLoc();
675 GetSplitDestVTs(cast<VTSDNode>(N->getOperand(1))->getVT(), LoVT, HiVT);
677 Lo = DAG.getNode(N->getOpcode(), dl, LHSLo.getValueType(), LHSLo,
678 DAG.getValueType(LoVT));
679 Hi = DAG.getNode(N->getOpcode(), dl, LHSHi.getValueType(), LHSHi,
680 DAG.getValueType(HiVT));
683 void DAGTypeLegalizer::SplitVecRes_INSERT_VECTOR_ELT(SDNode *N, SDValue &Lo,
685 SDValue Vec = N->getOperand(0);
686 SDValue Elt = N->getOperand(1);
687 SDValue Idx = N->getOperand(2);
688 DebugLoc dl = N->getDebugLoc();
689 GetSplitVector(Vec, Lo, Hi);
691 if (ConstantSDNode *CIdx = dyn_cast<ConstantSDNode>(Idx)) {
692 unsigned IdxVal = CIdx->getZExtValue();
693 unsigned LoNumElts = Lo.getValueType().getVectorNumElements();
694 if (IdxVal < LoNumElts)
695 Lo = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl,
696 Lo.getValueType(), Lo, Elt, Idx);
698 Hi = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, Hi.getValueType(), Hi, Elt,
699 DAG.getIntPtrConstant(IdxVal - LoNumElts));
703 // Spill the vector to the stack.
704 EVT VecVT = Vec.getValueType();
705 EVT EltVT = VecVT.getVectorElementType();
706 SDValue StackPtr = DAG.CreateStackTemporary(VecVT);
707 SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, Vec, StackPtr, NULL, 0,
710 // Store the new element. This may be larger than the vector element type,
711 // so use a truncating store.
712 SDValue EltPtr = GetVectorElementPointer(StackPtr, EltVT, Idx);
713 const Type *VecType = VecVT.getTypeForEVT(*DAG.getContext());
715 TLI.getTargetData()->getPrefTypeAlignment(VecType);
716 Store = DAG.getTruncStore(Store, dl, Elt, EltPtr, NULL, 0, EltVT,
719 // Load the Lo part from the stack slot.
720 Lo = DAG.getLoad(Lo.getValueType(), dl, Store, StackPtr, NULL, 0,
723 // Increment the pointer to the other part.
724 unsigned IncrementSize = Lo.getValueType().getSizeInBits() / 8;
725 StackPtr = DAG.getNode(ISD::ADD, dl, StackPtr.getValueType(), StackPtr,
726 DAG.getIntPtrConstant(IncrementSize));
728 // Load the Hi part from the stack slot.
729 Hi = DAG.getLoad(Hi.getValueType(), dl, Store, StackPtr, NULL, 0, false,
730 false, MinAlign(Alignment, IncrementSize));
733 void DAGTypeLegalizer::SplitVecRes_SCALAR_TO_VECTOR(SDNode *N, SDValue &Lo,
736 DebugLoc dl = N->getDebugLoc();
737 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
738 Lo = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, LoVT, N->getOperand(0));
739 Hi = DAG.getUNDEF(HiVT);
742 void DAGTypeLegalizer::SplitVecRes_LOAD(LoadSDNode *LD, SDValue &Lo,
744 assert(ISD::isUNINDEXEDLoad(LD) && "Indexed load during type legalization!");
746 DebugLoc dl = LD->getDebugLoc();
747 GetSplitDestVTs(LD->getValueType(0), LoVT, HiVT);
749 ISD::LoadExtType ExtType = LD->getExtensionType();
750 SDValue Ch = LD->getChain();
751 SDValue Ptr = LD->getBasePtr();
752 SDValue Offset = DAG.getUNDEF(Ptr.getValueType());
753 const Value *SV = LD->getSrcValue();
754 int SVOffset = LD->getSrcValueOffset();
755 EVT MemoryVT = LD->getMemoryVT();
756 unsigned Alignment = LD->getOriginalAlignment();
757 bool isVolatile = LD->isVolatile();
758 bool isNonTemporal = LD->isNonTemporal();
760 EVT LoMemVT, HiMemVT;
761 GetSplitDestVTs(MemoryVT, LoMemVT, HiMemVT);
763 Lo = DAG.getLoad(ISD::UNINDEXED, dl, ExtType, LoVT, Ch, Ptr, Offset,
764 SV, SVOffset, LoMemVT, isVolatile, isNonTemporal, Alignment);
766 unsigned IncrementSize = LoMemVT.getSizeInBits()/8;
767 Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr,
768 DAG.getIntPtrConstant(IncrementSize));
769 SVOffset += IncrementSize;
770 Hi = DAG.getLoad(ISD::UNINDEXED, dl, ExtType, HiVT, Ch, Ptr, Offset,
771 SV, SVOffset, HiMemVT, isVolatile, isNonTemporal, Alignment);
773 // Build a factor node to remember that this load is independent of the
775 Ch = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Lo.getValue(1),
778 // Legalized the chain result - switch anything that used the old chain to
780 ReplaceValueWith(SDValue(LD, 1), Ch);
783 void DAGTypeLegalizer::SplitVecRes_SETCC(SDNode *N, SDValue &Lo, SDValue &Hi) {
785 DebugLoc DL = N->getDebugLoc();
786 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
789 EVT InVT = N->getOperand(0).getValueType();
790 SDValue LL, LH, RL, RH;
791 EVT InNVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(),
792 LoVT.getVectorNumElements());
793 LL = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(0),
794 DAG.getIntPtrConstant(0));
795 LH = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(0),
796 DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
798 RL = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(1),
799 DAG.getIntPtrConstant(0));
800 RH = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(1),
801 DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
803 Lo = DAG.getNode(N->getOpcode(), DL, LoVT, LL, RL, N->getOperand(2));
804 Hi = DAG.getNode(N->getOpcode(), DL, HiVT, LH, RH, N->getOperand(2));
807 void DAGTypeLegalizer::SplitVecRes_UnaryOp(SDNode *N, SDValue &Lo,
809 // Get the dest types - they may not match the input types, e.g. int_to_fp.
811 DebugLoc dl = N->getDebugLoc();
812 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
815 EVT InVT = N->getOperand(0).getValueType();
816 switch (getTypeAction(InVT)) {
817 default: llvm_unreachable("Unexpected type action!");
819 EVT InNVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(),
820 LoVT.getVectorNumElements());
821 Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, N->getOperand(0),
822 DAG.getIntPtrConstant(0));
823 Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, N->getOperand(0),
824 DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
828 GetSplitVector(N->getOperand(0), Lo, Hi);
831 // If the result needs to be split and the input needs to be widened,
832 // the two types must have different lengths. Use the widened result
833 // and extract from it to do the split.
834 SDValue InOp = GetWidenedVector(N->getOperand(0));
835 EVT InNVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(),
836 LoVT.getVectorNumElements());
837 Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, InOp,
838 DAG.getIntPtrConstant(0));
839 Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, InOp,
840 DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
845 Lo = DAG.getNode(N->getOpcode(), dl, LoVT, Lo);
846 Hi = DAG.getNode(N->getOpcode(), dl, HiVT, Hi);
849 void DAGTypeLegalizer::SplitVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N,
850 SDValue &Lo, SDValue &Hi) {
851 // The low and high parts of the original input give four input vectors.
853 DebugLoc dl = N->getDebugLoc();
854 GetSplitVector(N->getOperand(0), Inputs[0], Inputs[1]);
855 GetSplitVector(N->getOperand(1), Inputs[2], Inputs[3]);
856 EVT NewVT = Inputs[0].getValueType();
857 unsigned NewElts = NewVT.getVectorNumElements();
859 // If Lo or Hi uses elements from at most two of the four input vectors, then
860 // express it as a vector shuffle of those two inputs. Otherwise extract the
861 // input elements by hand and construct the Lo/Hi output using a BUILD_VECTOR.
862 SmallVector<int, 16> Ops;
863 for (unsigned High = 0; High < 2; ++High) {
864 SDValue &Output = High ? Hi : Lo;
866 // Build a shuffle mask for the output, discovering on the fly which
867 // input vectors to use as shuffle operands (recorded in InputUsed).
868 // If building a suitable shuffle vector proves too hard, then bail
869 // out with useBuildVector set.
870 unsigned InputUsed[2] = { -1U, -1U }; // Not yet discovered.
871 unsigned FirstMaskIdx = High * NewElts;
872 bool useBuildVector = false;
873 for (unsigned MaskOffset = 0; MaskOffset < NewElts; ++MaskOffset) {
874 // The mask element. This indexes into the input.
875 int Idx = N->getMaskElt(FirstMaskIdx + MaskOffset);
877 // The input vector this mask element indexes into.
878 unsigned Input = (unsigned)Idx / NewElts;
880 if (Input >= array_lengthof(Inputs)) {
881 // The mask element does not index into any input vector.
886 // Turn the index into an offset from the start of the input vector.
887 Idx -= Input * NewElts;
889 // Find or create a shuffle vector operand to hold this input.
891 for (OpNo = 0; OpNo < array_lengthof(InputUsed); ++OpNo) {
892 if (InputUsed[OpNo] == Input) {
893 // This input vector is already an operand.
895 } else if (InputUsed[OpNo] == -1U) {
896 // Create a new operand for this input vector.
897 InputUsed[OpNo] = Input;
902 if (OpNo >= array_lengthof(InputUsed)) {
903 // More than two input vectors used! Give up on trying to create a
904 // shuffle vector. Insert all elements into a BUILD_VECTOR instead.
905 useBuildVector = true;
909 // Add the mask index for the new shuffle vector.
910 Ops.push_back(Idx + OpNo * NewElts);
913 if (useBuildVector) {
914 EVT EltVT = NewVT.getVectorElementType();
915 SmallVector<SDValue, 16> SVOps;
917 // Extract the input elements by hand.
918 for (unsigned MaskOffset = 0; MaskOffset < NewElts; ++MaskOffset) {
919 // The mask element. This indexes into the input.
920 int Idx = N->getMaskElt(FirstMaskIdx + MaskOffset);
922 // The input vector this mask element indexes into.
923 unsigned Input = (unsigned)Idx / NewElts;
925 if (Input >= array_lengthof(Inputs)) {
926 // The mask element is "undef" or indexes off the end of the input.
927 SVOps.push_back(DAG.getUNDEF(EltVT));
931 // Turn the index into an offset from the start of the input vector.
932 Idx -= Input * NewElts;
934 // Extract the vector element by hand.
935 SVOps.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT,
936 Inputs[Input], DAG.getIntPtrConstant(Idx)));
939 // Construct the Lo/Hi output using a BUILD_VECTOR.
940 Output = DAG.getNode(ISD::BUILD_VECTOR,dl,NewVT, &SVOps[0], SVOps.size());
941 } else if (InputUsed[0] == -1U) {
942 // No input vectors were used! The result is undefined.
943 Output = DAG.getUNDEF(NewVT);
945 SDValue Op0 = Inputs[InputUsed[0]];
946 // If only one input was used, use an undefined vector for the other.
947 SDValue Op1 = InputUsed[1] == -1U ?
948 DAG.getUNDEF(NewVT) : Inputs[InputUsed[1]];
949 // At least one input vector was used. Create a new shuffle vector.
950 Output = DAG.getVectorShuffle(NewVT, dl, Op0, Op1, &Ops[0]);
958 //===----------------------------------------------------------------------===//
959 // Operand Vector Splitting
960 //===----------------------------------------------------------------------===//
962 /// SplitVectorOperand - This method is called when the specified operand of the
963 /// specified node is found to need vector splitting. At this point, all of the
964 /// result types of the node are known to be legal, but other operands of the
965 /// node may need legalization as well as the specified one.
966 bool DAGTypeLegalizer::SplitVectorOperand(SDNode *N, unsigned OpNo) {
967 DEBUG(dbgs() << "Split node operand: ";
970 SDValue Res = SDValue();
972 if (Res.getNode() == 0) {
973 switch (N->getOpcode()) {
976 dbgs() << "SplitVectorOperand Op #" << OpNo << ": ";
980 llvm_unreachable("Do not know how to split this operator's operand!");
982 case ISD::BIT_CONVERT: Res = SplitVecOp_BIT_CONVERT(N); break;
983 case ISD::EXTRACT_SUBVECTOR: Res = SplitVecOp_EXTRACT_SUBVECTOR(N); break;
984 case ISD::EXTRACT_VECTOR_ELT:Res = SplitVecOp_EXTRACT_VECTOR_ELT(N); break;
986 Res = SplitVecOp_STORE(cast<StoreSDNode>(N), OpNo);
992 case ISD::FP_TO_SINT:
993 case ISD::FP_TO_UINT:
994 case ISD::SINT_TO_FP:
995 case ISD::UINT_TO_FP:
997 case ISD::SIGN_EXTEND:
998 case ISD::ZERO_EXTEND:
999 case ISD::ANY_EXTEND:
1000 Res = SplitVecOp_UnaryOp(N);
1005 // If the result is null, the sub-method took care of registering results etc.
1006 if (!Res.getNode()) return false;
1008 // If the result is N, the sub-method updated N in place. Tell the legalizer
1010 if (Res.getNode() == N)
1013 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
1014 "Invalid operand expansion");
1016 ReplaceValueWith(SDValue(N, 0), Res);
1020 SDValue DAGTypeLegalizer::SplitVecOp_UnaryOp(SDNode *N) {
1021 // The result has a legal vector type, but the input needs splitting.
1022 EVT ResVT = N->getValueType(0);
1024 DebugLoc dl = N->getDebugLoc();
1025 GetSplitVector(N->getOperand(0), Lo, Hi);
1026 EVT InVT = Lo.getValueType();
1028 EVT OutVT = EVT::getVectorVT(*DAG.getContext(), ResVT.getVectorElementType(),
1029 InVT.getVectorNumElements());
1031 Lo = DAG.getNode(N->getOpcode(), dl, OutVT, Lo);
1032 Hi = DAG.getNode(N->getOpcode(), dl, OutVT, Hi);
1034 return DAG.getNode(ISD::CONCAT_VECTORS, dl, ResVT, Lo, Hi);
1037 SDValue DAGTypeLegalizer::SplitVecOp_BIT_CONVERT(SDNode *N) {
1038 // For example, i64 = BIT_CONVERT v4i16 on alpha. Typically the vector will
1039 // end up being split all the way down to individual components. Convert the
1040 // split pieces into integers and reassemble.
1042 GetSplitVector(N->getOperand(0), Lo, Hi);
1043 Lo = BitConvertToInteger(Lo);
1044 Hi = BitConvertToInteger(Hi);
1046 if (TLI.isBigEndian())
1049 return DAG.getNode(ISD::BIT_CONVERT, N->getDebugLoc(), N->getValueType(0),
1050 JoinIntegers(Lo, Hi));
1053 SDValue DAGTypeLegalizer::SplitVecOp_EXTRACT_SUBVECTOR(SDNode *N) {
1054 // We know that the extracted result type is legal. For now, assume the index
1056 EVT SubVT = N->getValueType(0);
1057 SDValue Idx = N->getOperand(1);
1058 DebugLoc dl = N->getDebugLoc();
1060 GetSplitVector(N->getOperand(0), Lo, Hi);
1062 uint64_t LoElts = Lo.getValueType().getVectorNumElements();
1063 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
1065 if (IdxVal < LoElts) {
1066 assert(IdxVal + SubVT.getVectorNumElements() <= LoElts &&
1067 "Extracted subvector crosses vector split!");
1068 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, SubVT, Lo, Idx);
1070 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, SubVT, Hi,
1071 DAG.getConstant(IdxVal - LoElts, Idx.getValueType()));
1075 SDValue DAGTypeLegalizer::SplitVecOp_EXTRACT_VECTOR_ELT(SDNode *N) {
1076 SDValue Vec = N->getOperand(0);
1077 SDValue Idx = N->getOperand(1);
1078 EVT VecVT = Vec.getValueType();
1080 if (isa<ConstantSDNode>(Idx)) {
1081 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
1082 assert(IdxVal < VecVT.getVectorNumElements() && "Invalid vector index!");
1085 GetSplitVector(Vec, Lo, Hi);
1087 uint64_t LoElts = Lo.getValueType().getVectorNumElements();
1089 if (IdxVal < LoElts)
1090 return SDValue(DAG.UpdateNodeOperands(N, Lo, Idx), 0);
1091 return SDValue(DAG.UpdateNodeOperands(N, Hi,
1092 DAG.getConstant(IdxVal - LoElts,
1093 Idx.getValueType())),
1097 // Store the vector to the stack.
1098 EVT EltVT = VecVT.getVectorElementType();
1099 DebugLoc dl = N->getDebugLoc();
1100 SDValue StackPtr = DAG.CreateStackTemporary(VecVT);
1101 int SPFI = cast<FrameIndexSDNode>(StackPtr.getNode())->getIndex();
1102 const Value *SV = PseudoSourceValue::getFixedStack(SPFI);
1103 SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, Vec, StackPtr, SV, 0,
1106 // Load back the required element.
1107 StackPtr = GetVectorElementPointer(StackPtr, EltVT, Idx);
1108 return DAG.getExtLoad(ISD::EXTLOAD, dl, N->getValueType(0), Store, StackPtr,
1109 SV, 0, EltVT, false, false, 0);
1112 SDValue DAGTypeLegalizer::SplitVecOp_STORE(StoreSDNode *N, unsigned OpNo) {
1113 assert(N->isUnindexed() && "Indexed store of vector?");
1114 assert(OpNo == 1 && "Can only split the stored value");
1115 DebugLoc dl = N->getDebugLoc();
1117 bool isTruncating = N->isTruncatingStore();
1118 SDValue Ch = N->getChain();
1119 SDValue Ptr = N->getBasePtr();
1120 int SVOffset = N->getSrcValueOffset();
1121 EVT MemoryVT = N->getMemoryVT();
1122 unsigned Alignment = N->getOriginalAlignment();
1123 bool isVol = N->isVolatile();
1124 bool isNT = N->isNonTemporal();
1126 GetSplitVector(N->getOperand(1), Lo, Hi);
1128 EVT LoMemVT, HiMemVT;
1129 GetSplitDestVTs(MemoryVT, LoMemVT, HiMemVT);
1131 unsigned IncrementSize = LoMemVT.getSizeInBits()/8;
1134 Lo = DAG.getTruncStore(Ch, dl, Lo, Ptr, N->getSrcValue(), SVOffset,
1135 LoMemVT, isVol, isNT, Alignment);
1137 Lo = DAG.getStore(Ch, dl, Lo, Ptr, N->getSrcValue(), SVOffset,
1138 isVol, isNT, Alignment);
1140 // Increment the pointer to the other half.
1141 Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr,
1142 DAG.getIntPtrConstant(IncrementSize));
1143 SVOffset += IncrementSize;
1146 Hi = DAG.getTruncStore(Ch, dl, Hi, Ptr, N->getSrcValue(), SVOffset,
1147 HiMemVT, isVol, isNT, Alignment);
1149 Hi = DAG.getStore(Ch, dl, Hi, Ptr, N->getSrcValue(), SVOffset,
1150 isVol, isNT, Alignment);
1152 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Lo, Hi);
1156 //===----------------------------------------------------------------------===//
1157 // Result Vector Widening
1158 //===----------------------------------------------------------------------===//
1160 void DAGTypeLegalizer::WidenVectorResult(SDNode *N, unsigned ResNo) {
1161 DEBUG(dbgs() << "Widen node result " << ResNo << ": ";
1165 // See if the target wants to custom widen this node.
1166 if (CustomWidenLowerNode(N, N->getValueType(ResNo)))
1169 SDValue Res = SDValue();
1170 switch (N->getOpcode()) {
1173 dbgs() << "WidenVectorResult #" << ResNo << ": ";
1177 llvm_unreachable("Do not know how to widen the result of this operator!");
1179 case ISD::BIT_CONVERT: Res = WidenVecRes_BIT_CONVERT(N); break;
1180 case ISD::BUILD_VECTOR: Res = WidenVecRes_BUILD_VECTOR(N); break;
1181 case ISD::CONCAT_VECTORS: Res = WidenVecRes_CONCAT_VECTORS(N); break;
1182 case ISD::CONVERT_RNDSAT: Res = WidenVecRes_CONVERT_RNDSAT(N); break;
1183 case ISD::EXTRACT_SUBVECTOR: Res = WidenVecRes_EXTRACT_SUBVECTOR(N); break;
1184 case ISD::FP_ROUND_INREG: Res = WidenVecRes_InregOp(N); break;
1185 case ISD::INSERT_VECTOR_ELT: Res = WidenVecRes_INSERT_VECTOR_ELT(N); break;
1186 case ISD::LOAD: Res = WidenVecRes_LOAD(N); break;
1187 case ISD::SCALAR_TO_VECTOR: Res = WidenVecRes_SCALAR_TO_VECTOR(N); break;
1188 case ISD::SIGN_EXTEND_INREG: Res = WidenVecRes_InregOp(N); break;
1189 case ISD::SELECT: Res = WidenVecRes_SELECT(N); break;
1190 case ISD::SELECT_CC: Res = WidenVecRes_SELECT_CC(N); break;
1191 case ISD::SETCC: Res = WidenVecRes_SETCC(N); break;
1192 case ISD::UNDEF: Res = WidenVecRes_UNDEF(N); break;
1193 case ISD::VECTOR_SHUFFLE:
1194 Res = WidenVecRes_VECTOR_SHUFFLE(cast<ShuffleVectorSDNode>(N));
1197 Res = WidenVecRes_VSETCC(N);
1204 case ISD::FCOPYSIGN:
1220 Res = WidenVecRes_Binary(N);
1224 Res = WidenVecRes_POWI(N);
1230 Res = WidenVecRes_Shift(N);
1234 case ISD::FP_TO_SINT:
1235 case ISD::FP_TO_UINT:
1236 case ISD::SINT_TO_FP:
1237 case ISD::UINT_TO_FP:
1239 case ISD::SIGN_EXTEND:
1240 case ISD::ZERO_EXTEND:
1241 case ISD::ANY_EXTEND:
1242 Res = WidenVecRes_Convert(N);
1258 Res = WidenVecRes_Unary(N);
1262 // If Res is null, the sub-method took care of registering the result.
1264 SetWidenedVector(SDValue(N, ResNo), Res);
1267 SDValue DAGTypeLegalizer::WidenVecRes_Binary(SDNode *N) {
1268 // Binary op widening.
1269 unsigned Opcode = N->getOpcode();
1270 DebugLoc dl = N->getDebugLoc();
1271 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1272 EVT WidenEltVT = WidenVT.getVectorElementType();
1274 unsigned NumElts = VT.getVectorNumElements();
1275 while (!TLI.isTypeSynthesizable(VT) && NumElts != 1) {
1276 NumElts = NumElts / 2;
1277 VT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NumElts);
1280 if (NumElts != 1 && !TLI.canOpTrap(N->getOpcode(), VT)) {
1281 // Operation doesn't trap so just widen as normal.
1282 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
1283 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1284 return DAG.getNode(N->getOpcode(), dl, WidenVT, InOp1, InOp2);
1285 } else if (NumElts == 1) {
1286 // No legal vector version so unroll the vector operation and then widen.
1287 return DAG.UnrollVectorOp(N, WidenVT.getVectorNumElements());
1289 // Since the operation can trap, apply operation on the original vector.
1291 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
1292 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1293 unsigned CurNumElts = N->getValueType(0).getVectorNumElements();
1295 SmallVector<SDValue, 16> ConcatOps(CurNumElts);
1296 unsigned ConcatEnd = 0; // Current ConcatOps index.
1297 int Idx = 0; // Current Idx into input vectors.
1299 // NumElts := greatest synthesizable vector size (at most WidenVT)
1300 // while (orig. vector has unhandled elements) {
1301 // take munches of size NumElts from the beginning and add to ConcatOps
1302 // NumElts := next smaller supported vector size or 1
1304 while (CurNumElts != 0) {
1305 while (CurNumElts >= NumElts) {
1306 SDValue EOp1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, InOp1,
1307 DAG.getIntPtrConstant(Idx));
1308 SDValue EOp2 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, InOp2,
1309 DAG.getIntPtrConstant(Idx));
1310 ConcatOps[ConcatEnd++] = DAG.getNode(Opcode, dl, VT, EOp1, EOp2);
1312 CurNumElts -= NumElts;
1315 NumElts = NumElts / 2;
1316 VT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NumElts);
1317 } while (!TLI.isTypeSynthesizable(VT) && NumElts != 1);
1320 for (unsigned i = 0; i != CurNumElts; ++i, ++Idx) {
1321 SDValue EOp1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, WidenEltVT,
1322 InOp1, DAG.getIntPtrConstant(Idx));
1323 SDValue EOp2 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, WidenEltVT,
1324 InOp2, DAG.getIntPtrConstant(Idx));
1325 ConcatOps[ConcatEnd++] = DAG.getNode(Opcode, dl, WidenEltVT,
1332 // Check to see if we have a single operation with the widen type.
1333 if (ConcatEnd == 1) {
1334 VT = ConcatOps[0].getValueType();
1336 return ConcatOps[0];
1339 // while (Some element of ConcatOps is not of type MaxVT) {
1340 // From the end of ConcatOps, collect elements of the same type and put
1341 // them into an op of the next larger supported type
1343 while (ConcatOps[ConcatEnd-1].getValueType() != MaxVT) {
1344 Idx = ConcatEnd - 1;
1345 VT = ConcatOps[Idx--].getValueType();
1346 while (Idx >= 0 && ConcatOps[Idx].getValueType() == VT)
1349 int NextSize = VT.isVector() ? VT.getVectorNumElements() : 1;
1353 NextVT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NextSize);
1354 } while (!TLI.isTypeSynthesizable(NextVT));
1356 if (!VT.isVector()) {
1357 // Scalar type, create an INSERT_VECTOR_ELEMENT of type NextVT
1358 SDValue VecOp = DAG.getUNDEF(NextVT);
1359 unsigned NumToInsert = ConcatEnd - Idx - 1;
1360 for (unsigned i = 0, OpIdx = Idx+1; i < NumToInsert; i++, OpIdx++) {
1361 VecOp = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NextVT, VecOp,
1362 ConcatOps[OpIdx], DAG.getIntPtrConstant(i));
1364 ConcatOps[Idx+1] = VecOp;
1365 ConcatEnd = Idx + 2;
1368 // Vector type, create a CONCAT_VECTORS of type NextVT
1369 SDValue undefVec = DAG.getUNDEF(VT);
1370 unsigned OpsToConcat = NextSize/VT.getVectorNumElements();
1371 SmallVector<SDValue, 16> SubConcatOps(OpsToConcat);
1372 unsigned RealVals = ConcatEnd - Idx - 1;
1373 unsigned SubConcatEnd = 0;
1374 unsigned SubConcatIdx = Idx + 1;
1375 while (SubConcatEnd < RealVals)
1376 SubConcatOps[SubConcatEnd++] = ConcatOps[++Idx];
1377 while (SubConcatEnd < OpsToConcat)
1378 SubConcatOps[SubConcatEnd++] = undefVec;
1379 ConcatOps[SubConcatIdx] = DAG.getNode(ISD::CONCAT_VECTORS, dl,
1380 NextVT, &SubConcatOps[0],
1382 ConcatEnd = SubConcatIdx + 1;
1386 // Check to see if we have a single operation with the widen type.
1387 if (ConcatEnd == 1) {
1388 VT = ConcatOps[0].getValueType();
1390 return ConcatOps[0];
1393 // add undefs of size MaxVT until ConcatOps grows to length of WidenVT
1395 WidenVT.getVectorNumElements()/MaxVT.getVectorNumElements();
1396 if (NumOps != ConcatEnd ) {
1397 SDValue UndefVal = DAG.getUNDEF(MaxVT);
1398 for (unsigned j = ConcatEnd; j < NumOps; ++j)
1399 ConcatOps[j] = UndefVal;
1401 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &ConcatOps[0], NumOps);
1405 SDValue DAGTypeLegalizer::WidenVecRes_Convert(SDNode *N) {
1406 SDValue InOp = N->getOperand(0);
1407 DebugLoc dl = N->getDebugLoc();
1409 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1410 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1412 EVT InVT = InOp.getValueType();
1413 EVT InEltVT = InVT.getVectorElementType();
1414 EVT InWidenVT = EVT::getVectorVT(*DAG.getContext(), InEltVT, WidenNumElts);
1416 unsigned Opcode = N->getOpcode();
1417 unsigned InVTNumElts = InVT.getVectorNumElements();
1419 if (getTypeAction(InVT) == WidenVector) {
1420 InOp = GetWidenedVector(N->getOperand(0));
1421 InVT = InOp.getValueType();
1422 InVTNumElts = InVT.getVectorNumElements();
1423 if (InVTNumElts == WidenNumElts)
1424 return DAG.getNode(Opcode, dl, WidenVT, InOp);
1427 if (TLI.isTypeSynthesizable(InWidenVT)) {
1428 // Because the result and the input are different vector types, widening
1429 // the result could create a legal type but widening the input might make
1430 // it an illegal type that might lead to repeatedly splitting the input
1431 // and then widening it. To avoid this, we widen the input only if
1432 // it results in a legal type.
1433 if (WidenNumElts % InVTNumElts == 0) {
1434 // Widen the input and call convert on the widened input vector.
1435 unsigned NumConcat = WidenNumElts/InVTNumElts;
1436 SmallVector<SDValue, 16> Ops(NumConcat);
1438 SDValue UndefVal = DAG.getUNDEF(InVT);
1439 for (unsigned i = 1; i != NumConcat; ++i)
1441 return DAG.getNode(Opcode, dl, WidenVT,
1442 DAG.getNode(ISD::CONCAT_VECTORS, dl, InWidenVT,
1443 &Ops[0], NumConcat));
1446 if (InVTNumElts % WidenNumElts == 0) {
1447 // Extract the input and convert the shorten input vector.
1448 return DAG.getNode(Opcode, dl, WidenVT,
1449 DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InWidenVT,
1450 InOp, DAG.getIntPtrConstant(0)));
1454 // Otherwise unroll into some nasty scalar code and rebuild the vector.
1455 SmallVector<SDValue, 16> Ops(WidenNumElts);
1456 EVT EltVT = WidenVT.getVectorElementType();
1457 unsigned MinElts = std::min(InVTNumElts, WidenNumElts);
1459 for (i=0; i < MinElts; ++i)
1460 Ops[i] = DAG.getNode(Opcode, dl, EltVT,
1461 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, InEltVT, InOp,
1462 DAG.getIntPtrConstant(i)));
1464 SDValue UndefVal = DAG.getUNDEF(EltVT);
1465 for (; i < WidenNumElts; ++i)
1468 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], WidenNumElts);
1471 SDValue DAGTypeLegalizer::WidenVecRes_POWI(SDNode *N) {
1472 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1473 SDValue InOp = GetWidenedVector(N->getOperand(0));
1474 SDValue ShOp = N->getOperand(1);
1475 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), WidenVT, InOp, ShOp);
1478 SDValue DAGTypeLegalizer::WidenVecRes_Shift(SDNode *N) {
1479 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1480 SDValue InOp = GetWidenedVector(N->getOperand(0));
1481 SDValue ShOp = N->getOperand(1);
1483 EVT ShVT = ShOp.getValueType();
1484 if (getTypeAction(ShVT) == WidenVector) {
1485 ShOp = GetWidenedVector(ShOp);
1486 ShVT = ShOp.getValueType();
1488 EVT ShWidenVT = EVT::getVectorVT(*DAG.getContext(),
1489 ShVT.getVectorElementType(),
1490 WidenVT.getVectorNumElements());
1491 if (ShVT != ShWidenVT)
1492 ShOp = ModifyToType(ShOp, ShWidenVT);
1494 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), WidenVT, InOp, ShOp);
1497 SDValue DAGTypeLegalizer::WidenVecRes_Unary(SDNode *N) {
1498 // Unary op widening.
1499 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1500 SDValue InOp = GetWidenedVector(N->getOperand(0));
1501 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), WidenVT, InOp);
1504 SDValue DAGTypeLegalizer::WidenVecRes_InregOp(SDNode *N) {
1505 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1506 EVT ExtVT = EVT::getVectorVT(*DAG.getContext(),
1507 cast<VTSDNode>(N->getOperand(1))->getVT()
1508 .getVectorElementType(),
1509 WidenVT.getVectorNumElements());
1510 SDValue WidenLHS = GetWidenedVector(N->getOperand(0));
1511 return DAG.getNode(N->getOpcode(), N->getDebugLoc(),
1512 WidenVT, WidenLHS, DAG.getValueType(ExtVT));
1515 SDValue DAGTypeLegalizer::WidenVecRes_BIT_CONVERT(SDNode *N) {
1516 SDValue InOp = N->getOperand(0);
1517 EVT InVT = InOp.getValueType();
1518 EVT VT = N->getValueType(0);
1519 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1520 DebugLoc dl = N->getDebugLoc();
1522 switch (getTypeAction(InVT)) {
1524 assert(false && "Unknown type action!");
1528 case PromoteInteger:
1529 // If the InOp is promoted to the same size, convert it. Otherwise,
1530 // fall out of the switch and widen the promoted input.
1531 InOp = GetPromotedInteger(InOp);
1532 InVT = InOp.getValueType();
1533 if (WidenVT.bitsEq(InVT))
1534 return DAG.getNode(ISD::BIT_CONVERT, dl, WidenVT, InOp);
1539 case ScalarizeVector:
1543 // If the InOp is widened to the same size, convert it. Otherwise, fall
1544 // out of the switch and widen the widened input.
1545 InOp = GetWidenedVector(InOp);
1546 InVT = InOp.getValueType();
1547 if (WidenVT.bitsEq(InVT))
1548 // The input widens to the same size. Convert to the widen value.
1549 return DAG.getNode(ISD::BIT_CONVERT, dl, WidenVT, InOp);
1553 unsigned WidenSize = WidenVT.getSizeInBits();
1554 unsigned InSize = InVT.getSizeInBits();
1555 if (WidenSize % InSize == 0) {
1556 // Determine new input vector type. The new input vector type will use
1557 // the same element type (if its a vector) or use the input type as a
1558 // vector. It is the same size as the type to widen to.
1560 unsigned NewNumElts = WidenSize / InSize;
1561 if (InVT.isVector()) {
1562 EVT InEltVT = InVT.getVectorElementType();
1563 NewInVT= EVT::getVectorVT(*DAG.getContext(), InEltVT,
1564 WidenSize / InEltVT.getSizeInBits());
1566 NewInVT = EVT::getVectorVT(*DAG.getContext(), InVT, NewNumElts);
1569 if (TLI.isTypeSynthesizable(NewInVT)) {
1570 // Because the result and the input are different vector types, widening
1571 // the result could create a legal type but widening the input might make
1572 // it an illegal type that might lead to repeatedly splitting the input
1573 // and then widening it. To avoid this, we widen the input only if
1574 // it results in a legal type.
1575 SmallVector<SDValue, 16> Ops(NewNumElts);
1576 SDValue UndefVal = DAG.getUNDEF(InVT);
1578 for (unsigned i = 1; i < NewNumElts; ++i)
1582 if (InVT.isVector())
1583 NewVec = DAG.getNode(ISD::CONCAT_VECTORS, dl,
1584 NewInVT, &Ops[0], NewNumElts);
1586 NewVec = DAG.getNode(ISD::BUILD_VECTOR, dl,
1587 NewInVT, &Ops[0], NewNumElts);
1588 return DAG.getNode(ISD::BIT_CONVERT, dl, WidenVT, NewVec);
1592 return CreateStackStoreLoad(InOp, WidenVT);
1595 SDValue DAGTypeLegalizer::WidenVecRes_BUILD_VECTOR(SDNode *N) {
1596 DebugLoc dl = N->getDebugLoc();
1597 // Build a vector with undefined for the new nodes.
1598 EVT VT = N->getValueType(0);
1599 EVT EltVT = VT.getVectorElementType();
1600 unsigned NumElts = VT.getVectorNumElements();
1602 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1603 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1605 SmallVector<SDValue, 16> NewOps(N->op_begin(), N->op_end());
1606 NewOps.reserve(WidenNumElts);
1607 for (unsigned i = NumElts; i < WidenNumElts; ++i)
1608 NewOps.push_back(DAG.getUNDEF(EltVT));
1610 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &NewOps[0], NewOps.size());
1613 SDValue DAGTypeLegalizer::WidenVecRes_CONCAT_VECTORS(SDNode *N) {
1614 EVT InVT = N->getOperand(0).getValueType();
1615 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1616 DebugLoc dl = N->getDebugLoc();
1617 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1618 unsigned NumOperands = N->getNumOperands();
1620 bool InputWidened = false; // Indicates we need to widen the input.
1621 if (getTypeAction(InVT) != WidenVector) {
1622 if (WidenVT.getVectorNumElements() % InVT.getVectorNumElements() == 0) {
1623 // Add undef vectors to widen to correct length.
1624 unsigned NumConcat = WidenVT.getVectorNumElements() /
1625 InVT.getVectorNumElements();
1626 SDValue UndefVal = DAG.getUNDEF(InVT);
1627 SmallVector<SDValue, 16> Ops(NumConcat);
1628 for (unsigned i=0; i < NumOperands; ++i)
1629 Ops[i] = N->getOperand(i);
1630 for (unsigned i = NumOperands; i != NumConcat; ++i)
1632 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &Ops[0], NumConcat);
1635 InputWidened = true;
1636 if (WidenVT == TLI.getTypeToTransformTo(*DAG.getContext(), InVT)) {
1637 // The inputs and the result are widen to the same value.
1639 for (i=1; i < NumOperands; ++i)
1640 if (N->getOperand(i).getOpcode() != ISD::UNDEF)
1643 if (i > NumOperands)
1644 // Everything but the first operand is an UNDEF so just return the
1645 // widened first operand.
1646 return GetWidenedVector(N->getOperand(0));
1648 if (NumOperands == 2) {
1649 // Replace concat of two operands with a shuffle.
1650 SmallVector<int, 16> MaskOps(WidenNumElts);
1651 for (unsigned i=0; i < WidenNumElts/2; ++i) {
1653 MaskOps[i+WidenNumElts/2] = i+WidenNumElts;
1655 return DAG.getVectorShuffle(WidenVT, dl,
1656 GetWidenedVector(N->getOperand(0)),
1657 GetWidenedVector(N->getOperand(1)),
1663 // Fall back to use extracts and build vector.
1664 EVT EltVT = WidenVT.getVectorElementType();
1665 unsigned NumInElts = InVT.getVectorNumElements();
1666 SmallVector<SDValue, 16> Ops(WidenNumElts);
1668 for (unsigned i=0; i < NumOperands; ++i) {
1669 SDValue InOp = N->getOperand(i);
1671 InOp = GetWidenedVector(InOp);
1672 for (unsigned j=0; j < NumInElts; ++j)
1673 Ops[Idx++] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
1674 DAG.getIntPtrConstant(j));
1676 SDValue UndefVal = DAG.getUNDEF(EltVT);
1677 for (; Idx < WidenNumElts; ++Idx)
1678 Ops[Idx] = UndefVal;
1679 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], WidenNumElts);
1682 SDValue DAGTypeLegalizer::WidenVecRes_CONVERT_RNDSAT(SDNode *N) {
1683 DebugLoc dl = N->getDebugLoc();
1684 SDValue InOp = N->getOperand(0);
1685 SDValue RndOp = N->getOperand(3);
1686 SDValue SatOp = N->getOperand(4);
1688 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(),
1689 N->getValueType(0));
1690 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1692 EVT InVT = InOp.getValueType();
1693 EVT InEltVT = InVT.getVectorElementType();
1694 EVT InWidenVT = EVT::getVectorVT(*DAG.getContext(), InEltVT, WidenNumElts);
1696 SDValue DTyOp = DAG.getValueType(WidenVT);
1697 SDValue STyOp = DAG.getValueType(InWidenVT);
1698 ISD::CvtCode CvtCode = cast<CvtRndSatSDNode>(N)->getCvtCode();
1700 unsigned InVTNumElts = InVT.getVectorNumElements();
1701 if (getTypeAction(InVT) == WidenVector) {
1702 InOp = GetWidenedVector(InOp);
1703 InVT = InOp.getValueType();
1704 InVTNumElts = InVT.getVectorNumElements();
1705 if (InVTNumElts == WidenNumElts)
1706 return DAG.getConvertRndSat(WidenVT, dl, InOp, DTyOp, STyOp, RndOp,
1710 if (TLI.isTypeSynthesizable(InWidenVT)) {
1711 // Because the result and the input are different vector types, widening
1712 // the result could create a legal type but widening the input might make
1713 // it an illegal type that might lead to repeatedly splitting the input
1714 // and then widening it. To avoid this, we widen the input only if
1715 // it results in a legal type.
1716 if (WidenNumElts % InVTNumElts == 0) {
1717 // Widen the input and call convert on the widened input vector.
1718 unsigned NumConcat = WidenNumElts/InVTNumElts;
1719 SmallVector<SDValue, 16> Ops(NumConcat);
1721 SDValue UndefVal = DAG.getUNDEF(InVT);
1722 for (unsigned i = 1; i != NumConcat; ++i) {
1725 InOp = DAG.getNode(ISD::CONCAT_VECTORS, dl, InWidenVT, &Ops[0],NumConcat);
1726 return DAG.getConvertRndSat(WidenVT, dl, InOp, DTyOp, STyOp, RndOp,
1730 if (InVTNumElts % WidenNumElts == 0) {
1731 // Extract the input and convert the shorten input vector.
1732 InOp = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InWidenVT, InOp,
1733 DAG.getIntPtrConstant(0));
1734 return DAG.getConvertRndSat(WidenVT, dl, InOp, DTyOp, STyOp, RndOp,
1739 // Otherwise unroll into some nasty scalar code and rebuild the vector.
1740 SmallVector<SDValue, 16> Ops(WidenNumElts);
1741 EVT EltVT = WidenVT.getVectorElementType();
1742 DTyOp = DAG.getValueType(EltVT);
1743 STyOp = DAG.getValueType(InEltVT);
1745 unsigned MinElts = std::min(InVTNumElts, WidenNumElts);
1747 for (i=0; i < MinElts; ++i) {
1748 SDValue ExtVal = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, InEltVT, InOp,
1749 DAG.getIntPtrConstant(i));
1750 Ops[i] = DAG.getConvertRndSat(WidenVT, dl, ExtVal, DTyOp, STyOp, RndOp,
1754 SDValue UndefVal = DAG.getUNDEF(EltVT);
1755 for (; i < WidenNumElts; ++i)
1758 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], WidenNumElts);
1761 SDValue DAGTypeLegalizer::WidenVecRes_EXTRACT_SUBVECTOR(SDNode *N) {
1762 EVT VT = N->getValueType(0);
1763 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1764 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1765 SDValue InOp = N->getOperand(0);
1766 SDValue Idx = N->getOperand(1);
1767 DebugLoc dl = N->getDebugLoc();
1769 if (getTypeAction(InOp.getValueType()) == WidenVector)
1770 InOp = GetWidenedVector(InOp);
1772 EVT InVT = InOp.getValueType();
1774 ConstantSDNode *CIdx = dyn_cast<ConstantSDNode>(Idx);
1776 unsigned IdxVal = CIdx->getZExtValue();
1777 // Check if we can just return the input vector after widening.
1778 if (IdxVal == 0 && InVT == WidenVT)
1781 // Check if we can extract from the vector.
1782 unsigned InNumElts = InVT.getVectorNumElements();
1783 if (IdxVal % WidenNumElts == 0 && IdxVal + WidenNumElts < InNumElts)
1784 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, WidenVT, InOp, Idx);
1787 // We could try widening the input to the right length but for now, extract
1788 // the original elements, fill the rest with undefs and build a vector.
1789 SmallVector<SDValue, 16> Ops(WidenNumElts);
1790 EVT EltVT = VT.getVectorElementType();
1791 EVT IdxVT = Idx.getValueType();
1792 unsigned NumElts = VT.getVectorNumElements();
1795 unsigned IdxVal = CIdx->getZExtValue();
1796 for (i=0; i < NumElts; ++i)
1797 Ops[i] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
1798 DAG.getConstant(IdxVal+i, IdxVT));
1800 Ops[0] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp, Idx);
1801 for (i=1; i < NumElts; ++i) {
1802 SDValue NewIdx = DAG.getNode(ISD::ADD, dl, Idx.getValueType(), Idx,
1803 DAG.getConstant(i, IdxVT));
1804 Ops[i] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp, NewIdx);
1808 SDValue UndefVal = DAG.getUNDEF(EltVT);
1809 for (; i < WidenNumElts; ++i)
1811 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], WidenNumElts);
1814 SDValue DAGTypeLegalizer::WidenVecRes_INSERT_VECTOR_ELT(SDNode *N) {
1815 SDValue InOp = GetWidenedVector(N->getOperand(0));
1816 return DAG.getNode(ISD::INSERT_VECTOR_ELT, N->getDebugLoc(),
1817 InOp.getValueType(), InOp,
1818 N->getOperand(1), N->getOperand(2));
1821 SDValue DAGTypeLegalizer::WidenVecRes_LOAD(SDNode *N) {
1822 LoadSDNode *LD = cast<LoadSDNode>(N);
1823 ISD::LoadExtType ExtType = LD->getExtensionType();
1826 SmallVector<SDValue, 16> LdChain; // Chain for the series of load
1827 if (ExtType != ISD::NON_EXTLOAD)
1828 Result = GenWidenVectorExtLoads(LdChain, LD, ExtType);
1830 Result = GenWidenVectorLoads(LdChain, LD);
1832 // If we generate a single load, we can use that for the chain. Otherwise,
1833 // build a factor node to remember the multiple loads are independent and
1836 if (LdChain.size() == 1)
1837 NewChain = LdChain[0];
1839 NewChain = DAG.getNode(ISD::TokenFactor, LD->getDebugLoc(), MVT::Other,
1840 &LdChain[0], LdChain.size());
1842 // Modified the chain - switch anything that used the old chain to use
1844 ReplaceValueWith(SDValue(N, 1), NewChain);
1849 SDValue DAGTypeLegalizer::WidenVecRes_SCALAR_TO_VECTOR(SDNode *N) {
1850 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1851 return DAG.getNode(ISD::SCALAR_TO_VECTOR, N->getDebugLoc(),
1852 WidenVT, N->getOperand(0));
1855 SDValue DAGTypeLegalizer::WidenVecRes_SELECT(SDNode *N) {
1856 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1857 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1859 SDValue Cond1 = N->getOperand(0);
1860 EVT CondVT = Cond1.getValueType();
1861 if (CondVT.isVector()) {
1862 EVT CondEltVT = CondVT.getVectorElementType();
1863 EVT CondWidenVT = EVT::getVectorVT(*DAG.getContext(),
1864 CondEltVT, WidenNumElts);
1865 if (getTypeAction(CondVT) == WidenVector)
1866 Cond1 = GetWidenedVector(Cond1);
1868 if (Cond1.getValueType() != CondWidenVT)
1869 Cond1 = ModifyToType(Cond1, CondWidenVT);
1872 SDValue InOp1 = GetWidenedVector(N->getOperand(1));
1873 SDValue InOp2 = GetWidenedVector(N->getOperand(2));
1874 assert(InOp1.getValueType() == WidenVT && InOp2.getValueType() == WidenVT);
1875 return DAG.getNode(ISD::SELECT, N->getDebugLoc(),
1876 WidenVT, Cond1, InOp1, InOp2);
1879 SDValue DAGTypeLegalizer::WidenVecRes_SELECT_CC(SDNode *N) {
1880 SDValue InOp1 = GetWidenedVector(N->getOperand(2));
1881 SDValue InOp2 = GetWidenedVector(N->getOperand(3));
1882 return DAG.getNode(ISD::SELECT_CC, N->getDebugLoc(),
1883 InOp1.getValueType(), N->getOperand(0),
1884 N->getOperand(1), InOp1, InOp2, N->getOperand(4));
1887 SDValue DAGTypeLegalizer::WidenVecRes_SETCC(SDNode *N) {
1888 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1889 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
1890 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1891 return DAG.getNode(ISD::SETCC, N->getDebugLoc(), WidenVT,
1892 InOp1, InOp2, N->getOperand(2));
1895 SDValue DAGTypeLegalizer::WidenVecRes_UNDEF(SDNode *N) {
1896 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1897 return DAG.getUNDEF(WidenVT);
1900 SDValue DAGTypeLegalizer::WidenVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N) {
1901 EVT VT = N->getValueType(0);
1902 DebugLoc dl = N->getDebugLoc();
1904 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1905 unsigned NumElts = VT.getVectorNumElements();
1906 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1908 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
1909 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1911 // Adjust mask based on new input vector length.
1912 SmallVector<int, 16> NewMask;
1913 for (unsigned i = 0; i != NumElts; ++i) {
1914 int Idx = N->getMaskElt(i);
1915 if (Idx < (int)NumElts)
1916 NewMask.push_back(Idx);
1918 NewMask.push_back(Idx - NumElts + WidenNumElts);
1920 for (unsigned i = NumElts; i != WidenNumElts; ++i)
1921 NewMask.push_back(-1);
1922 return DAG.getVectorShuffle(WidenVT, dl, InOp1, InOp2, &NewMask[0]);
1925 SDValue DAGTypeLegalizer::WidenVecRes_VSETCC(SDNode *N) {
1926 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1927 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1929 SDValue InOp1 = N->getOperand(0);
1930 EVT InVT = InOp1.getValueType();
1931 assert(InVT.isVector() && "can not widen non vector type");
1932 EVT WidenInVT = EVT::getVectorVT(*DAG.getContext(),
1933 InVT.getVectorElementType(), WidenNumElts);
1934 InOp1 = GetWidenedVector(InOp1);
1935 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1937 // Assume that the input and output will be widen appropriately. If not,
1938 // we will have to unroll it at some point.
1939 assert(InOp1.getValueType() == WidenInVT &&
1940 InOp2.getValueType() == WidenInVT &&
1941 "Input not widened to expected type!");
1942 return DAG.getNode(ISD::VSETCC, N->getDebugLoc(),
1943 WidenVT, InOp1, InOp2, N->getOperand(2));
1947 //===----------------------------------------------------------------------===//
1948 // Widen Vector Operand
1949 //===----------------------------------------------------------------------===//
1950 bool DAGTypeLegalizer::WidenVectorOperand(SDNode *N, unsigned ResNo) {
1951 DEBUG(dbgs() << "Widen node operand " << ResNo << ": ";
1954 SDValue Res = SDValue();
1956 switch (N->getOpcode()) {
1959 dbgs() << "WidenVectorOperand op #" << ResNo << ": ";
1963 llvm_unreachable("Do not know how to widen this operator's operand!");
1965 case ISD::BIT_CONVERT: Res = WidenVecOp_BIT_CONVERT(N); break;
1966 case ISD::CONCAT_VECTORS: Res = WidenVecOp_CONCAT_VECTORS(N); break;
1967 case ISD::EXTRACT_SUBVECTOR: Res = WidenVecOp_EXTRACT_SUBVECTOR(N); break;
1968 case ISD::EXTRACT_VECTOR_ELT: Res = WidenVecOp_EXTRACT_VECTOR_ELT(N); break;
1969 case ISD::STORE: Res = WidenVecOp_STORE(N); break;
1972 case ISD::FP_TO_SINT:
1973 case ISD::FP_TO_UINT:
1974 case ISD::SINT_TO_FP:
1975 case ISD::UINT_TO_FP:
1977 case ISD::SIGN_EXTEND:
1978 case ISD::ZERO_EXTEND:
1979 case ISD::ANY_EXTEND:
1980 Res = WidenVecOp_Convert(N);
1984 // If Res is null, the sub-method took care of registering the result.
1985 if (!Res.getNode()) return false;
1987 // If the result is N, the sub-method updated N in place. Tell the legalizer
1989 if (Res.getNode() == N)
1993 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
1994 "Invalid operand expansion");
1996 ReplaceValueWith(SDValue(N, 0), Res);
2000 SDValue DAGTypeLegalizer::WidenVecOp_Convert(SDNode *N) {
2001 // Since the result is legal and the input is illegal, it is unlikely
2002 // that we can fix the input to a legal type so unroll the convert
2003 // into some scalar code and create a nasty build vector.
2004 EVT VT = N->getValueType(0);
2005 EVT EltVT = VT.getVectorElementType();
2006 DebugLoc dl = N->getDebugLoc();
2007 unsigned NumElts = VT.getVectorNumElements();
2008 SDValue InOp = N->getOperand(0);
2009 if (getTypeAction(InOp.getValueType()) == WidenVector)
2010 InOp = GetWidenedVector(InOp);
2011 EVT InVT = InOp.getValueType();
2012 EVT InEltVT = InVT.getVectorElementType();
2014 unsigned Opcode = N->getOpcode();
2015 SmallVector<SDValue, 16> Ops(NumElts);
2016 for (unsigned i=0; i < NumElts; ++i)
2017 Ops[i] = DAG.getNode(Opcode, dl, EltVT,
2018 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, InEltVT, InOp,
2019 DAG.getIntPtrConstant(i)));
2021 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, &Ops[0], NumElts);
2024 SDValue DAGTypeLegalizer::WidenVecOp_BIT_CONVERT(SDNode *N) {
2025 EVT VT = N->getValueType(0);
2026 SDValue InOp = GetWidenedVector(N->getOperand(0));
2027 EVT InWidenVT = InOp.getValueType();
2028 DebugLoc dl = N->getDebugLoc();
2030 // Check if we can convert between two legal vector types and extract.
2031 unsigned InWidenSize = InWidenVT.getSizeInBits();
2032 unsigned Size = VT.getSizeInBits();
2033 if (InWidenSize % Size == 0 && !VT.isVector()) {
2034 unsigned NewNumElts = InWidenSize / Size;
2035 EVT NewVT = EVT::getVectorVT(*DAG.getContext(), VT, NewNumElts);
2036 if (TLI.isTypeSynthesizable(NewVT)) {
2037 SDValue BitOp = DAG.getNode(ISD::BIT_CONVERT, dl, NewVT, InOp);
2038 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, VT, BitOp,
2039 DAG.getIntPtrConstant(0));
2043 return CreateStackStoreLoad(InOp, VT);
2046 SDValue DAGTypeLegalizer::WidenVecOp_CONCAT_VECTORS(SDNode *N) {
2047 // If the input vector is not legal, it is likely that we will not find a
2048 // legal vector of the same size. Replace the concatenate vector with a
2049 // nasty build vector.
2050 EVT VT = N->getValueType(0);
2051 EVT EltVT = VT.getVectorElementType();
2052 DebugLoc dl = N->getDebugLoc();
2053 unsigned NumElts = VT.getVectorNumElements();
2054 SmallVector<SDValue, 16> Ops(NumElts);
2056 EVT InVT = N->getOperand(0).getValueType();
2057 unsigned NumInElts = InVT.getVectorNumElements();
2060 unsigned NumOperands = N->getNumOperands();
2061 for (unsigned i=0; i < NumOperands; ++i) {
2062 SDValue InOp = N->getOperand(i);
2063 if (getTypeAction(InOp.getValueType()) == WidenVector)
2064 InOp = GetWidenedVector(InOp);
2065 for (unsigned j=0; j < NumInElts; ++j)
2066 Ops[Idx++] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
2067 DAG.getIntPtrConstant(j));
2069 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, &Ops[0], NumElts);
2072 SDValue DAGTypeLegalizer::WidenVecOp_EXTRACT_SUBVECTOR(SDNode *N) {
2073 SDValue InOp = GetWidenedVector(N->getOperand(0));
2074 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, N->getDebugLoc(),
2075 N->getValueType(0), InOp, N->getOperand(1));
2078 SDValue DAGTypeLegalizer::WidenVecOp_EXTRACT_VECTOR_ELT(SDNode *N) {
2079 SDValue InOp = GetWidenedVector(N->getOperand(0));
2080 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, N->getDebugLoc(),
2081 N->getValueType(0), InOp, N->getOperand(1));
2084 SDValue DAGTypeLegalizer::WidenVecOp_STORE(SDNode *N) {
2085 // We have to widen the value but we want only to store the original
2087 StoreSDNode *ST = cast<StoreSDNode>(N);
2089 SmallVector<SDValue, 16> StChain;
2090 if (ST->isTruncatingStore())
2091 GenWidenVectorTruncStores(StChain, ST);
2093 GenWidenVectorStores(StChain, ST);
2095 if (StChain.size() == 1)
2098 return DAG.getNode(ISD::TokenFactor, ST->getDebugLoc(),
2099 MVT::Other,&StChain[0],StChain.size());
2102 //===----------------------------------------------------------------------===//
2103 // Vector Widening Utilities
2104 //===----------------------------------------------------------------------===//
2106 // Utility function to find the type to chop up a widen vector for load/store
2107 // TLI: Target lowering used to determine legal types.
2108 // Width: Width left need to load/store.
2109 // WidenVT: The widen vector type to load to/store from
2110 // Align: If 0, don't allow use of a wider type
2111 // WidenEx: If Align is not 0, the amount additional we can load/store from.
2113 static EVT FindMemType(SelectionDAG& DAG, const TargetLowering &TLI,
2114 unsigned Width, EVT WidenVT,
2115 unsigned Align = 0, unsigned WidenEx = 0) {
2116 EVT WidenEltVT = WidenVT.getVectorElementType();
2117 unsigned WidenWidth = WidenVT.getSizeInBits();
2118 unsigned WidenEltWidth = WidenEltVT.getSizeInBits();
2119 unsigned AlignInBits = Align*8;
2121 // If we have one element to load/store, return it.
2122 EVT RetVT = WidenEltVT;
2123 if (Width == WidenEltWidth)
2126 // See if there is larger legal integer than the element type to load/store
2128 for (VT = (unsigned)MVT::LAST_INTEGER_VALUETYPE;
2129 VT >= (unsigned)MVT::FIRST_INTEGER_VALUETYPE; --VT) {
2130 EVT MemVT((MVT::SimpleValueType) VT);
2131 unsigned MemVTWidth = MemVT.getSizeInBits();
2132 if (MemVT.getSizeInBits() <= WidenEltWidth)
2134 if (TLI.isTypeSynthesizable(MemVT) && (WidenWidth % MemVTWidth) == 0 &&
2135 (MemVTWidth <= Width ||
2136 (Align!=0 && MemVTWidth<=AlignInBits && MemVTWidth<=Width+WidenEx))) {
2142 // See if there is a larger vector type to load/store that has the same vector
2143 // element type and is evenly divisible with the WidenVT.
2144 for (VT = (unsigned)MVT::LAST_VECTOR_VALUETYPE;
2145 VT >= (unsigned)MVT::FIRST_VECTOR_VALUETYPE; --VT) {
2146 EVT MemVT = (MVT::SimpleValueType) VT;
2147 unsigned MemVTWidth = MemVT.getSizeInBits();
2148 if (TLI.isTypeSynthesizable(MemVT) && WidenEltVT == MemVT.getVectorElementType() &&
2149 (WidenWidth % MemVTWidth) == 0 &&
2150 (MemVTWidth <= Width ||
2151 (Align!=0 && MemVTWidth<=AlignInBits && MemVTWidth<=Width+WidenEx))) {
2152 if (RetVT.getSizeInBits() < MemVTWidth || MemVT == WidenVT)
2160 // Builds a vector type from scalar loads
2161 // VecTy: Resulting Vector type
2162 // LDOps: Load operators to build a vector type
2163 // [Start,End) the list of loads to use.
2164 static SDValue BuildVectorFromScalar(SelectionDAG& DAG, EVT VecTy,
2165 SmallVector<SDValue, 16>& LdOps,
2166 unsigned Start, unsigned End) {
2167 DebugLoc dl = LdOps[Start].getDebugLoc();
2168 EVT LdTy = LdOps[Start].getValueType();
2169 unsigned Width = VecTy.getSizeInBits();
2170 unsigned NumElts = Width / LdTy.getSizeInBits();
2171 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), LdTy, NumElts);
2174 SDValue VecOp = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, NewVecVT,LdOps[Start]);
2176 for (unsigned i = Start + 1; i != End; ++i) {
2177 EVT NewLdTy = LdOps[i].getValueType();
2178 if (NewLdTy != LdTy) {
2179 NumElts = Width / NewLdTy.getSizeInBits();
2180 NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewLdTy, NumElts);
2181 VecOp = DAG.getNode(ISD::BIT_CONVERT, dl, NewVecVT, VecOp);
2182 // Readjust position and vector position based on new load type
2183 Idx = Idx * LdTy.getSizeInBits() / NewLdTy.getSizeInBits();
2186 VecOp = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NewVecVT, VecOp, LdOps[i],
2187 DAG.getIntPtrConstant(Idx++));
2189 return DAG.getNode(ISD::BIT_CONVERT, dl, VecTy, VecOp);
2192 SDValue DAGTypeLegalizer::GenWidenVectorLoads(SmallVector<SDValue, 16>& LdChain,
2194 // The strategy assumes that we can efficiently load powers of two widths.
2195 // The routines chops the vector into the largest vector loads with the same
2196 // element type or scalar loads and then recombines it to the widen vector
2198 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(),LD->getValueType(0));
2199 unsigned WidenWidth = WidenVT.getSizeInBits();
2200 EVT LdVT = LD->getMemoryVT();
2201 DebugLoc dl = LD->getDebugLoc();
2202 assert(LdVT.isVector() && WidenVT.isVector());
2203 assert(LdVT.getVectorElementType() == WidenVT.getVectorElementType());
2206 SDValue Chain = LD->getChain();
2207 SDValue BasePtr = LD->getBasePtr();
2208 int SVOffset = LD->getSrcValueOffset();
2209 unsigned Align = LD->getAlignment();
2210 bool isVolatile = LD->isVolatile();
2211 bool isNonTemporal = LD->isNonTemporal();
2212 const Value *SV = LD->getSrcValue();
2214 int LdWidth = LdVT.getSizeInBits();
2215 int WidthDiff = WidenWidth - LdWidth; // Difference
2216 unsigned LdAlign = (isVolatile) ? 0 : Align; // Allow wider loads
2218 // Find the vector type that can load from.
2219 EVT NewVT = FindMemType(DAG, TLI, LdWidth, WidenVT, LdAlign, WidthDiff);
2220 int NewVTWidth = NewVT.getSizeInBits();
2221 SDValue LdOp = DAG.getLoad(NewVT, dl, Chain, BasePtr, SV, SVOffset,
2222 isVolatile, isNonTemporal, Align);
2223 LdChain.push_back(LdOp.getValue(1));
2225 // Check if we can load the element with one instruction
2226 if (LdWidth <= NewVTWidth) {
2227 if (NewVT.isVector()) {
2228 if (NewVT != WidenVT) {
2229 assert(WidenWidth % NewVTWidth == 0);
2230 unsigned NumConcat = WidenWidth / NewVTWidth;
2231 SmallVector<SDValue, 16> ConcatOps(NumConcat);
2232 SDValue UndefVal = DAG.getUNDEF(NewVT);
2233 ConcatOps[0] = LdOp;
2234 for (unsigned i = 1; i != NumConcat; ++i)
2235 ConcatOps[i] = UndefVal;
2236 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &ConcatOps[0],
2241 unsigned NumElts = WidenWidth / NewVTWidth;
2242 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewVT, NumElts);
2243 SDValue VecOp = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, NewVecVT, LdOp);
2244 return DAG.getNode(ISD::BIT_CONVERT, dl, WidenVT, VecOp);
2248 // Load vector by using multiple loads from largest vector to scalar
2249 SmallVector<SDValue, 16> LdOps;
2250 LdOps.push_back(LdOp);
2252 LdWidth -= NewVTWidth;
2253 unsigned Offset = 0;
2255 while (LdWidth > 0) {
2256 unsigned Increment = NewVTWidth / 8;
2257 Offset += Increment;
2258 BasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr,
2259 DAG.getIntPtrConstant(Increment));
2261 if (LdWidth < NewVTWidth) {
2262 // Our current type we are using is too large, find a better size
2263 NewVT = FindMemType(DAG, TLI, LdWidth, WidenVT, LdAlign, WidthDiff);
2264 NewVTWidth = NewVT.getSizeInBits();
2267 SDValue LdOp = DAG.getLoad(NewVT, dl, Chain, BasePtr, SV,
2268 SVOffset+Offset, isVolatile,
2269 isNonTemporal, MinAlign(Align, Increment));
2270 LdChain.push_back(LdOp.getValue(1));
2271 LdOps.push_back(LdOp);
2273 LdWidth -= NewVTWidth;
2276 // Build the vector from the loads operations
2277 unsigned End = LdOps.size();
2278 if (LdOps[0].getValueType().isVector()) {
2279 // If the load contains vectors, build the vector using concat vector.
2280 // All of the vectors used to loads are power of 2 and the scalars load
2281 // can be combined to make a power of 2 vector.
2282 SmallVector<SDValue, 16> ConcatOps(End);
2285 EVT LdTy = LdOps[i].getValueType();
2286 // First combine the scalar loads to a vector
2287 if (!LdTy.isVector()) {
2288 for (--i; i >= 0; --i) {
2289 LdTy = LdOps[i].getValueType();
2290 if (LdTy.isVector())
2293 ConcatOps[--Idx] = BuildVectorFromScalar(DAG, LdTy, LdOps, i+1, End);
2295 ConcatOps[--Idx] = LdOps[i];
2296 for (--i; i >= 0; --i) {
2297 EVT NewLdTy = LdOps[i].getValueType();
2298 if (NewLdTy != LdTy) {
2299 // Create a larger vector
2300 ConcatOps[End-1] = DAG.getNode(ISD::CONCAT_VECTORS, dl, NewLdTy,
2301 &ConcatOps[Idx], End - Idx);
2305 ConcatOps[--Idx] = LdOps[i];
2308 if (WidenWidth != LdTy.getSizeInBits()*(End - Idx)) {
2309 // We need to fill the rest with undefs to build the vector
2310 unsigned NumOps = WidenWidth / LdTy.getSizeInBits();
2311 SmallVector<SDValue, 16> WidenOps(NumOps);
2312 SDValue UndefVal = DAG.getUNDEF(LdTy);
2314 for (; i != End-Idx; ++i)
2315 WidenOps[i] = ConcatOps[Idx+i];
2316 for (; i != NumOps; ++i)
2317 WidenOps[i] = UndefVal;
2318 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &WidenOps[0],NumOps);
2320 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT,
2321 &ConcatOps[Idx], End - Idx);
2322 } else // All the loads are scalar loads.
2323 return BuildVectorFromScalar(DAG, WidenVT, LdOps, 0, End);
2327 DAGTypeLegalizer::GenWidenVectorExtLoads(SmallVector<SDValue, 16>& LdChain,
2329 ISD::LoadExtType ExtType) {
2330 // For extension loads, it may not be more efficient to chop up the vector
2331 // and then extended it. Instead, we unroll the load and build a new vector.
2332 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(),LD->getValueType(0));
2333 EVT LdVT = LD->getMemoryVT();
2334 DebugLoc dl = LD->getDebugLoc();
2335 assert(LdVT.isVector() && WidenVT.isVector());
2338 SDValue Chain = LD->getChain();
2339 SDValue BasePtr = LD->getBasePtr();
2340 int SVOffset = LD->getSrcValueOffset();
2341 unsigned Align = LD->getAlignment();
2342 bool isVolatile = LD->isVolatile();
2343 bool isNonTemporal = LD->isNonTemporal();
2344 const Value *SV = LD->getSrcValue();
2346 EVT EltVT = WidenVT.getVectorElementType();
2347 EVT LdEltVT = LdVT.getVectorElementType();
2348 unsigned NumElts = LdVT.getVectorNumElements();
2350 // Load each element and widen
2351 unsigned WidenNumElts = WidenVT.getVectorNumElements();
2352 SmallVector<SDValue, 16> Ops(WidenNumElts);
2353 unsigned Increment = LdEltVT.getSizeInBits() / 8;
2354 Ops[0] = DAG.getExtLoad(ExtType, dl, EltVT, Chain, BasePtr, SV, SVOffset,
2355 LdEltVT, isVolatile, isNonTemporal, Align);
2356 LdChain.push_back(Ops[0].getValue(1));
2357 unsigned i = 0, Offset = Increment;
2358 for (i=1; i < NumElts; ++i, Offset += Increment) {
2359 SDValue NewBasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(),
2360 BasePtr, DAG.getIntPtrConstant(Offset));
2361 Ops[i] = DAG.getExtLoad(ExtType, dl, EltVT, Chain, NewBasePtr, SV,
2362 SVOffset + Offset, LdEltVT, isVolatile,
2363 isNonTemporal, Align);
2364 LdChain.push_back(Ops[i].getValue(1));
2367 // Fill the rest with undefs
2368 SDValue UndefVal = DAG.getUNDEF(EltVT);
2369 for (; i != WidenNumElts; ++i)
2372 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], Ops.size());
2376 void DAGTypeLegalizer::GenWidenVectorStores(SmallVector<SDValue, 16>& StChain,
2378 // The strategy assumes that we can efficiently store powers of two widths.
2379 // The routines chops the vector into the largest vector stores with the same
2380 // element type or scalar stores.
2381 SDValue Chain = ST->getChain();
2382 SDValue BasePtr = ST->getBasePtr();
2383 const Value *SV = ST->getSrcValue();
2384 int SVOffset = ST->getSrcValueOffset();
2385 unsigned Align = ST->getAlignment();
2386 bool isVolatile = ST->isVolatile();
2387 bool isNonTemporal = ST->isNonTemporal();
2388 SDValue ValOp = GetWidenedVector(ST->getValue());
2389 DebugLoc dl = ST->getDebugLoc();
2391 EVT StVT = ST->getMemoryVT();
2392 unsigned StWidth = StVT.getSizeInBits();
2393 EVT ValVT = ValOp.getValueType();
2394 unsigned ValWidth = ValVT.getSizeInBits();
2395 EVT ValEltVT = ValVT.getVectorElementType();
2396 unsigned ValEltWidth = ValEltVT.getSizeInBits();
2397 assert(StVT.getVectorElementType() == ValEltVT);
2399 int Idx = 0; // current index to store
2400 unsigned Offset = 0; // offset from base to store
2401 while (StWidth != 0) {
2402 // Find the largest vector type we can store with
2403 EVT NewVT = FindMemType(DAG, TLI, StWidth, ValVT);
2404 unsigned NewVTWidth = NewVT.getSizeInBits();
2405 unsigned Increment = NewVTWidth / 8;
2406 if (NewVT.isVector()) {
2407 unsigned NumVTElts = NewVT.getVectorNumElements();
2409 SDValue EOp = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, NewVT, ValOp,
2410 DAG.getIntPtrConstant(Idx));
2411 StChain.push_back(DAG.getStore(Chain, dl, EOp, BasePtr, SV,
2412 SVOffset + Offset, isVolatile,
2414 MinAlign(Align, Offset)));
2415 StWidth -= NewVTWidth;
2416 Offset += Increment;
2418 BasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr,
2419 DAG.getIntPtrConstant(Increment));
2420 } while (StWidth != 0 && StWidth >= NewVTWidth);
2422 // Cast the vector to the scalar type we can store
2423 unsigned NumElts = ValWidth / NewVTWidth;
2424 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewVT, NumElts);
2425 SDValue VecOp = DAG.getNode(ISD::BIT_CONVERT, dl, NewVecVT, ValOp);
2426 // Readjust index position based on new vector type
2427 Idx = Idx * ValEltWidth / NewVTWidth;
2429 SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NewVT, VecOp,
2430 DAG.getIntPtrConstant(Idx++));
2431 StChain.push_back(DAG.getStore(Chain, dl, EOp, BasePtr, SV,
2432 SVOffset + Offset, isVolatile,
2433 isNonTemporal, MinAlign(Align, Offset)));
2434 StWidth -= NewVTWidth;
2435 Offset += Increment;
2436 BasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr,
2437 DAG.getIntPtrConstant(Increment));
2438 } while (StWidth != 0 && StWidth >= NewVTWidth);
2439 // Restore index back to be relative to the original widen element type
2440 Idx = Idx * NewVTWidth / ValEltWidth;
2446 DAGTypeLegalizer::GenWidenVectorTruncStores(SmallVector<SDValue, 16>& StChain,
2448 // For extension loads, it may not be more efficient to truncate the vector
2449 // and then store it. Instead, we extract each element and then store it.
2450 SDValue Chain = ST->getChain();
2451 SDValue BasePtr = ST->getBasePtr();
2452 const Value *SV = ST->getSrcValue();
2453 int SVOffset = ST->getSrcValueOffset();
2454 unsigned Align = ST->getAlignment();
2455 bool isVolatile = ST->isVolatile();
2456 bool isNonTemporal = ST->isNonTemporal();
2457 SDValue ValOp = GetWidenedVector(ST->getValue());
2458 DebugLoc dl = ST->getDebugLoc();
2460 EVT StVT = ST->getMemoryVT();
2461 EVT ValVT = ValOp.getValueType();
2463 // It must be true that we the widen vector type is bigger than where
2464 // we need to store.
2465 assert(StVT.isVector() && ValOp.getValueType().isVector());
2466 assert(StVT.bitsLT(ValOp.getValueType()));
2468 // For truncating stores, we can not play the tricks of chopping legal
2469 // vector types and bit cast it to the right type. Instead, we unroll
2471 EVT StEltVT = StVT.getVectorElementType();
2472 EVT ValEltVT = ValVT.getVectorElementType();
2473 unsigned Increment = ValEltVT.getSizeInBits() / 8;
2474 unsigned NumElts = StVT.getVectorNumElements();
2475 SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ValEltVT, ValOp,
2476 DAG.getIntPtrConstant(0));
2477 StChain.push_back(DAG.getTruncStore(Chain, dl, EOp, BasePtr, SV,
2479 isVolatile, isNonTemporal, Align));
2480 unsigned Offset = Increment;
2481 for (unsigned i=1; i < NumElts; ++i, Offset += Increment) {
2482 SDValue NewBasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(),
2483 BasePtr, DAG.getIntPtrConstant(Offset));
2484 SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ValEltVT, ValOp,
2485 DAG.getIntPtrConstant(0));
2486 StChain.push_back(DAG.getTruncStore(Chain, dl, EOp, NewBasePtr, SV,
2487 SVOffset + Offset, StEltVT,
2488 isVolatile, isNonTemporal,
2489 MinAlign(Align, Offset)));
2493 /// Modifies a vector input (widen or narrows) to a vector of NVT. The
2494 /// input vector must have the same element type as NVT.
2495 SDValue DAGTypeLegalizer::ModifyToType(SDValue InOp, EVT NVT) {
2496 // Note that InOp might have been widened so it might already have
2497 // the right width or it might need be narrowed.
2498 EVT InVT = InOp.getValueType();
2499 assert(InVT.getVectorElementType() == NVT.getVectorElementType() &&
2500 "input and widen element type must match");
2501 DebugLoc dl = InOp.getDebugLoc();
2503 // Check if InOp already has the right width.
2507 unsigned InNumElts = InVT.getVectorNumElements();
2508 unsigned WidenNumElts = NVT.getVectorNumElements();
2509 if (WidenNumElts > InNumElts && WidenNumElts % InNumElts == 0) {
2510 unsigned NumConcat = WidenNumElts / InNumElts;
2511 SmallVector<SDValue, 16> Ops(NumConcat);
2512 SDValue UndefVal = DAG.getUNDEF(InVT);
2514 for (unsigned i = 1; i != NumConcat; ++i)
2517 return DAG.getNode(ISD::CONCAT_VECTORS, dl, NVT, &Ops[0], NumConcat);
2520 if (WidenNumElts < InNumElts && InNumElts % WidenNumElts)
2521 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, NVT, InOp,
2522 DAG.getIntPtrConstant(0));
2524 // Fall back to extract and build.
2525 SmallVector<SDValue, 16> Ops(WidenNumElts);
2526 EVT EltVT = NVT.getVectorElementType();
2527 unsigned MinNumElts = std::min(WidenNumElts, InNumElts);
2529 for (Idx = 0; Idx < MinNumElts; ++Idx)
2530 Ops[Idx] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
2531 DAG.getIntPtrConstant(Idx));
2533 SDValue UndefVal = DAG.getUNDEF(EltVT);
2534 for ( ; Idx < WidenNumElts; ++Idx)
2535 Ops[Idx] = UndefVal;
2536 return DAG.getNode(ISD::BUILD_VECTOR, dl, NVT, &Ops[0], WidenNumElts);