1 //===------- LegalizeVectorTypes.cpp - Legalization of vector types -------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file performs vector type splitting and scalarization for LegalizeTypes.
11 // Scalarization is the act of changing a computation in an illegal one-element
12 // vector type to be a computation in its scalar element type. For example,
13 // implementing <1 x f32> arithmetic in a scalar f32 register. This is needed
14 // as a base case when scalarizing vector arithmetic like <4 x f32>, which
15 // eventually decomposes to scalars if the target doesn't support v4f32 or v2f32
17 // Splitting is the act of changing a computation in an invalid vector type to
18 // be a computation in two vectors of half the size. For example, implementing
19 // <128 x f32> operations in terms of two <64 x f32> operations.
21 //===----------------------------------------------------------------------===//
23 #include "LegalizeTypes.h"
24 #include "llvm/CodeGen/PseudoSourceValue.h"
25 #include "llvm/Target/TargetData.h"
26 #include "llvm/Support/ErrorHandling.h"
27 #include "llvm/Support/raw_ostream.h"
30 //===----------------------------------------------------------------------===//
31 // Result Vector Scalarization: <1 x ty> -> ty.
32 //===----------------------------------------------------------------------===//
34 void DAGTypeLegalizer::ScalarizeVectorResult(SDNode *N, unsigned ResNo) {
35 DEBUG(dbgs() << "Scalarize node result " << ResNo << ": ";
38 SDValue R = SDValue();
40 switch (N->getOpcode()) {
43 dbgs() << "ScalarizeVectorResult #" << ResNo << ": ";
47 llvm_unreachable("Do not know how to scalarize the result of this operator!");
49 case ISD::BITCAST: R = ScalarizeVecRes_BITCAST(N); break;
50 case ISD::BUILD_VECTOR: R = N->getOperand(0); break;
51 case ISD::CONVERT_RNDSAT: R = ScalarizeVecRes_CONVERT_RNDSAT(N); break;
52 case ISD::EXTRACT_SUBVECTOR: R = ScalarizeVecRes_EXTRACT_SUBVECTOR(N); break;
53 case ISD::FP_ROUND_INREG: R = ScalarizeVecRes_InregOp(N); break;
54 case ISD::FPOWI: R = ScalarizeVecRes_FPOWI(N); break;
55 case ISD::INSERT_VECTOR_ELT: R = ScalarizeVecRes_INSERT_VECTOR_ELT(N); break;
56 case ISD::LOAD: R = ScalarizeVecRes_LOAD(cast<LoadSDNode>(N));break;
57 case ISD::SCALAR_TO_VECTOR: R = ScalarizeVecRes_SCALAR_TO_VECTOR(N); break;
58 case ISD::SIGN_EXTEND_INREG: R = ScalarizeVecRes_InregOp(N); break;
59 case ISD::SELECT: R = ScalarizeVecRes_SELECT(N); break;
60 case ISD::SELECT_CC: R = ScalarizeVecRes_SELECT_CC(N); break;
61 case ISD::SETCC: R = ScalarizeVecRes_SETCC(N); break;
62 case ISD::UNDEF: R = ScalarizeVecRes_UNDEF(N); break;
63 case ISD::VECTOR_SHUFFLE: R = ScalarizeVecRes_VECTOR_SHUFFLE(N); break;
64 case ISD::VSETCC: R = ScalarizeVecRes_VSETCC(N); break;
88 case ISD::SIGN_EXTEND:
92 case ISD::ZERO_EXTEND:
93 R = ScalarizeVecRes_UnaryOp(N);
115 R = ScalarizeVecRes_BinOp(N);
119 // If R is null, the sub-method took care of registering the result.
121 SetScalarizedVector(SDValue(N, ResNo), R);
124 SDValue DAGTypeLegalizer::ScalarizeVecRes_BinOp(SDNode *N) {
125 SDValue LHS = GetScalarizedVector(N->getOperand(0));
126 SDValue RHS = GetScalarizedVector(N->getOperand(1));
127 return DAG.getNode(N->getOpcode(), N->getDebugLoc(),
128 LHS.getValueType(), LHS, RHS);
131 SDValue DAGTypeLegalizer::ScalarizeVecRes_BITCAST(SDNode *N) {
132 EVT NewVT = N->getValueType(0).getVectorElementType();
133 return DAG.getNode(ISD::BITCAST, N->getDebugLoc(),
134 NewVT, N->getOperand(0));
137 SDValue DAGTypeLegalizer::ScalarizeVecRes_CONVERT_RNDSAT(SDNode *N) {
138 EVT NewVT = N->getValueType(0).getVectorElementType();
139 SDValue Op0 = GetScalarizedVector(N->getOperand(0));
140 return DAG.getConvertRndSat(NewVT, N->getDebugLoc(),
141 Op0, DAG.getValueType(NewVT),
142 DAG.getValueType(Op0.getValueType()),
145 cast<CvtRndSatSDNode>(N)->getCvtCode());
148 SDValue DAGTypeLegalizer::ScalarizeVecRes_EXTRACT_SUBVECTOR(SDNode *N) {
149 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, N->getDebugLoc(),
150 N->getValueType(0).getVectorElementType(),
151 N->getOperand(0), N->getOperand(1));
154 SDValue DAGTypeLegalizer::ScalarizeVecRes_FPOWI(SDNode *N) {
155 SDValue Op = GetScalarizedVector(N->getOperand(0));
156 return DAG.getNode(ISD::FPOWI, N->getDebugLoc(),
157 Op.getValueType(), Op, N->getOperand(1));
160 SDValue DAGTypeLegalizer::ScalarizeVecRes_INSERT_VECTOR_ELT(SDNode *N) {
161 // The value to insert may have a wider type than the vector element type,
162 // so be sure to truncate it to the element type if necessary.
163 SDValue Op = N->getOperand(1);
164 EVT EltVT = N->getValueType(0).getVectorElementType();
165 if (Op.getValueType() != EltVT)
166 // FIXME: Can this happen for floating point types?
167 Op = DAG.getNode(ISD::TRUNCATE, N->getDebugLoc(), EltVT, Op);
171 SDValue DAGTypeLegalizer::ScalarizeVecRes_LOAD(LoadSDNode *N) {
172 assert(N->isUnindexed() && "Indexed vector load?");
174 SDValue Result = DAG.getLoad(ISD::UNINDEXED,
175 N->getExtensionType(),
176 N->getValueType(0).getVectorElementType(),
178 N->getChain(), N->getBasePtr(),
179 DAG.getUNDEF(N->getBasePtr().getValueType()),
181 N->getMemoryVT().getVectorElementType(),
182 N->isVolatile(), N->isNonTemporal(),
183 N->getOriginalAlignment());
185 // Legalized the chain result - switch anything that used the old chain to
187 ReplaceValueWith(SDValue(N, 1), Result.getValue(1));
191 SDValue DAGTypeLegalizer::ScalarizeVecRes_UnaryOp(SDNode *N) {
192 // Get the dest type - it doesn't always match the input type, e.g. int_to_fp.
193 EVT DestVT = N->getValueType(0).getVectorElementType();
194 SDValue Op = GetScalarizedVector(N->getOperand(0));
195 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), DestVT, Op);
198 SDValue DAGTypeLegalizer::ScalarizeVecRes_InregOp(SDNode *N) {
199 EVT EltVT = N->getValueType(0).getVectorElementType();
200 EVT ExtVT = cast<VTSDNode>(N->getOperand(1))->getVT().getVectorElementType();
201 SDValue LHS = GetScalarizedVector(N->getOperand(0));
202 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), EltVT,
203 LHS, DAG.getValueType(ExtVT));
206 SDValue DAGTypeLegalizer::ScalarizeVecRes_SCALAR_TO_VECTOR(SDNode *N) {
207 // If the operand is wider than the vector element type then it is implicitly
208 // truncated. Make that explicit here.
209 EVT EltVT = N->getValueType(0).getVectorElementType();
210 SDValue InOp = N->getOperand(0);
211 if (InOp.getValueType() != EltVT)
212 return DAG.getNode(ISD::TRUNCATE, N->getDebugLoc(), EltVT, InOp);
216 SDValue DAGTypeLegalizer::ScalarizeVecRes_SELECT(SDNode *N) {
217 SDValue LHS = GetScalarizedVector(N->getOperand(1));
218 return DAG.getNode(ISD::SELECT, N->getDebugLoc(),
219 LHS.getValueType(), N->getOperand(0), LHS,
220 GetScalarizedVector(N->getOperand(2)));
223 SDValue DAGTypeLegalizer::ScalarizeVecRes_SELECT_CC(SDNode *N) {
224 SDValue LHS = GetScalarizedVector(N->getOperand(2));
225 return DAG.getNode(ISD::SELECT_CC, N->getDebugLoc(), LHS.getValueType(),
226 N->getOperand(0), N->getOperand(1),
227 LHS, GetScalarizedVector(N->getOperand(3)),
231 SDValue DAGTypeLegalizer::ScalarizeVecRes_SETCC(SDNode *N) {
232 SDValue LHS = GetScalarizedVector(N->getOperand(0));
233 SDValue RHS = GetScalarizedVector(N->getOperand(1));
234 DebugLoc DL = N->getDebugLoc();
236 // Turn it into a scalar SETCC.
237 return DAG.getNode(ISD::SETCC, DL, MVT::i1, LHS, RHS, N->getOperand(2));
240 SDValue DAGTypeLegalizer::ScalarizeVecRes_UNDEF(SDNode *N) {
241 return DAG.getUNDEF(N->getValueType(0).getVectorElementType());
244 SDValue DAGTypeLegalizer::ScalarizeVecRes_VECTOR_SHUFFLE(SDNode *N) {
245 // Figure out if the scalar is the LHS or RHS and return it.
246 SDValue Arg = N->getOperand(2).getOperand(0);
247 if (Arg.getOpcode() == ISD::UNDEF)
248 return DAG.getUNDEF(N->getValueType(0).getVectorElementType());
249 unsigned Op = !cast<ConstantSDNode>(Arg)->isNullValue();
250 return GetScalarizedVector(N->getOperand(Op));
253 SDValue DAGTypeLegalizer::ScalarizeVecRes_VSETCC(SDNode *N) {
254 SDValue LHS = GetScalarizedVector(N->getOperand(0));
255 SDValue RHS = GetScalarizedVector(N->getOperand(1));
256 EVT NVT = N->getValueType(0).getVectorElementType();
257 EVT SVT = TLI.getSetCCResultType(LHS.getValueType());
258 DebugLoc DL = N->getDebugLoc();
260 // Turn it into a scalar SETCC.
261 SDValue Res = DAG.getNode(ISD::SETCC, DL, SVT, LHS, RHS, N->getOperand(2));
263 // VSETCC always returns a sign-extended value, while SETCC may not. The
264 // SETCC result type may not match the vector element type. Correct these.
265 if (NVT.bitsLE(SVT)) {
266 // The SETCC result type is bigger than the vector element type.
267 // Ensure the SETCC result is sign-extended.
268 if (TLI.getBooleanContents() !=
269 TargetLowering::ZeroOrNegativeOneBooleanContent)
270 Res = DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, SVT, Res,
271 DAG.getValueType(MVT::i1));
272 // Truncate to the final type.
273 return DAG.getNode(ISD::TRUNCATE, DL, NVT, Res);
276 // The SETCC result type is smaller than the vector element type.
277 // If the SetCC result is not sign-extended, chop it down to MVT::i1.
278 if (TLI.getBooleanContents() !=
279 TargetLowering::ZeroOrNegativeOneBooleanContent)
280 Res = DAG.getNode(ISD::TRUNCATE, DL, MVT::i1, Res);
281 // Sign extend to the final type.
282 return DAG.getNode(ISD::SIGN_EXTEND, DL, NVT, Res);
286 //===----------------------------------------------------------------------===//
287 // Operand Vector Scalarization <1 x ty> -> ty.
288 //===----------------------------------------------------------------------===//
290 bool DAGTypeLegalizer::ScalarizeVectorOperand(SDNode *N, unsigned OpNo) {
291 DEBUG(dbgs() << "Scalarize node operand " << OpNo << ": ";
294 SDValue Res = SDValue();
296 if (Res.getNode() == 0) {
297 switch (N->getOpcode()) {
300 dbgs() << "ScalarizeVectorOperand Op #" << OpNo << ": ";
304 llvm_unreachable("Do not know how to scalarize this operator's operand!");
306 Res = ScalarizeVecOp_BITCAST(N);
308 case ISD::CONCAT_VECTORS:
309 Res = ScalarizeVecOp_CONCAT_VECTORS(N);
311 case ISD::EXTRACT_VECTOR_ELT:
312 Res = ScalarizeVecOp_EXTRACT_VECTOR_ELT(N);
315 Res = ScalarizeVecOp_STORE(cast<StoreSDNode>(N), OpNo);
320 // If the result is null, the sub-method took care of registering results etc.
321 if (!Res.getNode()) return false;
323 // If the result is N, the sub-method updated N in place. Tell the legalizer
325 if (Res.getNode() == N)
328 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
329 "Invalid operand expansion");
331 ReplaceValueWith(SDValue(N, 0), Res);
335 /// ScalarizeVecOp_BITCAST - If the value to convert is a vector that needs
336 /// to be scalarized, it must be <1 x ty>. Convert the element instead.
337 SDValue DAGTypeLegalizer::ScalarizeVecOp_BITCAST(SDNode *N) {
338 SDValue Elt = GetScalarizedVector(N->getOperand(0));
339 return DAG.getNode(ISD::BITCAST, N->getDebugLoc(),
340 N->getValueType(0), Elt);
343 /// ScalarizeVecOp_CONCAT_VECTORS - The vectors to concatenate have length one -
344 /// use a BUILD_VECTOR instead.
345 SDValue DAGTypeLegalizer::ScalarizeVecOp_CONCAT_VECTORS(SDNode *N) {
346 SmallVector<SDValue, 8> Ops(N->getNumOperands());
347 for (unsigned i = 0, e = N->getNumOperands(); i < e; ++i)
348 Ops[i] = GetScalarizedVector(N->getOperand(i));
349 return DAG.getNode(ISD::BUILD_VECTOR, N->getDebugLoc(), N->getValueType(0),
350 &Ops[0], Ops.size());
353 /// ScalarizeVecOp_EXTRACT_VECTOR_ELT - If the input is a vector that needs to
354 /// be scalarized, it must be <1 x ty>, so just return the element, ignoring the
356 SDValue DAGTypeLegalizer::ScalarizeVecOp_EXTRACT_VECTOR_ELT(SDNode *N) {
357 SDValue Res = GetScalarizedVector(N->getOperand(0));
358 if (Res.getValueType() != N->getValueType(0))
359 Res = DAG.getNode(ISD::ANY_EXTEND, N->getDebugLoc(), N->getValueType(0),
364 /// ScalarizeVecOp_STORE - If the value to store is a vector that needs to be
365 /// scalarized, it must be <1 x ty>. Just store the element.
366 SDValue DAGTypeLegalizer::ScalarizeVecOp_STORE(StoreSDNode *N, unsigned OpNo){
367 assert(N->isUnindexed() && "Indexed store of one-element vector?");
368 assert(OpNo == 1 && "Do not know how to scalarize this operand!");
369 DebugLoc dl = N->getDebugLoc();
371 if (N->isTruncatingStore())
372 return DAG.getTruncStore(N->getChain(), dl,
373 GetScalarizedVector(N->getOperand(1)),
374 N->getBasePtr(), N->getPointerInfo(),
375 N->getMemoryVT().getVectorElementType(),
376 N->isVolatile(), N->isNonTemporal(),
379 return DAG.getStore(N->getChain(), dl, GetScalarizedVector(N->getOperand(1)),
380 N->getBasePtr(), N->getPointerInfo(),
381 N->isVolatile(), N->isNonTemporal(),
382 N->getOriginalAlignment());
386 //===----------------------------------------------------------------------===//
387 // Result Vector Splitting
388 //===----------------------------------------------------------------------===//
390 /// SplitVectorResult - This method is called when the specified result of the
391 /// specified node is found to need vector splitting. At this point, the node
392 /// may also have invalid operands or may have other results that need
393 /// legalization, we just know that (at least) one result needs vector
395 void DAGTypeLegalizer::SplitVectorResult(SDNode *N, unsigned ResNo) {
396 DEBUG(dbgs() << "Split node result: ";
401 switch (N->getOpcode()) {
404 dbgs() << "SplitVectorResult #" << ResNo << ": ";
408 llvm_unreachable("Do not know how to split the result of this operator!");
410 case ISD::MERGE_VALUES: SplitRes_MERGE_VALUES(N, Lo, Hi); break;
411 case ISD::SELECT: SplitRes_SELECT(N, Lo, Hi); break;
412 case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break;
413 case ISD::UNDEF: SplitRes_UNDEF(N, Lo, Hi); break;
415 case ISD::BITCAST: SplitVecRes_BITCAST(N, Lo, Hi); break;
416 case ISD::BUILD_VECTOR: SplitVecRes_BUILD_VECTOR(N, Lo, Hi); break;
417 case ISD::CONCAT_VECTORS: SplitVecRes_CONCAT_VECTORS(N, Lo, Hi); break;
418 case ISD::CONVERT_RNDSAT: SplitVecRes_CONVERT_RNDSAT(N, Lo, Hi); break;
419 case ISD::EXTRACT_SUBVECTOR: SplitVecRes_EXTRACT_SUBVECTOR(N, Lo, Hi); break;
420 case ISD::FP_ROUND_INREG: SplitVecRes_InregOp(N, Lo, Hi); break;
421 case ISD::FPOWI: SplitVecRes_FPOWI(N, Lo, Hi); break;
422 case ISD::INSERT_VECTOR_ELT: SplitVecRes_INSERT_VECTOR_ELT(N, Lo, Hi); break;
423 case ISD::SCALAR_TO_VECTOR: SplitVecRes_SCALAR_TO_VECTOR(N, Lo, Hi); break;
424 case ISD::SIGN_EXTEND_INREG: SplitVecRes_InregOp(N, Lo, Hi); break;
426 SplitVecRes_LOAD(cast<LoadSDNode>(N), Lo, Hi);
430 SplitVecRes_SETCC(N, Lo, Hi);
432 case ISD::VECTOR_SHUFFLE:
433 SplitVecRes_VECTOR_SHUFFLE(cast<ShuffleVectorSDNode>(N), Lo, Hi);
436 case ISD::ANY_EXTEND:
449 case ISD::FNEARBYINT:
452 case ISD::FP_TO_SINT:
453 case ISD::FP_TO_UINT:
458 case ISD::SIGN_EXTEND:
459 case ISD::SINT_TO_FP:
461 case ISD::UINT_TO_FP:
462 case ISD::ZERO_EXTEND:
463 SplitVecRes_UnaryOp(N, Lo, Hi);
485 SplitVecRes_BinOp(N, Lo, Hi);
489 // If Lo/Hi is null, the sub-method took care of registering results etc.
491 SetSplitVector(SDValue(N, ResNo), Lo, Hi);
494 void DAGTypeLegalizer::SplitVecRes_BinOp(SDNode *N, SDValue &Lo,
496 SDValue LHSLo, LHSHi;
497 GetSplitVector(N->getOperand(0), LHSLo, LHSHi);
498 SDValue RHSLo, RHSHi;
499 GetSplitVector(N->getOperand(1), RHSLo, RHSHi);
500 DebugLoc dl = N->getDebugLoc();
502 Lo = DAG.getNode(N->getOpcode(), dl, LHSLo.getValueType(), LHSLo, RHSLo);
503 Hi = DAG.getNode(N->getOpcode(), dl, LHSHi.getValueType(), LHSHi, RHSHi);
506 void DAGTypeLegalizer::SplitVecRes_BITCAST(SDNode *N, SDValue &Lo,
508 // We know the result is a vector. The input may be either a vector or a
511 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
512 DebugLoc dl = N->getDebugLoc();
514 SDValue InOp = N->getOperand(0);
515 EVT InVT = InOp.getValueType();
517 // Handle some special cases efficiently.
518 switch (getTypeAction(InVT)) {
520 assert(false && "Unknown type action!");
524 case ScalarizeVector:
528 // A scalar to vector conversion, where the scalar needs expansion.
529 // If the vector is being split in two then we can just convert the
532 GetExpandedOp(InOp, Lo, Hi);
533 if (TLI.isBigEndian())
535 Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo);
536 Hi = DAG.getNode(ISD::BITCAST, dl, HiVT, Hi);
541 // If the input is a vector that needs to be split, convert each split
542 // piece of the input now.
543 GetSplitVector(InOp, Lo, Hi);
544 Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo);
545 Hi = DAG.getNode(ISD::BITCAST, dl, HiVT, Hi);
549 // In the general case, convert the input to an integer and split it by hand.
550 EVT LoIntVT = EVT::getIntegerVT(*DAG.getContext(), LoVT.getSizeInBits());
551 EVT HiIntVT = EVT::getIntegerVT(*DAG.getContext(), HiVT.getSizeInBits());
552 if (TLI.isBigEndian())
553 std::swap(LoIntVT, HiIntVT);
555 SplitInteger(BitConvertToInteger(InOp), LoIntVT, HiIntVT, Lo, Hi);
557 if (TLI.isBigEndian())
559 Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo);
560 Hi = DAG.getNode(ISD::BITCAST, dl, HiVT, Hi);
563 void DAGTypeLegalizer::SplitVecRes_BUILD_VECTOR(SDNode *N, SDValue &Lo,
566 DebugLoc dl = N->getDebugLoc();
567 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
568 unsigned LoNumElts = LoVT.getVectorNumElements();
569 SmallVector<SDValue, 8> LoOps(N->op_begin(), N->op_begin()+LoNumElts);
570 Lo = DAG.getNode(ISD::BUILD_VECTOR, dl, LoVT, &LoOps[0], LoOps.size());
572 SmallVector<SDValue, 8> HiOps(N->op_begin()+LoNumElts, N->op_end());
573 Hi = DAG.getNode(ISD::BUILD_VECTOR, dl, HiVT, &HiOps[0], HiOps.size());
576 void DAGTypeLegalizer::SplitVecRes_CONCAT_VECTORS(SDNode *N, SDValue &Lo,
578 assert(!(N->getNumOperands() & 1) && "Unsupported CONCAT_VECTORS");
579 DebugLoc dl = N->getDebugLoc();
580 unsigned NumSubvectors = N->getNumOperands() / 2;
581 if (NumSubvectors == 1) {
582 Lo = N->getOperand(0);
583 Hi = N->getOperand(1);
588 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
590 SmallVector<SDValue, 8> LoOps(N->op_begin(), N->op_begin()+NumSubvectors);
591 Lo = DAG.getNode(ISD::CONCAT_VECTORS, dl, LoVT, &LoOps[0], LoOps.size());
593 SmallVector<SDValue, 8> HiOps(N->op_begin()+NumSubvectors, N->op_end());
594 Hi = DAG.getNode(ISD::CONCAT_VECTORS, dl, HiVT, &HiOps[0], HiOps.size());
597 void DAGTypeLegalizer::SplitVecRes_CONVERT_RNDSAT(SDNode *N, SDValue &Lo,
600 DebugLoc dl = N->getDebugLoc();
601 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
603 SDValue DTyOpLo = DAG.getValueType(LoVT);
604 SDValue DTyOpHi = DAG.getValueType(HiVT);
606 SDValue RndOp = N->getOperand(3);
607 SDValue SatOp = N->getOperand(4);
608 ISD::CvtCode CvtCode = cast<CvtRndSatSDNode>(N)->getCvtCode();
612 EVT InVT = N->getOperand(0).getValueType();
613 switch (getTypeAction(InVT)) {
614 default: llvm_unreachable("Unexpected type action!");
616 EVT InNVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(),
617 LoVT.getVectorNumElements());
618 VLo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, N->getOperand(0),
619 DAG.getIntPtrConstant(0));
620 VHi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, N->getOperand(0),
621 DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
625 GetSplitVector(N->getOperand(0), VLo, VHi);
628 // If the result needs to be split and the input needs to be widened,
629 // the two types must have different lengths. Use the widened result
630 // and extract from it to do the split.
631 SDValue InOp = GetWidenedVector(N->getOperand(0));
632 EVT InNVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(),
633 LoVT.getVectorNumElements());
634 VLo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, InOp,
635 DAG.getIntPtrConstant(0));
636 VHi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, InOp,
637 DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
642 SDValue STyOpLo = DAG.getValueType(VLo.getValueType());
643 SDValue STyOpHi = DAG.getValueType(VHi.getValueType());
645 Lo = DAG.getConvertRndSat(LoVT, dl, VLo, DTyOpLo, STyOpLo, RndOp, SatOp,
647 Hi = DAG.getConvertRndSat(HiVT, dl, VHi, DTyOpHi, STyOpHi, RndOp, SatOp,
651 void DAGTypeLegalizer::SplitVecRes_EXTRACT_SUBVECTOR(SDNode *N, SDValue &Lo,
653 SDValue Vec = N->getOperand(0);
654 SDValue Idx = N->getOperand(1);
655 DebugLoc dl = N->getDebugLoc();
658 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
660 Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, LoVT, Vec, Idx);
661 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
662 Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, HiVT, Vec,
663 DAG.getIntPtrConstant(IdxVal + LoVT.getVectorNumElements()));
666 void DAGTypeLegalizer::SplitVecRes_FPOWI(SDNode *N, SDValue &Lo,
668 DebugLoc dl = N->getDebugLoc();
669 GetSplitVector(N->getOperand(0), Lo, Hi);
670 Lo = DAG.getNode(ISD::FPOWI, dl, Lo.getValueType(), Lo, N->getOperand(1));
671 Hi = DAG.getNode(ISD::FPOWI, dl, Hi.getValueType(), Hi, N->getOperand(1));
674 void DAGTypeLegalizer::SplitVecRes_InregOp(SDNode *N, SDValue &Lo,
676 SDValue LHSLo, LHSHi;
677 GetSplitVector(N->getOperand(0), LHSLo, LHSHi);
678 DebugLoc dl = N->getDebugLoc();
681 GetSplitDestVTs(cast<VTSDNode>(N->getOperand(1))->getVT(), LoVT, HiVT);
683 Lo = DAG.getNode(N->getOpcode(), dl, LHSLo.getValueType(), LHSLo,
684 DAG.getValueType(LoVT));
685 Hi = DAG.getNode(N->getOpcode(), dl, LHSHi.getValueType(), LHSHi,
686 DAG.getValueType(HiVT));
689 void DAGTypeLegalizer::SplitVecRes_INSERT_VECTOR_ELT(SDNode *N, SDValue &Lo,
691 SDValue Vec = N->getOperand(0);
692 SDValue Elt = N->getOperand(1);
693 SDValue Idx = N->getOperand(2);
694 DebugLoc dl = N->getDebugLoc();
695 GetSplitVector(Vec, Lo, Hi);
697 if (ConstantSDNode *CIdx = dyn_cast<ConstantSDNode>(Idx)) {
698 unsigned IdxVal = CIdx->getZExtValue();
699 unsigned LoNumElts = Lo.getValueType().getVectorNumElements();
700 if (IdxVal < LoNumElts)
701 Lo = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl,
702 Lo.getValueType(), Lo, Elt, Idx);
704 Hi = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, Hi.getValueType(), Hi, Elt,
705 DAG.getIntPtrConstant(IdxVal - LoNumElts));
709 // Spill the vector to the stack.
710 EVT VecVT = Vec.getValueType();
711 EVT EltVT = VecVT.getVectorElementType();
712 SDValue StackPtr = DAG.CreateStackTemporary(VecVT);
713 SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, Vec, StackPtr,
714 MachinePointerInfo(), false, false, 0);
716 // Store the new element. This may be larger than the vector element type,
717 // so use a truncating store.
718 SDValue EltPtr = GetVectorElementPointer(StackPtr, EltVT, Idx);
719 const Type *VecType = VecVT.getTypeForEVT(*DAG.getContext());
721 TLI.getTargetData()->getPrefTypeAlignment(VecType);
722 Store = DAG.getTruncStore(Store, dl, Elt, EltPtr, MachinePointerInfo(), EltVT,
725 // Load the Lo part from the stack slot.
726 Lo = DAG.getLoad(Lo.getValueType(), dl, Store, StackPtr, MachinePointerInfo(),
729 // Increment the pointer to the other part.
730 unsigned IncrementSize = Lo.getValueType().getSizeInBits() / 8;
731 StackPtr = DAG.getNode(ISD::ADD, dl, StackPtr.getValueType(), StackPtr,
732 DAG.getIntPtrConstant(IncrementSize));
734 // Load the Hi part from the stack slot.
735 Hi = DAG.getLoad(Hi.getValueType(), dl, Store, StackPtr, MachinePointerInfo(),
736 false, false, MinAlign(Alignment, IncrementSize));
739 void DAGTypeLegalizer::SplitVecRes_SCALAR_TO_VECTOR(SDNode *N, SDValue &Lo,
742 DebugLoc dl = N->getDebugLoc();
743 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
744 Lo = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, LoVT, N->getOperand(0));
745 Hi = DAG.getUNDEF(HiVT);
748 void DAGTypeLegalizer::SplitVecRes_LOAD(LoadSDNode *LD, SDValue &Lo,
750 assert(ISD::isUNINDEXEDLoad(LD) && "Indexed load during type legalization!");
752 DebugLoc dl = LD->getDebugLoc();
753 GetSplitDestVTs(LD->getValueType(0), LoVT, HiVT);
755 ISD::LoadExtType ExtType = LD->getExtensionType();
756 SDValue Ch = LD->getChain();
757 SDValue Ptr = LD->getBasePtr();
758 SDValue Offset = DAG.getUNDEF(Ptr.getValueType());
759 EVT MemoryVT = LD->getMemoryVT();
760 unsigned Alignment = LD->getOriginalAlignment();
761 bool isVolatile = LD->isVolatile();
762 bool isNonTemporal = LD->isNonTemporal();
764 EVT LoMemVT, HiMemVT;
765 GetSplitDestVTs(MemoryVT, LoMemVT, HiMemVT);
767 Lo = DAG.getLoad(ISD::UNINDEXED, ExtType, LoVT, dl, Ch, Ptr, Offset,
768 LD->getPointerInfo(), LoMemVT, isVolatile, isNonTemporal,
771 unsigned IncrementSize = LoMemVT.getSizeInBits()/8;
772 Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr,
773 DAG.getIntPtrConstant(IncrementSize));
774 Hi = DAG.getLoad(ISD::UNINDEXED, ExtType, HiVT, dl, Ch, Ptr, Offset,
775 LD->getPointerInfo().getWithOffset(IncrementSize),
776 HiMemVT, isVolatile, isNonTemporal, Alignment);
778 // Build a factor node to remember that this load is independent of the
780 Ch = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Lo.getValue(1),
783 // Legalized the chain result - switch anything that used the old chain to
785 ReplaceValueWith(SDValue(LD, 1), Ch);
788 void DAGTypeLegalizer::SplitVecRes_SETCC(SDNode *N, SDValue &Lo, SDValue &Hi) {
790 DebugLoc DL = N->getDebugLoc();
791 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
794 EVT InVT = N->getOperand(0).getValueType();
795 SDValue LL, LH, RL, RH;
796 EVT InNVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(),
797 LoVT.getVectorNumElements());
798 LL = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(0),
799 DAG.getIntPtrConstant(0));
800 LH = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(0),
801 DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
803 RL = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(1),
804 DAG.getIntPtrConstant(0));
805 RH = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(1),
806 DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
808 Lo = DAG.getNode(N->getOpcode(), DL, LoVT, LL, RL, N->getOperand(2));
809 Hi = DAG.getNode(N->getOpcode(), DL, HiVT, LH, RH, N->getOperand(2));
812 void DAGTypeLegalizer::SplitVecRes_UnaryOp(SDNode *N, SDValue &Lo,
814 // Get the dest types - they may not match the input types, e.g. int_to_fp.
816 DebugLoc dl = N->getDebugLoc();
817 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
820 EVT InVT = N->getOperand(0).getValueType();
821 switch (getTypeAction(InVT)) {
822 default: llvm_unreachable("Unexpected type action!");
824 EVT InNVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(),
825 LoVT.getVectorNumElements());
826 Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, N->getOperand(0),
827 DAG.getIntPtrConstant(0));
828 Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, N->getOperand(0),
829 DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
833 GetSplitVector(N->getOperand(0), Lo, Hi);
836 // If the result needs to be split and the input needs to be widened,
837 // the two types must have different lengths. Use the widened result
838 // and extract from it to do the split.
839 SDValue InOp = GetWidenedVector(N->getOperand(0));
840 EVT InNVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(),
841 LoVT.getVectorNumElements());
842 Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, InOp,
843 DAG.getIntPtrConstant(0));
844 Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, InOp,
845 DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
850 Lo = DAG.getNode(N->getOpcode(), dl, LoVT, Lo);
851 Hi = DAG.getNode(N->getOpcode(), dl, HiVT, Hi);
854 void DAGTypeLegalizer::SplitVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N,
855 SDValue &Lo, SDValue &Hi) {
856 // The low and high parts of the original input give four input vectors.
858 DebugLoc dl = N->getDebugLoc();
859 GetSplitVector(N->getOperand(0), Inputs[0], Inputs[1]);
860 GetSplitVector(N->getOperand(1), Inputs[2], Inputs[3]);
861 EVT NewVT = Inputs[0].getValueType();
862 unsigned NewElts = NewVT.getVectorNumElements();
864 // If Lo or Hi uses elements from at most two of the four input vectors, then
865 // express it as a vector shuffle of those two inputs. Otherwise extract the
866 // input elements by hand and construct the Lo/Hi output using a BUILD_VECTOR.
867 SmallVector<int, 16> Ops;
868 for (unsigned High = 0; High < 2; ++High) {
869 SDValue &Output = High ? Hi : Lo;
871 // Build a shuffle mask for the output, discovering on the fly which
872 // input vectors to use as shuffle operands (recorded in InputUsed).
873 // If building a suitable shuffle vector proves too hard, then bail
874 // out with useBuildVector set.
875 unsigned InputUsed[2] = { -1U, -1U }; // Not yet discovered.
876 unsigned FirstMaskIdx = High * NewElts;
877 bool useBuildVector = false;
878 for (unsigned MaskOffset = 0; MaskOffset < NewElts; ++MaskOffset) {
879 // The mask element. This indexes into the input.
880 int Idx = N->getMaskElt(FirstMaskIdx + MaskOffset);
882 // The input vector this mask element indexes into.
883 unsigned Input = (unsigned)Idx / NewElts;
885 if (Input >= array_lengthof(Inputs)) {
886 // The mask element does not index into any input vector.
891 // Turn the index into an offset from the start of the input vector.
892 Idx -= Input * NewElts;
894 // Find or create a shuffle vector operand to hold this input.
896 for (OpNo = 0; OpNo < array_lengthof(InputUsed); ++OpNo) {
897 if (InputUsed[OpNo] == Input) {
898 // This input vector is already an operand.
900 } else if (InputUsed[OpNo] == -1U) {
901 // Create a new operand for this input vector.
902 InputUsed[OpNo] = Input;
907 if (OpNo >= array_lengthof(InputUsed)) {
908 // More than two input vectors used! Give up on trying to create a
909 // shuffle vector. Insert all elements into a BUILD_VECTOR instead.
910 useBuildVector = true;
914 // Add the mask index for the new shuffle vector.
915 Ops.push_back(Idx + OpNo * NewElts);
918 if (useBuildVector) {
919 EVT EltVT = NewVT.getVectorElementType();
920 SmallVector<SDValue, 16> SVOps;
922 // Extract the input elements by hand.
923 for (unsigned MaskOffset = 0; MaskOffset < NewElts; ++MaskOffset) {
924 // The mask element. This indexes into the input.
925 int Idx = N->getMaskElt(FirstMaskIdx + MaskOffset);
927 // The input vector this mask element indexes into.
928 unsigned Input = (unsigned)Idx / NewElts;
930 if (Input >= array_lengthof(Inputs)) {
931 // The mask element is "undef" or indexes off the end of the input.
932 SVOps.push_back(DAG.getUNDEF(EltVT));
936 // Turn the index into an offset from the start of the input vector.
937 Idx -= Input * NewElts;
939 // Extract the vector element by hand.
940 SVOps.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT,
941 Inputs[Input], DAG.getIntPtrConstant(Idx)));
944 // Construct the Lo/Hi output using a BUILD_VECTOR.
945 Output = DAG.getNode(ISD::BUILD_VECTOR,dl,NewVT, &SVOps[0], SVOps.size());
946 } else if (InputUsed[0] == -1U) {
947 // No input vectors were used! The result is undefined.
948 Output = DAG.getUNDEF(NewVT);
950 SDValue Op0 = Inputs[InputUsed[0]];
951 // If only one input was used, use an undefined vector for the other.
952 SDValue Op1 = InputUsed[1] == -1U ?
953 DAG.getUNDEF(NewVT) : Inputs[InputUsed[1]];
954 // At least one input vector was used. Create a new shuffle vector.
955 Output = DAG.getVectorShuffle(NewVT, dl, Op0, Op1, &Ops[0]);
963 //===----------------------------------------------------------------------===//
964 // Operand Vector Splitting
965 //===----------------------------------------------------------------------===//
967 /// SplitVectorOperand - This method is called when the specified operand of the
968 /// specified node is found to need vector splitting. At this point, all of the
969 /// result types of the node are known to be legal, but other operands of the
970 /// node may need legalization as well as the specified one.
971 bool DAGTypeLegalizer::SplitVectorOperand(SDNode *N, unsigned OpNo) {
972 DEBUG(dbgs() << "Split node operand: ";
975 SDValue Res = SDValue();
977 if (Res.getNode() == 0) {
978 switch (N->getOpcode()) {
981 dbgs() << "SplitVectorOperand Op #" << OpNo << ": ";
985 llvm_unreachable("Do not know how to split this operator's operand!");
987 case ISD::BITCAST: Res = SplitVecOp_BITCAST(N); break;
988 case ISD::EXTRACT_SUBVECTOR: Res = SplitVecOp_EXTRACT_SUBVECTOR(N); break;
989 case ISD::EXTRACT_VECTOR_ELT:Res = SplitVecOp_EXTRACT_VECTOR_ELT(N); break;
990 case ISD::CONCAT_VECTORS: Res = SplitVecOp_CONCAT_VECTORS(N); break;
991 case ISD::FP_ROUND: Res = SplitVecOp_FP_ROUND(N); break;
993 Res = SplitVecOp_STORE(cast<StoreSDNode>(N), OpNo);
1000 case ISD::FP_TO_SINT:
1001 case ISD::FP_TO_UINT:
1002 case ISD::SINT_TO_FP:
1003 case ISD::UINT_TO_FP:
1006 case ISD::SIGN_EXTEND:
1007 case ISD::ZERO_EXTEND:
1008 case ISD::ANY_EXTEND:
1009 Res = SplitVecOp_UnaryOp(N);
1014 // If the result is null, the sub-method took care of registering results etc.
1015 if (!Res.getNode()) return false;
1017 // If the result is N, the sub-method updated N in place. Tell the legalizer
1019 if (Res.getNode() == N)
1022 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
1023 "Invalid operand expansion");
1025 ReplaceValueWith(SDValue(N, 0), Res);
1029 SDValue DAGTypeLegalizer::SplitVecOp_UnaryOp(SDNode *N) {
1030 // The result has a legal vector type, but the input needs splitting.
1031 EVT ResVT = N->getValueType(0);
1033 DebugLoc dl = N->getDebugLoc();
1034 GetSplitVector(N->getOperand(0), Lo, Hi);
1035 EVT InVT = Lo.getValueType();
1037 EVT OutVT = EVT::getVectorVT(*DAG.getContext(), ResVT.getVectorElementType(),
1038 InVT.getVectorNumElements());
1040 Lo = DAG.getNode(N->getOpcode(), dl, OutVT, Lo);
1041 Hi = DAG.getNode(N->getOpcode(), dl, OutVT, Hi);
1043 return DAG.getNode(ISD::CONCAT_VECTORS, dl, ResVT, Lo, Hi);
1046 SDValue DAGTypeLegalizer::SplitVecOp_BITCAST(SDNode *N) {
1047 // For example, i64 = BITCAST v4i16 on alpha. Typically the vector will
1048 // end up being split all the way down to individual components. Convert the
1049 // split pieces into integers and reassemble.
1051 GetSplitVector(N->getOperand(0), Lo, Hi);
1052 Lo = BitConvertToInteger(Lo);
1053 Hi = BitConvertToInteger(Hi);
1055 if (TLI.isBigEndian())
1058 return DAG.getNode(ISD::BITCAST, N->getDebugLoc(), N->getValueType(0),
1059 JoinIntegers(Lo, Hi));
1062 SDValue DAGTypeLegalizer::SplitVecOp_EXTRACT_SUBVECTOR(SDNode *N) {
1063 // We know that the extracted result type is legal.
1064 EVT SubVT = N->getValueType(0);
1065 SDValue Idx = N->getOperand(1);
1066 DebugLoc dl = N->getDebugLoc();
1068 GetSplitVector(N->getOperand(0), Lo, Hi);
1070 uint64_t LoElts = Lo.getValueType().getVectorNumElements();
1071 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
1073 if (IdxVal < LoElts) {
1074 assert(IdxVal + SubVT.getVectorNumElements() <= LoElts &&
1075 "Extracted subvector crosses vector split!");
1076 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, SubVT, Lo, Idx);
1078 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, SubVT, Hi,
1079 DAG.getConstant(IdxVal - LoElts, Idx.getValueType()));
1083 SDValue DAGTypeLegalizer::SplitVecOp_EXTRACT_VECTOR_ELT(SDNode *N) {
1084 SDValue Vec = N->getOperand(0);
1085 SDValue Idx = N->getOperand(1);
1086 EVT VecVT = Vec.getValueType();
1088 if (isa<ConstantSDNode>(Idx)) {
1089 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
1090 assert(IdxVal < VecVT.getVectorNumElements() && "Invalid vector index!");
1093 GetSplitVector(Vec, Lo, Hi);
1095 uint64_t LoElts = Lo.getValueType().getVectorNumElements();
1097 if (IdxVal < LoElts)
1098 return SDValue(DAG.UpdateNodeOperands(N, Lo, Idx), 0);
1099 return SDValue(DAG.UpdateNodeOperands(N, Hi,
1100 DAG.getConstant(IdxVal - LoElts,
1101 Idx.getValueType())), 0);
1104 // Store the vector to the stack.
1105 EVT EltVT = VecVT.getVectorElementType();
1106 DebugLoc dl = N->getDebugLoc();
1107 SDValue StackPtr = DAG.CreateStackTemporary(VecVT);
1108 SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, Vec, StackPtr,
1109 MachinePointerInfo(), false, false, 0);
1111 // Load back the required element.
1112 StackPtr = GetVectorElementPointer(StackPtr, EltVT, Idx);
1113 return DAG.getExtLoad(ISD::EXTLOAD, dl, N->getValueType(0), Store, StackPtr,
1114 MachinePointerInfo(), EltVT, false, false, 0);
1117 SDValue DAGTypeLegalizer::SplitVecOp_STORE(StoreSDNode *N, unsigned OpNo) {
1118 assert(N->isUnindexed() && "Indexed store of vector?");
1119 assert(OpNo == 1 && "Can only split the stored value");
1120 DebugLoc DL = N->getDebugLoc();
1122 bool isTruncating = N->isTruncatingStore();
1123 SDValue Ch = N->getChain();
1124 SDValue Ptr = N->getBasePtr();
1125 EVT MemoryVT = N->getMemoryVT();
1126 unsigned Alignment = N->getOriginalAlignment();
1127 bool isVol = N->isVolatile();
1128 bool isNT = N->isNonTemporal();
1130 GetSplitVector(N->getOperand(1), Lo, Hi);
1132 EVT LoMemVT, HiMemVT;
1133 GetSplitDestVTs(MemoryVT, LoMemVT, HiMemVT);
1135 unsigned IncrementSize = LoMemVT.getSizeInBits()/8;
1138 Lo = DAG.getTruncStore(Ch, DL, Lo, Ptr, N->getPointerInfo(),
1139 LoMemVT, isVol, isNT, Alignment);
1141 Lo = DAG.getStore(Ch, DL, Lo, Ptr, N->getPointerInfo(),
1142 isVol, isNT, Alignment);
1144 // Increment the pointer to the other half.
1145 Ptr = DAG.getNode(ISD::ADD, DL, Ptr.getValueType(), Ptr,
1146 DAG.getIntPtrConstant(IncrementSize));
1149 Hi = DAG.getTruncStore(Ch, DL, Hi, Ptr,
1150 N->getPointerInfo().getWithOffset(IncrementSize),
1151 HiMemVT, isVol, isNT, Alignment);
1153 Hi = DAG.getStore(Ch, DL, Hi, Ptr,
1154 N->getPointerInfo().getWithOffset(IncrementSize),
1155 isVol, isNT, Alignment);
1157 return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Lo, Hi);
1160 SDValue DAGTypeLegalizer::SplitVecOp_CONCAT_VECTORS(SDNode *N) {
1161 DebugLoc DL = N->getDebugLoc();
1163 // The input operands all must have the same type, and we know the result the
1164 // result type is valid. Convert this to a buildvector which extracts all the
1166 // TODO: If the input elements are power-two vectors, we could convert this to
1167 // a new CONCAT_VECTORS node with elements that are half-wide.
1168 SmallVector<SDValue, 32> Elts;
1169 EVT EltVT = N->getValueType(0).getVectorElementType();
1170 for (unsigned op = 0, e = N->getNumOperands(); op != e; ++op) {
1171 SDValue Op = N->getOperand(op);
1172 for (unsigned i = 0, e = Op.getValueType().getVectorNumElements();
1174 Elts.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, EltVT,
1175 Op, DAG.getIntPtrConstant(i)));
1180 return DAG.getNode(ISD::BUILD_VECTOR, DL, N->getValueType(0),
1181 &Elts[0], Elts.size());
1184 SDValue DAGTypeLegalizer::SplitVecOp_FP_ROUND(SDNode *N) {
1185 // The result has a legal vector type, but the input needs splitting.
1186 EVT ResVT = N->getValueType(0);
1188 DebugLoc DL = N->getDebugLoc();
1189 GetSplitVector(N->getOperand(0), Lo, Hi);
1190 EVT InVT = Lo.getValueType();
1192 EVT OutVT = EVT::getVectorVT(*DAG.getContext(), ResVT.getVectorElementType(),
1193 InVT.getVectorNumElements());
1195 Lo = DAG.getNode(ISD::FP_ROUND, DL, OutVT, Lo, N->getOperand(1));
1196 Hi = DAG.getNode(ISD::FP_ROUND, DL, OutVT, Hi, N->getOperand(1));
1198 return DAG.getNode(ISD::CONCAT_VECTORS, DL, ResVT, Lo, Hi);
1203 //===----------------------------------------------------------------------===//
1204 // Result Vector Widening
1205 //===----------------------------------------------------------------------===//
1207 void DAGTypeLegalizer::WidenVectorResult(SDNode *N, unsigned ResNo) {
1208 DEBUG(dbgs() << "Widen node result " << ResNo << ": ";
1212 // See if the target wants to custom widen this node.
1213 if (CustomWidenLowerNode(N, N->getValueType(ResNo)))
1216 SDValue Res = SDValue();
1217 switch (N->getOpcode()) {
1220 dbgs() << "WidenVectorResult #" << ResNo << ": ";
1224 llvm_unreachable("Do not know how to widen the result of this operator!");
1226 case ISD::BITCAST: Res = WidenVecRes_BITCAST(N); break;
1227 case ISD::BUILD_VECTOR: Res = WidenVecRes_BUILD_VECTOR(N); break;
1228 case ISD::CONCAT_VECTORS: Res = WidenVecRes_CONCAT_VECTORS(N); break;
1229 case ISD::CONVERT_RNDSAT: Res = WidenVecRes_CONVERT_RNDSAT(N); break;
1230 case ISD::EXTRACT_SUBVECTOR: Res = WidenVecRes_EXTRACT_SUBVECTOR(N); break;
1231 case ISD::FP_ROUND_INREG: Res = WidenVecRes_InregOp(N); break;
1232 case ISD::INSERT_VECTOR_ELT: Res = WidenVecRes_INSERT_VECTOR_ELT(N); break;
1233 case ISD::LOAD: Res = WidenVecRes_LOAD(N); break;
1234 case ISD::SCALAR_TO_VECTOR: Res = WidenVecRes_SCALAR_TO_VECTOR(N); break;
1235 case ISD::SIGN_EXTEND_INREG: Res = WidenVecRes_InregOp(N); break;
1236 case ISD::SELECT: Res = WidenVecRes_SELECT(N); break;
1237 case ISD::SELECT_CC: Res = WidenVecRes_SELECT_CC(N); break;
1238 case ISD::SETCC: Res = WidenVecRes_SETCC(N); break;
1239 case ISD::UNDEF: Res = WidenVecRes_UNDEF(N); break;
1240 case ISD::VECTOR_SHUFFLE:
1241 Res = WidenVecRes_VECTOR_SHUFFLE(cast<ShuffleVectorSDNode>(N));
1244 Res = WidenVecRes_VSETCC(N);
1251 case ISD::FCOPYSIGN:
1267 Res = WidenVecRes_Binary(N);
1271 Res = WidenVecRes_POWI(N);
1277 Res = WidenVecRes_Shift(N);
1280 case ISD::ANY_EXTEND:
1281 case ISD::FP_EXTEND:
1283 case ISD::FP_TO_SINT:
1284 case ISD::FP_TO_UINT:
1285 case ISD::SIGN_EXTEND:
1286 case ISD::SINT_TO_FP:
1288 case ISD::UINT_TO_FP:
1289 case ISD::ZERO_EXTEND:
1290 Res = WidenVecRes_Convert(N);
1305 case ISD::FNEARBYINT:
1311 Res = WidenVecRes_Unary(N);
1315 // If Res is null, the sub-method took care of registering the result.
1317 SetWidenedVector(SDValue(N, ResNo), Res);
1320 SDValue DAGTypeLegalizer::WidenVecRes_Binary(SDNode *N) {
1321 // Binary op widening.
1322 unsigned Opcode = N->getOpcode();
1323 DebugLoc dl = N->getDebugLoc();
1324 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1325 EVT WidenEltVT = WidenVT.getVectorElementType();
1327 unsigned NumElts = VT.getVectorNumElements();
1328 while (!TLI.isTypeLegal(VT) && NumElts != 1) {
1329 NumElts = NumElts / 2;
1330 VT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NumElts);
1333 if (NumElts != 1 && !TLI.canOpTrap(N->getOpcode(), VT)) {
1334 // Operation doesn't trap so just widen as normal.
1335 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
1336 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1337 return DAG.getNode(N->getOpcode(), dl, WidenVT, InOp1, InOp2);
1340 // No legal vector version so unroll the vector operation and then widen.
1342 return DAG.UnrollVectorOp(N, WidenVT.getVectorNumElements());
1344 // Since the operation can trap, apply operation on the original vector.
1346 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
1347 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1348 unsigned CurNumElts = N->getValueType(0).getVectorNumElements();
1350 SmallVector<SDValue, 16> ConcatOps(CurNumElts);
1351 unsigned ConcatEnd = 0; // Current ConcatOps index.
1352 int Idx = 0; // Current Idx into input vectors.
1354 // NumElts := greatest legal vector size (at most WidenVT)
1355 // while (orig. vector has unhandled elements) {
1356 // take munches of size NumElts from the beginning and add to ConcatOps
1357 // NumElts := next smaller supported vector size or 1
1359 while (CurNumElts != 0) {
1360 while (CurNumElts >= NumElts) {
1361 SDValue EOp1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, InOp1,
1362 DAG.getIntPtrConstant(Idx));
1363 SDValue EOp2 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, InOp2,
1364 DAG.getIntPtrConstant(Idx));
1365 ConcatOps[ConcatEnd++] = DAG.getNode(Opcode, dl, VT, EOp1, EOp2);
1367 CurNumElts -= NumElts;
1370 NumElts = NumElts / 2;
1371 VT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NumElts);
1372 } while (!TLI.isTypeLegal(VT) && NumElts != 1);
1375 for (unsigned i = 0; i != CurNumElts; ++i, ++Idx) {
1376 SDValue EOp1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, WidenEltVT,
1377 InOp1, DAG.getIntPtrConstant(Idx));
1378 SDValue EOp2 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, WidenEltVT,
1379 InOp2, DAG.getIntPtrConstant(Idx));
1380 ConcatOps[ConcatEnd++] = DAG.getNode(Opcode, dl, WidenEltVT,
1387 // Check to see if we have a single operation with the widen type.
1388 if (ConcatEnd == 1) {
1389 VT = ConcatOps[0].getValueType();
1391 return ConcatOps[0];
1394 // while (Some element of ConcatOps is not of type MaxVT) {
1395 // From the end of ConcatOps, collect elements of the same type and put
1396 // them into an op of the next larger supported type
1398 while (ConcatOps[ConcatEnd-1].getValueType() != MaxVT) {
1399 Idx = ConcatEnd - 1;
1400 VT = ConcatOps[Idx--].getValueType();
1401 while (Idx >= 0 && ConcatOps[Idx].getValueType() == VT)
1404 int NextSize = VT.isVector() ? VT.getVectorNumElements() : 1;
1408 NextVT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NextSize);
1409 } while (!TLI.isTypeLegal(NextVT));
1411 if (!VT.isVector()) {
1412 // Scalar type, create an INSERT_VECTOR_ELEMENT of type NextVT
1413 SDValue VecOp = DAG.getUNDEF(NextVT);
1414 unsigned NumToInsert = ConcatEnd - Idx - 1;
1415 for (unsigned i = 0, OpIdx = Idx+1; i < NumToInsert; i++, OpIdx++) {
1416 VecOp = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NextVT, VecOp,
1417 ConcatOps[OpIdx], DAG.getIntPtrConstant(i));
1419 ConcatOps[Idx+1] = VecOp;
1420 ConcatEnd = Idx + 2;
1422 // Vector type, create a CONCAT_VECTORS of type NextVT
1423 SDValue undefVec = DAG.getUNDEF(VT);
1424 unsigned OpsToConcat = NextSize/VT.getVectorNumElements();
1425 SmallVector<SDValue, 16> SubConcatOps(OpsToConcat);
1426 unsigned RealVals = ConcatEnd - Idx - 1;
1427 unsigned SubConcatEnd = 0;
1428 unsigned SubConcatIdx = Idx + 1;
1429 while (SubConcatEnd < RealVals)
1430 SubConcatOps[SubConcatEnd++] = ConcatOps[++Idx];
1431 while (SubConcatEnd < OpsToConcat)
1432 SubConcatOps[SubConcatEnd++] = undefVec;
1433 ConcatOps[SubConcatIdx] = DAG.getNode(ISD::CONCAT_VECTORS, dl,
1434 NextVT, &SubConcatOps[0],
1436 ConcatEnd = SubConcatIdx + 1;
1440 // Check to see if we have a single operation with the widen type.
1441 if (ConcatEnd == 1) {
1442 VT = ConcatOps[0].getValueType();
1444 return ConcatOps[0];
1447 // add undefs of size MaxVT until ConcatOps grows to length of WidenVT
1448 unsigned NumOps = WidenVT.getVectorNumElements()/MaxVT.getVectorNumElements();
1449 if (NumOps != ConcatEnd ) {
1450 SDValue UndefVal = DAG.getUNDEF(MaxVT);
1451 for (unsigned j = ConcatEnd; j < NumOps; ++j)
1452 ConcatOps[j] = UndefVal;
1454 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &ConcatOps[0], NumOps);
1457 SDValue DAGTypeLegalizer::WidenVecRes_Convert(SDNode *N) {
1458 SDValue InOp = N->getOperand(0);
1459 DebugLoc DL = N->getDebugLoc();
1461 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1462 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1464 EVT InVT = InOp.getValueType();
1465 EVT InEltVT = InVT.getVectorElementType();
1466 EVT InWidenVT = EVT::getVectorVT(*DAG.getContext(), InEltVT, WidenNumElts);
1468 unsigned Opcode = N->getOpcode();
1469 unsigned InVTNumElts = InVT.getVectorNumElements();
1471 if (getTypeAction(InVT) == WidenVector) {
1472 InOp = GetWidenedVector(N->getOperand(0));
1473 InVT = InOp.getValueType();
1474 InVTNumElts = InVT.getVectorNumElements();
1475 if (InVTNumElts == WidenNumElts) {
1476 if (N->getNumOperands() == 1)
1477 return DAG.getNode(Opcode, DL, WidenVT, InOp);
1478 return DAG.getNode(Opcode, DL, WidenVT, InOp, N->getOperand(1));
1482 if (TLI.isTypeLegal(InWidenVT)) {
1483 // Because the result and the input are different vector types, widening
1484 // the result could create a legal type but widening the input might make
1485 // it an illegal type that might lead to repeatedly splitting the input
1486 // and then widening it. To avoid this, we widen the input only if
1487 // it results in a legal type.
1488 if (WidenNumElts % InVTNumElts == 0) {
1489 // Widen the input and call convert on the widened input vector.
1490 unsigned NumConcat = WidenNumElts/InVTNumElts;
1491 SmallVector<SDValue, 16> Ops(NumConcat);
1493 SDValue UndefVal = DAG.getUNDEF(InVT);
1494 for (unsigned i = 1; i != NumConcat; ++i)
1496 SDValue InVec = DAG.getNode(ISD::CONCAT_VECTORS, DL, InWidenVT,
1497 &Ops[0], NumConcat);
1498 if (N->getNumOperands() == 1)
1499 return DAG.getNode(Opcode, DL, WidenVT, InVec);
1500 return DAG.getNode(Opcode, DL, WidenVT, InVec, N->getOperand(1));
1503 if (InVTNumElts % WidenNumElts == 0) {
1504 SDValue InVal = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InWidenVT,
1505 InOp, DAG.getIntPtrConstant(0));
1506 // Extract the input and convert the shorten input vector.
1507 if (N->getNumOperands() == 1)
1508 return DAG.getNode(Opcode, DL, WidenVT, InVal);
1509 return DAG.getNode(Opcode, DL, WidenVT, InVal, N->getOperand(1));
1513 // Otherwise unroll into some nasty scalar code and rebuild the vector.
1514 SmallVector<SDValue, 16> Ops(WidenNumElts);
1515 EVT EltVT = WidenVT.getVectorElementType();
1516 unsigned MinElts = std::min(InVTNumElts, WidenNumElts);
1518 for (i=0; i < MinElts; ++i) {
1519 SDValue Val = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, InEltVT, InOp,
1520 DAG.getIntPtrConstant(i));
1521 if (N->getNumOperands() == 1)
1522 Ops[i] = DAG.getNode(Opcode, DL, EltVT, Val);
1524 Ops[i] = DAG.getNode(Opcode, DL, EltVT, Val, N->getOperand(1));
1527 SDValue UndefVal = DAG.getUNDEF(EltVT);
1528 for (; i < WidenNumElts; ++i)
1531 return DAG.getNode(ISD::BUILD_VECTOR, DL, WidenVT, &Ops[0], WidenNumElts);
1534 SDValue DAGTypeLegalizer::WidenVecRes_POWI(SDNode *N) {
1535 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1536 SDValue InOp = GetWidenedVector(N->getOperand(0));
1537 SDValue ShOp = N->getOperand(1);
1538 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), WidenVT, InOp, ShOp);
1541 SDValue DAGTypeLegalizer::WidenVecRes_Shift(SDNode *N) {
1542 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1543 SDValue InOp = GetWidenedVector(N->getOperand(0));
1544 SDValue ShOp = N->getOperand(1);
1546 EVT ShVT = ShOp.getValueType();
1547 if (getTypeAction(ShVT) == WidenVector) {
1548 ShOp = GetWidenedVector(ShOp);
1549 ShVT = ShOp.getValueType();
1551 EVT ShWidenVT = EVT::getVectorVT(*DAG.getContext(),
1552 ShVT.getVectorElementType(),
1553 WidenVT.getVectorNumElements());
1554 if (ShVT != ShWidenVT)
1555 ShOp = ModifyToType(ShOp, ShWidenVT);
1557 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), WidenVT, InOp, ShOp);
1560 SDValue DAGTypeLegalizer::WidenVecRes_Unary(SDNode *N) {
1561 // Unary op widening.
1562 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1563 SDValue InOp = GetWidenedVector(N->getOperand(0));
1564 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), WidenVT, InOp);
1567 SDValue DAGTypeLegalizer::WidenVecRes_InregOp(SDNode *N) {
1568 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1569 EVT ExtVT = EVT::getVectorVT(*DAG.getContext(),
1570 cast<VTSDNode>(N->getOperand(1))->getVT()
1571 .getVectorElementType(),
1572 WidenVT.getVectorNumElements());
1573 SDValue WidenLHS = GetWidenedVector(N->getOperand(0));
1574 return DAG.getNode(N->getOpcode(), N->getDebugLoc(),
1575 WidenVT, WidenLHS, DAG.getValueType(ExtVT));
1578 SDValue DAGTypeLegalizer::WidenVecRes_BITCAST(SDNode *N) {
1579 SDValue InOp = N->getOperand(0);
1580 EVT InVT = InOp.getValueType();
1581 EVT VT = N->getValueType(0);
1582 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1583 DebugLoc dl = N->getDebugLoc();
1585 switch (getTypeAction(InVT)) {
1587 assert(false && "Unknown type action!");
1591 case PromoteInteger:
1592 // If the InOp is promoted to the same size, convert it. Otherwise,
1593 // fall out of the switch and widen the promoted input.
1594 InOp = GetPromotedInteger(InOp);
1595 InVT = InOp.getValueType();
1596 if (WidenVT.bitsEq(InVT))
1597 return DAG.getNode(ISD::BITCAST, dl, WidenVT, InOp);
1602 case ScalarizeVector:
1606 // If the InOp is widened to the same size, convert it. Otherwise, fall
1607 // out of the switch and widen the widened input.
1608 InOp = GetWidenedVector(InOp);
1609 InVT = InOp.getValueType();
1610 if (WidenVT.bitsEq(InVT))
1611 // The input widens to the same size. Convert to the widen value.
1612 return DAG.getNode(ISD::BITCAST, dl, WidenVT, InOp);
1616 unsigned WidenSize = WidenVT.getSizeInBits();
1617 unsigned InSize = InVT.getSizeInBits();
1618 // x86mmx is not an acceptable vector element type, so don't try.
1619 if (WidenSize % InSize == 0 && InVT != MVT::x86mmx) {
1620 // Determine new input vector type. The new input vector type will use
1621 // the same element type (if its a vector) or use the input type as a
1622 // vector. It is the same size as the type to widen to.
1624 unsigned NewNumElts = WidenSize / InSize;
1625 if (InVT.isVector()) {
1626 EVT InEltVT = InVT.getVectorElementType();
1627 NewInVT = EVT::getVectorVT(*DAG.getContext(), InEltVT,
1628 WidenSize / InEltVT.getSizeInBits());
1630 NewInVT = EVT::getVectorVT(*DAG.getContext(), InVT, NewNumElts);
1633 if (TLI.isTypeLegal(NewInVT)) {
1634 // Because the result and the input are different vector types, widening
1635 // the result could create a legal type but widening the input might make
1636 // it an illegal type that might lead to repeatedly splitting the input
1637 // and then widening it. To avoid this, we widen the input only if
1638 // it results in a legal type.
1639 SmallVector<SDValue, 16> Ops(NewNumElts);
1640 SDValue UndefVal = DAG.getUNDEF(InVT);
1642 for (unsigned i = 1; i < NewNumElts; ++i)
1646 if (InVT.isVector())
1647 NewVec = DAG.getNode(ISD::CONCAT_VECTORS, dl,
1648 NewInVT, &Ops[0], NewNumElts);
1650 NewVec = DAG.getNode(ISD::BUILD_VECTOR, dl,
1651 NewInVT, &Ops[0], NewNumElts);
1652 return DAG.getNode(ISD::BITCAST, dl, WidenVT, NewVec);
1656 return CreateStackStoreLoad(InOp, WidenVT);
1659 SDValue DAGTypeLegalizer::WidenVecRes_BUILD_VECTOR(SDNode *N) {
1660 DebugLoc dl = N->getDebugLoc();
1661 // Build a vector with undefined for the new nodes.
1662 EVT VT = N->getValueType(0);
1663 EVT EltVT = VT.getVectorElementType();
1664 unsigned NumElts = VT.getVectorNumElements();
1666 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1667 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1669 SmallVector<SDValue, 16> NewOps(N->op_begin(), N->op_end());
1670 NewOps.reserve(WidenNumElts);
1671 for (unsigned i = NumElts; i < WidenNumElts; ++i)
1672 NewOps.push_back(DAG.getUNDEF(EltVT));
1674 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &NewOps[0], NewOps.size());
1677 SDValue DAGTypeLegalizer::WidenVecRes_CONCAT_VECTORS(SDNode *N) {
1678 EVT InVT = N->getOperand(0).getValueType();
1679 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1680 DebugLoc dl = N->getDebugLoc();
1681 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1682 unsigned NumOperands = N->getNumOperands();
1684 bool InputWidened = false; // Indicates we need to widen the input.
1685 if (getTypeAction(InVT) != WidenVector) {
1686 if (WidenVT.getVectorNumElements() % InVT.getVectorNumElements() == 0) {
1687 // Add undef vectors to widen to correct length.
1688 unsigned NumConcat = WidenVT.getVectorNumElements() /
1689 InVT.getVectorNumElements();
1690 SDValue UndefVal = DAG.getUNDEF(InVT);
1691 SmallVector<SDValue, 16> Ops(NumConcat);
1692 for (unsigned i=0; i < NumOperands; ++i)
1693 Ops[i] = N->getOperand(i);
1694 for (unsigned i = NumOperands; i != NumConcat; ++i)
1696 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &Ops[0], NumConcat);
1699 InputWidened = true;
1700 if (WidenVT == TLI.getTypeToTransformTo(*DAG.getContext(), InVT)) {
1701 // The inputs and the result are widen to the same value.
1703 for (i=1; i < NumOperands; ++i)
1704 if (N->getOperand(i).getOpcode() != ISD::UNDEF)
1707 if (i > NumOperands)
1708 // Everything but the first operand is an UNDEF so just return the
1709 // widened first operand.
1710 return GetWidenedVector(N->getOperand(0));
1712 if (NumOperands == 2) {
1713 // Replace concat of two operands with a shuffle.
1714 SmallVector<int, 16> MaskOps(WidenNumElts);
1715 for (unsigned i=0; i < WidenNumElts/2; ++i) {
1717 MaskOps[i+WidenNumElts/2] = i+WidenNumElts;
1719 return DAG.getVectorShuffle(WidenVT, dl,
1720 GetWidenedVector(N->getOperand(0)),
1721 GetWidenedVector(N->getOperand(1)),
1727 // Fall back to use extracts and build vector.
1728 EVT EltVT = WidenVT.getVectorElementType();
1729 unsigned NumInElts = InVT.getVectorNumElements();
1730 SmallVector<SDValue, 16> Ops(WidenNumElts);
1732 for (unsigned i=0; i < NumOperands; ++i) {
1733 SDValue InOp = N->getOperand(i);
1735 InOp = GetWidenedVector(InOp);
1736 for (unsigned j=0; j < NumInElts; ++j)
1737 Ops[Idx++] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
1738 DAG.getIntPtrConstant(j));
1740 SDValue UndefVal = DAG.getUNDEF(EltVT);
1741 for (; Idx < WidenNumElts; ++Idx)
1742 Ops[Idx] = UndefVal;
1743 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], WidenNumElts);
1746 SDValue DAGTypeLegalizer::WidenVecRes_CONVERT_RNDSAT(SDNode *N) {
1747 DebugLoc dl = N->getDebugLoc();
1748 SDValue InOp = N->getOperand(0);
1749 SDValue RndOp = N->getOperand(3);
1750 SDValue SatOp = N->getOperand(4);
1752 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1753 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1755 EVT InVT = InOp.getValueType();
1756 EVT InEltVT = InVT.getVectorElementType();
1757 EVT InWidenVT = EVT::getVectorVT(*DAG.getContext(), InEltVT, WidenNumElts);
1759 SDValue DTyOp = DAG.getValueType(WidenVT);
1760 SDValue STyOp = DAG.getValueType(InWidenVT);
1761 ISD::CvtCode CvtCode = cast<CvtRndSatSDNode>(N)->getCvtCode();
1763 unsigned InVTNumElts = InVT.getVectorNumElements();
1764 if (getTypeAction(InVT) == WidenVector) {
1765 InOp = GetWidenedVector(InOp);
1766 InVT = InOp.getValueType();
1767 InVTNumElts = InVT.getVectorNumElements();
1768 if (InVTNumElts == WidenNumElts)
1769 return DAG.getConvertRndSat(WidenVT, dl, InOp, DTyOp, STyOp, RndOp,
1773 if (TLI.isTypeLegal(InWidenVT)) {
1774 // Because the result and the input are different vector types, widening
1775 // the result could create a legal type but widening the input might make
1776 // it an illegal type that might lead to repeatedly splitting the input
1777 // and then widening it. To avoid this, we widen the input only if
1778 // it results in a legal type.
1779 if (WidenNumElts % InVTNumElts == 0) {
1780 // Widen the input and call convert on the widened input vector.
1781 unsigned NumConcat = WidenNumElts/InVTNumElts;
1782 SmallVector<SDValue, 16> Ops(NumConcat);
1784 SDValue UndefVal = DAG.getUNDEF(InVT);
1785 for (unsigned i = 1; i != NumConcat; ++i)
1788 InOp = DAG.getNode(ISD::CONCAT_VECTORS, dl, InWidenVT, &Ops[0],NumConcat);
1789 return DAG.getConvertRndSat(WidenVT, dl, InOp, DTyOp, STyOp, RndOp,
1793 if (InVTNumElts % WidenNumElts == 0) {
1794 // Extract the input and convert the shorten input vector.
1795 InOp = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InWidenVT, InOp,
1796 DAG.getIntPtrConstant(0));
1797 return DAG.getConvertRndSat(WidenVT, dl, InOp, DTyOp, STyOp, RndOp,
1802 // Otherwise unroll into some nasty scalar code and rebuild the vector.
1803 SmallVector<SDValue, 16> Ops(WidenNumElts);
1804 EVT EltVT = WidenVT.getVectorElementType();
1805 DTyOp = DAG.getValueType(EltVT);
1806 STyOp = DAG.getValueType(InEltVT);
1808 unsigned MinElts = std::min(InVTNumElts, WidenNumElts);
1810 for (i=0; i < MinElts; ++i) {
1811 SDValue ExtVal = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, InEltVT, InOp,
1812 DAG.getIntPtrConstant(i));
1813 Ops[i] = DAG.getConvertRndSat(WidenVT, dl, ExtVal, DTyOp, STyOp, RndOp,
1817 SDValue UndefVal = DAG.getUNDEF(EltVT);
1818 for (; i < WidenNumElts; ++i)
1821 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], WidenNumElts);
1824 SDValue DAGTypeLegalizer::WidenVecRes_EXTRACT_SUBVECTOR(SDNode *N) {
1825 EVT VT = N->getValueType(0);
1826 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1827 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1828 SDValue InOp = N->getOperand(0);
1829 SDValue Idx = N->getOperand(1);
1830 DebugLoc dl = N->getDebugLoc();
1832 if (getTypeAction(InOp.getValueType()) == WidenVector)
1833 InOp = GetWidenedVector(InOp);
1835 EVT InVT = InOp.getValueType();
1837 // Check if we can just return the input vector after widening.
1838 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
1839 if (IdxVal == 0 && InVT == WidenVT)
1842 // Check if we can extract from the vector.
1843 unsigned InNumElts = InVT.getVectorNumElements();
1844 if (IdxVal % WidenNumElts == 0 && IdxVal + WidenNumElts < InNumElts)
1845 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, WidenVT, InOp, Idx);
1847 // We could try widening the input to the right length but for now, extract
1848 // the original elements, fill the rest with undefs and build a vector.
1849 SmallVector<SDValue, 16> Ops(WidenNumElts);
1850 EVT EltVT = VT.getVectorElementType();
1851 unsigned NumElts = VT.getVectorNumElements();
1853 for (i=0; i < NumElts; ++i)
1854 Ops[i] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
1855 DAG.getIntPtrConstant(IdxVal+i));
1857 SDValue UndefVal = DAG.getUNDEF(EltVT);
1858 for (; i < WidenNumElts; ++i)
1860 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], WidenNumElts);
1863 SDValue DAGTypeLegalizer::WidenVecRes_INSERT_VECTOR_ELT(SDNode *N) {
1864 SDValue InOp = GetWidenedVector(N->getOperand(0));
1865 return DAG.getNode(ISD::INSERT_VECTOR_ELT, N->getDebugLoc(),
1866 InOp.getValueType(), InOp,
1867 N->getOperand(1), N->getOperand(2));
1870 SDValue DAGTypeLegalizer::WidenVecRes_LOAD(SDNode *N) {
1871 LoadSDNode *LD = cast<LoadSDNode>(N);
1872 ISD::LoadExtType ExtType = LD->getExtensionType();
1875 SmallVector<SDValue, 16> LdChain; // Chain for the series of load
1876 if (ExtType != ISD::NON_EXTLOAD)
1877 Result = GenWidenVectorExtLoads(LdChain, LD, ExtType);
1879 Result = GenWidenVectorLoads(LdChain, LD);
1881 // If we generate a single load, we can use that for the chain. Otherwise,
1882 // build a factor node to remember the multiple loads are independent and
1885 if (LdChain.size() == 1)
1886 NewChain = LdChain[0];
1888 NewChain = DAG.getNode(ISD::TokenFactor, LD->getDebugLoc(), MVT::Other,
1889 &LdChain[0], LdChain.size());
1891 // Modified the chain - switch anything that used the old chain to use
1893 ReplaceValueWith(SDValue(N, 1), NewChain);
1898 SDValue DAGTypeLegalizer::WidenVecRes_SCALAR_TO_VECTOR(SDNode *N) {
1899 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1900 return DAG.getNode(ISD::SCALAR_TO_VECTOR, N->getDebugLoc(),
1901 WidenVT, N->getOperand(0));
1904 SDValue DAGTypeLegalizer::WidenVecRes_SELECT(SDNode *N) {
1905 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1906 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1908 SDValue Cond1 = N->getOperand(0);
1909 EVT CondVT = Cond1.getValueType();
1910 if (CondVT.isVector()) {
1911 EVT CondEltVT = CondVT.getVectorElementType();
1912 EVT CondWidenVT = EVT::getVectorVT(*DAG.getContext(),
1913 CondEltVT, WidenNumElts);
1914 if (getTypeAction(CondVT) == WidenVector)
1915 Cond1 = GetWidenedVector(Cond1);
1917 if (Cond1.getValueType() != CondWidenVT)
1918 Cond1 = ModifyToType(Cond1, CondWidenVT);
1921 SDValue InOp1 = GetWidenedVector(N->getOperand(1));
1922 SDValue InOp2 = GetWidenedVector(N->getOperand(2));
1923 assert(InOp1.getValueType() == WidenVT && InOp2.getValueType() == WidenVT);
1924 return DAG.getNode(ISD::SELECT, N->getDebugLoc(),
1925 WidenVT, Cond1, InOp1, InOp2);
1928 SDValue DAGTypeLegalizer::WidenVecRes_SELECT_CC(SDNode *N) {
1929 SDValue InOp1 = GetWidenedVector(N->getOperand(2));
1930 SDValue InOp2 = GetWidenedVector(N->getOperand(3));
1931 return DAG.getNode(ISD::SELECT_CC, N->getDebugLoc(),
1932 InOp1.getValueType(), N->getOperand(0),
1933 N->getOperand(1), InOp1, InOp2, N->getOperand(4));
1936 SDValue DAGTypeLegalizer::WidenVecRes_SETCC(SDNode *N) {
1937 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1938 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
1939 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1940 return DAG.getNode(ISD::SETCC, N->getDebugLoc(), WidenVT,
1941 InOp1, InOp2, N->getOperand(2));
1944 SDValue DAGTypeLegalizer::WidenVecRes_UNDEF(SDNode *N) {
1945 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1946 return DAG.getUNDEF(WidenVT);
1949 SDValue DAGTypeLegalizer::WidenVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N) {
1950 EVT VT = N->getValueType(0);
1951 DebugLoc dl = N->getDebugLoc();
1953 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1954 unsigned NumElts = VT.getVectorNumElements();
1955 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1957 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
1958 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1960 // Adjust mask based on new input vector length.
1961 SmallVector<int, 16> NewMask;
1962 for (unsigned i = 0; i != NumElts; ++i) {
1963 int Idx = N->getMaskElt(i);
1964 if (Idx < (int)NumElts)
1965 NewMask.push_back(Idx);
1967 NewMask.push_back(Idx - NumElts + WidenNumElts);
1969 for (unsigned i = NumElts; i != WidenNumElts; ++i)
1970 NewMask.push_back(-1);
1971 return DAG.getVectorShuffle(WidenVT, dl, InOp1, InOp2, &NewMask[0]);
1974 SDValue DAGTypeLegalizer::WidenVecRes_VSETCC(SDNode *N) {
1975 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1976 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1978 SDValue InOp1 = N->getOperand(0);
1979 EVT InVT = InOp1.getValueType();
1980 assert(InVT.isVector() && "can not widen non vector type");
1981 EVT WidenInVT = EVT::getVectorVT(*DAG.getContext(),
1982 InVT.getVectorElementType(), WidenNumElts);
1983 InOp1 = GetWidenedVector(InOp1);
1984 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1986 // Assume that the input and output will be widen appropriately. If not,
1987 // we will have to unroll it at some point.
1988 assert(InOp1.getValueType() == WidenInVT &&
1989 InOp2.getValueType() == WidenInVT &&
1990 "Input not widened to expected type!");
1991 return DAG.getNode(ISD::VSETCC, N->getDebugLoc(),
1992 WidenVT, InOp1, InOp2, N->getOperand(2));
1996 //===----------------------------------------------------------------------===//
1997 // Widen Vector Operand
1998 //===----------------------------------------------------------------------===//
1999 bool DAGTypeLegalizer::WidenVectorOperand(SDNode *N, unsigned ResNo) {
2000 DEBUG(dbgs() << "Widen node operand " << ResNo << ": ";
2003 SDValue Res = SDValue();
2005 switch (N->getOpcode()) {
2008 dbgs() << "WidenVectorOperand op #" << ResNo << ": ";
2012 llvm_unreachable("Do not know how to widen this operator's operand!");
2014 case ISD::BITCAST: Res = WidenVecOp_BITCAST(N); break;
2015 case ISD::CONCAT_VECTORS: Res = WidenVecOp_CONCAT_VECTORS(N); break;
2016 case ISD::EXTRACT_SUBVECTOR: Res = WidenVecOp_EXTRACT_SUBVECTOR(N); break;
2017 case ISD::EXTRACT_VECTOR_ELT: Res = WidenVecOp_EXTRACT_VECTOR_ELT(N); break;
2018 case ISD::STORE: Res = WidenVecOp_STORE(N); break;
2020 case ISD::FP_EXTEND:
2022 case ISD::FP_TO_SINT:
2023 case ISD::FP_TO_UINT:
2024 case ISD::SINT_TO_FP:
2025 case ISD::UINT_TO_FP:
2027 case ISD::SIGN_EXTEND:
2028 case ISD::ZERO_EXTEND:
2029 case ISD::ANY_EXTEND:
2030 Res = WidenVecOp_Convert(N);
2034 // If Res is null, the sub-method took care of registering the result.
2035 if (!Res.getNode()) return false;
2037 // If the result is N, the sub-method updated N in place. Tell the legalizer
2039 if (Res.getNode() == N)
2043 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
2044 "Invalid operand expansion");
2046 ReplaceValueWith(SDValue(N, 0), Res);
2050 SDValue DAGTypeLegalizer::WidenVecOp_Convert(SDNode *N) {
2051 // Since the result is legal and the input is illegal, it is unlikely
2052 // that we can fix the input to a legal type so unroll the convert
2053 // into some scalar code and create a nasty build vector.
2054 EVT VT = N->getValueType(0);
2055 EVT EltVT = VT.getVectorElementType();
2056 DebugLoc dl = N->getDebugLoc();
2057 unsigned NumElts = VT.getVectorNumElements();
2058 SDValue InOp = N->getOperand(0);
2059 if (getTypeAction(InOp.getValueType()) == WidenVector)
2060 InOp = GetWidenedVector(InOp);
2061 EVT InVT = InOp.getValueType();
2062 EVT InEltVT = InVT.getVectorElementType();
2064 unsigned Opcode = N->getOpcode();
2065 SmallVector<SDValue, 16> Ops(NumElts);
2066 for (unsigned i=0; i < NumElts; ++i)
2067 Ops[i] = DAG.getNode(Opcode, dl, EltVT,
2068 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, InEltVT, InOp,
2069 DAG.getIntPtrConstant(i)));
2071 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, &Ops[0], NumElts);
2074 SDValue DAGTypeLegalizer::WidenVecOp_BITCAST(SDNode *N) {
2075 EVT VT = N->getValueType(0);
2076 SDValue InOp = GetWidenedVector(N->getOperand(0));
2077 EVT InWidenVT = InOp.getValueType();
2078 DebugLoc dl = N->getDebugLoc();
2080 // Check if we can convert between two legal vector types and extract.
2081 unsigned InWidenSize = InWidenVT.getSizeInBits();
2082 unsigned Size = VT.getSizeInBits();
2083 // x86mmx is not an acceptable vector element type, so don't try.
2084 if (InWidenSize % Size == 0 && !VT.isVector() && VT != MVT::x86mmx) {
2085 unsigned NewNumElts = InWidenSize / Size;
2086 EVT NewVT = EVT::getVectorVT(*DAG.getContext(), VT, NewNumElts);
2087 if (TLI.isTypeLegal(NewVT)) {
2088 SDValue BitOp = DAG.getNode(ISD::BITCAST, dl, NewVT, InOp);
2089 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, VT, BitOp,
2090 DAG.getIntPtrConstant(0));
2094 return CreateStackStoreLoad(InOp, VT);
2097 SDValue DAGTypeLegalizer::WidenVecOp_CONCAT_VECTORS(SDNode *N) {
2098 // If the input vector is not legal, it is likely that we will not find a
2099 // legal vector of the same size. Replace the concatenate vector with a
2100 // nasty build vector.
2101 EVT VT = N->getValueType(0);
2102 EVT EltVT = VT.getVectorElementType();
2103 DebugLoc dl = N->getDebugLoc();
2104 unsigned NumElts = VT.getVectorNumElements();
2105 SmallVector<SDValue, 16> Ops(NumElts);
2107 EVT InVT = N->getOperand(0).getValueType();
2108 unsigned NumInElts = InVT.getVectorNumElements();
2111 unsigned NumOperands = N->getNumOperands();
2112 for (unsigned i=0; i < NumOperands; ++i) {
2113 SDValue InOp = N->getOperand(i);
2114 if (getTypeAction(InOp.getValueType()) == WidenVector)
2115 InOp = GetWidenedVector(InOp);
2116 for (unsigned j=0; j < NumInElts; ++j)
2117 Ops[Idx++] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
2118 DAG.getIntPtrConstant(j));
2120 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, &Ops[0], NumElts);
2123 SDValue DAGTypeLegalizer::WidenVecOp_EXTRACT_SUBVECTOR(SDNode *N) {
2124 SDValue InOp = GetWidenedVector(N->getOperand(0));
2125 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, N->getDebugLoc(),
2126 N->getValueType(0), InOp, N->getOperand(1));
2129 SDValue DAGTypeLegalizer::WidenVecOp_EXTRACT_VECTOR_ELT(SDNode *N) {
2130 SDValue InOp = GetWidenedVector(N->getOperand(0));
2131 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, N->getDebugLoc(),
2132 N->getValueType(0), InOp, N->getOperand(1));
2135 SDValue DAGTypeLegalizer::WidenVecOp_STORE(SDNode *N) {
2136 // We have to widen the value but we want only to store the original
2138 StoreSDNode *ST = cast<StoreSDNode>(N);
2140 SmallVector<SDValue, 16> StChain;
2141 if (ST->isTruncatingStore())
2142 GenWidenVectorTruncStores(StChain, ST);
2144 GenWidenVectorStores(StChain, ST);
2146 if (StChain.size() == 1)
2149 return DAG.getNode(ISD::TokenFactor, ST->getDebugLoc(),
2150 MVT::Other,&StChain[0],StChain.size());
2153 //===----------------------------------------------------------------------===//
2154 // Vector Widening Utilities
2155 //===----------------------------------------------------------------------===//
2157 // Utility function to find the type to chop up a widen vector for load/store
2158 // TLI: Target lowering used to determine legal types.
2159 // Width: Width left need to load/store.
2160 // WidenVT: The widen vector type to load to/store from
2161 // Align: If 0, don't allow use of a wider type
2162 // WidenEx: If Align is not 0, the amount additional we can load/store from.
2164 static EVT FindMemType(SelectionDAG& DAG, const TargetLowering &TLI,
2165 unsigned Width, EVT WidenVT,
2166 unsigned Align = 0, unsigned WidenEx = 0) {
2167 EVT WidenEltVT = WidenVT.getVectorElementType();
2168 unsigned WidenWidth = WidenVT.getSizeInBits();
2169 unsigned WidenEltWidth = WidenEltVT.getSizeInBits();
2170 unsigned AlignInBits = Align*8;
2172 // If we have one element to load/store, return it.
2173 EVT RetVT = WidenEltVT;
2174 if (Width == WidenEltWidth)
2177 // See if there is larger legal integer than the element type to load/store
2179 for (VT = (unsigned)MVT::LAST_INTEGER_VALUETYPE;
2180 VT >= (unsigned)MVT::FIRST_INTEGER_VALUETYPE; --VT) {
2181 EVT MemVT((MVT::SimpleValueType) VT);
2182 unsigned MemVTWidth = MemVT.getSizeInBits();
2183 if (MemVT.getSizeInBits() <= WidenEltWidth)
2185 if (TLI.isTypeLegal(MemVT) && (WidenWidth % MemVTWidth) == 0 &&
2186 (MemVTWidth <= Width ||
2187 (Align!=0 && MemVTWidth<=AlignInBits && MemVTWidth<=Width+WidenEx))) {
2193 // See if there is a larger vector type to load/store that has the same vector
2194 // element type and is evenly divisible with the WidenVT.
2195 for (VT = (unsigned)MVT::LAST_VECTOR_VALUETYPE;
2196 VT >= (unsigned)MVT::FIRST_VECTOR_VALUETYPE; --VT) {
2197 EVT MemVT = (MVT::SimpleValueType) VT;
2198 unsigned MemVTWidth = MemVT.getSizeInBits();
2199 if (TLI.isTypeLegal(MemVT) && WidenEltVT == MemVT.getVectorElementType() &&
2200 (WidenWidth % MemVTWidth) == 0 &&
2201 (MemVTWidth <= Width ||
2202 (Align!=0 && MemVTWidth<=AlignInBits && MemVTWidth<=Width+WidenEx))) {
2203 if (RetVT.getSizeInBits() < MemVTWidth || MemVT == WidenVT)
2211 // Builds a vector type from scalar loads
2212 // VecTy: Resulting Vector type
2213 // LDOps: Load operators to build a vector type
2214 // [Start,End) the list of loads to use.
2215 static SDValue BuildVectorFromScalar(SelectionDAG& DAG, EVT VecTy,
2216 SmallVector<SDValue, 16>& LdOps,
2217 unsigned Start, unsigned End) {
2218 DebugLoc dl = LdOps[Start].getDebugLoc();
2219 EVT LdTy = LdOps[Start].getValueType();
2220 unsigned Width = VecTy.getSizeInBits();
2221 unsigned NumElts = Width / LdTy.getSizeInBits();
2222 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), LdTy, NumElts);
2225 SDValue VecOp = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, NewVecVT,LdOps[Start]);
2227 for (unsigned i = Start + 1; i != End; ++i) {
2228 EVT NewLdTy = LdOps[i].getValueType();
2229 if (NewLdTy != LdTy) {
2230 NumElts = Width / NewLdTy.getSizeInBits();
2231 NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewLdTy, NumElts);
2232 VecOp = DAG.getNode(ISD::BITCAST, dl, NewVecVT, VecOp);
2233 // Readjust position and vector position based on new load type
2234 Idx = Idx * LdTy.getSizeInBits() / NewLdTy.getSizeInBits();
2237 VecOp = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NewVecVT, VecOp, LdOps[i],
2238 DAG.getIntPtrConstant(Idx++));
2240 return DAG.getNode(ISD::BITCAST, dl, VecTy, VecOp);
2243 SDValue DAGTypeLegalizer::GenWidenVectorLoads(SmallVector<SDValue, 16> &LdChain,
2245 // The strategy assumes that we can efficiently load powers of two widths.
2246 // The routines chops the vector into the largest vector loads with the same
2247 // element type or scalar loads and then recombines it to the widen vector
2249 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(),LD->getValueType(0));
2250 unsigned WidenWidth = WidenVT.getSizeInBits();
2251 EVT LdVT = LD->getMemoryVT();
2252 DebugLoc dl = LD->getDebugLoc();
2253 assert(LdVT.isVector() && WidenVT.isVector());
2254 assert(LdVT.getVectorElementType() == WidenVT.getVectorElementType());
2257 SDValue Chain = LD->getChain();
2258 SDValue BasePtr = LD->getBasePtr();
2259 unsigned Align = LD->getAlignment();
2260 bool isVolatile = LD->isVolatile();
2261 bool isNonTemporal = LD->isNonTemporal();
2263 int LdWidth = LdVT.getSizeInBits();
2264 int WidthDiff = WidenWidth - LdWidth; // Difference
2265 unsigned LdAlign = (isVolatile) ? 0 : Align; // Allow wider loads
2267 // Find the vector type that can load from.
2268 EVT NewVT = FindMemType(DAG, TLI, LdWidth, WidenVT, LdAlign, WidthDiff);
2269 int NewVTWidth = NewVT.getSizeInBits();
2270 SDValue LdOp = DAG.getLoad(NewVT, dl, Chain, BasePtr, LD->getPointerInfo(),
2271 isVolatile, isNonTemporal, Align);
2272 LdChain.push_back(LdOp.getValue(1));
2274 // Check if we can load the element with one instruction
2275 if (LdWidth <= NewVTWidth) {
2276 if (!NewVT.isVector()) {
2277 unsigned NumElts = WidenWidth / NewVTWidth;
2278 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewVT, NumElts);
2279 SDValue VecOp = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, NewVecVT, LdOp);
2280 return DAG.getNode(ISD::BITCAST, dl, WidenVT, VecOp);
2282 if (NewVT == WidenVT)
2285 assert(WidenWidth % NewVTWidth == 0);
2286 unsigned NumConcat = WidenWidth / NewVTWidth;
2287 SmallVector<SDValue, 16> ConcatOps(NumConcat);
2288 SDValue UndefVal = DAG.getUNDEF(NewVT);
2289 ConcatOps[0] = LdOp;
2290 for (unsigned i = 1; i != NumConcat; ++i)
2291 ConcatOps[i] = UndefVal;
2292 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &ConcatOps[0],
2296 // Load vector by using multiple loads from largest vector to scalar
2297 SmallVector<SDValue, 16> LdOps;
2298 LdOps.push_back(LdOp);
2300 LdWidth -= NewVTWidth;
2301 unsigned Offset = 0;
2303 while (LdWidth > 0) {
2304 unsigned Increment = NewVTWidth / 8;
2305 Offset += Increment;
2306 BasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr,
2307 DAG.getIntPtrConstant(Increment));
2309 if (LdWidth < NewVTWidth) {
2310 // Our current type we are using is too large, find a better size
2311 NewVT = FindMemType(DAG, TLI, LdWidth, WidenVT, LdAlign, WidthDiff);
2312 NewVTWidth = NewVT.getSizeInBits();
2315 SDValue LdOp = DAG.getLoad(NewVT, dl, Chain, BasePtr,
2316 LD->getPointerInfo().getWithOffset(Offset),
2318 isNonTemporal, MinAlign(Align, Increment));
2319 LdChain.push_back(LdOp.getValue(1));
2320 LdOps.push_back(LdOp);
2322 LdWidth -= NewVTWidth;
2325 // Build the vector from the loads operations
2326 unsigned End = LdOps.size();
2327 if (!LdOps[0].getValueType().isVector())
2328 // All the loads are scalar loads.
2329 return BuildVectorFromScalar(DAG, WidenVT, LdOps, 0, End);
2331 // If the load contains vectors, build the vector using concat vector.
2332 // All of the vectors used to loads are power of 2 and the scalars load
2333 // can be combined to make a power of 2 vector.
2334 SmallVector<SDValue, 16> ConcatOps(End);
2337 EVT LdTy = LdOps[i].getValueType();
2338 // First combine the scalar loads to a vector
2339 if (!LdTy.isVector()) {
2340 for (--i; i >= 0; --i) {
2341 LdTy = LdOps[i].getValueType();
2342 if (LdTy.isVector())
2345 ConcatOps[--Idx] = BuildVectorFromScalar(DAG, LdTy, LdOps, i+1, End);
2347 ConcatOps[--Idx] = LdOps[i];
2348 for (--i; i >= 0; --i) {
2349 EVT NewLdTy = LdOps[i].getValueType();
2350 if (NewLdTy != LdTy) {
2351 // Create a larger vector
2352 ConcatOps[End-1] = DAG.getNode(ISD::CONCAT_VECTORS, dl, NewLdTy,
2353 &ConcatOps[Idx], End - Idx);
2357 ConcatOps[--Idx] = LdOps[i];
2360 if (WidenWidth == LdTy.getSizeInBits()*(End - Idx))
2361 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT,
2362 &ConcatOps[Idx], End - Idx);
2364 // We need to fill the rest with undefs to build the vector
2365 unsigned NumOps = WidenWidth / LdTy.getSizeInBits();
2366 SmallVector<SDValue, 16> WidenOps(NumOps);
2367 SDValue UndefVal = DAG.getUNDEF(LdTy);
2370 for (; i != End-Idx; ++i)
2371 WidenOps[i] = ConcatOps[Idx+i];
2372 for (; i != NumOps; ++i)
2373 WidenOps[i] = UndefVal;
2375 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &WidenOps[0],NumOps);
2379 DAGTypeLegalizer::GenWidenVectorExtLoads(SmallVector<SDValue, 16>& LdChain,
2381 ISD::LoadExtType ExtType) {
2382 // For extension loads, it may not be more efficient to chop up the vector
2383 // and then extended it. Instead, we unroll the load and build a new vector.
2384 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(),LD->getValueType(0));
2385 EVT LdVT = LD->getMemoryVT();
2386 DebugLoc dl = LD->getDebugLoc();
2387 assert(LdVT.isVector() && WidenVT.isVector());
2390 SDValue Chain = LD->getChain();
2391 SDValue BasePtr = LD->getBasePtr();
2392 unsigned Align = LD->getAlignment();
2393 bool isVolatile = LD->isVolatile();
2394 bool isNonTemporal = LD->isNonTemporal();
2396 EVT EltVT = WidenVT.getVectorElementType();
2397 EVT LdEltVT = LdVT.getVectorElementType();
2398 unsigned NumElts = LdVT.getVectorNumElements();
2400 // Load each element and widen
2401 unsigned WidenNumElts = WidenVT.getVectorNumElements();
2402 SmallVector<SDValue, 16> Ops(WidenNumElts);
2403 unsigned Increment = LdEltVT.getSizeInBits() / 8;
2404 Ops[0] = DAG.getExtLoad(ExtType, dl, EltVT, Chain, BasePtr,
2405 LD->getPointerInfo(),
2406 LdEltVT, isVolatile, isNonTemporal, Align);
2407 LdChain.push_back(Ops[0].getValue(1));
2408 unsigned i = 0, Offset = Increment;
2409 for (i=1; i < NumElts; ++i, Offset += Increment) {
2410 SDValue NewBasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(),
2411 BasePtr, DAG.getIntPtrConstant(Offset));
2412 Ops[i] = DAG.getExtLoad(ExtType, dl, EltVT, Chain, NewBasePtr,
2413 LD->getPointerInfo().getWithOffset(Offset), LdEltVT,
2414 isVolatile, isNonTemporal, Align);
2415 LdChain.push_back(Ops[i].getValue(1));
2418 // Fill the rest with undefs
2419 SDValue UndefVal = DAG.getUNDEF(EltVT);
2420 for (; i != WidenNumElts; ++i)
2423 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], Ops.size());
2427 void DAGTypeLegalizer::GenWidenVectorStores(SmallVector<SDValue, 16>& StChain,
2429 // The strategy assumes that we can efficiently store powers of two widths.
2430 // The routines chops the vector into the largest vector stores with the same
2431 // element type or scalar stores.
2432 SDValue Chain = ST->getChain();
2433 SDValue BasePtr = ST->getBasePtr();
2434 unsigned Align = ST->getAlignment();
2435 bool isVolatile = ST->isVolatile();
2436 bool isNonTemporal = ST->isNonTemporal();
2437 SDValue ValOp = GetWidenedVector(ST->getValue());
2438 DebugLoc dl = ST->getDebugLoc();
2440 EVT StVT = ST->getMemoryVT();
2441 unsigned StWidth = StVT.getSizeInBits();
2442 EVT ValVT = ValOp.getValueType();
2443 unsigned ValWidth = ValVT.getSizeInBits();
2444 EVT ValEltVT = ValVT.getVectorElementType();
2445 unsigned ValEltWidth = ValEltVT.getSizeInBits();
2446 assert(StVT.getVectorElementType() == ValEltVT);
2448 int Idx = 0; // current index to store
2449 unsigned Offset = 0; // offset from base to store
2450 while (StWidth != 0) {
2451 // Find the largest vector type we can store with
2452 EVT NewVT = FindMemType(DAG, TLI, StWidth, ValVT);
2453 unsigned NewVTWidth = NewVT.getSizeInBits();
2454 unsigned Increment = NewVTWidth / 8;
2455 if (NewVT.isVector()) {
2456 unsigned NumVTElts = NewVT.getVectorNumElements();
2458 SDValue EOp = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, NewVT, ValOp,
2459 DAG.getIntPtrConstant(Idx));
2460 StChain.push_back(DAG.getStore(Chain, dl, EOp, BasePtr,
2461 ST->getPointerInfo().getWithOffset(Offset),
2462 isVolatile, isNonTemporal,
2463 MinAlign(Align, Offset)));
2464 StWidth -= NewVTWidth;
2465 Offset += Increment;
2467 BasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr,
2468 DAG.getIntPtrConstant(Increment));
2469 } while (StWidth != 0 && StWidth >= NewVTWidth);
2471 // Cast the vector to the scalar type we can store
2472 unsigned NumElts = ValWidth / NewVTWidth;
2473 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewVT, NumElts);
2474 SDValue VecOp = DAG.getNode(ISD::BITCAST, dl, NewVecVT, ValOp);
2475 // Readjust index position based on new vector type
2476 Idx = Idx * ValEltWidth / NewVTWidth;
2478 SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NewVT, VecOp,
2479 DAG.getIntPtrConstant(Idx++));
2480 StChain.push_back(DAG.getStore(Chain, dl, EOp, BasePtr,
2481 ST->getPointerInfo().getWithOffset(Offset),
2482 isVolatile, isNonTemporal,
2483 MinAlign(Align, Offset)));
2484 StWidth -= NewVTWidth;
2485 Offset += Increment;
2486 BasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr,
2487 DAG.getIntPtrConstant(Increment));
2488 } while (StWidth != 0 && StWidth >= NewVTWidth);
2489 // Restore index back to be relative to the original widen element type
2490 Idx = Idx * NewVTWidth / ValEltWidth;
2496 DAGTypeLegalizer::GenWidenVectorTruncStores(SmallVector<SDValue, 16>& StChain,
2498 // For extension loads, it may not be more efficient to truncate the vector
2499 // and then store it. Instead, we extract each element and then store it.
2500 SDValue Chain = ST->getChain();
2501 SDValue BasePtr = ST->getBasePtr();
2502 unsigned Align = ST->getAlignment();
2503 bool isVolatile = ST->isVolatile();
2504 bool isNonTemporal = ST->isNonTemporal();
2505 SDValue ValOp = GetWidenedVector(ST->getValue());
2506 DebugLoc dl = ST->getDebugLoc();
2508 EVT StVT = ST->getMemoryVT();
2509 EVT ValVT = ValOp.getValueType();
2511 // It must be true that we the widen vector type is bigger than where
2512 // we need to store.
2513 assert(StVT.isVector() && ValOp.getValueType().isVector());
2514 assert(StVT.bitsLT(ValOp.getValueType()));
2516 // For truncating stores, we can not play the tricks of chopping legal
2517 // vector types and bit cast it to the right type. Instead, we unroll
2519 EVT StEltVT = StVT.getVectorElementType();
2520 EVT ValEltVT = ValVT.getVectorElementType();
2521 unsigned Increment = ValEltVT.getSizeInBits() / 8;
2522 unsigned NumElts = StVT.getVectorNumElements();
2523 SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ValEltVT, ValOp,
2524 DAG.getIntPtrConstant(0));
2525 StChain.push_back(DAG.getTruncStore(Chain, dl, EOp, BasePtr,
2526 ST->getPointerInfo(), StEltVT,
2527 isVolatile, isNonTemporal, Align));
2528 unsigned Offset = Increment;
2529 for (unsigned i=1; i < NumElts; ++i, Offset += Increment) {
2530 SDValue NewBasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(),
2531 BasePtr, DAG.getIntPtrConstant(Offset));
2532 SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ValEltVT, ValOp,
2533 DAG.getIntPtrConstant(0));
2534 StChain.push_back(DAG.getTruncStore(Chain, dl, EOp, NewBasePtr,
2535 ST->getPointerInfo().getWithOffset(Offset),
2536 StEltVT, isVolatile, isNonTemporal,
2537 MinAlign(Align, Offset)));
2541 /// Modifies a vector input (widen or narrows) to a vector of NVT. The
2542 /// input vector must have the same element type as NVT.
2543 SDValue DAGTypeLegalizer::ModifyToType(SDValue InOp, EVT NVT) {
2544 // Note that InOp might have been widened so it might already have
2545 // the right width or it might need be narrowed.
2546 EVT InVT = InOp.getValueType();
2547 assert(InVT.getVectorElementType() == NVT.getVectorElementType() &&
2548 "input and widen element type must match");
2549 DebugLoc dl = InOp.getDebugLoc();
2551 // Check if InOp already has the right width.
2555 unsigned InNumElts = InVT.getVectorNumElements();
2556 unsigned WidenNumElts = NVT.getVectorNumElements();
2557 if (WidenNumElts > InNumElts && WidenNumElts % InNumElts == 0) {
2558 unsigned NumConcat = WidenNumElts / InNumElts;
2559 SmallVector<SDValue, 16> Ops(NumConcat);
2560 SDValue UndefVal = DAG.getUNDEF(InVT);
2562 for (unsigned i = 1; i != NumConcat; ++i)
2565 return DAG.getNode(ISD::CONCAT_VECTORS, dl, NVT, &Ops[0], NumConcat);
2568 if (WidenNumElts < InNumElts && InNumElts % WidenNumElts)
2569 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, NVT, InOp,
2570 DAG.getIntPtrConstant(0));
2572 // Fall back to extract and build.
2573 SmallVector<SDValue, 16> Ops(WidenNumElts);
2574 EVT EltVT = NVT.getVectorElementType();
2575 unsigned MinNumElts = std::min(WidenNumElts, InNumElts);
2577 for (Idx = 0; Idx < MinNumElts; ++Idx)
2578 Ops[Idx] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
2579 DAG.getIntPtrConstant(Idx));
2581 SDValue UndefVal = DAG.getUNDEF(EltVT);
2582 for ( ; Idx < WidenNumElts; ++Idx)
2583 Ops[Idx] = UndefVal;
2584 return DAG.getNode(ISD::BUILD_VECTOR, dl, NVT, &Ops[0], WidenNumElts);