1 //===------- LegalizeVectorTypes.cpp - Legalization of vector types -------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file performs vector type splitting and scalarization for LegalizeTypes.
11 // Scalarization is the act of changing a computation in an illegal one-element
12 // vector type to be a computation in its scalar element type. For example,
13 // implementing <1 x f32> arithmetic in a scalar f32 register. This is needed
14 // as a base case when scalarizing vector arithmetic like <4 x f32>, which
15 // eventually decomposes to scalars if the target doesn't support v4f32 or v2f32
17 // Splitting is the act of changing a computation in an invalid vector type to
18 // be a computation in two vectors of half the size. For example, implementing
19 // <128 x f32> operations in terms of two <64 x f32> operations.
21 //===----------------------------------------------------------------------===//
23 #include "LegalizeTypes.h"
24 #include "llvm/CodeGen/PseudoSourceValue.h"
25 #include "llvm/Target/TargetData.h"
26 #include "llvm/Support/ErrorHandling.h"
27 #include "llvm/Support/raw_ostream.h"
30 //===----------------------------------------------------------------------===//
31 // Result Vector Scalarization: <1 x ty> -> ty.
32 //===----------------------------------------------------------------------===//
34 void DAGTypeLegalizer::ScalarizeVectorResult(SDNode *N, unsigned ResNo) {
35 DEBUG(dbgs() << "Scalarize node result " << ResNo << ": ";
38 SDValue R = SDValue();
40 switch (N->getOpcode()) {
43 dbgs() << "ScalarizeVectorResult #" << ResNo << ": ";
47 llvm_unreachable("Do not know how to scalarize the result of this operator!");
49 case ISD::BITCAST: R = ScalarizeVecRes_BITCAST(N); break;
50 case ISD::BUILD_VECTOR: R = N->getOperand(0); break;
51 case ISD::CONVERT_RNDSAT: R = ScalarizeVecRes_CONVERT_RNDSAT(N); break;
52 case ISD::EXTRACT_SUBVECTOR: R = ScalarizeVecRes_EXTRACT_SUBVECTOR(N); break;
53 case ISD::FP_ROUND_INREG: R = ScalarizeVecRes_InregOp(N); break;
54 case ISD::FPOWI: R = ScalarizeVecRes_FPOWI(N); break;
55 case ISD::INSERT_VECTOR_ELT: R = ScalarizeVecRes_INSERT_VECTOR_ELT(N); break;
56 case ISD::LOAD: R = ScalarizeVecRes_LOAD(cast<LoadSDNode>(N));break;
57 case ISD::SCALAR_TO_VECTOR: R = ScalarizeVecRes_SCALAR_TO_VECTOR(N); break;
58 case ISD::SIGN_EXTEND_INREG: R = ScalarizeVecRes_InregOp(N); break;
59 case ISD::SELECT: R = ScalarizeVecRes_SELECT(N); break;
60 case ISD::SELECT_CC: R = ScalarizeVecRes_SELECT_CC(N); break;
61 case ISD::SETCC: R = ScalarizeVecRes_SETCC(N); break;
62 case ISD::UNDEF: R = ScalarizeVecRes_UNDEF(N); break;
63 case ISD::VECTOR_SHUFFLE: R = ScalarizeVecRes_VECTOR_SHUFFLE(N); break;
64 case ISD::VSETCC: R = ScalarizeVecRes_VSETCC(N); break;
84 case ISD::SIGN_EXTEND:
85 case ISD::ZERO_EXTEND:
87 R = ScalarizeVecRes_UnaryOp(N);
109 R = ScalarizeVecRes_BinOp(N);
113 // If R is null, the sub-method took care of registering the result.
115 SetScalarizedVector(SDValue(N, ResNo), R);
118 SDValue DAGTypeLegalizer::ScalarizeVecRes_BinOp(SDNode *N) {
119 SDValue LHS = GetScalarizedVector(N->getOperand(0));
120 SDValue RHS = GetScalarizedVector(N->getOperand(1));
121 return DAG.getNode(N->getOpcode(), N->getDebugLoc(),
122 LHS.getValueType(), LHS, RHS);
125 SDValue DAGTypeLegalizer::ScalarizeVecRes_BITCAST(SDNode *N) {
126 EVT NewVT = N->getValueType(0).getVectorElementType();
127 return DAG.getNode(ISD::BITCAST, N->getDebugLoc(),
128 NewVT, N->getOperand(0));
131 SDValue DAGTypeLegalizer::ScalarizeVecRes_CONVERT_RNDSAT(SDNode *N) {
132 EVT NewVT = N->getValueType(0).getVectorElementType();
133 SDValue Op0 = GetScalarizedVector(N->getOperand(0));
134 return DAG.getConvertRndSat(NewVT, N->getDebugLoc(),
135 Op0, DAG.getValueType(NewVT),
136 DAG.getValueType(Op0.getValueType()),
139 cast<CvtRndSatSDNode>(N)->getCvtCode());
142 SDValue DAGTypeLegalizer::ScalarizeVecRes_EXTRACT_SUBVECTOR(SDNode *N) {
143 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, N->getDebugLoc(),
144 N->getValueType(0).getVectorElementType(),
145 N->getOperand(0), N->getOperand(1));
148 SDValue DAGTypeLegalizer::ScalarizeVecRes_FPOWI(SDNode *N) {
149 SDValue Op = GetScalarizedVector(N->getOperand(0));
150 return DAG.getNode(ISD::FPOWI, N->getDebugLoc(),
151 Op.getValueType(), Op, N->getOperand(1));
154 SDValue DAGTypeLegalizer::ScalarizeVecRes_INSERT_VECTOR_ELT(SDNode *N) {
155 // The value to insert may have a wider type than the vector element type,
156 // so be sure to truncate it to the element type if necessary.
157 SDValue Op = N->getOperand(1);
158 EVT EltVT = N->getValueType(0).getVectorElementType();
159 if (Op.getValueType() != EltVT)
160 // FIXME: Can this happen for floating point types?
161 Op = DAG.getNode(ISD::TRUNCATE, N->getDebugLoc(), EltVT, Op);
165 SDValue DAGTypeLegalizer::ScalarizeVecRes_LOAD(LoadSDNode *N) {
166 assert(N->isUnindexed() && "Indexed vector load?");
168 SDValue Result = DAG.getLoad(ISD::UNINDEXED,
169 N->getExtensionType(),
170 N->getValueType(0).getVectorElementType(),
172 N->getChain(), N->getBasePtr(),
173 DAG.getUNDEF(N->getBasePtr().getValueType()),
175 N->getMemoryVT().getVectorElementType(),
176 N->isVolatile(), N->isNonTemporal(),
177 N->getOriginalAlignment());
179 // Legalized the chain result - switch anything that used the old chain to
181 ReplaceValueWith(SDValue(N, 1), Result.getValue(1));
185 SDValue DAGTypeLegalizer::ScalarizeVecRes_UnaryOp(SDNode *N) {
186 // Get the dest type - it doesn't always match the input type, e.g. int_to_fp.
187 EVT DestVT = N->getValueType(0).getVectorElementType();
188 SDValue Op = GetScalarizedVector(N->getOperand(0));
189 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), DestVT, Op);
192 SDValue DAGTypeLegalizer::ScalarizeVecRes_InregOp(SDNode *N) {
193 EVT EltVT = N->getValueType(0).getVectorElementType();
194 EVT ExtVT = cast<VTSDNode>(N->getOperand(1))->getVT().getVectorElementType();
195 SDValue LHS = GetScalarizedVector(N->getOperand(0));
196 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), EltVT,
197 LHS, DAG.getValueType(ExtVT));
200 SDValue DAGTypeLegalizer::ScalarizeVecRes_SCALAR_TO_VECTOR(SDNode *N) {
201 // If the operand is wider than the vector element type then it is implicitly
202 // truncated. Make that explicit here.
203 EVT EltVT = N->getValueType(0).getVectorElementType();
204 SDValue InOp = N->getOperand(0);
205 if (InOp.getValueType() != EltVT)
206 return DAG.getNode(ISD::TRUNCATE, N->getDebugLoc(), EltVT, InOp);
210 SDValue DAGTypeLegalizer::ScalarizeVecRes_SELECT(SDNode *N) {
211 SDValue LHS = GetScalarizedVector(N->getOperand(1));
212 return DAG.getNode(ISD::SELECT, N->getDebugLoc(),
213 LHS.getValueType(), N->getOperand(0), LHS,
214 GetScalarizedVector(N->getOperand(2)));
217 SDValue DAGTypeLegalizer::ScalarizeVecRes_SELECT_CC(SDNode *N) {
218 SDValue LHS = GetScalarizedVector(N->getOperand(2));
219 return DAG.getNode(ISD::SELECT_CC, N->getDebugLoc(), LHS.getValueType(),
220 N->getOperand(0), N->getOperand(1),
221 LHS, GetScalarizedVector(N->getOperand(3)),
225 SDValue DAGTypeLegalizer::ScalarizeVecRes_SETCC(SDNode *N) {
226 SDValue LHS = GetScalarizedVector(N->getOperand(0));
227 SDValue RHS = GetScalarizedVector(N->getOperand(1));
228 DebugLoc DL = N->getDebugLoc();
230 // Turn it into a scalar SETCC.
231 return DAG.getNode(ISD::SETCC, DL, MVT::i1, LHS, RHS, N->getOperand(2));
234 SDValue DAGTypeLegalizer::ScalarizeVecRes_UNDEF(SDNode *N) {
235 return DAG.getUNDEF(N->getValueType(0).getVectorElementType());
238 SDValue DAGTypeLegalizer::ScalarizeVecRes_VECTOR_SHUFFLE(SDNode *N) {
239 // Figure out if the scalar is the LHS or RHS and return it.
240 SDValue Arg = N->getOperand(2).getOperand(0);
241 if (Arg.getOpcode() == ISD::UNDEF)
242 return DAG.getUNDEF(N->getValueType(0).getVectorElementType());
243 unsigned Op = !cast<ConstantSDNode>(Arg)->isNullValue();
244 return GetScalarizedVector(N->getOperand(Op));
247 SDValue DAGTypeLegalizer::ScalarizeVecRes_VSETCC(SDNode *N) {
248 SDValue LHS = GetScalarizedVector(N->getOperand(0));
249 SDValue RHS = GetScalarizedVector(N->getOperand(1));
250 EVT NVT = N->getValueType(0).getVectorElementType();
251 EVT SVT = TLI.getSetCCResultType(LHS.getValueType());
252 DebugLoc DL = N->getDebugLoc();
254 // Turn it into a scalar SETCC.
255 SDValue Res = DAG.getNode(ISD::SETCC, DL, SVT, LHS, RHS, N->getOperand(2));
257 // VSETCC always returns a sign-extended value, while SETCC may not. The
258 // SETCC result type may not match the vector element type. Correct these.
259 if (NVT.bitsLE(SVT)) {
260 // The SETCC result type is bigger than the vector element type.
261 // Ensure the SETCC result is sign-extended.
262 if (TLI.getBooleanContents() !=
263 TargetLowering::ZeroOrNegativeOneBooleanContent)
264 Res = DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, SVT, Res,
265 DAG.getValueType(MVT::i1));
266 // Truncate to the final type.
267 return DAG.getNode(ISD::TRUNCATE, DL, NVT, Res);
270 // The SETCC result type is smaller than the vector element type.
271 // If the SetCC result is not sign-extended, chop it down to MVT::i1.
272 if (TLI.getBooleanContents() !=
273 TargetLowering::ZeroOrNegativeOneBooleanContent)
274 Res = DAG.getNode(ISD::TRUNCATE, DL, MVT::i1, Res);
275 // Sign extend to the final type.
276 return DAG.getNode(ISD::SIGN_EXTEND, DL, NVT, Res);
280 //===----------------------------------------------------------------------===//
281 // Operand Vector Scalarization <1 x ty> -> ty.
282 //===----------------------------------------------------------------------===//
284 bool DAGTypeLegalizer::ScalarizeVectorOperand(SDNode *N, unsigned OpNo) {
285 DEBUG(dbgs() << "Scalarize node operand " << OpNo << ": ";
288 SDValue Res = SDValue();
290 if (Res.getNode() == 0) {
291 switch (N->getOpcode()) {
294 dbgs() << "ScalarizeVectorOperand Op #" << OpNo << ": ";
298 llvm_unreachable("Do not know how to scalarize this operator's operand!");
300 Res = ScalarizeVecOp_BITCAST(N);
302 case ISD::CONCAT_VECTORS:
303 Res = ScalarizeVecOp_CONCAT_VECTORS(N);
305 case ISD::EXTRACT_VECTOR_ELT:
306 Res = ScalarizeVecOp_EXTRACT_VECTOR_ELT(N);
309 Res = ScalarizeVecOp_STORE(cast<StoreSDNode>(N), OpNo);
314 // If the result is null, the sub-method took care of registering results etc.
315 if (!Res.getNode()) return false;
317 // If the result is N, the sub-method updated N in place. Tell the legalizer
319 if (Res.getNode() == N)
322 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
323 "Invalid operand expansion");
325 ReplaceValueWith(SDValue(N, 0), Res);
329 /// ScalarizeVecOp_BITCAST - If the value to convert is a vector that needs
330 /// to be scalarized, it must be <1 x ty>. Convert the element instead.
331 SDValue DAGTypeLegalizer::ScalarizeVecOp_BITCAST(SDNode *N) {
332 SDValue Elt = GetScalarizedVector(N->getOperand(0));
333 return DAG.getNode(ISD::BITCAST, N->getDebugLoc(),
334 N->getValueType(0), Elt);
337 /// ScalarizeVecOp_CONCAT_VECTORS - The vectors to concatenate have length one -
338 /// use a BUILD_VECTOR instead.
339 SDValue DAGTypeLegalizer::ScalarizeVecOp_CONCAT_VECTORS(SDNode *N) {
340 SmallVector<SDValue, 8> Ops(N->getNumOperands());
341 for (unsigned i = 0, e = N->getNumOperands(); i < e; ++i)
342 Ops[i] = GetScalarizedVector(N->getOperand(i));
343 return DAG.getNode(ISD::BUILD_VECTOR, N->getDebugLoc(), N->getValueType(0),
344 &Ops[0], Ops.size());
347 /// ScalarizeVecOp_EXTRACT_VECTOR_ELT - If the input is a vector that needs to
348 /// be scalarized, it must be <1 x ty>, so just return the element, ignoring the
350 SDValue DAGTypeLegalizer::ScalarizeVecOp_EXTRACT_VECTOR_ELT(SDNode *N) {
351 SDValue Res = GetScalarizedVector(N->getOperand(0));
352 if (Res.getValueType() != N->getValueType(0))
353 Res = DAG.getNode(ISD::ANY_EXTEND, N->getDebugLoc(), N->getValueType(0),
358 /// ScalarizeVecOp_STORE - If the value to store is a vector that needs to be
359 /// scalarized, it must be <1 x ty>. Just store the element.
360 SDValue DAGTypeLegalizer::ScalarizeVecOp_STORE(StoreSDNode *N, unsigned OpNo){
361 assert(N->isUnindexed() && "Indexed store of one-element vector?");
362 assert(OpNo == 1 && "Do not know how to scalarize this operand!");
363 DebugLoc dl = N->getDebugLoc();
365 if (N->isTruncatingStore())
366 return DAG.getTruncStore(N->getChain(), dl,
367 GetScalarizedVector(N->getOperand(1)),
368 N->getBasePtr(), N->getPointerInfo(),
369 N->getMemoryVT().getVectorElementType(),
370 N->isVolatile(), N->isNonTemporal(),
373 return DAG.getStore(N->getChain(), dl, GetScalarizedVector(N->getOperand(1)),
374 N->getBasePtr(), N->getPointerInfo(),
375 N->isVolatile(), N->isNonTemporal(),
376 N->getOriginalAlignment());
380 //===----------------------------------------------------------------------===//
381 // Result Vector Splitting
382 //===----------------------------------------------------------------------===//
384 /// SplitVectorResult - This method is called when the specified result of the
385 /// specified node is found to need vector splitting. At this point, the node
386 /// may also have invalid operands or may have other results that need
387 /// legalization, we just know that (at least) one result needs vector
389 void DAGTypeLegalizer::SplitVectorResult(SDNode *N, unsigned ResNo) {
390 DEBUG(dbgs() << "Split node result: ";
395 switch (N->getOpcode()) {
398 dbgs() << "SplitVectorResult #" << ResNo << ": ";
402 llvm_unreachable("Do not know how to split the result of this operator!");
404 case ISD::MERGE_VALUES: SplitRes_MERGE_VALUES(N, Lo, Hi); break;
405 case ISD::SELECT: SplitRes_SELECT(N, Lo, Hi); break;
406 case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break;
407 case ISD::UNDEF: SplitRes_UNDEF(N, Lo, Hi); break;
409 case ISD::BITCAST: SplitVecRes_BITCAST(N, Lo, Hi); break;
410 case ISD::BUILD_VECTOR: SplitVecRes_BUILD_VECTOR(N, Lo, Hi); break;
411 case ISD::CONCAT_VECTORS: SplitVecRes_CONCAT_VECTORS(N, Lo, Hi); break;
412 case ISD::CONVERT_RNDSAT: SplitVecRes_CONVERT_RNDSAT(N, Lo, Hi); break;
413 case ISD::EXTRACT_SUBVECTOR: SplitVecRes_EXTRACT_SUBVECTOR(N, Lo, Hi); break;
414 case ISD::FP_ROUND_INREG: SplitVecRes_InregOp(N, Lo, Hi); break;
415 case ISD::FPOWI: SplitVecRes_FPOWI(N, Lo, Hi); break;
416 case ISD::INSERT_VECTOR_ELT: SplitVecRes_INSERT_VECTOR_ELT(N, Lo, Hi); break;
417 case ISD::SCALAR_TO_VECTOR: SplitVecRes_SCALAR_TO_VECTOR(N, Lo, Hi); break;
418 case ISD::SIGN_EXTEND_INREG: SplitVecRes_InregOp(N, Lo, Hi); break;
420 SplitVecRes_LOAD(cast<LoadSDNode>(N), Lo, Hi);
424 SplitVecRes_SETCC(N, Lo, Hi);
426 case ISD::VECTOR_SHUFFLE:
427 SplitVecRes_VECTOR_SHUFFLE(cast<ShuffleVectorSDNode>(N), Lo, Hi);
442 case ISD::FNEARBYINT:
443 case ISD::FP_TO_SINT:
444 case ISD::FP_TO_UINT:
445 case ISD::SINT_TO_FP:
446 case ISD::UINT_TO_FP:
448 case ISD::SIGN_EXTEND:
449 case ISD::ZERO_EXTEND:
450 case ISD::ANY_EXTEND:
456 SplitVecRes_UnaryOp(N, Lo, Hi);
478 SplitVecRes_BinOp(N, Lo, Hi);
482 // If Lo/Hi is null, the sub-method took care of registering results etc.
484 SetSplitVector(SDValue(N, ResNo), Lo, Hi);
487 void DAGTypeLegalizer::SplitVecRes_BinOp(SDNode *N, SDValue &Lo,
489 SDValue LHSLo, LHSHi;
490 GetSplitVector(N->getOperand(0), LHSLo, LHSHi);
491 SDValue RHSLo, RHSHi;
492 GetSplitVector(N->getOperand(1), RHSLo, RHSHi);
493 DebugLoc dl = N->getDebugLoc();
495 Lo = DAG.getNode(N->getOpcode(), dl, LHSLo.getValueType(), LHSLo, RHSLo);
496 Hi = DAG.getNode(N->getOpcode(), dl, LHSHi.getValueType(), LHSHi, RHSHi);
499 void DAGTypeLegalizer::SplitVecRes_BITCAST(SDNode *N, SDValue &Lo,
501 // We know the result is a vector. The input may be either a vector or a
504 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
505 DebugLoc dl = N->getDebugLoc();
507 SDValue InOp = N->getOperand(0);
508 EVT InVT = InOp.getValueType();
510 // Handle some special cases efficiently.
511 switch (getTypeAction(InVT)) {
513 assert(false && "Unknown type action!");
517 case ScalarizeVector:
521 // A scalar to vector conversion, where the scalar needs expansion.
522 // If the vector is being split in two then we can just convert the
525 GetExpandedOp(InOp, Lo, Hi);
526 if (TLI.isBigEndian())
528 Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo);
529 Hi = DAG.getNode(ISD::BITCAST, dl, HiVT, Hi);
534 // If the input is a vector that needs to be split, convert each split
535 // piece of the input now.
536 GetSplitVector(InOp, Lo, Hi);
537 Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo);
538 Hi = DAG.getNode(ISD::BITCAST, dl, HiVT, Hi);
542 // In the general case, convert the input to an integer and split it by hand.
543 EVT LoIntVT = EVT::getIntegerVT(*DAG.getContext(), LoVT.getSizeInBits());
544 EVT HiIntVT = EVT::getIntegerVT(*DAG.getContext(), HiVT.getSizeInBits());
545 if (TLI.isBigEndian())
546 std::swap(LoIntVT, HiIntVT);
548 SplitInteger(BitConvertToInteger(InOp), LoIntVT, HiIntVT, Lo, Hi);
550 if (TLI.isBigEndian())
552 Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo);
553 Hi = DAG.getNode(ISD::BITCAST, dl, HiVT, Hi);
556 void DAGTypeLegalizer::SplitVecRes_BUILD_VECTOR(SDNode *N, SDValue &Lo,
559 DebugLoc dl = N->getDebugLoc();
560 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
561 unsigned LoNumElts = LoVT.getVectorNumElements();
562 SmallVector<SDValue, 8> LoOps(N->op_begin(), N->op_begin()+LoNumElts);
563 Lo = DAG.getNode(ISD::BUILD_VECTOR, dl, LoVT, &LoOps[0], LoOps.size());
565 SmallVector<SDValue, 8> HiOps(N->op_begin()+LoNumElts, N->op_end());
566 Hi = DAG.getNode(ISD::BUILD_VECTOR, dl, HiVT, &HiOps[0], HiOps.size());
569 void DAGTypeLegalizer::SplitVecRes_CONCAT_VECTORS(SDNode *N, SDValue &Lo,
571 assert(!(N->getNumOperands() & 1) && "Unsupported CONCAT_VECTORS");
572 DebugLoc dl = N->getDebugLoc();
573 unsigned NumSubvectors = N->getNumOperands() / 2;
574 if (NumSubvectors == 1) {
575 Lo = N->getOperand(0);
576 Hi = N->getOperand(1);
581 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
583 SmallVector<SDValue, 8> LoOps(N->op_begin(), N->op_begin()+NumSubvectors);
584 Lo = DAG.getNode(ISD::CONCAT_VECTORS, dl, LoVT, &LoOps[0], LoOps.size());
586 SmallVector<SDValue, 8> HiOps(N->op_begin()+NumSubvectors, N->op_end());
587 Hi = DAG.getNode(ISD::CONCAT_VECTORS, dl, HiVT, &HiOps[0], HiOps.size());
590 void DAGTypeLegalizer::SplitVecRes_CONVERT_RNDSAT(SDNode *N, SDValue &Lo,
593 DebugLoc dl = N->getDebugLoc();
594 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
596 SDValue DTyOpLo = DAG.getValueType(LoVT);
597 SDValue DTyOpHi = DAG.getValueType(HiVT);
599 SDValue RndOp = N->getOperand(3);
600 SDValue SatOp = N->getOperand(4);
601 ISD::CvtCode CvtCode = cast<CvtRndSatSDNode>(N)->getCvtCode();
605 EVT InVT = N->getOperand(0).getValueType();
606 switch (getTypeAction(InVT)) {
607 default: llvm_unreachable("Unexpected type action!");
609 EVT InNVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(),
610 LoVT.getVectorNumElements());
611 VLo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, N->getOperand(0),
612 DAG.getIntPtrConstant(0));
613 VHi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, N->getOperand(0),
614 DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
618 GetSplitVector(N->getOperand(0), VLo, VHi);
621 // If the result needs to be split and the input needs to be widened,
622 // the two types must have different lengths. Use the widened result
623 // and extract from it to do the split.
624 SDValue InOp = GetWidenedVector(N->getOperand(0));
625 EVT InNVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(),
626 LoVT.getVectorNumElements());
627 VLo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, InOp,
628 DAG.getIntPtrConstant(0));
629 VHi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, InOp,
630 DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
635 SDValue STyOpLo = DAG.getValueType(VLo.getValueType());
636 SDValue STyOpHi = DAG.getValueType(VHi.getValueType());
638 Lo = DAG.getConvertRndSat(LoVT, dl, VLo, DTyOpLo, STyOpLo, RndOp, SatOp,
640 Hi = DAG.getConvertRndSat(HiVT, dl, VHi, DTyOpHi, STyOpHi, RndOp, SatOp,
644 void DAGTypeLegalizer::SplitVecRes_EXTRACT_SUBVECTOR(SDNode *N, SDValue &Lo,
646 SDValue Vec = N->getOperand(0);
647 SDValue Idx = N->getOperand(1);
648 DebugLoc dl = N->getDebugLoc();
651 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
653 Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, LoVT, Vec, Idx);
654 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
655 Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, HiVT, Vec,
656 DAG.getIntPtrConstant(IdxVal + LoVT.getVectorNumElements()));
659 void DAGTypeLegalizer::SplitVecRes_FPOWI(SDNode *N, SDValue &Lo,
661 DebugLoc dl = N->getDebugLoc();
662 GetSplitVector(N->getOperand(0), Lo, Hi);
663 Lo = DAG.getNode(ISD::FPOWI, dl, Lo.getValueType(), Lo, N->getOperand(1));
664 Hi = DAG.getNode(ISD::FPOWI, dl, Hi.getValueType(), Hi, N->getOperand(1));
667 void DAGTypeLegalizer::SplitVecRes_InregOp(SDNode *N, SDValue &Lo,
669 SDValue LHSLo, LHSHi;
670 GetSplitVector(N->getOperand(0), LHSLo, LHSHi);
671 DebugLoc dl = N->getDebugLoc();
674 GetSplitDestVTs(cast<VTSDNode>(N->getOperand(1))->getVT(), LoVT, HiVT);
676 Lo = DAG.getNode(N->getOpcode(), dl, LHSLo.getValueType(), LHSLo,
677 DAG.getValueType(LoVT));
678 Hi = DAG.getNode(N->getOpcode(), dl, LHSHi.getValueType(), LHSHi,
679 DAG.getValueType(HiVT));
682 void DAGTypeLegalizer::SplitVecRes_INSERT_VECTOR_ELT(SDNode *N, SDValue &Lo,
684 SDValue Vec = N->getOperand(0);
685 SDValue Elt = N->getOperand(1);
686 SDValue Idx = N->getOperand(2);
687 DebugLoc dl = N->getDebugLoc();
688 GetSplitVector(Vec, Lo, Hi);
690 if (ConstantSDNode *CIdx = dyn_cast<ConstantSDNode>(Idx)) {
691 unsigned IdxVal = CIdx->getZExtValue();
692 unsigned LoNumElts = Lo.getValueType().getVectorNumElements();
693 if (IdxVal < LoNumElts)
694 Lo = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl,
695 Lo.getValueType(), Lo, Elt, Idx);
697 Hi = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, Hi.getValueType(), Hi, Elt,
698 DAG.getIntPtrConstant(IdxVal - LoNumElts));
702 // Spill the vector to the stack.
703 EVT VecVT = Vec.getValueType();
704 EVT EltVT = VecVT.getVectorElementType();
705 SDValue StackPtr = DAG.CreateStackTemporary(VecVT);
706 SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, Vec, StackPtr,
707 MachinePointerInfo(), false, false, 0);
709 // Store the new element. This may be larger than the vector element type,
710 // so use a truncating store.
711 SDValue EltPtr = GetVectorElementPointer(StackPtr, EltVT, Idx);
712 const Type *VecType = VecVT.getTypeForEVT(*DAG.getContext());
714 TLI.getTargetData()->getPrefTypeAlignment(VecType);
715 Store = DAG.getTruncStore(Store, dl, Elt, EltPtr, MachinePointerInfo(), EltVT,
718 // Load the Lo part from the stack slot.
719 Lo = DAG.getLoad(Lo.getValueType(), dl, Store, StackPtr, MachinePointerInfo(),
722 // Increment the pointer to the other part.
723 unsigned IncrementSize = Lo.getValueType().getSizeInBits() / 8;
724 StackPtr = DAG.getNode(ISD::ADD, dl, StackPtr.getValueType(), StackPtr,
725 DAG.getIntPtrConstant(IncrementSize));
727 // Load the Hi part from the stack slot.
728 Hi = DAG.getLoad(Hi.getValueType(), dl, Store, StackPtr, MachinePointerInfo(),
729 false, false, MinAlign(Alignment, IncrementSize));
732 void DAGTypeLegalizer::SplitVecRes_SCALAR_TO_VECTOR(SDNode *N, SDValue &Lo,
735 DebugLoc dl = N->getDebugLoc();
736 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
737 Lo = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, LoVT, N->getOperand(0));
738 Hi = DAG.getUNDEF(HiVT);
741 void DAGTypeLegalizer::SplitVecRes_LOAD(LoadSDNode *LD, SDValue &Lo,
743 assert(ISD::isUNINDEXEDLoad(LD) && "Indexed load during type legalization!");
745 DebugLoc dl = LD->getDebugLoc();
746 GetSplitDestVTs(LD->getValueType(0), LoVT, HiVT);
748 ISD::LoadExtType ExtType = LD->getExtensionType();
749 SDValue Ch = LD->getChain();
750 SDValue Ptr = LD->getBasePtr();
751 SDValue Offset = DAG.getUNDEF(Ptr.getValueType());
752 EVT MemoryVT = LD->getMemoryVT();
753 unsigned Alignment = LD->getOriginalAlignment();
754 bool isVolatile = LD->isVolatile();
755 bool isNonTemporal = LD->isNonTemporal();
757 EVT LoMemVT, HiMemVT;
758 GetSplitDestVTs(MemoryVT, LoMemVT, HiMemVT);
760 Lo = DAG.getLoad(ISD::UNINDEXED, ExtType, LoVT, dl, Ch, Ptr, Offset,
761 LD->getPointerInfo(), LoMemVT, isVolatile, isNonTemporal,
764 unsigned IncrementSize = LoMemVT.getSizeInBits()/8;
765 Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr,
766 DAG.getIntPtrConstant(IncrementSize));
767 Hi = DAG.getLoad(ISD::UNINDEXED, ExtType, HiVT, dl, Ch, Ptr, Offset,
768 LD->getPointerInfo().getWithOffset(IncrementSize),
769 HiMemVT, isVolatile, isNonTemporal, Alignment);
771 // Build a factor node to remember that this load is independent of the
773 Ch = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Lo.getValue(1),
776 // Legalized the chain result - switch anything that used the old chain to
778 ReplaceValueWith(SDValue(LD, 1), Ch);
781 void DAGTypeLegalizer::SplitVecRes_SETCC(SDNode *N, SDValue &Lo, SDValue &Hi) {
783 DebugLoc DL = N->getDebugLoc();
784 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
787 EVT InVT = N->getOperand(0).getValueType();
788 SDValue LL, LH, RL, RH;
789 EVT InNVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(),
790 LoVT.getVectorNumElements());
791 LL = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(0),
792 DAG.getIntPtrConstant(0));
793 LH = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(0),
794 DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
796 RL = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(1),
797 DAG.getIntPtrConstant(0));
798 RH = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(1),
799 DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
801 Lo = DAG.getNode(N->getOpcode(), DL, LoVT, LL, RL, N->getOperand(2));
802 Hi = DAG.getNode(N->getOpcode(), DL, HiVT, LH, RH, N->getOperand(2));
805 void DAGTypeLegalizer::SplitVecRes_UnaryOp(SDNode *N, SDValue &Lo,
807 // Get the dest types - they may not match the input types, e.g. int_to_fp.
809 DebugLoc dl = N->getDebugLoc();
810 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
813 EVT InVT = N->getOperand(0).getValueType();
814 switch (getTypeAction(InVT)) {
815 default: llvm_unreachable("Unexpected type action!");
817 EVT InNVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(),
818 LoVT.getVectorNumElements());
819 Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, N->getOperand(0),
820 DAG.getIntPtrConstant(0));
821 Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, N->getOperand(0),
822 DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
826 GetSplitVector(N->getOperand(0), Lo, Hi);
829 // If the result needs to be split and the input needs to be widened,
830 // the two types must have different lengths. Use the widened result
831 // and extract from it to do the split.
832 SDValue InOp = GetWidenedVector(N->getOperand(0));
833 EVT InNVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(),
834 LoVT.getVectorNumElements());
835 Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, InOp,
836 DAG.getIntPtrConstant(0));
837 Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, InOp,
838 DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
843 Lo = DAG.getNode(N->getOpcode(), dl, LoVT, Lo);
844 Hi = DAG.getNode(N->getOpcode(), dl, HiVT, Hi);
847 void DAGTypeLegalizer::SplitVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N,
848 SDValue &Lo, SDValue &Hi) {
849 // The low and high parts of the original input give four input vectors.
851 DebugLoc dl = N->getDebugLoc();
852 GetSplitVector(N->getOperand(0), Inputs[0], Inputs[1]);
853 GetSplitVector(N->getOperand(1), Inputs[2], Inputs[3]);
854 EVT NewVT = Inputs[0].getValueType();
855 unsigned NewElts = NewVT.getVectorNumElements();
857 // If Lo or Hi uses elements from at most two of the four input vectors, then
858 // express it as a vector shuffle of those two inputs. Otherwise extract the
859 // input elements by hand and construct the Lo/Hi output using a BUILD_VECTOR.
860 SmallVector<int, 16> Ops;
861 for (unsigned High = 0; High < 2; ++High) {
862 SDValue &Output = High ? Hi : Lo;
864 // Build a shuffle mask for the output, discovering on the fly which
865 // input vectors to use as shuffle operands (recorded in InputUsed).
866 // If building a suitable shuffle vector proves too hard, then bail
867 // out with useBuildVector set.
868 unsigned InputUsed[2] = { -1U, -1U }; // Not yet discovered.
869 unsigned FirstMaskIdx = High * NewElts;
870 bool useBuildVector = false;
871 for (unsigned MaskOffset = 0; MaskOffset < NewElts; ++MaskOffset) {
872 // The mask element. This indexes into the input.
873 int Idx = N->getMaskElt(FirstMaskIdx + MaskOffset);
875 // The input vector this mask element indexes into.
876 unsigned Input = (unsigned)Idx / NewElts;
878 if (Input >= array_lengthof(Inputs)) {
879 // The mask element does not index into any input vector.
884 // Turn the index into an offset from the start of the input vector.
885 Idx -= Input * NewElts;
887 // Find or create a shuffle vector operand to hold this input.
889 for (OpNo = 0; OpNo < array_lengthof(InputUsed); ++OpNo) {
890 if (InputUsed[OpNo] == Input) {
891 // This input vector is already an operand.
893 } else if (InputUsed[OpNo] == -1U) {
894 // Create a new operand for this input vector.
895 InputUsed[OpNo] = Input;
900 if (OpNo >= array_lengthof(InputUsed)) {
901 // More than two input vectors used! Give up on trying to create a
902 // shuffle vector. Insert all elements into a BUILD_VECTOR instead.
903 useBuildVector = true;
907 // Add the mask index for the new shuffle vector.
908 Ops.push_back(Idx + OpNo * NewElts);
911 if (useBuildVector) {
912 EVT EltVT = NewVT.getVectorElementType();
913 SmallVector<SDValue, 16> SVOps;
915 // Extract the input elements by hand.
916 for (unsigned MaskOffset = 0; MaskOffset < NewElts; ++MaskOffset) {
917 // The mask element. This indexes into the input.
918 int Idx = N->getMaskElt(FirstMaskIdx + MaskOffset);
920 // The input vector this mask element indexes into.
921 unsigned Input = (unsigned)Idx / NewElts;
923 if (Input >= array_lengthof(Inputs)) {
924 // The mask element is "undef" or indexes off the end of the input.
925 SVOps.push_back(DAG.getUNDEF(EltVT));
929 // Turn the index into an offset from the start of the input vector.
930 Idx -= Input * NewElts;
932 // Extract the vector element by hand.
933 SVOps.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT,
934 Inputs[Input], DAG.getIntPtrConstant(Idx)));
937 // Construct the Lo/Hi output using a BUILD_VECTOR.
938 Output = DAG.getNode(ISD::BUILD_VECTOR,dl,NewVT, &SVOps[0], SVOps.size());
939 } else if (InputUsed[0] == -1U) {
940 // No input vectors were used! The result is undefined.
941 Output = DAG.getUNDEF(NewVT);
943 SDValue Op0 = Inputs[InputUsed[0]];
944 // If only one input was used, use an undefined vector for the other.
945 SDValue Op1 = InputUsed[1] == -1U ?
946 DAG.getUNDEF(NewVT) : Inputs[InputUsed[1]];
947 // At least one input vector was used. Create a new shuffle vector.
948 Output = DAG.getVectorShuffle(NewVT, dl, Op0, Op1, &Ops[0]);
956 //===----------------------------------------------------------------------===//
957 // Operand Vector Splitting
958 //===----------------------------------------------------------------------===//
960 /// SplitVectorOperand - This method is called when the specified operand of the
961 /// specified node is found to need vector splitting. At this point, all of the
962 /// result types of the node are known to be legal, but other operands of the
963 /// node may need legalization as well as the specified one.
964 bool DAGTypeLegalizer::SplitVectorOperand(SDNode *N, unsigned OpNo) {
965 DEBUG(dbgs() << "Split node operand: ";
968 SDValue Res = SDValue();
970 if (Res.getNode() == 0) {
971 switch (N->getOpcode()) {
974 dbgs() << "SplitVectorOperand Op #" << OpNo << ": ";
978 llvm_unreachable("Do not know how to split this operator's operand!");
980 case ISD::BITCAST: Res = SplitVecOp_BITCAST(N); break;
981 case ISD::EXTRACT_SUBVECTOR: Res = SplitVecOp_EXTRACT_SUBVECTOR(N); break;
982 case ISD::EXTRACT_VECTOR_ELT:Res = SplitVecOp_EXTRACT_VECTOR_ELT(N); break;
983 case ISD::CONCAT_VECTORS: Res = SplitVecOp_CONCAT_VECTORS(N); break;
984 case ISD::FP_ROUND: Res = SplitVecOp_FP_ROUND(N); break;
986 Res = SplitVecOp_STORE(cast<StoreSDNode>(N), OpNo);
992 case ISD::FP_TO_SINT:
993 case ISD::FP_TO_UINT:
994 case ISD::SINT_TO_FP:
995 case ISD::UINT_TO_FP:
999 case ISD::SIGN_EXTEND:
1000 case ISD::ZERO_EXTEND:
1001 case ISD::ANY_EXTEND:
1002 Res = SplitVecOp_UnaryOp(N);
1007 // If the result is null, the sub-method took care of registering results etc.
1008 if (!Res.getNode()) return false;
1010 // If the result is N, the sub-method updated N in place. Tell the legalizer
1012 if (Res.getNode() == N)
1015 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
1016 "Invalid operand expansion");
1018 ReplaceValueWith(SDValue(N, 0), Res);
1022 SDValue DAGTypeLegalizer::SplitVecOp_UnaryOp(SDNode *N) {
1023 // The result has a legal vector type, but the input needs splitting.
1024 EVT ResVT = N->getValueType(0);
1026 DebugLoc dl = N->getDebugLoc();
1027 GetSplitVector(N->getOperand(0), Lo, Hi);
1028 EVT InVT = Lo.getValueType();
1030 EVT OutVT = EVT::getVectorVT(*DAG.getContext(), ResVT.getVectorElementType(),
1031 InVT.getVectorNumElements());
1033 Lo = DAG.getNode(N->getOpcode(), dl, OutVT, Lo);
1034 Hi = DAG.getNode(N->getOpcode(), dl, OutVT, Hi);
1036 return DAG.getNode(ISD::CONCAT_VECTORS, dl, ResVT, Lo, Hi);
1039 SDValue DAGTypeLegalizer::SplitVecOp_BITCAST(SDNode *N) {
1040 // For example, i64 = BITCAST v4i16 on alpha. Typically the vector will
1041 // end up being split all the way down to individual components. Convert the
1042 // split pieces into integers and reassemble.
1044 GetSplitVector(N->getOperand(0), Lo, Hi);
1045 Lo = BitConvertToInteger(Lo);
1046 Hi = BitConvertToInteger(Hi);
1048 if (TLI.isBigEndian())
1051 return DAG.getNode(ISD::BITCAST, N->getDebugLoc(), N->getValueType(0),
1052 JoinIntegers(Lo, Hi));
1055 SDValue DAGTypeLegalizer::SplitVecOp_EXTRACT_SUBVECTOR(SDNode *N) {
1056 // We know that the extracted result type is legal.
1057 EVT SubVT = N->getValueType(0);
1058 SDValue Idx = N->getOperand(1);
1059 DebugLoc dl = N->getDebugLoc();
1061 GetSplitVector(N->getOperand(0), Lo, Hi);
1063 uint64_t LoElts = Lo.getValueType().getVectorNumElements();
1064 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
1066 if (IdxVal < LoElts) {
1067 assert(IdxVal + SubVT.getVectorNumElements() <= LoElts &&
1068 "Extracted subvector crosses vector split!");
1069 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, SubVT, Lo, Idx);
1071 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, SubVT, Hi,
1072 DAG.getConstant(IdxVal - LoElts, Idx.getValueType()));
1076 SDValue DAGTypeLegalizer::SplitVecOp_EXTRACT_VECTOR_ELT(SDNode *N) {
1077 SDValue Vec = N->getOperand(0);
1078 SDValue Idx = N->getOperand(1);
1079 EVT VecVT = Vec.getValueType();
1081 if (isa<ConstantSDNode>(Idx)) {
1082 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
1083 assert(IdxVal < VecVT.getVectorNumElements() && "Invalid vector index!");
1086 GetSplitVector(Vec, Lo, Hi);
1088 uint64_t LoElts = Lo.getValueType().getVectorNumElements();
1090 if (IdxVal < LoElts)
1091 return SDValue(DAG.UpdateNodeOperands(N, Lo, Idx), 0);
1092 return SDValue(DAG.UpdateNodeOperands(N, Hi,
1093 DAG.getConstant(IdxVal - LoElts,
1094 Idx.getValueType())), 0);
1097 // Store the vector to the stack.
1098 EVT EltVT = VecVT.getVectorElementType();
1099 DebugLoc dl = N->getDebugLoc();
1100 SDValue StackPtr = DAG.CreateStackTemporary(VecVT);
1101 SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, Vec, StackPtr,
1102 MachinePointerInfo(), false, false, 0);
1104 // Load back the required element.
1105 StackPtr = GetVectorElementPointer(StackPtr, EltVT, Idx);
1106 return DAG.getExtLoad(ISD::EXTLOAD, N->getValueType(0), dl, Store, StackPtr,
1107 MachinePointerInfo(), EltVT, false, false, 0);
1110 SDValue DAGTypeLegalizer::SplitVecOp_STORE(StoreSDNode *N, unsigned OpNo) {
1111 assert(N->isUnindexed() && "Indexed store of vector?");
1112 assert(OpNo == 1 && "Can only split the stored value");
1113 DebugLoc DL = N->getDebugLoc();
1115 bool isTruncating = N->isTruncatingStore();
1116 SDValue Ch = N->getChain();
1117 SDValue Ptr = N->getBasePtr();
1118 EVT MemoryVT = N->getMemoryVT();
1119 unsigned Alignment = N->getOriginalAlignment();
1120 bool isVol = N->isVolatile();
1121 bool isNT = N->isNonTemporal();
1123 GetSplitVector(N->getOperand(1), Lo, Hi);
1125 EVT LoMemVT, HiMemVT;
1126 GetSplitDestVTs(MemoryVT, LoMemVT, HiMemVT);
1128 unsigned IncrementSize = LoMemVT.getSizeInBits()/8;
1131 Lo = DAG.getTruncStore(Ch, DL, Lo, Ptr, N->getPointerInfo(),
1132 LoMemVT, isVol, isNT, Alignment);
1134 Lo = DAG.getStore(Ch, DL, Lo, Ptr, N->getPointerInfo(),
1135 isVol, isNT, Alignment);
1137 // Increment the pointer to the other half.
1138 Ptr = DAG.getNode(ISD::ADD, DL, Ptr.getValueType(), Ptr,
1139 DAG.getIntPtrConstant(IncrementSize));
1142 Hi = DAG.getTruncStore(Ch, DL, Hi, Ptr,
1143 N->getPointerInfo().getWithOffset(IncrementSize),
1144 HiMemVT, isVol, isNT, Alignment);
1146 Hi = DAG.getStore(Ch, DL, Hi, Ptr,
1147 N->getPointerInfo().getWithOffset(IncrementSize),
1148 isVol, isNT, Alignment);
1150 return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Lo, Hi);
1153 SDValue DAGTypeLegalizer::SplitVecOp_CONCAT_VECTORS(SDNode *N) {
1154 DebugLoc DL = N->getDebugLoc();
1156 // The input operands all must have the same type, and we know the result the
1157 // result type is valid. Convert this to a buildvector which extracts all the
1159 // TODO: If the input elements are power-two vectors, we could convert this to
1160 // a new CONCAT_VECTORS node with elements that are half-wide.
1161 SmallVector<SDValue, 32> Elts;
1162 EVT EltVT = N->getValueType(0).getVectorElementType();
1163 for (unsigned op = 0, e = N->getNumOperands(); op != e; ++op) {
1164 SDValue Op = N->getOperand(op);
1165 for (unsigned i = 0, e = Op.getValueType().getVectorNumElements();
1167 Elts.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, EltVT,
1168 Op, DAG.getIntPtrConstant(i)));
1173 return DAG.getNode(ISD::BUILD_VECTOR, DL, N->getValueType(0),
1174 &Elts[0], Elts.size());
1177 SDValue DAGTypeLegalizer::SplitVecOp_FP_ROUND(SDNode *N) {
1178 // The result has a legal vector type, but the input needs splitting.
1179 EVT ResVT = N->getValueType(0);
1181 DebugLoc DL = N->getDebugLoc();
1182 GetSplitVector(N->getOperand(0), Lo, Hi);
1183 EVT InVT = Lo.getValueType();
1185 EVT OutVT = EVT::getVectorVT(*DAG.getContext(), ResVT.getVectorElementType(),
1186 InVT.getVectorNumElements());
1188 Lo = DAG.getNode(ISD::FP_ROUND, DL, OutVT, Lo, N->getOperand(1));
1189 Hi = DAG.getNode(ISD::FP_ROUND, DL, OutVT, Hi, N->getOperand(1));
1191 return DAG.getNode(ISD::CONCAT_VECTORS, DL, ResVT, Lo, Hi);
1196 //===----------------------------------------------------------------------===//
1197 // Result Vector Widening
1198 //===----------------------------------------------------------------------===//
1200 void DAGTypeLegalizer::WidenVectorResult(SDNode *N, unsigned ResNo) {
1201 DEBUG(dbgs() << "Widen node result " << ResNo << ": ";
1205 // See if the target wants to custom widen this node.
1206 if (CustomWidenLowerNode(N, N->getValueType(ResNo)))
1209 SDValue Res = SDValue();
1210 switch (N->getOpcode()) {
1213 dbgs() << "WidenVectorResult #" << ResNo << ": ";
1217 llvm_unreachable("Do not know how to widen the result of this operator!");
1219 case ISD::BITCAST: Res = WidenVecRes_BITCAST(N); break;
1220 case ISD::BUILD_VECTOR: Res = WidenVecRes_BUILD_VECTOR(N); break;
1221 case ISD::CONCAT_VECTORS: Res = WidenVecRes_CONCAT_VECTORS(N); break;
1222 case ISD::CONVERT_RNDSAT: Res = WidenVecRes_CONVERT_RNDSAT(N); break;
1223 case ISD::EXTRACT_SUBVECTOR: Res = WidenVecRes_EXTRACT_SUBVECTOR(N); break;
1224 case ISD::FP_ROUND_INREG: Res = WidenVecRes_InregOp(N); break;
1225 case ISD::INSERT_VECTOR_ELT: Res = WidenVecRes_INSERT_VECTOR_ELT(N); break;
1226 case ISD::LOAD: Res = WidenVecRes_LOAD(N); break;
1227 case ISD::SCALAR_TO_VECTOR: Res = WidenVecRes_SCALAR_TO_VECTOR(N); break;
1228 case ISD::SIGN_EXTEND_INREG: Res = WidenVecRes_InregOp(N); break;
1229 case ISD::SELECT: Res = WidenVecRes_SELECT(N); break;
1230 case ISD::SELECT_CC: Res = WidenVecRes_SELECT_CC(N); break;
1231 case ISD::SETCC: Res = WidenVecRes_SETCC(N); break;
1232 case ISD::UNDEF: Res = WidenVecRes_UNDEF(N); break;
1233 case ISD::VECTOR_SHUFFLE:
1234 Res = WidenVecRes_VECTOR_SHUFFLE(cast<ShuffleVectorSDNode>(N));
1237 Res = WidenVecRes_VSETCC(N);
1244 case ISD::FCOPYSIGN:
1260 Res = WidenVecRes_Binary(N);
1264 Res = WidenVecRes_POWI(N);
1270 Res = WidenVecRes_Shift(N);
1274 case ISD::FP_TO_SINT:
1275 case ISD::FP_TO_UINT:
1276 case ISD::SINT_TO_FP:
1277 case ISD::UINT_TO_FP:
1279 case ISD::SIGN_EXTEND:
1280 case ISD::ZERO_EXTEND:
1281 case ISD::ANY_EXTEND:
1282 Res = WidenVecRes_Convert(N);
1298 Res = WidenVecRes_Unary(N);
1302 // If Res is null, the sub-method took care of registering the result.
1304 SetWidenedVector(SDValue(N, ResNo), Res);
1307 SDValue DAGTypeLegalizer::WidenVecRes_Binary(SDNode *N) {
1308 // Binary op widening.
1309 unsigned Opcode = N->getOpcode();
1310 DebugLoc dl = N->getDebugLoc();
1311 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1312 EVT WidenEltVT = WidenVT.getVectorElementType();
1314 unsigned NumElts = VT.getVectorNumElements();
1315 while (!TLI.isTypeLegal(VT) && NumElts != 1) {
1316 NumElts = NumElts / 2;
1317 VT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NumElts);
1320 if (NumElts != 1 && !TLI.canOpTrap(N->getOpcode(), VT)) {
1321 // Operation doesn't trap so just widen as normal.
1322 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
1323 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1324 return DAG.getNode(N->getOpcode(), dl, WidenVT, InOp1, InOp2);
1327 // No legal vector version so unroll the vector operation and then widen.
1329 return DAG.UnrollVectorOp(N, WidenVT.getVectorNumElements());
1331 // Since the operation can trap, apply operation on the original vector.
1333 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
1334 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1335 unsigned CurNumElts = N->getValueType(0).getVectorNumElements();
1337 SmallVector<SDValue, 16> ConcatOps(CurNumElts);
1338 unsigned ConcatEnd = 0; // Current ConcatOps index.
1339 int Idx = 0; // Current Idx into input vectors.
1341 // NumElts := greatest legal vector size (at most WidenVT)
1342 // while (orig. vector has unhandled elements) {
1343 // take munches of size NumElts from the beginning and add to ConcatOps
1344 // NumElts := next smaller supported vector size or 1
1346 while (CurNumElts != 0) {
1347 while (CurNumElts >= NumElts) {
1348 SDValue EOp1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, InOp1,
1349 DAG.getIntPtrConstant(Idx));
1350 SDValue EOp2 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, InOp2,
1351 DAG.getIntPtrConstant(Idx));
1352 ConcatOps[ConcatEnd++] = DAG.getNode(Opcode, dl, VT, EOp1, EOp2);
1354 CurNumElts -= NumElts;
1357 NumElts = NumElts / 2;
1358 VT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NumElts);
1359 } while (!TLI.isTypeLegal(VT) && NumElts != 1);
1362 for (unsigned i = 0; i != CurNumElts; ++i, ++Idx) {
1363 SDValue EOp1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, WidenEltVT,
1364 InOp1, DAG.getIntPtrConstant(Idx));
1365 SDValue EOp2 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, WidenEltVT,
1366 InOp2, DAG.getIntPtrConstant(Idx));
1367 ConcatOps[ConcatEnd++] = DAG.getNode(Opcode, dl, WidenEltVT,
1374 // Check to see if we have a single operation with the widen type.
1375 if (ConcatEnd == 1) {
1376 VT = ConcatOps[0].getValueType();
1378 return ConcatOps[0];
1381 // while (Some element of ConcatOps is not of type MaxVT) {
1382 // From the end of ConcatOps, collect elements of the same type and put
1383 // them into an op of the next larger supported type
1385 while (ConcatOps[ConcatEnd-1].getValueType() != MaxVT) {
1386 Idx = ConcatEnd - 1;
1387 VT = ConcatOps[Idx--].getValueType();
1388 while (Idx >= 0 && ConcatOps[Idx].getValueType() == VT)
1391 int NextSize = VT.isVector() ? VT.getVectorNumElements() : 1;
1395 NextVT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NextSize);
1396 } while (!TLI.isTypeLegal(NextVT));
1398 if (!VT.isVector()) {
1399 // Scalar type, create an INSERT_VECTOR_ELEMENT of type NextVT
1400 SDValue VecOp = DAG.getUNDEF(NextVT);
1401 unsigned NumToInsert = ConcatEnd - Idx - 1;
1402 for (unsigned i = 0, OpIdx = Idx+1; i < NumToInsert; i++, OpIdx++) {
1403 VecOp = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NextVT, VecOp,
1404 ConcatOps[OpIdx], DAG.getIntPtrConstant(i));
1406 ConcatOps[Idx+1] = VecOp;
1407 ConcatEnd = Idx + 2;
1409 // Vector type, create a CONCAT_VECTORS of type NextVT
1410 SDValue undefVec = DAG.getUNDEF(VT);
1411 unsigned OpsToConcat = NextSize/VT.getVectorNumElements();
1412 SmallVector<SDValue, 16> SubConcatOps(OpsToConcat);
1413 unsigned RealVals = ConcatEnd - Idx - 1;
1414 unsigned SubConcatEnd = 0;
1415 unsigned SubConcatIdx = Idx + 1;
1416 while (SubConcatEnd < RealVals)
1417 SubConcatOps[SubConcatEnd++] = ConcatOps[++Idx];
1418 while (SubConcatEnd < OpsToConcat)
1419 SubConcatOps[SubConcatEnd++] = undefVec;
1420 ConcatOps[SubConcatIdx] = DAG.getNode(ISD::CONCAT_VECTORS, dl,
1421 NextVT, &SubConcatOps[0],
1423 ConcatEnd = SubConcatIdx + 1;
1427 // Check to see if we have a single operation with the widen type.
1428 if (ConcatEnd == 1) {
1429 VT = ConcatOps[0].getValueType();
1431 return ConcatOps[0];
1434 // add undefs of size MaxVT until ConcatOps grows to length of WidenVT
1435 unsigned NumOps = WidenVT.getVectorNumElements()/MaxVT.getVectorNumElements();
1436 if (NumOps != ConcatEnd ) {
1437 SDValue UndefVal = DAG.getUNDEF(MaxVT);
1438 for (unsigned j = ConcatEnd; j < NumOps; ++j)
1439 ConcatOps[j] = UndefVal;
1441 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &ConcatOps[0], NumOps);
1444 SDValue DAGTypeLegalizer::WidenVecRes_Convert(SDNode *N) {
1445 SDValue InOp = N->getOperand(0);
1446 DebugLoc DL = N->getDebugLoc();
1448 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1449 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1451 EVT InVT = InOp.getValueType();
1452 EVT InEltVT = InVT.getVectorElementType();
1453 EVT InWidenVT = EVT::getVectorVT(*DAG.getContext(), InEltVT, WidenNumElts);
1455 unsigned Opcode = N->getOpcode();
1456 unsigned InVTNumElts = InVT.getVectorNumElements();
1458 if (getTypeAction(InVT) == WidenVector) {
1459 InOp = GetWidenedVector(N->getOperand(0));
1460 InVT = InOp.getValueType();
1461 InVTNumElts = InVT.getVectorNumElements();
1462 if (InVTNumElts == WidenNumElts) {
1463 if (N->getNumOperands() == 1)
1464 return DAG.getNode(Opcode, DL, WidenVT, InOp);
1465 return DAG.getNode(Opcode, DL, WidenVT, InOp, N->getOperand(1));
1469 if (TLI.isTypeLegal(InWidenVT)) {
1470 // Because the result and the input are different vector types, widening
1471 // the result could create a legal type but widening the input might make
1472 // it an illegal type that might lead to repeatedly splitting the input
1473 // and then widening it. To avoid this, we widen the input only if
1474 // it results in a legal type.
1475 if (WidenNumElts % InVTNumElts == 0) {
1476 // Widen the input and call convert on the widened input vector.
1477 unsigned NumConcat = WidenNumElts/InVTNumElts;
1478 SmallVector<SDValue, 16> Ops(NumConcat);
1480 SDValue UndefVal = DAG.getUNDEF(InVT);
1481 for (unsigned i = 1; i != NumConcat; ++i)
1483 SDValue InVec = DAG.getNode(ISD::CONCAT_VECTORS, DL, InWidenVT,
1484 &Ops[0], NumConcat);
1485 if (N->getNumOperands() == 1)
1486 return DAG.getNode(Opcode, DL, WidenVT, InVec);
1487 return DAG.getNode(Opcode, DL, WidenVT, InVec, N->getOperand(1));
1490 if (InVTNumElts % WidenNumElts == 0) {
1491 SDValue InVal = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InWidenVT,
1492 InOp, DAG.getIntPtrConstant(0));
1493 // Extract the input and convert the shorten input vector.
1494 if (N->getNumOperands() == 1)
1495 return DAG.getNode(Opcode, DL, WidenVT, InVal);
1496 return DAG.getNode(Opcode, DL, WidenVT, InVal, N->getOperand(1));
1500 // Otherwise unroll into some nasty scalar code and rebuild the vector.
1501 SmallVector<SDValue, 16> Ops(WidenNumElts);
1502 EVT EltVT = WidenVT.getVectorElementType();
1503 unsigned MinElts = std::min(InVTNumElts, WidenNumElts);
1505 for (i=0; i < MinElts; ++i) {
1506 SDValue Val = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, InEltVT, InOp,
1507 DAG.getIntPtrConstant(i));
1508 if (N->getNumOperands() == 1)
1509 Ops[i] = DAG.getNode(Opcode, DL, EltVT, Val);
1511 Ops[i] = DAG.getNode(Opcode, DL, EltVT, Val, N->getOperand(1));
1514 SDValue UndefVal = DAG.getUNDEF(EltVT);
1515 for (; i < WidenNumElts; ++i)
1518 return DAG.getNode(ISD::BUILD_VECTOR, DL, WidenVT, &Ops[0], WidenNumElts);
1521 SDValue DAGTypeLegalizer::WidenVecRes_POWI(SDNode *N) {
1522 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1523 SDValue InOp = GetWidenedVector(N->getOperand(0));
1524 SDValue ShOp = N->getOperand(1);
1525 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), WidenVT, InOp, ShOp);
1528 SDValue DAGTypeLegalizer::WidenVecRes_Shift(SDNode *N) {
1529 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1530 SDValue InOp = GetWidenedVector(N->getOperand(0));
1531 SDValue ShOp = N->getOperand(1);
1533 EVT ShVT = ShOp.getValueType();
1534 if (getTypeAction(ShVT) == WidenVector) {
1535 ShOp = GetWidenedVector(ShOp);
1536 ShVT = ShOp.getValueType();
1538 EVT ShWidenVT = EVT::getVectorVT(*DAG.getContext(),
1539 ShVT.getVectorElementType(),
1540 WidenVT.getVectorNumElements());
1541 if (ShVT != ShWidenVT)
1542 ShOp = ModifyToType(ShOp, ShWidenVT);
1544 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), WidenVT, InOp, ShOp);
1547 SDValue DAGTypeLegalizer::WidenVecRes_Unary(SDNode *N) {
1548 // Unary op widening.
1549 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1550 SDValue InOp = GetWidenedVector(N->getOperand(0));
1551 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), WidenVT, InOp);
1554 SDValue DAGTypeLegalizer::WidenVecRes_InregOp(SDNode *N) {
1555 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1556 EVT ExtVT = EVT::getVectorVT(*DAG.getContext(),
1557 cast<VTSDNode>(N->getOperand(1))->getVT()
1558 .getVectorElementType(),
1559 WidenVT.getVectorNumElements());
1560 SDValue WidenLHS = GetWidenedVector(N->getOperand(0));
1561 return DAG.getNode(N->getOpcode(), N->getDebugLoc(),
1562 WidenVT, WidenLHS, DAG.getValueType(ExtVT));
1565 SDValue DAGTypeLegalizer::WidenVecRes_BITCAST(SDNode *N) {
1566 SDValue InOp = N->getOperand(0);
1567 EVT InVT = InOp.getValueType();
1568 EVT VT = N->getValueType(0);
1569 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1570 DebugLoc dl = N->getDebugLoc();
1572 switch (getTypeAction(InVT)) {
1574 assert(false && "Unknown type action!");
1578 case PromoteInteger:
1579 // If the InOp is promoted to the same size, convert it. Otherwise,
1580 // fall out of the switch and widen the promoted input.
1581 InOp = GetPromotedInteger(InOp);
1582 InVT = InOp.getValueType();
1583 if (WidenVT.bitsEq(InVT))
1584 return DAG.getNode(ISD::BITCAST, dl, WidenVT, InOp);
1589 case ScalarizeVector:
1593 // If the InOp is widened to the same size, convert it. Otherwise, fall
1594 // out of the switch and widen the widened input.
1595 InOp = GetWidenedVector(InOp);
1596 InVT = InOp.getValueType();
1597 if (WidenVT.bitsEq(InVT))
1598 // The input widens to the same size. Convert to the widen value.
1599 return DAG.getNode(ISD::BITCAST, dl, WidenVT, InOp);
1603 unsigned WidenSize = WidenVT.getSizeInBits();
1604 unsigned InSize = InVT.getSizeInBits();
1605 // x86mmx is not an acceptable vector element type, so don't try.
1606 if (WidenSize % InSize == 0 && InVT != MVT::x86mmx) {
1607 // Determine new input vector type. The new input vector type will use
1608 // the same element type (if its a vector) or use the input type as a
1609 // vector. It is the same size as the type to widen to.
1611 unsigned NewNumElts = WidenSize / InSize;
1612 if (InVT.isVector()) {
1613 EVT InEltVT = InVT.getVectorElementType();
1614 NewInVT = EVT::getVectorVT(*DAG.getContext(), InEltVT,
1615 WidenSize / InEltVT.getSizeInBits());
1617 NewInVT = EVT::getVectorVT(*DAG.getContext(), InVT, NewNumElts);
1620 if (TLI.isTypeLegal(NewInVT)) {
1621 // Because the result and the input are different vector types, widening
1622 // the result could create a legal type but widening the input might make
1623 // it an illegal type that might lead to repeatedly splitting the input
1624 // and then widening it. To avoid this, we widen the input only if
1625 // it results in a legal type.
1626 SmallVector<SDValue, 16> Ops(NewNumElts);
1627 SDValue UndefVal = DAG.getUNDEF(InVT);
1629 for (unsigned i = 1; i < NewNumElts; ++i)
1633 if (InVT.isVector())
1634 NewVec = DAG.getNode(ISD::CONCAT_VECTORS, dl,
1635 NewInVT, &Ops[0], NewNumElts);
1637 NewVec = DAG.getNode(ISD::BUILD_VECTOR, dl,
1638 NewInVT, &Ops[0], NewNumElts);
1639 return DAG.getNode(ISD::BITCAST, dl, WidenVT, NewVec);
1643 return CreateStackStoreLoad(InOp, WidenVT);
1646 SDValue DAGTypeLegalizer::WidenVecRes_BUILD_VECTOR(SDNode *N) {
1647 DebugLoc dl = N->getDebugLoc();
1648 // Build a vector with undefined for the new nodes.
1649 EVT VT = N->getValueType(0);
1650 EVT EltVT = VT.getVectorElementType();
1651 unsigned NumElts = VT.getVectorNumElements();
1653 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1654 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1656 SmallVector<SDValue, 16> NewOps(N->op_begin(), N->op_end());
1657 NewOps.reserve(WidenNumElts);
1658 for (unsigned i = NumElts; i < WidenNumElts; ++i)
1659 NewOps.push_back(DAG.getUNDEF(EltVT));
1661 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &NewOps[0], NewOps.size());
1664 SDValue DAGTypeLegalizer::WidenVecRes_CONCAT_VECTORS(SDNode *N) {
1665 EVT InVT = N->getOperand(0).getValueType();
1666 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1667 DebugLoc dl = N->getDebugLoc();
1668 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1669 unsigned NumOperands = N->getNumOperands();
1671 bool InputWidened = false; // Indicates we need to widen the input.
1672 if (getTypeAction(InVT) != WidenVector) {
1673 if (WidenVT.getVectorNumElements() % InVT.getVectorNumElements() == 0) {
1674 // Add undef vectors to widen to correct length.
1675 unsigned NumConcat = WidenVT.getVectorNumElements() /
1676 InVT.getVectorNumElements();
1677 SDValue UndefVal = DAG.getUNDEF(InVT);
1678 SmallVector<SDValue, 16> Ops(NumConcat);
1679 for (unsigned i=0; i < NumOperands; ++i)
1680 Ops[i] = N->getOperand(i);
1681 for (unsigned i = NumOperands; i != NumConcat; ++i)
1683 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &Ops[0], NumConcat);
1686 InputWidened = true;
1687 if (WidenVT == TLI.getTypeToTransformTo(*DAG.getContext(), InVT)) {
1688 // The inputs and the result are widen to the same value.
1690 for (i=1; i < NumOperands; ++i)
1691 if (N->getOperand(i).getOpcode() != ISD::UNDEF)
1694 if (i > NumOperands)
1695 // Everything but the first operand is an UNDEF so just return the
1696 // widened first operand.
1697 return GetWidenedVector(N->getOperand(0));
1699 if (NumOperands == 2) {
1700 // Replace concat of two operands with a shuffle.
1701 SmallVector<int, 16> MaskOps(WidenNumElts);
1702 for (unsigned i=0; i < WidenNumElts/2; ++i) {
1704 MaskOps[i+WidenNumElts/2] = i+WidenNumElts;
1706 return DAG.getVectorShuffle(WidenVT, dl,
1707 GetWidenedVector(N->getOperand(0)),
1708 GetWidenedVector(N->getOperand(1)),
1714 // Fall back to use extracts and build vector.
1715 EVT EltVT = WidenVT.getVectorElementType();
1716 unsigned NumInElts = InVT.getVectorNumElements();
1717 SmallVector<SDValue, 16> Ops(WidenNumElts);
1719 for (unsigned i=0; i < NumOperands; ++i) {
1720 SDValue InOp = N->getOperand(i);
1722 InOp = GetWidenedVector(InOp);
1723 for (unsigned j=0; j < NumInElts; ++j)
1724 Ops[Idx++] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
1725 DAG.getIntPtrConstant(j));
1727 SDValue UndefVal = DAG.getUNDEF(EltVT);
1728 for (; Idx < WidenNumElts; ++Idx)
1729 Ops[Idx] = UndefVal;
1730 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], WidenNumElts);
1733 SDValue DAGTypeLegalizer::WidenVecRes_CONVERT_RNDSAT(SDNode *N) {
1734 DebugLoc dl = N->getDebugLoc();
1735 SDValue InOp = N->getOperand(0);
1736 SDValue RndOp = N->getOperand(3);
1737 SDValue SatOp = N->getOperand(4);
1739 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1740 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1742 EVT InVT = InOp.getValueType();
1743 EVT InEltVT = InVT.getVectorElementType();
1744 EVT InWidenVT = EVT::getVectorVT(*DAG.getContext(), InEltVT, WidenNumElts);
1746 SDValue DTyOp = DAG.getValueType(WidenVT);
1747 SDValue STyOp = DAG.getValueType(InWidenVT);
1748 ISD::CvtCode CvtCode = cast<CvtRndSatSDNode>(N)->getCvtCode();
1750 unsigned InVTNumElts = InVT.getVectorNumElements();
1751 if (getTypeAction(InVT) == WidenVector) {
1752 InOp = GetWidenedVector(InOp);
1753 InVT = InOp.getValueType();
1754 InVTNumElts = InVT.getVectorNumElements();
1755 if (InVTNumElts == WidenNumElts)
1756 return DAG.getConvertRndSat(WidenVT, dl, InOp, DTyOp, STyOp, RndOp,
1760 if (TLI.isTypeLegal(InWidenVT)) {
1761 // Because the result and the input are different vector types, widening
1762 // the result could create a legal type but widening the input might make
1763 // it an illegal type that might lead to repeatedly splitting the input
1764 // and then widening it. To avoid this, we widen the input only if
1765 // it results in a legal type.
1766 if (WidenNumElts % InVTNumElts == 0) {
1767 // Widen the input and call convert on the widened input vector.
1768 unsigned NumConcat = WidenNumElts/InVTNumElts;
1769 SmallVector<SDValue, 16> Ops(NumConcat);
1771 SDValue UndefVal = DAG.getUNDEF(InVT);
1772 for (unsigned i = 1; i != NumConcat; ++i)
1775 InOp = DAG.getNode(ISD::CONCAT_VECTORS, dl, InWidenVT, &Ops[0],NumConcat);
1776 return DAG.getConvertRndSat(WidenVT, dl, InOp, DTyOp, STyOp, RndOp,
1780 if (InVTNumElts % WidenNumElts == 0) {
1781 // Extract the input and convert the shorten input vector.
1782 InOp = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InWidenVT, InOp,
1783 DAG.getIntPtrConstant(0));
1784 return DAG.getConvertRndSat(WidenVT, dl, InOp, DTyOp, STyOp, RndOp,
1789 // Otherwise unroll into some nasty scalar code and rebuild the vector.
1790 SmallVector<SDValue, 16> Ops(WidenNumElts);
1791 EVT EltVT = WidenVT.getVectorElementType();
1792 DTyOp = DAG.getValueType(EltVT);
1793 STyOp = DAG.getValueType(InEltVT);
1795 unsigned MinElts = std::min(InVTNumElts, WidenNumElts);
1797 for (i=0; i < MinElts; ++i) {
1798 SDValue ExtVal = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, InEltVT, InOp,
1799 DAG.getIntPtrConstant(i));
1800 Ops[i] = DAG.getConvertRndSat(WidenVT, dl, ExtVal, DTyOp, STyOp, RndOp,
1804 SDValue UndefVal = DAG.getUNDEF(EltVT);
1805 for (; i < WidenNumElts; ++i)
1808 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], WidenNumElts);
1811 SDValue DAGTypeLegalizer::WidenVecRes_EXTRACT_SUBVECTOR(SDNode *N) {
1812 EVT VT = N->getValueType(0);
1813 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1814 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1815 SDValue InOp = N->getOperand(0);
1816 SDValue Idx = N->getOperand(1);
1817 DebugLoc dl = N->getDebugLoc();
1819 if (getTypeAction(InOp.getValueType()) == WidenVector)
1820 InOp = GetWidenedVector(InOp);
1822 EVT InVT = InOp.getValueType();
1824 // Check if we can just return the input vector after widening.
1825 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
1826 if (IdxVal == 0 && InVT == WidenVT)
1829 // Check if we can extract from the vector.
1830 unsigned InNumElts = InVT.getVectorNumElements();
1831 if (IdxVal % WidenNumElts == 0 && IdxVal + WidenNumElts < InNumElts)
1832 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, WidenVT, InOp, Idx);
1834 // We could try widening the input to the right length but for now, extract
1835 // the original elements, fill the rest with undefs and build a vector.
1836 SmallVector<SDValue, 16> Ops(WidenNumElts);
1837 EVT EltVT = VT.getVectorElementType();
1838 unsigned NumElts = VT.getVectorNumElements();
1840 for (i=0; i < NumElts; ++i)
1841 Ops[i] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
1842 DAG.getIntPtrConstant(IdxVal+i));
1844 SDValue UndefVal = DAG.getUNDEF(EltVT);
1845 for (; i < WidenNumElts; ++i)
1847 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], WidenNumElts);
1850 SDValue DAGTypeLegalizer::WidenVecRes_INSERT_VECTOR_ELT(SDNode *N) {
1851 SDValue InOp = GetWidenedVector(N->getOperand(0));
1852 return DAG.getNode(ISD::INSERT_VECTOR_ELT, N->getDebugLoc(),
1853 InOp.getValueType(), InOp,
1854 N->getOperand(1), N->getOperand(2));
1857 SDValue DAGTypeLegalizer::WidenVecRes_LOAD(SDNode *N) {
1858 LoadSDNode *LD = cast<LoadSDNode>(N);
1859 ISD::LoadExtType ExtType = LD->getExtensionType();
1862 SmallVector<SDValue, 16> LdChain; // Chain for the series of load
1863 if (ExtType != ISD::NON_EXTLOAD)
1864 Result = GenWidenVectorExtLoads(LdChain, LD, ExtType);
1866 Result = GenWidenVectorLoads(LdChain, LD);
1868 // If we generate a single load, we can use that for the chain. Otherwise,
1869 // build a factor node to remember the multiple loads are independent and
1872 if (LdChain.size() == 1)
1873 NewChain = LdChain[0];
1875 NewChain = DAG.getNode(ISD::TokenFactor, LD->getDebugLoc(), MVT::Other,
1876 &LdChain[0], LdChain.size());
1878 // Modified the chain - switch anything that used the old chain to use
1880 ReplaceValueWith(SDValue(N, 1), NewChain);
1885 SDValue DAGTypeLegalizer::WidenVecRes_SCALAR_TO_VECTOR(SDNode *N) {
1886 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1887 return DAG.getNode(ISD::SCALAR_TO_VECTOR, N->getDebugLoc(),
1888 WidenVT, N->getOperand(0));
1891 SDValue DAGTypeLegalizer::WidenVecRes_SELECT(SDNode *N) {
1892 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1893 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1895 SDValue Cond1 = N->getOperand(0);
1896 EVT CondVT = Cond1.getValueType();
1897 if (CondVT.isVector()) {
1898 EVT CondEltVT = CondVT.getVectorElementType();
1899 EVT CondWidenVT = EVT::getVectorVT(*DAG.getContext(),
1900 CondEltVT, WidenNumElts);
1901 if (getTypeAction(CondVT) == WidenVector)
1902 Cond1 = GetWidenedVector(Cond1);
1904 if (Cond1.getValueType() != CondWidenVT)
1905 Cond1 = ModifyToType(Cond1, CondWidenVT);
1908 SDValue InOp1 = GetWidenedVector(N->getOperand(1));
1909 SDValue InOp2 = GetWidenedVector(N->getOperand(2));
1910 assert(InOp1.getValueType() == WidenVT && InOp2.getValueType() == WidenVT);
1911 return DAG.getNode(ISD::SELECT, N->getDebugLoc(),
1912 WidenVT, Cond1, InOp1, InOp2);
1915 SDValue DAGTypeLegalizer::WidenVecRes_SELECT_CC(SDNode *N) {
1916 SDValue InOp1 = GetWidenedVector(N->getOperand(2));
1917 SDValue InOp2 = GetWidenedVector(N->getOperand(3));
1918 return DAG.getNode(ISD::SELECT_CC, N->getDebugLoc(),
1919 InOp1.getValueType(), N->getOperand(0),
1920 N->getOperand(1), InOp1, InOp2, N->getOperand(4));
1923 SDValue DAGTypeLegalizer::WidenVecRes_SETCC(SDNode *N) {
1924 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1925 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
1926 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1927 return DAG.getNode(ISD::SETCC, N->getDebugLoc(), WidenVT,
1928 InOp1, InOp2, N->getOperand(2));
1931 SDValue DAGTypeLegalizer::WidenVecRes_UNDEF(SDNode *N) {
1932 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1933 return DAG.getUNDEF(WidenVT);
1936 SDValue DAGTypeLegalizer::WidenVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N) {
1937 EVT VT = N->getValueType(0);
1938 DebugLoc dl = N->getDebugLoc();
1940 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1941 unsigned NumElts = VT.getVectorNumElements();
1942 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1944 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
1945 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1947 // Adjust mask based on new input vector length.
1948 SmallVector<int, 16> NewMask;
1949 for (unsigned i = 0; i != NumElts; ++i) {
1950 int Idx = N->getMaskElt(i);
1951 if (Idx < (int)NumElts)
1952 NewMask.push_back(Idx);
1954 NewMask.push_back(Idx - NumElts + WidenNumElts);
1956 for (unsigned i = NumElts; i != WidenNumElts; ++i)
1957 NewMask.push_back(-1);
1958 return DAG.getVectorShuffle(WidenVT, dl, InOp1, InOp2, &NewMask[0]);
1961 SDValue DAGTypeLegalizer::WidenVecRes_VSETCC(SDNode *N) {
1962 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1963 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1965 SDValue InOp1 = N->getOperand(0);
1966 EVT InVT = InOp1.getValueType();
1967 assert(InVT.isVector() && "can not widen non vector type");
1968 EVT WidenInVT = EVT::getVectorVT(*DAG.getContext(),
1969 InVT.getVectorElementType(), WidenNumElts);
1970 InOp1 = GetWidenedVector(InOp1);
1971 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1973 // Assume that the input and output will be widen appropriately. If not,
1974 // we will have to unroll it at some point.
1975 assert(InOp1.getValueType() == WidenInVT &&
1976 InOp2.getValueType() == WidenInVT &&
1977 "Input not widened to expected type!");
1978 return DAG.getNode(ISD::VSETCC, N->getDebugLoc(),
1979 WidenVT, InOp1, InOp2, N->getOperand(2));
1983 //===----------------------------------------------------------------------===//
1984 // Widen Vector Operand
1985 //===----------------------------------------------------------------------===//
1986 bool DAGTypeLegalizer::WidenVectorOperand(SDNode *N, unsigned ResNo) {
1987 DEBUG(dbgs() << "Widen node operand " << ResNo << ": ";
1990 SDValue Res = SDValue();
1992 switch (N->getOpcode()) {
1995 dbgs() << "WidenVectorOperand op #" << ResNo << ": ";
1999 llvm_unreachable("Do not know how to widen this operator's operand!");
2001 case ISD::BITCAST: Res = WidenVecOp_BITCAST(N); break;
2002 case ISD::CONCAT_VECTORS: Res = WidenVecOp_CONCAT_VECTORS(N); break;
2003 case ISD::EXTRACT_SUBVECTOR: Res = WidenVecOp_EXTRACT_SUBVECTOR(N); break;
2004 case ISD::EXTRACT_VECTOR_ELT: Res = WidenVecOp_EXTRACT_VECTOR_ELT(N); break;
2005 case ISD::STORE: Res = WidenVecOp_STORE(N); break;
2008 case ISD::FP_TO_SINT:
2009 case ISD::FP_TO_UINT:
2010 case ISD::SINT_TO_FP:
2011 case ISD::UINT_TO_FP:
2013 case ISD::SIGN_EXTEND:
2014 case ISD::ZERO_EXTEND:
2015 case ISD::ANY_EXTEND:
2016 Res = WidenVecOp_Convert(N);
2020 // If Res is null, the sub-method took care of registering the result.
2021 if (!Res.getNode()) return false;
2023 // If the result is N, the sub-method updated N in place. Tell the legalizer
2025 if (Res.getNode() == N)
2029 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
2030 "Invalid operand expansion");
2032 ReplaceValueWith(SDValue(N, 0), Res);
2036 SDValue DAGTypeLegalizer::WidenVecOp_Convert(SDNode *N) {
2037 // Since the result is legal and the input is illegal, it is unlikely
2038 // that we can fix the input to a legal type so unroll the convert
2039 // into some scalar code and create a nasty build vector.
2040 EVT VT = N->getValueType(0);
2041 EVT EltVT = VT.getVectorElementType();
2042 DebugLoc dl = N->getDebugLoc();
2043 unsigned NumElts = VT.getVectorNumElements();
2044 SDValue InOp = N->getOperand(0);
2045 if (getTypeAction(InOp.getValueType()) == WidenVector)
2046 InOp = GetWidenedVector(InOp);
2047 EVT InVT = InOp.getValueType();
2048 EVT InEltVT = InVT.getVectorElementType();
2050 unsigned Opcode = N->getOpcode();
2051 SmallVector<SDValue, 16> Ops(NumElts);
2052 for (unsigned i=0; i < NumElts; ++i)
2053 Ops[i] = DAG.getNode(Opcode, dl, EltVT,
2054 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, InEltVT, InOp,
2055 DAG.getIntPtrConstant(i)));
2057 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, &Ops[0], NumElts);
2060 SDValue DAGTypeLegalizer::WidenVecOp_BITCAST(SDNode *N) {
2061 EVT VT = N->getValueType(0);
2062 SDValue InOp = GetWidenedVector(N->getOperand(0));
2063 EVT InWidenVT = InOp.getValueType();
2064 DebugLoc dl = N->getDebugLoc();
2066 // Check if we can convert between two legal vector types and extract.
2067 unsigned InWidenSize = InWidenVT.getSizeInBits();
2068 unsigned Size = VT.getSizeInBits();
2069 // x86mmx is not an acceptable vector element type, so don't try.
2070 if (InWidenSize % Size == 0 && !VT.isVector() && VT != MVT::x86mmx) {
2071 unsigned NewNumElts = InWidenSize / Size;
2072 EVT NewVT = EVT::getVectorVT(*DAG.getContext(), VT, NewNumElts);
2073 if (TLI.isTypeLegal(NewVT)) {
2074 SDValue BitOp = DAG.getNode(ISD::BITCAST, dl, NewVT, InOp);
2075 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, VT, BitOp,
2076 DAG.getIntPtrConstant(0));
2080 return CreateStackStoreLoad(InOp, VT);
2083 SDValue DAGTypeLegalizer::WidenVecOp_CONCAT_VECTORS(SDNode *N) {
2084 // If the input vector is not legal, it is likely that we will not find a
2085 // legal vector of the same size. Replace the concatenate vector with a
2086 // nasty build vector.
2087 EVT VT = N->getValueType(0);
2088 EVT EltVT = VT.getVectorElementType();
2089 DebugLoc dl = N->getDebugLoc();
2090 unsigned NumElts = VT.getVectorNumElements();
2091 SmallVector<SDValue, 16> Ops(NumElts);
2093 EVT InVT = N->getOperand(0).getValueType();
2094 unsigned NumInElts = InVT.getVectorNumElements();
2097 unsigned NumOperands = N->getNumOperands();
2098 for (unsigned i=0; i < NumOperands; ++i) {
2099 SDValue InOp = N->getOperand(i);
2100 if (getTypeAction(InOp.getValueType()) == WidenVector)
2101 InOp = GetWidenedVector(InOp);
2102 for (unsigned j=0; j < NumInElts; ++j)
2103 Ops[Idx++] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
2104 DAG.getIntPtrConstant(j));
2106 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, &Ops[0], NumElts);
2109 SDValue DAGTypeLegalizer::WidenVecOp_EXTRACT_SUBVECTOR(SDNode *N) {
2110 SDValue InOp = GetWidenedVector(N->getOperand(0));
2111 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, N->getDebugLoc(),
2112 N->getValueType(0), InOp, N->getOperand(1));
2115 SDValue DAGTypeLegalizer::WidenVecOp_EXTRACT_VECTOR_ELT(SDNode *N) {
2116 SDValue InOp = GetWidenedVector(N->getOperand(0));
2117 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, N->getDebugLoc(),
2118 N->getValueType(0), InOp, N->getOperand(1));
2121 SDValue DAGTypeLegalizer::WidenVecOp_STORE(SDNode *N) {
2122 // We have to widen the value but we want only to store the original
2124 StoreSDNode *ST = cast<StoreSDNode>(N);
2126 SmallVector<SDValue, 16> StChain;
2127 if (ST->isTruncatingStore())
2128 GenWidenVectorTruncStores(StChain, ST);
2130 GenWidenVectorStores(StChain, ST);
2132 if (StChain.size() == 1)
2135 return DAG.getNode(ISD::TokenFactor, ST->getDebugLoc(),
2136 MVT::Other,&StChain[0],StChain.size());
2139 //===----------------------------------------------------------------------===//
2140 // Vector Widening Utilities
2141 //===----------------------------------------------------------------------===//
2143 // Utility function to find the type to chop up a widen vector for load/store
2144 // TLI: Target lowering used to determine legal types.
2145 // Width: Width left need to load/store.
2146 // WidenVT: The widen vector type to load to/store from
2147 // Align: If 0, don't allow use of a wider type
2148 // WidenEx: If Align is not 0, the amount additional we can load/store from.
2150 static EVT FindMemType(SelectionDAG& DAG, const TargetLowering &TLI,
2151 unsigned Width, EVT WidenVT,
2152 unsigned Align = 0, unsigned WidenEx = 0) {
2153 EVT WidenEltVT = WidenVT.getVectorElementType();
2154 unsigned WidenWidth = WidenVT.getSizeInBits();
2155 unsigned WidenEltWidth = WidenEltVT.getSizeInBits();
2156 unsigned AlignInBits = Align*8;
2158 // If we have one element to load/store, return it.
2159 EVT RetVT = WidenEltVT;
2160 if (Width == WidenEltWidth)
2163 // See if there is larger legal integer than the element type to load/store
2165 for (VT = (unsigned)MVT::LAST_INTEGER_VALUETYPE;
2166 VT >= (unsigned)MVT::FIRST_INTEGER_VALUETYPE; --VT) {
2167 EVT MemVT((MVT::SimpleValueType) VT);
2168 unsigned MemVTWidth = MemVT.getSizeInBits();
2169 if (MemVT.getSizeInBits() <= WidenEltWidth)
2171 if (TLI.isTypeLegal(MemVT) && (WidenWidth % MemVTWidth) == 0 &&
2172 (MemVTWidth <= Width ||
2173 (Align!=0 && MemVTWidth<=AlignInBits && MemVTWidth<=Width+WidenEx))) {
2179 // See if there is a larger vector type to load/store that has the same vector
2180 // element type and is evenly divisible with the WidenVT.
2181 for (VT = (unsigned)MVT::LAST_VECTOR_VALUETYPE;
2182 VT >= (unsigned)MVT::FIRST_VECTOR_VALUETYPE; --VT) {
2183 EVT MemVT = (MVT::SimpleValueType) VT;
2184 unsigned MemVTWidth = MemVT.getSizeInBits();
2185 if (TLI.isTypeLegal(MemVT) && WidenEltVT == MemVT.getVectorElementType() &&
2186 (WidenWidth % MemVTWidth) == 0 &&
2187 (MemVTWidth <= Width ||
2188 (Align!=0 && MemVTWidth<=AlignInBits && MemVTWidth<=Width+WidenEx))) {
2189 if (RetVT.getSizeInBits() < MemVTWidth || MemVT == WidenVT)
2197 // Builds a vector type from scalar loads
2198 // VecTy: Resulting Vector type
2199 // LDOps: Load operators to build a vector type
2200 // [Start,End) the list of loads to use.
2201 static SDValue BuildVectorFromScalar(SelectionDAG& DAG, EVT VecTy,
2202 SmallVector<SDValue, 16>& LdOps,
2203 unsigned Start, unsigned End) {
2204 DebugLoc dl = LdOps[Start].getDebugLoc();
2205 EVT LdTy = LdOps[Start].getValueType();
2206 unsigned Width = VecTy.getSizeInBits();
2207 unsigned NumElts = Width / LdTy.getSizeInBits();
2208 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), LdTy, NumElts);
2211 SDValue VecOp = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, NewVecVT,LdOps[Start]);
2213 for (unsigned i = Start + 1; i != End; ++i) {
2214 EVT NewLdTy = LdOps[i].getValueType();
2215 if (NewLdTy != LdTy) {
2216 NumElts = Width / NewLdTy.getSizeInBits();
2217 NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewLdTy, NumElts);
2218 VecOp = DAG.getNode(ISD::BITCAST, dl, NewVecVT, VecOp);
2219 // Readjust position and vector position based on new load type
2220 Idx = Idx * LdTy.getSizeInBits() / NewLdTy.getSizeInBits();
2223 VecOp = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NewVecVT, VecOp, LdOps[i],
2224 DAG.getIntPtrConstant(Idx++));
2226 return DAG.getNode(ISD::BITCAST, dl, VecTy, VecOp);
2229 SDValue DAGTypeLegalizer::GenWidenVectorLoads(SmallVector<SDValue, 16> &LdChain,
2231 // The strategy assumes that we can efficiently load powers of two widths.
2232 // The routines chops the vector into the largest vector loads with the same
2233 // element type or scalar loads and then recombines it to the widen vector
2235 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(),LD->getValueType(0));
2236 unsigned WidenWidth = WidenVT.getSizeInBits();
2237 EVT LdVT = LD->getMemoryVT();
2238 DebugLoc dl = LD->getDebugLoc();
2239 assert(LdVT.isVector() && WidenVT.isVector());
2240 assert(LdVT.getVectorElementType() == WidenVT.getVectorElementType());
2243 SDValue Chain = LD->getChain();
2244 SDValue BasePtr = LD->getBasePtr();
2245 unsigned Align = LD->getAlignment();
2246 bool isVolatile = LD->isVolatile();
2247 bool isNonTemporal = LD->isNonTemporal();
2249 int LdWidth = LdVT.getSizeInBits();
2250 int WidthDiff = WidenWidth - LdWidth; // Difference
2251 unsigned LdAlign = (isVolatile) ? 0 : Align; // Allow wider loads
2253 // Find the vector type that can load from.
2254 EVT NewVT = FindMemType(DAG, TLI, LdWidth, WidenVT, LdAlign, WidthDiff);
2255 int NewVTWidth = NewVT.getSizeInBits();
2256 SDValue LdOp = DAG.getLoad(NewVT, dl, Chain, BasePtr, LD->getPointerInfo(),
2257 isVolatile, isNonTemporal, Align);
2258 LdChain.push_back(LdOp.getValue(1));
2260 // Check if we can load the element with one instruction
2261 if (LdWidth <= NewVTWidth) {
2262 if (!NewVT.isVector()) {
2263 unsigned NumElts = WidenWidth / NewVTWidth;
2264 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewVT, NumElts);
2265 SDValue VecOp = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, NewVecVT, LdOp);
2266 return DAG.getNode(ISD::BITCAST, dl, WidenVT, VecOp);
2268 if (NewVT == WidenVT)
2271 assert(WidenWidth % NewVTWidth == 0);
2272 unsigned NumConcat = WidenWidth / NewVTWidth;
2273 SmallVector<SDValue, 16> ConcatOps(NumConcat);
2274 SDValue UndefVal = DAG.getUNDEF(NewVT);
2275 ConcatOps[0] = LdOp;
2276 for (unsigned i = 1; i != NumConcat; ++i)
2277 ConcatOps[i] = UndefVal;
2278 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &ConcatOps[0],
2282 // Load vector by using multiple loads from largest vector to scalar
2283 SmallVector<SDValue, 16> LdOps;
2284 LdOps.push_back(LdOp);
2286 LdWidth -= NewVTWidth;
2287 unsigned Offset = 0;
2289 while (LdWidth > 0) {
2290 unsigned Increment = NewVTWidth / 8;
2291 Offset += Increment;
2292 BasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr,
2293 DAG.getIntPtrConstant(Increment));
2295 if (LdWidth < NewVTWidth) {
2296 // Our current type we are using is too large, find a better size
2297 NewVT = FindMemType(DAG, TLI, LdWidth, WidenVT, LdAlign, WidthDiff);
2298 NewVTWidth = NewVT.getSizeInBits();
2301 SDValue LdOp = DAG.getLoad(NewVT, dl, Chain, BasePtr,
2302 LD->getPointerInfo().getWithOffset(Offset),
2304 isNonTemporal, MinAlign(Align, Increment));
2305 LdChain.push_back(LdOp.getValue(1));
2306 LdOps.push_back(LdOp);
2308 LdWidth -= NewVTWidth;
2311 // Build the vector from the loads operations
2312 unsigned End = LdOps.size();
2313 if (!LdOps[0].getValueType().isVector())
2314 // All the loads are scalar loads.
2315 return BuildVectorFromScalar(DAG, WidenVT, LdOps, 0, End);
2317 // If the load contains vectors, build the vector using concat vector.
2318 // All of the vectors used to loads are power of 2 and the scalars load
2319 // can be combined to make a power of 2 vector.
2320 SmallVector<SDValue, 16> ConcatOps(End);
2323 EVT LdTy = LdOps[i].getValueType();
2324 // First combine the scalar loads to a vector
2325 if (!LdTy.isVector()) {
2326 for (--i; i >= 0; --i) {
2327 LdTy = LdOps[i].getValueType();
2328 if (LdTy.isVector())
2331 ConcatOps[--Idx] = BuildVectorFromScalar(DAG, LdTy, LdOps, i+1, End);
2333 ConcatOps[--Idx] = LdOps[i];
2334 for (--i; i >= 0; --i) {
2335 EVT NewLdTy = LdOps[i].getValueType();
2336 if (NewLdTy != LdTy) {
2337 // Create a larger vector
2338 ConcatOps[End-1] = DAG.getNode(ISD::CONCAT_VECTORS, dl, NewLdTy,
2339 &ConcatOps[Idx], End - Idx);
2343 ConcatOps[--Idx] = LdOps[i];
2346 if (WidenWidth == LdTy.getSizeInBits()*(End - Idx))
2347 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT,
2348 &ConcatOps[Idx], End - Idx);
2350 // We need to fill the rest with undefs to build the vector
2351 unsigned NumOps = WidenWidth / LdTy.getSizeInBits();
2352 SmallVector<SDValue, 16> WidenOps(NumOps);
2353 SDValue UndefVal = DAG.getUNDEF(LdTy);
2356 for (; i != End-Idx; ++i)
2357 WidenOps[i] = ConcatOps[Idx+i];
2358 for (; i != NumOps; ++i)
2359 WidenOps[i] = UndefVal;
2361 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &WidenOps[0],NumOps);
2365 DAGTypeLegalizer::GenWidenVectorExtLoads(SmallVector<SDValue, 16>& LdChain,
2367 ISD::LoadExtType ExtType) {
2368 // For extension loads, it may not be more efficient to chop up the vector
2369 // and then extended it. Instead, we unroll the load and build a new vector.
2370 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(),LD->getValueType(0));
2371 EVT LdVT = LD->getMemoryVT();
2372 DebugLoc dl = LD->getDebugLoc();
2373 assert(LdVT.isVector() && WidenVT.isVector());
2376 SDValue Chain = LD->getChain();
2377 SDValue BasePtr = LD->getBasePtr();
2378 unsigned Align = LD->getAlignment();
2379 bool isVolatile = LD->isVolatile();
2380 bool isNonTemporal = LD->isNonTemporal();
2382 EVT EltVT = WidenVT.getVectorElementType();
2383 EVT LdEltVT = LdVT.getVectorElementType();
2384 unsigned NumElts = LdVT.getVectorNumElements();
2386 // Load each element and widen
2387 unsigned WidenNumElts = WidenVT.getVectorNumElements();
2388 SmallVector<SDValue, 16> Ops(WidenNumElts);
2389 unsigned Increment = LdEltVT.getSizeInBits() / 8;
2390 Ops[0] = DAG.getExtLoad(ExtType, EltVT, dl, Chain, BasePtr,
2391 LD->getPointerInfo(),
2392 LdEltVT, isVolatile, isNonTemporal, Align);
2393 LdChain.push_back(Ops[0].getValue(1));
2394 unsigned i = 0, Offset = Increment;
2395 for (i=1; i < NumElts; ++i, Offset += Increment) {
2396 SDValue NewBasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(),
2397 BasePtr, DAG.getIntPtrConstant(Offset));
2398 Ops[i] = DAG.getExtLoad(ExtType, EltVT, dl, Chain, NewBasePtr,
2399 LD->getPointerInfo().getWithOffset(Offset), LdEltVT,
2400 isVolatile, isNonTemporal, Align);
2401 LdChain.push_back(Ops[i].getValue(1));
2404 // Fill the rest with undefs
2405 SDValue UndefVal = DAG.getUNDEF(EltVT);
2406 for (; i != WidenNumElts; ++i)
2409 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], Ops.size());
2413 void DAGTypeLegalizer::GenWidenVectorStores(SmallVector<SDValue, 16>& StChain,
2415 // The strategy assumes that we can efficiently store powers of two widths.
2416 // The routines chops the vector into the largest vector stores with the same
2417 // element type or scalar stores.
2418 SDValue Chain = ST->getChain();
2419 SDValue BasePtr = ST->getBasePtr();
2420 unsigned Align = ST->getAlignment();
2421 bool isVolatile = ST->isVolatile();
2422 bool isNonTemporal = ST->isNonTemporal();
2423 SDValue ValOp = GetWidenedVector(ST->getValue());
2424 DebugLoc dl = ST->getDebugLoc();
2426 EVT StVT = ST->getMemoryVT();
2427 unsigned StWidth = StVT.getSizeInBits();
2428 EVT ValVT = ValOp.getValueType();
2429 unsigned ValWidth = ValVT.getSizeInBits();
2430 EVT ValEltVT = ValVT.getVectorElementType();
2431 unsigned ValEltWidth = ValEltVT.getSizeInBits();
2432 assert(StVT.getVectorElementType() == ValEltVT);
2434 int Idx = 0; // current index to store
2435 unsigned Offset = 0; // offset from base to store
2436 while (StWidth != 0) {
2437 // Find the largest vector type we can store with
2438 EVT NewVT = FindMemType(DAG, TLI, StWidth, ValVT);
2439 unsigned NewVTWidth = NewVT.getSizeInBits();
2440 unsigned Increment = NewVTWidth / 8;
2441 if (NewVT.isVector()) {
2442 unsigned NumVTElts = NewVT.getVectorNumElements();
2444 SDValue EOp = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, NewVT, ValOp,
2445 DAG.getIntPtrConstant(Idx));
2446 StChain.push_back(DAG.getStore(Chain, dl, EOp, BasePtr,
2447 ST->getPointerInfo().getWithOffset(Offset),
2448 isVolatile, isNonTemporal,
2449 MinAlign(Align, Offset)));
2450 StWidth -= NewVTWidth;
2451 Offset += Increment;
2453 BasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr,
2454 DAG.getIntPtrConstant(Increment));
2455 } while (StWidth != 0 && StWidth >= NewVTWidth);
2457 // Cast the vector to the scalar type we can store
2458 unsigned NumElts = ValWidth / NewVTWidth;
2459 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewVT, NumElts);
2460 SDValue VecOp = DAG.getNode(ISD::BITCAST, dl, NewVecVT, ValOp);
2461 // Readjust index position based on new vector type
2462 Idx = Idx * ValEltWidth / NewVTWidth;
2464 SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NewVT, VecOp,
2465 DAG.getIntPtrConstant(Idx++));
2466 StChain.push_back(DAG.getStore(Chain, dl, EOp, BasePtr,
2467 ST->getPointerInfo().getWithOffset(Offset),
2468 isVolatile, isNonTemporal,
2469 MinAlign(Align, Offset)));
2470 StWidth -= NewVTWidth;
2471 Offset += Increment;
2472 BasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr,
2473 DAG.getIntPtrConstant(Increment));
2474 } while (StWidth != 0 && StWidth >= NewVTWidth);
2475 // Restore index back to be relative to the original widen element type
2476 Idx = Idx * NewVTWidth / ValEltWidth;
2482 DAGTypeLegalizer::GenWidenVectorTruncStores(SmallVector<SDValue, 16>& StChain,
2484 // For extension loads, it may not be more efficient to truncate the vector
2485 // and then store it. Instead, we extract each element and then store it.
2486 SDValue Chain = ST->getChain();
2487 SDValue BasePtr = ST->getBasePtr();
2488 unsigned Align = ST->getAlignment();
2489 bool isVolatile = ST->isVolatile();
2490 bool isNonTemporal = ST->isNonTemporal();
2491 SDValue ValOp = GetWidenedVector(ST->getValue());
2492 DebugLoc dl = ST->getDebugLoc();
2494 EVT StVT = ST->getMemoryVT();
2495 EVT ValVT = ValOp.getValueType();
2497 // It must be true that we the widen vector type is bigger than where
2498 // we need to store.
2499 assert(StVT.isVector() && ValOp.getValueType().isVector());
2500 assert(StVT.bitsLT(ValOp.getValueType()));
2502 // For truncating stores, we can not play the tricks of chopping legal
2503 // vector types and bit cast it to the right type. Instead, we unroll
2505 EVT StEltVT = StVT.getVectorElementType();
2506 EVT ValEltVT = ValVT.getVectorElementType();
2507 unsigned Increment = ValEltVT.getSizeInBits() / 8;
2508 unsigned NumElts = StVT.getVectorNumElements();
2509 SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ValEltVT, ValOp,
2510 DAG.getIntPtrConstant(0));
2511 StChain.push_back(DAG.getTruncStore(Chain, dl, EOp, BasePtr,
2512 ST->getPointerInfo(), StEltVT,
2513 isVolatile, isNonTemporal, Align));
2514 unsigned Offset = Increment;
2515 for (unsigned i=1; i < NumElts; ++i, Offset += Increment) {
2516 SDValue NewBasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(),
2517 BasePtr, DAG.getIntPtrConstant(Offset));
2518 SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ValEltVT, ValOp,
2519 DAG.getIntPtrConstant(0));
2520 StChain.push_back(DAG.getTruncStore(Chain, dl, EOp, NewBasePtr,
2521 ST->getPointerInfo().getWithOffset(Offset),
2522 StEltVT, isVolatile, isNonTemporal,
2523 MinAlign(Align, Offset)));
2527 /// Modifies a vector input (widen or narrows) to a vector of NVT. The
2528 /// input vector must have the same element type as NVT.
2529 SDValue DAGTypeLegalizer::ModifyToType(SDValue InOp, EVT NVT) {
2530 // Note that InOp might have been widened so it might already have
2531 // the right width or it might need be narrowed.
2532 EVT InVT = InOp.getValueType();
2533 assert(InVT.getVectorElementType() == NVT.getVectorElementType() &&
2534 "input and widen element type must match");
2535 DebugLoc dl = InOp.getDebugLoc();
2537 // Check if InOp already has the right width.
2541 unsigned InNumElts = InVT.getVectorNumElements();
2542 unsigned WidenNumElts = NVT.getVectorNumElements();
2543 if (WidenNumElts > InNumElts && WidenNumElts % InNumElts == 0) {
2544 unsigned NumConcat = WidenNumElts / InNumElts;
2545 SmallVector<SDValue, 16> Ops(NumConcat);
2546 SDValue UndefVal = DAG.getUNDEF(InVT);
2548 for (unsigned i = 1; i != NumConcat; ++i)
2551 return DAG.getNode(ISD::CONCAT_VECTORS, dl, NVT, &Ops[0], NumConcat);
2554 if (WidenNumElts < InNumElts && InNumElts % WidenNumElts)
2555 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, NVT, InOp,
2556 DAG.getIntPtrConstant(0));
2558 // Fall back to extract and build.
2559 SmallVector<SDValue, 16> Ops(WidenNumElts);
2560 EVT EltVT = NVT.getVectorElementType();
2561 unsigned MinNumElts = std::min(WidenNumElts, InNumElts);
2563 for (Idx = 0; Idx < MinNumElts; ++Idx)
2564 Ops[Idx] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
2565 DAG.getIntPtrConstant(Idx));
2567 SDValue UndefVal = DAG.getUNDEF(EltVT);
2568 for ( ; Idx < WidenNumElts; ++Idx)
2569 Ops[Idx] = UndefVal;
2570 return DAG.getNode(ISD::BUILD_VECTOR, dl, NVT, &Ops[0], WidenNumElts);