1 //===------- LegalizeVectorTypes.cpp - Legalization of vector types -------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file performs vector type splitting and scalarization for LegalizeTypes.
11 // Scalarization is the act of changing a computation in an illegal one-element
12 // vector type to be a computation in its scalar element type. For example,
13 // implementing <1 x f32> arithmetic in a scalar f32 register. This is needed
14 // as a base case when scalarizing vector arithmetic like <4 x f32>, which
15 // eventually decomposes to scalars if the target doesn't support v4f32 or v2f32
17 // Splitting is the act of changing a computation in an invalid vector type to
18 // be a computation in two vectors of half the size. For example, implementing
19 // <128 x f32> operations in terms of two <64 x f32> operations.
21 //===----------------------------------------------------------------------===//
23 #include "LegalizeTypes.h"
24 #include "llvm/IR/DataLayout.h"
25 #include "llvm/Support/ErrorHandling.h"
26 #include "llvm/Support/raw_ostream.h"
29 #define DEBUG_TYPE "legalize-types"
31 //===----------------------------------------------------------------------===//
32 // Result Vector Scalarization: <1 x ty> -> ty.
33 //===----------------------------------------------------------------------===//
35 void DAGTypeLegalizer::ScalarizeVectorResult(SDNode *N, unsigned ResNo) {
36 DEBUG(dbgs() << "Scalarize node result " << ResNo << ": ";
39 SDValue R = SDValue();
41 switch (N->getOpcode()) {
44 dbgs() << "ScalarizeVectorResult #" << ResNo << ": ";
48 report_fatal_error("Do not know how to scalarize the result of this "
51 case ISD::MERGE_VALUES: R = ScalarizeVecRes_MERGE_VALUES(N, ResNo);break;
52 case ISD::BITCAST: R = ScalarizeVecRes_BITCAST(N); break;
53 case ISD::BUILD_VECTOR: R = ScalarizeVecRes_BUILD_VECTOR(N); break;
54 case ISD::CONVERT_RNDSAT: R = ScalarizeVecRes_CONVERT_RNDSAT(N); break;
55 case ISD::EXTRACT_SUBVECTOR: R = ScalarizeVecRes_EXTRACT_SUBVECTOR(N); break;
56 case ISD::FP_ROUND: R = ScalarizeVecRes_FP_ROUND(N); break;
57 case ISD::FP_ROUND_INREG: R = ScalarizeVecRes_InregOp(N); break;
58 case ISD::FPOWI: R = ScalarizeVecRes_FPOWI(N); break;
59 case ISD::INSERT_VECTOR_ELT: R = ScalarizeVecRes_INSERT_VECTOR_ELT(N); break;
60 case ISD::LOAD: R = ScalarizeVecRes_LOAD(cast<LoadSDNode>(N));break;
61 case ISD::SCALAR_TO_VECTOR: R = ScalarizeVecRes_SCALAR_TO_VECTOR(N); break;
62 case ISD::SIGN_EXTEND_INREG: R = ScalarizeVecRes_InregOp(N); break;
63 case ISD::VSELECT: R = ScalarizeVecRes_VSELECT(N); break;
64 case ISD::SELECT: R = ScalarizeVecRes_SELECT(N); break;
65 case ISD::SELECT_CC: R = ScalarizeVecRes_SELECT_CC(N); break;
66 case ISD::SETCC: R = ScalarizeVecRes_SETCC(N); break;
67 case ISD::UNDEF: R = ScalarizeVecRes_UNDEF(N); break;
68 case ISD::VECTOR_SHUFFLE: R = ScalarizeVecRes_VECTOR_SHUFFLE(N); break;
93 case ISD::SIGN_EXTEND:
97 case ISD::ZERO_EXTEND:
98 R = ScalarizeVecRes_UnaryOp(N);
121 R = ScalarizeVecRes_BinOp(N);
124 R = ScalarizeVecRes_TernaryOp(N);
128 // If R is null, the sub-method took care of registering the result.
130 SetScalarizedVector(SDValue(N, ResNo), R);
133 SDValue DAGTypeLegalizer::ScalarizeVecRes_BinOp(SDNode *N) {
134 SDValue LHS = GetScalarizedVector(N->getOperand(0));
135 SDValue RHS = GetScalarizedVector(N->getOperand(1));
136 return DAG.getNode(N->getOpcode(), SDLoc(N),
137 LHS.getValueType(), LHS, RHS);
140 SDValue DAGTypeLegalizer::ScalarizeVecRes_TernaryOp(SDNode *N) {
141 SDValue Op0 = GetScalarizedVector(N->getOperand(0));
142 SDValue Op1 = GetScalarizedVector(N->getOperand(1));
143 SDValue Op2 = GetScalarizedVector(N->getOperand(2));
144 return DAG.getNode(N->getOpcode(), SDLoc(N),
145 Op0.getValueType(), Op0, Op1, Op2);
148 SDValue DAGTypeLegalizer::ScalarizeVecRes_MERGE_VALUES(SDNode *N,
150 SDValue Op = DisintegrateMERGE_VALUES(N, ResNo);
151 return GetScalarizedVector(Op);
154 SDValue DAGTypeLegalizer::ScalarizeVecRes_BITCAST(SDNode *N) {
155 EVT NewVT = N->getValueType(0).getVectorElementType();
156 return DAG.getNode(ISD::BITCAST, SDLoc(N),
157 NewVT, N->getOperand(0));
160 SDValue DAGTypeLegalizer::ScalarizeVecRes_BUILD_VECTOR(SDNode *N) {
161 EVT EltVT = N->getValueType(0).getVectorElementType();
162 SDValue InOp = N->getOperand(0);
163 // The BUILD_VECTOR operands may be of wider element types and
164 // we may need to truncate them back to the requested return type.
165 if (EltVT.isInteger())
166 return DAG.getNode(ISD::TRUNCATE, SDLoc(N), EltVT, InOp);
170 SDValue DAGTypeLegalizer::ScalarizeVecRes_CONVERT_RNDSAT(SDNode *N) {
171 EVT NewVT = N->getValueType(0).getVectorElementType();
172 SDValue Op0 = GetScalarizedVector(N->getOperand(0));
173 return DAG.getConvertRndSat(NewVT, SDLoc(N),
174 Op0, DAG.getValueType(NewVT),
175 DAG.getValueType(Op0.getValueType()),
178 cast<CvtRndSatSDNode>(N)->getCvtCode());
181 SDValue DAGTypeLegalizer::ScalarizeVecRes_EXTRACT_SUBVECTOR(SDNode *N) {
182 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SDLoc(N),
183 N->getValueType(0).getVectorElementType(),
184 N->getOperand(0), N->getOperand(1));
187 SDValue DAGTypeLegalizer::ScalarizeVecRes_FP_ROUND(SDNode *N) {
188 EVT NewVT = N->getValueType(0).getVectorElementType();
189 SDValue Op = GetScalarizedVector(N->getOperand(0));
190 return DAG.getNode(ISD::FP_ROUND, SDLoc(N),
191 NewVT, Op, N->getOperand(1));
194 SDValue DAGTypeLegalizer::ScalarizeVecRes_FPOWI(SDNode *N) {
195 SDValue Op = GetScalarizedVector(N->getOperand(0));
196 return DAG.getNode(ISD::FPOWI, SDLoc(N),
197 Op.getValueType(), Op, N->getOperand(1));
200 SDValue DAGTypeLegalizer::ScalarizeVecRes_INSERT_VECTOR_ELT(SDNode *N) {
201 // The value to insert may have a wider type than the vector element type,
202 // so be sure to truncate it to the element type if necessary.
203 SDValue Op = N->getOperand(1);
204 EVT EltVT = N->getValueType(0).getVectorElementType();
205 if (Op.getValueType() != EltVT)
206 // FIXME: Can this happen for floating point types?
207 Op = DAG.getNode(ISD::TRUNCATE, SDLoc(N), EltVT, Op);
211 SDValue DAGTypeLegalizer::ScalarizeVecRes_LOAD(LoadSDNode *N) {
212 assert(N->isUnindexed() && "Indexed vector load?");
214 SDValue Result = DAG.getLoad(ISD::UNINDEXED,
215 N->getExtensionType(),
216 N->getValueType(0).getVectorElementType(),
218 N->getChain(), N->getBasePtr(),
219 DAG.getUNDEF(N->getBasePtr().getValueType()),
221 N->getMemoryVT().getVectorElementType(),
222 N->isVolatile(), N->isNonTemporal(),
223 N->isInvariant(), N->getOriginalAlignment(),
226 // Legalized the chain result - switch anything that used the old chain to
228 ReplaceValueWith(SDValue(N, 1), Result.getValue(1));
232 SDValue DAGTypeLegalizer::ScalarizeVecRes_UnaryOp(SDNode *N) {
233 // Get the dest type - it doesn't always match the input type, e.g. int_to_fp.
234 EVT DestVT = N->getValueType(0).getVectorElementType();
235 SDValue Op = GetScalarizedVector(N->getOperand(0));
236 return DAG.getNode(N->getOpcode(), SDLoc(N), DestVT, Op);
239 SDValue DAGTypeLegalizer::ScalarizeVecRes_InregOp(SDNode *N) {
240 EVT EltVT = N->getValueType(0).getVectorElementType();
241 EVT ExtVT = cast<VTSDNode>(N->getOperand(1))->getVT().getVectorElementType();
242 SDValue LHS = GetScalarizedVector(N->getOperand(0));
243 return DAG.getNode(N->getOpcode(), SDLoc(N), EltVT,
244 LHS, DAG.getValueType(ExtVT));
247 SDValue DAGTypeLegalizer::ScalarizeVecRes_SCALAR_TO_VECTOR(SDNode *N) {
248 // If the operand is wider than the vector element type then it is implicitly
249 // truncated. Make that explicit here.
250 EVT EltVT = N->getValueType(0).getVectorElementType();
251 SDValue InOp = N->getOperand(0);
252 if (InOp.getValueType() != EltVT)
253 return DAG.getNode(ISD::TRUNCATE, SDLoc(N), EltVT, InOp);
257 SDValue DAGTypeLegalizer::ScalarizeVecRes_VSELECT(SDNode *N) {
258 SDValue Cond = GetScalarizedVector(N->getOperand(0));
259 SDValue LHS = GetScalarizedVector(N->getOperand(1));
260 TargetLowering::BooleanContent ScalarBool = TLI.getBooleanContents(false);
261 TargetLowering::BooleanContent VecBool = TLI.getBooleanContents(true);
262 if (ScalarBool != VecBool) {
263 EVT CondVT = Cond.getValueType();
264 switch (ScalarBool) {
265 case TargetLowering::UndefinedBooleanContent:
267 case TargetLowering::ZeroOrOneBooleanContent:
268 assert(VecBool == TargetLowering::UndefinedBooleanContent ||
269 VecBool == TargetLowering::ZeroOrNegativeOneBooleanContent);
270 // Vector read from all ones, scalar expects a single 1 so mask.
271 Cond = DAG.getNode(ISD::AND, SDLoc(N), CondVT,
272 Cond, DAG.getConstant(1, CondVT));
274 case TargetLowering::ZeroOrNegativeOneBooleanContent:
275 assert(VecBool == TargetLowering::UndefinedBooleanContent ||
276 VecBool == TargetLowering::ZeroOrOneBooleanContent);
277 // Vector reads from a one, scalar from all ones so sign extend.
278 Cond = DAG.getNode(ISD::SIGN_EXTEND_INREG, SDLoc(N), CondVT,
279 Cond, DAG.getValueType(MVT::i1));
284 return DAG.getSelect(SDLoc(N),
285 LHS.getValueType(), Cond, LHS,
286 GetScalarizedVector(N->getOperand(2)));
289 SDValue DAGTypeLegalizer::ScalarizeVecRes_SELECT(SDNode *N) {
290 SDValue LHS = GetScalarizedVector(N->getOperand(1));
291 return DAG.getSelect(SDLoc(N),
292 LHS.getValueType(), N->getOperand(0), LHS,
293 GetScalarizedVector(N->getOperand(2)));
296 SDValue DAGTypeLegalizer::ScalarizeVecRes_SELECT_CC(SDNode *N) {
297 SDValue LHS = GetScalarizedVector(N->getOperand(2));
298 return DAG.getNode(ISD::SELECT_CC, SDLoc(N), LHS.getValueType(),
299 N->getOperand(0), N->getOperand(1),
300 LHS, GetScalarizedVector(N->getOperand(3)),
304 SDValue DAGTypeLegalizer::ScalarizeVecRes_SETCC(SDNode *N) {
305 assert(N->getValueType(0).isVector() ==
306 N->getOperand(0).getValueType().isVector() &&
307 "Scalar/Vector type mismatch");
309 if (N->getValueType(0).isVector()) return ScalarizeVecRes_VSETCC(N);
311 SDValue LHS = GetScalarizedVector(N->getOperand(0));
312 SDValue RHS = GetScalarizedVector(N->getOperand(1));
315 // Turn it into a scalar SETCC.
316 return DAG.getNode(ISD::SETCC, DL, MVT::i1, LHS, RHS, N->getOperand(2));
319 SDValue DAGTypeLegalizer::ScalarizeVecRes_UNDEF(SDNode *N) {
320 return DAG.getUNDEF(N->getValueType(0).getVectorElementType());
323 SDValue DAGTypeLegalizer::ScalarizeVecRes_VECTOR_SHUFFLE(SDNode *N) {
324 // Figure out if the scalar is the LHS or RHS and return it.
325 SDValue Arg = N->getOperand(2).getOperand(0);
326 if (Arg.getOpcode() == ISD::UNDEF)
327 return DAG.getUNDEF(N->getValueType(0).getVectorElementType());
328 unsigned Op = !cast<ConstantSDNode>(Arg)->isNullValue();
329 return GetScalarizedVector(N->getOperand(Op));
332 SDValue DAGTypeLegalizer::ScalarizeVecRes_VSETCC(SDNode *N) {
333 assert(N->getValueType(0).isVector() &&
334 N->getOperand(0).getValueType().isVector() &&
335 "Operand types must be vectors");
336 SDValue LHS = N->getOperand(0);
337 SDValue RHS = N->getOperand(1);
338 EVT OpVT = LHS.getValueType();
339 EVT NVT = N->getValueType(0).getVectorElementType();
342 // The result needs scalarizing, but it's not a given that the source does.
343 if (getTypeAction(OpVT) == TargetLowering::TypeScalarizeVector) {
344 LHS = GetScalarizedVector(LHS);
345 RHS = GetScalarizedVector(RHS);
347 EVT VT = OpVT.getVectorElementType();
348 LHS = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, LHS,
349 DAG.getConstant(0, TLI.getVectorIdxTy()));
350 RHS = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, RHS,
351 DAG.getConstant(0, TLI.getVectorIdxTy()));
354 // Turn it into a scalar SETCC.
355 SDValue Res = DAG.getNode(ISD::SETCC, DL, MVT::i1, LHS, RHS,
357 // Vectors may have a different boolean contents to scalars. Promote the
358 // value appropriately.
359 ISD::NodeType ExtendCode =
360 TargetLowering::getExtendForContent(TLI.getBooleanContents(true));
361 return DAG.getNode(ExtendCode, DL, NVT, Res);
365 //===----------------------------------------------------------------------===//
366 // Operand Vector Scalarization <1 x ty> -> ty.
367 //===----------------------------------------------------------------------===//
369 bool DAGTypeLegalizer::ScalarizeVectorOperand(SDNode *N, unsigned OpNo) {
370 DEBUG(dbgs() << "Scalarize node operand " << OpNo << ": ";
373 SDValue Res = SDValue();
375 if (!Res.getNode()) {
376 switch (N->getOpcode()) {
379 dbgs() << "ScalarizeVectorOperand Op #" << OpNo << ": ";
383 llvm_unreachable("Do not know how to scalarize this operator's operand!");
385 Res = ScalarizeVecOp_BITCAST(N);
387 case ISD::ANY_EXTEND:
388 case ISD::ZERO_EXTEND:
389 case ISD::SIGN_EXTEND:
391 Res = ScalarizeVecOp_UnaryOp(N);
393 case ISD::CONCAT_VECTORS:
394 Res = ScalarizeVecOp_CONCAT_VECTORS(N);
396 case ISD::EXTRACT_VECTOR_ELT:
397 Res = ScalarizeVecOp_EXTRACT_VECTOR_ELT(N);
400 Res = ScalarizeVecOp_VSELECT(N);
403 Res = ScalarizeVecOp_STORE(cast<StoreSDNode>(N), OpNo);
406 Res = ScalarizeVecOp_FP_ROUND(N, OpNo);
411 // If the result is null, the sub-method took care of registering results etc.
412 if (!Res.getNode()) return false;
414 // If the result is N, the sub-method updated N in place. Tell the legalizer
416 if (Res.getNode() == N)
419 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
420 "Invalid operand expansion");
422 ReplaceValueWith(SDValue(N, 0), Res);
426 /// ScalarizeVecOp_BITCAST - If the value to convert is a vector that needs
427 /// to be scalarized, it must be <1 x ty>. Convert the element instead.
428 SDValue DAGTypeLegalizer::ScalarizeVecOp_BITCAST(SDNode *N) {
429 SDValue Elt = GetScalarizedVector(N->getOperand(0));
430 return DAG.getNode(ISD::BITCAST, SDLoc(N),
431 N->getValueType(0), Elt);
434 /// ScalarizeVecOp_EXTEND - If the value to extend is a vector that needs
435 /// to be scalarized, it must be <1 x ty>. Extend the element instead.
436 SDValue DAGTypeLegalizer::ScalarizeVecOp_UnaryOp(SDNode *N) {
437 assert(N->getValueType(0).getVectorNumElements() == 1 &&
438 "Unexected vector type!");
439 SDValue Elt = GetScalarizedVector(N->getOperand(0));
440 SDValue Op = DAG.getNode(N->getOpcode(), SDLoc(N),
441 N->getValueType(0).getScalarType(), Elt);
442 // Revectorize the result so the types line up with what the uses of this
443 // expression expect.
444 return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(N), N->getValueType(0), Op);
447 /// ScalarizeVecOp_CONCAT_VECTORS - The vectors to concatenate have length one -
448 /// use a BUILD_VECTOR instead.
449 SDValue DAGTypeLegalizer::ScalarizeVecOp_CONCAT_VECTORS(SDNode *N) {
450 SmallVector<SDValue, 8> Ops(N->getNumOperands());
451 for (unsigned i = 0, e = N->getNumOperands(); i < e; ++i)
452 Ops[i] = GetScalarizedVector(N->getOperand(i));
453 return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(N), N->getValueType(0), Ops);
456 /// ScalarizeVecOp_EXTRACT_VECTOR_ELT - If the input is a vector that needs to
457 /// be scalarized, it must be <1 x ty>, so just return the element, ignoring the
459 SDValue DAGTypeLegalizer::ScalarizeVecOp_EXTRACT_VECTOR_ELT(SDNode *N) {
460 SDValue Res = GetScalarizedVector(N->getOperand(0));
461 if (Res.getValueType() != N->getValueType(0))
462 Res = DAG.getNode(ISD::ANY_EXTEND, SDLoc(N), N->getValueType(0),
468 /// ScalarizeVecOp_VSELECT - If the input condition is a vector that needs to be
469 /// scalarized, it must be <1 x i1>, so just convert to a normal ISD::SELECT
470 /// (still with vector output type since that was acceptable if we got here).
471 SDValue DAGTypeLegalizer::ScalarizeVecOp_VSELECT(SDNode *N) {
472 SDValue ScalarCond = GetScalarizedVector(N->getOperand(0));
473 EVT VT = N->getValueType(0);
475 return DAG.getNode(ISD::SELECT, SDLoc(N), VT, ScalarCond, N->getOperand(1),
479 /// ScalarizeVecOp_STORE - If the value to store is a vector that needs to be
480 /// scalarized, it must be <1 x ty>. Just store the element.
481 SDValue DAGTypeLegalizer::ScalarizeVecOp_STORE(StoreSDNode *N, unsigned OpNo){
482 assert(N->isUnindexed() && "Indexed store of one-element vector?");
483 assert(OpNo == 1 && "Do not know how to scalarize this operand!");
486 if (N->isTruncatingStore())
487 return DAG.getTruncStore(N->getChain(), dl,
488 GetScalarizedVector(N->getOperand(1)),
489 N->getBasePtr(), N->getPointerInfo(),
490 N->getMemoryVT().getVectorElementType(),
491 N->isVolatile(), N->isNonTemporal(),
492 N->getAlignment(), N->getTBAAInfo());
494 return DAG.getStore(N->getChain(), dl, GetScalarizedVector(N->getOperand(1)),
495 N->getBasePtr(), N->getPointerInfo(),
496 N->isVolatile(), N->isNonTemporal(),
497 N->getOriginalAlignment(), N->getTBAAInfo());
500 /// ScalarizeVecOp_FP_ROUND - If the value to round is a vector that needs
501 /// to be scalarized, it must be <1 x ty>. Convert the element instead.
502 SDValue DAGTypeLegalizer::ScalarizeVecOp_FP_ROUND(SDNode *N, unsigned OpNo) {
503 SDValue Elt = GetScalarizedVector(N->getOperand(0));
504 SDValue Res = DAG.getNode(ISD::FP_ROUND, SDLoc(N),
505 N->getValueType(0).getVectorElementType(), Elt,
507 return DAG.getNode(ISD::SCALAR_TO_VECTOR, SDLoc(N), N->getValueType(0), Res);
510 //===----------------------------------------------------------------------===//
511 // Result Vector Splitting
512 //===----------------------------------------------------------------------===//
514 /// SplitVectorResult - This method is called when the specified result of the
515 /// specified node is found to need vector splitting. At this point, the node
516 /// may also have invalid operands or may have other results that need
517 /// legalization, we just know that (at least) one result needs vector
519 void DAGTypeLegalizer::SplitVectorResult(SDNode *N, unsigned ResNo) {
520 DEBUG(dbgs() << "Split node result: ";
525 // See if the target wants to custom expand this node.
526 if (CustomLowerNode(N, N->getValueType(ResNo), true))
529 switch (N->getOpcode()) {
532 dbgs() << "SplitVectorResult #" << ResNo << ": ";
536 report_fatal_error("Do not know how to split the result of this "
539 case ISD::MERGE_VALUES: SplitRes_MERGE_VALUES(N, ResNo, Lo, Hi); break;
541 case ISD::SELECT: SplitRes_SELECT(N, Lo, Hi); break;
542 case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break;
543 case ISD::UNDEF: SplitRes_UNDEF(N, Lo, Hi); break;
544 case ISD::BITCAST: SplitVecRes_BITCAST(N, Lo, Hi); break;
545 case ISD::BUILD_VECTOR: SplitVecRes_BUILD_VECTOR(N, Lo, Hi); break;
546 case ISD::CONCAT_VECTORS: SplitVecRes_CONCAT_VECTORS(N, Lo, Hi); break;
547 case ISD::EXTRACT_SUBVECTOR: SplitVecRes_EXTRACT_SUBVECTOR(N, Lo, Hi); break;
548 case ISD::INSERT_SUBVECTOR: SplitVecRes_INSERT_SUBVECTOR(N, Lo, Hi); break;
549 case ISD::FP_ROUND_INREG: SplitVecRes_InregOp(N, Lo, Hi); break;
550 case ISD::FPOWI: SplitVecRes_FPOWI(N, Lo, Hi); break;
551 case ISD::INSERT_VECTOR_ELT: SplitVecRes_INSERT_VECTOR_ELT(N, Lo, Hi); break;
552 case ISD::SCALAR_TO_VECTOR: SplitVecRes_SCALAR_TO_VECTOR(N, Lo, Hi); break;
553 case ISD::SIGN_EXTEND_INREG: SplitVecRes_InregOp(N, Lo, Hi); break;
555 SplitVecRes_LOAD(cast<LoadSDNode>(N), Lo, Hi);
558 SplitVecRes_SETCC(N, Lo, Hi);
560 case ISD::VECTOR_SHUFFLE:
561 SplitVecRes_VECTOR_SHUFFLE(cast<ShuffleVectorSDNode>(N), Lo, Hi);
565 case ISD::CONVERT_RNDSAT:
568 case ISD::CTLZ_ZERO_UNDEF:
569 case ISD::CTTZ_ZERO_UNDEF:
580 case ISD::FNEARBYINT:
584 case ISD::FP_TO_SINT:
585 case ISD::FP_TO_UINT:
591 case ISD::SINT_TO_FP:
593 case ISD::UINT_TO_FP:
594 SplitVecRes_UnaryOp(N, Lo, Hi);
597 case ISD::ANY_EXTEND:
598 case ISD::SIGN_EXTEND:
599 case ISD::ZERO_EXTEND:
600 SplitVecRes_ExtendOp(N, Lo, Hi);
623 SplitVecRes_BinOp(N, Lo, Hi);
626 SplitVecRes_TernaryOp(N, Lo, Hi);
630 // If Lo/Hi is null, the sub-method took care of registering results etc.
632 SetSplitVector(SDValue(N, ResNo), Lo, Hi);
635 void DAGTypeLegalizer::SplitVecRes_BinOp(SDNode *N, SDValue &Lo,
637 SDValue LHSLo, LHSHi;
638 GetSplitVector(N->getOperand(0), LHSLo, LHSHi);
639 SDValue RHSLo, RHSHi;
640 GetSplitVector(N->getOperand(1), RHSLo, RHSHi);
643 Lo = DAG.getNode(N->getOpcode(), dl, LHSLo.getValueType(), LHSLo, RHSLo);
644 Hi = DAG.getNode(N->getOpcode(), dl, LHSHi.getValueType(), LHSHi, RHSHi);
647 void DAGTypeLegalizer::SplitVecRes_TernaryOp(SDNode *N, SDValue &Lo,
649 SDValue Op0Lo, Op0Hi;
650 GetSplitVector(N->getOperand(0), Op0Lo, Op0Hi);
651 SDValue Op1Lo, Op1Hi;
652 GetSplitVector(N->getOperand(1), Op1Lo, Op1Hi);
653 SDValue Op2Lo, Op2Hi;
654 GetSplitVector(N->getOperand(2), Op2Lo, Op2Hi);
657 Lo = DAG.getNode(N->getOpcode(), dl, Op0Lo.getValueType(),
658 Op0Lo, Op1Lo, Op2Lo);
659 Hi = DAG.getNode(N->getOpcode(), dl, Op0Hi.getValueType(),
660 Op0Hi, Op1Hi, Op2Hi);
663 void DAGTypeLegalizer::SplitVecRes_BITCAST(SDNode *N, SDValue &Lo,
665 // We know the result is a vector. The input may be either a vector or a
668 std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(N->getValueType(0));
671 SDValue InOp = N->getOperand(0);
672 EVT InVT = InOp.getValueType();
674 // Handle some special cases efficiently.
675 switch (getTypeAction(InVT)) {
676 case TargetLowering::TypeLegal:
677 case TargetLowering::TypePromoteInteger:
678 case TargetLowering::TypeSoftenFloat:
679 case TargetLowering::TypeScalarizeVector:
680 case TargetLowering::TypeWidenVector:
682 case TargetLowering::TypeExpandInteger:
683 case TargetLowering::TypeExpandFloat:
684 // A scalar to vector conversion, where the scalar needs expansion.
685 // If the vector is being split in two then we can just convert the
688 GetExpandedOp(InOp, Lo, Hi);
689 if (TLI.isBigEndian())
691 Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo);
692 Hi = DAG.getNode(ISD::BITCAST, dl, HiVT, Hi);
696 case TargetLowering::TypeSplitVector:
697 // If the input is a vector that needs to be split, convert each split
698 // piece of the input now.
699 GetSplitVector(InOp, Lo, Hi);
700 Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo);
701 Hi = DAG.getNode(ISD::BITCAST, dl, HiVT, Hi);
705 // In the general case, convert the input to an integer and split it by hand.
706 EVT LoIntVT = EVT::getIntegerVT(*DAG.getContext(), LoVT.getSizeInBits());
707 EVT HiIntVT = EVT::getIntegerVT(*DAG.getContext(), HiVT.getSizeInBits());
708 if (TLI.isBigEndian())
709 std::swap(LoIntVT, HiIntVT);
711 SplitInteger(BitConvertToInteger(InOp), LoIntVT, HiIntVT, Lo, Hi);
713 if (TLI.isBigEndian())
715 Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo);
716 Hi = DAG.getNode(ISD::BITCAST, dl, HiVT, Hi);
719 void DAGTypeLegalizer::SplitVecRes_BUILD_VECTOR(SDNode *N, SDValue &Lo,
723 std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(N->getValueType(0));
724 unsigned LoNumElts = LoVT.getVectorNumElements();
725 SmallVector<SDValue, 8> LoOps(N->op_begin(), N->op_begin()+LoNumElts);
726 Lo = DAG.getNode(ISD::BUILD_VECTOR, dl, LoVT, LoOps);
728 SmallVector<SDValue, 8> HiOps(N->op_begin()+LoNumElts, N->op_end());
729 Hi = DAG.getNode(ISD::BUILD_VECTOR, dl, HiVT, HiOps);
732 void DAGTypeLegalizer::SplitVecRes_CONCAT_VECTORS(SDNode *N, SDValue &Lo,
734 assert(!(N->getNumOperands() & 1) && "Unsupported CONCAT_VECTORS");
736 unsigned NumSubvectors = N->getNumOperands() / 2;
737 if (NumSubvectors == 1) {
738 Lo = N->getOperand(0);
739 Hi = N->getOperand(1);
744 std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(N->getValueType(0));
746 SmallVector<SDValue, 8> LoOps(N->op_begin(), N->op_begin()+NumSubvectors);
747 Lo = DAG.getNode(ISD::CONCAT_VECTORS, dl, LoVT, LoOps);
749 SmallVector<SDValue, 8> HiOps(N->op_begin()+NumSubvectors, N->op_end());
750 Hi = DAG.getNode(ISD::CONCAT_VECTORS, dl, HiVT, HiOps);
753 void DAGTypeLegalizer::SplitVecRes_EXTRACT_SUBVECTOR(SDNode *N, SDValue &Lo,
755 SDValue Vec = N->getOperand(0);
756 SDValue Idx = N->getOperand(1);
760 std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(N->getValueType(0));
762 Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, LoVT, Vec, Idx);
763 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
764 Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, HiVT, Vec,
765 DAG.getConstant(IdxVal + LoVT.getVectorNumElements(),
766 TLI.getVectorIdxTy()));
769 void DAGTypeLegalizer::SplitVecRes_INSERT_SUBVECTOR(SDNode *N, SDValue &Lo,
771 SDValue Vec = N->getOperand(0);
772 SDValue SubVec = N->getOperand(1);
773 SDValue Idx = N->getOperand(2);
775 GetSplitVector(Vec, Lo, Hi);
777 // Spill the vector to the stack.
778 EVT VecVT = Vec.getValueType();
779 EVT SubVecVT = VecVT.getVectorElementType();
780 SDValue StackPtr = DAG.CreateStackTemporary(VecVT);
781 SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, Vec, StackPtr,
782 MachinePointerInfo(), false, false, 0);
784 // Store the new subvector into the specified index.
785 SDValue SubVecPtr = GetVectorElementPointer(StackPtr, SubVecVT, Idx);
786 Type *VecType = VecVT.getTypeForEVT(*DAG.getContext());
787 unsigned Alignment = TLI.getDataLayout()->getPrefTypeAlignment(VecType);
788 Store = DAG.getStore(Store, dl, SubVec, SubVecPtr, MachinePointerInfo(),
791 // Load the Lo part from the stack slot.
792 Lo = DAG.getLoad(Lo.getValueType(), dl, Store, StackPtr, MachinePointerInfo(),
793 false, false, false, 0);
795 // Increment the pointer to the other part.
796 unsigned IncrementSize = Lo.getValueType().getSizeInBits() / 8;
798 DAG.getNode(ISD::ADD, dl, StackPtr.getValueType(), StackPtr,
799 DAG.getConstant(IncrementSize, StackPtr.getValueType()));
801 // Load the Hi part from the stack slot.
802 Hi = DAG.getLoad(Hi.getValueType(), dl, Store, StackPtr, MachinePointerInfo(),
803 false, false, false, MinAlign(Alignment, IncrementSize));
806 void DAGTypeLegalizer::SplitVecRes_FPOWI(SDNode *N, SDValue &Lo,
809 GetSplitVector(N->getOperand(0), Lo, Hi);
810 Lo = DAG.getNode(ISD::FPOWI, dl, Lo.getValueType(), Lo, N->getOperand(1));
811 Hi = DAG.getNode(ISD::FPOWI, dl, Hi.getValueType(), Hi, N->getOperand(1));
814 void DAGTypeLegalizer::SplitVecRes_InregOp(SDNode *N, SDValue &Lo,
816 SDValue LHSLo, LHSHi;
817 GetSplitVector(N->getOperand(0), LHSLo, LHSHi);
821 std::tie(LoVT, HiVT) =
822 DAG.GetSplitDestVTs(cast<VTSDNode>(N->getOperand(1))->getVT());
824 Lo = DAG.getNode(N->getOpcode(), dl, LHSLo.getValueType(), LHSLo,
825 DAG.getValueType(LoVT));
826 Hi = DAG.getNode(N->getOpcode(), dl, LHSHi.getValueType(), LHSHi,
827 DAG.getValueType(HiVT));
830 void DAGTypeLegalizer::SplitVecRes_INSERT_VECTOR_ELT(SDNode *N, SDValue &Lo,
832 SDValue Vec = N->getOperand(0);
833 SDValue Elt = N->getOperand(1);
834 SDValue Idx = N->getOperand(2);
836 GetSplitVector(Vec, Lo, Hi);
838 if (ConstantSDNode *CIdx = dyn_cast<ConstantSDNode>(Idx)) {
839 unsigned IdxVal = CIdx->getZExtValue();
840 unsigned LoNumElts = Lo.getValueType().getVectorNumElements();
841 if (IdxVal < LoNumElts)
842 Lo = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl,
843 Lo.getValueType(), Lo, Elt, Idx);
845 Hi = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, Hi.getValueType(), Hi, Elt,
846 DAG.getConstant(IdxVal - LoNumElts,
847 TLI.getVectorIdxTy()));
851 // Spill the vector to the stack.
852 EVT VecVT = Vec.getValueType();
853 EVT EltVT = VecVT.getVectorElementType();
854 SDValue StackPtr = DAG.CreateStackTemporary(VecVT);
855 SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, Vec, StackPtr,
856 MachinePointerInfo(), false, false, 0);
858 // Store the new element. This may be larger than the vector element type,
859 // so use a truncating store.
860 SDValue EltPtr = GetVectorElementPointer(StackPtr, EltVT, Idx);
861 Type *VecType = VecVT.getTypeForEVT(*DAG.getContext());
863 TLI.getDataLayout()->getPrefTypeAlignment(VecType);
864 Store = DAG.getTruncStore(Store, dl, Elt, EltPtr, MachinePointerInfo(), EltVT,
867 // Load the Lo part from the stack slot.
868 Lo = DAG.getLoad(Lo.getValueType(), dl, Store, StackPtr, MachinePointerInfo(),
869 false, false, false, 0);
871 // Increment the pointer to the other part.
872 unsigned IncrementSize = Lo.getValueType().getSizeInBits() / 8;
873 StackPtr = DAG.getNode(ISD::ADD, dl, StackPtr.getValueType(), StackPtr,
874 DAG.getConstant(IncrementSize, StackPtr.getValueType()));
876 // Load the Hi part from the stack slot.
877 Hi = DAG.getLoad(Hi.getValueType(), dl, Store, StackPtr, MachinePointerInfo(),
878 false, false, false, MinAlign(Alignment, IncrementSize));
881 void DAGTypeLegalizer::SplitVecRes_SCALAR_TO_VECTOR(SDNode *N, SDValue &Lo,
885 std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(N->getValueType(0));
886 Lo = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, LoVT, N->getOperand(0));
887 Hi = DAG.getUNDEF(HiVT);
890 void DAGTypeLegalizer::SplitVecRes_LOAD(LoadSDNode *LD, SDValue &Lo,
892 assert(ISD::isUNINDEXEDLoad(LD) && "Indexed load during type legalization!");
895 std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(LD->getValueType(0));
897 ISD::LoadExtType ExtType = LD->getExtensionType();
898 SDValue Ch = LD->getChain();
899 SDValue Ptr = LD->getBasePtr();
900 SDValue Offset = DAG.getUNDEF(Ptr.getValueType());
901 EVT MemoryVT = LD->getMemoryVT();
902 unsigned Alignment = LD->getOriginalAlignment();
903 bool isVolatile = LD->isVolatile();
904 bool isNonTemporal = LD->isNonTemporal();
905 bool isInvariant = LD->isInvariant();
906 const MDNode *TBAAInfo = LD->getTBAAInfo();
908 EVT LoMemVT, HiMemVT;
909 std::tie(LoMemVT, HiMemVT) = DAG.GetSplitDestVTs(MemoryVT);
911 Lo = DAG.getLoad(ISD::UNINDEXED, ExtType, LoVT, dl, Ch, Ptr, Offset,
912 LD->getPointerInfo(), LoMemVT, isVolatile, isNonTemporal,
913 isInvariant, Alignment, TBAAInfo);
915 unsigned IncrementSize = LoMemVT.getSizeInBits()/8;
916 Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr,
917 DAG.getConstant(IncrementSize, Ptr.getValueType()));
918 Hi = DAG.getLoad(ISD::UNINDEXED, ExtType, HiVT, dl, Ch, Ptr, Offset,
919 LD->getPointerInfo().getWithOffset(IncrementSize),
920 HiMemVT, isVolatile, isNonTemporal, isInvariant, Alignment,
923 // Build a factor node to remember that this load is independent of the
925 Ch = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Lo.getValue(1),
928 // Legalized the chain result - switch anything that used the old chain to
930 ReplaceValueWith(SDValue(LD, 1), Ch);
933 void DAGTypeLegalizer::SplitVecRes_SETCC(SDNode *N, SDValue &Lo, SDValue &Hi) {
934 assert(N->getValueType(0).isVector() &&
935 N->getOperand(0).getValueType().isVector() &&
936 "Operand types must be vectors");
940 std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(N->getValueType(0));
943 SDValue LL, LH, RL, RH;
944 std::tie(LL, LH) = DAG.SplitVectorOperand(N, 0);
945 std::tie(RL, RH) = DAG.SplitVectorOperand(N, 1);
947 Lo = DAG.getNode(N->getOpcode(), DL, LoVT, LL, RL, N->getOperand(2));
948 Hi = DAG.getNode(N->getOpcode(), DL, HiVT, LH, RH, N->getOperand(2));
951 void DAGTypeLegalizer::SplitVecRes_UnaryOp(SDNode *N, SDValue &Lo,
953 // Get the dest types - they may not match the input types, e.g. int_to_fp.
956 std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(N->getValueType(0));
958 // If the input also splits, handle it directly for a compile time speedup.
959 // Otherwise split it by hand.
960 EVT InVT = N->getOperand(0).getValueType();
961 if (getTypeAction(InVT) == TargetLowering::TypeSplitVector)
962 GetSplitVector(N->getOperand(0), Lo, Hi);
964 std::tie(Lo, Hi) = DAG.SplitVectorOperand(N, 0);
966 if (N->getOpcode() == ISD::FP_ROUND) {
967 Lo = DAG.getNode(N->getOpcode(), dl, LoVT, Lo, N->getOperand(1));
968 Hi = DAG.getNode(N->getOpcode(), dl, HiVT, Hi, N->getOperand(1));
969 } else if (N->getOpcode() == ISD::CONVERT_RNDSAT) {
970 SDValue DTyOpLo = DAG.getValueType(LoVT);
971 SDValue DTyOpHi = DAG.getValueType(HiVT);
972 SDValue STyOpLo = DAG.getValueType(Lo.getValueType());
973 SDValue STyOpHi = DAG.getValueType(Hi.getValueType());
974 SDValue RndOp = N->getOperand(3);
975 SDValue SatOp = N->getOperand(4);
976 ISD::CvtCode CvtCode = cast<CvtRndSatSDNode>(N)->getCvtCode();
977 Lo = DAG.getConvertRndSat(LoVT, dl, Lo, DTyOpLo, STyOpLo, RndOp, SatOp,
979 Hi = DAG.getConvertRndSat(HiVT, dl, Hi, DTyOpHi, STyOpHi, RndOp, SatOp,
982 Lo = DAG.getNode(N->getOpcode(), dl, LoVT, Lo);
983 Hi = DAG.getNode(N->getOpcode(), dl, HiVT, Hi);
987 void DAGTypeLegalizer::SplitVecRes_ExtendOp(SDNode *N, SDValue &Lo,
990 EVT SrcVT = N->getOperand(0).getValueType();
991 EVT DestVT = N->getValueType(0);
993 std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(DestVT);
995 // We can do better than a generic split operation if the extend is doing
996 // more than just doubling the width of the elements and the following are
998 // - The number of vector elements is even,
999 // - the source type is legal,
1000 // - the type of a split source is illegal,
1001 // - the type of an extended (by doubling element size) source is legal, and
1002 // - the type of that extended source when split is legal.
1004 // This won't necessarily completely legalize the operation, but it will
1005 // more effectively move in the right direction and prevent falling down
1006 // to scalarization in many cases due to the input vector being split too
1008 unsigned NumElements = SrcVT.getVectorNumElements();
1009 if ((NumElements & 1) == 0 &&
1010 SrcVT.getSizeInBits() * 2 < DestVT.getSizeInBits()) {
1011 LLVMContext &Ctx = *DAG.getContext();
1012 EVT NewSrcVT = EVT::getVectorVT(
1013 Ctx, EVT::getIntegerVT(
1014 Ctx, SrcVT.getVectorElementType().getSizeInBits() * 2),
1017 EVT::getVectorVT(Ctx, SrcVT.getVectorElementType(), NumElements / 2);
1018 EVT SplitLoVT, SplitHiVT;
1019 std::tie(SplitLoVT, SplitHiVT) = DAG.GetSplitDestVTs(NewSrcVT);
1020 if (TLI.isTypeLegal(SrcVT) && !TLI.isTypeLegal(SplitSrcVT) &&
1021 TLI.isTypeLegal(NewSrcVT) && TLI.isTypeLegal(SplitLoVT)) {
1022 DEBUG(dbgs() << "Split vector extend via incremental extend:";
1023 N->dump(&DAG); dbgs() << "\n");
1024 // Extend the source vector by one step.
1026 DAG.getNode(N->getOpcode(), dl, NewSrcVT, N->getOperand(0));
1027 // Get the low and high halves of the new, extended one step, vector.
1028 std::tie(Lo, Hi) = DAG.SplitVector(NewSrc, dl);
1029 // Extend those vector halves the rest of the way.
1030 Lo = DAG.getNode(N->getOpcode(), dl, LoVT, Lo);
1031 Hi = DAG.getNode(N->getOpcode(), dl, HiVT, Hi);
1035 // Fall back to the generic unary operator splitting otherwise.
1036 SplitVecRes_UnaryOp(N, Lo, Hi);
1039 void DAGTypeLegalizer::SplitVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N,
1040 SDValue &Lo, SDValue &Hi) {
1041 // The low and high parts of the original input give four input vectors.
1044 GetSplitVector(N->getOperand(0), Inputs[0], Inputs[1]);
1045 GetSplitVector(N->getOperand(1), Inputs[2], Inputs[3]);
1046 EVT NewVT = Inputs[0].getValueType();
1047 unsigned NewElts = NewVT.getVectorNumElements();
1049 // If Lo or Hi uses elements from at most two of the four input vectors, then
1050 // express it as a vector shuffle of those two inputs. Otherwise extract the
1051 // input elements by hand and construct the Lo/Hi output using a BUILD_VECTOR.
1052 SmallVector<int, 16> Ops;
1053 for (unsigned High = 0; High < 2; ++High) {
1054 SDValue &Output = High ? Hi : Lo;
1056 // Build a shuffle mask for the output, discovering on the fly which
1057 // input vectors to use as shuffle operands (recorded in InputUsed).
1058 // If building a suitable shuffle vector proves too hard, then bail
1059 // out with useBuildVector set.
1060 unsigned InputUsed[2] = { -1U, -1U }; // Not yet discovered.
1061 unsigned FirstMaskIdx = High * NewElts;
1062 bool useBuildVector = false;
1063 for (unsigned MaskOffset = 0; MaskOffset < NewElts; ++MaskOffset) {
1064 // The mask element. This indexes into the input.
1065 int Idx = N->getMaskElt(FirstMaskIdx + MaskOffset);
1067 // The input vector this mask element indexes into.
1068 unsigned Input = (unsigned)Idx / NewElts;
1070 if (Input >= array_lengthof(Inputs)) {
1071 // The mask element does not index into any input vector.
1076 // Turn the index into an offset from the start of the input vector.
1077 Idx -= Input * NewElts;
1079 // Find or create a shuffle vector operand to hold this input.
1081 for (OpNo = 0; OpNo < array_lengthof(InputUsed); ++OpNo) {
1082 if (InputUsed[OpNo] == Input) {
1083 // This input vector is already an operand.
1085 } else if (InputUsed[OpNo] == -1U) {
1086 // Create a new operand for this input vector.
1087 InputUsed[OpNo] = Input;
1092 if (OpNo >= array_lengthof(InputUsed)) {
1093 // More than two input vectors used! Give up on trying to create a
1094 // shuffle vector. Insert all elements into a BUILD_VECTOR instead.
1095 useBuildVector = true;
1099 // Add the mask index for the new shuffle vector.
1100 Ops.push_back(Idx + OpNo * NewElts);
1103 if (useBuildVector) {
1104 EVT EltVT = NewVT.getVectorElementType();
1105 SmallVector<SDValue, 16> SVOps;
1107 // Extract the input elements by hand.
1108 for (unsigned MaskOffset = 0; MaskOffset < NewElts; ++MaskOffset) {
1109 // The mask element. This indexes into the input.
1110 int Idx = N->getMaskElt(FirstMaskIdx + MaskOffset);
1112 // The input vector this mask element indexes into.
1113 unsigned Input = (unsigned)Idx / NewElts;
1115 if (Input >= array_lengthof(Inputs)) {
1116 // The mask element is "undef" or indexes off the end of the input.
1117 SVOps.push_back(DAG.getUNDEF(EltVT));
1121 // Turn the index into an offset from the start of the input vector.
1122 Idx -= Input * NewElts;
1124 // Extract the vector element by hand.
1125 SVOps.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT,
1126 Inputs[Input], DAG.getConstant(Idx,
1127 TLI.getVectorIdxTy())));
1130 // Construct the Lo/Hi output using a BUILD_VECTOR.
1131 Output = DAG.getNode(ISD::BUILD_VECTOR, dl, NewVT, SVOps);
1132 } else if (InputUsed[0] == -1U) {
1133 // No input vectors were used! The result is undefined.
1134 Output = DAG.getUNDEF(NewVT);
1136 SDValue Op0 = Inputs[InputUsed[0]];
1137 // If only one input was used, use an undefined vector for the other.
1138 SDValue Op1 = InputUsed[1] == -1U ?
1139 DAG.getUNDEF(NewVT) : Inputs[InputUsed[1]];
1140 // At least one input vector was used. Create a new shuffle vector.
1141 Output = DAG.getVectorShuffle(NewVT, dl, Op0, Op1, &Ops[0]);
1149 //===----------------------------------------------------------------------===//
1150 // Operand Vector Splitting
1151 //===----------------------------------------------------------------------===//
1153 /// SplitVectorOperand - This method is called when the specified operand of the
1154 /// specified node is found to need vector splitting. At this point, all of the
1155 /// result types of the node are known to be legal, but other operands of the
1156 /// node may need legalization as well as the specified one.
1157 bool DAGTypeLegalizer::SplitVectorOperand(SDNode *N, unsigned OpNo) {
1158 DEBUG(dbgs() << "Split node operand: ";
1161 SDValue Res = SDValue();
1163 // See if the target wants to custom split this node.
1164 if (CustomLowerNode(N, N->getOperand(OpNo).getValueType(), false))
1167 if (!Res.getNode()) {
1168 switch (N->getOpcode()) {
1171 dbgs() << "SplitVectorOperand Op #" << OpNo << ": ";
1175 report_fatal_error("Do not know how to split this operator's "
1178 case ISD::SETCC: Res = SplitVecOp_VSETCC(N); break;
1179 case ISD::BITCAST: Res = SplitVecOp_BITCAST(N); break;
1180 case ISD::EXTRACT_SUBVECTOR: Res = SplitVecOp_EXTRACT_SUBVECTOR(N); break;
1181 case ISD::EXTRACT_VECTOR_ELT:Res = SplitVecOp_EXTRACT_VECTOR_ELT(N); break;
1182 case ISD::CONCAT_VECTORS: Res = SplitVecOp_CONCAT_VECTORS(N); break;
1183 case ISD::TRUNCATE: Res = SplitVecOp_TRUNCATE(N); break;
1184 case ISD::FP_ROUND: Res = SplitVecOp_FP_ROUND(N); break;
1186 Res = SplitVecOp_STORE(cast<StoreSDNode>(N), OpNo);
1189 Res = SplitVecOp_VSELECT(N, OpNo);
1194 case ISD::FP_EXTEND:
1195 case ISD::FP_TO_SINT:
1196 case ISD::FP_TO_UINT:
1197 case ISD::SINT_TO_FP:
1198 case ISD::UINT_TO_FP:
1200 case ISD::SIGN_EXTEND:
1201 case ISD::ZERO_EXTEND:
1202 case ISD::ANY_EXTEND:
1203 Res = SplitVecOp_UnaryOp(N);
1208 // If the result is null, the sub-method took care of registering results etc.
1209 if (!Res.getNode()) return false;
1211 // If the result is N, the sub-method updated N in place. Tell the legalizer
1213 if (Res.getNode() == N)
1216 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
1217 "Invalid operand expansion");
1219 ReplaceValueWith(SDValue(N, 0), Res);
1223 SDValue DAGTypeLegalizer::SplitVecOp_VSELECT(SDNode *N, unsigned OpNo) {
1224 // The only possibility for an illegal operand is the mask, since result type
1225 // legalization would have handled this node already otherwise.
1226 assert(OpNo == 0 && "Illegal operand must be mask");
1228 SDValue Mask = N->getOperand(0);
1229 SDValue Src0 = N->getOperand(1);
1230 SDValue Src1 = N->getOperand(2);
1231 EVT Src0VT = Src0.getValueType();
1233 assert(Mask.getValueType().isVector() && "VSELECT without a vector mask?");
1236 GetSplitVector(N->getOperand(0), Lo, Hi);
1237 assert(Lo.getValueType() == Hi.getValueType() &&
1238 "Lo and Hi have differing types");
1241 std::tie(LoOpVT, HiOpVT) = DAG.GetSplitDestVTs(Src0VT);
1242 assert(LoOpVT == HiOpVT && "Asymmetric vector split?");
1244 SDValue LoOp0, HiOp0, LoOp1, HiOp1, LoMask, HiMask;
1245 std::tie(LoOp0, HiOp0) = DAG.SplitVector(Src0, DL);
1246 std::tie(LoOp1, HiOp1) = DAG.SplitVector(Src1, DL);
1247 std::tie(LoMask, HiMask) = DAG.SplitVector(Mask, DL);
1250 DAG.getNode(ISD::VSELECT, DL, LoOpVT, LoMask, LoOp0, LoOp1);
1252 DAG.getNode(ISD::VSELECT, DL, HiOpVT, HiMask, HiOp0, HiOp1);
1254 return DAG.getNode(ISD::CONCAT_VECTORS, DL, Src0VT, LoSelect, HiSelect);
1257 SDValue DAGTypeLegalizer::SplitVecOp_UnaryOp(SDNode *N) {
1258 // The result has a legal vector type, but the input needs splitting.
1259 EVT ResVT = N->getValueType(0);
1262 GetSplitVector(N->getOperand(0), Lo, Hi);
1263 EVT InVT = Lo.getValueType();
1265 EVT OutVT = EVT::getVectorVT(*DAG.getContext(), ResVT.getVectorElementType(),
1266 InVT.getVectorNumElements());
1268 Lo = DAG.getNode(N->getOpcode(), dl, OutVT, Lo);
1269 Hi = DAG.getNode(N->getOpcode(), dl, OutVT, Hi);
1271 return DAG.getNode(ISD::CONCAT_VECTORS, dl, ResVT, Lo, Hi);
1274 SDValue DAGTypeLegalizer::SplitVecOp_BITCAST(SDNode *N) {
1275 // For example, i64 = BITCAST v4i16 on alpha. Typically the vector will
1276 // end up being split all the way down to individual components. Convert the
1277 // split pieces into integers and reassemble.
1279 GetSplitVector(N->getOperand(0), Lo, Hi);
1280 Lo = BitConvertToInteger(Lo);
1281 Hi = BitConvertToInteger(Hi);
1283 if (TLI.isBigEndian())
1286 return DAG.getNode(ISD::BITCAST, SDLoc(N), N->getValueType(0),
1287 JoinIntegers(Lo, Hi));
1290 SDValue DAGTypeLegalizer::SplitVecOp_EXTRACT_SUBVECTOR(SDNode *N) {
1291 // We know that the extracted result type is legal.
1292 EVT SubVT = N->getValueType(0);
1293 SDValue Idx = N->getOperand(1);
1296 GetSplitVector(N->getOperand(0), Lo, Hi);
1298 uint64_t LoElts = Lo.getValueType().getVectorNumElements();
1299 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
1301 if (IdxVal < LoElts) {
1302 assert(IdxVal + SubVT.getVectorNumElements() <= LoElts &&
1303 "Extracted subvector crosses vector split!");
1304 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, SubVT, Lo, Idx);
1306 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, SubVT, Hi,
1307 DAG.getConstant(IdxVal - LoElts, Idx.getValueType()));
1311 SDValue DAGTypeLegalizer::SplitVecOp_EXTRACT_VECTOR_ELT(SDNode *N) {
1312 SDValue Vec = N->getOperand(0);
1313 SDValue Idx = N->getOperand(1);
1314 EVT VecVT = Vec.getValueType();
1316 if (isa<ConstantSDNode>(Idx)) {
1317 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
1318 assert(IdxVal < VecVT.getVectorNumElements() && "Invalid vector index!");
1321 GetSplitVector(Vec, Lo, Hi);
1323 uint64_t LoElts = Lo.getValueType().getVectorNumElements();
1325 if (IdxVal < LoElts)
1326 return SDValue(DAG.UpdateNodeOperands(N, Lo, Idx), 0);
1327 return SDValue(DAG.UpdateNodeOperands(N, Hi,
1328 DAG.getConstant(IdxVal - LoElts,
1329 Idx.getValueType())), 0);
1332 // Store the vector to the stack.
1333 EVT EltVT = VecVT.getVectorElementType();
1335 SDValue StackPtr = DAG.CreateStackTemporary(VecVT);
1336 SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, Vec, StackPtr,
1337 MachinePointerInfo(), false, false, 0);
1339 // Load back the required element.
1340 StackPtr = GetVectorElementPointer(StackPtr, EltVT, Idx);
1341 return DAG.getExtLoad(ISD::EXTLOAD, dl, N->getValueType(0), Store, StackPtr,
1342 MachinePointerInfo(), EltVT, false, false, 0);
1345 SDValue DAGTypeLegalizer::SplitVecOp_STORE(StoreSDNode *N, unsigned OpNo) {
1346 assert(N->isUnindexed() && "Indexed store of vector?");
1347 assert(OpNo == 1 && "Can only split the stored value");
1350 bool isTruncating = N->isTruncatingStore();
1351 SDValue Ch = N->getChain();
1352 SDValue Ptr = N->getBasePtr();
1353 EVT MemoryVT = N->getMemoryVT();
1354 unsigned Alignment = N->getOriginalAlignment();
1355 bool isVol = N->isVolatile();
1356 bool isNT = N->isNonTemporal();
1357 const MDNode *TBAAInfo = N->getTBAAInfo();
1359 GetSplitVector(N->getOperand(1), Lo, Hi);
1361 EVT LoMemVT, HiMemVT;
1362 std::tie(LoMemVT, HiMemVT) = DAG.GetSplitDestVTs(MemoryVT);
1364 unsigned IncrementSize = LoMemVT.getSizeInBits()/8;
1367 Lo = DAG.getTruncStore(Ch, DL, Lo, Ptr, N->getPointerInfo(),
1368 LoMemVT, isVol, isNT, Alignment, TBAAInfo);
1370 Lo = DAG.getStore(Ch, DL, Lo, Ptr, N->getPointerInfo(),
1371 isVol, isNT, Alignment, TBAAInfo);
1373 // Increment the pointer to the other half.
1374 Ptr = DAG.getNode(ISD::ADD, DL, Ptr.getValueType(), Ptr,
1375 DAG.getConstant(IncrementSize, Ptr.getValueType()));
1378 Hi = DAG.getTruncStore(Ch, DL, Hi, Ptr,
1379 N->getPointerInfo().getWithOffset(IncrementSize),
1380 HiMemVT, isVol, isNT, Alignment, TBAAInfo);
1382 Hi = DAG.getStore(Ch, DL, Hi, Ptr,
1383 N->getPointerInfo().getWithOffset(IncrementSize),
1384 isVol, isNT, Alignment, TBAAInfo);
1386 return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Lo, Hi);
1389 SDValue DAGTypeLegalizer::SplitVecOp_CONCAT_VECTORS(SDNode *N) {
1392 // The input operands all must have the same type, and we know the result
1393 // type is valid. Convert this to a buildvector which extracts all the
1395 // TODO: If the input elements are power-two vectors, we could convert this to
1396 // a new CONCAT_VECTORS node with elements that are half-wide.
1397 SmallVector<SDValue, 32> Elts;
1398 EVT EltVT = N->getValueType(0).getVectorElementType();
1399 for (unsigned op = 0, e = N->getNumOperands(); op != e; ++op) {
1400 SDValue Op = N->getOperand(op);
1401 for (unsigned i = 0, e = Op.getValueType().getVectorNumElements();
1403 Elts.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, EltVT,
1404 Op, DAG.getConstant(i, TLI.getVectorIdxTy())));
1409 return DAG.getNode(ISD::BUILD_VECTOR, DL, N->getValueType(0), Elts);
1412 SDValue DAGTypeLegalizer::SplitVecOp_TRUNCATE(SDNode *N) {
1413 // The result type is legal, but the input type is illegal. If splitting
1414 // ends up with the result type of each half still being legal, just
1415 // do that. If, however, that would result in an illegal result type,
1416 // we can try to get more clever with power-two vectors. Specifically,
1417 // split the input type, but also widen the result element size, then
1418 // concatenate the halves and truncate again. For example, consider a target
1419 // where v8i8 is legal and v8i32 is not (ARM, which doesn't have 256-bit
1420 // vectors). To perform a "%res = v8i8 trunc v8i32 %in" we do:
1421 // %inlo = v4i32 extract_subvector %in, 0
1422 // %inhi = v4i32 extract_subvector %in, 4
1423 // %lo16 = v4i16 trunc v4i32 %inlo
1424 // %hi16 = v4i16 trunc v4i32 %inhi
1425 // %in16 = v8i16 concat_vectors v4i16 %lo16, v4i16 %hi16
1426 // %res = v8i8 trunc v8i16 %in16
1428 // Without this transform, the original truncate would end up being
1429 // scalarized, which is pretty much always a last resort.
1430 SDValue InVec = N->getOperand(0);
1431 EVT InVT = InVec->getValueType(0);
1432 EVT OutVT = N->getValueType(0);
1433 unsigned NumElements = OutVT.getVectorNumElements();
1434 // Widening should have already made sure this is a power-two vector
1435 // if we're trying to split it at all. assert() that's true, just in case.
1436 assert(!(NumElements & 1) && "Splitting vector, but not in half!");
1438 unsigned InElementSize = InVT.getVectorElementType().getSizeInBits();
1439 unsigned OutElementSize = OutVT.getVectorElementType().getSizeInBits();
1441 // If the input elements are only 1/2 the width of the result elements,
1442 // just use the normal splitting. Our trick only work if there's room
1443 // to split more than once.
1444 if (InElementSize <= OutElementSize * 2)
1445 return SplitVecOp_UnaryOp(N);
1448 // Extract the halves of the input via extract_subvector.
1449 SDValue InLoVec, InHiVec;
1450 std::tie(InLoVec, InHiVec) = DAG.SplitVector(InVec, DL);
1451 // Truncate them to 1/2 the element size.
1452 EVT HalfElementVT = EVT::getIntegerVT(*DAG.getContext(), InElementSize/2);
1453 EVT HalfVT = EVT::getVectorVT(*DAG.getContext(), HalfElementVT,
1455 SDValue HalfLo = DAG.getNode(ISD::TRUNCATE, DL, HalfVT, InLoVec);
1456 SDValue HalfHi = DAG.getNode(ISD::TRUNCATE, DL, HalfVT, InHiVec);
1457 // Concatenate them to get the full intermediate truncation result.
1458 EVT InterVT = EVT::getVectorVT(*DAG.getContext(), HalfElementVT, NumElements);
1459 SDValue InterVec = DAG.getNode(ISD::CONCAT_VECTORS, DL, InterVT, HalfLo,
1461 // Now finish up by truncating all the way down to the original result
1462 // type. This should normally be something that ends up being legal directly,
1463 // but in theory if a target has very wide vectors and an annoyingly
1464 // restricted set of legal types, this split can chain to build things up.
1465 return DAG.getNode(ISD::TRUNCATE, DL, OutVT, InterVec);
1468 SDValue DAGTypeLegalizer::SplitVecOp_VSETCC(SDNode *N) {
1469 assert(N->getValueType(0).isVector() &&
1470 N->getOperand(0).getValueType().isVector() &&
1471 "Operand types must be vectors");
1472 // The result has a legal vector type, but the input needs splitting.
1473 SDValue Lo0, Hi0, Lo1, Hi1, LoRes, HiRes;
1475 GetSplitVector(N->getOperand(0), Lo0, Hi0);
1476 GetSplitVector(N->getOperand(1), Lo1, Hi1);
1477 unsigned PartElements = Lo0.getValueType().getVectorNumElements();
1478 EVT PartResVT = EVT::getVectorVT(*DAG.getContext(), MVT::i1, PartElements);
1479 EVT WideResVT = EVT::getVectorVT(*DAG.getContext(), MVT::i1, 2*PartElements);
1481 LoRes = DAG.getNode(ISD::SETCC, DL, PartResVT, Lo0, Lo1, N->getOperand(2));
1482 HiRes = DAG.getNode(ISD::SETCC, DL, PartResVT, Hi0, Hi1, N->getOperand(2));
1483 SDValue Con = DAG.getNode(ISD::CONCAT_VECTORS, DL, WideResVT, LoRes, HiRes);
1484 return PromoteTargetBoolean(Con, N->getValueType(0));
1488 SDValue DAGTypeLegalizer::SplitVecOp_FP_ROUND(SDNode *N) {
1489 // The result has a legal vector type, but the input needs splitting.
1490 EVT ResVT = N->getValueType(0);
1493 GetSplitVector(N->getOperand(0), Lo, Hi);
1494 EVT InVT = Lo.getValueType();
1496 EVT OutVT = EVT::getVectorVT(*DAG.getContext(), ResVT.getVectorElementType(),
1497 InVT.getVectorNumElements());
1499 Lo = DAG.getNode(ISD::FP_ROUND, DL, OutVT, Lo, N->getOperand(1));
1500 Hi = DAG.getNode(ISD::FP_ROUND, DL, OutVT, Hi, N->getOperand(1));
1502 return DAG.getNode(ISD::CONCAT_VECTORS, DL, ResVT, Lo, Hi);
1507 //===----------------------------------------------------------------------===//
1508 // Result Vector Widening
1509 //===----------------------------------------------------------------------===//
1511 void DAGTypeLegalizer::WidenVectorResult(SDNode *N, unsigned ResNo) {
1512 DEBUG(dbgs() << "Widen node result " << ResNo << ": ";
1516 // See if the target wants to custom widen this node.
1517 if (CustomWidenLowerNode(N, N->getValueType(ResNo)))
1520 SDValue Res = SDValue();
1521 switch (N->getOpcode()) {
1524 dbgs() << "WidenVectorResult #" << ResNo << ": ";
1528 llvm_unreachable("Do not know how to widen the result of this operator!");
1530 case ISD::MERGE_VALUES: Res = WidenVecRes_MERGE_VALUES(N, ResNo); break;
1531 case ISD::BITCAST: Res = WidenVecRes_BITCAST(N); break;
1532 case ISD::BUILD_VECTOR: Res = WidenVecRes_BUILD_VECTOR(N); break;
1533 case ISD::CONCAT_VECTORS: Res = WidenVecRes_CONCAT_VECTORS(N); break;
1534 case ISD::CONVERT_RNDSAT: Res = WidenVecRes_CONVERT_RNDSAT(N); break;
1535 case ISD::EXTRACT_SUBVECTOR: Res = WidenVecRes_EXTRACT_SUBVECTOR(N); break;
1536 case ISD::FP_ROUND_INREG: Res = WidenVecRes_InregOp(N); break;
1537 case ISD::INSERT_VECTOR_ELT: Res = WidenVecRes_INSERT_VECTOR_ELT(N); break;
1538 case ISD::LOAD: Res = WidenVecRes_LOAD(N); break;
1539 case ISD::SCALAR_TO_VECTOR: Res = WidenVecRes_SCALAR_TO_VECTOR(N); break;
1540 case ISD::SIGN_EXTEND_INREG: Res = WidenVecRes_InregOp(N); break;
1542 case ISD::SELECT: Res = WidenVecRes_SELECT(N); break;
1543 case ISD::SELECT_CC: Res = WidenVecRes_SELECT_CC(N); break;
1544 case ISD::SETCC: Res = WidenVecRes_SETCC(N); break;
1545 case ISD::UNDEF: Res = WidenVecRes_UNDEF(N); break;
1546 case ISD::VECTOR_SHUFFLE:
1547 Res = WidenVecRes_VECTOR_SHUFFLE(cast<ShuffleVectorSDNode>(N));
1558 Res = WidenVecRes_Binary(N);
1562 case ISD::FCOPYSIGN:
1572 Res = WidenVecRes_BinaryCanTrap(N);
1576 Res = WidenVecRes_POWI(N);
1582 Res = WidenVecRes_Shift(N);
1585 case ISD::ANY_EXTEND:
1586 case ISD::FP_EXTEND:
1588 case ISD::FP_TO_SINT:
1589 case ISD::FP_TO_UINT:
1590 case ISD::SIGN_EXTEND:
1591 case ISD::SINT_TO_FP:
1593 case ISD::UINT_TO_FP:
1594 case ISD::ZERO_EXTEND:
1595 Res = WidenVecRes_Convert(N);
1611 case ISD::FNEARBYINT:
1618 Res = WidenVecRes_Unary(N);
1621 Res = WidenVecRes_Ternary(N);
1625 // If Res is null, the sub-method took care of registering the result.
1627 SetWidenedVector(SDValue(N, ResNo), Res);
1630 SDValue DAGTypeLegalizer::WidenVecRes_Ternary(SDNode *N) {
1631 // Ternary op widening.
1633 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1634 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
1635 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1636 SDValue InOp3 = GetWidenedVector(N->getOperand(2));
1637 return DAG.getNode(N->getOpcode(), dl, WidenVT, InOp1, InOp2, InOp3);
1640 SDValue DAGTypeLegalizer::WidenVecRes_Binary(SDNode *N) {
1641 // Binary op widening.
1643 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1644 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
1645 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1646 return DAG.getNode(N->getOpcode(), dl, WidenVT, InOp1, InOp2);
1649 SDValue DAGTypeLegalizer::WidenVecRes_BinaryCanTrap(SDNode *N) {
1650 // Binary op widening for operations that can trap.
1651 unsigned Opcode = N->getOpcode();
1653 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1654 EVT WidenEltVT = WidenVT.getVectorElementType();
1656 unsigned NumElts = VT.getVectorNumElements();
1657 while (!TLI.isTypeLegal(VT) && NumElts != 1) {
1658 NumElts = NumElts / 2;
1659 VT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NumElts);
1662 if (NumElts != 1 && !TLI.canOpTrap(N->getOpcode(), VT)) {
1663 // Operation doesn't trap so just widen as normal.
1664 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
1665 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1666 return DAG.getNode(N->getOpcode(), dl, WidenVT, InOp1, InOp2);
1669 // No legal vector version so unroll the vector operation and then widen.
1671 return DAG.UnrollVectorOp(N, WidenVT.getVectorNumElements());
1673 // Since the operation can trap, apply operation on the original vector.
1675 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
1676 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1677 unsigned CurNumElts = N->getValueType(0).getVectorNumElements();
1679 SmallVector<SDValue, 16> ConcatOps(CurNumElts);
1680 unsigned ConcatEnd = 0; // Current ConcatOps index.
1681 int Idx = 0; // Current Idx into input vectors.
1683 // NumElts := greatest legal vector size (at most WidenVT)
1684 // while (orig. vector has unhandled elements) {
1685 // take munches of size NumElts from the beginning and add to ConcatOps
1686 // NumElts := next smaller supported vector size or 1
1688 while (CurNumElts != 0) {
1689 while (CurNumElts >= NumElts) {
1690 SDValue EOp1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, InOp1,
1691 DAG.getConstant(Idx, TLI.getVectorIdxTy()));
1692 SDValue EOp2 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, InOp2,
1693 DAG.getConstant(Idx, TLI.getVectorIdxTy()));
1694 ConcatOps[ConcatEnd++] = DAG.getNode(Opcode, dl, VT, EOp1, EOp2);
1696 CurNumElts -= NumElts;
1699 NumElts = NumElts / 2;
1700 VT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NumElts);
1701 } while (!TLI.isTypeLegal(VT) && NumElts != 1);
1704 for (unsigned i = 0; i != CurNumElts; ++i, ++Idx) {
1705 SDValue EOp1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, WidenEltVT,
1706 InOp1, DAG.getConstant(Idx,
1707 TLI.getVectorIdxTy()));
1708 SDValue EOp2 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, WidenEltVT,
1709 InOp2, DAG.getConstant(Idx,
1710 TLI.getVectorIdxTy()));
1711 ConcatOps[ConcatEnd++] = DAG.getNode(Opcode, dl, WidenEltVT,
1718 // Check to see if we have a single operation with the widen type.
1719 if (ConcatEnd == 1) {
1720 VT = ConcatOps[0].getValueType();
1722 return ConcatOps[0];
1725 // while (Some element of ConcatOps is not of type MaxVT) {
1726 // From the end of ConcatOps, collect elements of the same type and put
1727 // them into an op of the next larger supported type
1729 while (ConcatOps[ConcatEnd-1].getValueType() != MaxVT) {
1730 Idx = ConcatEnd - 1;
1731 VT = ConcatOps[Idx--].getValueType();
1732 while (Idx >= 0 && ConcatOps[Idx].getValueType() == VT)
1735 int NextSize = VT.isVector() ? VT.getVectorNumElements() : 1;
1739 NextVT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NextSize);
1740 } while (!TLI.isTypeLegal(NextVT));
1742 if (!VT.isVector()) {
1743 // Scalar type, create an INSERT_VECTOR_ELEMENT of type NextVT
1744 SDValue VecOp = DAG.getUNDEF(NextVT);
1745 unsigned NumToInsert = ConcatEnd - Idx - 1;
1746 for (unsigned i = 0, OpIdx = Idx+1; i < NumToInsert; i++, OpIdx++) {
1747 VecOp = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NextVT, VecOp,
1748 ConcatOps[OpIdx], DAG.getConstant(i,
1749 TLI.getVectorIdxTy()));
1751 ConcatOps[Idx+1] = VecOp;
1752 ConcatEnd = Idx + 2;
1754 // Vector type, create a CONCAT_VECTORS of type NextVT
1755 SDValue undefVec = DAG.getUNDEF(VT);
1756 unsigned OpsToConcat = NextSize/VT.getVectorNumElements();
1757 SmallVector<SDValue, 16> SubConcatOps(OpsToConcat);
1758 unsigned RealVals = ConcatEnd - Idx - 1;
1759 unsigned SubConcatEnd = 0;
1760 unsigned SubConcatIdx = Idx + 1;
1761 while (SubConcatEnd < RealVals)
1762 SubConcatOps[SubConcatEnd++] = ConcatOps[++Idx];
1763 while (SubConcatEnd < OpsToConcat)
1764 SubConcatOps[SubConcatEnd++] = undefVec;
1765 ConcatOps[SubConcatIdx] = DAG.getNode(ISD::CONCAT_VECTORS, dl,
1766 NextVT, SubConcatOps);
1767 ConcatEnd = SubConcatIdx + 1;
1771 // Check to see if we have a single operation with the widen type.
1772 if (ConcatEnd == 1) {
1773 VT = ConcatOps[0].getValueType();
1775 return ConcatOps[0];
1778 // add undefs of size MaxVT until ConcatOps grows to length of WidenVT
1779 unsigned NumOps = WidenVT.getVectorNumElements()/MaxVT.getVectorNumElements();
1780 if (NumOps != ConcatEnd ) {
1781 SDValue UndefVal = DAG.getUNDEF(MaxVT);
1782 for (unsigned j = ConcatEnd; j < NumOps; ++j)
1783 ConcatOps[j] = UndefVal;
1785 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT,
1786 makeArrayRef(ConcatOps.data(), NumOps));
1789 SDValue DAGTypeLegalizer::WidenVecRes_Convert(SDNode *N) {
1790 SDValue InOp = N->getOperand(0);
1793 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1794 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1796 EVT InVT = InOp.getValueType();
1797 EVT InEltVT = InVT.getVectorElementType();
1798 EVT InWidenVT = EVT::getVectorVT(*DAG.getContext(), InEltVT, WidenNumElts);
1800 unsigned Opcode = N->getOpcode();
1801 unsigned InVTNumElts = InVT.getVectorNumElements();
1803 if (getTypeAction(InVT) == TargetLowering::TypeWidenVector) {
1804 InOp = GetWidenedVector(N->getOperand(0));
1805 InVT = InOp.getValueType();
1806 InVTNumElts = InVT.getVectorNumElements();
1807 if (InVTNumElts == WidenNumElts) {
1808 if (N->getNumOperands() == 1)
1809 return DAG.getNode(Opcode, DL, WidenVT, InOp);
1810 return DAG.getNode(Opcode, DL, WidenVT, InOp, N->getOperand(1));
1814 if (TLI.isTypeLegal(InWidenVT)) {
1815 // Because the result and the input are different vector types, widening
1816 // the result could create a legal type but widening the input might make
1817 // it an illegal type that might lead to repeatedly splitting the input
1818 // and then widening it. To avoid this, we widen the input only if
1819 // it results in a legal type.
1820 if (WidenNumElts % InVTNumElts == 0) {
1821 // Widen the input and call convert on the widened input vector.
1822 unsigned NumConcat = WidenNumElts/InVTNumElts;
1823 SmallVector<SDValue, 16> Ops(NumConcat);
1825 SDValue UndefVal = DAG.getUNDEF(InVT);
1826 for (unsigned i = 1; i != NumConcat; ++i)
1828 SDValue InVec = DAG.getNode(ISD::CONCAT_VECTORS, DL, InWidenVT, Ops);
1829 if (N->getNumOperands() == 1)
1830 return DAG.getNode(Opcode, DL, WidenVT, InVec);
1831 return DAG.getNode(Opcode, DL, WidenVT, InVec, N->getOperand(1));
1834 if (InVTNumElts % WidenNumElts == 0) {
1835 SDValue InVal = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InWidenVT,
1836 InOp, DAG.getConstant(0,
1837 TLI.getVectorIdxTy()));
1838 // Extract the input and convert the shorten input vector.
1839 if (N->getNumOperands() == 1)
1840 return DAG.getNode(Opcode, DL, WidenVT, InVal);
1841 return DAG.getNode(Opcode, DL, WidenVT, InVal, N->getOperand(1));
1845 // Otherwise unroll into some nasty scalar code and rebuild the vector.
1846 SmallVector<SDValue, 16> Ops(WidenNumElts);
1847 EVT EltVT = WidenVT.getVectorElementType();
1848 unsigned MinElts = std::min(InVTNumElts, WidenNumElts);
1850 for (i=0; i < MinElts; ++i) {
1851 SDValue Val = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, InEltVT, InOp,
1852 DAG.getConstant(i, TLI.getVectorIdxTy()));
1853 if (N->getNumOperands() == 1)
1854 Ops[i] = DAG.getNode(Opcode, DL, EltVT, Val);
1856 Ops[i] = DAG.getNode(Opcode, DL, EltVT, Val, N->getOperand(1));
1859 SDValue UndefVal = DAG.getUNDEF(EltVT);
1860 for (; i < WidenNumElts; ++i)
1863 return DAG.getNode(ISD::BUILD_VECTOR, DL, WidenVT, Ops);
1866 SDValue DAGTypeLegalizer::WidenVecRes_POWI(SDNode *N) {
1867 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1868 SDValue InOp = GetWidenedVector(N->getOperand(0));
1869 SDValue ShOp = N->getOperand(1);
1870 return DAG.getNode(N->getOpcode(), SDLoc(N), WidenVT, InOp, ShOp);
1873 SDValue DAGTypeLegalizer::WidenVecRes_Shift(SDNode *N) {
1874 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1875 SDValue InOp = GetWidenedVector(N->getOperand(0));
1876 SDValue ShOp = N->getOperand(1);
1878 EVT ShVT = ShOp.getValueType();
1879 if (getTypeAction(ShVT) == TargetLowering::TypeWidenVector) {
1880 ShOp = GetWidenedVector(ShOp);
1881 ShVT = ShOp.getValueType();
1883 EVT ShWidenVT = EVT::getVectorVT(*DAG.getContext(),
1884 ShVT.getVectorElementType(),
1885 WidenVT.getVectorNumElements());
1886 if (ShVT != ShWidenVT)
1887 ShOp = ModifyToType(ShOp, ShWidenVT);
1889 return DAG.getNode(N->getOpcode(), SDLoc(N), WidenVT, InOp, ShOp);
1892 SDValue DAGTypeLegalizer::WidenVecRes_Unary(SDNode *N) {
1893 // Unary op widening.
1894 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1895 SDValue InOp = GetWidenedVector(N->getOperand(0));
1896 return DAG.getNode(N->getOpcode(), SDLoc(N), WidenVT, InOp);
1899 SDValue DAGTypeLegalizer::WidenVecRes_InregOp(SDNode *N) {
1900 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1901 EVT ExtVT = EVT::getVectorVT(*DAG.getContext(),
1902 cast<VTSDNode>(N->getOperand(1))->getVT()
1903 .getVectorElementType(),
1904 WidenVT.getVectorNumElements());
1905 SDValue WidenLHS = GetWidenedVector(N->getOperand(0));
1906 return DAG.getNode(N->getOpcode(), SDLoc(N),
1907 WidenVT, WidenLHS, DAG.getValueType(ExtVT));
1910 SDValue DAGTypeLegalizer::WidenVecRes_MERGE_VALUES(SDNode *N, unsigned ResNo) {
1911 SDValue WidenVec = DisintegrateMERGE_VALUES(N, ResNo);
1912 return GetWidenedVector(WidenVec);
1915 SDValue DAGTypeLegalizer::WidenVecRes_BITCAST(SDNode *N) {
1916 SDValue InOp = N->getOperand(0);
1917 EVT InVT = InOp.getValueType();
1918 EVT VT = N->getValueType(0);
1919 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1922 switch (getTypeAction(InVT)) {
1923 case TargetLowering::TypeLegal:
1925 case TargetLowering::TypePromoteInteger:
1926 // If the incoming type is a vector that is being promoted, then
1927 // we know that the elements are arranged differently and that we
1928 // must perform the conversion using a stack slot.
1929 if (InVT.isVector())
1932 // If the InOp is promoted to the same size, convert it. Otherwise,
1933 // fall out of the switch and widen the promoted input.
1934 InOp = GetPromotedInteger(InOp);
1935 InVT = InOp.getValueType();
1936 if (WidenVT.bitsEq(InVT))
1937 return DAG.getNode(ISD::BITCAST, dl, WidenVT, InOp);
1939 case TargetLowering::TypeSoftenFloat:
1940 case TargetLowering::TypeExpandInteger:
1941 case TargetLowering::TypeExpandFloat:
1942 case TargetLowering::TypeScalarizeVector:
1943 case TargetLowering::TypeSplitVector:
1945 case TargetLowering::TypeWidenVector:
1946 // If the InOp is widened to the same size, convert it. Otherwise, fall
1947 // out of the switch and widen the widened input.
1948 InOp = GetWidenedVector(InOp);
1949 InVT = InOp.getValueType();
1950 if (WidenVT.bitsEq(InVT))
1951 // The input widens to the same size. Convert to the widen value.
1952 return DAG.getNode(ISD::BITCAST, dl, WidenVT, InOp);
1956 unsigned WidenSize = WidenVT.getSizeInBits();
1957 unsigned InSize = InVT.getSizeInBits();
1958 // x86mmx is not an acceptable vector element type, so don't try.
1959 if (WidenSize % InSize == 0 && InVT != MVT::x86mmx) {
1960 // Determine new input vector type. The new input vector type will use
1961 // the same element type (if its a vector) or use the input type as a
1962 // vector. It is the same size as the type to widen to.
1964 unsigned NewNumElts = WidenSize / InSize;
1965 if (InVT.isVector()) {
1966 EVT InEltVT = InVT.getVectorElementType();
1967 NewInVT = EVT::getVectorVT(*DAG.getContext(), InEltVT,
1968 WidenSize / InEltVT.getSizeInBits());
1970 NewInVT = EVT::getVectorVT(*DAG.getContext(), InVT, NewNumElts);
1973 if (TLI.isTypeLegal(NewInVT)) {
1974 // Because the result and the input are different vector types, widening
1975 // the result could create a legal type but widening the input might make
1976 // it an illegal type that might lead to repeatedly splitting the input
1977 // and then widening it. To avoid this, we widen the input only if
1978 // it results in a legal type.
1979 SmallVector<SDValue, 16> Ops(NewNumElts);
1980 SDValue UndefVal = DAG.getUNDEF(InVT);
1982 for (unsigned i = 1; i < NewNumElts; ++i)
1986 if (InVT.isVector())
1987 NewVec = DAG.getNode(ISD::CONCAT_VECTORS, dl, NewInVT, Ops);
1989 NewVec = DAG.getNode(ISD::BUILD_VECTOR, dl, NewInVT, Ops);
1990 return DAG.getNode(ISD::BITCAST, dl, WidenVT, NewVec);
1994 return CreateStackStoreLoad(InOp, WidenVT);
1997 SDValue DAGTypeLegalizer::WidenVecRes_BUILD_VECTOR(SDNode *N) {
1999 // Build a vector with undefined for the new nodes.
2000 EVT VT = N->getValueType(0);
2002 // Integer BUILD_VECTOR operands may be larger than the node's vector element
2003 // type. The UNDEFs need to have the same type as the existing operands.
2004 EVT EltVT = N->getOperand(0).getValueType();
2005 unsigned NumElts = VT.getVectorNumElements();
2007 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2008 unsigned WidenNumElts = WidenVT.getVectorNumElements();
2010 SmallVector<SDValue, 16> NewOps(N->op_begin(), N->op_end());
2011 assert(WidenNumElts >= NumElts && "Shrinking vector instead of widening!");
2012 NewOps.append(WidenNumElts - NumElts, DAG.getUNDEF(EltVT));
2014 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, NewOps);
2017 SDValue DAGTypeLegalizer::WidenVecRes_CONCAT_VECTORS(SDNode *N) {
2018 EVT InVT = N->getOperand(0).getValueType();
2019 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
2021 unsigned WidenNumElts = WidenVT.getVectorNumElements();
2022 unsigned NumInElts = InVT.getVectorNumElements();
2023 unsigned NumOperands = N->getNumOperands();
2025 bool InputWidened = false; // Indicates we need to widen the input.
2026 if (getTypeAction(InVT) != TargetLowering::TypeWidenVector) {
2027 if (WidenVT.getVectorNumElements() % InVT.getVectorNumElements() == 0) {
2028 // Add undef vectors to widen to correct length.
2029 unsigned NumConcat = WidenVT.getVectorNumElements() /
2030 InVT.getVectorNumElements();
2031 SDValue UndefVal = DAG.getUNDEF(InVT);
2032 SmallVector<SDValue, 16> Ops(NumConcat);
2033 for (unsigned i=0; i < NumOperands; ++i)
2034 Ops[i] = N->getOperand(i);
2035 for (unsigned i = NumOperands; i != NumConcat; ++i)
2037 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, Ops);
2040 InputWidened = true;
2041 if (WidenVT == TLI.getTypeToTransformTo(*DAG.getContext(), InVT)) {
2042 // The inputs and the result are widen to the same value.
2044 for (i=1; i < NumOperands; ++i)
2045 if (N->getOperand(i).getOpcode() != ISD::UNDEF)
2048 if (i == NumOperands)
2049 // Everything but the first operand is an UNDEF so just return the
2050 // widened first operand.
2051 return GetWidenedVector(N->getOperand(0));
2053 if (NumOperands == 2) {
2054 // Replace concat of two operands with a shuffle.
2055 SmallVector<int, 16> MaskOps(WidenNumElts, -1);
2056 for (unsigned i = 0; i < NumInElts; ++i) {
2058 MaskOps[i + NumInElts] = i + WidenNumElts;
2060 return DAG.getVectorShuffle(WidenVT, dl,
2061 GetWidenedVector(N->getOperand(0)),
2062 GetWidenedVector(N->getOperand(1)),
2068 // Fall back to use extracts and build vector.
2069 EVT EltVT = WidenVT.getVectorElementType();
2070 SmallVector<SDValue, 16> Ops(WidenNumElts);
2072 for (unsigned i=0; i < NumOperands; ++i) {
2073 SDValue InOp = N->getOperand(i);
2075 InOp = GetWidenedVector(InOp);
2076 for (unsigned j=0; j < NumInElts; ++j)
2077 Ops[Idx++] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
2078 DAG.getConstant(j, TLI.getVectorIdxTy()));
2080 SDValue UndefVal = DAG.getUNDEF(EltVT);
2081 for (; Idx < WidenNumElts; ++Idx)
2082 Ops[Idx] = UndefVal;
2083 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, Ops);
2086 SDValue DAGTypeLegalizer::WidenVecRes_CONVERT_RNDSAT(SDNode *N) {
2088 SDValue InOp = N->getOperand(0);
2089 SDValue RndOp = N->getOperand(3);
2090 SDValue SatOp = N->getOperand(4);
2092 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
2093 unsigned WidenNumElts = WidenVT.getVectorNumElements();
2095 EVT InVT = InOp.getValueType();
2096 EVT InEltVT = InVT.getVectorElementType();
2097 EVT InWidenVT = EVT::getVectorVT(*DAG.getContext(), InEltVT, WidenNumElts);
2099 SDValue DTyOp = DAG.getValueType(WidenVT);
2100 SDValue STyOp = DAG.getValueType(InWidenVT);
2101 ISD::CvtCode CvtCode = cast<CvtRndSatSDNode>(N)->getCvtCode();
2103 unsigned InVTNumElts = InVT.getVectorNumElements();
2104 if (getTypeAction(InVT) == TargetLowering::TypeWidenVector) {
2105 InOp = GetWidenedVector(InOp);
2106 InVT = InOp.getValueType();
2107 InVTNumElts = InVT.getVectorNumElements();
2108 if (InVTNumElts == WidenNumElts)
2109 return DAG.getConvertRndSat(WidenVT, dl, InOp, DTyOp, STyOp, RndOp,
2113 if (TLI.isTypeLegal(InWidenVT)) {
2114 // Because the result and the input are different vector types, widening
2115 // the result could create a legal type but widening the input might make
2116 // it an illegal type that might lead to repeatedly splitting the input
2117 // and then widening it. To avoid this, we widen the input only if
2118 // it results in a legal type.
2119 if (WidenNumElts % InVTNumElts == 0) {
2120 // Widen the input and call convert on the widened input vector.
2121 unsigned NumConcat = WidenNumElts/InVTNumElts;
2122 SmallVector<SDValue, 16> Ops(NumConcat);
2124 SDValue UndefVal = DAG.getUNDEF(InVT);
2125 for (unsigned i = 1; i != NumConcat; ++i)
2128 InOp = DAG.getNode(ISD::CONCAT_VECTORS, dl, InWidenVT, Ops);
2129 return DAG.getConvertRndSat(WidenVT, dl, InOp, DTyOp, STyOp, RndOp,
2133 if (InVTNumElts % WidenNumElts == 0) {
2134 // Extract the input and convert the shorten input vector.
2135 InOp = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InWidenVT, InOp,
2136 DAG.getConstant(0, TLI.getVectorIdxTy()));
2137 return DAG.getConvertRndSat(WidenVT, dl, InOp, DTyOp, STyOp, RndOp,
2142 // Otherwise unroll into some nasty scalar code and rebuild the vector.
2143 SmallVector<SDValue, 16> Ops(WidenNumElts);
2144 EVT EltVT = WidenVT.getVectorElementType();
2145 DTyOp = DAG.getValueType(EltVT);
2146 STyOp = DAG.getValueType(InEltVT);
2148 unsigned MinElts = std::min(InVTNumElts, WidenNumElts);
2150 for (i=0; i < MinElts; ++i) {
2151 SDValue ExtVal = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, InEltVT, InOp,
2152 DAG.getConstant(i, TLI.getVectorIdxTy()));
2153 Ops[i] = DAG.getConvertRndSat(WidenVT, dl, ExtVal, DTyOp, STyOp, RndOp,
2157 SDValue UndefVal = DAG.getUNDEF(EltVT);
2158 for (; i < WidenNumElts; ++i)
2161 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, Ops);
2164 SDValue DAGTypeLegalizer::WidenVecRes_EXTRACT_SUBVECTOR(SDNode *N) {
2165 EVT VT = N->getValueType(0);
2166 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2167 unsigned WidenNumElts = WidenVT.getVectorNumElements();
2168 SDValue InOp = N->getOperand(0);
2169 SDValue Idx = N->getOperand(1);
2172 if (getTypeAction(InOp.getValueType()) == TargetLowering::TypeWidenVector)
2173 InOp = GetWidenedVector(InOp);
2175 EVT InVT = InOp.getValueType();
2177 // Check if we can just return the input vector after widening.
2178 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
2179 if (IdxVal == 0 && InVT == WidenVT)
2182 // Check if we can extract from the vector.
2183 unsigned InNumElts = InVT.getVectorNumElements();
2184 if (IdxVal % WidenNumElts == 0 && IdxVal + WidenNumElts < InNumElts)
2185 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, WidenVT, InOp, Idx);
2187 // We could try widening the input to the right length but for now, extract
2188 // the original elements, fill the rest with undefs and build a vector.
2189 SmallVector<SDValue, 16> Ops(WidenNumElts);
2190 EVT EltVT = VT.getVectorElementType();
2191 unsigned NumElts = VT.getVectorNumElements();
2193 for (i=0; i < NumElts; ++i)
2194 Ops[i] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
2195 DAG.getConstant(IdxVal+i, TLI.getVectorIdxTy()));
2197 SDValue UndefVal = DAG.getUNDEF(EltVT);
2198 for (; i < WidenNumElts; ++i)
2200 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, Ops);
2203 SDValue DAGTypeLegalizer::WidenVecRes_INSERT_VECTOR_ELT(SDNode *N) {
2204 SDValue InOp = GetWidenedVector(N->getOperand(0));
2205 return DAG.getNode(ISD::INSERT_VECTOR_ELT, SDLoc(N),
2206 InOp.getValueType(), InOp,
2207 N->getOperand(1), N->getOperand(2));
2210 SDValue DAGTypeLegalizer::WidenVecRes_LOAD(SDNode *N) {
2211 LoadSDNode *LD = cast<LoadSDNode>(N);
2212 ISD::LoadExtType ExtType = LD->getExtensionType();
2215 SmallVector<SDValue, 16> LdChain; // Chain for the series of load
2216 if (ExtType != ISD::NON_EXTLOAD)
2217 Result = GenWidenVectorExtLoads(LdChain, LD, ExtType);
2219 Result = GenWidenVectorLoads(LdChain, LD);
2221 // If we generate a single load, we can use that for the chain. Otherwise,
2222 // build a factor node to remember the multiple loads are independent and
2225 if (LdChain.size() == 1)
2226 NewChain = LdChain[0];
2228 NewChain = DAG.getNode(ISD::TokenFactor, SDLoc(LD), MVT::Other, LdChain);
2230 // Modified the chain - switch anything that used the old chain to use
2232 ReplaceValueWith(SDValue(N, 1), NewChain);
2237 SDValue DAGTypeLegalizer::WidenVecRes_SCALAR_TO_VECTOR(SDNode *N) {
2238 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
2239 return DAG.getNode(ISD::SCALAR_TO_VECTOR, SDLoc(N),
2240 WidenVT, N->getOperand(0));
2243 SDValue DAGTypeLegalizer::WidenVecRes_SELECT(SDNode *N) {
2244 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
2245 unsigned WidenNumElts = WidenVT.getVectorNumElements();
2247 SDValue Cond1 = N->getOperand(0);
2248 EVT CondVT = Cond1.getValueType();
2249 if (CondVT.isVector()) {
2250 EVT CondEltVT = CondVT.getVectorElementType();
2251 EVT CondWidenVT = EVT::getVectorVT(*DAG.getContext(),
2252 CondEltVT, WidenNumElts);
2253 if (getTypeAction(CondVT) == TargetLowering::TypeWidenVector)
2254 Cond1 = GetWidenedVector(Cond1);
2256 // If we have to split the condition there is no point in widening the
2257 // select. This would result in an cycle of widening the select ->
2258 // widening the condition operand -> splitting the condition operand ->
2259 // splitting the select -> widening the select. Instead split this select
2260 // further and widen the resulting type.
2261 if (getTypeAction(CondVT) == TargetLowering::TypeSplitVector) {
2262 SDValue SplitSelect = SplitVecOp_VSELECT(N, 0);
2263 SDValue Res = ModifyToType(SplitSelect, WidenVT);
2267 if (Cond1.getValueType() != CondWidenVT)
2268 Cond1 = ModifyToType(Cond1, CondWidenVT);
2271 SDValue InOp1 = GetWidenedVector(N->getOperand(1));
2272 SDValue InOp2 = GetWidenedVector(N->getOperand(2));
2273 assert(InOp1.getValueType() == WidenVT && InOp2.getValueType() == WidenVT);
2274 return DAG.getNode(N->getOpcode(), SDLoc(N),
2275 WidenVT, Cond1, InOp1, InOp2);
2278 SDValue DAGTypeLegalizer::WidenVecRes_SELECT_CC(SDNode *N) {
2279 SDValue InOp1 = GetWidenedVector(N->getOperand(2));
2280 SDValue InOp2 = GetWidenedVector(N->getOperand(3));
2281 return DAG.getNode(ISD::SELECT_CC, SDLoc(N),
2282 InOp1.getValueType(), N->getOperand(0),
2283 N->getOperand(1), InOp1, InOp2, N->getOperand(4));
2286 SDValue DAGTypeLegalizer::WidenVecRes_SETCC(SDNode *N) {
2287 assert(N->getValueType(0).isVector() ==
2288 N->getOperand(0).getValueType().isVector() &&
2289 "Scalar/Vector type mismatch");
2290 if (N->getValueType(0).isVector()) return WidenVecRes_VSETCC(N);
2292 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
2293 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
2294 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
2295 return DAG.getNode(ISD::SETCC, SDLoc(N), WidenVT,
2296 InOp1, InOp2, N->getOperand(2));
2299 SDValue DAGTypeLegalizer::WidenVecRes_UNDEF(SDNode *N) {
2300 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
2301 return DAG.getUNDEF(WidenVT);
2304 SDValue DAGTypeLegalizer::WidenVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N) {
2305 EVT VT = N->getValueType(0);
2308 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2309 unsigned NumElts = VT.getVectorNumElements();
2310 unsigned WidenNumElts = WidenVT.getVectorNumElements();
2312 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
2313 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
2315 // Adjust mask based on new input vector length.
2316 SmallVector<int, 16> NewMask;
2317 for (unsigned i = 0; i != NumElts; ++i) {
2318 int Idx = N->getMaskElt(i);
2319 if (Idx < (int)NumElts)
2320 NewMask.push_back(Idx);
2322 NewMask.push_back(Idx - NumElts + WidenNumElts);
2324 for (unsigned i = NumElts; i != WidenNumElts; ++i)
2325 NewMask.push_back(-1);
2326 return DAG.getVectorShuffle(WidenVT, dl, InOp1, InOp2, &NewMask[0]);
2329 SDValue DAGTypeLegalizer::WidenVecRes_VSETCC(SDNode *N) {
2330 assert(N->getValueType(0).isVector() &&
2331 N->getOperand(0).getValueType().isVector() &&
2332 "Operands must be vectors");
2333 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
2334 unsigned WidenNumElts = WidenVT.getVectorNumElements();
2336 SDValue InOp1 = N->getOperand(0);
2337 EVT InVT = InOp1.getValueType();
2338 assert(InVT.isVector() && "can not widen non-vector type");
2339 EVT WidenInVT = EVT::getVectorVT(*DAG.getContext(),
2340 InVT.getVectorElementType(), WidenNumElts);
2341 InOp1 = GetWidenedVector(InOp1);
2342 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
2344 // Assume that the input and output will be widen appropriately. If not,
2345 // we will have to unroll it at some point.
2346 assert(InOp1.getValueType() == WidenInVT &&
2347 InOp2.getValueType() == WidenInVT &&
2348 "Input not widened to expected type!");
2350 return DAG.getNode(ISD::SETCC, SDLoc(N),
2351 WidenVT, InOp1, InOp2, N->getOperand(2));
2355 //===----------------------------------------------------------------------===//
2356 // Widen Vector Operand
2357 //===----------------------------------------------------------------------===//
2358 bool DAGTypeLegalizer::WidenVectorOperand(SDNode *N, unsigned OpNo) {
2359 DEBUG(dbgs() << "Widen node operand " << OpNo << ": ";
2362 SDValue Res = SDValue();
2364 // See if the target wants to custom widen this node.
2365 if (CustomLowerNode(N, N->getOperand(OpNo).getValueType(), false))
2368 switch (N->getOpcode()) {
2371 dbgs() << "WidenVectorOperand op #" << OpNo << ": ";
2375 llvm_unreachable("Do not know how to widen this operator's operand!");
2377 case ISD::BITCAST: Res = WidenVecOp_BITCAST(N); break;
2378 case ISD::CONCAT_VECTORS: Res = WidenVecOp_CONCAT_VECTORS(N); break;
2379 case ISD::EXTRACT_SUBVECTOR: Res = WidenVecOp_EXTRACT_SUBVECTOR(N); break;
2380 case ISD::EXTRACT_VECTOR_ELT: Res = WidenVecOp_EXTRACT_VECTOR_ELT(N); break;
2381 case ISD::STORE: Res = WidenVecOp_STORE(N); break;
2382 case ISD::SETCC: Res = WidenVecOp_SETCC(N); break;
2384 case ISD::FP_EXTEND:
2385 case ISD::FP_TO_SINT:
2386 case ISD::FP_TO_UINT:
2387 case ISD::SINT_TO_FP:
2388 case ISD::UINT_TO_FP:
2390 case ISD::SIGN_EXTEND:
2391 case ISD::ZERO_EXTEND:
2392 case ISD::ANY_EXTEND:
2393 Res = WidenVecOp_Convert(N);
2397 // If Res is null, the sub-method took care of registering the result.
2398 if (!Res.getNode()) return false;
2400 // If the result is N, the sub-method updated N in place. Tell the legalizer
2402 if (Res.getNode() == N)
2406 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
2407 "Invalid operand expansion");
2409 ReplaceValueWith(SDValue(N, 0), Res);
2413 SDValue DAGTypeLegalizer::WidenVecOp_Convert(SDNode *N) {
2414 // Since the result is legal and the input is illegal, it is unlikely
2415 // that we can fix the input to a legal type so unroll the convert
2416 // into some scalar code and create a nasty build vector.
2417 EVT VT = N->getValueType(0);
2418 EVT EltVT = VT.getVectorElementType();
2420 unsigned NumElts = VT.getVectorNumElements();
2421 SDValue InOp = N->getOperand(0);
2422 if (getTypeAction(InOp.getValueType()) == TargetLowering::TypeWidenVector)
2423 InOp = GetWidenedVector(InOp);
2424 EVT InVT = InOp.getValueType();
2425 EVT InEltVT = InVT.getVectorElementType();
2427 unsigned Opcode = N->getOpcode();
2428 SmallVector<SDValue, 16> Ops(NumElts);
2429 for (unsigned i=0; i < NumElts; ++i)
2430 Ops[i] = DAG.getNode(Opcode, dl, EltVT,
2431 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, InEltVT, InOp,
2432 DAG.getConstant(i, TLI.getVectorIdxTy())));
2434 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, Ops);
2437 SDValue DAGTypeLegalizer::WidenVecOp_BITCAST(SDNode *N) {
2438 EVT VT = N->getValueType(0);
2439 SDValue InOp = GetWidenedVector(N->getOperand(0));
2440 EVT InWidenVT = InOp.getValueType();
2443 // Check if we can convert between two legal vector types and extract.
2444 unsigned InWidenSize = InWidenVT.getSizeInBits();
2445 unsigned Size = VT.getSizeInBits();
2446 // x86mmx is not an acceptable vector element type, so don't try.
2447 if (InWidenSize % Size == 0 && !VT.isVector() && VT != MVT::x86mmx) {
2448 unsigned NewNumElts = InWidenSize / Size;
2449 EVT NewVT = EVT::getVectorVT(*DAG.getContext(), VT, NewNumElts);
2450 if (TLI.isTypeLegal(NewVT)) {
2451 SDValue BitOp = DAG.getNode(ISD::BITCAST, dl, NewVT, InOp);
2452 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, VT, BitOp,
2453 DAG.getConstant(0, TLI.getVectorIdxTy()));
2457 return CreateStackStoreLoad(InOp, VT);
2460 SDValue DAGTypeLegalizer::WidenVecOp_CONCAT_VECTORS(SDNode *N) {
2461 // If the input vector is not legal, it is likely that we will not find a
2462 // legal vector of the same size. Replace the concatenate vector with a
2463 // nasty build vector.
2464 EVT VT = N->getValueType(0);
2465 EVT EltVT = VT.getVectorElementType();
2467 unsigned NumElts = VT.getVectorNumElements();
2468 SmallVector<SDValue, 16> Ops(NumElts);
2470 EVT InVT = N->getOperand(0).getValueType();
2471 unsigned NumInElts = InVT.getVectorNumElements();
2474 unsigned NumOperands = N->getNumOperands();
2475 for (unsigned i=0; i < NumOperands; ++i) {
2476 SDValue InOp = N->getOperand(i);
2477 if (getTypeAction(InOp.getValueType()) == TargetLowering::TypeWidenVector)
2478 InOp = GetWidenedVector(InOp);
2479 for (unsigned j=0; j < NumInElts; ++j)
2480 Ops[Idx++] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
2481 DAG.getConstant(j, TLI.getVectorIdxTy()));
2483 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, Ops);
2486 SDValue DAGTypeLegalizer::WidenVecOp_EXTRACT_SUBVECTOR(SDNode *N) {
2487 SDValue InOp = GetWidenedVector(N->getOperand(0));
2488 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, SDLoc(N),
2489 N->getValueType(0), InOp, N->getOperand(1));
2492 SDValue DAGTypeLegalizer::WidenVecOp_EXTRACT_VECTOR_ELT(SDNode *N) {
2493 SDValue InOp = GetWidenedVector(N->getOperand(0));
2494 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SDLoc(N),
2495 N->getValueType(0), InOp, N->getOperand(1));
2498 SDValue DAGTypeLegalizer::WidenVecOp_STORE(SDNode *N) {
2499 // We have to widen the value but we want only to store the original
2501 StoreSDNode *ST = cast<StoreSDNode>(N);
2503 SmallVector<SDValue, 16> StChain;
2504 if (ST->isTruncatingStore())
2505 GenWidenVectorTruncStores(StChain, ST);
2507 GenWidenVectorStores(StChain, ST);
2509 if (StChain.size() == 1)
2512 return DAG.getNode(ISD::TokenFactor, SDLoc(ST), MVT::Other, StChain);
2515 SDValue DAGTypeLegalizer::WidenVecOp_SETCC(SDNode *N) {
2516 SDValue InOp0 = GetWidenedVector(N->getOperand(0));
2517 SDValue InOp1 = GetWidenedVector(N->getOperand(1));
2520 // WARNING: In this code we widen the compare instruction with garbage.
2521 // This garbage may contain denormal floats which may be slow. Is this a real
2522 // concern ? Should we zero the unused lanes if this is a float compare ?
2524 // Get a new SETCC node to compare the newly widened operands.
2525 // Only some of the compared elements are legal.
2526 EVT SVT = TLI.getSetCCResultType(*DAG.getContext(), InOp0.getValueType());
2527 SDValue WideSETCC = DAG.getNode(ISD::SETCC, SDLoc(N),
2528 SVT, InOp0, InOp1, N->getOperand(2));
2530 // Extract the needed results from the result vector.
2531 EVT ResVT = EVT::getVectorVT(*DAG.getContext(),
2532 SVT.getVectorElementType(),
2533 N->getValueType(0).getVectorNumElements());
2534 SDValue CC = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl,
2535 ResVT, WideSETCC, DAG.getConstant(0,
2536 TLI.getVectorIdxTy()));
2538 return PromoteTargetBoolean(CC, N->getValueType(0));
2542 //===----------------------------------------------------------------------===//
2543 // Vector Widening Utilities
2544 //===----------------------------------------------------------------------===//
2546 // Utility function to find the type to chop up a widen vector for load/store
2547 // TLI: Target lowering used to determine legal types.
2548 // Width: Width left need to load/store.
2549 // WidenVT: The widen vector type to load to/store from
2550 // Align: If 0, don't allow use of a wider type
2551 // WidenEx: If Align is not 0, the amount additional we can load/store from.
2553 static EVT FindMemType(SelectionDAG& DAG, const TargetLowering &TLI,
2554 unsigned Width, EVT WidenVT,
2555 unsigned Align = 0, unsigned WidenEx = 0) {
2556 EVT WidenEltVT = WidenVT.getVectorElementType();
2557 unsigned WidenWidth = WidenVT.getSizeInBits();
2558 unsigned WidenEltWidth = WidenEltVT.getSizeInBits();
2559 unsigned AlignInBits = Align*8;
2561 // If we have one element to load/store, return it.
2562 EVT RetVT = WidenEltVT;
2563 if (Width == WidenEltWidth)
2566 // See if there is larger legal integer than the element type to load/store
2568 for (VT = (unsigned)MVT::LAST_INTEGER_VALUETYPE;
2569 VT >= (unsigned)MVT::FIRST_INTEGER_VALUETYPE; --VT) {
2570 EVT MemVT((MVT::SimpleValueType) VT);
2571 unsigned MemVTWidth = MemVT.getSizeInBits();
2572 if (MemVT.getSizeInBits() <= WidenEltWidth)
2574 if (TLI.isTypeLegal(MemVT) && (WidenWidth % MemVTWidth) == 0 &&
2575 isPowerOf2_32(WidenWidth / MemVTWidth) &&
2576 (MemVTWidth <= Width ||
2577 (Align!=0 && MemVTWidth<=AlignInBits && MemVTWidth<=Width+WidenEx))) {
2583 // See if there is a larger vector type to load/store that has the same vector
2584 // element type and is evenly divisible with the WidenVT.
2585 for (VT = (unsigned)MVT::LAST_VECTOR_VALUETYPE;
2586 VT >= (unsigned)MVT::FIRST_VECTOR_VALUETYPE; --VT) {
2587 EVT MemVT = (MVT::SimpleValueType) VT;
2588 unsigned MemVTWidth = MemVT.getSizeInBits();
2589 if (TLI.isTypeLegal(MemVT) && WidenEltVT == MemVT.getVectorElementType() &&
2590 (WidenWidth % MemVTWidth) == 0 &&
2591 isPowerOf2_32(WidenWidth / MemVTWidth) &&
2592 (MemVTWidth <= Width ||
2593 (Align!=0 && MemVTWidth<=AlignInBits && MemVTWidth<=Width+WidenEx))) {
2594 if (RetVT.getSizeInBits() < MemVTWidth || MemVT == WidenVT)
2602 // Builds a vector type from scalar loads
2603 // VecTy: Resulting Vector type
2604 // LDOps: Load operators to build a vector type
2605 // [Start,End) the list of loads to use.
2606 static SDValue BuildVectorFromScalar(SelectionDAG& DAG, EVT VecTy,
2607 SmallVectorImpl<SDValue> &LdOps,
2608 unsigned Start, unsigned End) {
2609 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
2610 SDLoc dl(LdOps[Start]);
2611 EVT LdTy = LdOps[Start].getValueType();
2612 unsigned Width = VecTy.getSizeInBits();
2613 unsigned NumElts = Width / LdTy.getSizeInBits();
2614 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), LdTy, NumElts);
2617 SDValue VecOp = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, NewVecVT,LdOps[Start]);
2619 for (unsigned i = Start + 1; i != End; ++i) {
2620 EVT NewLdTy = LdOps[i].getValueType();
2621 if (NewLdTy != LdTy) {
2622 NumElts = Width / NewLdTy.getSizeInBits();
2623 NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewLdTy, NumElts);
2624 VecOp = DAG.getNode(ISD::BITCAST, dl, NewVecVT, VecOp);
2625 // Readjust position and vector position based on new load type
2626 Idx = Idx * LdTy.getSizeInBits() / NewLdTy.getSizeInBits();
2629 VecOp = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NewVecVT, VecOp, LdOps[i],
2630 DAG.getConstant(Idx++, TLI.getVectorIdxTy()));
2632 return DAG.getNode(ISD::BITCAST, dl, VecTy, VecOp);
2635 SDValue DAGTypeLegalizer::GenWidenVectorLoads(SmallVectorImpl<SDValue> &LdChain,
2637 // The strategy assumes that we can efficiently load powers of two widths.
2638 // The routines chops the vector into the largest vector loads with the same
2639 // element type or scalar loads and then recombines it to the widen vector
2641 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(),LD->getValueType(0));
2642 unsigned WidenWidth = WidenVT.getSizeInBits();
2643 EVT LdVT = LD->getMemoryVT();
2645 assert(LdVT.isVector() && WidenVT.isVector());
2646 assert(LdVT.getVectorElementType() == WidenVT.getVectorElementType());
2649 SDValue Chain = LD->getChain();
2650 SDValue BasePtr = LD->getBasePtr();
2651 unsigned Align = LD->getAlignment();
2652 bool isVolatile = LD->isVolatile();
2653 bool isNonTemporal = LD->isNonTemporal();
2654 bool isInvariant = LD->isInvariant();
2655 const MDNode *TBAAInfo = LD->getTBAAInfo();
2657 int LdWidth = LdVT.getSizeInBits();
2658 int WidthDiff = WidenWidth - LdWidth; // Difference
2659 unsigned LdAlign = (isVolatile) ? 0 : Align; // Allow wider loads
2661 // Find the vector type that can load from.
2662 EVT NewVT = FindMemType(DAG, TLI, LdWidth, WidenVT, LdAlign, WidthDiff);
2663 int NewVTWidth = NewVT.getSizeInBits();
2664 SDValue LdOp = DAG.getLoad(NewVT, dl, Chain, BasePtr, LD->getPointerInfo(),
2665 isVolatile, isNonTemporal, isInvariant, Align,
2667 LdChain.push_back(LdOp.getValue(1));
2669 // Check if we can load the element with one instruction
2670 if (LdWidth <= NewVTWidth) {
2671 if (!NewVT.isVector()) {
2672 unsigned NumElts = WidenWidth / NewVTWidth;
2673 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewVT, NumElts);
2674 SDValue VecOp = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, NewVecVT, LdOp);
2675 return DAG.getNode(ISD::BITCAST, dl, WidenVT, VecOp);
2677 if (NewVT == WidenVT)
2680 assert(WidenWidth % NewVTWidth == 0);
2681 unsigned NumConcat = WidenWidth / NewVTWidth;
2682 SmallVector<SDValue, 16> ConcatOps(NumConcat);
2683 SDValue UndefVal = DAG.getUNDEF(NewVT);
2684 ConcatOps[0] = LdOp;
2685 for (unsigned i = 1; i != NumConcat; ++i)
2686 ConcatOps[i] = UndefVal;
2687 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, ConcatOps);
2690 // Load vector by using multiple loads from largest vector to scalar
2691 SmallVector<SDValue, 16> LdOps;
2692 LdOps.push_back(LdOp);
2694 LdWidth -= NewVTWidth;
2695 unsigned Offset = 0;
2697 while (LdWidth > 0) {
2698 unsigned Increment = NewVTWidth / 8;
2699 Offset += Increment;
2700 BasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr,
2701 DAG.getConstant(Increment, BasePtr.getValueType()));
2704 if (LdWidth < NewVTWidth) {
2705 // Our current type we are using is too large, find a better size
2706 NewVT = FindMemType(DAG, TLI, LdWidth, WidenVT, LdAlign, WidthDiff);
2707 NewVTWidth = NewVT.getSizeInBits();
2708 L = DAG.getLoad(NewVT, dl, Chain, BasePtr,
2709 LD->getPointerInfo().getWithOffset(Offset), isVolatile,
2710 isNonTemporal, isInvariant, MinAlign(Align, Increment),
2712 LdChain.push_back(L.getValue(1));
2713 if (L->getValueType(0).isVector()) {
2714 SmallVector<SDValue, 16> Loads;
2716 unsigned size = L->getValueSizeInBits(0);
2717 while (size < LdOp->getValueSizeInBits(0)) {
2718 Loads.push_back(DAG.getUNDEF(L->getValueType(0)));
2719 size += L->getValueSizeInBits(0);
2721 L = DAG.getNode(ISD::CONCAT_VECTORS, dl, LdOp->getValueType(0), Loads);
2724 L = DAG.getLoad(NewVT, dl, Chain, BasePtr,
2725 LD->getPointerInfo().getWithOffset(Offset), isVolatile,
2726 isNonTemporal, isInvariant, MinAlign(Align, Increment),
2728 LdChain.push_back(L.getValue(1));
2734 LdWidth -= NewVTWidth;
2737 // Build the vector from the loads operations
2738 unsigned End = LdOps.size();
2739 if (!LdOps[0].getValueType().isVector())
2740 // All the loads are scalar loads.
2741 return BuildVectorFromScalar(DAG, WidenVT, LdOps, 0, End);
2743 // If the load contains vectors, build the vector using concat vector.
2744 // All of the vectors used to loads are power of 2 and the scalars load
2745 // can be combined to make a power of 2 vector.
2746 SmallVector<SDValue, 16> ConcatOps(End);
2749 EVT LdTy = LdOps[i].getValueType();
2750 // First combine the scalar loads to a vector
2751 if (!LdTy.isVector()) {
2752 for (--i; i >= 0; --i) {
2753 LdTy = LdOps[i].getValueType();
2754 if (LdTy.isVector())
2757 ConcatOps[--Idx] = BuildVectorFromScalar(DAG, LdTy, LdOps, i+1, End);
2759 ConcatOps[--Idx] = LdOps[i];
2760 for (--i; i >= 0; --i) {
2761 EVT NewLdTy = LdOps[i].getValueType();
2762 if (NewLdTy != LdTy) {
2763 // Create a larger vector
2764 ConcatOps[End-1] = DAG.getNode(ISD::CONCAT_VECTORS, dl, NewLdTy,
2765 makeArrayRef(&ConcatOps[Idx], End - Idx));
2769 ConcatOps[--Idx] = LdOps[i];
2772 if (WidenWidth == LdTy.getSizeInBits()*(End - Idx))
2773 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT,
2774 makeArrayRef(&ConcatOps[Idx], End - Idx));
2776 // We need to fill the rest with undefs to build the vector
2777 unsigned NumOps = WidenWidth / LdTy.getSizeInBits();
2778 SmallVector<SDValue, 16> WidenOps(NumOps);
2779 SDValue UndefVal = DAG.getUNDEF(LdTy);
2782 for (; i != End-Idx; ++i)
2783 WidenOps[i] = ConcatOps[Idx+i];
2784 for (; i != NumOps; ++i)
2785 WidenOps[i] = UndefVal;
2787 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, WidenOps);
2791 DAGTypeLegalizer::GenWidenVectorExtLoads(SmallVectorImpl<SDValue> &LdChain,
2793 ISD::LoadExtType ExtType) {
2794 // For extension loads, it may not be more efficient to chop up the vector
2795 // and then extended it. Instead, we unroll the load and build a new vector.
2796 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(),LD->getValueType(0));
2797 EVT LdVT = LD->getMemoryVT();
2799 assert(LdVT.isVector() && WidenVT.isVector());
2802 SDValue Chain = LD->getChain();
2803 SDValue BasePtr = LD->getBasePtr();
2804 unsigned Align = LD->getAlignment();
2805 bool isVolatile = LD->isVolatile();
2806 bool isNonTemporal = LD->isNonTemporal();
2807 const MDNode *TBAAInfo = LD->getTBAAInfo();
2809 EVT EltVT = WidenVT.getVectorElementType();
2810 EVT LdEltVT = LdVT.getVectorElementType();
2811 unsigned NumElts = LdVT.getVectorNumElements();
2813 // Load each element and widen
2814 unsigned WidenNumElts = WidenVT.getVectorNumElements();
2815 SmallVector<SDValue, 16> Ops(WidenNumElts);
2816 unsigned Increment = LdEltVT.getSizeInBits() / 8;
2817 Ops[0] = DAG.getExtLoad(ExtType, dl, EltVT, Chain, BasePtr,
2818 LD->getPointerInfo(),
2819 LdEltVT, isVolatile, isNonTemporal, Align, TBAAInfo);
2820 LdChain.push_back(Ops[0].getValue(1));
2821 unsigned i = 0, Offset = Increment;
2822 for (i=1; i < NumElts; ++i, Offset += Increment) {
2823 SDValue NewBasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(),
2825 DAG.getConstant(Offset,
2826 BasePtr.getValueType()));
2827 Ops[i] = DAG.getExtLoad(ExtType, dl, EltVT, Chain, NewBasePtr,
2828 LD->getPointerInfo().getWithOffset(Offset), LdEltVT,
2829 isVolatile, isNonTemporal, Align, TBAAInfo);
2830 LdChain.push_back(Ops[i].getValue(1));
2833 // Fill the rest with undefs
2834 SDValue UndefVal = DAG.getUNDEF(EltVT);
2835 for (; i != WidenNumElts; ++i)
2838 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, Ops);
2842 void DAGTypeLegalizer::GenWidenVectorStores(SmallVectorImpl<SDValue> &StChain,
2844 // The strategy assumes that we can efficiently store powers of two widths.
2845 // The routines chops the vector into the largest vector stores with the same
2846 // element type or scalar stores.
2847 SDValue Chain = ST->getChain();
2848 SDValue BasePtr = ST->getBasePtr();
2849 unsigned Align = ST->getAlignment();
2850 bool isVolatile = ST->isVolatile();
2851 bool isNonTemporal = ST->isNonTemporal();
2852 const MDNode *TBAAInfo = ST->getTBAAInfo();
2853 SDValue ValOp = GetWidenedVector(ST->getValue());
2856 EVT StVT = ST->getMemoryVT();
2857 unsigned StWidth = StVT.getSizeInBits();
2858 EVT ValVT = ValOp.getValueType();
2859 unsigned ValWidth = ValVT.getSizeInBits();
2860 EVT ValEltVT = ValVT.getVectorElementType();
2861 unsigned ValEltWidth = ValEltVT.getSizeInBits();
2862 assert(StVT.getVectorElementType() == ValEltVT);
2864 int Idx = 0; // current index to store
2865 unsigned Offset = 0; // offset from base to store
2866 while (StWidth != 0) {
2867 // Find the largest vector type we can store with
2868 EVT NewVT = FindMemType(DAG, TLI, StWidth, ValVT);
2869 unsigned NewVTWidth = NewVT.getSizeInBits();
2870 unsigned Increment = NewVTWidth / 8;
2871 if (NewVT.isVector()) {
2872 unsigned NumVTElts = NewVT.getVectorNumElements();
2874 SDValue EOp = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, NewVT, ValOp,
2875 DAG.getConstant(Idx, TLI.getVectorIdxTy()));
2876 StChain.push_back(DAG.getStore(Chain, dl, EOp, BasePtr,
2877 ST->getPointerInfo().getWithOffset(Offset),
2878 isVolatile, isNonTemporal,
2879 MinAlign(Align, Offset), TBAAInfo));
2880 StWidth -= NewVTWidth;
2881 Offset += Increment;
2883 BasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr,
2884 DAG.getConstant(Increment, BasePtr.getValueType()));
2885 } while (StWidth != 0 && StWidth >= NewVTWidth);
2887 // Cast the vector to the scalar type we can store
2888 unsigned NumElts = ValWidth / NewVTWidth;
2889 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewVT, NumElts);
2890 SDValue VecOp = DAG.getNode(ISD::BITCAST, dl, NewVecVT, ValOp);
2891 // Readjust index position based on new vector type
2892 Idx = Idx * ValEltWidth / NewVTWidth;
2894 SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NewVT, VecOp,
2895 DAG.getConstant(Idx++, TLI.getVectorIdxTy()));
2896 StChain.push_back(DAG.getStore(Chain, dl, EOp, BasePtr,
2897 ST->getPointerInfo().getWithOffset(Offset),
2898 isVolatile, isNonTemporal,
2899 MinAlign(Align, Offset), TBAAInfo));
2900 StWidth -= NewVTWidth;
2901 Offset += Increment;
2902 BasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr,
2903 DAG.getConstant(Increment, BasePtr.getValueType()));
2904 } while (StWidth != 0 && StWidth >= NewVTWidth);
2905 // Restore index back to be relative to the original widen element type
2906 Idx = Idx * NewVTWidth / ValEltWidth;
2912 DAGTypeLegalizer::GenWidenVectorTruncStores(SmallVectorImpl<SDValue> &StChain,
2914 // For extension loads, it may not be more efficient to truncate the vector
2915 // and then store it. Instead, we extract each element and then store it.
2916 SDValue Chain = ST->getChain();
2917 SDValue BasePtr = ST->getBasePtr();
2918 unsigned Align = ST->getAlignment();
2919 bool isVolatile = ST->isVolatile();
2920 bool isNonTemporal = ST->isNonTemporal();
2921 const MDNode *TBAAInfo = ST->getTBAAInfo();
2922 SDValue ValOp = GetWidenedVector(ST->getValue());
2925 EVT StVT = ST->getMemoryVT();
2926 EVT ValVT = ValOp.getValueType();
2928 // It must be true that we the widen vector type is bigger than where
2929 // we need to store.
2930 assert(StVT.isVector() && ValOp.getValueType().isVector());
2931 assert(StVT.bitsLT(ValOp.getValueType()));
2933 // For truncating stores, we can not play the tricks of chopping legal
2934 // vector types and bit cast it to the right type. Instead, we unroll
2936 EVT StEltVT = StVT.getVectorElementType();
2937 EVT ValEltVT = ValVT.getVectorElementType();
2938 unsigned Increment = ValEltVT.getSizeInBits() / 8;
2939 unsigned NumElts = StVT.getVectorNumElements();
2940 SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ValEltVT, ValOp,
2941 DAG.getConstant(0, TLI.getVectorIdxTy()));
2942 StChain.push_back(DAG.getTruncStore(Chain, dl, EOp, BasePtr,
2943 ST->getPointerInfo(), StEltVT,
2944 isVolatile, isNonTemporal, Align,
2946 unsigned Offset = Increment;
2947 for (unsigned i=1; i < NumElts; ++i, Offset += Increment) {
2948 SDValue NewBasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(),
2949 BasePtr, DAG.getConstant(Offset,
2950 BasePtr.getValueType()));
2951 SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ValEltVT, ValOp,
2952 DAG.getConstant(0, TLI.getVectorIdxTy()));
2953 StChain.push_back(DAG.getTruncStore(Chain, dl, EOp, NewBasePtr,
2954 ST->getPointerInfo().getWithOffset(Offset),
2955 StEltVT, isVolatile, isNonTemporal,
2956 MinAlign(Align, Offset), TBAAInfo));
2960 /// Modifies a vector input (widen or narrows) to a vector of NVT. The
2961 /// input vector must have the same element type as NVT.
2962 SDValue DAGTypeLegalizer::ModifyToType(SDValue InOp, EVT NVT) {
2963 // Note that InOp might have been widened so it might already have
2964 // the right width or it might need be narrowed.
2965 EVT InVT = InOp.getValueType();
2966 assert(InVT.getVectorElementType() == NVT.getVectorElementType() &&
2967 "input and widen element type must match");
2970 // Check if InOp already has the right width.
2974 unsigned InNumElts = InVT.getVectorNumElements();
2975 unsigned WidenNumElts = NVT.getVectorNumElements();
2976 if (WidenNumElts > InNumElts && WidenNumElts % InNumElts == 0) {
2977 unsigned NumConcat = WidenNumElts / InNumElts;
2978 SmallVector<SDValue, 16> Ops(NumConcat);
2979 SDValue UndefVal = DAG.getUNDEF(InVT);
2981 for (unsigned i = 1; i != NumConcat; ++i)
2984 return DAG.getNode(ISD::CONCAT_VECTORS, dl, NVT, Ops);
2987 if (WidenNumElts < InNumElts && InNumElts % WidenNumElts)
2988 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, NVT, InOp,
2989 DAG.getConstant(0, TLI.getVectorIdxTy()));
2991 // Fall back to extract and build.
2992 SmallVector<SDValue, 16> Ops(WidenNumElts);
2993 EVT EltVT = NVT.getVectorElementType();
2994 unsigned MinNumElts = std::min(WidenNumElts, InNumElts);
2996 for (Idx = 0; Idx < MinNumElts; ++Idx)
2997 Ops[Idx] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
2998 DAG.getConstant(Idx, TLI.getVectorIdxTy()));
3000 SDValue UndefVal = DAG.getUNDEF(EltVT);
3001 for ( ; Idx < WidenNumElts; ++Idx)
3002 Ops[Idx] = UndefVal;
3003 return DAG.getNode(ISD::BUILD_VECTOR, dl, NVT, Ops);