1 //===------- LegalizeVectorTypes.cpp - Legalization of vector types -------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file performs vector type splitting and scalarization for LegalizeTypes.
11 // Scalarization is the act of changing a computation in an illegal one-element
12 // vector type to be a computation in its scalar element type. For example,
13 // implementing <1 x f32> arithmetic in a scalar f32 register. This is needed
14 // as a base case when scalarizing vector arithmetic like <4 x f32>, which
15 // eventually decomposes to scalars if the target doesn't support v4f32 or v2f32
17 // Splitting is the act of changing a computation in an invalid vector type to
18 // be a computation in two vectors of half the size. For example, implementing
19 // <128 x f32> operations in terms of two <64 x f32> operations.
21 //===----------------------------------------------------------------------===//
23 #include "LegalizeTypes.h"
24 #include "llvm/Target/TargetData.h"
25 #include "llvm/Support/ErrorHandling.h"
26 #include "llvm/Support/raw_ostream.h"
29 //===----------------------------------------------------------------------===//
30 // Result Vector Scalarization: <1 x ty> -> ty.
31 //===----------------------------------------------------------------------===//
33 void DAGTypeLegalizer::ScalarizeVectorResult(SDNode *N, unsigned ResNo) {
34 DEBUG(dbgs() << "Scalarize node result " << ResNo << ": ";
37 SDValue R = SDValue();
39 switch (N->getOpcode()) {
42 dbgs() << "ScalarizeVectorResult #" << ResNo << ": ";
46 report_fatal_error("Do not know how to scalarize the result of this "
49 case ISD::MERGE_VALUES: R = ScalarizeVecRes_MERGE_VALUES(N, ResNo);break;
50 case ISD::BITCAST: R = ScalarizeVecRes_BITCAST(N); break;
51 case ISD::BUILD_VECTOR: R = N->getOperand(0); break;
52 case ISD::CONVERT_RNDSAT: R = ScalarizeVecRes_CONVERT_RNDSAT(N); break;
53 case ISD::EXTRACT_SUBVECTOR: R = ScalarizeVecRes_EXTRACT_SUBVECTOR(N); break;
54 case ISD::FP_ROUND: R = ScalarizeVecRes_FP_ROUND(N); break;
55 case ISD::FP_ROUND_INREG: R = ScalarizeVecRes_InregOp(N); break;
56 case ISD::FPOWI: R = ScalarizeVecRes_FPOWI(N); break;
57 case ISD::INSERT_VECTOR_ELT: R = ScalarizeVecRes_INSERT_VECTOR_ELT(N); break;
58 case ISD::LOAD: R = ScalarizeVecRes_LOAD(cast<LoadSDNode>(N));break;
59 case ISD::SCALAR_TO_VECTOR: R = ScalarizeVecRes_SCALAR_TO_VECTOR(N); break;
60 case ISD::SIGN_EXTEND_INREG: R = ScalarizeVecRes_InregOp(N); break;
61 case ISD::SELECT: R = ScalarizeVecRes_SELECT(N); break;
62 case ISD::SELECT_CC: R = ScalarizeVecRes_SELECT_CC(N); break;
63 case ISD::SETCC: R = ScalarizeVecRes_SETCC(N); break;
64 case ISD::UNDEF: R = ScalarizeVecRes_UNDEF(N); break;
65 case ISD::VECTOR_SHUFFLE: R = ScalarizeVecRes_VECTOR_SHUFFLE(N); break;
88 case ISD::SIGN_EXTEND:
92 case ISD::ZERO_EXTEND:
93 R = ScalarizeVecRes_UnaryOp(N);
115 R = ScalarizeVecRes_BinOp(N);
119 // If R is null, the sub-method took care of registering the result.
121 SetScalarizedVector(SDValue(N, ResNo), R);
124 SDValue DAGTypeLegalizer::ScalarizeVecRes_BinOp(SDNode *N) {
125 SDValue LHS = GetScalarizedVector(N->getOperand(0));
126 SDValue RHS = GetScalarizedVector(N->getOperand(1));
127 return DAG.getNode(N->getOpcode(), N->getDebugLoc(),
128 LHS.getValueType(), LHS, RHS);
131 SDValue DAGTypeLegalizer::ScalarizeVecRes_MERGE_VALUES(SDNode *N,
133 SDValue Op = DisintegrateMERGE_VALUES(N, ResNo);
134 return GetScalarizedVector(Op);
137 SDValue DAGTypeLegalizer::ScalarizeVecRes_BITCAST(SDNode *N) {
138 EVT NewVT = N->getValueType(0).getVectorElementType();
139 return DAG.getNode(ISD::BITCAST, N->getDebugLoc(),
140 NewVT, N->getOperand(0));
143 SDValue DAGTypeLegalizer::ScalarizeVecRes_CONVERT_RNDSAT(SDNode *N) {
144 EVT NewVT = N->getValueType(0).getVectorElementType();
145 SDValue Op0 = GetScalarizedVector(N->getOperand(0));
146 return DAG.getConvertRndSat(NewVT, N->getDebugLoc(),
147 Op0, DAG.getValueType(NewVT),
148 DAG.getValueType(Op0.getValueType()),
151 cast<CvtRndSatSDNode>(N)->getCvtCode());
154 SDValue DAGTypeLegalizer::ScalarizeVecRes_EXTRACT_SUBVECTOR(SDNode *N) {
155 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, N->getDebugLoc(),
156 N->getValueType(0).getVectorElementType(),
157 N->getOperand(0), N->getOperand(1));
160 SDValue DAGTypeLegalizer::ScalarizeVecRes_FP_ROUND(SDNode *N) {
161 EVT NewVT = N->getValueType(0).getVectorElementType();
162 SDValue Op = GetScalarizedVector(N->getOperand(0));
163 return DAG.getNode(ISD::FP_ROUND, N->getDebugLoc(),
164 NewVT, Op, N->getOperand(1));
167 SDValue DAGTypeLegalizer::ScalarizeVecRes_FPOWI(SDNode *N) {
168 SDValue Op = GetScalarizedVector(N->getOperand(0));
169 return DAG.getNode(ISD::FPOWI, N->getDebugLoc(),
170 Op.getValueType(), Op, N->getOperand(1));
173 SDValue DAGTypeLegalizer::ScalarizeVecRes_INSERT_VECTOR_ELT(SDNode *N) {
174 // The value to insert may have a wider type than the vector element type,
175 // so be sure to truncate it to the element type if necessary.
176 SDValue Op = N->getOperand(1);
177 EVT EltVT = N->getValueType(0).getVectorElementType();
178 if (Op.getValueType() != EltVT)
179 // FIXME: Can this happen for floating point types?
180 Op = DAG.getNode(ISD::TRUNCATE, N->getDebugLoc(), EltVT, Op);
184 SDValue DAGTypeLegalizer::ScalarizeVecRes_LOAD(LoadSDNode *N) {
185 assert(N->isUnindexed() && "Indexed vector load?");
187 SDValue Result = DAG.getLoad(ISD::UNINDEXED,
188 N->getExtensionType(),
189 N->getValueType(0).getVectorElementType(),
191 N->getChain(), N->getBasePtr(),
192 DAG.getUNDEF(N->getBasePtr().getValueType()),
194 N->getMemoryVT().getVectorElementType(),
195 N->isVolatile(), N->isNonTemporal(),
196 N->isInvariant(), N->getOriginalAlignment());
198 // Legalized the chain result - switch anything that used the old chain to
200 ReplaceValueWith(SDValue(N, 1), Result.getValue(1));
204 SDValue DAGTypeLegalizer::ScalarizeVecRes_UnaryOp(SDNode *N) {
205 // Get the dest type - it doesn't always match the input type, e.g. int_to_fp.
206 EVT DestVT = N->getValueType(0).getVectorElementType();
207 SDValue Op = GetScalarizedVector(N->getOperand(0));
208 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), DestVT, Op);
211 SDValue DAGTypeLegalizer::ScalarizeVecRes_InregOp(SDNode *N) {
212 EVT EltVT = N->getValueType(0).getVectorElementType();
213 EVT ExtVT = cast<VTSDNode>(N->getOperand(1))->getVT().getVectorElementType();
214 SDValue LHS = GetScalarizedVector(N->getOperand(0));
215 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), EltVT,
216 LHS, DAG.getValueType(ExtVT));
219 SDValue DAGTypeLegalizer::ScalarizeVecRes_SCALAR_TO_VECTOR(SDNode *N) {
220 // If the operand is wider than the vector element type then it is implicitly
221 // truncated. Make that explicit here.
222 EVT EltVT = N->getValueType(0).getVectorElementType();
223 SDValue InOp = N->getOperand(0);
224 if (InOp.getValueType() != EltVT)
225 return DAG.getNode(ISD::TRUNCATE, N->getDebugLoc(), EltVT, InOp);
229 SDValue DAGTypeLegalizer::ScalarizeVecRes_SELECT(SDNode *N) {
230 SDValue LHS = GetScalarizedVector(N->getOperand(1));
231 return DAG.getNode(ISD::SELECT, N->getDebugLoc(),
232 LHS.getValueType(), N->getOperand(0), LHS,
233 GetScalarizedVector(N->getOperand(2)));
236 SDValue DAGTypeLegalizer::ScalarizeVecRes_SELECT_CC(SDNode *N) {
237 SDValue LHS = GetScalarizedVector(N->getOperand(2));
238 return DAG.getNode(ISD::SELECT_CC, N->getDebugLoc(), LHS.getValueType(),
239 N->getOperand(0), N->getOperand(1),
240 LHS, GetScalarizedVector(N->getOperand(3)),
244 SDValue DAGTypeLegalizer::ScalarizeVecRes_SETCC(SDNode *N) {
245 assert(N->getValueType(0).isVector() ==
246 N->getOperand(0).getValueType().isVector() &&
247 "Scalar/Vector type mismatch");
249 if (N->getValueType(0).isVector()) return ScalarizeVecRes_VSETCC(N);
251 SDValue LHS = GetScalarizedVector(N->getOperand(0));
252 SDValue RHS = GetScalarizedVector(N->getOperand(1));
253 DebugLoc DL = N->getDebugLoc();
255 // Turn it into a scalar SETCC.
256 return DAG.getNode(ISD::SETCC, DL, MVT::i1, LHS, RHS, N->getOperand(2));
259 SDValue DAGTypeLegalizer::ScalarizeVecRes_UNDEF(SDNode *N) {
260 return DAG.getUNDEF(N->getValueType(0).getVectorElementType());
263 SDValue DAGTypeLegalizer::ScalarizeVecRes_VECTOR_SHUFFLE(SDNode *N) {
264 // Figure out if the scalar is the LHS or RHS and return it.
265 SDValue Arg = N->getOperand(2).getOperand(0);
266 if (Arg.getOpcode() == ISD::UNDEF)
267 return DAG.getUNDEF(N->getValueType(0).getVectorElementType());
268 unsigned Op = !cast<ConstantSDNode>(Arg)->isNullValue();
269 return GetScalarizedVector(N->getOperand(Op));
272 SDValue DAGTypeLegalizer::ScalarizeVecRes_VSETCC(SDNode *N) {
273 assert(N->getValueType(0).isVector() &&
274 N->getOperand(0).getValueType().isVector() &&
275 "Operand types must be vectors");
277 SDValue LHS = GetScalarizedVector(N->getOperand(0));
278 SDValue RHS = GetScalarizedVector(N->getOperand(1));
279 EVT NVT = N->getValueType(0).getVectorElementType();
280 DebugLoc DL = N->getDebugLoc();
282 // Turn it into a scalar SETCC.
283 SDValue Res = DAG.getNode(ISD::SETCC, DL, MVT::i1, LHS, RHS,
285 // Vectors may have a different boolean contents to scalars. Promote the
286 // value appropriately.
287 ISD::NodeType ExtendCode =
288 TargetLowering::getExtendForContent(TLI.getBooleanContents(true));
289 return DAG.getNode(ExtendCode, DL, NVT, Res);
293 //===----------------------------------------------------------------------===//
294 // Operand Vector Scalarization <1 x ty> -> ty.
295 //===----------------------------------------------------------------------===//
297 bool DAGTypeLegalizer::ScalarizeVectorOperand(SDNode *N, unsigned OpNo) {
298 DEBUG(dbgs() << "Scalarize node operand " << OpNo << ": ";
301 SDValue Res = SDValue();
303 if (Res.getNode() == 0) {
304 switch (N->getOpcode()) {
307 dbgs() << "ScalarizeVectorOperand Op #" << OpNo << ": ";
311 llvm_unreachable("Do not know how to scalarize this operator's operand!");
313 Res = ScalarizeVecOp_BITCAST(N);
315 case ISD::CONCAT_VECTORS:
316 Res = ScalarizeVecOp_CONCAT_VECTORS(N);
318 case ISD::EXTRACT_VECTOR_ELT:
319 Res = ScalarizeVecOp_EXTRACT_VECTOR_ELT(N);
322 Res = ScalarizeVecOp_STORE(cast<StoreSDNode>(N), OpNo);
327 // If the result is null, the sub-method took care of registering results etc.
328 if (!Res.getNode()) return false;
330 // If the result is N, the sub-method updated N in place. Tell the legalizer
332 if (Res.getNode() == N)
335 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
336 "Invalid operand expansion");
338 ReplaceValueWith(SDValue(N, 0), Res);
342 /// ScalarizeVecOp_BITCAST - If the value to convert is a vector that needs
343 /// to be scalarized, it must be <1 x ty>. Convert the element instead.
344 SDValue DAGTypeLegalizer::ScalarizeVecOp_BITCAST(SDNode *N) {
345 SDValue Elt = GetScalarizedVector(N->getOperand(0));
346 return DAG.getNode(ISD::BITCAST, N->getDebugLoc(),
347 N->getValueType(0), Elt);
350 /// ScalarizeVecOp_CONCAT_VECTORS - The vectors to concatenate have length one -
351 /// use a BUILD_VECTOR instead.
352 SDValue DAGTypeLegalizer::ScalarizeVecOp_CONCAT_VECTORS(SDNode *N) {
353 SmallVector<SDValue, 8> Ops(N->getNumOperands());
354 for (unsigned i = 0, e = N->getNumOperands(); i < e; ++i)
355 Ops[i] = GetScalarizedVector(N->getOperand(i));
356 return DAG.getNode(ISD::BUILD_VECTOR, N->getDebugLoc(), N->getValueType(0),
357 &Ops[0], Ops.size());
360 /// ScalarizeVecOp_EXTRACT_VECTOR_ELT - If the input is a vector that needs to
361 /// be scalarized, it must be <1 x ty>, so just return the element, ignoring the
363 SDValue DAGTypeLegalizer::ScalarizeVecOp_EXTRACT_VECTOR_ELT(SDNode *N) {
364 SDValue Res = GetScalarizedVector(N->getOperand(0));
365 if (Res.getValueType() != N->getValueType(0))
366 Res = DAG.getNode(ISD::ANY_EXTEND, N->getDebugLoc(), N->getValueType(0),
371 /// ScalarizeVecOp_STORE - If the value to store is a vector that needs to be
372 /// scalarized, it must be <1 x ty>. Just store the element.
373 SDValue DAGTypeLegalizer::ScalarizeVecOp_STORE(StoreSDNode *N, unsigned OpNo){
374 assert(N->isUnindexed() && "Indexed store of one-element vector?");
375 assert(OpNo == 1 && "Do not know how to scalarize this operand!");
376 DebugLoc dl = N->getDebugLoc();
378 if (N->isTruncatingStore())
379 return DAG.getTruncStore(N->getChain(), dl,
380 GetScalarizedVector(N->getOperand(1)),
381 N->getBasePtr(), N->getPointerInfo(),
382 N->getMemoryVT().getVectorElementType(),
383 N->isVolatile(), N->isNonTemporal(),
386 return DAG.getStore(N->getChain(), dl, GetScalarizedVector(N->getOperand(1)),
387 N->getBasePtr(), N->getPointerInfo(),
388 N->isVolatile(), N->isNonTemporal(),
389 N->getOriginalAlignment());
393 //===----------------------------------------------------------------------===//
394 // Result Vector Splitting
395 //===----------------------------------------------------------------------===//
397 /// SplitVectorResult - This method is called when the specified result of the
398 /// specified node is found to need vector splitting. At this point, the node
399 /// may also have invalid operands or may have other results that need
400 /// legalization, we just know that (at least) one result needs vector
402 void DAGTypeLegalizer::SplitVectorResult(SDNode *N, unsigned ResNo) {
403 DEBUG(dbgs() << "Split node result: ";
408 switch (N->getOpcode()) {
411 dbgs() << "SplitVectorResult #" << ResNo << ": ";
415 llvm_unreachable("Do not know how to split the result of this operator!");
417 case ISD::MERGE_VALUES: SplitRes_MERGE_VALUES(N, ResNo, Lo, Hi); break;
419 case ISD::SELECT: SplitRes_SELECT(N, Lo, Hi); break;
420 case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break;
421 case ISD::UNDEF: SplitRes_UNDEF(N, Lo, Hi); break;
422 case ISD::BITCAST: SplitVecRes_BITCAST(N, Lo, Hi); break;
423 case ISD::BUILD_VECTOR: SplitVecRes_BUILD_VECTOR(N, Lo, Hi); break;
424 case ISD::CONCAT_VECTORS: SplitVecRes_CONCAT_VECTORS(N, Lo, Hi); break;
425 case ISD::EXTRACT_SUBVECTOR: SplitVecRes_EXTRACT_SUBVECTOR(N, Lo, Hi); break;
426 case ISD::FP_ROUND_INREG: SplitVecRes_InregOp(N, Lo, Hi); break;
427 case ISD::FPOWI: SplitVecRes_FPOWI(N, Lo, Hi); break;
428 case ISD::INSERT_VECTOR_ELT: SplitVecRes_INSERT_VECTOR_ELT(N, Lo, Hi); break;
429 case ISD::SCALAR_TO_VECTOR: SplitVecRes_SCALAR_TO_VECTOR(N, Lo, Hi); break;
430 case ISD::SIGN_EXTEND_INREG: SplitVecRes_InregOp(N, Lo, Hi); break;
432 SplitVecRes_LOAD(cast<LoadSDNode>(N), Lo, Hi);
435 SplitVecRes_SETCC(N, Lo, Hi);
437 case ISD::VECTOR_SHUFFLE:
438 SplitVecRes_VECTOR_SHUFFLE(cast<ShuffleVectorSDNode>(N), Lo, Hi);
441 case ISD::ANY_EXTEND:
442 case ISD::CONVERT_RNDSAT:
445 case ISD::CTLZ_ZERO_UNDEF:
446 case ISD::CTTZ_ZERO_UNDEF:
457 case ISD::FNEARBYINT:
461 case ISD::FP_TO_SINT:
462 case ISD::FP_TO_UINT:
467 case ISD::SIGN_EXTEND:
468 case ISD::SINT_TO_FP:
470 case ISD::UINT_TO_FP:
471 case ISD::ZERO_EXTEND:
472 SplitVecRes_UnaryOp(N, Lo, Hi);
494 SplitVecRes_BinOp(N, Lo, Hi);
498 // If Lo/Hi is null, the sub-method took care of registering results etc.
500 SetSplitVector(SDValue(N, ResNo), Lo, Hi);
503 void DAGTypeLegalizer::SplitVecRes_BinOp(SDNode *N, SDValue &Lo,
505 SDValue LHSLo, LHSHi;
506 GetSplitVector(N->getOperand(0), LHSLo, LHSHi);
507 SDValue RHSLo, RHSHi;
508 GetSplitVector(N->getOperand(1), RHSLo, RHSHi);
509 DebugLoc dl = N->getDebugLoc();
511 Lo = DAG.getNode(N->getOpcode(), dl, LHSLo.getValueType(), LHSLo, RHSLo);
512 Hi = DAG.getNode(N->getOpcode(), dl, LHSHi.getValueType(), LHSHi, RHSHi);
515 void DAGTypeLegalizer::SplitVecRes_BITCAST(SDNode *N, SDValue &Lo,
517 // We know the result is a vector. The input may be either a vector or a
520 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
521 DebugLoc dl = N->getDebugLoc();
523 SDValue InOp = N->getOperand(0);
524 EVT InVT = InOp.getValueType();
526 // Handle some special cases efficiently.
527 switch (getTypeAction(InVT)) {
528 case TargetLowering::TypeLegal:
529 case TargetLowering::TypePromoteInteger:
530 case TargetLowering::TypeSoftenFloat:
531 case TargetLowering::TypeScalarizeVector:
532 case TargetLowering::TypeWidenVector:
534 case TargetLowering::TypeExpandInteger:
535 case TargetLowering::TypeExpandFloat:
536 // A scalar to vector conversion, where the scalar needs expansion.
537 // If the vector is being split in two then we can just convert the
540 GetExpandedOp(InOp, Lo, Hi);
541 if (TLI.isBigEndian())
543 Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo);
544 Hi = DAG.getNode(ISD::BITCAST, dl, HiVT, Hi);
548 case TargetLowering::TypeSplitVector:
549 // If the input is a vector that needs to be split, convert each split
550 // piece of the input now.
551 GetSplitVector(InOp, Lo, Hi);
552 Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo);
553 Hi = DAG.getNode(ISD::BITCAST, dl, HiVT, Hi);
557 // In the general case, convert the input to an integer and split it by hand.
558 EVT LoIntVT = EVT::getIntegerVT(*DAG.getContext(), LoVT.getSizeInBits());
559 EVT HiIntVT = EVT::getIntegerVT(*DAG.getContext(), HiVT.getSizeInBits());
560 if (TLI.isBigEndian())
561 std::swap(LoIntVT, HiIntVT);
563 SplitInteger(BitConvertToInteger(InOp), LoIntVT, HiIntVT, Lo, Hi);
565 if (TLI.isBigEndian())
567 Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo);
568 Hi = DAG.getNode(ISD::BITCAST, dl, HiVT, Hi);
571 void DAGTypeLegalizer::SplitVecRes_BUILD_VECTOR(SDNode *N, SDValue &Lo,
574 DebugLoc dl = N->getDebugLoc();
575 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
576 unsigned LoNumElts = LoVT.getVectorNumElements();
577 SmallVector<SDValue, 8> LoOps(N->op_begin(), N->op_begin()+LoNumElts);
578 Lo = DAG.getNode(ISD::BUILD_VECTOR, dl, LoVT, &LoOps[0], LoOps.size());
580 SmallVector<SDValue, 8> HiOps(N->op_begin()+LoNumElts, N->op_end());
581 Hi = DAG.getNode(ISD::BUILD_VECTOR, dl, HiVT, &HiOps[0], HiOps.size());
584 void DAGTypeLegalizer::SplitVecRes_CONCAT_VECTORS(SDNode *N, SDValue &Lo,
586 assert(!(N->getNumOperands() & 1) && "Unsupported CONCAT_VECTORS");
587 DebugLoc dl = N->getDebugLoc();
588 unsigned NumSubvectors = N->getNumOperands() / 2;
589 if (NumSubvectors == 1) {
590 Lo = N->getOperand(0);
591 Hi = N->getOperand(1);
596 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
598 SmallVector<SDValue, 8> LoOps(N->op_begin(), N->op_begin()+NumSubvectors);
599 Lo = DAG.getNode(ISD::CONCAT_VECTORS, dl, LoVT, &LoOps[0], LoOps.size());
601 SmallVector<SDValue, 8> HiOps(N->op_begin()+NumSubvectors, N->op_end());
602 Hi = DAG.getNode(ISD::CONCAT_VECTORS, dl, HiVT, &HiOps[0], HiOps.size());
605 void DAGTypeLegalizer::SplitVecRes_EXTRACT_SUBVECTOR(SDNode *N, SDValue &Lo,
607 SDValue Vec = N->getOperand(0);
608 SDValue Idx = N->getOperand(1);
609 DebugLoc dl = N->getDebugLoc();
612 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
614 Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, LoVT, Vec, Idx);
615 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
616 Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, HiVT, Vec,
617 DAG.getIntPtrConstant(IdxVal + LoVT.getVectorNumElements()));
620 void DAGTypeLegalizer::SplitVecRes_FPOWI(SDNode *N, SDValue &Lo,
622 DebugLoc dl = N->getDebugLoc();
623 GetSplitVector(N->getOperand(0), Lo, Hi);
624 Lo = DAG.getNode(ISD::FPOWI, dl, Lo.getValueType(), Lo, N->getOperand(1));
625 Hi = DAG.getNode(ISD::FPOWI, dl, Hi.getValueType(), Hi, N->getOperand(1));
628 void DAGTypeLegalizer::SplitVecRes_InregOp(SDNode *N, SDValue &Lo,
630 SDValue LHSLo, LHSHi;
631 GetSplitVector(N->getOperand(0), LHSLo, LHSHi);
632 DebugLoc dl = N->getDebugLoc();
635 GetSplitDestVTs(cast<VTSDNode>(N->getOperand(1))->getVT(), LoVT, HiVT);
637 Lo = DAG.getNode(N->getOpcode(), dl, LHSLo.getValueType(), LHSLo,
638 DAG.getValueType(LoVT));
639 Hi = DAG.getNode(N->getOpcode(), dl, LHSHi.getValueType(), LHSHi,
640 DAG.getValueType(HiVT));
643 void DAGTypeLegalizer::SplitVecRes_INSERT_VECTOR_ELT(SDNode *N, SDValue &Lo,
645 SDValue Vec = N->getOperand(0);
646 SDValue Elt = N->getOperand(1);
647 SDValue Idx = N->getOperand(2);
648 DebugLoc dl = N->getDebugLoc();
649 GetSplitVector(Vec, Lo, Hi);
651 if (ConstantSDNode *CIdx = dyn_cast<ConstantSDNode>(Idx)) {
652 unsigned IdxVal = CIdx->getZExtValue();
653 unsigned LoNumElts = Lo.getValueType().getVectorNumElements();
654 if (IdxVal < LoNumElts)
655 Lo = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl,
656 Lo.getValueType(), Lo, Elt, Idx);
658 Hi = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, Hi.getValueType(), Hi, Elt,
659 DAG.getIntPtrConstant(IdxVal - LoNumElts));
663 // Spill the vector to the stack.
664 EVT VecVT = Vec.getValueType();
665 EVT EltVT = VecVT.getVectorElementType();
666 SDValue StackPtr = DAG.CreateStackTemporary(VecVT);
667 SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, Vec, StackPtr,
668 MachinePointerInfo(), false, false, 0);
670 // Store the new element. This may be larger than the vector element type,
671 // so use a truncating store.
672 SDValue EltPtr = GetVectorElementPointer(StackPtr, EltVT, Idx);
673 Type *VecType = VecVT.getTypeForEVT(*DAG.getContext());
675 TLI.getTargetData()->getPrefTypeAlignment(VecType);
676 Store = DAG.getTruncStore(Store, dl, Elt, EltPtr, MachinePointerInfo(), EltVT,
679 // Load the Lo part from the stack slot.
680 Lo = DAG.getLoad(Lo.getValueType(), dl, Store, StackPtr, MachinePointerInfo(),
681 false, false, false, 0);
683 // Increment the pointer to the other part.
684 unsigned IncrementSize = Lo.getValueType().getSizeInBits() / 8;
685 StackPtr = DAG.getNode(ISD::ADD, dl, StackPtr.getValueType(), StackPtr,
686 DAG.getIntPtrConstant(IncrementSize));
688 // Load the Hi part from the stack slot.
689 Hi = DAG.getLoad(Hi.getValueType(), dl, Store, StackPtr, MachinePointerInfo(),
690 false, false, false, MinAlign(Alignment, IncrementSize));
693 void DAGTypeLegalizer::SplitVecRes_SCALAR_TO_VECTOR(SDNode *N, SDValue &Lo,
696 DebugLoc dl = N->getDebugLoc();
697 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
698 Lo = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, LoVT, N->getOperand(0));
699 Hi = DAG.getUNDEF(HiVT);
702 void DAGTypeLegalizer::SplitVecRes_LOAD(LoadSDNode *LD, SDValue &Lo,
704 assert(ISD::isUNINDEXEDLoad(LD) && "Indexed load during type legalization!");
706 DebugLoc dl = LD->getDebugLoc();
707 GetSplitDestVTs(LD->getValueType(0), LoVT, HiVT);
709 ISD::LoadExtType ExtType = LD->getExtensionType();
710 SDValue Ch = LD->getChain();
711 SDValue Ptr = LD->getBasePtr();
712 SDValue Offset = DAG.getUNDEF(Ptr.getValueType());
713 EVT MemoryVT = LD->getMemoryVT();
714 unsigned Alignment = LD->getOriginalAlignment();
715 bool isVolatile = LD->isVolatile();
716 bool isNonTemporal = LD->isNonTemporal();
717 bool isInvariant = LD->isInvariant();
719 EVT LoMemVT, HiMemVT;
720 GetSplitDestVTs(MemoryVT, LoMemVT, HiMemVT);
722 Lo = DAG.getLoad(ISD::UNINDEXED, ExtType, LoVT, dl, Ch, Ptr, Offset,
723 LD->getPointerInfo(), LoMemVT, isVolatile, isNonTemporal,
724 isInvariant, Alignment);
726 unsigned IncrementSize = LoMemVT.getSizeInBits()/8;
727 Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr,
728 DAG.getIntPtrConstant(IncrementSize));
729 Hi = DAG.getLoad(ISD::UNINDEXED, ExtType, HiVT, dl, Ch, Ptr, Offset,
730 LD->getPointerInfo().getWithOffset(IncrementSize),
731 HiMemVT, isVolatile, isNonTemporal, isInvariant, Alignment);
733 // Build a factor node to remember that this load is independent of the
735 Ch = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Lo.getValue(1),
738 // Legalized the chain result - switch anything that used the old chain to
740 ReplaceValueWith(SDValue(LD, 1), Ch);
743 void DAGTypeLegalizer::SplitVecRes_SETCC(SDNode *N, SDValue &Lo, SDValue &Hi) {
744 assert(N->getValueType(0).isVector() &&
745 N->getOperand(0).getValueType().isVector() &&
746 "Operand types must be vectors");
749 DebugLoc DL = N->getDebugLoc();
750 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
753 EVT InVT = N->getOperand(0).getValueType();
754 SDValue LL, LH, RL, RH;
755 EVT InNVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(),
756 LoVT.getVectorNumElements());
757 LL = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(0),
758 DAG.getIntPtrConstant(0));
759 LH = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(0),
760 DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
762 RL = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(1),
763 DAG.getIntPtrConstant(0));
764 RH = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(1),
765 DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
767 Lo = DAG.getNode(N->getOpcode(), DL, LoVT, LL, RL, N->getOperand(2));
768 Hi = DAG.getNode(N->getOpcode(), DL, HiVT, LH, RH, N->getOperand(2));
771 void DAGTypeLegalizer::SplitVecRes_UnaryOp(SDNode *N, SDValue &Lo,
773 // Get the dest types - they may not match the input types, e.g. int_to_fp.
775 DebugLoc dl = N->getDebugLoc();
776 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
778 // If the input also splits, handle it directly for a compile time speedup.
779 // Otherwise split it by hand.
780 EVT InVT = N->getOperand(0).getValueType();
781 if (getTypeAction(InVT) == TargetLowering::TypeSplitVector) {
782 GetSplitVector(N->getOperand(0), Lo, Hi);
784 EVT InNVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(),
785 LoVT.getVectorNumElements());
786 Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, N->getOperand(0),
787 DAG.getIntPtrConstant(0));
788 Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, N->getOperand(0),
789 DAG.getIntPtrConstant(InNVT.getVectorNumElements()));
792 if (N->getOpcode() == ISD::FP_ROUND) {
793 Lo = DAG.getNode(N->getOpcode(), dl, LoVT, Lo, N->getOperand(1));
794 Hi = DAG.getNode(N->getOpcode(), dl, HiVT, Hi, N->getOperand(1));
795 } else if (N->getOpcode() == ISD::CONVERT_RNDSAT) {
796 SDValue DTyOpLo = DAG.getValueType(LoVT);
797 SDValue DTyOpHi = DAG.getValueType(HiVT);
798 SDValue STyOpLo = DAG.getValueType(Lo.getValueType());
799 SDValue STyOpHi = DAG.getValueType(Hi.getValueType());
800 SDValue RndOp = N->getOperand(3);
801 SDValue SatOp = N->getOperand(4);
802 ISD::CvtCode CvtCode = cast<CvtRndSatSDNode>(N)->getCvtCode();
803 Lo = DAG.getConvertRndSat(LoVT, dl, Lo, DTyOpLo, STyOpLo, RndOp, SatOp,
805 Hi = DAG.getConvertRndSat(HiVT, dl, Hi, DTyOpHi, STyOpHi, RndOp, SatOp,
808 Lo = DAG.getNode(N->getOpcode(), dl, LoVT, Lo);
809 Hi = DAG.getNode(N->getOpcode(), dl, HiVT, Hi);
813 void DAGTypeLegalizer::SplitVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N,
814 SDValue &Lo, SDValue &Hi) {
815 // The low and high parts of the original input give four input vectors.
817 DebugLoc dl = N->getDebugLoc();
818 GetSplitVector(N->getOperand(0), Inputs[0], Inputs[1]);
819 GetSplitVector(N->getOperand(1), Inputs[2], Inputs[3]);
820 EVT NewVT = Inputs[0].getValueType();
821 unsigned NewElts = NewVT.getVectorNumElements();
823 // If Lo or Hi uses elements from at most two of the four input vectors, then
824 // express it as a vector shuffle of those two inputs. Otherwise extract the
825 // input elements by hand and construct the Lo/Hi output using a BUILD_VECTOR.
826 SmallVector<int, 16> Ops;
827 for (unsigned High = 0; High < 2; ++High) {
828 SDValue &Output = High ? Hi : Lo;
830 // Build a shuffle mask for the output, discovering on the fly which
831 // input vectors to use as shuffle operands (recorded in InputUsed).
832 // If building a suitable shuffle vector proves too hard, then bail
833 // out with useBuildVector set.
834 unsigned InputUsed[2] = { -1U, -1U }; // Not yet discovered.
835 unsigned FirstMaskIdx = High * NewElts;
836 bool useBuildVector = false;
837 for (unsigned MaskOffset = 0; MaskOffset < NewElts; ++MaskOffset) {
838 // The mask element. This indexes into the input.
839 int Idx = N->getMaskElt(FirstMaskIdx + MaskOffset);
841 // The input vector this mask element indexes into.
842 unsigned Input = (unsigned)Idx / NewElts;
844 if (Input >= array_lengthof(Inputs)) {
845 // The mask element does not index into any input vector.
850 // Turn the index into an offset from the start of the input vector.
851 Idx -= Input * NewElts;
853 // Find or create a shuffle vector operand to hold this input.
855 for (OpNo = 0; OpNo < array_lengthof(InputUsed); ++OpNo) {
856 if (InputUsed[OpNo] == Input) {
857 // This input vector is already an operand.
859 } else if (InputUsed[OpNo] == -1U) {
860 // Create a new operand for this input vector.
861 InputUsed[OpNo] = Input;
866 if (OpNo >= array_lengthof(InputUsed)) {
867 // More than two input vectors used! Give up on trying to create a
868 // shuffle vector. Insert all elements into a BUILD_VECTOR instead.
869 useBuildVector = true;
873 // Add the mask index for the new shuffle vector.
874 Ops.push_back(Idx + OpNo * NewElts);
877 if (useBuildVector) {
878 EVT EltVT = NewVT.getVectorElementType();
879 SmallVector<SDValue, 16> SVOps;
881 // Extract the input elements by hand.
882 for (unsigned MaskOffset = 0; MaskOffset < NewElts; ++MaskOffset) {
883 // The mask element. This indexes into the input.
884 int Idx = N->getMaskElt(FirstMaskIdx + MaskOffset);
886 // The input vector this mask element indexes into.
887 unsigned Input = (unsigned)Idx / NewElts;
889 if (Input >= array_lengthof(Inputs)) {
890 // The mask element is "undef" or indexes off the end of the input.
891 SVOps.push_back(DAG.getUNDEF(EltVT));
895 // Turn the index into an offset from the start of the input vector.
896 Idx -= Input * NewElts;
898 // Extract the vector element by hand.
899 SVOps.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT,
900 Inputs[Input], DAG.getIntPtrConstant(Idx)));
903 // Construct the Lo/Hi output using a BUILD_VECTOR.
904 Output = DAG.getNode(ISD::BUILD_VECTOR,dl,NewVT, &SVOps[0], SVOps.size());
905 } else if (InputUsed[0] == -1U) {
906 // No input vectors were used! The result is undefined.
907 Output = DAG.getUNDEF(NewVT);
909 SDValue Op0 = Inputs[InputUsed[0]];
910 // If only one input was used, use an undefined vector for the other.
911 SDValue Op1 = InputUsed[1] == -1U ?
912 DAG.getUNDEF(NewVT) : Inputs[InputUsed[1]];
913 // At least one input vector was used. Create a new shuffle vector.
914 Output = DAG.getVectorShuffle(NewVT, dl, Op0, Op1, &Ops[0]);
922 //===----------------------------------------------------------------------===//
923 // Operand Vector Splitting
924 //===----------------------------------------------------------------------===//
926 /// SplitVectorOperand - This method is called when the specified operand of the
927 /// specified node is found to need vector splitting. At this point, all of the
928 /// result types of the node are known to be legal, but other operands of the
929 /// node may need legalization as well as the specified one.
930 bool DAGTypeLegalizer::SplitVectorOperand(SDNode *N, unsigned OpNo) {
931 DEBUG(dbgs() << "Split node operand: ";
934 SDValue Res = SDValue();
936 if (Res.getNode() == 0) {
937 switch (N->getOpcode()) {
940 dbgs() << "SplitVectorOperand Op #" << OpNo << ": ";
944 llvm_unreachable("Do not know how to split this operator's operand!");
945 case ISD::SETCC: Res = SplitVecOp_VSETCC(N); break;
946 case ISD::BITCAST: Res = SplitVecOp_BITCAST(N); break;
947 case ISD::EXTRACT_SUBVECTOR: Res = SplitVecOp_EXTRACT_SUBVECTOR(N); break;
948 case ISD::EXTRACT_VECTOR_ELT:Res = SplitVecOp_EXTRACT_VECTOR_ELT(N); break;
949 case ISD::CONCAT_VECTORS: Res = SplitVecOp_CONCAT_VECTORS(N); break;
950 case ISD::FP_ROUND: Res = SplitVecOp_FP_ROUND(N); break;
952 Res = SplitVecOp_STORE(cast<StoreSDNode>(N), OpNo);
959 case ISD::FP_TO_SINT:
960 case ISD::FP_TO_UINT:
961 case ISD::SINT_TO_FP:
962 case ISD::UINT_TO_FP:
965 case ISD::SIGN_EXTEND:
966 case ISD::ZERO_EXTEND:
967 case ISD::ANY_EXTEND:
968 Res = SplitVecOp_UnaryOp(N);
973 // If the result is null, the sub-method took care of registering results etc.
974 if (!Res.getNode()) return false;
976 // If the result is N, the sub-method updated N in place. Tell the legalizer
978 if (Res.getNode() == N)
981 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
982 "Invalid operand expansion");
984 ReplaceValueWith(SDValue(N, 0), Res);
988 SDValue DAGTypeLegalizer::SplitVecOp_UnaryOp(SDNode *N) {
989 // The result has a legal vector type, but the input needs splitting.
990 EVT ResVT = N->getValueType(0);
992 DebugLoc dl = N->getDebugLoc();
993 GetSplitVector(N->getOperand(0), Lo, Hi);
994 EVT InVT = Lo.getValueType();
996 EVT OutVT = EVT::getVectorVT(*DAG.getContext(), ResVT.getVectorElementType(),
997 InVT.getVectorNumElements());
999 Lo = DAG.getNode(N->getOpcode(), dl, OutVT, Lo);
1000 Hi = DAG.getNode(N->getOpcode(), dl, OutVT, Hi);
1002 return DAG.getNode(ISD::CONCAT_VECTORS, dl, ResVT, Lo, Hi);
1005 SDValue DAGTypeLegalizer::SplitVecOp_BITCAST(SDNode *N) {
1006 // For example, i64 = BITCAST v4i16 on alpha. Typically the vector will
1007 // end up being split all the way down to individual components. Convert the
1008 // split pieces into integers and reassemble.
1010 GetSplitVector(N->getOperand(0), Lo, Hi);
1011 Lo = BitConvertToInteger(Lo);
1012 Hi = BitConvertToInteger(Hi);
1014 if (TLI.isBigEndian())
1017 return DAG.getNode(ISD::BITCAST, N->getDebugLoc(), N->getValueType(0),
1018 JoinIntegers(Lo, Hi));
1021 SDValue DAGTypeLegalizer::SplitVecOp_EXTRACT_SUBVECTOR(SDNode *N) {
1022 // We know that the extracted result type is legal.
1023 EVT SubVT = N->getValueType(0);
1024 SDValue Idx = N->getOperand(1);
1025 DebugLoc dl = N->getDebugLoc();
1027 GetSplitVector(N->getOperand(0), Lo, Hi);
1029 uint64_t LoElts = Lo.getValueType().getVectorNumElements();
1030 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
1032 if (IdxVal < LoElts) {
1033 assert(IdxVal + SubVT.getVectorNumElements() <= LoElts &&
1034 "Extracted subvector crosses vector split!");
1035 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, SubVT, Lo, Idx);
1037 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, SubVT, Hi,
1038 DAG.getConstant(IdxVal - LoElts, Idx.getValueType()));
1042 SDValue DAGTypeLegalizer::SplitVecOp_EXTRACT_VECTOR_ELT(SDNode *N) {
1043 SDValue Vec = N->getOperand(0);
1044 SDValue Idx = N->getOperand(1);
1045 EVT VecVT = Vec.getValueType();
1047 if (isa<ConstantSDNode>(Idx)) {
1048 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
1049 assert(IdxVal < VecVT.getVectorNumElements() && "Invalid vector index!");
1052 GetSplitVector(Vec, Lo, Hi);
1054 uint64_t LoElts = Lo.getValueType().getVectorNumElements();
1056 if (IdxVal < LoElts)
1057 return SDValue(DAG.UpdateNodeOperands(N, Lo, Idx), 0);
1058 return SDValue(DAG.UpdateNodeOperands(N, Hi,
1059 DAG.getConstant(IdxVal - LoElts,
1060 Idx.getValueType())), 0);
1063 // Store the vector to the stack.
1064 EVT EltVT = VecVT.getVectorElementType();
1065 DebugLoc dl = N->getDebugLoc();
1066 SDValue StackPtr = DAG.CreateStackTemporary(VecVT);
1067 SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, Vec, StackPtr,
1068 MachinePointerInfo(), false, false, 0);
1070 // Load back the required element.
1071 StackPtr = GetVectorElementPointer(StackPtr, EltVT, Idx);
1072 return DAG.getExtLoad(ISD::EXTLOAD, dl, N->getValueType(0), Store, StackPtr,
1073 MachinePointerInfo(), EltVT, false, false, 0);
1076 SDValue DAGTypeLegalizer::SplitVecOp_STORE(StoreSDNode *N, unsigned OpNo) {
1077 assert(N->isUnindexed() && "Indexed store of vector?");
1078 assert(OpNo == 1 && "Can only split the stored value");
1079 DebugLoc DL = N->getDebugLoc();
1081 bool isTruncating = N->isTruncatingStore();
1082 SDValue Ch = N->getChain();
1083 SDValue Ptr = N->getBasePtr();
1084 EVT MemoryVT = N->getMemoryVT();
1085 unsigned Alignment = N->getOriginalAlignment();
1086 bool isVol = N->isVolatile();
1087 bool isNT = N->isNonTemporal();
1089 GetSplitVector(N->getOperand(1), Lo, Hi);
1091 EVT LoMemVT, HiMemVT;
1092 GetSplitDestVTs(MemoryVT, LoMemVT, HiMemVT);
1094 unsigned IncrementSize = LoMemVT.getSizeInBits()/8;
1097 Lo = DAG.getTruncStore(Ch, DL, Lo, Ptr, N->getPointerInfo(),
1098 LoMemVT, isVol, isNT, Alignment);
1100 Lo = DAG.getStore(Ch, DL, Lo, Ptr, N->getPointerInfo(),
1101 isVol, isNT, Alignment);
1103 // Increment the pointer to the other half.
1104 Ptr = DAG.getNode(ISD::ADD, DL, Ptr.getValueType(), Ptr,
1105 DAG.getIntPtrConstant(IncrementSize));
1108 Hi = DAG.getTruncStore(Ch, DL, Hi, Ptr,
1109 N->getPointerInfo().getWithOffset(IncrementSize),
1110 HiMemVT, isVol, isNT, Alignment);
1112 Hi = DAG.getStore(Ch, DL, Hi, Ptr,
1113 N->getPointerInfo().getWithOffset(IncrementSize),
1114 isVol, isNT, Alignment);
1116 return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Lo, Hi);
1119 SDValue DAGTypeLegalizer::SplitVecOp_CONCAT_VECTORS(SDNode *N) {
1120 DebugLoc DL = N->getDebugLoc();
1122 // The input operands all must have the same type, and we know the result the
1123 // result type is valid. Convert this to a buildvector which extracts all the
1125 // TODO: If the input elements are power-two vectors, we could convert this to
1126 // a new CONCAT_VECTORS node with elements that are half-wide.
1127 SmallVector<SDValue, 32> Elts;
1128 EVT EltVT = N->getValueType(0).getVectorElementType();
1129 for (unsigned op = 0, e = N->getNumOperands(); op != e; ++op) {
1130 SDValue Op = N->getOperand(op);
1131 for (unsigned i = 0, e = Op.getValueType().getVectorNumElements();
1133 Elts.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, EltVT,
1134 Op, DAG.getIntPtrConstant(i)));
1139 return DAG.getNode(ISD::BUILD_VECTOR, DL, N->getValueType(0),
1140 &Elts[0], Elts.size());
1143 SDValue DAGTypeLegalizer::SplitVecOp_VSETCC(SDNode *N) {
1144 assert(N->getValueType(0).isVector() &&
1145 N->getOperand(0).getValueType().isVector() &&
1146 "Operand types must be vectors");
1147 // The result has a legal vector type, but the input needs splitting.
1148 SDValue Lo0, Hi0, Lo1, Hi1, LoRes, HiRes;
1149 DebugLoc DL = N->getDebugLoc();
1150 GetSplitVector(N->getOperand(0), Lo0, Hi0);
1151 GetSplitVector(N->getOperand(1), Lo1, Hi1);
1152 unsigned PartElements = Lo0.getValueType().getVectorNumElements();
1153 EVT PartResVT = EVT::getVectorVT(*DAG.getContext(), MVT::i1, PartElements);
1154 EVT WideResVT = EVT::getVectorVT(*DAG.getContext(), MVT::i1, 2*PartElements);
1156 LoRes = DAG.getNode(ISD::SETCC, DL, PartResVT, Lo0, Lo1, N->getOperand(2));
1157 HiRes = DAG.getNode(ISD::SETCC, DL, PartResVT, Hi0, Hi1, N->getOperand(2));
1158 SDValue Con = DAG.getNode(ISD::CONCAT_VECTORS, DL, WideResVT, LoRes, HiRes);
1159 return PromoteTargetBoolean(Con, N->getValueType(0));
1163 SDValue DAGTypeLegalizer::SplitVecOp_FP_ROUND(SDNode *N) {
1164 // The result has a legal vector type, but the input needs splitting.
1165 EVT ResVT = N->getValueType(0);
1167 DebugLoc DL = N->getDebugLoc();
1168 GetSplitVector(N->getOperand(0), Lo, Hi);
1169 EVT InVT = Lo.getValueType();
1171 EVT OutVT = EVT::getVectorVT(*DAG.getContext(), ResVT.getVectorElementType(),
1172 InVT.getVectorNumElements());
1174 Lo = DAG.getNode(ISD::FP_ROUND, DL, OutVT, Lo, N->getOperand(1));
1175 Hi = DAG.getNode(ISD::FP_ROUND, DL, OutVT, Hi, N->getOperand(1));
1177 return DAG.getNode(ISD::CONCAT_VECTORS, DL, ResVT, Lo, Hi);
1182 //===----------------------------------------------------------------------===//
1183 // Result Vector Widening
1184 //===----------------------------------------------------------------------===//
1186 void DAGTypeLegalizer::WidenVectorResult(SDNode *N, unsigned ResNo) {
1187 DEBUG(dbgs() << "Widen node result " << ResNo << ": ";
1191 // See if the target wants to custom widen this node.
1192 if (CustomWidenLowerNode(N, N->getValueType(ResNo)))
1195 SDValue Res = SDValue();
1196 switch (N->getOpcode()) {
1199 dbgs() << "WidenVectorResult #" << ResNo << ": ";
1203 llvm_unreachable("Do not know how to widen the result of this operator!");
1205 case ISD::MERGE_VALUES: Res = WidenVecRes_MERGE_VALUES(N, ResNo); break;
1206 case ISD::BITCAST: Res = WidenVecRes_BITCAST(N); break;
1207 case ISD::BUILD_VECTOR: Res = WidenVecRes_BUILD_VECTOR(N); break;
1208 case ISD::CONCAT_VECTORS: Res = WidenVecRes_CONCAT_VECTORS(N); break;
1209 case ISD::CONVERT_RNDSAT: Res = WidenVecRes_CONVERT_RNDSAT(N); break;
1210 case ISD::EXTRACT_SUBVECTOR: Res = WidenVecRes_EXTRACT_SUBVECTOR(N); break;
1211 case ISD::FP_ROUND_INREG: Res = WidenVecRes_InregOp(N); break;
1212 case ISD::INSERT_VECTOR_ELT: Res = WidenVecRes_INSERT_VECTOR_ELT(N); break;
1213 case ISD::LOAD: Res = WidenVecRes_LOAD(N); break;
1214 case ISD::SCALAR_TO_VECTOR: Res = WidenVecRes_SCALAR_TO_VECTOR(N); break;
1215 case ISD::SIGN_EXTEND_INREG: Res = WidenVecRes_InregOp(N); break;
1217 case ISD::SELECT: Res = WidenVecRes_SELECT(N); break;
1218 case ISD::SELECT_CC: Res = WidenVecRes_SELECT_CC(N); break;
1219 case ISD::SETCC: Res = WidenVecRes_SETCC(N); break;
1220 case ISD::UNDEF: Res = WidenVecRes_UNDEF(N); break;
1221 case ISD::VECTOR_SHUFFLE:
1222 Res = WidenVecRes_VECTOR_SHUFFLE(cast<ShuffleVectorSDNode>(N));
1228 case ISD::FCOPYSIGN:
1244 Res = WidenVecRes_Binary(N);
1248 Res = WidenVecRes_POWI(N);
1254 Res = WidenVecRes_Shift(N);
1257 case ISD::ANY_EXTEND:
1258 case ISD::FP_EXTEND:
1260 case ISD::FP_TO_SINT:
1261 case ISD::FP_TO_UINT:
1262 case ISD::SIGN_EXTEND:
1263 case ISD::SINT_TO_FP:
1265 case ISD::UINT_TO_FP:
1266 case ISD::ZERO_EXTEND:
1267 Res = WidenVecRes_Convert(N);
1282 case ISD::FNEARBYINT:
1288 Res = WidenVecRes_Unary(N);
1292 // If Res is null, the sub-method took care of registering the result.
1294 SetWidenedVector(SDValue(N, ResNo), Res);
1297 SDValue DAGTypeLegalizer::WidenVecRes_Binary(SDNode *N) {
1298 // Binary op widening.
1299 unsigned Opcode = N->getOpcode();
1300 DebugLoc dl = N->getDebugLoc();
1301 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1302 EVT WidenEltVT = WidenVT.getVectorElementType();
1304 unsigned NumElts = VT.getVectorNumElements();
1305 while (!TLI.isTypeLegal(VT) && NumElts != 1) {
1306 NumElts = NumElts / 2;
1307 VT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NumElts);
1310 if (NumElts != 1 && !TLI.canOpTrap(N->getOpcode(), VT)) {
1311 // Operation doesn't trap so just widen as normal.
1312 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
1313 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1314 return DAG.getNode(N->getOpcode(), dl, WidenVT, InOp1, InOp2);
1317 // No legal vector version so unroll the vector operation and then widen.
1319 return DAG.UnrollVectorOp(N, WidenVT.getVectorNumElements());
1321 // Since the operation can trap, apply operation on the original vector.
1323 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
1324 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1325 unsigned CurNumElts = N->getValueType(0).getVectorNumElements();
1327 SmallVector<SDValue, 16> ConcatOps(CurNumElts);
1328 unsigned ConcatEnd = 0; // Current ConcatOps index.
1329 int Idx = 0; // Current Idx into input vectors.
1331 // NumElts := greatest legal vector size (at most WidenVT)
1332 // while (orig. vector has unhandled elements) {
1333 // take munches of size NumElts from the beginning and add to ConcatOps
1334 // NumElts := next smaller supported vector size or 1
1336 while (CurNumElts != 0) {
1337 while (CurNumElts >= NumElts) {
1338 SDValue EOp1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, InOp1,
1339 DAG.getIntPtrConstant(Idx));
1340 SDValue EOp2 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, InOp2,
1341 DAG.getIntPtrConstant(Idx));
1342 ConcatOps[ConcatEnd++] = DAG.getNode(Opcode, dl, VT, EOp1, EOp2);
1344 CurNumElts -= NumElts;
1347 NumElts = NumElts / 2;
1348 VT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NumElts);
1349 } while (!TLI.isTypeLegal(VT) && NumElts != 1);
1352 for (unsigned i = 0; i != CurNumElts; ++i, ++Idx) {
1353 SDValue EOp1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, WidenEltVT,
1354 InOp1, DAG.getIntPtrConstant(Idx));
1355 SDValue EOp2 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, WidenEltVT,
1356 InOp2, DAG.getIntPtrConstant(Idx));
1357 ConcatOps[ConcatEnd++] = DAG.getNode(Opcode, dl, WidenEltVT,
1364 // Check to see if we have a single operation with the widen type.
1365 if (ConcatEnd == 1) {
1366 VT = ConcatOps[0].getValueType();
1368 return ConcatOps[0];
1371 // while (Some element of ConcatOps is not of type MaxVT) {
1372 // From the end of ConcatOps, collect elements of the same type and put
1373 // them into an op of the next larger supported type
1375 while (ConcatOps[ConcatEnd-1].getValueType() != MaxVT) {
1376 Idx = ConcatEnd - 1;
1377 VT = ConcatOps[Idx--].getValueType();
1378 while (Idx >= 0 && ConcatOps[Idx].getValueType() == VT)
1381 int NextSize = VT.isVector() ? VT.getVectorNumElements() : 1;
1385 NextVT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NextSize);
1386 } while (!TLI.isTypeLegal(NextVT));
1388 if (!VT.isVector()) {
1389 // Scalar type, create an INSERT_VECTOR_ELEMENT of type NextVT
1390 SDValue VecOp = DAG.getUNDEF(NextVT);
1391 unsigned NumToInsert = ConcatEnd - Idx - 1;
1392 for (unsigned i = 0, OpIdx = Idx+1; i < NumToInsert; i++, OpIdx++) {
1393 VecOp = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NextVT, VecOp,
1394 ConcatOps[OpIdx], DAG.getIntPtrConstant(i));
1396 ConcatOps[Idx+1] = VecOp;
1397 ConcatEnd = Idx + 2;
1399 // Vector type, create a CONCAT_VECTORS of type NextVT
1400 SDValue undefVec = DAG.getUNDEF(VT);
1401 unsigned OpsToConcat = NextSize/VT.getVectorNumElements();
1402 SmallVector<SDValue, 16> SubConcatOps(OpsToConcat);
1403 unsigned RealVals = ConcatEnd - Idx - 1;
1404 unsigned SubConcatEnd = 0;
1405 unsigned SubConcatIdx = Idx + 1;
1406 while (SubConcatEnd < RealVals)
1407 SubConcatOps[SubConcatEnd++] = ConcatOps[++Idx];
1408 while (SubConcatEnd < OpsToConcat)
1409 SubConcatOps[SubConcatEnd++] = undefVec;
1410 ConcatOps[SubConcatIdx] = DAG.getNode(ISD::CONCAT_VECTORS, dl,
1411 NextVT, &SubConcatOps[0],
1413 ConcatEnd = SubConcatIdx + 1;
1417 // Check to see if we have a single operation with the widen type.
1418 if (ConcatEnd == 1) {
1419 VT = ConcatOps[0].getValueType();
1421 return ConcatOps[0];
1424 // add undefs of size MaxVT until ConcatOps grows to length of WidenVT
1425 unsigned NumOps = WidenVT.getVectorNumElements()/MaxVT.getVectorNumElements();
1426 if (NumOps != ConcatEnd ) {
1427 SDValue UndefVal = DAG.getUNDEF(MaxVT);
1428 for (unsigned j = ConcatEnd; j < NumOps; ++j)
1429 ConcatOps[j] = UndefVal;
1431 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &ConcatOps[0], NumOps);
1434 SDValue DAGTypeLegalizer::WidenVecRes_Convert(SDNode *N) {
1435 SDValue InOp = N->getOperand(0);
1436 DebugLoc DL = N->getDebugLoc();
1438 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1439 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1441 EVT InVT = InOp.getValueType();
1442 EVT InEltVT = InVT.getVectorElementType();
1443 EVT InWidenVT = EVT::getVectorVT(*DAG.getContext(), InEltVT, WidenNumElts);
1445 unsigned Opcode = N->getOpcode();
1446 unsigned InVTNumElts = InVT.getVectorNumElements();
1448 if (getTypeAction(InVT) == TargetLowering::TypeWidenVector) {
1449 InOp = GetWidenedVector(N->getOperand(0));
1450 InVT = InOp.getValueType();
1451 InVTNumElts = InVT.getVectorNumElements();
1452 if (InVTNumElts == WidenNumElts) {
1453 if (N->getNumOperands() == 1)
1454 return DAG.getNode(Opcode, DL, WidenVT, InOp);
1455 return DAG.getNode(Opcode, DL, WidenVT, InOp, N->getOperand(1));
1459 if (TLI.isTypeLegal(InWidenVT)) {
1460 // Because the result and the input are different vector types, widening
1461 // the result could create a legal type but widening the input might make
1462 // it an illegal type that might lead to repeatedly splitting the input
1463 // and then widening it. To avoid this, we widen the input only if
1464 // it results in a legal type.
1465 if (WidenNumElts % InVTNumElts == 0) {
1466 // Widen the input and call convert on the widened input vector.
1467 unsigned NumConcat = WidenNumElts/InVTNumElts;
1468 SmallVector<SDValue, 16> Ops(NumConcat);
1470 SDValue UndefVal = DAG.getUNDEF(InVT);
1471 for (unsigned i = 1; i != NumConcat; ++i)
1473 SDValue InVec = DAG.getNode(ISD::CONCAT_VECTORS, DL, InWidenVT,
1474 &Ops[0], NumConcat);
1475 if (N->getNumOperands() == 1)
1476 return DAG.getNode(Opcode, DL, WidenVT, InVec);
1477 return DAG.getNode(Opcode, DL, WidenVT, InVec, N->getOperand(1));
1480 if (InVTNumElts % WidenNumElts == 0) {
1481 SDValue InVal = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InWidenVT,
1482 InOp, DAG.getIntPtrConstant(0));
1483 // Extract the input and convert the shorten input vector.
1484 if (N->getNumOperands() == 1)
1485 return DAG.getNode(Opcode, DL, WidenVT, InVal);
1486 return DAG.getNode(Opcode, DL, WidenVT, InVal, N->getOperand(1));
1490 // Otherwise unroll into some nasty scalar code and rebuild the vector.
1491 SmallVector<SDValue, 16> Ops(WidenNumElts);
1492 EVT EltVT = WidenVT.getVectorElementType();
1493 unsigned MinElts = std::min(InVTNumElts, WidenNumElts);
1495 for (i=0; i < MinElts; ++i) {
1496 SDValue Val = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, InEltVT, InOp,
1497 DAG.getIntPtrConstant(i));
1498 if (N->getNumOperands() == 1)
1499 Ops[i] = DAG.getNode(Opcode, DL, EltVT, Val);
1501 Ops[i] = DAG.getNode(Opcode, DL, EltVT, Val, N->getOperand(1));
1504 SDValue UndefVal = DAG.getUNDEF(EltVT);
1505 for (; i < WidenNumElts; ++i)
1508 return DAG.getNode(ISD::BUILD_VECTOR, DL, WidenVT, &Ops[0], WidenNumElts);
1511 SDValue DAGTypeLegalizer::WidenVecRes_POWI(SDNode *N) {
1512 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1513 SDValue InOp = GetWidenedVector(N->getOperand(0));
1514 SDValue ShOp = N->getOperand(1);
1515 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), WidenVT, InOp, ShOp);
1518 SDValue DAGTypeLegalizer::WidenVecRes_Shift(SDNode *N) {
1519 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1520 SDValue InOp = GetWidenedVector(N->getOperand(0));
1521 SDValue ShOp = N->getOperand(1);
1523 EVT ShVT = ShOp.getValueType();
1524 if (getTypeAction(ShVT) == TargetLowering::TypeWidenVector) {
1525 ShOp = GetWidenedVector(ShOp);
1526 ShVT = ShOp.getValueType();
1528 EVT ShWidenVT = EVT::getVectorVT(*DAG.getContext(),
1529 ShVT.getVectorElementType(),
1530 WidenVT.getVectorNumElements());
1531 if (ShVT != ShWidenVT)
1532 ShOp = ModifyToType(ShOp, ShWidenVT);
1534 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), WidenVT, InOp, ShOp);
1537 SDValue DAGTypeLegalizer::WidenVecRes_Unary(SDNode *N) {
1538 // Unary op widening.
1539 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1540 SDValue InOp = GetWidenedVector(N->getOperand(0));
1541 return DAG.getNode(N->getOpcode(), N->getDebugLoc(), WidenVT, InOp);
1544 SDValue DAGTypeLegalizer::WidenVecRes_InregOp(SDNode *N) {
1545 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1546 EVT ExtVT = EVT::getVectorVT(*DAG.getContext(),
1547 cast<VTSDNode>(N->getOperand(1))->getVT()
1548 .getVectorElementType(),
1549 WidenVT.getVectorNumElements());
1550 SDValue WidenLHS = GetWidenedVector(N->getOperand(0));
1551 return DAG.getNode(N->getOpcode(), N->getDebugLoc(),
1552 WidenVT, WidenLHS, DAG.getValueType(ExtVT));
1555 SDValue DAGTypeLegalizer::WidenVecRes_MERGE_VALUES(SDNode *N, unsigned ResNo) {
1556 SDValue WidenVec = DisintegrateMERGE_VALUES(N, ResNo);
1557 return GetWidenedVector(WidenVec);
1560 SDValue DAGTypeLegalizer::WidenVecRes_BITCAST(SDNode *N) {
1561 SDValue InOp = N->getOperand(0);
1562 EVT InVT = InOp.getValueType();
1563 EVT VT = N->getValueType(0);
1564 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1565 DebugLoc dl = N->getDebugLoc();
1567 switch (getTypeAction(InVT)) {
1568 case TargetLowering::TypeLegal:
1570 case TargetLowering::TypePromoteInteger:
1571 // If the incoming type is a vector that is being promoted, then
1572 // we know that the elements are arranged differently and that we
1573 // must perform the conversion using a stack slot.
1574 if (InVT.isVector())
1577 // If the InOp is promoted to the same size, convert it. Otherwise,
1578 // fall out of the switch and widen the promoted input.
1579 InOp = GetPromotedInteger(InOp);
1580 InVT = InOp.getValueType();
1581 if (WidenVT.bitsEq(InVT))
1582 return DAG.getNode(ISD::BITCAST, dl, WidenVT, InOp);
1584 case TargetLowering::TypeSoftenFloat:
1585 case TargetLowering::TypeExpandInteger:
1586 case TargetLowering::TypeExpandFloat:
1587 case TargetLowering::TypeScalarizeVector:
1588 case TargetLowering::TypeSplitVector:
1590 case TargetLowering::TypeWidenVector:
1591 // If the InOp is widened to the same size, convert it. Otherwise, fall
1592 // out of the switch and widen the widened input.
1593 InOp = GetWidenedVector(InOp);
1594 InVT = InOp.getValueType();
1595 if (WidenVT.bitsEq(InVT))
1596 // The input widens to the same size. Convert to the widen value.
1597 return DAG.getNode(ISD::BITCAST, dl, WidenVT, InOp);
1601 unsigned WidenSize = WidenVT.getSizeInBits();
1602 unsigned InSize = InVT.getSizeInBits();
1603 // x86mmx is not an acceptable vector element type, so don't try.
1604 if (WidenSize % InSize == 0 && InVT != MVT::x86mmx) {
1605 // Determine new input vector type. The new input vector type will use
1606 // the same element type (if its a vector) or use the input type as a
1607 // vector. It is the same size as the type to widen to.
1609 unsigned NewNumElts = WidenSize / InSize;
1610 if (InVT.isVector()) {
1611 EVT InEltVT = InVT.getVectorElementType();
1612 NewInVT = EVT::getVectorVT(*DAG.getContext(), InEltVT,
1613 WidenSize / InEltVT.getSizeInBits());
1615 NewInVT = EVT::getVectorVT(*DAG.getContext(), InVT, NewNumElts);
1618 if (TLI.isTypeLegal(NewInVT)) {
1619 // Because the result and the input are different vector types, widening
1620 // the result could create a legal type but widening the input might make
1621 // it an illegal type that might lead to repeatedly splitting the input
1622 // and then widening it. To avoid this, we widen the input only if
1623 // it results in a legal type.
1624 SmallVector<SDValue, 16> Ops(NewNumElts);
1625 SDValue UndefVal = DAG.getUNDEF(InVT);
1627 for (unsigned i = 1; i < NewNumElts; ++i)
1631 if (InVT.isVector())
1632 NewVec = DAG.getNode(ISD::CONCAT_VECTORS, dl,
1633 NewInVT, &Ops[0], NewNumElts);
1635 NewVec = DAG.getNode(ISD::BUILD_VECTOR, dl,
1636 NewInVT, &Ops[0], NewNumElts);
1637 return DAG.getNode(ISD::BITCAST, dl, WidenVT, NewVec);
1641 return CreateStackStoreLoad(InOp, WidenVT);
1644 SDValue DAGTypeLegalizer::WidenVecRes_BUILD_VECTOR(SDNode *N) {
1645 DebugLoc dl = N->getDebugLoc();
1646 // Build a vector with undefined for the new nodes.
1647 EVT VT = N->getValueType(0);
1648 EVT EltVT = VT.getVectorElementType();
1649 unsigned NumElts = VT.getVectorNumElements();
1651 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1652 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1654 SmallVector<SDValue, 16> NewOps(N->op_begin(), N->op_end());
1655 NewOps.reserve(WidenNumElts);
1656 for (unsigned i = NumElts; i < WidenNumElts; ++i)
1657 NewOps.push_back(DAG.getUNDEF(EltVT));
1659 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &NewOps[0], NewOps.size());
1662 SDValue DAGTypeLegalizer::WidenVecRes_CONCAT_VECTORS(SDNode *N) {
1663 EVT InVT = N->getOperand(0).getValueType();
1664 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1665 DebugLoc dl = N->getDebugLoc();
1666 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1667 unsigned NumInElts = InVT.getVectorNumElements();
1668 unsigned NumOperands = N->getNumOperands();
1670 bool InputWidened = false; // Indicates we need to widen the input.
1671 if (getTypeAction(InVT) != TargetLowering::TypeWidenVector) {
1672 if (WidenVT.getVectorNumElements() % InVT.getVectorNumElements() == 0) {
1673 // Add undef vectors to widen to correct length.
1674 unsigned NumConcat = WidenVT.getVectorNumElements() /
1675 InVT.getVectorNumElements();
1676 SDValue UndefVal = DAG.getUNDEF(InVT);
1677 SmallVector<SDValue, 16> Ops(NumConcat);
1678 for (unsigned i=0; i < NumOperands; ++i)
1679 Ops[i] = N->getOperand(i);
1680 for (unsigned i = NumOperands; i != NumConcat; ++i)
1682 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &Ops[0], NumConcat);
1685 InputWidened = true;
1686 if (WidenVT == TLI.getTypeToTransformTo(*DAG.getContext(), InVT)) {
1687 // The inputs and the result are widen to the same value.
1689 for (i=1; i < NumOperands; ++i)
1690 if (N->getOperand(i).getOpcode() != ISD::UNDEF)
1693 if (i == NumOperands)
1694 // Everything but the first operand is an UNDEF so just return the
1695 // widened first operand.
1696 return GetWidenedVector(N->getOperand(0));
1698 if (NumOperands == 2) {
1699 // Replace concat of two operands with a shuffle.
1700 SmallVector<int, 16> MaskOps(WidenNumElts, -1);
1701 for (unsigned i = 0; i < NumInElts; ++i) {
1703 MaskOps[i + NumInElts] = i + WidenNumElts;
1705 return DAG.getVectorShuffle(WidenVT, dl,
1706 GetWidenedVector(N->getOperand(0)),
1707 GetWidenedVector(N->getOperand(1)),
1713 // Fall back to use extracts and build vector.
1714 EVT EltVT = WidenVT.getVectorElementType();
1715 SmallVector<SDValue, 16> Ops(WidenNumElts);
1717 for (unsigned i=0; i < NumOperands; ++i) {
1718 SDValue InOp = N->getOperand(i);
1720 InOp = GetWidenedVector(InOp);
1721 for (unsigned j=0; j < NumInElts; ++j)
1722 Ops[Idx++] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
1723 DAG.getIntPtrConstant(j));
1725 SDValue UndefVal = DAG.getUNDEF(EltVT);
1726 for (; Idx < WidenNumElts; ++Idx)
1727 Ops[Idx] = UndefVal;
1728 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], WidenNumElts);
1731 SDValue DAGTypeLegalizer::WidenVecRes_CONVERT_RNDSAT(SDNode *N) {
1732 DebugLoc dl = N->getDebugLoc();
1733 SDValue InOp = N->getOperand(0);
1734 SDValue RndOp = N->getOperand(3);
1735 SDValue SatOp = N->getOperand(4);
1737 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1738 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1740 EVT InVT = InOp.getValueType();
1741 EVT InEltVT = InVT.getVectorElementType();
1742 EVT InWidenVT = EVT::getVectorVT(*DAG.getContext(), InEltVT, WidenNumElts);
1744 SDValue DTyOp = DAG.getValueType(WidenVT);
1745 SDValue STyOp = DAG.getValueType(InWidenVT);
1746 ISD::CvtCode CvtCode = cast<CvtRndSatSDNode>(N)->getCvtCode();
1748 unsigned InVTNumElts = InVT.getVectorNumElements();
1749 if (getTypeAction(InVT) == TargetLowering::TypeWidenVector) {
1750 InOp = GetWidenedVector(InOp);
1751 InVT = InOp.getValueType();
1752 InVTNumElts = InVT.getVectorNumElements();
1753 if (InVTNumElts == WidenNumElts)
1754 return DAG.getConvertRndSat(WidenVT, dl, InOp, DTyOp, STyOp, RndOp,
1758 if (TLI.isTypeLegal(InWidenVT)) {
1759 // Because the result and the input are different vector types, widening
1760 // the result could create a legal type but widening the input might make
1761 // it an illegal type that might lead to repeatedly splitting the input
1762 // and then widening it. To avoid this, we widen the input only if
1763 // it results in a legal type.
1764 if (WidenNumElts % InVTNumElts == 0) {
1765 // Widen the input and call convert on the widened input vector.
1766 unsigned NumConcat = WidenNumElts/InVTNumElts;
1767 SmallVector<SDValue, 16> Ops(NumConcat);
1769 SDValue UndefVal = DAG.getUNDEF(InVT);
1770 for (unsigned i = 1; i != NumConcat; ++i)
1773 InOp = DAG.getNode(ISD::CONCAT_VECTORS, dl, InWidenVT, &Ops[0],NumConcat);
1774 return DAG.getConvertRndSat(WidenVT, dl, InOp, DTyOp, STyOp, RndOp,
1778 if (InVTNumElts % WidenNumElts == 0) {
1779 // Extract the input and convert the shorten input vector.
1780 InOp = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InWidenVT, InOp,
1781 DAG.getIntPtrConstant(0));
1782 return DAG.getConvertRndSat(WidenVT, dl, InOp, DTyOp, STyOp, RndOp,
1787 // Otherwise unroll into some nasty scalar code and rebuild the vector.
1788 SmallVector<SDValue, 16> Ops(WidenNumElts);
1789 EVT EltVT = WidenVT.getVectorElementType();
1790 DTyOp = DAG.getValueType(EltVT);
1791 STyOp = DAG.getValueType(InEltVT);
1793 unsigned MinElts = std::min(InVTNumElts, WidenNumElts);
1795 for (i=0; i < MinElts; ++i) {
1796 SDValue ExtVal = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, InEltVT, InOp,
1797 DAG.getIntPtrConstant(i));
1798 Ops[i] = DAG.getConvertRndSat(WidenVT, dl, ExtVal, DTyOp, STyOp, RndOp,
1802 SDValue UndefVal = DAG.getUNDEF(EltVT);
1803 for (; i < WidenNumElts; ++i)
1806 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], WidenNumElts);
1809 SDValue DAGTypeLegalizer::WidenVecRes_EXTRACT_SUBVECTOR(SDNode *N) {
1810 EVT VT = N->getValueType(0);
1811 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1812 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1813 SDValue InOp = N->getOperand(0);
1814 SDValue Idx = N->getOperand(1);
1815 DebugLoc dl = N->getDebugLoc();
1817 if (getTypeAction(InOp.getValueType()) == TargetLowering::TypeWidenVector)
1818 InOp = GetWidenedVector(InOp);
1820 EVT InVT = InOp.getValueType();
1822 // Check if we can just return the input vector after widening.
1823 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
1824 if (IdxVal == 0 && InVT == WidenVT)
1827 // Check if we can extract from the vector.
1828 unsigned InNumElts = InVT.getVectorNumElements();
1829 if (IdxVal % WidenNumElts == 0 && IdxVal + WidenNumElts < InNumElts)
1830 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, WidenVT, InOp, Idx);
1832 // We could try widening the input to the right length but for now, extract
1833 // the original elements, fill the rest with undefs and build a vector.
1834 SmallVector<SDValue, 16> Ops(WidenNumElts);
1835 EVT EltVT = VT.getVectorElementType();
1836 unsigned NumElts = VT.getVectorNumElements();
1838 for (i=0; i < NumElts; ++i)
1839 Ops[i] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
1840 DAG.getIntPtrConstant(IdxVal+i));
1842 SDValue UndefVal = DAG.getUNDEF(EltVT);
1843 for (; i < WidenNumElts; ++i)
1845 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], WidenNumElts);
1848 SDValue DAGTypeLegalizer::WidenVecRes_INSERT_VECTOR_ELT(SDNode *N) {
1849 SDValue InOp = GetWidenedVector(N->getOperand(0));
1850 return DAG.getNode(ISD::INSERT_VECTOR_ELT, N->getDebugLoc(),
1851 InOp.getValueType(), InOp,
1852 N->getOperand(1), N->getOperand(2));
1855 SDValue DAGTypeLegalizer::WidenVecRes_LOAD(SDNode *N) {
1856 LoadSDNode *LD = cast<LoadSDNode>(N);
1857 ISD::LoadExtType ExtType = LD->getExtensionType();
1860 SmallVector<SDValue, 16> LdChain; // Chain for the series of load
1861 if (ExtType != ISD::NON_EXTLOAD)
1862 Result = GenWidenVectorExtLoads(LdChain, LD, ExtType);
1864 Result = GenWidenVectorLoads(LdChain, LD);
1866 // If we generate a single load, we can use that for the chain. Otherwise,
1867 // build a factor node to remember the multiple loads are independent and
1870 if (LdChain.size() == 1)
1871 NewChain = LdChain[0];
1873 NewChain = DAG.getNode(ISD::TokenFactor, LD->getDebugLoc(), MVT::Other,
1874 &LdChain[0], LdChain.size());
1876 // Modified the chain - switch anything that used the old chain to use
1878 ReplaceValueWith(SDValue(N, 1), NewChain);
1883 SDValue DAGTypeLegalizer::WidenVecRes_SCALAR_TO_VECTOR(SDNode *N) {
1884 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1885 return DAG.getNode(ISD::SCALAR_TO_VECTOR, N->getDebugLoc(),
1886 WidenVT, N->getOperand(0));
1889 SDValue DAGTypeLegalizer::WidenVecRes_SELECT(SDNode *N) {
1890 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1891 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1893 SDValue Cond1 = N->getOperand(0);
1894 EVT CondVT = Cond1.getValueType();
1895 if (CondVT.isVector()) {
1896 EVT CondEltVT = CondVT.getVectorElementType();
1897 EVT CondWidenVT = EVT::getVectorVT(*DAG.getContext(),
1898 CondEltVT, WidenNumElts);
1899 if (getTypeAction(CondVT) == TargetLowering::TypeWidenVector)
1900 Cond1 = GetWidenedVector(Cond1);
1902 if (Cond1.getValueType() != CondWidenVT)
1903 Cond1 = ModifyToType(Cond1, CondWidenVT);
1906 SDValue InOp1 = GetWidenedVector(N->getOperand(1));
1907 SDValue InOp2 = GetWidenedVector(N->getOperand(2));
1908 assert(InOp1.getValueType() == WidenVT && InOp2.getValueType() == WidenVT);
1909 return DAG.getNode(N->getOpcode(), N->getDebugLoc(),
1910 WidenVT, Cond1, InOp1, InOp2);
1913 SDValue DAGTypeLegalizer::WidenVecRes_SELECT_CC(SDNode *N) {
1914 SDValue InOp1 = GetWidenedVector(N->getOperand(2));
1915 SDValue InOp2 = GetWidenedVector(N->getOperand(3));
1916 return DAG.getNode(ISD::SELECT_CC, N->getDebugLoc(),
1917 InOp1.getValueType(), N->getOperand(0),
1918 N->getOperand(1), InOp1, InOp2, N->getOperand(4));
1921 SDValue DAGTypeLegalizer::WidenVecRes_SETCC(SDNode *N) {
1922 assert(N->getValueType(0).isVector() ==
1923 N->getOperand(0).getValueType().isVector() &&
1924 "Scalar/Vector type mismatch");
1925 if (N->getValueType(0).isVector()) return WidenVecRes_VSETCC(N);
1927 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1928 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
1929 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1930 return DAG.getNode(ISD::SETCC, N->getDebugLoc(), WidenVT,
1931 InOp1, InOp2, N->getOperand(2));
1934 SDValue DAGTypeLegalizer::WidenVecRes_UNDEF(SDNode *N) {
1935 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1936 return DAG.getUNDEF(WidenVT);
1939 SDValue DAGTypeLegalizer::WidenVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N) {
1940 EVT VT = N->getValueType(0);
1941 DebugLoc dl = N->getDebugLoc();
1943 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1944 unsigned NumElts = VT.getVectorNumElements();
1945 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1947 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
1948 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1950 // Adjust mask based on new input vector length.
1951 SmallVector<int, 16> NewMask;
1952 for (unsigned i = 0; i != NumElts; ++i) {
1953 int Idx = N->getMaskElt(i);
1954 if (Idx < (int)NumElts)
1955 NewMask.push_back(Idx);
1957 NewMask.push_back(Idx - NumElts + WidenNumElts);
1959 for (unsigned i = NumElts; i != WidenNumElts; ++i)
1960 NewMask.push_back(-1);
1961 return DAG.getVectorShuffle(WidenVT, dl, InOp1, InOp2, &NewMask[0]);
1964 SDValue DAGTypeLegalizer::WidenVecRes_VSETCC(SDNode *N) {
1965 assert(N->getValueType(0).isVector() &&
1966 N->getOperand(0).getValueType().isVector() &&
1967 "Operands must be vectors");
1968 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1969 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1971 SDValue InOp1 = N->getOperand(0);
1972 EVT InVT = InOp1.getValueType();
1973 assert(InVT.isVector() && "can not widen non vector type");
1974 EVT WidenInVT = EVT::getVectorVT(*DAG.getContext(),
1975 InVT.getVectorElementType(), WidenNumElts);
1976 InOp1 = GetWidenedVector(InOp1);
1977 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1979 // Assume that the input and output will be widen appropriately. If not,
1980 // we will have to unroll it at some point.
1981 assert(InOp1.getValueType() == WidenInVT &&
1982 InOp2.getValueType() == WidenInVT &&
1983 "Input not widened to expected type!");
1985 return DAG.getNode(ISD::SETCC, N->getDebugLoc(),
1986 WidenVT, InOp1, InOp2, N->getOperand(2));
1990 //===----------------------------------------------------------------------===//
1991 // Widen Vector Operand
1992 //===----------------------------------------------------------------------===//
1993 bool DAGTypeLegalizer::WidenVectorOperand(SDNode *N, unsigned ResNo) {
1994 DEBUG(dbgs() << "Widen node operand " << ResNo << ": ";
1997 SDValue Res = SDValue();
1999 switch (N->getOpcode()) {
2002 dbgs() << "WidenVectorOperand op #" << ResNo << ": ";
2006 llvm_unreachable("Do not know how to widen this operator's operand!");
2008 case ISD::BITCAST: Res = WidenVecOp_BITCAST(N); break;
2009 case ISD::CONCAT_VECTORS: Res = WidenVecOp_CONCAT_VECTORS(N); break;
2010 case ISD::EXTRACT_SUBVECTOR: Res = WidenVecOp_EXTRACT_SUBVECTOR(N); break;
2011 case ISD::EXTRACT_VECTOR_ELT: Res = WidenVecOp_EXTRACT_VECTOR_ELT(N); break;
2012 case ISD::STORE: Res = WidenVecOp_STORE(N); break;
2013 case ISD::SETCC: Res = WidenVecOp_SETCC(N); break;
2015 case ISD::FP_EXTEND:
2016 case ISD::FP_TO_SINT:
2017 case ISD::FP_TO_UINT:
2018 case ISD::SINT_TO_FP:
2019 case ISD::UINT_TO_FP:
2021 case ISD::SIGN_EXTEND:
2022 case ISD::ZERO_EXTEND:
2023 case ISD::ANY_EXTEND:
2024 Res = WidenVecOp_Convert(N);
2028 // If Res is null, the sub-method took care of registering the result.
2029 if (!Res.getNode()) return false;
2031 // If the result is N, the sub-method updated N in place. Tell the legalizer
2033 if (Res.getNode() == N)
2037 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
2038 "Invalid operand expansion");
2040 ReplaceValueWith(SDValue(N, 0), Res);
2044 SDValue DAGTypeLegalizer::WidenVecOp_Convert(SDNode *N) {
2045 // Since the result is legal and the input is illegal, it is unlikely
2046 // that we can fix the input to a legal type so unroll the convert
2047 // into some scalar code and create a nasty build vector.
2048 EVT VT = N->getValueType(0);
2049 EVT EltVT = VT.getVectorElementType();
2050 DebugLoc dl = N->getDebugLoc();
2051 unsigned NumElts = VT.getVectorNumElements();
2052 SDValue InOp = N->getOperand(0);
2053 if (getTypeAction(InOp.getValueType()) == TargetLowering::TypeWidenVector)
2054 InOp = GetWidenedVector(InOp);
2055 EVT InVT = InOp.getValueType();
2056 EVT InEltVT = InVT.getVectorElementType();
2058 unsigned Opcode = N->getOpcode();
2059 SmallVector<SDValue, 16> Ops(NumElts);
2060 for (unsigned i=0; i < NumElts; ++i)
2061 Ops[i] = DAG.getNode(Opcode, dl, EltVT,
2062 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, InEltVT, InOp,
2063 DAG.getIntPtrConstant(i)));
2065 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, &Ops[0], NumElts);
2068 SDValue DAGTypeLegalizer::WidenVecOp_BITCAST(SDNode *N) {
2069 EVT VT = N->getValueType(0);
2070 SDValue InOp = GetWidenedVector(N->getOperand(0));
2071 EVT InWidenVT = InOp.getValueType();
2072 DebugLoc dl = N->getDebugLoc();
2074 // Check if we can convert between two legal vector types and extract.
2075 unsigned InWidenSize = InWidenVT.getSizeInBits();
2076 unsigned Size = VT.getSizeInBits();
2077 // x86mmx is not an acceptable vector element type, so don't try.
2078 if (InWidenSize % Size == 0 && !VT.isVector() && VT != MVT::x86mmx) {
2079 unsigned NewNumElts = InWidenSize / Size;
2080 EVT NewVT = EVT::getVectorVT(*DAG.getContext(), VT, NewNumElts);
2081 if (TLI.isTypeLegal(NewVT)) {
2082 SDValue BitOp = DAG.getNode(ISD::BITCAST, dl, NewVT, InOp);
2083 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, VT, BitOp,
2084 DAG.getIntPtrConstant(0));
2088 return CreateStackStoreLoad(InOp, VT);
2091 SDValue DAGTypeLegalizer::WidenVecOp_CONCAT_VECTORS(SDNode *N) {
2092 // If the input vector is not legal, it is likely that we will not find a
2093 // legal vector of the same size. Replace the concatenate vector with a
2094 // nasty build vector.
2095 EVT VT = N->getValueType(0);
2096 EVT EltVT = VT.getVectorElementType();
2097 DebugLoc dl = N->getDebugLoc();
2098 unsigned NumElts = VT.getVectorNumElements();
2099 SmallVector<SDValue, 16> Ops(NumElts);
2101 EVT InVT = N->getOperand(0).getValueType();
2102 unsigned NumInElts = InVT.getVectorNumElements();
2105 unsigned NumOperands = N->getNumOperands();
2106 for (unsigned i=0; i < NumOperands; ++i) {
2107 SDValue InOp = N->getOperand(i);
2108 if (getTypeAction(InOp.getValueType()) == TargetLowering::TypeWidenVector)
2109 InOp = GetWidenedVector(InOp);
2110 for (unsigned j=0; j < NumInElts; ++j)
2111 Ops[Idx++] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
2112 DAG.getIntPtrConstant(j));
2114 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, &Ops[0], NumElts);
2117 SDValue DAGTypeLegalizer::WidenVecOp_EXTRACT_SUBVECTOR(SDNode *N) {
2118 SDValue InOp = GetWidenedVector(N->getOperand(0));
2119 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, N->getDebugLoc(),
2120 N->getValueType(0), InOp, N->getOperand(1));
2123 SDValue DAGTypeLegalizer::WidenVecOp_EXTRACT_VECTOR_ELT(SDNode *N) {
2124 SDValue InOp = GetWidenedVector(N->getOperand(0));
2125 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, N->getDebugLoc(),
2126 N->getValueType(0), InOp, N->getOperand(1));
2129 SDValue DAGTypeLegalizer::WidenVecOp_STORE(SDNode *N) {
2130 // We have to widen the value but we want only to store the original
2132 StoreSDNode *ST = cast<StoreSDNode>(N);
2134 SmallVector<SDValue, 16> StChain;
2135 if (ST->isTruncatingStore())
2136 GenWidenVectorTruncStores(StChain, ST);
2138 GenWidenVectorStores(StChain, ST);
2140 if (StChain.size() == 1)
2143 return DAG.getNode(ISD::TokenFactor, ST->getDebugLoc(),
2144 MVT::Other,&StChain[0],StChain.size());
2147 SDValue DAGTypeLegalizer::WidenVecOp_SETCC(SDNode *N) {
2148 SDValue InOp0 = GetWidenedVector(N->getOperand(0));
2149 SDValue InOp1 = GetWidenedVector(N->getOperand(1));
2150 DebugLoc dl = N->getDebugLoc();
2152 // WARNING: In this code we widen the compare instruction with garbage.
2153 // This garbage may contain denormal floats which may be slow. Is this a real
2154 // concern ? Should we zero the unused lanes if this is a float compare ?
2156 // Get a new SETCC node to compare the newly widened operands.
2157 // Only some of the compared elements are legal.
2158 EVT SVT = TLI.getSetCCResultType(InOp0.getValueType());
2159 SDValue WideSETCC = DAG.getNode(ISD::SETCC, N->getDebugLoc(),
2160 SVT, InOp0, InOp1, N->getOperand(2));
2162 // Extract the needed results from the result vector.
2163 EVT ResVT = EVT::getVectorVT(*DAG.getContext(),
2164 SVT.getVectorElementType(),
2165 N->getValueType(0).getVectorNumElements());
2166 SDValue CC = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl,
2167 ResVT, WideSETCC, DAG.getIntPtrConstant(0));
2169 return PromoteTargetBoolean(CC, N->getValueType(0));
2173 //===----------------------------------------------------------------------===//
2174 // Vector Widening Utilities
2175 //===----------------------------------------------------------------------===//
2177 // Utility function to find the type to chop up a widen vector for load/store
2178 // TLI: Target lowering used to determine legal types.
2179 // Width: Width left need to load/store.
2180 // WidenVT: The widen vector type to load to/store from
2181 // Align: If 0, don't allow use of a wider type
2182 // WidenEx: If Align is not 0, the amount additional we can load/store from.
2184 static EVT FindMemType(SelectionDAG& DAG, const TargetLowering &TLI,
2185 unsigned Width, EVT WidenVT,
2186 unsigned Align = 0, unsigned WidenEx = 0) {
2187 EVT WidenEltVT = WidenVT.getVectorElementType();
2188 unsigned WidenWidth = WidenVT.getSizeInBits();
2189 unsigned WidenEltWidth = WidenEltVT.getSizeInBits();
2190 unsigned AlignInBits = Align*8;
2192 // If we have one element to load/store, return it.
2193 EVT RetVT = WidenEltVT;
2194 if (Width == WidenEltWidth)
2197 // See if there is larger legal integer than the element type to load/store
2199 for (VT = (unsigned)MVT::LAST_INTEGER_VALUETYPE;
2200 VT >= (unsigned)MVT::FIRST_INTEGER_VALUETYPE; --VT) {
2201 EVT MemVT((MVT::SimpleValueType) VT);
2202 unsigned MemVTWidth = MemVT.getSizeInBits();
2203 if (MemVT.getSizeInBits() <= WidenEltWidth)
2205 if (TLI.isTypeLegal(MemVT) && (WidenWidth % MemVTWidth) == 0 &&
2206 isPowerOf2_32(WidenWidth / MemVTWidth) &&
2207 (MemVTWidth <= Width ||
2208 (Align!=0 && MemVTWidth<=AlignInBits && MemVTWidth<=Width+WidenEx))) {
2214 // See if there is a larger vector type to load/store that has the same vector
2215 // element type and is evenly divisible with the WidenVT.
2216 for (VT = (unsigned)MVT::LAST_VECTOR_VALUETYPE;
2217 VT >= (unsigned)MVT::FIRST_VECTOR_VALUETYPE; --VT) {
2218 EVT MemVT = (MVT::SimpleValueType) VT;
2219 unsigned MemVTWidth = MemVT.getSizeInBits();
2220 if (TLI.isTypeLegal(MemVT) && WidenEltVT == MemVT.getVectorElementType() &&
2221 (WidenWidth % MemVTWidth) == 0 &&
2222 isPowerOf2_32(WidenWidth / MemVTWidth) &&
2223 (MemVTWidth <= Width ||
2224 (Align!=0 && MemVTWidth<=AlignInBits && MemVTWidth<=Width+WidenEx))) {
2225 if (RetVT.getSizeInBits() < MemVTWidth || MemVT == WidenVT)
2233 // Builds a vector type from scalar loads
2234 // VecTy: Resulting Vector type
2235 // LDOps: Load operators to build a vector type
2236 // [Start,End) the list of loads to use.
2237 static SDValue BuildVectorFromScalar(SelectionDAG& DAG, EVT VecTy,
2238 SmallVector<SDValue, 16>& LdOps,
2239 unsigned Start, unsigned End) {
2240 DebugLoc dl = LdOps[Start].getDebugLoc();
2241 EVT LdTy = LdOps[Start].getValueType();
2242 unsigned Width = VecTy.getSizeInBits();
2243 unsigned NumElts = Width / LdTy.getSizeInBits();
2244 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), LdTy, NumElts);
2247 SDValue VecOp = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, NewVecVT,LdOps[Start]);
2249 for (unsigned i = Start + 1; i != End; ++i) {
2250 EVT NewLdTy = LdOps[i].getValueType();
2251 if (NewLdTy != LdTy) {
2252 NumElts = Width / NewLdTy.getSizeInBits();
2253 NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewLdTy, NumElts);
2254 VecOp = DAG.getNode(ISD::BITCAST, dl, NewVecVT, VecOp);
2255 // Readjust position and vector position based on new load type
2256 Idx = Idx * LdTy.getSizeInBits() / NewLdTy.getSizeInBits();
2259 VecOp = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NewVecVT, VecOp, LdOps[i],
2260 DAG.getIntPtrConstant(Idx++));
2262 return DAG.getNode(ISD::BITCAST, dl, VecTy, VecOp);
2265 SDValue DAGTypeLegalizer::GenWidenVectorLoads(SmallVector<SDValue, 16> &LdChain,
2267 // The strategy assumes that we can efficiently load powers of two widths.
2268 // The routines chops the vector into the largest vector loads with the same
2269 // element type or scalar loads and then recombines it to the widen vector
2271 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(),LD->getValueType(0));
2272 unsigned WidenWidth = WidenVT.getSizeInBits();
2273 EVT LdVT = LD->getMemoryVT();
2274 DebugLoc dl = LD->getDebugLoc();
2275 assert(LdVT.isVector() && WidenVT.isVector());
2276 assert(LdVT.getVectorElementType() == WidenVT.getVectorElementType());
2279 SDValue Chain = LD->getChain();
2280 SDValue BasePtr = LD->getBasePtr();
2281 unsigned Align = LD->getAlignment();
2282 bool isVolatile = LD->isVolatile();
2283 bool isNonTemporal = LD->isNonTemporal();
2284 bool isInvariant = LD->isInvariant();
2286 int LdWidth = LdVT.getSizeInBits();
2287 int WidthDiff = WidenWidth - LdWidth; // Difference
2288 unsigned LdAlign = (isVolatile) ? 0 : Align; // Allow wider loads
2290 // Find the vector type that can load from.
2291 EVT NewVT = FindMemType(DAG, TLI, LdWidth, WidenVT, LdAlign, WidthDiff);
2292 int NewVTWidth = NewVT.getSizeInBits();
2293 SDValue LdOp = DAG.getLoad(NewVT, dl, Chain, BasePtr, LD->getPointerInfo(),
2294 isVolatile, isNonTemporal, isInvariant, Align);
2295 LdChain.push_back(LdOp.getValue(1));
2297 // Check if we can load the element with one instruction
2298 if (LdWidth <= NewVTWidth) {
2299 if (!NewVT.isVector()) {
2300 unsigned NumElts = WidenWidth / NewVTWidth;
2301 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewVT, NumElts);
2302 SDValue VecOp = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, NewVecVT, LdOp);
2303 return DAG.getNode(ISD::BITCAST, dl, WidenVT, VecOp);
2305 if (NewVT == WidenVT)
2308 assert(WidenWidth % NewVTWidth == 0);
2309 unsigned NumConcat = WidenWidth / NewVTWidth;
2310 SmallVector<SDValue, 16> ConcatOps(NumConcat);
2311 SDValue UndefVal = DAG.getUNDEF(NewVT);
2312 ConcatOps[0] = LdOp;
2313 for (unsigned i = 1; i != NumConcat; ++i)
2314 ConcatOps[i] = UndefVal;
2315 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &ConcatOps[0],
2319 // Load vector by using multiple loads from largest vector to scalar
2320 SmallVector<SDValue, 16> LdOps;
2321 LdOps.push_back(LdOp);
2323 LdWidth -= NewVTWidth;
2324 unsigned Offset = 0;
2326 while (LdWidth > 0) {
2327 unsigned Increment = NewVTWidth / 8;
2328 Offset += Increment;
2329 BasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr,
2330 DAG.getIntPtrConstant(Increment));
2333 if (LdWidth < NewVTWidth) {
2334 // Our current type we are using is too large, find a better size
2335 NewVT = FindMemType(DAG, TLI, LdWidth, WidenVT, LdAlign, WidthDiff);
2336 NewVTWidth = NewVT.getSizeInBits();
2337 L = DAG.getLoad(NewVT, dl, Chain, BasePtr,
2338 LD->getPointerInfo().getWithOffset(Offset),
2340 isNonTemporal, isInvariant,
2341 MinAlign(Align, Increment));
2342 LdChain.push_back(L.getValue(1));
2343 if (L->getValueType(0).isVector()) {
2344 SmallVector<SDValue, 16> Loads;
2346 unsigned size = L->getValueSizeInBits(0);
2347 while (size < LdOp->getValueSizeInBits(0)) {
2348 Loads.push_back(DAG.getUNDEF(L->getValueType(0)));
2349 size += L->getValueSizeInBits(0);
2351 L = DAG.getNode(ISD::CONCAT_VECTORS, dl, LdOp->getValueType(0),
2352 &Loads[0], Loads.size());
2355 L = DAG.getLoad(NewVT, dl, Chain, BasePtr,
2356 LD->getPointerInfo().getWithOffset(Offset), isVolatile,
2357 isNonTemporal, isInvariant, MinAlign(Align, Increment));
2358 LdChain.push_back(L.getValue(1));
2364 LdWidth -= NewVTWidth;
2367 // Build the vector from the loads operations
2368 unsigned End = LdOps.size();
2369 if (!LdOps[0].getValueType().isVector())
2370 // All the loads are scalar loads.
2371 return BuildVectorFromScalar(DAG, WidenVT, LdOps, 0, End);
2373 // If the load contains vectors, build the vector using concat vector.
2374 // All of the vectors used to loads are power of 2 and the scalars load
2375 // can be combined to make a power of 2 vector.
2376 SmallVector<SDValue, 16> ConcatOps(End);
2379 EVT LdTy = LdOps[i].getValueType();
2380 // First combine the scalar loads to a vector
2381 if (!LdTy.isVector()) {
2382 for (--i; i >= 0; --i) {
2383 LdTy = LdOps[i].getValueType();
2384 if (LdTy.isVector())
2387 ConcatOps[--Idx] = BuildVectorFromScalar(DAG, LdTy, LdOps, i+1, End);
2389 ConcatOps[--Idx] = LdOps[i];
2390 for (--i; i >= 0; --i) {
2391 EVT NewLdTy = LdOps[i].getValueType();
2392 if (NewLdTy != LdTy) {
2393 // Create a larger vector
2394 ConcatOps[End-1] = DAG.getNode(ISD::CONCAT_VECTORS, dl, NewLdTy,
2395 &ConcatOps[Idx], End - Idx);
2399 ConcatOps[--Idx] = LdOps[i];
2402 if (WidenWidth == LdTy.getSizeInBits()*(End - Idx))
2403 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT,
2404 &ConcatOps[Idx], End - Idx);
2406 // We need to fill the rest with undefs to build the vector
2407 unsigned NumOps = WidenWidth / LdTy.getSizeInBits();
2408 SmallVector<SDValue, 16> WidenOps(NumOps);
2409 SDValue UndefVal = DAG.getUNDEF(LdTy);
2412 for (; i != End-Idx; ++i)
2413 WidenOps[i] = ConcatOps[Idx+i];
2414 for (; i != NumOps; ++i)
2415 WidenOps[i] = UndefVal;
2417 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &WidenOps[0],NumOps);
2421 DAGTypeLegalizer::GenWidenVectorExtLoads(SmallVector<SDValue, 16>& LdChain,
2423 ISD::LoadExtType ExtType) {
2424 // For extension loads, it may not be more efficient to chop up the vector
2425 // and then extended it. Instead, we unroll the load and build a new vector.
2426 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(),LD->getValueType(0));
2427 EVT LdVT = LD->getMemoryVT();
2428 DebugLoc dl = LD->getDebugLoc();
2429 assert(LdVT.isVector() && WidenVT.isVector());
2432 SDValue Chain = LD->getChain();
2433 SDValue BasePtr = LD->getBasePtr();
2434 unsigned Align = LD->getAlignment();
2435 bool isVolatile = LD->isVolatile();
2436 bool isNonTemporal = LD->isNonTemporal();
2438 EVT EltVT = WidenVT.getVectorElementType();
2439 EVT LdEltVT = LdVT.getVectorElementType();
2440 unsigned NumElts = LdVT.getVectorNumElements();
2442 // Load each element and widen
2443 unsigned WidenNumElts = WidenVT.getVectorNumElements();
2444 SmallVector<SDValue, 16> Ops(WidenNumElts);
2445 unsigned Increment = LdEltVT.getSizeInBits() / 8;
2446 Ops[0] = DAG.getExtLoad(ExtType, dl, EltVT, Chain, BasePtr,
2447 LD->getPointerInfo(),
2448 LdEltVT, isVolatile, isNonTemporal, Align);
2449 LdChain.push_back(Ops[0].getValue(1));
2450 unsigned i = 0, Offset = Increment;
2451 for (i=1; i < NumElts; ++i, Offset += Increment) {
2452 SDValue NewBasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(),
2453 BasePtr, DAG.getIntPtrConstant(Offset));
2454 Ops[i] = DAG.getExtLoad(ExtType, dl, EltVT, Chain, NewBasePtr,
2455 LD->getPointerInfo().getWithOffset(Offset), LdEltVT,
2456 isVolatile, isNonTemporal, Align);
2457 LdChain.push_back(Ops[i].getValue(1));
2460 // Fill the rest with undefs
2461 SDValue UndefVal = DAG.getUNDEF(EltVT);
2462 for (; i != WidenNumElts; ++i)
2465 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], Ops.size());
2469 void DAGTypeLegalizer::GenWidenVectorStores(SmallVector<SDValue, 16>& StChain,
2471 // The strategy assumes that we can efficiently store powers of two widths.
2472 // The routines chops the vector into the largest vector stores with the same
2473 // element type or scalar stores.
2474 SDValue Chain = ST->getChain();
2475 SDValue BasePtr = ST->getBasePtr();
2476 unsigned Align = ST->getAlignment();
2477 bool isVolatile = ST->isVolatile();
2478 bool isNonTemporal = ST->isNonTemporal();
2479 SDValue ValOp = GetWidenedVector(ST->getValue());
2480 DebugLoc dl = ST->getDebugLoc();
2482 EVT StVT = ST->getMemoryVT();
2483 unsigned StWidth = StVT.getSizeInBits();
2484 EVT ValVT = ValOp.getValueType();
2485 unsigned ValWidth = ValVT.getSizeInBits();
2486 EVT ValEltVT = ValVT.getVectorElementType();
2487 unsigned ValEltWidth = ValEltVT.getSizeInBits();
2488 assert(StVT.getVectorElementType() == ValEltVT);
2490 int Idx = 0; // current index to store
2491 unsigned Offset = 0; // offset from base to store
2492 while (StWidth != 0) {
2493 // Find the largest vector type we can store with
2494 EVT NewVT = FindMemType(DAG, TLI, StWidth, ValVT);
2495 unsigned NewVTWidth = NewVT.getSizeInBits();
2496 unsigned Increment = NewVTWidth / 8;
2497 if (NewVT.isVector()) {
2498 unsigned NumVTElts = NewVT.getVectorNumElements();
2500 SDValue EOp = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, NewVT, ValOp,
2501 DAG.getIntPtrConstant(Idx));
2502 StChain.push_back(DAG.getStore(Chain, dl, EOp, BasePtr,
2503 ST->getPointerInfo().getWithOffset(Offset),
2504 isVolatile, isNonTemporal,
2505 MinAlign(Align, Offset)));
2506 StWidth -= NewVTWidth;
2507 Offset += Increment;
2509 BasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr,
2510 DAG.getIntPtrConstant(Increment));
2511 } while (StWidth != 0 && StWidth >= NewVTWidth);
2513 // Cast the vector to the scalar type we can store
2514 unsigned NumElts = ValWidth / NewVTWidth;
2515 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewVT, NumElts);
2516 SDValue VecOp = DAG.getNode(ISD::BITCAST, dl, NewVecVT, ValOp);
2517 // Readjust index position based on new vector type
2518 Idx = Idx * ValEltWidth / NewVTWidth;
2520 SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NewVT, VecOp,
2521 DAG.getIntPtrConstant(Idx++));
2522 StChain.push_back(DAG.getStore(Chain, dl, EOp, BasePtr,
2523 ST->getPointerInfo().getWithOffset(Offset),
2524 isVolatile, isNonTemporal,
2525 MinAlign(Align, Offset)));
2526 StWidth -= NewVTWidth;
2527 Offset += Increment;
2528 BasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr,
2529 DAG.getIntPtrConstant(Increment));
2530 } while (StWidth != 0 && StWidth >= NewVTWidth);
2531 // Restore index back to be relative to the original widen element type
2532 Idx = Idx * NewVTWidth / ValEltWidth;
2538 DAGTypeLegalizer::GenWidenVectorTruncStores(SmallVector<SDValue, 16>& StChain,
2540 // For extension loads, it may not be more efficient to truncate the vector
2541 // and then store it. Instead, we extract each element and then store it.
2542 SDValue Chain = ST->getChain();
2543 SDValue BasePtr = ST->getBasePtr();
2544 unsigned Align = ST->getAlignment();
2545 bool isVolatile = ST->isVolatile();
2546 bool isNonTemporal = ST->isNonTemporal();
2547 SDValue ValOp = GetWidenedVector(ST->getValue());
2548 DebugLoc dl = ST->getDebugLoc();
2550 EVT StVT = ST->getMemoryVT();
2551 EVT ValVT = ValOp.getValueType();
2553 // It must be true that we the widen vector type is bigger than where
2554 // we need to store.
2555 assert(StVT.isVector() && ValOp.getValueType().isVector());
2556 assert(StVT.bitsLT(ValOp.getValueType()));
2558 // For truncating stores, we can not play the tricks of chopping legal
2559 // vector types and bit cast it to the right type. Instead, we unroll
2561 EVT StEltVT = StVT.getVectorElementType();
2562 EVT ValEltVT = ValVT.getVectorElementType();
2563 unsigned Increment = ValEltVT.getSizeInBits() / 8;
2564 unsigned NumElts = StVT.getVectorNumElements();
2565 SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ValEltVT, ValOp,
2566 DAG.getIntPtrConstant(0));
2567 StChain.push_back(DAG.getTruncStore(Chain, dl, EOp, BasePtr,
2568 ST->getPointerInfo(), StEltVT,
2569 isVolatile, isNonTemporal, Align));
2570 unsigned Offset = Increment;
2571 for (unsigned i=1; i < NumElts; ++i, Offset += Increment) {
2572 SDValue NewBasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(),
2573 BasePtr, DAG.getIntPtrConstant(Offset));
2574 SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ValEltVT, ValOp,
2575 DAG.getIntPtrConstant(0));
2576 StChain.push_back(DAG.getTruncStore(Chain, dl, EOp, NewBasePtr,
2577 ST->getPointerInfo().getWithOffset(Offset),
2578 StEltVT, isVolatile, isNonTemporal,
2579 MinAlign(Align, Offset)));
2583 /// Modifies a vector input (widen or narrows) to a vector of NVT. The
2584 /// input vector must have the same element type as NVT.
2585 SDValue DAGTypeLegalizer::ModifyToType(SDValue InOp, EVT NVT) {
2586 // Note that InOp might have been widened so it might already have
2587 // the right width or it might need be narrowed.
2588 EVT InVT = InOp.getValueType();
2589 assert(InVT.getVectorElementType() == NVT.getVectorElementType() &&
2590 "input and widen element type must match");
2591 DebugLoc dl = InOp.getDebugLoc();
2593 // Check if InOp already has the right width.
2597 unsigned InNumElts = InVT.getVectorNumElements();
2598 unsigned WidenNumElts = NVT.getVectorNumElements();
2599 if (WidenNumElts > InNumElts && WidenNumElts % InNumElts == 0) {
2600 unsigned NumConcat = WidenNumElts / InNumElts;
2601 SmallVector<SDValue, 16> Ops(NumConcat);
2602 SDValue UndefVal = DAG.getUNDEF(InVT);
2604 for (unsigned i = 1; i != NumConcat; ++i)
2607 return DAG.getNode(ISD::CONCAT_VECTORS, dl, NVT, &Ops[0], NumConcat);
2610 if (WidenNumElts < InNumElts && InNumElts % WidenNumElts)
2611 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, NVT, InOp,
2612 DAG.getIntPtrConstant(0));
2614 // Fall back to extract and build.
2615 SmallVector<SDValue, 16> Ops(WidenNumElts);
2616 EVT EltVT = NVT.getVectorElementType();
2617 unsigned MinNumElts = std::min(WidenNumElts, InNumElts);
2619 for (Idx = 0; Idx < MinNumElts; ++Idx)
2620 Ops[Idx] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
2621 DAG.getIntPtrConstant(Idx));
2623 SDValue UndefVal = DAG.getUNDEF(EltVT);
2624 for ( ; Idx < WidenNumElts; ++Idx)
2625 Ops[Idx] = UndefVal;
2626 return DAG.getNode(ISD::BUILD_VECTOR, dl, NVT, &Ops[0], WidenNumElts);