1 //===-------- LegalizeFloatTypes.cpp - Legalization of float types --------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements float type expansion and softening for LegalizeTypes.
11 // Softening is the act of turning a computation in an illegal floating point
12 // type into a computation in an integer type of the same size; also known as
13 // "soft float". For example, turning f32 arithmetic into operations using i32.
14 // The resulting integer value is the same as what you would get by performing
15 // the floating point operation and bitcasting the result to the integer type.
16 // Expansion is the act of changing a computation in an illegal type to be a
17 // computation in two identical registers of a smaller type. For example,
18 // implementing ppcf128 arithmetic in two f64 registers.
20 //===----------------------------------------------------------------------===//
22 #include "LegalizeTypes.h"
23 #include "llvm/CodeGen/PseudoSourceValue.h"
24 #include "llvm/Constants.h"
25 #include "llvm/DerivedTypes.h"
28 /// GetFPLibCall - Return the right libcall for the given floating point type.
29 static RTLIB::Libcall GetFPLibCall(MVT VT,
30 RTLIB::Libcall Call_F32,
31 RTLIB::Libcall Call_F64,
32 RTLIB::Libcall Call_F80,
33 RTLIB::Libcall Call_PPCF128) {
35 VT == MVT::f32 ? Call_F32 :
36 VT == MVT::f64 ? Call_F64 :
37 VT == MVT::f80 ? Call_F80 :
38 VT == MVT::ppcf128 ? Call_PPCF128 :
39 RTLIB::UNKNOWN_LIBCALL;
42 //===----------------------------------------------------------------------===//
43 // Result Float to Integer Conversion.
44 //===----------------------------------------------------------------------===//
46 void DAGTypeLegalizer::SoftenFloatResult(SDNode *N, unsigned ResNo) {
47 DEBUG(cerr << "Soften float result " << ResNo << ": "; N->dump(&DAG);
49 SDOperand R = SDOperand();
51 switch (N->getOpcode()) {
54 cerr << "SoftenFloatResult #" << ResNo << ": ";
55 N->dump(&DAG); cerr << "\n";
57 assert(0 && "Do not know how to soften the result of this operator!");
60 case ISD::BIT_CONVERT: R = SoftenFloatRes_BIT_CONVERT(N); break;
61 case ISD::BUILD_PAIR: R = SoftenFloatRes_BUILD_PAIR(N); break;
63 R = SoftenFloatRes_ConstantFP(cast<ConstantFPSDNode>(N));
65 case ISD::FCOPYSIGN: R = SoftenFloatRes_FCOPYSIGN(N); break;
66 case ISD::FP_EXTEND: R = SoftenFloatRes_FP_EXTEND(N); break;
67 case ISD::FP_ROUND: R = SoftenFloatRes_FP_ROUND(N); break;
68 case ISD::LOAD: R = SoftenFloatRes_LOAD(N); break;
69 case ISD::SELECT: R = SoftenFloatRes_SELECT(N); break;
70 case ISD::SELECT_CC: R = SoftenFloatRes_SELECT_CC(N); break;
72 case ISD::UINT_TO_FP: R = SoftenFloatRes_XINT_TO_FP(N); break;
74 case ISD::FADD: R = SoftenFloatRes_FADD(N); break;
75 case ISD::FMUL: R = SoftenFloatRes_FMUL(N); break;
76 case ISD::FPOWI: R = SoftenFloatRes_FPOWI(N); break;
77 case ISD::FSUB: R = SoftenFloatRes_FSUB(N); break;
80 // If R is null, the sub-method took care of registering the result.
82 SetSoftenedFloat(SDOperand(N, ResNo), R);
85 SDOperand DAGTypeLegalizer::SoftenFloatRes_BIT_CONVERT(SDNode *N) {
86 return BitConvertToInteger(N->getOperand(0));
89 SDOperand DAGTypeLegalizer::SoftenFloatRes_BUILD_PAIR(SDNode *N) {
90 // Convert the inputs to integers, and build a new pair out of them.
91 return DAG.getNode(ISD::BUILD_PAIR,
92 TLI.getTypeToTransformTo(N->getValueType(0)),
93 BitConvertToInteger(N->getOperand(0)),
94 BitConvertToInteger(N->getOperand(1)));
97 SDOperand DAGTypeLegalizer::SoftenFloatRes_ConstantFP(ConstantFPSDNode *N) {
98 return DAG.getConstant(N->getValueAPF().convertToAPInt(),
99 TLI.getTypeToTransformTo(N->getValueType(0)));
102 SDOperand DAGTypeLegalizer::SoftenFloatRes_FADD(SDNode *N) {
103 MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
104 SDOperand Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
105 GetSoftenedFloat(N->getOperand(1)) };
106 return MakeLibCall(GetFPLibCall(N->getValueType(0),
114 SDOperand DAGTypeLegalizer::SoftenFloatRes_FCOPYSIGN(SDNode *N) {
115 SDOperand LHS = GetSoftenedFloat(N->getOperand(0));
116 SDOperand RHS = BitConvertToInteger(N->getOperand(1));
118 MVT LVT = LHS.getValueType();
119 MVT RVT = RHS.getValueType();
121 unsigned LSize = LVT.getSizeInBits();
122 unsigned RSize = RVT.getSizeInBits();
124 // First get the sign bit of second operand.
125 SDOperand SignBit = DAG.getNode(ISD::SHL, RVT, DAG.getConstant(1, RVT),
126 DAG.getConstant(RSize - 1,
127 TLI.getShiftAmountTy()));
128 SignBit = DAG.getNode(ISD::AND, RVT, RHS, SignBit);
130 // Shift right or sign-extend it if the two operands have different types.
131 int SizeDiff = RVT.getSizeInBits() - LVT.getSizeInBits();
133 SignBit = DAG.getNode(ISD::SRL, RVT, SignBit,
134 DAG.getConstant(SizeDiff, TLI.getShiftAmountTy()));
135 SignBit = DAG.getNode(ISD::TRUNCATE, LVT, SignBit);
136 } else if (SizeDiff < 0) {
137 SignBit = DAG.getNode(ISD::ANY_EXTEND, LVT, SignBit);
138 SignBit = DAG.getNode(ISD::SHL, LVT, SignBit,
139 DAG.getConstant(-SizeDiff, TLI.getShiftAmountTy()));
142 // Clear the sign bit of the first operand.
143 SDOperand Mask = DAG.getNode(ISD::SHL, LVT, DAG.getConstant(1, LVT),
144 DAG.getConstant(LSize - 1,
145 TLI.getShiftAmountTy()));
146 Mask = DAG.getNode(ISD::SUB, LVT, Mask, DAG.getConstant(1, LVT));
147 LHS = DAG.getNode(ISD::AND, LVT, LHS, Mask);
149 // Or the value with the sign bit.
150 return DAG.getNode(ISD::OR, LVT, LHS, SignBit);
153 SDOperand DAGTypeLegalizer::SoftenFloatRes_FMUL(SDNode *N) {
154 MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
155 SDOperand Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
156 GetSoftenedFloat(N->getOperand(1)) };
157 return MakeLibCall(GetFPLibCall(N->getValueType(0),
165 SDOperand DAGTypeLegalizer::SoftenFloatRes_FP_EXTEND(SDNode *N) {
166 MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
167 SDOperand Op = N->getOperand(0);
169 RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
170 switch (Op.getValueType().getSimpleVT()) {
172 assert(false && "Unsupported FP_EXTEND!");
174 switch (N->getValueType(0).getSimpleVT()) {
176 assert(false && "Unsupported FP_EXTEND!");
178 LC = RTLIB::FPEXT_F32_F64;
182 return MakeLibCall(LC, NVT, &Op, 1, false);
185 SDOperand DAGTypeLegalizer::SoftenFloatRes_FP_ROUND(SDNode *N) {
186 MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
187 SDOperand Op = N->getOperand(0);
189 RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
190 switch (Op.getValueType().getSimpleVT()) {
192 assert(false && "Unsupported FP_ROUND!");
194 switch (N->getValueType(0).getSimpleVT()) {
196 assert(false && "Unsupported FP_ROUND!");
198 LC = RTLIB::FPROUND_F64_F32;
202 return MakeLibCall(LC, NVT, &Op, 1, false);
205 SDOperand DAGTypeLegalizer::SoftenFloatRes_FPOWI(SDNode *N) {
206 MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
207 SDOperand Ops[2] = { GetSoftenedFloat(N->getOperand(0)), N->getOperand(1) };
208 return MakeLibCall(GetFPLibCall(N->getValueType(0),
212 RTLIB::POWI_PPCF128),
216 SDOperand DAGTypeLegalizer::SoftenFloatRes_FSUB(SDNode *N) {
217 MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
218 SDOperand Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
219 GetSoftenedFloat(N->getOperand(1)) };
220 return MakeLibCall(GetFPLibCall(N->getValueType(0),
228 SDOperand DAGTypeLegalizer::SoftenFloatRes_LOAD(SDNode *N) {
229 LoadSDNode *L = cast<LoadSDNode>(N);
230 MVT VT = N->getValueType(0);
231 MVT NVT = TLI.getTypeToTransformTo(VT);
233 if (L->getExtensionType() == ISD::NON_EXTLOAD)
234 return DAG.getLoad(L->getAddressingMode(), L->getExtensionType(),
235 NVT, L->getChain(), L->getBasePtr(), L->getOffset(),
236 L->getSrcValue(), L->getSrcValueOffset(), NVT,
237 L->isVolatile(), L->getAlignment());
239 // Do a non-extending load followed by FP_EXTEND.
240 SDOperand NL = DAG.getLoad(L->getAddressingMode(), ISD::NON_EXTLOAD,
241 L->getMemoryVT(), L->getChain(),
242 L->getBasePtr(), L->getOffset(),
243 L->getSrcValue(), L->getSrcValueOffset(),
245 L->isVolatile(), L->getAlignment());
246 return BitConvertToInteger(DAG.getNode(ISD::FP_EXTEND, VT, NL));
249 SDOperand DAGTypeLegalizer::SoftenFloatRes_SELECT(SDNode *N) {
250 SDOperand LHS = GetSoftenedFloat(N->getOperand(1));
251 SDOperand RHS = GetSoftenedFloat(N->getOperand(2));
252 return DAG.getNode(ISD::SELECT, LHS.getValueType(), N->getOperand(0),LHS,RHS);
255 SDOperand DAGTypeLegalizer::SoftenFloatRes_SELECT_CC(SDNode *N) {
256 SDOperand LHS = GetSoftenedFloat(N->getOperand(2));
257 SDOperand RHS = GetSoftenedFloat(N->getOperand(3));
258 return DAG.getNode(ISD::SELECT_CC, LHS.getValueType(), N->getOperand(0),
259 N->getOperand(1), LHS, RHS, N->getOperand(4));
262 SDOperand DAGTypeLegalizer::SoftenFloatRes_XINT_TO_FP(SDNode *N) {
263 bool isSigned = N->getOpcode() == ISD::SINT_TO_FP;
264 MVT DestVT = N->getValueType(0);
265 SDOperand Op = N->getOperand(0);
267 if (Op.getValueType() == MVT::i32) {
268 // simple 32-bit [signed|unsigned] integer to float/double expansion
270 // Get the stack frame index of a 8 byte buffer.
271 SDOperand StackSlot = DAG.CreateStackTemporary(MVT::f64);
273 // word offset constant for Hi/Lo address computation
275 DAG.getConstant(MVT(MVT::i32).getSizeInBits() / 8,
277 // set up Hi and Lo (into buffer) address based on endian
278 SDOperand Hi = StackSlot;
279 SDOperand Lo = DAG.getNode(ISD::ADD, TLI.getPointerTy(), StackSlot, Offset);
280 if (TLI.isLittleEndian())
283 // if signed map to unsigned space
286 // constant used to invert sign bit (signed to unsigned mapping)
287 SDOperand SignBit = DAG.getConstant(0x80000000u, MVT::i32);
288 OpMapped = DAG.getNode(ISD::XOR, MVT::i32, Op, SignBit);
292 // store the lo of the constructed double - based on integer input
293 SDOperand Store1 = DAG.getStore(DAG.getEntryNode(),
294 OpMapped, Lo, NULL, 0);
295 // initial hi portion of constructed double
296 SDOperand InitialHi = DAG.getConstant(0x43300000u, MVT::i32);
297 // store the hi of the constructed double - biased exponent
298 SDOperand Store2=DAG.getStore(Store1, InitialHi, Hi, NULL, 0);
299 // load the constructed double
300 SDOperand Load = DAG.getLoad(MVT::f64, Store2, StackSlot, NULL, 0);
301 // FP constant to bias correct the final result
302 SDOperand Bias = DAG.getConstantFP(isSigned ?
303 BitsToDouble(0x4330000080000000ULL)
304 : BitsToDouble(0x4330000000000000ULL),
307 SDOperand Sub = DAG.getNode(ISD::FSUB, MVT::f64, Load, Bias);
310 // handle final rounding
311 if (DestVT == MVT::f64) {
314 } else if (DestVT.bitsLT(MVT::f64)) {
315 Result = DAG.getNode(ISD::FP_ROUND, DestVT, Sub,
316 DAG.getIntPtrConstant(0));
317 } else if (DestVT.bitsGT(MVT::f64)) {
318 Result = DAG.getNode(ISD::FP_EXTEND, DestVT, Sub);
320 return BitConvertToInteger(Result);
322 assert(!isSigned && "Legalize cannot Expand SINT_TO_FP for i64 yet");
323 SDOperand Tmp1 = DAG.getNode(ISD::SINT_TO_FP, DestVT, Op);
325 SDOperand SignSet = DAG.getSetCC(TLI.getSetCCResultType(Op), Op,
326 DAG.getConstant(0, Op.getValueType()),
328 SDOperand Zero = DAG.getIntPtrConstant(0), Four = DAG.getIntPtrConstant(4);
329 SDOperand CstOffset = DAG.getNode(ISD::SELECT, Zero.getValueType(),
330 SignSet, Four, Zero);
332 // If the sign bit of the integer is set, the large number will be treated
333 // as a negative number. To counteract this, the dynamic code adds an
334 // offset depending on the data type.
336 switch (Op.getValueType().getSimpleVT()) {
337 default: assert(0 && "Unsupported integer type!");
338 case MVT::i8 : FF = 0x43800000ULL; break; // 2^8 (as a float)
339 case MVT::i16: FF = 0x47800000ULL; break; // 2^16 (as a float)
340 case MVT::i32: FF = 0x4F800000ULL; break; // 2^32 (as a float)
341 case MVT::i64: FF = 0x5F800000ULL; break; // 2^64 (as a float)
343 if (TLI.isLittleEndian()) FF <<= 32;
344 static Constant *FudgeFactor = ConstantInt::get(Type::Int64Ty, FF);
346 SDOperand CPIdx = DAG.getConstantPool(FudgeFactor, TLI.getPointerTy());
347 CPIdx = DAG.getNode(ISD::ADD, TLI.getPointerTy(), CPIdx, CstOffset);
348 SDOperand FudgeInReg;
349 if (DestVT == MVT::f32)
350 FudgeInReg = DAG.getLoad(MVT::f32, DAG.getEntryNode(), CPIdx,
351 PseudoSourceValue::getConstantPool(), 0);
353 FudgeInReg = DAG.getExtLoad(ISD::EXTLOAD, DestVT,
354 DAG.getEntryNode(), CPIdx,
355 PseudoSourceValue::getConstantPool(), 0,
359 return BitConvertToInteger(DAG.getNode(ISD::FADD, DestVT, Tmp1, FudgeInReg));
363 //===----------------------------------------------------------------------===//
364 // Operand Float to Integer Conversion..
365 //===----------------------------------------------------------------------===//
367 bool DAGTypeLegalizer::SoftenFloatOperand(SDNode *N, unsigned OpNo) {
368 DEBUG(cerr << "Soften float operand " << OpNo << ": "; N->dump(&DAG);
370 SDOperand Res = SDOperand();
372 switch (N->getOpcode()) {
375 cerr << "SoftenFloatOperand Op #" << OpNo << ": ";
376 N->dump(&DAG); cerr << "\n";
378 assert(0 && "Do not know how to soften this operator's operand!");
381 case ISD::BIT_CONVERT: Res = SoftenFloatOp_BIT_CONVERT(N); break;
383 case ISD::BR_CC: Res = SoftenFloatOp_BR_CC(N); break;
384 case ISD::SELECT_CC: Res = SoftenFloatOp_SELECT_CC(N); break;
385 case ISD::SETCC: Res = SoftenFloatOp_SETCC(N); break;
386 case ISD::STORE: Res = SoftenFloatOp_STORE(N, OpNo); break;
389 // If the result is null, the sub-method took care of registering results etc.
390 if (!Res.Val) return false;
392 // If the result is N, the sub-method updated N in place. Check to see if any
393 // operands are new, and if so, mark them.
395 // Mark N as new and remark N and its operands. This allows us to correctly
396 // revisit N if it needs another step of promotion and allows us to visit
397 // any new operands to N.
402 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
403 "Invalid operand expansion");
405 ReplaceValueWith(SDOperand(N, 0), Res);
409 /// SoftenSetCCOperands - Soften the operands of a comparison. This code is
410 /// shared among BR_CC, SELECT_CC, and SETCC handlers.
411 void DAGTypeLegalizer::SoftenSetCCOperands(SDOperand &NewLHS, SDOperand &NewRHS,
412 ISD::CondCode &CCCode) {
413 SDOperand LHSInt = GetSoftenedFloat(NewLHS);
414 SDOperand RHSInt = GetSoftenedFloat(NewRHS);
415 MVT VT = NewLHS.getValueType();
417 assert((VT == MVT::f32 || VT == MVT::f64) && "Unsupported setcc type!");
419 // Expand into one or more soft-fp libcall(s).
420 RTLIB::Libcall LC1 = RTLIB::UNKNOWN_LIBCALL, LC2 = RTLIB::UNKNOWN_LIBCALL;
424 LC1 = (VT == MVT::f32) ? RTLIB::OEQ_F32 : RTLIB::OEQ_F64;
428 LC1 = (VT == MVT::f32) ? RTLIB::UNE_F32 : RTLIB::UNE_F64;
432 LC1 = (VT == MVT::f32) ? RTLIB::OGE_F32 : RTLIB::OGE_F64;
436 LC1 = (VT == MVT::f32) ? RTLIB::OLT_F32 : RTLIB::OLT_F64;
440 LC1 = (VT == MVT::f32) ? RTLIB::OLE_F32 : RTLIB::OLE_F64;
444 LC1 = (VT == MVT::f32) ? RTLIB::OGT_F32 : RTLIB::OGT_F64;
447 LC1 = (VT == MVT::f32) ? RTLIB::UO_F32 : RTLIB::UO_F64;
450 LC1 = (VT == MVT::f32) ? RTLIB::O_F32 : RTLIB::O_F64;
453 LC1 = (VT == MVT::f32) ? RTLIB::UO_F32 : RTLIB::UO_F64;
456 // SETONE = SETOLT | SETOGT
457 LC1 = (VT == MVT::f32) ? RTLIB::OLT_F32 : RTLIB::OLT_F64;
460 LC2 = (VT == MVT::f32) ? RTLIB::OGT_F32 : RTLIB::OGT_F64;
463 LC2 = (VT == MVT::f32) ? RTLIB::OGE_F32 : RTLIB::OGE_F64;
466 LC2 = (VT == MVT::f32) ? RTLIB::OLT_F32 : RTLIB::OLT_F64;
469 LC2 = (VT == MVT::f32) ? RTLIB::OLE_F32 : RTLIB::OLE_F64;
472 LC2 = (VT == MVT::f32) ? RTLIB::OEQ_F32 : RTLIB::OEQ_F64;
474 default: assert(false && "Do not know how to soften this setcc!");
478 MVT RetVT = MVT::i32; // FIXME: is this the correct return type?
479 SDOperand Ops[2] = { LHSInt, RHSInt };
480 NewLHS = MakeLibCall(LC1, RetVT, Ops, 2, false/*sign irrelevant*/);
481 NewRHS = DAG.getConstant(0, RetVT);
482 CCCode = TLI.getCmpLibcallCC(LC1);
483 if (LC2 != RTLIB::UNKNOWN_LIBCALL) {
484 SDOperand Tmp = DAG.getNode(ISD::SETCC, TLI.getSetCCResultType(NewLHS),
485 NewLHS, NewRHS, DAG.getCondCode(CCCode));
486 NewLHS = MakeLibCall(LC2, RetVT, Ops, 2, false/*sign irrelevant*/);
487 NewLHS = DAG.getNode(ISD::SETCC, TLI.getSetCCResultType(NewLHS), NewLHS,
488 NewRHS, DAG.getCondCode(TLI.getCmpLibcallCC(LC2)));
489 NewLHS = DAG.getNode(ISD::OR, Tmp.getValueType(), Tmp, NewLHS);
490 NewRHS = SDOperand();
494 SDOperand DAGTypeLegalizer::SoftenFloatOp_BIT_CONVERT(SDNode *N) {
495 return DAG.getNode(ISD::BIT_CONVERT, N->getValueType(0),
496 GetSoftenedFloat(N->getOperand(0)));
499 SDOperand DAGTypeLegalizer::SoftenFloatOp_BR_CC(SDNode *N) {
500 SDOperand NewLHS = N->getOperand(2), NewRHS = N->getOperand(3);
501 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(1))->get();
502 SoftenSetCCOperands(NewLHS, NewRHS, CCCode);
504 // If SoftenSetCCOperands returned a scalar, we need to compare the result
505 // against zero to select between true and false values.
506 if (NewRHS.Val == 0) {
507 NewRHS = DAG.getConstant(0, NewLHS.getValueType());
511 // Update N to have the operands specified.
512 return DAG.UpdateNodeOperands(SDOperand(N, 0), N->getOperand(0),
513 DAG.getCondCode(CCCode), NewLHS, NewRHS,
517 SDOperand DAGTypeLegalizer::SoftenFloatOp_SELECT_CC(SDNode *N) {
518 SDOperand NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
519 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(4))->get();
520 SoftenSetCCOperands(NewLHS, NewRHS, CCCode);
522 // If SoftenSetCCOperands returned a scalar, we need to compare the result
523 // against zero to select between true and false values.
524 if (NewRHS.Val == 0) {
525 NewRHS = DAG.getConstant(0, NewLHS.getValueType());
529 // Update N to have the operands specified.
530 return DAG.UpdateNodeOperands(SDOperand(N, 0), NewLHS, NewRHS,
531 N->getOperand(2), N->getOperand(3),
532 DAG.getCondCode(CCCode));
535 SDOperand DAGTypeLegalizer::SoftenFloatOp_SETCC(SDNode *N) {
536 SDOperand NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
537 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(2))->get();
538 SoftenSetCCOperands(NewLHS, NewRHS, CCCode);
540 // If SoftenSetCCOperands returned a scalar, use it.
541 if (NewRHS.Val == 0) {
542 assert(NewLHS.getValueType() == N->getValueType(0) &&
543 "Unexpected setcc expansion!");
547 // Otherwise, update N to have the operands specified.
548 return DAG.UpdateNodeOperands(SDOperand(N, 0), NewLHS, NewRHS,
549 DAG.getCondCode(CCCode));
552 SDOperand DAGTypeLegalizer::SoftenFloatOp_STORE(SDNode *N, unsigned OpNo) {
553 assert(ISD::isUNINDEXEDStore(N) && "Indexed store during type legalization!");
554 assert(OpNo == 1 && "Can only soften the stored value!");
555 StoreSDNode *ST = cast<StoreSDNode>(N);
556 SDOperand Val = ST->getValue();
558 if (ST->isTruncatingStore())
559 // Do an FP_ROUND followed by a non-truncating store.
560 Val = BitConvertToInteger(DAG.getNode(ISD::FP_ROUND, ST->getMemoryVT(),
561 Val, DAG.getIntPtrConstant(0)));
563 Val = GetSoftenedFloat(Val);
565 return DAG.getStore(ST->getChain(), Val, ST->getBasePtr(),
566 ST->getSrcValue(), ST->getSrcValueOffset(),
567 ST->isVolatile(), ST->getAlignment());
571 //===----------------------------------------------------------------------===//
572 // Float Result Expansion
573 //===----------------------------------------------------------------------===//
575 /// ExpandFloatResult - This method is called when the specified result of the
576 /// specified node is found to need expansion. At this point, the node may also
577 /// have invalid operands or may have other results that need promotion, we just
578 /// know that (at least) one result needs expansion.
579 void DAGTypeLegalizer::ExpandFloatResult(SDNode *N, unsigned ResNo) {
580 DEBUG(cerr << "Expand float result: "; N->dump(&DAG); cerr << "\n");
582 Lo = Hi = SDOperand();
584 // See if the target wants to custom expand this node.
585 if (TLI.getOperationAction(N->getOpcode(), N->getValueType(ResNo)) ==
586 TargetLowering::Custom) {
587 // If the target wants to, allow it to lower this itself.
588 if (SDNode *P = TLI.ReplaceNodeResults(N, DAG)) {
589 // Everything that once used N now uses P. We are guaranteed that the
590 // result value types of N and the result value types of P match.
591 ReplaceNodeWith(N, P);
596 switch (N->getOpcode()) {
599 cerr << "ExpandFloatResult #" << ResNo << ": ";
600 N->dump(&DAG); cerr << "\n";
602 assert(0 && "Do not know how to expand the result of this operator!");
605 case ISD::MERGE_VALUES: SplitRes_MERGE_VALUES(N, Lo, Hi); break;
606 case ISD::UNDEF: SplitRes_UNDEF(N, Lo, Hi); break;
607 case ISD::SELECT: SplitRes_SELECT(N, Lo, Hi); break;
608 case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break;
610 case ISD::BIT_CONVERT: ExpandRes_BIT_CONVERT(N, Lo, Hi); break;
611 case ISD::BUILD_PAIR: ExpandRes_BUILD_PAIR(N, Lo, Hi); break;
612 case ISD::EXTRACT_ELEMENT: ExpandRes_EXTRACT_ELEMENT(N, Lo, Hi); break;
613 case ISD::EXTRACT_VECTOR_ELT: ExpandRes_EXTRACT_VECTOR_ELT(N, Lo, Hi); break;
615 case ISD::ConstantFP: ExpandFloatRes_ConstantFP(N, Lo, Hi); break;
616 case ISD::FADD: ExpandFloatRes_FADD(N, Lo, Hi); break;
617 case ISD::FDIV: ExpandFloatRes_FDIV(N, Lo, Hi); break;
618 case ISD::FMUL: ExpandFloatRes_FMUL(N, Lo, Hi); break;
619 case ISD::FSUB: ExpandFloatRes_FSUB(N, Lo, Hi); break;
620 case ISD::LOAD: ExpandFloatRes_LOAD(N, Lo, Hi); break;
621 case ISD::SINT_TO_FP:
622 case ISD::UINT_TO_FP: ExpandFloatRes_XINT_TO_FP(N, Lo, Hi); break;
625 // If Lo/Hi is null, the sub-method took care of registering results etc.
627 SetExpandedFloat(SDOperand(N, ResNo), Lo, Hi);
630 void DAGTypeLegalizer::ExpandFloatRes_ConstantFP(SDNode *N, SDOperand &Lo,
632 MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
633 assert(NVT.getSizeInBits() == integerPartWidth &&
634 "Do not know how to expand this float constant!");
635 APInt C = cast<ConstantFPSDNode>(N)->getValueAPF().convertToAPInt();
636 Lo = DAG.getConstantFP(APFloat(APInt(integerPartWidth, 1,
637 &C.getRawData()[1])), NVT);
638 Hi = DAG.getConstantFP(APFloat(APInt(integerPartWidth, 1,
639 &C.getRawData()[0])), NVT);
642 void DAGTypeLegalizer::ExpandFloatRes_FADD(SDNode *N, SDOperand &Lo,
644 SDOperand Ops[2] = { N->getOperand(0), N->getOperand(1) };
645 SDOperand Call = MakeLibCall(GetFPLibCall(N->getValueType(0),
650 N->getValueType(0), Ops, 2,
652 assert(Call.Val->getOpcode() == ISD::BUILD_PAIR && "Call lowered wrongly!");
653 Lo = Call.getOperand(0); Hi = Call.getOperand(1);
656 void DAGTypeLegalizer::ExpandFloatRes_FDIV(SDNode *N, SDOperand &Lo,
658 SDOperand Ops[2] = { N->getOperand(0), N->getOperand(1) };
659 SDOperand Call = MakeLibCall(GetFPLibCall(N->getValueType(0),
664 N->getValueType(0), Ops, 2,
666 assert(Call.Val->getOpcode() == ISD::BUILD_PAIR && "Call lowered wrongly!");
667 Lo = Call.getOperand(0); Hi = Call.getOperand(1);
670 void DAGTypeLegalizer::ExpandFloatRes_FMUL(SDNode *N, SDOperand &Lo,
672 SDOperand Ops[2] = { N->getOperand(0), N->getOperand(1) };
673 SDOperand Call = MakeLibCall(GetFPLibCall(N->getValueType(0),
678 N->getValueType(0), Ops, 2,
680 assert(Call.Val->getOpcode() == ISD::BUILD_PAIR && "Call lowered wrongly!");
681 Lo = Call.getOperand(0); Hi = Call.getOperand(1);
684 void DAGTypeLegalizer::ExpandFloatRes_FSUB(SDNode *N, SDOperand &Lo,
686 SDOperand Ops[2] = { N->getOperand(0), N->getOperand(1) };
687 SDOperand Call = MakeLibCall(GetFPLibCall(N->getValueType(0),
692 N->getValueType(0), Ops, 2,
694 assert(Call.Val->getOpcode() == ISD::BUILD_PAIR && "Call lowered wrongly!");
695 Lo = Call.getOperand(0); Hi = Call.getOperand(1);
698 void DAGTypeLegalizer::ExpandFloatRes_LOAD(SDNode *N, SDOperand &Lo,
700 if (ISD::isNormalLoad(N)) {
701 ExpandRes_NormalLoad(N, Lo, Hi);
705 assert(ISD::isUNINDEXEDLoad(N) && "Indexed load during type legalization!");
706 LoadSDNode *LD = cast<LoadSDNode>(N);
707 SDOperand Chain = LD->getChain();
708 SDOperand Ptr = LD->getBasePtr();
710 MVT NVT = TLI.getTypeToTransformTo(LD->getValueType(0));
711 assert(NVT.isByteSized() && "Expanded type not byte sized!");
712 assert(LD->getMemoryVT().bitsLE(NVT) && "Float type not round?");
714 Lo = DAG.getExtLoad(LD->getExtensionType(), NVT, Chain, Ptr,
715 LD->getSrcValue(), LD->getSrcValueOffset(),
717 LD->isVolatile(), LD->getAlignment());
719 // Remember the chain.
720 Chain = Lo.getValue(1);
722 // The high part is undefined.
723 Hi = DAG.getNode(ISD::UNDEF, NVT);
725 // Modified the chain - switch anything that used the old chain to use the
727 ReplaceValueWith(SDOperand(LD, 1), Chain);
730 void DAGTypeLegalizer::ExpandFloatRes_XINT_TO_FP(SDNode *N, SDOperand &Lo,
732 assert(N->getValueType(0) == MVT::ppcf128 && "Unsupported XINT_TO_FP!");
733 MVT VT = N->getValueType(0);
734 MVT NVT = TLI.getTypeToTransformTo(VT);
735 SDOperand Src = N->getOperand(0);
736 MVT SrcVT = Src.getValueType();
738 // First do an SINT_TO_FP, whether the original was signed or unsigned.
739 if (SrcVT.bitsLE(MVT::i32)) {
740 // The integer can be represented exactly in an f64.
741 Src = DAG.getNode(ISD::SIGN_EXTEND, MVT::i32, Src);
742 Lo = DAG.getConstantFP(APFloat(APInt(NVT.getSizeInBits(), 0)), NVT);
743 Hi = DAG.getNode(ISD::SINT_TO_FP, NVT, Src);
745 RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
746 if (SrcVT.bitsLE(MVT::i64)) {
747 Src = DAG.getNode(ISD::SIGN_EXTEND, MVT::i64, Src);
748 LC = RTLIB::SINTTOFP_I64_PPCF128;
749 } else if (SrcVT.bitsLE(MVT::i128)) {
750 Src = DAG.getNode(ISD::SIGN_EXTEND, MVT::i128, Src);
751 LC = RTLIB::SINTTOFP_I128_PPCF128;
753 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported XINT_TO_FP!");
755 Hi = MakeLibCall(LC, VT, &Src, 1, true);
756 assert(Hi.Val->getOpcode() == ISD::BUILD_PAIR && "Call lowered wrongly!");
757 Lo = Hi.getOperand(0); Hi = Hi.getOperand(1);
760 if (N->getOpcode() == ISD::SINT_TO_FP)
763 // Unsigned - fix up the SINT_TO_FP value just calculated.
764 Hi = DAG.getNode(ISD::BUILD_PAIR, VT, Lo, Hi);
765 SrcVT = Src.getValueType();
767 // x>=0 ? (ppcf128)(iN)x : (ppcf128)(iN)x + 2^N; N=32,64,128.
768 static const uint64_t TwoE32[] = { 0x41f0000000000000LL, 0 };
769 static const uint64_t TwoE64[] = { 0x43f0000000000000LL, 0 };
770 static const uint64_t TwoE128[] = { 0x47f0000000000000LL, 0 };
771 const uint64_t *Parts = 0;
773 switch (SrcVT.getSimpleVT()) {
775 assert(false && "Unsupported UINT_TO_FP!");
784 Lo = DAG.getNode(ISD::FADD, VT, Hi,
785 DAG.getConstantFP(APFloat(APInt(128, 2, Parts)),
787 Lo = DAG.getNode(ISD::SELECT_CC, VT, Src, DAG.getConstant(0, SrcVT), Lo, Hi,
788 DAG.getCondCode(ISD::SETLT));
789 Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, NVT, Lo,
790 DAG.getConstant(1, TLI.getPointerTy()));
791 Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, NVT, Lo,
792 DAG.getConstant(0, TLI.getPointerTy()));
796 //===----------------------------------------------------------------------===//
797 // Float Operand Expansion
798 //===----------------------------------------------------------------------===//
800 /// ExpandFloatOperand - This method is called when the specified operand of the
801 /// specified node is found to need expansion. At this point, all of the result
802 /// types of the node are known to be legal, but other operands of the node may
803 /// need promotion or expansion as well as the specified one.
804 bool DAGTypeLegalizer::ExpandFloatOperand(SDNode *N, unsigned OpNo) {
805 DEBUG(cerr << "Expand float operand: "; N->dump(&DAG); cerr << "\n");
806 SDOperand Res = SDOperand();
808 if (TLI.getOperationAction(N->getOpcode(), N->getOperand(OpNo).getValueType())
809 == TargetLowering::Custom)
810 Res = TLI.LowerOperation(SDOperand(N, OpNo), DAG);
813 switch (N->getOpcode()) {
816 cerr << "ExpandFloatOperand Op #" << OpNo << ": ";
817 N->dump(&DAG); cerr << "\n";
819 assert(0 && "Do not know how to expand this operator's operand!");
822 case ISD::BIT_CONVERT: Res = ExpandOp_BIT_CONVERT(N); break;
823 case ISD::BUILD_VECTOR: Res = ExpandOp_BUILD_VECTOR(N); break;
824 case ISD::EXTRACT_ELEMENT: Res = ExpandOp_EXTRACT_ELEMENT(N); break;
826 case ISD::BR_CC: Res = ExpandFloatOp_BR_CC(N); break;
827 case ISD::SELECT_CC: Res = ExpandFloatOp_SELECT_CC(N); break;
828 case ISD::SETCC: Res = ExpandFloatOp_SETCC(N); break;
830 case ISD::FP_ROUND: Res = ExpandFloatOp_FP_ROUND(N); break;
831 case ISD::FP_TO_SINT: Res = ExpandFloatOp_FP_TO_SINT(N); break;
832 case ISD::FP_TO_UINT: Res = ExpandFloatOp_FP_TO_UINT(N); break;
835 Res = ExpandFloatOp_STORE(cast<StoreSDNode>(N), OpNo);
840 // If the result is null, the sub-method took care of registering results etc.
841 if (!Res.Val) return false;
842 // If the result is N, the sub-method updated N in place. Check to see if any
843 // operands are new, and if so, mark them.
845 // Mark N as new and remark N and its operands. This allows us to correctly
846 // revisit N if it needs another step of expansion and allows us to visit
847 // any new operands to N.
852 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
853 "Invalid operand expansion");
855 ReplaceValueWith(SDOperand(N, 0), Res);
859 /// FloatExpandSetCCOperands - Expand the operands of a comparison. This code
860 /// is shared among BR_CC, SELECT_CC, and SETCC handlers.
861 void DAGTypeLegalizer::FloatExpandSetCCOperands(SDOperand &NewLHS,
863 ISD::CondCode &CCCode) {
864 SDOperand LHSLo, LHSHi, RHSLo, RHSHi;
865 GetExpandedFloat(NewLHS, LHSLo, LHSHi);
866 GetExpandedFloat(NewRHS, RHSLo, RHSHi);
868 MVT VT = NewLHS.getValueType();
869 assert(VT == MVT::ppcf128 && "Unsupported setcc type!");
871 // FIXME: This generated code sucks. We want to generate
872 // FCMP crN, hi1, hi2
874 // FCMP crN, lo1, lo2
875 // The following can be improved, but not that much.
876 SDOperand Tmp1, Tmp2, Tmp3;
877 Tmp1 = DAG.getSetCC(TLI.getSetCCResultType(LHSHi), LHSHi, RHSHi, ISD::SETEQ);
878 Tmp2 = DAG.getSetCC(TLI.getSetCCResultType(LHSLo), LHSLo, RHSLo, CCCode);
879 Tmp3 = DAG.getNode(ISD::AND, Tmp1.getValueType(), Tmp1, Tmp2);
880 Tmp1 = DAG.getSetCC(TLI.getSetCCResultType(LHSHi), LHSHi, RHSHi, ISD::SETNE);
881 Tmp2 = DAG.getSetCC(TLI.getSetCCResultType(LHSHi), LHSHi, RHSHi, CCCode);
882 Tmp1 = DAG.getNode(ISD::AND, Tmp1.getValueType(), Tmp1, Tmp2);
883 NewLHS = DAG.getNode(ISD::OR, Tmp1.getValueType(), Tmp1, Tmp3);
884 NewRHS = SDOperand(); // LHS is the result, not a compare.
887 SDOperand DAGTypeLegalizer::ExpandFloatOp_BR_CC(SDNode *N) {
888 SDOperand NewLHS = N->getOperand(2), NewRHS = N->getOperand(3);
889 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(1))->get();
890 FloatExpandSetCCOperands(NewLHS, NewRHS, CCCode);
892 // If ExpandSetCCOperands returned a scalar, we need to compare the result
893 // against zero to select between true and false values.
894 if (NewRHS.Val == 0) {
895 NewRHS = DAG.getConstant(0, NewLHS.getValueType());
899 // Update N to have the operands specified.
900 return DAG.UpdateNodeOperands(SDOperand(N, 0), N->getOperand(0),
901 DAG.getCondCode(CCCode), NewLHS, NewRHS,
905 SDOperand DAGTypeLegalizer::ExpandFloatOp_SELECT_CC(SDNode *N) {
906 SDOperand NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
907 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(4))->get();
908 FloatExpandSetCCOperands(NewLHS, NewRHS, CCCode);
910 // If ExpandSetCCOperands returned a scalar, we need to compare the result
911 // against zero to select between true and false values.
912 if (NewRHS.Val == 0) {
913 NewRHS = DAG.getConstant(0, NewLHS.getValueType());
917 // Update N to have the operands specified.
918 return DAG.UpdateNodeOperands(SDOperand(N, 0), NewLHS, NewRHS,
919 N->getOperand(2), N->getOperand(3),
920 DAG.getCondCode(CCCode));
923 SDOperand DAGTypeLegalizer::ExpandFloatOp_SETCC(SDNode *N) {
924 SDOperand NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
925 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(2))->get();
926 FloatExpandSetCCOperands(NewLHS, NewRHS, CCCode);
928 // If ExpandSetCCOperands returned a scalar, use it.
929 if (NewRHS.Val == 0) {
930 assert(NewLHS.getValueType() == N->getValueType(0) &&
931 "Unexpected setcc expansion!");
935 // Otherwise, update N to have the operands specified.
936 return DAG.UpdateNodeOperands(SDOperand(N, 0), NewLHS, NewRHS,
937 DAG.getCondCode(CCCode));
940 SDOperand DAGTypeLegalizer::ExpandFloatOp_FP_TO_UINT(SDNode *N) {
941 assert(N->getOperand(0).getValueType() == MVT::ppcf128 &&
942 "Unsupported FP_TO_UINT!");
944 RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
945 switch (N->getValueType(0).getSimpleVT()) {
947 assert(false && "Unsupported FP_TO_UINT!");
949 LC = RTLIB::FPTOUINT_PPCF128_I32;
952 LC = RTLIB::FPTOUINT_PPCF128_I64;
955 LC = RTLIB::FPTOUINT_PPCF128_I128;
959 return MakeLibCall(LC, N->getValueType(0), &N->getOperand(0), 1, false);
962 SDOperand DAGTypeLegalizer::ExpandFloatOp_FP_TO_SINT(SDNode *N) {
963 assert(N->getOperand(0).getValueType() == MVT::ppcf128 &&
964 "Unsupported FP_TO_SINT!");
966 RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
967 switch (N->getValueType(0).getSimpleVT()) {
969 assert(false && "Unsupported FP_TO_SINT!");
971 LC = RTLIB::FPTOSINT_PPCF128_I32;
973 LC = RTLIB::FPTOSINT_PPCF128_I64;
976 LC = RTLIB::FPTOSINT_PPCF128_I64;
980 return MakeLibCall(LC, N->getValueType(0), &N->getOperand(0), 1, false);
983 SDOperand DAGTypeLegalizer::ExpandFloatOp_FP_ROUND(SDNode *N) {
984 assert(N->getOperand(0).getValueType() == MVT::ppcf128 &&
985 "Logic only correct for ppcf128!");
987 GetExpandedFloat(N->getOperand(0), Lo, Hi);
988 // Round it the rest of the way (e.g. to f32) if needed.
989 return DAG.getNode(ISD::FP_ROUND, N->getValueType(0), Hi, N->getOperand(1));
992 SDOperand DAGTypeLegalizer::ExpandFloatOp_STORE(SDNode *N, unsigned OpNo) {
993 if (ISD::isNormalStore(N))
994 return ExpandOp_NormalStore(N, OpNo);
996 assert(ISD::isUNINDEXEDStore(N) && "Indexed store during type legalization!");
997 assert(OpNo == 1 && "Can only expand the stored value so far");
998 StoreSDNode *ST = cast<StoreSDNode>(N);
1000 SDOperand Chain = ST->getChain();
1001 SDOperand Ptr = ST->getBasePtr();
1003 MVT NVT = TLI.getTypeToTransformTo(ST->getValue().getValueType());
1004 assert(NVT.isByteSized() && "Expanded type not byte sized!");
1005 assert(ST->getMemoryVT().bitsLE(NVT) && "Float type not round?");
1008 GetExpandedOp(ST->getValue(), Lo, Hi);
1010 return DAG.getTruncStore(Chain, Lo, Ptr,
1011 ST->getSrcValue(), ST->getSrcValueOffset(),
1013 ST->isVolatile(), ST->getAlignment());